blob: ca26779bb6b21c99a92c9738ef6372c28b840864 [file] [log] [blame]
Mark Brownf701a2e2011-03-09 19:31:01 +00001/*
2 * wm8958-dsp2.c -- WM8958 DSP2 support
3 *
4 * Copyright 2011 Wolfson Microelectronics plc
5 *
6 * Author: Mark Brown <broonie@opensource.wolfsonmicro.com>
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 */
12
13#include <linux/module.h>
14#include <linux/moduleparam.h>
15#include <linux/init.h>
16#include <linux/delay.h>
17#include <linux/pm.h>
18#include <linux/i2c.h>
19#include <linux/platform_device.h>
20#include <linux/slab.h>
21#include <sound/soc.h>
22#include <sound/initval.h>
23#include <sound/tlv.h>
24#include <trace/events/asoc.h>
25
26#include <linux/mfd/wm8994/core.h>
27#include <linux/mfd/wm8994/registers.h>
28#include <linux/mfd/wm8994/pdata.h>
29#include <linux/mfd/wm8994/gpio.h>
30
31#include "wm8994.h"
32
Mark Brownfbbf5922011-03-11 18:09:04 +000033#define WM_FW_BLOCK_INFO 0xff
34#define WM_FW_BLOCK_PM 0x00
35#define WM_FW_BLOCK_X 0x01
36#define WM_FW_BLOCK_Y 0x02
37#define WM_FW_BLOCK_Z 0x03
38#define WM_FW_BLOCK_I 0x06
39#define WM_FW_BLOCK_A 0x08
40#define WM_FW_BLOCK_C 0x0c
41
42static int wm8958_dsp2_fw(struct snd_soc_codec *codec, const char *name,
43 const struct firmware *fw, bool check)
44{
45 struct wm8994_priv *wm8994 = snd_soc_codec_get_drvdata(codec);
46 u64 data64;
47 u32 data32;
48 const u8 *data;
49 char *str;
50 size_t block_len, len;
51 int ret = 0;
52
53 /* Suppress unneeded downloads */
54 if (wm8994->cur_fw == fw)
55 return 0;
56
57 if (fw->size < 32) {
58 dev_err(codec->dev, "%s: firmware too short\n", name);
59 goto err;
60 }
61
62 if (memcmp(fw->data, "WMFW", 4) != 0) {
63 dev_err(codec->dev, "%s: firmware has bad file magic %08x\n",
64 name, data32);
65 goto err;
66 }
67
68 memcpy(&data32, fw->data + 4, sizeof(data32));
69 len = be32_to_cpu(data32);
70
71 memcpy(&data32, fw->data + 8, sizeof(data32));
72 data32 = be32_to_cpu(data32);
73 if ((data32 >> 24) & 0xff) {
74 dev_err(codec->dev, "%s: unsupported firmware version %d\n",
75 name, (data32 >> 24) & 0xff);
76 goto err;
77 }
78 if ((data32 & 0xffff) != 8958) {
79 dev_err(codec->dev, "%s: unsupported target device %d\n",
80 name, data32 & 0xffff);
81 goto err;
82 }
83 if (((data32 >> 16) & 0xff) != 0xc) {
84 dev_err(codec->dev, "%s: unsupported target core %d\n",
85 name, (data32 >> 16) & 0xff);
86 goto err;
87 }
88
89 if (check) {
90 memcpy(&data64, fw->data + 24, sizeof(u64));
91 dev_info(codec->dev, "%s timestamp %llx\n",
92 name, be64_to_cpu(data64));
93 } else {
94 snd_soc_write(codec, 0x102, 0x2);
95 snd_soc_write(codec, 0x900, 0x2);
96 }
97
98 data = fw->data + len;
99 len = fw->size - len;
100 while (len) {
101 if (len < 12) {
Randy Dunlap9e53d852011-05-08 09:48:24 -0700102 dev_err(codec->dev, "%s short data block of %zd\n",
Mark Brownfbbf5922011-03-11 18:09:04 +0000103 name, len);
104 goto err;
105 }
106
107 memcpy(&data32, data + 4, sizeof(data32));
108 block_len = be32_to_cpu(data32);
109 if (block_len + 8 > len) {
Randy Dunlap9e53d852011-05-08 09:48:24 -0700110 dev_err(codec->dev, "%zd byte block longer than file\n",
Mark Brownfbbf5922011-03-11 18:09:04 +0000111 block_len);
112 goto err;
113 }
114 if (block_len == 0) {
115 dev_err(codec->dev, "Zero length block\n");
116 goto err;
117 }
118
119 memcpy(&data32, data, sizeof(data32));
120 data32 = be32_to_cpu(data32);
121
122 switch ((data32 >> 24) & 0xff) {
123 case WM_FW_BLOCK_INFO:
124 /* Informational text */
125 if (!check)
126 break;
127
128 str = kzalloc(block_len + 1, GFP_KERNEL);
129 if (str) {
130 memcpy(str, data + 8, block_len);
131 dev_info(codec->dev, "%s: %s\n", name, str);
132 kfree(str);
133 } else {
134 dev_err(codec->dev, "Out of memory\n");
135 }
136 break;
137 case WM_FW_BLOCK_PM:
138 case WM_FW_BLOCK_X:
139 case WM_FW_BLOCK_Y:
140 case WM_FW_BLOCK_Z:
141 case WM_FW_BLOCK_I:
142 case WM_FW_BLOCK_A:
143 case WM_FW_BLOCK_C:
Randy Dunlap9e53d852011-05-08 09:48:24 -0700144 dev_dbg(codec->dev, "%s: %zd bytes of %x@%x\n", name,
Mark Brownfbbf5922011-03-11 18:09:04 +0000145 block_len, (data32 >> 24) & 0xff,
146 data32 & 0xffffff);
147
148 if (check)
149 break;
150
151 data32 &= 0xffffff;
152
153 wm8994_bulk_write(codec->control_data,
154 data32 & 0xffffff,
155 block_len / 2,
156 (void *)(data + 8));
157
158 break;
159 default:
160 dev_warn(codec->dev, "%s: unknown block type %d\n",
161 name, (data32 >> 24) & 0xff);
162 break;
163 }
164
165 /* Round up to the next 32 bit word */
166 block_len += block_len % 4;
167
168 data += block_len + 8;
169 len -= block_len + 8;
170 }
171
172 if (!check) {
173 dev_dbg(codec->dev, "%s: download done\n", name);
174 wm8994->cur_fw = fw;
175 } else {
176 dev_info(codec->dev, "%s: got firmware\n", name);
177 }
178
179 goto ok;
180
181err:
182 ret = -EINVAL;
183ok:
184 if (!check) {
185 snd_soc_write(codec, 0x900, 0x0);
186 snd_soc_write(codec, 0x102, 0x0);
187 }
188
189 return ret;
190}
191
Mark Brownf20d77c2011-03-16 20:55:37 +0000192static void wm8958_dsp_start_mbc(struct snd_soc_codec *codec, int path)
Mark Brownf701a2e2011-03-09 19:31:01 +0000193{
194 struct wm8994_priv *wm8994 = snd_soc_codec_get_drvdata(codec);
195 struct wm8994_pdata *pdata = wm8994->pdata;
Mark Brownfbbf5922011-03-11 18:09:04 +0000196 int i;
197
198 /* If the DSP is already running then noop */
199 if (snd_soc_read(codec, WM8958_DSP2_PROGRAM) & WM8958_DSP2_ENA)
200 return;
201
202 /* If we have MBC firmware download it */
203 if (wm8994->mbc)
204 wm8958_dsp2_fw(codec, "MBC", wm8994->mbc, false);
205
206 snd_soc_update_bits(codec, WM8958_DSP2_PROGRAM,
207 WM8958_DSP2_ENA, WM8958_DSP2_ENA);
208
209 /* If we've got user supplied MBC settings use them */
210 if (pdata && pdata->num_mbc_cfgs) {
211 struct wm8958_mbc_cfg *cfg
212 = &pdata->mbc_cfgs[wm8994->mbc_cfg];
213
214 for (i = 0; i < ARRAY_SIZE(cfg->coeff_regs); i++)
215 snd_soc_write(codec, i + WM8958_MBC_BAND_1_K_1,
216 cfg->coeff_regs[i]);
217
218 for (i = 0; i < ARRAY_SIZE(cfg->cutoff_regs); i++)
219 snd_soc_write(codec,
220 i + WM8958_MBC_BAND_2_LOWER_CUTOFF_C1_1,
221 cfg->cutoff_regs[i]);
222 }
223
224 /* Run the DSP */
225 snd_soc_write(codec, WM8958_DSP2_EXECCONTROL,
226 WM8958_DSP2_RUNR);
227
228 /* And we're off! */
229 snd_soc_update_bits(codec, WM8958_DSP2_CONFIG,
230 WM8958_MBC_ENA |
231 WM8958_MBC_SEL_MASK,
232 path << WM8958_MBC_SEL_SHIFT |
233 WM8958_MBC_ENA);
234}
235
Mark Brown09e10d72011-03-16 22:57:47 +0000236static void wm8958_dsp_start_vss(struct snd_soc_codec *codec, int path)
237{
238 struct wm8994_priv *wm8994 = snd_soc_codec_get_drvdata(codec);
239 struct wm8994_pdata *pdata = wm8994->pdata;
240 int i, ena;
241
242 if (wm8994->mbc_vss)
243 wm8958_dsp2_fw(codec, "MBC+VSS", wm8994->mbc_vss, false);
244
245 snd_soc_update_bits(codec, WM8958_DSP2_PROGRAM,
246 WM8958_DSP2_ENA, WM8958_DSP2_ENA);
247
248 /* If we've got user supplied settings use them */
249 if (pdata && pdata->num_mbc_cfgs) {
250 struct wm8958_mbc_cfg *cfg
251 = &pdata->mbc_cfgs[wm8994->mbc_cfg];
252
253 for (i = 0; i < ARRAY_SIZE(cfg->combined_regs); i++)
254 snd_soc_write(codec, i + 0x2800,
255 cfg->combined_regs[i]);
256 }
257
258 if (pdata && pdata->num_vss_cfgs) {
259 struct wm8958_vss_cfg *cfg
260 = &pdata->vss_cfgs[wm8994->vss_cfg];
261
262 for (i = 0; i < ARRAY_SIZE(cfg->regs); i++)
263 snd_soc_write(codec, i + 0x2600, cfg->regs[i]);
264 }
265
266 if (pdata && pdata->num_vss_hpf_cfgs) {
267 struct wm8958_vss_hpf_cfg *cfg
268 = &pdata->vss_hpf_cfgs[wm8994->vss_hpf_cfg];
269
270 for (i = 0; i < ARRAY_SIZE(cfg->regs); i++)
271 snd_soc_write(codec, i + 0x2400, cfg->regs[i]);
272 }
273
274 /* Run the DSP */
275 snd_soc_write(codec, WM8958_DSP2_EXECCONTROL,
276 WM8958_DSP2_RUNR);
277
278 /* Enable the algorithms we've selected */
279 ena = 0;
280 if (wm8994->mbc_ena[path])
281 ena |= 0x8;
282 if (wm8994->hpf2_ena[path])
283 ena |= 0x4;
284 if (wm8994->hpf1_ena[path])
285 ena |= 0x2;
286 if (wm8994->vss_ena[path])
287 ena |= 0x1;
288
289 snd_soc_write(codec, 0x2201, ena);
290
291 /* Switch the DSP into the data path */
292 snd_soc_update_bits(codec, WM8958_DSP2_CONFIG,
293 WM8958_MBC_SEL_MASK | WM8958_MBC_ENA,
294 path << WM8958_MBC_SEL_SHIFT | WM8958_MBC_ENA);
295}
296
Mark Brown31215872011-03-17 20:23:43 +0000297static void wm8958_dsp_start_enh_eq(struct snd_soc_codec *codec, int path)
298{
299 struct wm8994_priv *wm8994 = snd_soc_codec_get_drvdata(codec);
300 struct wm8994_pdata *pdata = wm8994->pdata;
301 int i;
302
303 wm8958_dsp2_fw(codec, "ENH_EQ", wm8994->enh_eq, false);
304
305 snd_soc_update_bits(codec, WM8958_DSP2_PROGRAM,
306 WM8958_DSP2_ENA, WM8958_DSP2_ENA);
307
308 /* If we've got user supplied settings use them */
309 if (pdata && pdata->num_enh_eq_cfgs) {
310 struct wm8958_enh_eq_cfg *cfg
311 = &pdata->enh_eq_cfgs[wm8994->enh_eq_cfg];
312
313 for (i = 0; i < ARRAY_SIZE(cfg->regs); i++)
314 snd_soc_write(codec, i + 0x2200,
315 cfg->regs[i]);
316 }
317
318 /* Run the DSP */
319 snd_soc_write(codec, WM8958_DSP2_EXECCONTROL,
320 WM8958_DSP2_RUNR);
321
322 /* Switch the DSP into the data path */
323 snd_soc_update_bits(codec, WM8958_DSP2_CONFIG,
324 WM8958_MBC_SEL_MASK | WM8958_MBC_ENA,
325 path << WM8958_MBC_SEL_SHIFT | WM8958_MBC_ENA);
326}
Mark Brown09e10d72011-03-16 22:57:47 +0000327
Mark Brownfbbf5922011-03-11 18:09:04 +0000328static void wm8958_dsp_apply(struct snd_soc_codec *codec, int path, int start)
329{
330 struct wm8994_priv *wm8994 = snd_soc_codec_get_drvdata(codec);
Mark Brownf701a2e2011-03-09 19:31:01 +0000331 int pwr_reg = snd_soc_read(codec, WM8994_POWER_MANAGEMENT_5);
Mark Brownf20d77c2011-03-16 20:55:37 +0000332 int ena, reg, aif;
Mark Brownf701a2e2011-03-09 19:31:01 +0000333
Mark Brownf20d77c2011-03-16 20:55:37 +0000334 switch (path) {
Mark Brownf701a2e2011-03-09 19:31:01 +0000335 case 0:
336 pwr_reg &= (WM8994_AIF1DAC1L_ENA | WM8994_AIF1DAC1R_ENA);
337 aif = 0;
338 break;
339 case 1:
340 pwr_reg &= (WM8994_AIF1DAC2L_ENA | WM8994_AIF1DAC2R_ENA);
341 aif = 0;
342 break;
343 case 2:
344 pwr_reg &= (WM8994_AIF2DACL_ENA | WM8994_AIF2DACR_ENA);
345 aif = 1;
346 break;
347 default:
348 BUG();
349 return;
350 }
351
Mark Brownf20d77c2011-03-16 20:55:37 +0000352 /* Do we have both an active AIF and an active algorithm? */
Mark Brown09e10d72011-03-16 22:57:47 +0000353 ena = wm8994->mbc_ena[path] || wm8994->vss_ena[path] ||
Mark Brown31215872011-03-17 20:23:43 +0000354 wm8994->hpf1_ena[path] || wm8994->hpf2_ena[path] ||
355 wm8994->enh_eq_ena[path];
Mark Brownf20d77c2011-03-16 20:55:37 +0000356 if (!pwr_reg)
357 ena = 0;
Mark Brownf701a2e2011-03-09 19:31:01 +0000358
359 reg = snd_soc_read(codec, WM8958_DSP2_PROGRAM);
360
Mark Brownf20d77c2011-03-16 20:55:37 +0000361 dev_dbg(codec->dev, "DSP path %d %d startup: %d, power: %x, DSP: %x\n",
362 path, wm8994->dsp_active, start, pwr_reg, reg);
Mark Brownf701a2e2011-03-09 19:31:01 +0000363
364 if (start && ena) {
Mark Brownf20d77c2011-03-16 20:55:37 +0000365 /* If either AIFnCLK is not yet enabled postpone */
Mark Brownc6b7b572011-03-11 18:13:12 +0000366 if (!(snd_soc_read(codec, WM8994_AIF1_CLOCKING_1)
367 & WM8994_AIF1CLK_ENA_MASK) &&
368 !(snd_soc_read(codec, WM8994_AIF2_CLOCKING_1)
369 & WM8994_AIF2CLK_ENA_MASK))
370 return;
371
Mark Brownf701a2e2011-03-09 19:31:01 +0000372 /* Switch the clock over to the appropriate AIF */
373 snd_soc_update_bits(codec, WM8994_CLOCKING_1,
374 WM8958_DSP2CLK_SRC | WM8958_DSP2CLK_ENA,
375 aif << WM8958_DSP2CLK_SRC_SHIFT |
376 WM8958_DSP2CLK_ENA);
377
Mark Brown31215872011-03-17 20:23:43 +0000378 if (wm8994->enh_eq_ena[path])
379 wm8958_dsp_start_enh_eq(codec, path);
380 else if (wm8994->vss_ena[path] || wm8994->hpf1_ena[path] ||
Mark Brown09e10d72011-03-16 22:57:47 +0000381 wm8994->hpf2_ena[path])
382 wm8958_dsp_start_vss(codec, path);
383 else if (wm8994->mbc_ena[path])
Mark Brownf20d77c2011-03-16 20:55:37 +0000384 wm8958_dsp_start_mbc(codec, path);
Mark Brownf701a2e2011-03-09 19:31:01 +0000385
Mark Brown09e10d72011-03-16 22:57:47 +0000386 wm8994->dsp_active = path;
387
388 dev_dbg(codec->dev, "DSP running in path %d\n", path);
389 }
390
391 if (!start && wm8994->dsp_active == path) {
Mark Brownf701a2e2011-03-09 19:31:01 +0000392 /* If the DSP is already stopped then noop */
393 if (!(reg & WM8958_DSP2_ENA))
394 return;
395
396 snd_soc_update_bits(codec, WM8958_DSP2_CONFIG,
397 WM8958_MBC_ENA, 0);
Mark Brownf20d77c2011-03-16 20:55:37 +0000398 snd_soc_write(codec, WM8958_DSP2_EXECCONTROL,
399 WM8958_DSP2_STOP);
Mark Brownf701a2e2011-03-09 19:31:01 +0000400 snd_soc_update_bits(codec, WM8958_DSP2_PROGRAM,
401 WM8958_DSP2_ENA, 0);
402 snd_soc_update_bits(codec, WM8994_CLOCKING_1,
403 WM8958_DSP2CLK_ENA, 0);
Mark Brownf20d77c2011-03-16 20:55:37 +0000404
405 wm8994->dsp_active = -1;
406
407 dev_dbg(codec->dev, "DSP stopped\n");
Mark Brownf701a2e2011-03-09 19:31:01 +0000408 }
409}
410
411int wm8958_aif_ev(struct snd_soc_dapm_widget *w,
412 struct snd_kcontrol *kcontrol, int event)
413{
414 struct snd_soc_codec *codec = w->codec;
Mark Brownc6b7b572011-03-11 18:13:12 +0000415 int i;
Mark Brownf701a2e2011-03-09 19:31:01 +0000416
417 switch (event) {
418 case SND_SOC_DAPM_POST_PMU:
Mark Brownc6b7b572011-03-11 18:13:12 +0000419 case SND_SOC_DAPM_PRE_PMU:
420 for (i = 0; i < 3; i++)
Mark Brownf20d77c2011-03-16 20:55:37 +0000421 wm8958_dsp_apply(codec, i, 1);
Mark Brownf701a2e2011-03-09 19:31:01 +0000422 break;
423 case SND_SOC_DAPM_POST_PMD:
Mark Brownc6b7b572011-03-11 18:13:12 +0000424 case SND_SOC_DAPM_PRE_PMD:
425 for (i = 0; i < 3; i++)
Mark Brownf20d77c2011-03-16 20:55:37 +0000426 wm8958_dsp_apply(codec, i, 0);
Mark Brownf701a2e2011-03-09 19:31:01 +0000427 break;
428 }
429
430 return 0;
431}
432
Mark Brownf20d77c2011-03-16 20:55:37 +0000433/* Check if DSP2 is in use on another AIF */
434static int wm8958_dsp2_busy(struct wm8994_priv *wm8994, int aif)
435{
436 int i;
437
438 for (i = 0; i < ARRAY_SIZE(wm8994->mbc_ena); i++) {
439 if (i == aif)
440 continue;
Mark Brown09e10d72011-03-16 22:57:47 +0000441 if (wm8994->mbc_ena[i] || wm8994->vss_ena[i] ||
442 wm8994->hpf1_ena[i] || wm8994->hpf2_ena[i])
Mark Brownf20d77c2011-03-16 20:55:37 +0000443 return 1;
444 }
445
446 return 0;
447}
448
Mark Brownf701a2e2011-03-09 19:31:01 +0000449static int wm8958_put_mbc_enum(struct snd_kcontrol *kcontrol,
450 struct snd_ctl_elem_value *ucontrol)
451{
452 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
453 struct wm8994_priv *wm8994 = snd_soc_codec_get_drvdata(codec);
454 struct wm8994_pdata *pdata = wm8994->pdata;
455 int value = ucontrol->value.integer.value[0];
456 int reg;
457
458 /* Don't allow on the fly reconfiguration */
459 reg = snd_soc_read(codec, WM8994_CLOCKING_1);
460 if (reg < 0 || reg & WM8958_DSP2CLK_ENA)
461 return -EBUSY;
462
463 if (value >= pdata->num_mbc_cfgs)
464 return -EINVAL;
465
466 wm8994->mbc_cfg = value;
467
468 return 0;
469}
470
471static int wm8958_get_mbc_enum(struct snd_kcontrol *kcontrol,
472 struct snd_ctl_elem_value *ucontrol)
473{
474 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
475 struct wm8994_priv *wm8994 = snd_soc_codec_get_drvdata(codec);
476
477 ucontrol->value.enumerated.item[0] = wm8994->mbc_cfg;
478
479 return 0;
480}
481
482static int wm8958_mbc_info(struct snd_kcontrol *kcontrol,
483 struct snd_ctl_elem_info *uinfo)
484{
485 uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN;
486 uinfo->count = 1;
487 uinfo->value.integer.min = 0;
488 uinfo->value.integer.max = 1;
489 return 0;
490}
491
492static int wm8958_mbc_get(struct snd_kcontrol *kcontrol,
493 struct snd_ctl_elem_value *ucontrol)
494{
495 int mbc = kcontrol->private_value;
496 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
497 struct wm8994_priv *wm8994 = snd_soc_codec_get_drvdata(codec);
498
499 ucontrol->value.integer.value[0] = wm8994->mbc_ena[mbc];
500
501 return 0;
502}
503
504static int wm8958_mbc_put(struct snd_kcontrol *kcontrol,
505 struct snd_ctl_elem_value *ucontrol)
506{
507 int mbc = kcontrol->private_value;
Mark Brownf701a2e2011-03-09 19:31:01 +0000508 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
509 struct wm8994_priv *wm8994 = snd_soc_codec_get_drvdata(codec);
510
Mark Brownd7fdae72011-05-15 18:02:53 -0700511 if (wm8994->mbc_ena[mbc] == ucontrol->value.integer.value[0])
512 return 0;
513
Mark Brownf701a2e2011-03-09 19:31:01 +0000514 if (ucontrol->value.integer.value[0] > 1)
515 return -EINVAL;
516
Mark Brownf20d77c2011-03-16 20:55:37 +0000517 if (wm8958_dsp2_busy(wm8994, mbc)) {
518 dev_dbg(codec->dev, "DSP2 active on %d already\n", mbc);
519 return -EBUSY;
Mark Brownf701a2e2011-03-09 19:31:01 +0000520 }
521
Mark Brown31215872011-03-17 20:23:43 +0000522 if (wm8994->enh_eq_ena[mbc])
523 return -EBUSY;
524
Mark Brownf701a2e2011-03-09 19:31:01 +0000525 wm8994->mbc_ena[mbc] = ucontrol->value.integer.value[0];
526
Mark Brownf20d77c2011-03-16 20:55:37 +0000527 wm8958_dsp_apply(codec, mbc, wm8994->mbc_ena[mbc]);
Mark Brownf701a2e2011-03-09 19:31:01 +0000528
529 return 0;
530}
531
532#define WM8958_MBC_SWITCH(xname, xval) {\
533 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname), \
534 .access = SNDRV_CTL_ELEM_ACCESS_READWRITE,\
535 .info = wm8958_mbc_info, \
536 .get = wm8958_mbc_get, .put = wm8958_mbc_put, \
537 .private_value = xval }
538
Mark Brown09e10d72011-03-16 22:57:47 +0000539static int wm8958_put_vss_enum(struct snd_kcontrol *kcontrol,
540 struct snd_ctl_elem_value *ucontrol)
541{
542 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
543 struct wm8994_priv *wm8994 = snd_soc_codec_get_drvdata(codec);
544 struct wm8994_pdata *pdata = wm8994->pdata;
545 int value = ucontrol->value.integer.value[0];
546 int reg;
547
548 /* Don't allow on the fly reconfiguration */
549 reg = snd_soc_read(codec, WM8994_CLOCKING_1);
550 if (reg < 0 || reg & WM8958_DSP2CLK_ENA)
551 return -EBUSY;
552
553 if (value >= pdata->num_vss_cfgs)
554 return -EINVAL;
555
556 wm8994->vss_cfg = value;
557
558 return 0;
559}
560
561static int wm8958_get_vss_enum(struct snd_kcontrol *kcontrol,
562 struct snd_ctl_elem_value *ucontrol)
563{
564 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
565 struct wm8994_priv *wm8994 = snd_soc_codec_get_drvdata(codec);
566
567 ucontrol->value.enumerated.item[0] = wm8994->vss_cfg;
568
569 return 0;
570}
571
572static int wm8958_put_vss_hpf_enum(struct snd_kcontrol *kcontrol,
573 struct snd_ctl_elem_value *ucontrol)
574{
575 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
576 struct wm8994_priv *wm8994 = snd_soc_codec_get_drvdata(codec);
577 struct wm8994_pdata *pdata = wm8994->pdata;
578 int value = ucontrol->value.integer.value[0];
579 int reg;
580
581 /* Don't allow on the fly reconfiguration */
582 reg = snd_soc_read(codec, WM8994_CLOCKING_1);
583 if (reg < 0 || reg & WM8958_DSP2CLK_ENA)
584 return -EBUSY;
585
586 if (value >= pdata->num_vss_hpf_cfgs)
587 return -EINVAL;
588
589 wm8994->vss_hpf_cfg = value;
590
591 return 0;
592}
593
594static int wm8958_get_vss_hpf_enum(struct snd_kcontrol *kcontrol,
595 struct snd_ctl_elem_value *ucontrol)
596{
597 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
598 struct wm8994_priv *wm8994 = snd_soc_codec_get_drvdata(codec);
599
600 ucontrol->value.enumerated.item[0] = wm8994->vss_hpf_cfg;
601
602 return 0;
603}
604
605static int wm8958_vss_info(struct snd_kcontrol *kcontrol,
606 struct snd_ctl_elem_info *uinfo)
607{
608 uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN;
609 uinfo->count = 1;
610 uinfo->value.integer.min = 0;
611 uinfo->value.integer.max = 1;
612 return 0;
613}
614
615static int wm8958_vss_get(struct snd_kcontrol *kcontrol,
616 struct snd_ctl_elem_value *ucontrol)
617{
618 int vss = kcontrol->private_value;
619 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
620 struct wm8994_priv *wm8994 = snd_soc_codec_get_drvdata(codec);
621
622 ucontrol->value.integer.value[0] = wm8994->vss_ena[vss];
623
624 return 0;
625}
626
627static int wm8958_vss_put(struct snd_kcontrol *kcontrol,
628 struct snd_ctl_elem_value *ucontrol)
629{
630 int vss = kcontrol->private_value;
631 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
632 struct wm8994_priv *wm8994 = snd_soc_codec_get_drvdata(codec);
633
Mark Brownd7fdae72011-05-15 18:02:53 -0700634 if (wm8994->vss_ena[vss] == ucontrol->value.integer.value[0])
635 return 0;
636
Mark Brown09e10d72011-03-16 22:57:47 +0000637 if (ucontrol->value.integer.value[0] > 1)
638 return -EINVAL;
639
640 if (!wm8994->mbc_vss)
641 return -ENODEV;
642
643 if (wm8958_dsp2_busy(wm8994, vss)) {
644 dev_dbg(codec->dev, "DSP2 active on %d already\n", vss);
645 return -EBUSY;
646 }
647
Mark Brown31215872011-03-17 20:23:43 +0000648 if (wm8994->enh_eq_ena[vss])
649 return -EBUSY;
650
Mark Brown09e10d72011-03-16 22:57:47 +0000651 wm8994->vss_ena[vss] = ucontrol->value.integer.value[0];
652
653 wm8958_dsp_apply(codec, vss, wm8994->vss_ena[vss]);
654
655 return 0;
656}
657
658
659#define WM8958_VSS_SWITCH(xname, xval) {\
660 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname), \
661 .access = SNDRV_CTL_ELEM_ACCESS_READWRITE,\
662 .info = wm8958_vss_info, \
663 .get = wm8958_vss_get, .put = wm8958_vss_put, \
664 .private_value = xval }
665
666static int wm8958_hpf_info(struct snd_kcontrol *kcontrol,
667 struct snd_ctl_elem_info *uinfo)
668{
669 uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN;
670 uinfo->count = 1;
671 uinfo->value.integer.min = 0;
672 uinfo->value.integer.max = 1;
673 return 0;
674}
675
676static int wm8958_hpf_get(struct snd_kcontrol *kcontrol,
677 struct snd_ctl_elem_value *ucontrol)
678{
679 int hpf = kcontrol->private_value;
680 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
681 struct wm8994_priv *wm8994 = snd_soc_codec_get_drvdata(codec);
682
683 if (hpf < 3)
684 ucontrol->value.integer.value[0] = wm8994->hpf1_ena[hpf % 3];
685 else
686 ucontrol->value.integer.value[0] = wm8994->hpf2_ena[hpf % 3];
687
688 return 0;
689}
690
691static int wm8958_hpf_put(struct snd_kcontrol *kcontrol,
692 struct snd_ctl_elem_value *ucontrol)
693{
694 int hpf = kcontrol->private_value;
695 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
696 struct wm8994_priv *wm8994 = snd_soc_codec_get_drvdata(codec);
697
Mark Brownd7fdae72011-05-15 18:02:53 -0700698 if (hpf < 3) {
699 if (wm8994->hpf1_ena[hpf % 3] ==
700 ucontrol->value.integer.value[0])
701 return 0;
702 } else {
703 if (wm8994->hpf2_ena[hpf % 3] ==
704 ucontrol->value.integer.value[0])
705 return 0;
706 }
707
Mark Brown09e10d72011-03-16 22:57:47 +0000708 if (ucontrol->value.integer.value[0] > 1)
709 return -EINVAL;
710
711 if (!wm8994->mbc_vss)
712 return -ENODEV;
713
714 if (wm8958_dsp2_busy(wm8994, hpf % 3)) {
715 dev_dbg(codec->dev, "DSP2 active on %d already\n", hpf);
716 return -EBUSY;
717 }
718
Mark Brown31215872011-03-17 20:23:43 +0000719 if (wm8994->enh_eq_ena[hpf % 3])
Mark Brown09e10d72011-03-16 22:57:47 +0000720 return -EBUSY;
721
722 if (hpf < 3)
723 wm8994->hpf1_ena[hpf % 3] = ucontrol->value.integer.value[0];
724 else
725 wm8994->hpf2_ena[hpf % 3] = ucontrol->value.integer.value[0];
726
727 wm8958_dsp_apply(codec, hpf % 3, ucontrol->value.integer.value[0]);
728
729 return 0;
730}
731
732#define WM8958_HPF_SWITCH(xname, xval) {\
733 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname), \
734 .access = SNDRV_CTL_ELEM_ACCESS_READWRITE,\
735 .info = wm8958_hpf_info, \
736 .get = wm8958_hpf_get, .put = wm8958_hpf_put, \
737 .private_value = xval }
738
Mark Brown31215872011-03-17 20:23:43 +0000739static int wm8958_put_enh_eq_enum(struct snd_kcontrol *kcontrol,
740 struct snd_ctl_elem_value *ucontrol)
741{
742 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
743 struct wm8994_priv *wm8994 = snd_soc_codec_get_drvdata(codec);
744 struct wm8994_pdata *pdata = wm8994->pdata;
745 int value = ucontrol->value.integer.value[0];
746 int reg;
747
748 /* Don't allow on the fly reconfiguration */
749 reg = snd_soc_read(codec, WM8994_CLOCKING_1);
750 if (reg < 0 || reg & WM8958_DSP2CLK_ENA)
751 return -EBUSY;
752
753 if (value >= pdata->num_enh_eq_cfgs)
754 return -EINVAL;
755
756 wm8994->enh_eq_cfg = value;
757
758 return 0;
759}
760
761static int wm8958_get_enh_eq_enum(struct snd_kcontrol *kcontrol,
762 struct snd_ctl_elem_value *ucontrol)
763{
764 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
765 struct wm8994_priv *wm8994 = snd_soc_codec_get_drvdata(codec);
766
767 ucontrol->value.enumerated.item[0] = wm8994->enh_eq_cfg;
768
769 return 0;
770}
771
772static int wm8958_enh_eq_info(struct snd_kcontrol *kcontrol,
773 struct snd_ctl_elem_info *uinfo)
774{
775 uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN;
776 uinfo->count = 1;
777 uinfo->value.integer.min = 0;
778 uinfo->value.integer.max = 1;
779 return 0;
780}
781
782static int wm8958_enh_eq_get(struct snd_kcontrol *kcontrol,
783 struct snd_ctl_elem_value *ucontrol)
784{
785 int eq = kcontrol->private_value;
786 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
787 struct wm8994_priv *wm8994 = snd_soc_codec_get_drvdata(codec);
788
789 ucontrol->value.integer.value[0] = wm8994->enh_eq_ena[eq];
790
791 return 0;
792}
793
794static int wm8958_enh_eq_put(struct snd_kcontrol *kcontrol,
795 struct snd_ctl_elem_value *ucontrol)
796{
797 int eq = kcontrol->private_value;
798 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
799 struct wm8994_priv *wm8994 = snd_soc_codec_get_drvdata(codec);
800
Mark Brownd7fdae72011-05-15 18:02:53 -0700801 if (wm8994->enh_eq_ena[eq] == ucontrol->value.integer.value[0])
802 return 0;
803
Mark Brown31215872011-03-17 20:23:43 +0000804 if (ucontrol->value.integer.value[0] > 1)
805 return -EINVAL;
806
807 if (!wm8994->enh_eq)
808 return -ENODEV;
809
810 if (wm8958_dsp2_busy(wm8994, eq)) {
811 dev_dbg(codec->dev, "DSP2 active on %d already\n", eq);
812 return -EBUSY;
813 }
814
815 if (wm8994->mbc_ena[eq] || wm8994->vss_ena[eq] ||
816 wm8994->hpf1_ena[eq] || wm8994->hpf2_ena[eq])
817 return -EBUSY;
818
819 wm8994->enh_eq_ena[eq] = ucontrol->value.integer.value[0];
820
821 wm8958_dsp_apply(codec, eq, ucontrol->value.integer.value[0]);
822
823 return 0;
824}
825
826#define WM8958_ENH_EQ_SWITCH(xname, xval) {\
827 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname), \
828 .access = SNDRV_CTL_ELEM_ACCESS_READWRITE,\
829 .info = wm8958_enh_eq_info, \
830 .get = wm8958_enh_eq_get, .put = wm8958_enh_eq_put, \
831 .private_value = xval }
832
Mark Brownf701a2e2011-03-09 19:31:01 +0000833static const struct snd_kcontrol_new wm8958_mbc_snd_controls[] = {
834WM8958_MBC_SWITCH("AIF1DAC1 MBC Switch", 0),
835WM8958_MBC_SWITCH("AIF1DAC2 MBC Switch", 1),
836WM8958_MBC_SWITCH("AIF2DAC MBC Switch", 2),
837};
838
Mark Brown09e10d72011-03-16 22:57:47 +0000839static const struct snd_kcontrol_new wm8958_vss_snd_controls[] = {
840WM8958_VSS_SWITCH("AIF1DAC1 VSS Switch", 0),
841WM8958_VSS_SWITCH("AIF1DAC2 VSS Switch", 1),
842WM8958_VSS_SWITCH("AIF2DAC VSS Switch", 2),
843WM8958_HPF_SWITCH("AIF1DAC1 HPF1 Switch", 0),
844WM8958_HPF_SWITCH("AIF1DAC2 HPF1 Switch", 1),
845WM8958_HPF_SWITCH("AIF2DAC HPF1 Switch", 2),
846WM8958_HPF_SWITCH("AIF1DAC1 HPF2 Switch", 3),
847WM8958_HPF_SWITCH("AIF1DAC2 HPF2 Switch", 4),
848WM8958_HPF_SWITCH("AIF2DAC HPF2 Switch", 5),
849};
850
Mark Brown31215872011-03-17 20:23:43 +0000851static const struct snd_kcontrol_new wm8958_enh_eq_snd_controls[] = {
852WM8958_ENH_EQ_SWITCH("AIF1DAC1 Enhanced EQ Switch", 0),
853WM8958_ENH_EQ_SWITCH("AIF1DAC2 Enhanced EQ Switch", 1),
854WM8958_ENH_EQ_SWITCH("AIF2DAC Enhanced EQ Switch", 2),
855};
856
857static void wm8958_enh_eq_loaded(const struct firmware *fw, void *context)
858{
859 struct snd_soc_codec *codec = context;
860 struct wm8994_priv *wm8994 = snd_soc_codec_get_drvdata(codec);
861
862 if (fw && (wm8958_dsp2_fw(codec, "ENH_EQ", fw, true) == 0)) {
863 mutex_lock(&codec->mutex);
864 wm8994->enh_eq = fw;
865 mutex_unlock(&codec->mutex);
866 }
867}
868
Mark Brown09e10d72011-03-16 22:57:47 +0000869static void wm8958_mbc_vss_loaded(const struct firmware *fw, void *context)
870{
871 struct snd_soc_codec *codec = context;
872 struct wm8994_priv *wm8994 = snd_soc_codec_get_drvdata(codec);
873
874 if (fw && (wm8958_dsp2_fw(codec, "MBC+VSS", fw, true) == 0)) {
875 mutex_lock(&codec->mutex);
876 wm8994->mbc_vss = fw;
877 mutex_unlock(&codec->mutex);
878 }
879
Mark Brown31215872011-03-17 20:23:43 +0000880 /* We can't have more than one request outstanding at once so
881 * we daisy chain.
882 */
883 request_firmware_nowait(THIS_MODULE, FW_ACTION_HOTPLUG,
884 "wm8958_enh_eq.wfw", codec->dev, GFP_KERNEL,
885 codec, wm8958_enh_eq_loaded);
Mark Brown09e10d72011-03-16 22:57:47 +0000886}
887
Mark Brownfbbf5922011-03-11 18:09:04 +0000888static void wm8958_mbc_loaded(const struct firmware *fw, void *context)
889{
890 struct snd_soc_codec *codec = context;
891 struct wm8994_priv *wm8994 = snd_soc_codec_get_drvdata(codec);
892
Mark Brown09e10d72011-03-16 22:57:47 +0000893 if (wm8958_dsp2_fw(codec, "MBC", fw, true) != 0)
894 return;
895
896 mutex_lock(&codec->mutex);
897 wm8994->mbc = fw;
898 mutex_unlock(&codec->mutex);
899
900 /* We can't have more than one request outstanding at once so
901 * we daisy chain.
902 */
903 request_firmware_nowait(THIS_MODULE, FW_ACTION_HOTPLUG,
904 "wm8958_mbc_vss.wfw", codec->dev, GFP_KERNEL,
905 codec, wm8958_mbc_vss_loaded);
Mark Brownfbbf5922011-03-11 18:09:04 +0000906}
907
Mark Brownf701a2e2011-03-09 19:31:01 +0000908void wm8958_dsp2_init(struct snd_soc_codec *codec)
909{
910 struct wm8994_priv *wm8994 = snd_soc_codec_get_drvdata(codec);
911 struct wm8994_pdata *pdata = wm8994->pdata;
912 int ret, i;
913
Mark Brownf20d77c2011-03-16 20:55:37 +0000914 wm8994->dsp_active = -1;
915
Mark Brownf701a2e2011-03-09 19:31:01 +0000916 snd_soc_add_controls(codec, wm8958_mbc_snd_controls,
917 ARRAY_SIZE(wm8958_mbc_snd_controls));
Mark Brown09e10d72011-03-16 22:57:47 +0000918 snd_soc_add_controls(codec, wm8958_vss_snd_controls,
919 ARRAY_SIZE(wm8958_vss_snd_controls));
Mark Brown31215872011-03-17 20:23:43 +0000920 snd_soc_add_controls(codec, wm8958_enh_eq_snd_controls,
921 ARRAY_SIZE(wm8958_enh_eq_snd_controls));
Mark Brown09e10d72011-03-16 22:57:47 +0000922
Mark Brownf701a2e2011-03-09 19:31:01 +0000923
Mark Brownf20d77c2011-03-16 20:55:37 +0000924 /* We don't *require* firmware and don't want to delay boot */
Mark Brownfbbf5922011-03-11 18:09:04 +0000925 request_firmware_nowait(THIS_MODULE, FW_ACTION_HOTPLUG,
926 "wm8958_mbc.wfw", codec->dev, GFP_KERNEL,
927 codec, wm8958_mbc_loaded);
928
Mark Brownf701a2e2011-03-09 19:31:01 +0000929 if (!pdata)
930 return;
931
932 if (pdata->num_mbc_cfgs) {
933 struct snd_kcontrol_new control[] = {
934 SOC_ENUM_EXT("MBC Mode", wm8994->mbc_enum,
935 wm8958_get_mbc_enum, wm8958_put_mbc_enum),
936 };
937
938 /* We need an array of texts for the enum API */
939 wm8994->mbc_texts = kmalloc(sizeof(char *)
940 * pdata->num_mbc_cfgs, GFP_KERNEL);
941 if (!wm8994->mbc_texts) {
942 dev_err(wm8994->codec->dev,
943 "Failed to allocate %d MBC config texts\n",
944 pdata->num_mbc_cfgs);
945 return;
946 }
947
948 for (i = 0; i < pdata->num_mbc_cfgs; i++)
949 wm8994->mbc_texts[i] = pdata->mbc_cfgs[i].name;
950
951 wm8994->mbc_enum.max = pdata->num_mbc_cfgs;
952 wm8994->mbc_enum.texts = wm8994->mbc_texts;
953
954 ret = snd_soc_add_controls(wm8994->codec, control, 1);
955 if (ret != 0)
956 dev_err(wm8994->codec->dev,
957 "Failed to add MBC mode controls: %d\n", ret);
958 }
959
Mark Brown09e10d72011-03-16 22:57:47 +0000960 if (pdata->num_vss_cfgs) {
961 struct snd_kcontrol_new control[] = {
962 SOC_ENUM_EXT("VSS Mode", wm8994->vss_enum,
963 wm8958_get_vss_enum, wm8958_put_vss_enum),
964 };
Mark Brownf701a2e2011-03-09 19:31:01 +0000965
Mark Brown09e10d72011-03-16 22:57:47 +0000966 /* We need an array of texts for the enum API */
967 wm8994->vss_texts = kmalloc(sizeof(char *)
968 * pdata->num_vss_cfgs, GFP_KERNEL);
969 if (!wm8994->vss_texts) {
970 dev_err(wm8994->codec->dev,
971 "Failed to allocate %d VSS config texts\n",
972 pdata->num_vss_cfgs);
973 return;
974 }
975
976 for (i = 0; i < pdata->num_vss_cfgs; i++)
977 wm8994->vss_texts[i] = pdata->vss_cfgs[i].name;
978
979 wm8994->vss_enum.max = pdata->num_vss_cfgs;
980 wm8994->vss_enum.texts = wm8994->vss_texts;
981
982 ret = snd_soc_add_controls(wm8994->codec, control, 1);
983 if (ret != 0)
984 dev_err(wm8994->codec->dev,
985 "Failed to add VSS mode controls: %d\n", ret);
986 }
987
988 if (pdata->num_vss_hpf_cfgs) {
989 struct snd_kcontrol_new control[] = {
990 SOC_ENUM_EXT("VSS HPF Mode", wm8994->vss_hpf_enum,
991 wm8958_get_vss_hpf_enum,
992 wm8958_put_vss_hpf_enum),
993 };
994
995 /* We need an array of texts for the enum API */
996 wm8994->vss_hpf_texts = kmalloc(sizeof(char *)
997 * pdata->num_vss_hpf_cfgs, GFP_KERNEL);
998 if (!wm8994->vss_hpf_texts) {
999 dev_err(wm8994->codec->dev,
1000 "Failed to allocate %d VSS HPF config texts\n",
1001 pdata->num_vss_hpf_cfgs);
1002 return;
1003 }
1004
1005 for (i = 0; i < pdata->num_vss_hpf_cfgs; i++)
1006 wm8994->vss_hpf_texts[i] = pdata->vss_hpf_cfgs[i].name;
1007
1008 wm8994->vss_hpf_enum.max = pdata->num_vss_hpf_cfgs;
1009 wm8994->vss_hpf_enum.texts = wm8994->vss_hpf_texts;
1010
1011 ret = snd_soc_add_controls(wm8994->codec, control, 1);
1012 if (ret != 0)
1013 dev_err(wm8994->codec->dev,
1014 "Failed to add VSS HPFmode controls: %d\n",
1015 ret);
1016 }
Mark Brown31215872011-03-17 20:23:43 +00001017
1018 if (pdata->num_enh_eq_cfgs) {
1019 struct snd_kcontrol_new control[] = {
1020 SOC_ENUM_EXT("Enhanced EQ Mode", wm8994->enh_eq_enum,
1021 wm8958_get_enh_eq_enum,
1022 wm8958_put_enh_eq_enum),
1023 };
1024
1025 /* We need an array of texts for the enum API */
1026 wm8994->enh_eq_texts = kmalloc(sizeof(char *)
1027 * pdata->num_enh_eq_cfgs, GFP_KERNEL);
1028 if (!wm8994->enh_eq_texts) {
1029 dev_err(wm8994->codec->dev,
1030 "Failed to allocate %d enhanced EQ config texts\n",
1031 pdata->num_enh_eq_cfgs);
1032 return;
1033 }
1034
1035 for (i = 0; i < pdata->num_enh_eq_cfgs; i++)
1036 wm8994->enh_eq_texts[i] = pdata->enh_eq_cfgs[i].name;
1037
1038 wm8994->enh_eq_enum.max = pdata->num_enh_eq_cfgs;
1039 wm8994->enh_eq_enum.texts = wm8994->enh_eq_texts;
1040
1041 ret = snd_soc_add_controls(wm8994->codec, control, 1);
1042 if (ret != 0)
1043 dev_err(wm8994->codec->dev,
1044 "Failed to add enhanced EQ controls: %d\n",
1045 ret);
1046 }
Mark Brownf701a2e2011-03-09 19:31:01 +00001047}