blob: ec0ae4220e72791768a6541142eaa8cc0a526af7 [file] [log] [blame]
Rob Clarkcd5351f2011-11-12 12:09:40 -06001/*
Rob Clark8bb0daf2013-02-11 12:43:09 -05002 * drivers/gpu/drm/omapdrm/omap_drv.c
Rob Clarkcd5351f2011-11-12 12:09:40 -06003 *
4 * Copyright (C) 2011 Texas Instruments
5 * Author: Rob Clark <rob@ti.com>
6 *
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License version 2 as published by
9 * the Free Software Foundation.
10 *
11 * This program is distributed in the hope that it will be useful, but WITHOUT
12 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
14 * more details.
15 *
16 * You should have received a copy of the GNU General Public License along with
17 * this program. If not, see <http://www.gnu.org/licenses/>.
18 */
19
Laurent Pinchartcef77d42015-03-05 21:50:00 +020020#include <drm/drm_atomic_helper.h>
Laurent Pinchart2d278f52015-03-05 21:31:37 +020021#include <drm/drm_crtc_helper.h>
22#include <drm/drm_fb_helper.h>
Rob Clarkcd5351f2011-11-12 12:09:40 -060023
Andy Gross5c137792012-03-05 10:48:39 -060024#include "omap_dmm_tiler.h"
Laurent Pinchart2d278f52015-03-05 21:31:37 +020025#include "omap_drv.h"
Rob Clarkcd5351f2011-11-12 12:09:40 -060026
27#define DRIVER_NAME MODULE_NAME
28#define DRIVER_DESC "OMAP DRM"
29#define DRIVER_DATE "20110917"
30#define DRIVER_MAJOR 1
31#define DRIVER_MINOR 0
32#define DRIVER_PATCHLEVEL 0
33
Rob Clarkcd5351f2011-11-12 12:09:40 -060034static int num_crtc = CONFIG_DRM_OMAP_NUM_CRTCS;
35
36MODULE_PARM_DESC(num_crtc, "Number of overlays to use as CRTCs");
37module_param(num_crtc, int, 0600);
38
39/*
40 * mode config funcs
41 */
42
43/* Notes about mapping DSS and DRM entities:
44 * CRTC: overlay
45 * encoder: manager.. with some extension to allow one primary CRTC
46 * and zero or more video CRTC's to be mapped to one encoder?
47 * connector: dssdev.. manager can be attached/detached from different
48 * devices
49 */
50
51static void omap_fb_output_poll_changed(struct drm_device *dev)
52{
53 struct omap_drm_private *priv = dev->dev_private;
54 DBG("dev=%p", dev);
YAMANE Toshiakic7f904b2012-11-14 19:30:38 +090055 if (priv->fbdev)
Rob Clarkcd5351f2011-11-12 12:09:40 -060056 drm_fb_helper_hotplug_event(priv->fbdev);
Rob Clarkcd5351f2011-11-12 12:09:40 -060057}
58
Laurent Pincharte6ecefa2012-05-17 13:27:23 +020059static const struct drm_mode_config_funcs omap_mode_config_funcs = {
Rob Clarkcd5351f2011-11-12 12:09:40 -060060 .fb_create = omap_framebuffer_create,
61 .output_poll_changed = omap_fb_output_poll_changed,
Laurent Pinchartcef77d42015-03-05 21:50:00 +020062 .atomic_check = drm_atomic_helper_check,
63 .atomic_commit = drm_atomic_helper_commit,
Rob Clarkcd5351f2011-11-12 12:09:40 -060064};
65
66static int get_connector_type(struct omap_dss_device *dssdev)
67{
68 switch (dssdev->type) {
69 case OMAP_DISPLAY_TYPE_HDMI:
70 return DRM_MODE_CONNECTOR_HDMIA;
Tomi Valkeinen4635c172013-05-14 14:14:15 +030071 case OMAP_DISPLAY_TYPE_DVI:
72 return DRM_MODE_CONNECTOR_DVID;
Rob Clarkcd5351f2011-11-12 12:09:40 -060073 default:
74 return DRM_MODE_CONNECTOR_Unknown;
75 }
76}
77
Archit Taneja0d8f3712013-03-26 19:15:19 +053078static bool channel_used(struct drm_device *dev, enum omap_channel channel)
79{
80 struct omap_drm_private *priv = dev->dev_private;
81 int i;
82
83 for (i = 0; i < priv->num_crtcs; i++) {
84 struct drm_crtc *crtc = priv->crtcs[i];
85
86 if (omap_crtc_channel(crtc) == channel)
87 return true;
88 }
89
90 return false;
91}
Archit Tanejacc823bd2014-01-02 14:49:52 +053092static void omap_disconnect_dssdevs(void)
93{
94 struct omap_dss_device *dssdev = NULL;
95
96 for_each_dss_dev(dssdev)
97 dssdev->driver->disconnect(dssdev);
98}
Archit Taneja0d8f3712013-03-26 19:15:19 +053099
Archit Taneja3a01ab22014-01-02 14:49:51 +0530100static int omap_connect_dssdevs(void)
101{
102 int r;
103 struct omap_dss_device *dssdev = NULL;
104 bool no_displays = true;
105
106 for_each_dss_dev(dssdev) {
107 r = dssdev->driver->connect(dssdev);
108 if (r == -EPROBE_DEFER) {
109 omap_dss_put_device(dssdev);
110 goto cleanup;
111 } else if (r) {
112 dev_warn(dssdev->dev, "could not connect display: %s\n",
113 dssdev->name);
114 } else {
115 no_displays = false;
116 }
117 }
118
119 if (no_displays)
120 return -EPROBE_DEFER;
121
122 return 0;
123
124cleanup:
125 /*
126 * if we are deferring probe, we disconnect the devices we previously
127 * connected
128 */
Archit Tanejacc823bd2014-01-02 14:49:52 +0530129 omap_disconnect_dssdevs();
Archit Taneja3a01ab22014-01-02 14:49:51 +0530130
131 return r;
132}
Rob Clarkcd5351f2011-11-12 12:09:40 -0600133
Laurent Pinchartfb9a35f2015-01-11 16:30:44 +0200134static int omap_modeset_create_crtc(struct drm_device *dev, int id,
135 enum omap_channel channel)
136{
137 struct omap_drm_private *priv = dev->dev_private;
138 struct drm_plane *plane;
139 struct drm_crtc *crtc;
140
Laurent Pinchartef6b0e02015-01-11 00:11:18 +0200141 plane = omap_plane_init(dev, id, DRM_PLANE_TYPE_PRIMARY);
Laurent Pinchartfb9a35f2015-01-11 16:30:44 +0200142 if (IS_ERR(plane))
143 return PTR_ERR(plane);
144
145 crtc = omap_crtc_init(dev, plane, channel, id);
146
147 BUG_ON(priv->num_crtcs >= ARRAY_SIZE(priv->crtcs));
148 priv->crtcs[id] = crtc;
149 priv->num_crtcs++;
150
151 priv->planes[id] = plane;
152 priv->num_planes++;
153
154 return 0;
155}
156
Laurent Pincharte2cd09b2015-03-06 17:16:43 +0200157static int omap_modeset_init_properties(struct drm_device *dev)
158{
159 struct omap_drm_private *priv = dev->dev_private;
160
161 if (priv->has_dmm) {
162 dev->mode_config.rotation_property =
163 drm_mode_create_rotation_property(dev,
164 BIT(DRM_ROTATE_0) | BIT(DRM_ROTATE_90) |
165 BIT(DRM_ROTATE_180) | BIT(DRM_ROTATE_270) |
166 BIT(DRM_REFLECT_X) | BIT(DRM_REFLECT_Y));
167 if (!dev->mode_config.rotation_property)
168 return -ENOMEM;
169 }
170
171 priv->zorder_prop = drm_property_create_range(dev, 0, "zorder", 0, 3);
172 if (!priv->zorder_prop)
173 return -ENOMEM;
174
175 return 0;
176}
177
Rob Clarkcd5351f2011-11-12 12:09:40 -0600178static int omap_modeset_init(struct drm_device *dev)
179{
Rob Clarkcd5351f2011-11-12 12:09:40 -0600180 struct omap_drm_private *priv = dev->dev_private;
181 struct omap_dss_device *dssdev = NULL;
Rob Clarkf5f94542012-12-04 13:59:12 -0600182 int num_ovls = dss_feat_get_num_ovls();
Archit Taneja0d8f3712013-03-26 19:15:19 +0530183 int num_mgrs = dss_feat_get_num_mgrs();
184 int num_crtcs;
185 int i, id = 0;
Laurent Pinchartfb9a35f2015-01-11 16:30:44 +0200186 int ret;
Tomi Valkeinen04b1fc02013-05-14 10:55:19 +0300187
Rob Clarkcd5351f2011-11-12 12:09:40 -0600188 drm_mode_config_init(dev);
189
Rob Clarkf5f94542012-12-04 13:59:12 -0600190 omap_drm_irq_install(dev);
Andy Gross71e88312011-12-05 19:19:21 -0600191
Laurent Pincharte2cd09b2015-03-06 17:16:43 +0200192 ret = omap_modeset_init_properties(dev);
193 if (ret < 0)
194 return ret;
195
Rob Clarkf5f94542012-12-04 13:59:12 -0600196 /*
Archit Taneja0d8f3712013-03-26 19:15:19 +0530197 * We usually don't want to create a CRTC for each manager, at least
198 * not until we have a way to expose private planes to userspace.
199 * Otherwise there would not be enough video pipes left for drm planes.
200 * We use the num_crtc argument to limit the number of crtcs we create.
Rob Clarkf5f94542012-12-04 13:59:12 -0600201 */
Archit Taneja0d8f3712013-03-26 19:15:19 +0530202 num_crtcs = min3(num_crtc, num_mgrs, num_ovls);
Rob Clarkcd5351f2011-11-12 12:09:40 -0600203
Archit Taneja0d8f3712013-03-26 19:15:19 +0530204 dssdev = NULL;
Rob Clarkcd5351f2011-11-12 12:09:40 -0600205
Rob Clarkf5f94542012-12-04 13:59:12 -0600206 for_each_dss_dev(dssdev) {
207 struct drm_connector *connector;
208 struct drm_encoder *encoder;
Archit Taneja0d8f3712013-03-26 19:15:19 +0530209 enum omap_channel channel;
Tomi Valkeinena7e71e72013-05-08 16:23:32 +0300210 struct omap_overlay_manager *mgr;
Rob Clarkf5f94542012-12-04 13:59:12 -0600211
Archit Taneja3a01ab22014-01-02 14:49:51 +0530212 if (!omapdss_device_is_connected(dssdev))
Archit Taneja581382e2013-03-26 19:15:18 +0530213 continue;
Tomi Valkeinena7e71e72013-05-08 16:23:32 +0300214
Rob Clarkf5f94542012-12-04 13:59:12 -0600215 encoder = omap_encoder_init(dev, dssdev);
216
217 if (!encoder) {
218 dev_err(dev->dev, "could not create encoder: %s\n",
219 dssdev->name);
220 return -ENOMEM;
221 }
222
223 connector = omap_connector_init(dev,
224 get_connector_type(dssdev), dssdev, encoder);
225
226 if (!connector) {
227 dev_err(dev->dev, "could not create connector: %s\n",
228 dssdev->name);
229 return -ENOMEM;
230 }
231
232 BUG_ON(priv->num_encoders >= ARRAY_SIZE(priv->encoders));
233 BUG_ON(priv->num_connectors >= ARRAY_SIZE(priv->connectors));
234
235 priv->encoders[priv->num_encoders++] = encoder;
236 priv->connectors[priv->num_connectors++] = connector;
237
238 drm_mode_connector_attach_encoder(connector, encoder);
239
Archit Taneja0d8f3712013-03-26 19:15:19 +0530240 /*
241 * if we have reached the limit of the crtcs we are allowed to
242 * create, let's not try to look for a crtc for this
243 * panel/encoder and onwards, we will, of course, populate the
244 * the possible_crtcs field for all the encoders with the final
245 * set of crtcs we create
246 */
247 if (id == num_crtcs)
248 continue;
249
250 /*
251 * get the recommended DISPC channel for this encoder. For now,
252 * we only try to get create a crtc out of the recommended, the
253 * other possible channels to which the encoder can connect are
254 * not considered.
255 */
Archit Taneja0d8f3712013-03-26 19:15:19 +0530256
Tomi Valkeinena7e71e72013-05-08 16:23:32 +0300257 mgr = omapdss_find_mgr_from_display(dssdev);
258 channel = mgr->id;
Archit Taneja0d8f3712013-03-26 19:15:19 +0530259 /*
260 * if this channel hasn't already been taken by a previously
261 * allocated crtc, we create a new crtc for it
262 */
263 if (!channel_used(dev, channel)) {
Laurent Pinchartfb9a35f2015-01-11 16:30:44 +0200264 ret = omap_modeset_create_crtc(dev, id, channel);
265 if (ret < 0) {
266 dev_err(dev->dev,
267 "could not create CRTC (channel %u)\n",
268 channel);
269 return ret;
270 }
Archit Taneja0d8f3712013-03-26 19:15:19 +0530271
272 id++;
273 }
274 }
275
276 /*
277 * we have allocated crtcs according to the need of the panels/encoders,
278 * adding more crtcs here if needed
279 */
280 for (; id < num_crtcs; id++) {
281
282 /* find a free manager for this crtc */
283 for (i = 0; i < num_mgrs; i++) {
Laurent Pinchartfb9a35f2015-01-11 16:30:44 +0200284 if (!channel_used(dev, i))
Archit Taneja0d8f3712013-03-26 19:15:19 +0530285 break;
Archit Taneja0d8f3712013-03-26 19:15:19 +0530286 }
287
288 if (i == num_mgrs) {
289 /* this shouldn't really happen */
290 dev_err(dev->dev, "no managers left for crtc\n");
291 return -ENOMEM;
292 }
Laurent Pinchartfb9a35f2015-01-11 16:30:44 +0200293
294 ret = omap_modeset_create_crtc(dev, id, i);
295 if (ret < 0) {
296 dev_err(dev->dev,
297 "could not create CRTC (channel %u)\n", i);
298 return ret;
299 }
Archit Taneja0d8f3712013-03-26 19:15:19 +0530300 }
301
302 /*
303 * Create normal planes for the remaining overlays:
304 */
305 for (; id < num_ovls; id++) {
Laurent Pinchartfb9a35f2015-01-11 16:30:44 +0200306 struct drm_plane *plane;
307
Laurent Pinchartef6b0e02015-01-11 00:11:18 +0200308 plane = omap_plane_init(dev, id, DRM_PLANE_TYPE_OVERLAY);
Laurent Pinchartfb9a35f2015-01-11 16:30:44 +0200309 if (IS_ERR(plane))
310 return PTR_ERR(plane);
Archit Taneja0d8f3712013-03-26 19:15:19 +0530311
312 BUG_ON(priv->num_planes >= ARRAY_SIZE(priv->planes));
313 priv->planes[priv->num_planes++] = plane;
314 }
315
316 for (i = 0; i < priv->num_encoders; i++) {
317 struct drm_encoder *encoder = priv->encoders[i];
318 struct omap_dss_device *dssdev =
319 omap_encoder_get_dssdev(encoder);
Tomi Valkeinen1f68d9c2013-04-19 15:09:34 +0300320 struct omap_dss_device *output;
Tomi Valkeinenbe8e8e12013-04-23 15:35:35 +0300321
322 output = omapdss_find_output_from_display(dssdev);
Archit Taneja0d8f3712013-03-26 19:15:19 +0530323
Rob Clarkf5f94542012-12-04 13:59:12 -0600324 /* figure out which crtc's we can connect the encoder to: */
325 encoder->possible_crtcs = 0;
326 for (id = 0; id < priv->num_crtcs; id++) {
Archit Taneja0d8f3712013-03-26 19:15:19 +0530327 struct drm_crtc *crtc = priv->crtcs[id];
328 enum omap_channel crtc_channel;
Archit Taneja0d8f3712013-03-26 19:15:19 +0530329
330 crtc_channel = omap_crtc_channel(crtc);
Archit Taneja0d8f3712013-03-26 19:15:19 +0530331
Tomi Valkeinen17337292014-09-03 19:25:49 +0000332 if (output->dispc_channel == crtc_channel) {
Rob Clarkf5f94542012-12-04 13:59:12 -0600333 encoder->possible_crtcs |= (1 << id);
Tomi Valkeinen17337292014-09-03 19:25:49 +0000334 break;
335 }
Rob Clarkf5f94542012-12-04 13:59:12 -0600336 }
Tomi Valkeinen820caab2013-04-25 14:53:18 +0300337
338 omap_dss_put_device(output);
Rob Clarkf5f94542012-12-04 13:59:12 -0600339 }
Rob Clarkcd5351f2011-11-12 12:09:40 -0600340
Archit Taneja0d8f3712013-03-26 19:15:19 +0530341 DBG("registered %d planes, %d crtcs, %d encoders and %d connectors\n",
342 priv->num_planes, priv->num_crtcs, priv->num_encoders,
343 priv->num_connectors);
344
Rob Clark6b8ca4c2012-01-08 19:37:37 -0600345 dev->mode_config.min_width = 32;
346 dev->mode_config.min_height = 32;
Rob Clarkcd5351f2011-11-12 12:09:40 -0600347
348 /* note: eventually will need some cpu_is_omapXYZ() type stuff here
349 * to fill in these limits properly on different OMAP generations..
350 */
351 dev->mode_config.max_width = 2048;
352 dev->mode_config.max_height = 2048;
353
354 dev->mode_config.funcs = &omap_mode_config_funcs;
355
Laurent Pinchart69a12262015-03-05 21:38:16 +0200356 drm_mode_config_reset(dev);
357
Rob Clarkcd5351f2011-11-12 12:09:40 -0600358 return 0;
359}
360
361static void omap_modeset_free(struct drm_device *dev)
362{
363 drm_mode_config_cleanup(dev);
364}
365
366/*
367 * drm ioctl funcs
368 */
369
370
371static int ioctl_get_param(struct drm_device *dev, void *data,
372 struct drm_file *file_priv)
373{
Rob Clark5e3b0872012-10-29 09:31:12 +0100374 struct omap_drm_private *priv = dev->dev_private;
Rob Clarkcd5351f2011-11-12 12:09:40 -0600375 struct drm_omap_param *args = data;
376
377 DBG("%p: param=%llu", dev, args->param);
378
379 switch (args->param) {
380 case OMAP_PARAM_CHIPSET_ID:
Rob Clark5e3b0872012-10-29 09:31:12 +0100381 args->value = priv->omaprev;
Rob Clarkcd5351f2011-11-12 12:09:40 -0600382 break;
383 default:
384 DBG("unknown parameter %lld", args->param);
385 return -EINVAL;
386 }
387
388 return 0;
389}
390
391static int ioctl_set_param(struct drm_device *dev, void *data,
392 struct drm_file *file_priv)
393{
394 struct drm_omap_param *args = data;
395
396 switch (args->param) {
397 default:
398 DBG("unknown parameter %lld", args->param);
399 return -EINVAL;
400 }
401
402 return 0;
403}
404
405static int ioctl_gem_new(struct drm_device *dev, void *data,
406 struct drm_file *file_priv)
407{
408 struct drm_omap_gem_new *args = data;
Rob Clarkf5f94542012-12-04 13:59:12 -0600409 VERB("%p:%p: size=0x%08x, flags=%08x", dev, file_priv,
Rob Clarkcd5351f2011-11-12 12:09:40 -0600410 args->size.bytes, args->flags);
411 return omap_gem_new_handle(dev, file_priv, args->size,
412 args->flags, &args->handle);
413}
414
415static int ioctl_gem_cpu_prep(struct drm_device *dev, void *data,
416 struct drm_file *file_priv)
417{
418 struct drm_omap_gem_cpu_prep *args = data;
419 struct drm_gem_object *obj;
420 int ret;
421
422 VERB("%p:%p: handle=%d, op=%x", dev, file_priv, args->handle, args->op);
423
424 obj = drm_gem_object_lookup(dev, file_priv, args->handle);
YAMANE Toshiakic7f904b2012-11-14 19:30:38 +0900425 if (!obj)
Rob Clarkcd5351f2011-11-12 12:09:40 -0600426 return -ENOENT;
Rob Clarkcd5351f2011-11-12 12:09:40 -0600427
428 ret = omap_gem_op_sync(obj, args->op);
429
YAMANE Toshiakic7f904b2012-11-14 19:30:38 +0900430 if (!ret)
Rob Clarkcd5351f2011-11-12 12:09:40 -0600431 ret = omap_gem_op_start(obj, args->op);
Rob Clarkcd5351f2011-11-12 12:09:40 -0600432
433 drm_gem_object_unreference_unlocked(obj);
434
435 return ret;
436}
437
438static int ioctl_gem_cpu_fini(struct drm_device *dev, void *data,
439 struct drm_file *file_priv)
440{
441 struct drm_omap_gem_cpu_fini *args = data;
442 struct drm_gem_object *obj;
443 int ret;
444
445 VERB("%p:%p: handle=%d", dev, file_priv, args->handle);
446
447 obj = drm_gem_object_lookup(dev, file_priv, args->handle);
YAMANE Toshiakic7f904b2012-11-14 19:30:38 +0900448 if (!obj)
Rob Clarkcd5351f2011-11-12 12:09:40 -0600449 return -ENOENT;
Rob Clarkcd5351f2011-11-12 12:09:40 -0600450
451 /* XXX flushy, flushy */
452 ret = 0;
453
YAMANE Toshiakic7f904b2012-11-14 19:30:38 +0900454 if (!ret)
Rob Clarkcd5351f2011-11-12 12:09:40 -0600455 ret = omap_gem_op_finish(obj, args->op);
Rob Clarkcd5351f2011-11-12 12:09:40 -0600456
457 drm_gem_object_unreference_unlocked(obj);
458
459 return ret;
460}
461
462static int ioctl_gem_info(struct drm_device *dev, void *data,
463 struct drm_file *file_priv)
464{
465 struct drm_omap_gem_info *args = data;
466 struct drm_gem_object *obj;
467 int ret = 0;
468
Rob Clarkf5f94542012-12-04 13:59:12 -0600469 VERB("%p:%p: handle=%d", dev, file_priv, args->handle);
Rob Clarkcd5351f2011-11-12 12:09:40 -0600470
471 obj = drm_gem_object_lookup(dev, file_priv, args->handle);
YAMANE Toshiakic7f904b2012-11-14 19:30:38 +0900472 if (!obj)
Rob Clarkcd5351f2011-11-12 12:09:40 -0600473 return -ENOENT;
Rob Clarkcd5351f2011-11-12 12:09:40 -0600474
Rob Clarkf7f9f452011-12-05 19:19:22 -0600475 args->size = omap_gem_mmap_size(obj);
Rob Clarkcd5351f2011-11-12 12:09:40 -0600476 args->offset = omap_gem_mmap_offset(obj);
477
478 drm_gem_object_unreference_unlocked(obj);
479
480 return ret;
481}
482
Rob Clarkbaa70942013-08-02 13:27:49 -0400483static const struct drm_ioctl_desc ioctls[DRM_COMMAND_END - DRM_COMMAND_BASE] = {
Rob Clarkcd5351f2011-11-12 12:09:40 -0600484 DRM_IOCTL_DEF_DRV(OMAP_GET_PARAM, ioctl_get_param, DRM_UNLOCKED|DRM_AUTH),
485 DRM_IOCTL_DEF_DRV(OMAP_SET_PARAM, ioctl_set_param, DRM_UNLOCKED|DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY),
486 DRM_IOCTL_DEF_DRV(OMAP_GEM_NEW, ioctl_gem_new, DRM_UNLOCKED|DRM_AUTH),
487 DRM_IOCTL_DEF_DRV(OMAP_GEM_CPU_PREP, ioctl_gem_cpu_prep, DRM_UNLOCKED|DRM_AUTH),
488 DRM_IOCTL_DEF_DRV(OMAP_GEM_CPU_FINI, ioctl_gem_cpu_fini, DRM_UNLOCKED|DRM_AUTH),
489 DRM_IOCTL_DEF_DRV(OMAP_GEM_INFO, ioctl_gem_info, DRM_UNLOCKED|DRM_AUTH),
490};
491
492/*
493 * drm driver funcs
494 */
495
496/**
497 * load - setup chip and create an initial config
498 * @dev: DRM device
499 * @flags: startup flags
500 *
501 * The driver load routine has to do several things:
502 * - initialize the memory manager
503 * - allocate initial config memory
504 * - setup the DRM framebuffer with the allocated memory
505 */
506static int dev_load(struct drm_device *dev, unsigned long flags)
507{
Rob Clark5e3b0872012-10-29 09:31:12 +0100508 struct omap_drm_platform_data *pdata = dev->dev->platform_data;
Rob Clarkcd5351f2011-11-12 12:09:40 -0600509 struct omap_drm_private *priv;
Laurent Pinchartc397cfd2015-01-25 22:42:30 +0200510 unsigned int i;
Rob Clarkcd5351f2011-11-12 12:09:40 -0600511 int ret;
512
513 DBG("load: dev=%p", dev);
514
Rob Clarkcd5351f2011-11-12 12:09:40 -0600515 priv = kzalloc(sizeof(*priv), GFP_KERNEL);
Joe Perches78110bb2013-02-11 09:41:29 -0800516 if (!priv)
Rob Clarkcd5351f2011-11-12 12:09:40 -0600517 return -ENOMEM;
Rob Clarkcd5351f2011-11-12 12:09:40 -0600518
Rob Clark5e3b0872012-10-29 09:31:12 +0100519 priv->omaprev = pdata->omaprev;
520
Rob Clarkcd5351f2011-11-12 12:09:40 -0600521 dev->dev_private = priv;
522
Tejun Heo4619cdb2012-08-22 16:49:44 -0700523 priv->wq = alloc_ordered_workqueue("omapdrm", 0);
Rob Clark5609f7f2012-03-05 10:48:32 -0600524
Tomi Valkeinen76c40552014-12-17 14:34:22 +0200525 spin_lock_init(&priv->list_lock);
Rob Clarkf6b60362012-03-05 10:48:36 -0600526 INIT_LIST_HEAD(&priv->obj_list);
527
Rob Clarkf7f9f452011-12-05 19:19:22 -0600528 omap_gem_init(dev);
529
Rob Clarkcd5351f2011-11-12 12:09:40 -0600530 ret = omap_modeset_init(dev);
531 if (ret) {
532 dev_err(dev->dev, "omap_modeset_init failed: ret=%d\n", ret);
533 dev->dev_private = NULL;
534 kfree(priv);
535 return ret;
536 }
537
Laurent Pinchartc397cfd2015-01-25 22:42:30 +0200538 /* Initialize vblank handling, start with all CRTCs disabled. */
Rob Clarkf5f94542012-12-04 13:59:12 -0600539 ret = drm_vblank_init(dev, priv->num_crtcs);
540 if (ret)
541 dev_warn(dev->dev, "could not init vblank\n");
542
Laurent Pinchartc397cfd2015-01-25 22:42:30 +0200543 for (i = 0; i < priv->num_crtcs; i++)
544 drm_crtc_vblank_off(priv->crtcs[i]);
545
Rob Clarkcd5351f2011-11-12 12:09:40 -0600546 priv->fbdev = omap_fbdev_init(dev);
547 if (!priv->fbdev) {
548 dev_warn(dev->dev, "omap_fbdev_init failed\n");
549 /* well, limp along without an fbdev.. maybe X11 will work? */
550 }
551
Andy Grosse78edba2012-12-19 14:53:37 -0600552 /* store off drm_device for use in pm ops */
553 dev_set_drvdata(dev->dev, dev);
554
Rob Clarkcd5351f2011-11-12 12:09:40 -0600555 drm_kms_helper_poll_init(dev);
556
Rob Clarkcd5351f2011-11-12 12:09:40 -0600557 return 0;
558}
559
560static int dev_unload(struct drm_device *dev)
561{
Rob Clark5609f7f2012-03-05 10:48:32 -0600562 struct omap_drm_private *priv = dev->dev_private;
563
Rob Clarkcd5351f2011-11-12 12:09:40 -0600564 DBG("unload: dev=%p", dev);
565
Rob Clarkcd5351f2011-11-12 12:09:40 -0600566 drm_kms_helper_poll_fini(dev);
567
Tomi Valkeinenc7c1aec2014-09-25 19:24:26 +0000568 if (priv->fbdev)
569 omap_fbdev_free(dev);
Tomi Valkeinene2f8fd72014-04-02 14:31:57 +0300570
Rob Clarkcd5351f2011-11-12 12:09:40 -0600571 omap_modeset_free(dev);
Rob Clarkf7f9f452011-12-05 19:19:22 -0600572 omap_gem_deinit(dev);
Rob Clarkcd5351f2011-11-12 12:09:40 -0600573
Rob Clark5609f7f2012-03-05 10:48:32 -0600574 destroy_workqueue(priv->wq);
575
Archit Taneja80e4ed52014-01-02 14:49:54 +0530576 drm_vblank_cleanup(dev);
577 omap_drm_irq_uninstall(dev);
578
Rob Clarkcd5351f2011-11-12 12:09:40 -0600579 kfree(dev->dev_private);
580 dev->dev_private = NULL;
581
Andy Grosse78edba2012-12-19 14:53:37 -0600582 dev_set_drvdata(dev->dev, NULL);
583
Rob Clarkcd5351f2011-11-12 12:09:40 -0600584 return 0;
585}
586
587static int dev_open(struct drm_device *dev, struct drm_file *file)
588{
589 file->driver_priv = NULL;
590
591 DBG("open: dev=%p, file=%p", dev, file);
592
593 return 0;
594}
595
Rob Clarkcd5351f2011-11-12 12:09:40 -0600596/**
597 * lastclose - clean up after all DRM clients have exited
598 * @dev: DRM device
599 *
600 * Take care of cleaning up after all DRM clients have exited. In the
601 * mode setting case, we want to restore the kernel's initial mode (just
602 * in case the last client left us in a bad state).
603 */
604static void dev_lastclose(struct drm_device *dev)
605{
Rob Clark3c810c62012-08-15 15:18:01 -0500606 int i;
607
Rob Clarkcd5351f2011-11-12 12:09:40 -0600608 /* we don't support vga-switcheroo.. so just make sure the fbdev
609 * mode is active
610 */
611 struct omap_drm_private *priv = dev->dev_private;
612 int ret;
613
614 DBG("lastclose: dev=%p", dev);
615
Laurent Pincharte2cd09b2015-03-06 17:16:43 +0200616 if (dev->mode_config.rotation_property) {
Rob Clarkc2a6a552012-10-25 17:14:13 -0500617 /* need to restore default rotation state.. not sure
618 * if there is a cleaner way to restore properties to
619 * default state? Maybe a flag that properties should
620 * automatically be restored to default state on
621 * lastclose?
622 */
623 for (i = 0; i < priv->num_crtcs; i++) {
624 drm_object_property_set_value(&priv->crtcs[i]->base,
Laurent Pincharte2cd09b2015-03-06 17:16:43 +0200625 dev->mode_config.rotation_property, 0);
Rob Clarkc2a6a552012-10-25 17:14:13 -0500626 }
Rob Clark3c810c62012-08-15 15:18:01 -0500627
Rob Clarkc2a6a552012-10-25 17:14:13 -0500628 for (i = 0; i < priv->num_planes; i++) {
629 drm_object_property_set_value(&priv->planes[i]->base,
Laurent Pincharte2cd09b2015-03-06 17:16:43 +0200630 dev->mode_config.rotation_property, 0);
Rob Clarkc2a6a552012-10-25 17:14:13 -0500631 }
Rob Clark3c810c62012-08-15 15:18:01 -0500632 }
633
Tomi Valkeinenc7c1aec2014-09-25 19:24:26 +0000634 if (priv->fbdev) {
635 ret = drm_fb_helper_restore_fbdev_mode_unlocked(priv->fbdev);
636 if (ret)
637 DBG("failed to restore crtc mode");
638 }
Rob Clarkcd5351f2011-11-12 12:09:40 -0600639}
640
641static void dev_preclose(struct drm_device *dev, struct drm_file *file)
642{
Laurent Pinchart1d5e5ea2015-01-18 16:57:36 +0200643 struct omap_drm_private *priv = dev->dev_private;
644 unsigned int i;
645
Rob Clarkcd5351f2011-11-12 12:09:40 -0600646 DBG("preclose: dev=%p", dev);
Laurent Pinchart1d5e5ea2015-01-18 16:57:36 +0200647
648 for (i = 0; i < priv->num_crtcs; ++i)
649 omap_crtc_cancel_page_flip(priv->crtcs[i], file);
Rob Clarkcd5351f2011-11-12 12:09:40 -0600650}
651
652static void dev_postclose(struct drm_device *dev, struct drm_file *file)
653{
654 DBG("postclose: dev=%p, file=%p", dev, file);
655}
656
Laurent Pinchart78b68552012-05-17 13:27:22 +0200657static const struct vm_operations_struct omap_gem_vm_ops = {
Rob Clarkcd5351f2011-11-12 12:09:40 -0600658 .fault = omap_gem_fault,
659 .open = drm_gem_vm_open,
660 .close = drm_gem_vm_close,
661};
662
Rob Clarkff4f3872012-01-16 12:51:14 -0600663static const struct file_operations omapdriver_fops = {
Laurent Pinchart222025e2015-01-11 00:02:07 +0200664 .owner = THIS_MODULE,
665 .open = drm_open,
666 .unlocked_ioctl = drm_ioctl,
667 .release = drm_release,
668 .mmap = omap_gem_mmap,
669 .poll = drm_poll,
670 .read = drm_read,
671 .llseek = noop_llseek,
Rob Clarkff4f3872012-01-16 12:51:14 -0600672};
673
Rob Clarkcd5351f2011-11-12 12:09:40 -0600674static struct drm_driver omap_drm_driver = {
Laurent Pinchartf13ab002015-01-25 22:06:45 +0200675 .driver_features = DRIVER_MODESET | DRIVER_GEM | DRIVER_PRIME,
Laurent Pinchart222025e2015-01-11 00:02:07 +0200676 .load = dev_load,
677 .unload = dev_unload,
678 .open = dev_open,
679 .lastclose = dev_lastclose,
680 .preclose = dev_preclose,
681 .postclose = dev_postclose,
682 .set_busid = drm_platform_set_busid,
683 .get_vblank_counter = drm_vblank_count,
684 .enable_vblank = omap_irq_enable_vblank,
685 .disable_vblank = omap_irq_disable_vblank,
Andy Gross6169a1482011-12-15 21:05:17 -0600686#ifdef CONFIG_DEBUG_FS
Laurent Pinchart222025e2015-01-11 00:02:07 +0200687 .debugfs_init = omap_debugfs_init,
688 .debugfs_cleanup = omap_debugfs_cleanup,
Andy Gross6169a1482011-12-15 21:05:17 -0600689#endif
Laurent Pinchart222025e2015-01-11 00:02:07 +0200690 .prime_handle_to_fd = drm_gem_prime_handle_to_fd,
691 .prime_fd_to_handle = drm_gem_prime_fd_to_handle,
692 .gem_prime_export = omap_gem_prime_export,
693 .gem_prime_import = omap_gem_prime_import,
694 .gem_free_object = omap_gem_free_object,
695 .gem_vm_ops = &omap_gem_vm_ops,
696 .dumb_create = omap_gem_dumb_create,
697 .dumb_map_offset = omap_gem_dumb_map_offset,
698 .dumb_destroy = drm_gem_dumb_destroy,
699 .ioctls = ioctls,
700 .num_ioctls = DRM_OMAP_NUM_IOCTLS,
701 .fops = &omapdriver_fops,
702 .name = DRIVER_NAME,
703 .desc = DRIVER_DESC,
704 .date = DRIVER_DATE,
705 .major = DRIVER_MAJOR,
706 .minor = DRIVER_MINOR,
707 .patchlevel = DRIVER_PATCHLEVEL,
Rob Clarkcd5351f2011-11-12 12:09:40 -0600708};
709
Rob Clarkcd5351f2011-11-12 12:09:40 -0600710static int pdev_probe(struct platform_device *device)
711{
Archit Taneja3a01ab22014-01-02 14:49:51 +0530712 int r;
713
Tomi Valkeinen591a0ac2013-05-23 12:07:50 +0300714 if (omapdss_is_initialized() == false)
715 return -EPROBE_DEFER;
716
Archit Taneja3a01ab22014-01-02 14:49:51 +0530717 omap_crtc_pre_init();
718
719 r = omap_connect_dssdevs();
720 if (r) {
721 omap_crtc_pre_uninit();
722 return r;
723 }
724
Rob Clarkcd5351f2011-11-12 12:09:40 -0600725 DBG("%s", device->name);
726 return drm_platform_init(&omap_drm_driver, device);
727}
728
729static int pdev_remove(struct platform_device *device)
730{
731 DBG("");
Andy Gross5c137792012-03-05 10:48:39 -0600732
Tomi Valkeinen707cf582014-04-02 13:47:43 +0300733 drm_put_dev(platform_get_drvdata(device));
734
Archit Tanejacc823bd2014-01-02 14:49:52 +0530735 omap_disconnect_dssdevs();
736 omap_crtc_pre_uninit();
Daniel Vetterfd3c0252013-12-11 11:34:26 +0100737
Rob Clarkcd5351f2011-11-12 12:09:40 -0600738 return 0;
739}
740
Grygorii Strashko8450c8d2015-02-26 15:57:17 +0200741#ifdef CONFIG_PM_SLEEP
Tomi Valkeinenccd7b5e2014-11-14 15:18:28 +0200742static int omap_drm_suspend(struct device *dev)
743{
744 struct drm_device *drm_dev = dev_get_drvdata(dev);
745
746 drm_kms_helper_poll_disable(drm_dev);
747
748 return 0;
749}
750
751static int omap_drm_resume(struct device *dev)
752{
753 struct drm_device *drm_dev = dev_get_drvdata(dev);
754
755 drm_kms_helper_poll_enable(drm_dev);
756
757 return omap_gem_resume(dev);
758}
Andy Grosse78edba2012-12-19 14:53:37 -0600759#endif
760
Grygorii Strashko8450c8d2015-02-26 15:57:17 +0200761static SIMPLE_DEV_PM_OPS(omapdrm_pm_ops, omap_drm_suspend, omap_drm_resume);
762
Tomi Valkeinen6717cd22013-04-10 10:44:00 +0300763static struct platform_driver pdev = {
Laurent Pinchart222025e2015-01-11 00:02:07 +0200764 .driver = {
765 .name = DRIVER_NAME,
Laurent Pinchart222025e2015-01-11 00:02:07 +0200766 .pm = &omapdrm_pm_ops,
Laurent Pinchart222025e2015-01-11 00:02:07 +0200767 },
768 .probe = pdev_probe,
769 .remove = pdev_remove,
Rob Clarkcd5351f2011-11-12 12:09:40 -0600770};
771
772static int __init omap_drm_init(void)
773{
Tomi Valkeinenea7e3a62014-04-02 14:31:50 +0300774 int r;
775
Rob Clarkcd5351f2011-11-12 12:09:40 -0600776 DBG("init");
Tomi Valkeinenea7e3a62014-04-02 14:31:50 +0300777
778 r = platform_driver_register(&omap_dmm_driver);
779 if (r) {
780 pr_err("DMM driver registration failed\n");
781 return r;
Rob Clarkbe0775a2012-04-05 10:34:56 -0500782 }
Tomi Valkeinenea7e3a62014-04-02 14:31:50 +0300783
784 r = platform_driver_register(&pdev);
785 if (r) {
786 pr_err("omapdrm driver registration failed\n");
787 platform_driver_unregister(&omap_dmm_driver);
788 return r;
789 }
790
791 return 0;
Rob Clarkcd5351f2011-11-12 12:09:40 -0600792}
793
794static void __exit omap_drm_fini(void)
795{
796 DBG("fini");
Tomi Valkeinenea7e3a62014-04-02 14:31:50 +0300797
Rob Clarkcd5351f2011-11-12 12:09:40 -0600798 platform_driver_unregister(&pdev);
Tomi Valkeinenea7e3a62014-04-02 14:31:50 +0300799
800 platform_driver_unregister(&omap_dmm_driver);
Rob Clarkcd5351f2011-11-12 12:09:40 -0600801}
802
803/* need late_initcall() so we load after dss_driver's are loaded */
804late_initcall(omap_drm_init);
805module_exit(omap_drm_fini);
806
807MODULE_AUTHOR("Rob Clark <rob@ti.com>");
808MODULE_DESCRIPTION("OMAP DRM Display Driver");
809MODULE_ALIAS("platform:" DRIVER_NAME);
810MODULE_LICENSE("GPL v2");