Rob Clark | cd5351f | 2011-11-12 12:09:40 -0600 | [diff] [blame] | 1 | /* |
Rob Clark | 8bb0daf | 2013-02-11 12:43:09 -0500 | [diff] [blame] | 2 | * drivers/gpu/drm/omapdrm/omap_drv.c |
Rob Clark | cd5351f | 2011-11-12 12:09:40 -0600 | [diff] [blame] | 3 | * |
| 4 | * Copyright (C) 2011 Texas Instruments |
| 5 | * Author: Rob Clark <rob@ti.com> |
| 6 | * |
| 7 | * This program is free software; you can redistribute it and/or modify it |
| 8 | * under the terms of the GNU General Public License version 2 as published by |
| 9 | * the Free Software Foundation. |
| 10 | * |
| 11 | * This program is distributed in the hope that it will be useful, but WITHOUT |
| 12 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or |
| 13 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for |
| 14 | * more details. |
| 15 | * |
| 16 | * You should have received a copy of the GNU General Public License along with |
| 17 | * this program. If not, see <http://www.gnu.org/licenses/>. |
| 18 | */ |
| 19 | |
Laurent Pinchart | cef77d4 | 2015-03-05 21:50:00 +0200 | [diff] [blame] | 20 | #include <drm/drm_atomic_helper.h> |
Laurent Pinchart | 2d278f5 | 2015-03-05 21:31:37 +0200 | [diff] [blame] | 21 | #include <drm/drm_crtc_helper.h> |
| 22 | #include <drm/drm_fb_helper.h> |
Rob Clark | cd5351f | 2011-11-12 12:09:40 -0600 | [diff] [blame] | 23 | |
Andy Gross | 5c13779 | 2012-03-05 10:48:39 -0600 | [diff] [blame] | 24 | #include "omap_dmm_tiler.h" |
Laurent Pinchart | 2d278f5 | 2015-03-05 21:31:37 +0200 | [diff] [blame] | 25 | #include "omap_drv.h" |
Rob Clark | cd5351f | 2011-11-12 12:09:40 -0600 | [diff] [blame] | 26 | |
| 27 | #define DRIVER_NAME MODULE_NAME |
| 28 | #define DRIVER_DESC "OMAP DRM" |
| 29 | #define DRIVER_DATE "20110917" |
| 30 | #define DRIVER_MAJOR 1 |
| 31 | #define DRIVER_MINOR 0 |
| 32 | #define DRIVER_PATCHLEVEL 0 |
| 33 | |
Rob Clark | cd5351f | 2011-11-12 12:09:40 -0600 | [diff] [blame] | 34 | static int num_crtc = CONFIG_DRM_OMAP_NUM_CRTCS; |
| 35 | |
| 36 | MODULE_PARM_DESC(num_crtc, "Number of overlays to use as CRTCs"); |
| 37 | module_param(num_crtc, int, 0600); |
| 38 | |
| 39 | /* |
| 40 | * mode config funcs |
| 41 | */ |
| 42 | |
| 43 | /* Notes about mapping DSS and DRM entities: |
| 44 | * CRTC: overlay |
| 45 | * encoder: manager.. with some extension to allow one primary CRTC |
| 46 | * and zero or more video CRTC's to be mapped to one encoder? |
| 47 | * connector: dssdev.. manager can be attached/detached from different |
| 48 | * devices |
| 49 | */ |
| 50 | |
| 51 | static void omap_fb_output_poll_changed(struct drm_device *dev) |
| 52 | { |
| 53 | struct omap_drm_private *priv = dev->dev_private; |
| 54 | DBG("dev=%p", dev); |
YAMANE Toshiaki | c7f904b | 2012-11-14 19:30:38 +0900 | [diff] [blame] | 55 | if (priv->fbdev) |
Rob Clark | cd5351f | 2011-11-12 12:09:40 -0600 | [diff] [blame] | 56 | drm_fb_helper_hotplug_event(priv->fbdev); |
Rob Clark | cd5351f | 2011-11-12 12:09:40 -0600 | [diff] [blame] | 57 | } |
| 58 | |
Laurent Pinchart | e6ecefa | 2012-05-17 13:27:23 +0200 | [diff] [blame] | 59 | static const struct drm_mode_config_funcs omap_mode_config_funcs = { |
Rob Clark | cd5351f | 2011-11-12 12:09:40 -0600 | [diff] [blame] | 60 | .fb_create = omap_framebuffer_create, |
| 61 | .output_poll_changed = omap_fb_output_poll_changed, |
Laurent Pinchart | cef77d4 | 2015-03-05 21:50:00 +0200 | [diff] [blame] | 62 | .atomic_check = drm_atomic_helper_check, |
| 63 | .atomic_commit = drm_atomic_helper_commit, |
Rob Clark | cd5351f | 2011-11-12 12:09:40 -0600 | [diff] [blame] | 64 | }; |
| 65 | |
| 66 | static int get_connector_type(struct omap_dss_device *dssdev) |
| 67 | { |
| 68 | switch (dssdev->type) { |
| 69 | case OMAP_DISPLAY_TYPE_HDMI: |
| 70 | return DRM_MODE_CONNECTOR_HDMIA; |
Tomi Valkeinen | 4635c17 | 2013-05-14 14:14:15 +0300 | [diff] [blame] | 71 | case OMAP_DISPLAY_TYPE_DVI: |
| 72 | return DRM_MODE_CONNECTOR_DVID; |
Rob Clark | cd5351f | 2011-11-12 12:09:40 -0600 | [diff] [blame] | 73 | default: |
| 74 | return DRM_MODE_CONNECTOR_Unknown; |
| 75 | } |
| 76 | } |
| 77 | |
Archit Taneja | 0d8f371 | 2013-03-26 19:15:19 +0530 | [diff] [blame] | 78 | static bool channel_used(struct drm_device *dev, enum omap_channel channel) |
| 79 | { |
| 80 | struct omap_drm_private *priv = dev->dev_private; |
| 81 | int i; |
| 82 | |
| 83 | for (i = 0; i < priv->num_crtcs; i++) { |
| 84 | struct drm_crtc *crtc = priv->crtcs[i]; |
| 85 | |
| 86 | if (omap_crtc_channel(crtc) == channel) |
| 87 | return true; |
| 88 | } |
| 89 | |
| 90 | return false; |
| 91 | } |
Archit Taneja | cc823bd | 2014-01-02 14:49:52 +0530 | [diff] [blame] | 92 | static void omap_disconnect_dssdevs(void) |
| 93 | { |
| 94 | struct omap_dss_device *dssdev = NULL; |
| 95 | |
| 96 | for_each_dss_dev(dssdev) |
| 97 | dssdev->driver->disconnect(dssdev); |
| 98 | } |
Archit Taneja | 0d8f371 | 2013-03-26 19:15:19 +0530 | [diff] [blame] | 99 | |
Archit Taneja | 3a01ab2 | 2014-01-02 14:49:51 +0530 | [diff] [blame] | 100 | static int omap_connect_dssdevs(void) |
| 101 | { |
| 102 | int r; |
| 103 | struct omap_dss_device *dssdev = NULL; |
| 104 | bool no_displays = true; |
| 105 | |
| 106 | for_each_dss_dev(dssdev) { |
| 107 | r = dssdev->driver->connect(dssdev); |
| 108 | if (r == -EPROBE_DEFER) { |
| 109 | omap_dss_put_device(dssdev); |
| 110 | goto cleanup; |
| 111 | } else if (r) { |
| 112 | dev_warn(dssdev->dev, "could not connect display: %s\n", |
| 113 | dssdev->name); |
| 114 | } else { |
| 115 | no_displays = false; |
| 116 | } |
| 117 | } |
| 118 | |
| 119 | if (no_displays) |
| 120 | return -EPROBE_DEFER; |
| 121 | |
| 122 | return 0; |
| 123 | |
| 124 | cleanup: |
| 125 | /* |
| 126 | * if we are deferring probe, we disconnect the devices we previously |
| 127 | * connected |
| 128 | */ |
Archit Taneja | cc823bd | 2014-01-02 14:49:52 +0530 | [diff] [blame] | 129 | omap_disconnect_dssdevs(); |
Archit Taneja | 3a01ab2 | 2014-01-02 14:49:51 +0530 | [diff] [blame] | 130 | |
| 131 | return r; |
| 132 | } |
Rob Clark | cd5351f | 2011-11-12 12:09:40 -0600 | [diff] [blame] | 133 | |
Laurent Pinchart | fb9a35f | 2015-01-11 16:30:44 +0200 | [diff] [blame] | 134 | static int omap_modeset_create_crtc(struct drm_device *dev, int id, |
| 135 | enum omap_channel channel) |
| 136 | { |
| 137 | struct omap_drm_private *priv = dev->dev_private; |
| 138 | struct drm_plane *plane; |
| 139 | struct drm_crtc *crtc; |
| 140 | |
Laurent Pinchart | ef6b0e0 | 2015-01-11 00:11:18 +0200 | [diff] [blame] | 141 | plane = omap_plane_init(dev, id, DRM_PLANE_TYPE_PRIMARY); |
Laurent Pinchart | fb9a35f | 2015-01-11 16:30:44 +0200 | [diff] [blame] | 142 | if (IS_ERR(plane)) |
| 143 | return PTR_ERR(plane); |
| 144 | |
| 145 | crtc = omap_crtc_init(dev, plane, channel, id); |
| 146 | |
| 147 | BUG_ON(priv->num_crtcs >= ARRAY_SIZE(priv->crtcs)); |
| 148 | priv->crtcs[id] = crtc; |
| 149 | priv->num_crtcs++; |
| 150 | |
| 151 | priv->planes[id] = plane; |
| 152 | priv->num_planes++; |
| 153 | |
| 154 | return 0; |
| 155 | } |
| 156 | |
Laurent Pinchart | e2cd09b | 2015-03-06 17:16:43 +0200 | [diff] [blame] | 157 | static int omap_modeset_init_properties(struct drm_device *dev) |
| 158 | { |
| 159 | struct omap_drm_private *priv = dev->dev_private; |
| 160 | |
| 161 | if (priv->has_dmm) { |
| 162 | dev->mode_config.rotation_property = |
| 163 | drm_mode_create_rotation_property(dev, |
| 164 | BIT(DRM_ROTATE_0) | BIT(DRM_ROTATE_90) | |
| 165 | BIT(DRM_ROTATE_180) | BIT(DRM_ROTATE_270) | |
| 166 | BIT(DRM_REFLECT_X) | BIT(DRM_REFLECT_Y)); |
| 167 | if (!dev->mode_config.rotation_property) |
| 168 | return -ENOMEM; |
| 169 | } |
| 170 | |
| 171 | priv->zorder_prop = drm_property_create_range(dev, 0, "zorder", 0, 3); |
| 172 | if (!priv->zorder_prop) |
| 173 | return -ENOMEM; |
| 174 | |
| 175 | return 0; |
| 176 | } |
| 177 | |
Rob Clark | cd5351f | 2011-11-12 12:09:40 -0600 | [diff] [blame] | 178 | static int omap_modeset_init(struct drm_device *dev) |
| 179 | { |
Rob Clark | cd5351f | 2011-11-12 12:09:40 -0600 | [diff] [blame] | 180 | struct omap_drm_private *priv = dev->dev_private; |
| 181 | struct omap_dss_device *dssdev = NULL; |
Rob Clark | f5f9454 | 2012-12-04 13:59:12 -0600 | [diff] [blame] | 182 | int num_ovls = dss_feat_get_num_ovls(); |
Archit Taneja | 0d8f371 | 2013-03-26 19:15:19 +0530 | [diff] [blame] | 183 | int num_mgrs = dss_feat_get_num_mgrs(); |
| 184 | int num_crtcs; |
| 185 | int i, id = 0; |
Laurent Pinchart | fb9a35f | 2015-01-11 16:30:44 +0200 | [diff] [blame] | 186 | int ret; |
Tomi Valkeinen | 04b1fc0 | 2013-05-14 10:55:19 +0300 | [diff] [blame] | 187 | |
Rob Clark | cd5351f | 2011-11-12 12:09:40 -0600 | [diff] [blame] | 188 | drm_mode_config_init(dev); |
| 189 | |
Rob Clark | f5f9454 | 2012-12-04 13:59:12 -0600 | [diff] [blame] | 190 | omap_drm_irq_install(dev); |
Andy Gross | 71e8831 | 2011-12-05 19:19:21 -0600 | [diff] [blame] | 191 | |
Laurent Pinchart | e2cd09b | 2015-03-06 17:16:43 +0200 | [diff] [blame] | 192 | ret = omap_modeset_init_properties(dev); |
| 193 | if (ret < 0) |
| 194 | return ret; |
| 195 | |
Rob Clark | f5f9454 | 2012-12-04 13:59:12 -0600 | [diff] [blame] | 196 | /* |
Archit Taneja | 0d8f371 | 2013-03-26 19:15:19 +0530 | [diff] [blame] | 197 | * We usually don't want to create a CRTC for each manager, at least |
| 198 | * not until we have a way to expose private planes to userspace. |
| 199 | * Otherwise there would not be enough video pipes left for drm planes. |
| 200 | * We use the num_crtc argument to limit the number of crtcs we create. |
Rob Clark | f5f9454 | 2012-12-04 13:59:12 -0600 | [diff] [blame] | 201 | */ |
Archit Taneja | 0d8f371 | 2013-03-26 19:15:19 +0530 | [diff] [blame] | 202 | num_crtcs = min3(num_crtc, num_mgrs, num_ovls); |
Rob Clark | cd5351f | 2011-11-12 12:09:40 -0600 | [diff] [blame] | 203 | |
Archit Taneja | 0d8f371 | 2013-03-26 19:15:19 +0530 | [diff] [blame] | 204 | dssdev = NULL; |
Rob Clark | cd5351f | 2011-11-12 12:09:40 -0600 | [diff] [blame] | 205 | |
Rob Clark | f5f9454 | 2012-12-04 13:59:12 -0600 | [diff] [blame] | 206 | for_each_dss_dev(dssdev) { |
| 207 | struct drm_connector *connector; |
| 208 | struct drm_encoder *encoder; |
Archit Taneja | 0d8f371 | 2013-03-26 19:15:19 +0530 | [diff] [blame] | 209 | enum omap_channel channel; |
Tomi Valkeinen | a7e71e7 | 2013-05-08 16:23:32 +0300 | [diff] [blame] | 210 | struct omap_overlay_manager *mgr; |
Rob Clark | f5f9454 | 2012-12-04 13:59:12 -0600 | [diff] [blame] | 211 | |
Archit Taneja | 3a01ab2 | 2014-01-02 14:49:51 +0530 | [diff] [blame] | 212 | if (!omapdss_device_is_connected(dssdev)) |
Archit Taneja | 581382e | 2013-03-26 19:15:18 +0530 | [diff] [blame] | 213 | continue; |
Tomi Valkeinen | a7e71e7 | 2013-05-08 16:23:32 +0300 | [diff] [blame] | 214 | |
Rob Clark | f5f9454 | 2012-12-04 13:59:12 -0600 | [diff] [blame] | 215 | encoder = omap_encoder_init(dev, dssdev); |
| 216 | |
| 217 | if (!encoder) { |
| 218 | dev_err(dev->dev, "could not create encoder: %s\n", |
| 219 | dssdev->name); |
| 220 | return -ENOMEM; |
| 221 | } |
| 222 | |
| 223 | connector = omap_connector_init(dev, |
| 224 | get_connector_type(dssdev), dssdev, encoder); |
| 225 | |
| 226 | if (!connector) { |
| 227 | dev_err(dev->dev, "could not create connector: %s\n", |
| 228 | dssdev->name); |
| 229 | return -ENOMEM; |
| 230 | } |
| 231 | |
| 232 | BUG_ON(priv->num_encoders >= ARRAY_SIZE(priv->encoders)); |
| 233 | BUG_ON(priv->num_connectors >= ARRAY_SIZE(priv->connectors)); |
| 234 | |
| 235 | priv->encoders[priv->num_encoders++] = encoder; |
| 236 | priv->connectors[priv->num_connectors++] = connector; |
| 237 | |
| 238 | drm_mode_connector_attach_encoder(connector, encoder); |
| 239 | |
Archit Taneja | 0d8f371 | 2013-03-26 19:15:19 +0530 | [diff] [blame] | 240 | /* |
| 241 | * if we have reached the limit of the crtcs we are allowed to |
| 242 | * create, let's not try to look for a crtc for this |
| 243 | * panel/encoder and onwards, we will, of course, populate the |
| 244 | * the possible_crtcs field for all the encoders with the final |
| 245 | * set of crtcs we create |
| 246 | */ |
| 247 | if (id == num_crtcs) |
| 248 | continue; |
| 249 | |
| 250 | /* |
| 251 | * get the recommended DISPC channel for this encoder. For now, |
| 252 | * we only try to get create a crtc out of the recommended, the |
| 253 | * other possible channels to which the encoder can connect are |
| 254 | * not considered. |
| 255 | */ |
Archit Taneja | 0d8f371 | 2013-03-26 19:15:19 +0530 | [diff] [blame] | 256 | |
Tomi Valkeinen | a7e71e7 | 2013-05-08 16:23:32 +0300 | [diff] [blame] | 257 | mgr = omapdss_find_mgr_from_display(dssdev); |
| 258 | channel = mgr->id; |
Archit Taneja | 0d8f371 | 2013-03-26 19:15:19 +0530 | [diff] [blame] | 259 | /* |
| 260 | * if this channel hasn't already been taken by a previously |
| 261 | * allocated crtc, we create a new crtc for it |
| 262 | */ |
| 263 | if (!channel_used(dev, channel)) { |
Laurent Pinchart | fb9a35f | 2015-01-11 16:30:44 +0200 | [diff] [blame] | 264 | ret = omap_modeset_create_crtc(dev, id, channel); |
| 265 | if (ret < 0) { |
| 266 | dev_err(dev->dev, |
| 267 | "could not create CRTC (channel %u)\n", |
| 268 | channel); |
| 269 | return ret; |
| 270 | } |
Archit Taneja | 0d8f371 | 2013-03-26 19:15:19 +0530 | [diff] [blame] | 271 | |
| 272 | id++; |
| 273 | } |
| 274 | } |
| 275 | |
| 276 | /* |
| 277 | * we have allocated crtcs according to the need of the panels/encoders, |
| 278 | * adding more crtcs here if needed |
| 279 | */ |
| 280 | for (; id < num_crtcs; id++) { |
| 281 | |
| 282 | /* find a free manager for this crtc */ |
| 283 | for (i = 0; i < num_mgrs; i++) { |
Laurent Pinchart | fb9a35f | 2015-01-11 16:30:44 +0200 | [diff] [blame] | 284 | if (!channel_used(dev, i)) |
Archit Taneja | 0d8f371 | 2013-03-26 19:15:19 +0530 | [diff] [blame] | 285 | break; |
Archit Taneja | 0d8f371 | 2013-03-26 19:15:19 +0530 | [diff] [blame] | 286 | } |
| 287 | |
| 288 | if (i == num_mgrs) { |
| 289 | /* this shouldn't really happen */ |
| 290 | dev_err(dev->dev, "no managers left for crtc\n"); |
| 291 | return -ENOMEM; |
| 292 | } |
Laurent Pinchart | fb9a35f | 2015-01-11 16:30:44 +0200 | [diff] [blame] | 293 | |
| 294 | ret = omap_modeset_create_crtc(dev, id, i); |
| 295 | if (ret < 0) { |
| 296 | dev_err(dev->dev, |
| 297 | "could not create CRTC (channel %u)\n", i); |
| 298 | return ret; |
| 299 | } |
Archit Taneja | 0d8f371 | 2013-03-26 19:15:19 +0530 | [diff] [blame] | 300 | } |
| 301 | |
| 302 | /* |
| 303 | * Create normal planes for the remaining overlays: |
| 304 | */ |
| 305 | for (; id < num_ovls; id++) { |
Laurent Pinchart | fb9a35f | 2015-01-11 16:30:44 +0200 | [diff] [blame] | 306 | struct drm_plane *plane; |
| 307 | |
Laurent Pinchart | ef6b0e0 | 2015-01-11 00:11:18 +0200 | [diff] [blame] | 308 | plane = omap_plane_init(dev, id, DRM_PLANE_TYPE_OVERLAY); |
Laurent Pinchart | fb9a35f | 2015-01-11 16:30:44 +0200 | [diff] [blame] | 309 | if (IS_ERR(plane)) |
| 310 | return PTR_ERR(plane); |
Archit Taneja | 0d8f371 | 2013-03-26 19:15:19 +0530 | [diff] [blame] | 311 | |
| 312 | BUG_ON(priv->num_planes >= ARRAY_SIZE(priv->planes)); |
| 313 | priv->planes[priv->num_planes++] = plane; |
| 314 | } |
| 315 | |
| 316 | for (i = 0; i < priv->num_encoders; i++) { |
| 317 | struct drm_encoder *encoder = priv->encoders[i]; |
| 318 | struct omap_dss_device *dssdev = |
| 319 | omap_encoder_get_dssdev(encoder); |
Tomi Valkeinen | 1f68d9c | 2013-04-19 15:09:34 +0300 | [diff] [blame] | 320 | struct omap_dss_device *output; |
Tomi Valkeinen | be8e8e1 | 2013-04-23 15:35:35 +0300 | [diff] [blame] | 321 | |
| 322 | output = omapdss_find_output_from_display(dssdev); |
Archit Taneja | 0d8f371 | 2013-03-26 19:15:19 +0530 | [diff] [blame] | 323 | |
Rob Clark | f5f9454 | 2012-12-04 13:59:12 -0600 | [diff] [blame] | 324 | /* figure out which crtc's we can connect the encoder to: */ |
| 325 | encoder->possible_crtcs = 0; |
| 326 | for (id = 0; id < priv->num_crtcs; id++) { |
Archit Taneja | 0d8f371 | 2013-03-26 19:15:19 +0530 | [diff] [blame] | 327 | struct drm_crtc *crtc = priv->crtcs[id]; |
| 328 | enum omap_channel crtc_channel; |
Archit Taneja | 0d8f371 | 2013-03-26 19:15:19 +0530 | [diff] [blame] | 329 | |
| 330 | crtc_channel = omap_crtc_channel(crtc); |
Archit Taneja | 0d8f371 | 2013-03-26 19:15:19 +0530 | [diff] [blame] | 331 | |
Tomi Valkeinen | 1733729 | 2014-09-03 19:25:49 +0000 | [diff] [blame] | 332 | if (output->dispc_channel == crtc_channel) { |
Rob Clark | f5f9454 | 2012-12-04 13:59:12 -0600 | [diff] [blame] | 333 | encoder->possible_crtcs |= (1 << id); |
Tomi Valkeinen | 1733729 | 2014-09-03 19:25:49 +0000 | [diff] [blame] | 334 | break; |
| 335 | } |
Rob Clark | f5f9454 | 2012-12-04 13:59:12 -0600 | [diff] [blame] | 336 | } |
Tomi Valkeinen | 820caab | 2013-04-25 14:53:18 +0300 | [diff] [blame] | 337 | |
| 338 | omap_dss_put_device(output); |
Rob Clark | f5f9454 | 2012-12-04 13:59:12 -0600 | [diff] [blame] | 339 | } |
Rob Clark | cd5351f | 2011-11-12 12:09:40 -0600 | [diff] [blame] | 340 | |
Archit Taneja | 0d8f371 | 2013-03-26 19:15:19 +0530 | [diff] [blame] | 341 | DBG("registered %d planes, %d crtcs, %d encoders and %d connectors\n", |
| 342 | priv->num_planes, priv->num_crtcs, priv->num_encoders, |
| 343 | priv->num_connectors); |
| 344 | |
Rob Clark | 6b8ca4c | 2012-01-08 19:37:37 -0600 | [diff] [blame] | 345 | dev->mode_config.min_width = 32; |
| 346 | dev->mode_config.min_height = 32; |
Rob Clark | cd5351f | 2011-11-12 12:09:40 -0600 | [diff] [blame] | 347 | |
| 348 | /* note: eventually will need some cpu_is_omapXYZ() type stuff here |
| 349 | * to fill in these limits properly on different OMAP generations.. |
| 350 | */ |
| 351 | dev->mode_config.max_width = 2048; |
| 352 | dev->mode_config.max_height = 2048; |
| 353 | |
| 354 | dev->mode_config.funcs = &omap_mode_config_funcs; |
| 355 | |
Laurent Pinchart | 69a1226 | 2015-03-05 21:38:16 +0200 | [diff] [blame] | 356 | drm_mode_config_reset(dev); |
| 357 | |
Rob Clark | cd5351f | 2011-11-12 12:09:40 -0600 | [diff] [blame] | 358 | return 0; |
| 359 | } |
| 360 | |
| 361 | static void omap_modeset_free(struct drm_device *dev) |
| 362 | { |
| 363 | drm_mode_config_cleanup(dev); |
| 364 | } |
| 365 | |
| 366 | /* |
| 367 | * drm ioctl funcs |
| 368 | */ |
| 369 | |
| 370 | |
| 371 | static int ioctl_get_param(struct drm_device *dev, void *data, |
| 372 | struct drm_file *file_priv) |
| 373 | { |
Rob Clark | 5e3b087 | 2012-10-29 09:31:12 +0100 | [diff] [blame] | 374 | struct omap_drm_private *priv = dev->dev_private; |
Rob Clark | cd5351f | 2011-11-12 12:09:40 -0600 | [diff] [blame] | 375 | struct drm_omap_param *args = data; |
| 376 | |
| 377 | DBG("%p: param=%llu", dev, args->param); |
| 378 | |
| 379 | switch (args->param) { |
| 380 | case OMAP_PARAM_CHIPSET_ID: |
Rob Clark | 5e3b087 | 2012-10-29 09:31:12 +0100 | [diff] [blame] | 381 | args->value = priv->omaprev; |
Rob Clark | cd5351f | 2011-11-12 12:09:40 -0600 | [diff] [blame] | 382 | break; |
| 383 | default: |
| 384 | DBG("unknown parameter %lld", args->param); |
| 385 | return -EINVAL; |
| 386 | } |
| 387 | |
| 388 | return 0; |
| 389 | } |
| 390 | |
| 391 | static int ioctl_set_param(struct drm_device *dev, void *data, |
| 392 | struct drm_file *file_priv) |
| 393 | { |
| 394 | struct drm_omap_param *args = data; |
| 395 | |
| 396 | switch (args->param) { |
| 397 | default: |
| 398 | DBG("unknown parameter %lld", args->param); |
| 399 | return -EINVAL; |
| 400 | } |
| 401 | |
| 402 | return 0; |
| 403 | } |
| 404 | |
| 405 | static int ioctl_gem_new(struct drm_device *dev, void *data, |
| 406 | struct drm_file *file_priv) |
| 407 | { |
| 408 | struct drm_omap_gem_new *args = data; |
Rob Clark | f5f9454 | 2012-12-04 13:59:12 -0600 | [diff] [blame] | 409 | VERB("%p:%p: size=0x%08x, flags=%08x", dev, file_priv, |
Rob Clark | cd5351f | 2011-11-12 12:09:40 -0600 | [diff] [blame] | 410 | args->size.bytes, args->flags); |
| 411 | return omap_gem_new_handle(dev, file_priv, args->size, |
| 412 | args->flags, &args->handle); |
| 413 | } |
| 414 | |
| 415 | static int ioctl_gem_cpu_prep(struct drm_device *dev, void *data, |
| 416 | struct drm_file *file_priv) |
| 417 | { |
| 418 | struct drm_omap_gem_cpu_prep *args = data; |
| 419 | struct drm_gem_object *obj; |
| 420 | int ret; |
| 421 | |
| 422 | VERB("%p:%p: handle=%d, op=%x", dev, file_priv, args->handle, args->op); |
| 423 | |
| 424 | obj = drm_gem_object_lookup(dev, file_priv, args->handle); |
YAMANE Toshiaki | c7f904b | 2012-11-14 19:30:38 +0900 | [diff] [blame] | 425 | if (!obj) |
Rob Clark | cd5351f | 2011-11-12 12:09:40 -0600 | [diff] [blame] | 426 | return -ENOENT; |
Rob Clark | cd5351f | 2011-11-12 12:09:40 -0600 | [diff] [blame] | 427 | |
| 428 | ret = omap_gem_op_sync(obj, args->op); |
| 429 | |
YAMANE Toshiaki | c7f904b | 2012-11-14 19:30:38 +0900 | [diff] [blame] | 430 | if (!ret) |
Rob Clark | cd5351f | 2011-11-12 12:09:40 -0600 | [diff] [blame] | 431 | ret = omap_gem_op_start(obj, args->op); |
Rob Clark | cd5351f | 2011-11-12 12:09:40 -0600 | [diff] [blame] | 432 | |
| 433 | drm_gem_object_unreference_unlocked(obj); |
| 434 | |
| 435 | return ret; |
| 436 | } |
| 437 | |
| 438 | static int ioctl_gem_cpu_fini(struct drm_device *dev, void *data, |
| 439 | struct drm_file *file_priv) |
| 440 | { |
| 441 | struct drm_omap_gem_cpu_fini *args = data; |
| 442 | struct drm_gem_object *obj; |
| 443 | int ret; |
| 444 | |
| 445 | VERB("%p:%p: handle=%d", dev, file_priv, args->handle); |
| 446 | |
| 447 | obj = drm_gem_object_lookup(dev, file_priv, args->handle); |
YAMANE Toshiaki | c7f904b | 2012-11-14 19:30:38 +0900 | [diff] [blame] | 448 | if (!obj) |
Rob Clark | cd5351f | 2011-11-12 12:09:40 -0600 | [diff] [blame] | 449 | return -ENOENT; |
Rob Clark | cd5351f | 2011-11-12 12:09:40 -0600 | [diff] [blame] | 450 | |
| 451 | /* XXX flushy, flushy */ |
| 452 | ret = 0; |
| 453 | |
YAMANE Toshiaki | c7f904b | 2012-11-14 19:30:38 +0900 | [diff] [blame] | 454 | if (!ret) |
Rob Clark | cd5351f | 2011-11-12 12:09:40 -0600 | [diff] [blame] | 455 | ret = omap_gem_op_finish(obj, args->op); |
Rob Clark | cd5351f | 2011-11-12 12:09:40 -0600 | [diff] [blame] | 456 | |
| 457 | drm_gem_object_unreference_unlocked(obj); |
| 458 | |
| 459 | return ret; |
| 460 | } |
| 461 | |
| 462 | static int ioctl_gem_info(struct drm_device *dev, void *data, |
| 463 | struct drm_file *file_priv) |
| 464 | { |
| 465 | struct drm_omap_gem_info *args = data; |
| 466 | struct drm_gem_object *obj; |
| 467 | int ret = 0; |
| 468 | |
Rob Clark | f5f9454 | 2012-12-04 13:59:12 -0600 | [diff] [blame] | 469 | VERB("%p:%p: handle=%d", dev, file_priv, args->handle); |
Rob Clark | cd5351f | 2011-11-12 12:09:40 -0600 | [diff] [blame] | 470 | |
| 471 | obj = drm_gem_object_lookup(dev, file_priv, args->handle); |
YAMANE Toshiaki | c7f904b | 2012-11-14 19:30:38 +0900 | [diff] [blame] | 472 | if (!obj) |
Rob Clark | cd5351f | 2011-11-12 12:09:40 -0600 | [diff] [blame] | 473 | return -ENOENT; |
Rob Clark | cd5351f | 2011-11-12 12:09:40 -0600 | [diff] [blame] | 474 | |
Rob Clark | f7f9f45 | 2011-12-05 19:19:22 -0600 | [diff] [blame] | 475 | args->size = omap_gem_mmap_size(obj); |
Rob Clark | cd5351f | 2011-11-12 12:09:40 -0600 | [diff] [blame] | 476 | args->offset = omap_gem_mmap_offset(obj); |
| 477 | |
| 478 | drm_gem_object_unreference_unlocked(obj); |
| 479 | |
| 480 | return ret; |
| 481 | } |
| 482 | |
Rob Clark | baa7094 | 2013-08-02 13:27:49 -0400 | [diff] [blame] | 483 | static const struct drm_ioctl_desc ioctls[DRM_COMMAND_END - DRM_COMMAND_BASE] = { |
Rob Clark | cd5351f | 2011-11-12 12:09:40 -0600 | [diff] [blame] | 484 | DRM_IOCTL_DEF_DRV(OMAP_GET_PARAM, ioctl_get_param, DRM_UNLOCKED|DRM_AUTH), |
| 485 | DRM_IOCTL_DEF_DRV(OMAP_SET_PARAM, ioctl_set_param, DRM_UNLOCKED|DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY), |
| 486 | DRM_IOCTL_DEF_DRV(OMAP_GEM_NEW, ioctl_gem_new, DRM_UNLOCKED|DRM_AUTH), |
| 487 | DRM_IOCTL_DEF_DRV(OMAP_GEM_CPU_PREP, ioctl_gem_cpu_prep, DRM_UNLOCKED|DRM_AUTH), |
| 488 | DRM_IOCTL_DEF_DRV(OMAP_GEM_CPU_FINI, ioctl_gem_cpu_fini, DRM_UNLOCKED|DRM_AUTH), |
| 489 | DRM_IOCTL_DEF_DRV(OMAP_GEM_INFO, ioctl_gem_info, DRM_UNLOCKED|DRM_AUTH), |
| 490 | }; |
| 491 | |
| 492 | /* |
| 493 | * drm driver funcs |
| 494 | */ |
| 495 | |
| 496 | /** |
| 497 | * load - setup chip and create an initial config |
| 498 | * @dev: DRM device |
| 499 | * @flags: startup flags |
| 500 | * |
| 501 | * The driver load routine has to do several things: |
| 502 | * - initialize the memory manager |
| 503 | * - allocate initial config memory |
| 504 | * - setup the DRM framebuffer with the allocated memory |
| 505 | */ |
| 506 | static int dev_load(struct drm_device *dev, unsigned long flags) |
| 507 | { |
Rob Clark | 5e3b087 | 2012-10-29 09:31:12 +0100 | [diff] [blame] | 508 | struct omap_drm_platform_data *pdata = dev->dev->platform_data; |
Rob Clark | cd5351f | 2011-11-12 12:09:40 -0600 | [diff] [blame] | 509 | struct omap_drm_private *priv; |
Laurent Pinchart | c397cfd | 2015-01-25 22:42:30 +0200 | [diff] [blame] | 510 | unsigned int i; |
Rob Clark | cd5351f | 2011-11-12 12:09:40 -0600 | [diff] [blame] | 511 | int ret; |
| 512 | |
| 513 | DBG("load: dev=%p", dev); |
| 514 | |
Rob Clark | cd5351f | 2011-11-12 12:09:40 -0600 | [diff] [blame] | 515 | priv = kzalloc(sizeof(*priv), GFP_KERNEL); |
Joe Perches | 78110bb | 2013-02-11 09:41:29 -0800 | [diff] [blame] | 516 | if (!priv) |
Rob Clark | cd5351f | 2011-11-12 12:09:40 -0600 | [diff] [blame] | 517 | return -ENOMEM; |
Rob Clark | cd5351f | 2011-11-12 12:09:40 -0600 | [diff] [blame] | 518 | |
Rob Clark | 5e3b087 | 2012-10-29 09:31:12 +0100 | [diff] [blame] | 519 | priv->omaprev = pdata->omaprev; |
| 520 | |
Rob Clark | cd5351f | 2011-11-12 12:09:40 -0600 | [diff] [blame] | 521 | dev->dev_private = priv; |
| 522 | |
Tejun Heo | 4619cdb | 2012-08-22 16:49:44 -0700 | [diff] [blame] | 523 | priv->wq = alloc_ordered_workqueue("omapdrm", 0); |
Rob Clark | 5609f7f | 2012-03-05 10:48:32 -0600 | [diff] [blame] | 524 | |
Tomi Valkeinen | 76c4055 | 2014-12-17 14:34:22 +0200 | [diff] [blame] | 525 | spin_lock_init(&priv->list_lock); |
Rob Clark | f6b6036 | 2012-03-05 10:48:36 -0600 | [diff] [blame] | 526 | INIT_LIST_HEAD(&priv->obj_list); |
| 527 | |
Rob Clark | f7f9f45 | 2011-12-05 19:19:22 -0600 | [diff] [blame] | 528 | omap_gem_init(dev); |
| 529 | |
Rob Clark | cd5351f | 2011-11-12 12:09:40 -0600 | [diff] [blame] | 530 | ret = omap_modeset_init(dev); |
| 531 | if (ret) { |
| 532 | dev_err(dev->dev, "omap_modeset_init failed: ret=%d\n", ret); |
| 533 | dev->dev_private = NULL; |
| 534 | kfree(priv); |
| 535 | return ret; |
| 536 | } |
| 537 | |
Laurent Pinchart | c397cfd | 2015-01-25 22:42:30 +0200 | [diff] [blame] | 538 | /* Initialize vblank handling, start with all CRTCs disabled. */ |
Rob Clark | f5f9454 | 2012-12-04 13:59:12 -0600 | [diff] [blame] | 539 | ret = drm_vblank_init(dev, priv->num_crtcs); |
| 540 | if (ret) |
| 541 | dev_warn(dev->dev, "could not init vblank\n"); |
| 542 | |
Laurent Pinchart | c397cfd | 2015-01-25 22:42:30 +0200 | [diff] [blame] | 543 | for (i = 0; i < priv->num_crtcs; i++) |
| 544 | drm_crtc_vblank_off(priv->crtcs[i]); |
| 545 | |
Rob Clark | cd5351f | 2011-11-12 12:09:40 -0600 | [diff] [blame] | 546 | priv->fbdev = omap_fbdev_init(dev); |
| 547 | if (!priv->fbdev) { |
| 548 | dev_warn(dev->dev, "omap_fbdev_init failed\n"); |
| 549 | /* well, limp along without an fbdev.. maybe X11 will work? */ |
| 550 | } |
| 551 | |
Andy Gross | e78edba | 2012-12-19 14:53:37 -0600 | [diff] [blame] | 552 | /* store off drm_device for use in pm ops */ |
| 553 | dev_set_drvdata(dev->dev, dev); |
| 554 | |
Rob Clark | cd5351f | 2011-11-12 12:09:40 -0600 | [diff] [blame] | 555 | drm_kms_helper_poll_init(dev); |
| 556 | |
Rob Clark | cd5351f | 2011-11-12 12:09:40 -0600 | [diff] [blame] | 557 | return 0; |
| 558 | } |
| 559 | |
| 560 | static int dev_unload(struct drm_device *dev) |
| 561 | { |
Rob Clark | 5609f7f | 2012-03-05 10:48:32 -0600 | [diff] [blame] | 562 | struct omap_drm_private *priv = dev->dev_private; |
| 563 | |
Rob Clark | cd5351f | 2011-11-12 12:09:40 -0600 | [diff] [blame] | 564 | DBG("unload: dev=%p", dev); |
| 565 | |
Rob Clark | cd5351f | 2011-11-12 12:09:40 -0600 | [diff] [blame] | 566 | drm_kms_helper_poll_fini(dev); |
| 567 | |
Tomi Valkeinen | c7c1aec | 2014-09-25 19:24:26 +0000 | [diff] [blame] | 568 | if (priv->fbdev) |
| 569 | omap_fbdev_free(dev); |
Tomi Valkeinen | e2f8fd7 | 2014-04-02 14:31:57 +0300 | [diff] [blame] | 570 | |
Rob Clark | cd5351f | 2011-11-12 12:09:40 -0600 | [diff] [blame] | 571 | omap_modeset_free(dev); |
Rob Clark | f7f9f45 | 2011-12-05 19:19:22 -0600 | [diff] [blame] | 572 | omap_gem_deinit(dev); |
Rob Clark | cd5351f | 2011-11-12 12:09:40 -0600 | [diff] [blame] | 573 | |
Rob Clark | 5609f7f | 2012-03-05 10:48:32 -0600 | [diff] [blame] | 574 | destroy_workqueue(priv->wq); |
| 575 | |
Archit Taneja | 80e4ed5 | 2014-01-02 14:49:54 +0530 | [diff] [blame] | 576 | drm_vblank_cleanup(dev); |
| 577 | omap_drm_irq_uninstall(dev); |
| 578 | |
Rob Clark | cd5351f | 2011-11-12 12:09:40 -0600 | [diff] [blame] | 579 | kfree(dev->dev_private); |
| 580 | dev->dev_private = NULL; |
| 581 | |
Andy Gross | e78edba | 2012-12-19 14:53:37 -0600 | [diff] [blame] | 582 | dev_set_drvdata(dev->dev, NULL); |
| 583 | |
Rob Clark | cd5351f | 2011-11-12 12:09:40 -0600 | [diff] [blame] | 584 | return 0; |
| 585 | } |
| 586 | |
| 587 | static int dev_open(struct drm_device *dev, struct drm_file *file) |
| 588 | { |
| 589 | file->driver_priv = NULL; |
| 590 | |
| 591 | DBG("open: dev=%p, file=%p", dev, file); |
| 592 | |
| 593 | return 0; |
| 594 | } |
| 595 | |
Rob Clark | cd5351f | 2011-11-12 12:09:40 -0600 | [diff] [blame] | 596 | /** |
| 597 | * lastclose - clean up after all DRM clients have exited |
| 598 | * @dev: DRM device |
| 599 | * |
| 600 | * Take care of cleaning up after all DRM clients have exited. In the |
| 601 | * mode setting case, we want to restore the kernel's initial mode (just |
| 602 | * in case the last client left us in a bad state). |
| 603 | */ |
| 604 | static void dev_lastclose(struct drm_device *dev) |
| 605 | { |
Rob Clark | 3c810c6 | 2012-08-15 15:18:01 -0500 | [diff] [blame] | 606 | int i; |
| 607 | |
Rob Clark | cd5351f | 2011-11-12 12:09:40 -0600 | [diff] [blame] | 608 | /* we don't support vga-switcheroo.. so just make sure the fbdev |
| 609 | * mode is active |
| 610 | */ |
| 611 | struct omap_drm_private *priv = dev->dev_private; |
| 612 | int ret; |
| 613 | |
| 614 | DBG("lastclose: dev=%p", dev); |
| 615 | |
Laurent Pinchart | e2cd09b | 2015-03-06 17:16:43 +0200 | [diff] [blame] | 616 | if (dev->mode_config.rotation_property) { |
Rob Clark | c2a6a55 | 2012-10-25 17:14:13 -0500 | [diff] [blame] | 617 | /* need to restore default rotation state.. not sure |
| 618 | * if there is a cleaner way to restore properties to |
| 619 | * default state? Maybe a flag that properties should |
| 620 | * automatically be restored to default state on |
| 621 | * lastclose? |
| 622 | */ |
| 623 | for (i = 0; i < priv->num_crtcs; i++) { |
| 624 | drm_object_property_set_value(&priv->crtcs[i]->base, |
Laurent Pinchart | e2cd09b | 2015-03-06 17:16:43 +0200 | [diff] [blame] | 625 | dev->mode_config.rotation_property, 0); |
Rob Clark | c2a6a55 | 2012-10-25 17:14:13 -0500 | [diff] [blame] | 626 | } |
Rob Clark | 3c810c6 | 2012-08-15 15:18:01 -0500 | [diff] [blame] | 627 | |
Rob Clark | c2a6a55 | 2012-10-25 17:14:13 -0500 | [diff] [blame] | 628 | for (i = 0; i < priv->num_planes; i++) { |
| 629 | drm_object_property_set_value(&priv->planes[i]->base, |
Laurent Pinchart | e2cd09b | 2015-03-06 17:16:43 +0200 | [diff] [blame] | 630 | dev->mode_config.rotation_property, 0); |
Rob Clark | c2a6a55 | 2012-10-25 17:14:13 -0500 | [diff] [blame] | 631 | } |
Rob Clark | 3c810c6 | 2012-08-15 15:18:01 -0500 | [diff] [blame] | 632 | } |
| 633 | |
Tomi Valkeinen | c7c1aec | 2014-09-25 19:24:26 +0000 | [diff] [blame] | 634 | if (priv->fbdev) { |
| 635 | ret = drm_fb_helper_restore_fbdev_mode_unlocked(priv->fbdev); |
| 636 | if (ret) |
| 637 | DBG("failed to restore crtc mode"); |
| 638 | } |
Rob Clark | cd5351f | 2011-11-12 12:09:40 -0600 | [diff] [blame] | 639 | } |
| 640 | |
| 641 | static void dev_preclose(struct drm_device *dev, struct drm_file *file) |
| 642 | { |
Laurent Pinchart | 1d5e5ea | 2015-01-18 16:57:36 +0200 | [diff] [blame] | 643 | struct omap_drm_private *priv = dev->dev_private; |
| 644 | unsigned int i; |
| 645 | |
Rob Clark | cd5351f | 2011-11-12 12:09:40 -0600 | [diff] [blame] | 646 | DBG("preclose: dev=%p", dev); |
Laurent Pinchart | 1d5e5ea | 2015-01-18 16:57:36 +0200 | [diff] [blame] | 647 | |
| 648 | for (i = 0; i < priv->num_crtcs; ++i) |
| 649 | omap_crtc_cancel_page_flip(priv->crtcs[i], file); |
Rob Clark | cd5351f | 2011-11-12 12:09:40 -0600 | [diff] [blame] | 650 | } |
| 651 | |
| 652 | static void dev_postclose(struct drm_device *dev, struct drm_file *file) |
| 653 | { |
| 654 | DBG("postclose: dev=%p, file=%p", dev, file); |
| 655 | } |
| 656 | |
Laurent Pinchart | 78b6855 | 2012-05-17 13:27:22 +0200 | [diff] [blame] | 657 | static const struct vm_operations_struct omap_gem_vm_ops = { |
Rob Clark | cd5351f | 2011-11-12 12:09:40 -0600 | [diff] [blame] | 658 | .fault = omap_gem_fault, |
| 659 | .open = drm_gem_vm_open, |
| 660 | .close = drm_gem_vm_close, |
| 661 | }; |
| 662 | |
Rob Clark | ff4f387 | 2012-01-16 12:51:14 -0600 | [diff] [blame] | 663 | static const struct file_operations omapdriver_fops = { |
Laurent Pinchart | 222025e | 2015-01-11 00:02:07 +0200 | [diff] [blame] | 664 | .owner = THIS_MODULE, |
| 665 | .open = drm_open, |
| 666 | .unlocked_ioctl = drm_ioctl, |
| 667 | .release = drm_release, |
| 668 | .mmap = omap_gem_mmap, |
| 669 | .poll = drm_poll, |
| 670 | .read = drm_read, |
| 671 | .llseek = noop_llseek, |
Rob Clark | ff4f387 | 2012-01-16 12:51:14 -0600 | [diff] [blame] | 672 | }; |
| 673 | |
Rob Clark | cd5351f | 2011-11-12 12:09:40 -0600 | [diff] [blame] | 674 | static struct drm_driver omap_drm_driver = { |
Laurent Pinchart | f13ab00 | 2015-01-25 22:06:45 +0200 | [diff] [blame] | 675 | .driver_features = DRIVER_MODESET | DRIVER_GEM | DRIVER_PRIME, |
Laurent Pinchart | 222025e | 2015-01-11 00:02:07 +0200 | [diff] [blame] | 676 | .load = dev_load, |
| 677 | .unload = dev_unload, |
| 678 | .open = dev_open, |
| 679 | .lastclose = dev_lastclose, |
| 680 | .preclose = dev_preclose, |
| 681 | .postclose = dev_postclose, |
| 682 | .set_busid = drm_platform_set_busid, |
| 683 | .get_vblank_counter = drm_vblank_count, |
| 684 | .enable_vblank = omap_irq_enable_vblank, |
| 685 | .disable_vblank = omap_irq_disable_vblank, |
Andy Gross | 6169a148 | 2011-12-15 21:05:17 -0600 | [diff] [blame] | 686 | #ifdef CONFIG_DEBUG_FS |
Laurent Pinchart | 222025e | 2015-01-11 00:02:07 +0200 | [diff] [blame] | 687 | .debugfs_init = omap_debugfs_init, |
| 688 | .debugfs_cleanup = omap_debugfs_cleanup, |
Andy Gross | 6169a148 | 2011-12-15 21:05:17 -0600 | [diff] [blame] | 689 | #endif |
Laurent Pinchart | 222025e | 2015-01-11 00:02:07 +0200 | [diff] [blame] | 690 | .prime_handle_to_fd = drm_gem_prime_handle_to_fd, |
| 691 | .prime_fd_to_handle = drm_gem_prime_fd_to_handle, |
| 692 | .gem_prime_export = omap_gem_prime_export, |
| 693 | .gem_prime_import = omap_gem_prime_import, |
| 694 | .gem_free_object = omap_gem_free_object, |
| 695 | .gem_vm_ops = &omap_gem_vm_ops, |
| 696 | .dumb_create = omap_gem_dumb_create, |
| 697 | .dumb_map_offset = omap_gem_dumb_map_offset, |
| 698 | .dumb_destroy = drm_gem_dumb_destroy, |
| 699 | .ioctls = ioctls, |
| 700 | .num_ioctls = DRM_OMAP_NUM_IOCTLS, |
| 701 | .fops = &omapdriver_fops, |
| 702 | .name = DRIVER_NAME, |
| 703 | .desc = DRIVER_DESC, |
| 704 | .date = DRIVER_DATE, |
| 705 | .major = DRIVER_MAJOR, |
| 706 | .minor = DRIVER_MINOR, |
| 707 | .patchlevel = DRIVER_PATCHLEVEL, |
Rob Clark | cd5351f | 2011-11-12 12:09:40 -0600 | [diff] [blame] | 708 | }; |
| 709 | |
Rob Clark | cd5351f | 2011-11-12 12:09:40 -0600 | [diff] [blame] | 710 | static int pdev_probe(struct platform_device *device) |
| 711 | { |
Archit Taneja | 3a01ab2 | 2014-01-02 14:49:51 +0530 | [diff] [blame] | 712 | int r; |
| 713 | |
Tomi Valkeinen | 591a0ac | 2013-05-23 12:07:50 +0300 | [diff] [blame] | 714 | if (omapdss_is_initialized() == false) |
| 715 | return -EPROBE_DEFER; |
| 716 | |
Archit Taneja | 3a01ab2 | 2014-01-02 14:49:51 +0530 | [diff] [blame] | 717 | omap_crtc_pre_init(); |
| 718 | |
| 719 | r = omap_connect_dssdevs(); |
| 720 | if (r) { |
| 721 | omap_crtc_pre_uninit(); |
| 722 | return r; |
| 723 | } |
| 724 | |
Rob Clark | cd5351f | 2011-11-12 12:09:40 -0600 | [diff] [blame] | 725 | DBG("%s", device->name); |
| 726 | return drm_platform_init(&omap_drm_driver, device); |
| 727 | } |
| 728 | |
| 729 | static int pdev_remove(struct platform_device *device) |
| 730 | { |
| 731 | DBG(""); |
Andy Gross | 5c13779 | 2012-03-05 10:48:39 -0600 | [diff] [blame] | 732 | |
Tomi Valkeinen | 707cf58 | 2014-04-02 13:47:43 +0300 | [diff] [blame] | 733 | drm_put_dev(platform_get_drvdata(device)); |
| 734 | |
Archit Taneja | cc823bd | 2014-01-02 14:49:52 +0530 | [diff] [blame] | 735 | omap_disconnect_dssdevs(); |
| 736 | omap_crtc_pre_uninit(); |
Daniel Vetter | fd3c025 | 2013-12-11 11:34:26 +0100 | [diff] [blame] | 737 | |
Rob Clark | cd5351f | 2011-11-12 12:09:40 -0600 | [diff] [blame] | 738 | return 0; |
| 739 | } |
| 740 | |
Grygorii Strashko | 8450c8d | 2015-02-26 15:57:17 +0200 | [diff] [blame] | 741 | #ifdef CONFIG_PM_SLEEP |
Tomi Valkeinen | ccd7b5e | 2014-11-14 15:18:28 +0200 | [diff] [blame] | 742 | static int omap_drm_suspend(struct device *dev) |
| 743 | { |
| 744 | struct drm_device *drm_dev = dev_get_drvdata(dev); |
| 745 | |
| 746 | drm_kms_helper_poll_disable(drm_dev); |
| 747 | |
| 748 | return 0; |
| 749 | } |
| 750 | |
| 751 | static int omap_drm_resume(struct device *dev) |
| 752 | { |
| 753 | struct drm_device *drm_dev = dev_get_drvdata(dev); |
| 754 | |
| 755 | drm_kms_helper_poll_enable(drm_dev); |
| 756 | |
| 757 | return omap_gem_resume(dev); |
| 758 | } |
Andy Gross | e78edba | 2012-12-19 14:53:37 -0600 | [diff] [blame] | 759 | #endif |
| 760 | |
Grygorii Strashko | 8450c8d | 2015-02-26 15:57:17 +0200 | [diff] [blame] | 761 | static SIMPLE_DEV_PM_OPS(omapdrm_pm_ops, omap_drm_suspend, omap_drm_resume); |
| 762 | |
Tomi Valkeinen | 6717cd2 | 2013-04-10 10:44:00 +0300 | [diff] [blame] | 763 | static struct platform_driver pdev = { |
Laurent Pinchart | 222025e | 2015-01-11 00:02:07 +0200 | [diff] [blame] | 764 | .driver = { |
| 765 | .name = DRIVER_NAME, |
Laurent Pinchart | 222025e | 2015-01-11 00:02:07 +0200 | [diff] [blame] | 766 | .pm = &omapdrm_pm_ops, |
Laurent Pinchart | 222025e | 2015-01-11 00:02:07 +0200 | [diff] [blame] | 767 | }, |
| 768 | .probe = pdev_probe, |
| 769 | .remove = pdev_remove, |
Rob Clark | cd5351f | 2011-11-12 12:09:40 -0600 | [diff] [blame] | 770 | }; |
| 771 | |
| 772 | static int __init omap_drm_init(void) |
| 773 | { |
Tomi Valkeinen | ea7e3a6 | 2014-04-02 14:31:50 +0300 | [diff] [blame] | 774 | int r; |
| 775 | |
Rob Clark | cd5351f | 2011-11-12 12:09:40 -0600 | [diff] [blame] | 776 | DBG("init"); |
Tomi Valkeinen | ea7e3a6 | 2014-04-02 14:31:50 +0300 | [diff] [blame] | 777 | |
| 778 | r = platform_driver_register(&omap_dmm_driver); |
| 779 | if (r) { |
| 780 | pr_err("DMM driver registration failed\n"); |
| 781 | return r; |
Rob Clark | be0775a | 2012-04-05 10:34:56 -0500 | [diff] [blame] | 782 | } |
Tomi Valkeinen | ea7e3a6 | 2014-04-02 14:31:50 +0300 | [diff] [blame] | 783 | |
| 784 | r = platform_driver_register(&pdev); |
| 785 | if (r) { |
| 786 | pr_err("omapdrm driver registration failed\n"); |
| 787 | platform_driver_unregister(&omap_dmm_driver); |
| 788 | return r; |
| 789 | } |
| 790 | |
| 791 | return 0; |
Rob Clark | cd5351f | 2011-11-12 12:09:40 -0600 | [diff] [blame] | 792 | } |
| 793 | |
| 794 | static void __exit omap_drm_fini(void) |
| 795 | { |
| 796 | DBG("fini"); |
Tomi Valkeinen | ea7e3a6 | 2014-04-02 14:31:50 +0300 | [diff] [blame] | 797 | |
Rob Clark | cd5351f | 2011-11-12 12:09:40 -0600 | [diff] [blame] | 798 | platform_driver_unregister(&pdev); |
Tomi Valkeinen | ea7e3a6 | 2014-04-02 14:31:50 +0300 | [diff] [blame] | 799 | |
| 800 | platform_driver_unregister(&omap_dmm_driver); |
Rob Clark | cd5351f | 2011-11-12 12:09:40 -0600 | [diff] [blame] | 801 | } |
| 802 | |
| 803 | /* need late_initcall() so we load after dss_driver's are loaded */ |
| 804 | late_initcall(omap_drm_init); |
| 805 | module_exit(omap_drm_fini); |
| 806 | |
| 807 | MODULE_AUTHOR("Rob Clark <rob@ti.com>"); |
| 808 | MODULE_DESCRIPTION("OMAP DRM Display Driver"); |
| 809 | MODULE_ALIAS("platform:" DRIVER_NAME); |
| 810 | MODULE_LICENSE("GPL v2"); |