| Alexander Müller | d0c175d | 2016-08-27 19:40:50 +0200 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (c) 2015 Endless Mobile, Inc. |
| 3 | * Author: Carlo Caione <carlo@endlessm.com> |
| 4 | * |
| 5 | * Copyright (c) 2016 BayLibre, Inc. |
| 6 | * Michael Turquette <mturquette@baylibre.com> |
| 7 | * |
| 8 | * This program is free software; you can redistribute it and/or modify it |
| 9 | * under the terms and conditions of the GNU General Public License, |
| 10 | * version 2, as published by the Free Software Foundation. |
| 11 | * |
| 12 | * This program is distributed in the hope it will be useful, but WITHOUT |
| 13 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or |
| 14 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for |
| 15 | * more details. |
| 16 | * |
| 17 | * You should have received a copy of the GNU General Public License along with |
| 18 | * this program. If not, see <http://www.gnu.org/licenses/>. |
| 19 | */ |
| 20 | |
| 21 | #ifndef __MESON8B_H |
| 22 | #define __MESON8B_H |
| 23 | |
| 24 | /* |
| 25 | * Clock controller register offsets |
| 26 | * |
| 27 | * Register offsets from the HardKernel[0] data sheet are listed in comment |
| 28 | * blocks below. Those offsets must be multiplied by 4 before adding them to |
| 29 | * the base address to get the right value |
| 30 | * |
| 31 | * [0] http://dn.odroid.com/S805/Datasheet/S805_Datasheet%20V0.8%2020150126.pdf |
| 32 | */ |
| Alexander Müller | e0818a3 | 2016-08-27 19:40:51 +0200 | [diff] [blame^] | 33 | #define HHI_SYS_CPU_CLK_CNTL1 0x15c /* 0x57 offset in data sheet */ |
| 34 | #define HHI_MPEG_CLK_CNTL 0x174 /* 0x5d offset in data sheet */ |
| 35 | #define HHI_MPLL_CNTL 0x280 /* 0xa0 offset in data sheet */ |
| 36 | #define HHI_SYS_PLL_CNTL 0x300 /* 0xc0 offset in data sheet */ |
| 37 | #define HHI_VID_PLL_CNTL 0x320 /* 0xc8 offset in data sheet */ |
| Alexander Müller | d0c175d | 2016-08-27 19:40:50 +0200 | [diff] [blame] | 38 | |
| 39 | #endif /* __MESON8B_H */ |