blob: c4de4ad0543b729fc180adf660f0ddbc7490e4d0 [file] [log] [blame]
Sinclair Yeh35c05122015-06-26 01:42:06 -07001/******************************************************************************
2 *
Sinclair Yeh54fbde82015-07-29 12:38:02 -07003 * COPYRIGHT © 2014-2015 VMware, Inc., Palo Alto, CA., USA
Sinclair Yeh35c05122015-06-26 01:42:06 -07004 * All Rights Reserved.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the
8 * "Software"), to deal in the Software without restriction, including
9 * without limitation the rights to use, copy, modify, merge, publish,
10 * distribute, sub license, and/or sell copies of the Software, and to
11 * permit persons to whom the Software is furnished to do so, subject to
12 * the following conditions:
13 *
14 * The above copyright notice and this permission notice (including the
15 * next paragraph) shall be included in all copies or substantial portions
16 * of the Software.
17 *
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
19 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
20 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
21 * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
22 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
23 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
24 * USE OR OTHER DEALINGS IN THE SOFTWARE.
25 *
26 ******************************************************************************/
27
28#include "vmwgfx_kms.h"
Sinclair Yeh8ce75f82015-07-08 21:20:39 -070029#include "device_include/svga3d_surfacedefs.h"
Sinclair Yeh35c05122015-06-26 01:42:06 -070030#include <drm/drm_plane_helper.h>
Sinclair Yehd7721ca2017-03-23 11:48:44 -070031#include <drm/drm_atomic.h>
32#include <drm/drm_atomic_helper.h>
33
Sinclair Yeh35c05122015-06-26 01:42:06 -070034
35#define vmw_crtc_to_stdu(x) \
36 container_of(x, struct vmw_screen_target_display_unit, base.crtc)
37#define vmw_encoder_to_stdu(x) \
38 container_of(x, struct vmw_screen_target_display_unit, base.encoder)
39#define vmw_connector_to_stdu(x) \
40 container_of(x, struct vmw_screen_target_display_unit, base.connector)
41
42
43
44enum stdu_content_type {
45 SAME_AS_DISPLAY = 0,
46 SEPARATE_SURFACE,
47 SEPARATE_DMA
48};
49
Thomas Hellstrom6bf6bf02015-06-26 02:22:40 -070050/**
51 * struct vmw_stdu_dirty - closure structure for the update functions
52 *
53 * @base: The base type we derive from. Used by vmw_kms_helper_dirty().
54 * @transfer: Transfer direction for DMA command.
55 * @left: Left side of bounding box.
56 * @right: Right side of bounding box.
57 * @top: Top side of bounding box.
58 * @bottom: Bottom side of bounding box.
Sinclair Yeha1ac6332017-06-02 07:55:50 +020059 * @fb_left: Left side of the framebuffer/content bounding box
60 * @fb_top: Top of the framebuffer/content bounding box
Thomas Hellstrom6bf6bf02015-06-26 02:22:40 -070061 * @buf: DMA buffer when DMA-ing between buffer and screen targets.
62 * @sid: Surface ID when copying between surface and screen targets.
63 */
64struct vmw_stdu_dirty {
65 struct vmw_kms_dirty base;
66 SVGA3dTransferType transfer;
67 s32 left, right, top, bottom;
Sinclair Yeha1ac6332017-06-02 07:55:50 +020068 s32 fb_left, fb_top;
Thomas Hellstrom6bf6bf02015-06-26 02:22:40 -070069 u32 pitch;
70 union {
71 struct vmw_dma_buffer *buf;
72 u32 sid;
73 };
74};
75
76/*
77 * SVGA commands that are used by this code. Please see the device headers
78 * for explanation.
79 */
80struct vmw_stdu_update {
81 SVGA3dCmdHeader header;
82 SVGA3dCmdUpdateGBScreenTarget body;
83};
84
85struct vmw_stdu_dma {
86 SVGA3dCmdHeader header;
87 SVGA3dCmdSurfaceDMA body;
88};
89
90struct vmw_stdu_surface_copy {
91 SVGA3dCmdHeader header;
92 SVGA3dCmdSurfaceCopy body;
93};
Sinclair Yeh35c05122015-06-26 01:42:06 -070094
95
96/**
97 * struct vmw_screen_target_display_unit
98 *
99 * @base: VMW specific DU structure
100 * @display_srf: surface to be displayed. The dimension of this will always
101 * match the display mode. If the display mode matches
102 * content_vfbs dimensions, then this is a pointer into the
103 * corresponding field in content_vfbs. If not, then this
104 * is a separate buffer to which content_vfbs will blit to.
Sinclair Yeh35c05122015-06-26 01:42:06 -0700105 * @content_type: content_fb type
106 * @defined: true if the current display unit has been initialized
107 */
108struct vmw_screen_target_display_unit {
109 struct vmw_display_unit base;
Sinclair Yeh904bb5e2017-03-23 14:29:22 -0700110 const struct vmw_surface *display_srf;
Sinclair Yeh35c05122015-06-26 01:42:06 -0700111 enum stdu_content_type content_fb_type;
Sinclair Yeh9aa8dca2017-03-23 14:40:04 -0700112 s32 display_width, display_height;
Sinclair Yeh35c05122015-06-26 01:42:06 -0700113
114 bool defined;
Sinclair Yeh810b3e162017-03-23 15:39:16 -0700115
116 /* For CPU Blit */
117 struct ttm_bo_kmap_obj host_map, guest_map;
118 unsigned int cpp;
Sinclair Yeh35c05122015-06-26 01:42:06 -0700119};
120
121
122
123static void vmw_stdu_destroy(struct vmw_screen_target_display_unit *stdu);
124
125
126
127/******************************************************************************
Sinclair Yeh35c05122015-06-26 01:42:06 -0700128 * Screen Target Display Unit CRTC Functions
129 *****************************************************************************/
130
131
132/**
133 * vmw_stdu_crtc_destroy - cleans up the STDU
134 *
135 * @crtc: used to get a reference to the containing STDU
136 */
137static void vmw_stdu_crtc_destroy(struct drm_crtc *crtc)
138{
139 vmw_stdu_destroy(vmw_crtc_to_stdu(crtc));
140}
141
Sinclair Yeh35c05122015-06-26 01:42:06 -0700142/**
143 * vmw_stdu_define_st - Defines a Screen Target
144 *
145 * @dev_priv: VMW DRM device
146 * @stdu: display unit to create a Screen Target for
Thomas Hellstromb1097ae2016-02-12 08:54:07 +0100147 * @mode: The mode to set.
148 * @crtc_x: X coordinate of screen target relative to framebuffer origin.
149 * @crtc_y: Y coordinate of screen target relative to framebuffer origin.
Sinclair Yeh35c05122015-06-26 01:42:06 -0700150 *
151 * Creates a STDU that we can used later. This function is called whenever the
152 * framebuffer size changes.
153 *
154 * RETURNs:
155 * 0 on success, error code on failure
156 */
157static int vmw_stdu_define_st(struct vmw_private *dev_priv,
Thomas Hellstromb1097ae2016-02-12 08:54:07 +0100158 struct vmw_screen_target_display_unit *stdu,
159 struct drm_display_mode *mode,
160 int crtc_x, int crtc_y)
Sinclair Yeh35c05122015-06-26 01:42:06 -0700161{
162 struct {
163 SVGA3dCmdHeader header;
164 SVGA3dCmdDefineGBScreenTarget body;
165 } *cmd;
166
167 cmd = vmw_fifo_reserve(dev_priv, sizeof(*cmd));
168
169 if (unlikely(cmd == NULL)) {
170 DRM_ERROR("Out of FIFO space defining Screen Target\n");
171 return -ENOMEM;
172 }
173
174 cmd->header.id = SVGA_3D_CMD_DEFINE_GB_SCREENTARGET;
175 cmd->header.size = sizeof(cmd->body);
176
177 cmd->body.stid = stdu->base.unit;
Thomas Hellstromb1097ae2016-02-12 08:54:07 +0100178 cmd->body.width = mode->hdisplay;
179 cmd->body.height = mode->vdisplay;
Sinclair Yeh35c05122015-06-26 01:42:06 -0700180 cmd->body.flags = (0 == cmd->body.stid) ? SVGA_STFLAG_PRIMARY : 0;
181 cmd->body.dpi = 0;
Thomas Hellstromb1097ae2016-02-12 08:54:07 +0100182 if (stdu->base.is_implicit) {
183 cmd->body.xRoot = crtc_x;
184 cmd->body.yRoot = crtc_y;
185 } else {
Sinclair Yeh35c05122015-06-26 01:42:06 -0700186 cmd->body.xRoot = stdu->base.gui_x;
187 cmd->body.yRoot = stdu->base.gui_y;
188 }
Thomas Hellstrom6dd687b2016-02-12 09:57:15 +0100189 stdu->base.set_gui_x = cmd->body.xRoot;
190 stdu->base.set_gui_y = cmd->body.yRoot;
Sinclair Yeh35c05122015-06-26 01:42:06 -0700191
192 vmw_fifo_commit(dev_priv, sizeof(*cmd));
193
194 stdu->defined = true;
Sinclair Yeh9aa8dca2017-03-23 14:40:04 -0700195 stdu->display_width = mode->hdisplay;
196 stdu->display_height = mode->vdisplay;
Sinclair Yeh35c05122015-06-26 01:42:06 -0700197
198 return 0;
199}
200
201
202
203/**
204 * vmw_stdu_bind_st - Binds a surface to a Screen Target
205 *
206 * @dev_priv: VMW DRM device
207 * @stdu: display unit affected
208 * @res: Buffer to bind to the screen target. Set to NULL to blank screen.
209 *
210 * Binding a surface to a Screen Target the same as flipping
211 */
212static int vmw_stdu_bind_st(struct vmw_private *dev_priv,
213 struct vmw_screen_target_display_unit *stdu,
Sinclair Yeh904bb5e2017-03-23 14:29:22 -0700214 const struct vmw_resource *res)
Sinclair Yeh35c05122015-06-26 01:42:06 -0700215{
216 SVGA3dSurfaceImageId image;
217
218 struct {
219 SVGA3dCmdHeader header;
220 SVGA3dCmdBindGBScreenTarget body;
221 } *cmd;
222
223
224 if (!stdu->defined) {
225 DRM_ERROR("No screen target defined\n");
226 return -EINVAL;
227 }
228
229 /* Set up image using information in vfb */
230 memset(&image, 0, sizeof(image));
231 image.sid = res ? res->id : SVGA3D_INVALID_ID;
232
233 cmd = vmw_fifo_reserve(dev_priv, sizeof(*cmd));
234
235 if (unlikely(cmd == NULL)) {
236 DRM_ERROR("Out of FIFO space binding a screen target\n");
237 return -ENOMEM;
238 }
239
240 cmd->header.id = SVGA_3D_CMD_BIND_GB_SCREENTARGET;
241 cmd->header.size = sizeof(cmd->body);
242
243 cmd->body.stid = stdu->base.unit;
244 cmd->body.image = image;
245
246 vmw_fifo_commit(dev_priv, sizeof(*cmd));
247
248 return 0;
249}
250
Thomas Hellstrom6bf6bf02015-06-26 02:22:40 -0700251/**
252 * vmw_stdu_populate_update - populate an UPDATE_GB_SCREENTARGET command with a
253 * bounding box.
254 *
255 * @cmd: Pointer to command stream.
256 * @unit: Screen target unit.
257 * @left: Left side of bounding box.
258 * @right: Right side of bounding box.
259 * @top: Top side of bounding box.
260 * @bottom: Bottom side of bounding box.
261 */
262static void vmw_stdu_populate_update(void *cmd, int unit,
263 s32 left, s32 right, s32 top, s32 bottom)
264{
265 struct vmw_stdu_update *update = cmd;
Sinclair Yeh35c05122015-06-26 01:42:06 -0700266
Thomas Hellstrom6bf6bf02015-06-26 02:22:40 -0700267 update->header.id = SVGA_3D_CMD_UPDATE_GB_SCREENTARGET;
268 update->header.size = sizeof(update->body);
269
270 update->body.stid = unit;
271 update->body.rect.x = left;
272 update->body.rect.y = top;
273 update->body.rect.w = right - left;
274 update->body.rect.h = bottom - top;
275}
Sinclair Yeh35c05122015-06-26 01:42:06 -0700276
277/**
Thomas Hellstrom6bf6bf02015-06-26 02:22:40 -0700278 * vmw_stdu_update_st - Full update of a Screen Target
Sinclair Yeh35c05122015-06-26 01:42:06 -0700279 *
280 * @dev_priv: VMW DRM device
Sinclair Yeh35c05122015-06-26 01:42:06 -0700281 * @stdu: display unit affected
Sinclair Yeh35c05122015-06-26 01:42:06 -0700282 *
283 * This function needs to be called whenever the content of a screen
Thomas Hellstrom6bf6bf02015-06-26 02:22:40 -0700284 * target has changed completely. Typically as a result of a backing
285 * surface change.
Sinclair Yeh35c05122015-06-26 01:42:06 -0700286 *
287 * RETURNS:
288 * 0 on success, error code on failure
289 */
290static int vmw_stdu_update_st(struct vmw_private *dev_priv,
Thomas Hellstrom6bf6bf02015-06-26 02:22:40 -0700291 struct vmw_screen_target_display_unit *stdu)
Sinclair Yeh35c05122015-06-26 01:42:06 -0700292{
Thomas Hellstrom6bf6bf02015-06-26 02:22:40 -0700293 struct vmw_stdu_update *cmd;
Sinclair Yeh35c05122015-06-26 01:42:06 -0700294
295 if (!stdu->defined) {
296 DRM_ERROR("No screen target defined");
297 return -EINVAL;
298 }
299
Sinclair Yeh35c05122015-06-26 01:42:06 -0700300 cmd = vmw_fifo_reserve(dev_priv, sizeof(*cmd));
301
302 if (unlikely(cmd == NULL)) {
303 DRM_ERROR("Out of FIFO space updating a Screen Target\n");
304 return -ENOMEM;
305 }
306
Sinclair Yeh9aa8dca2017-03-23 14:40:04 -0700307 vmw_stdu_populate_update(cmd, stdu->base.unit,
308 0, stdu->display_width,
309 0, stdu->display_height);
Sinclair Yeh35c05122015-06-26 01:42:06 -0700310
311 vmw_fifo_commit(dev_priv, sizeof(*cmd));
312
313 return 0;
314}
315
316
317
318/**
319 * vmw_stdu_destroy_st - Destroy a Screen Target
320 *
321 * @dev_priv: VMW DRM device
322 * @stdu: display unit to destroy
323 */
324static int vmw_stdu_destroy_st(struct vmw_private *dev_priv,
325 struct vmw_screen_target_display_unit *stdu)
326{
327 int ret;
328
329 struct {
330 SVGA3dCmdHeader header;
331 SVGA3dCmdDestroyGBScreenTarget body;
332 } *cmd;
333
334
335 /* Nothing to do if not successfully defined */
336 if (unlikely(!stdu->defined))
337 return 0;
338
339 cmd = vmw_fifo_reserve(dev_priv, sizeof(*cmd));
340
341 if (unlikely(cmd == NULL)) {
342 DRM_ERROR("Out of FIFO space, screen target not destroyed\n");
343 return -ENOMEM;
344 }
345
346 cmd->header.id = SVGA_3D_CMD_DESTROY_GB_SCREENTARGET;
347 cmd->header.size = sizeof(cmd->body);
348
349 cmd->body.stid = stdu->base.unit;
350
351 vmw_fifo_commit(dev_priv, sizeof(*cmd));
352
353 /* Force sync */
354 ret = vmw_fallback_wait(dev_priv, false, true, 0, false, 3*HZ);
355 if (unlikely(ret != 0))
356 DRM_ERROR("Failed to sync with HW");
357
358 stdu->defined = false;
Sinclair Yeh9aa8dca2017-03-23 14:40:04 -0700359 stdu->display_width = 0;
360 stdu->display_height = 0;
Sinclair Yeh35c05122015-06-26 01:42:06 -0700361
362 return ret;
363}
364
Sinclair Yeh06ec4192017-03-23 13:14:54 -0700365
366/**
367 * vmw_stdu_crtc_mode_set_nofb - Updates screen target size
368 *
369 * @crtc: CRTC associated with the screen target
370 *
371 * This function defines/destroys a screen target
372 *
373 */
374static void vmw_stdu_crtc_mode_set_nofb(struct drm_crtc *crtc)
375{
376 struct vmw_private *dev_priv;
377 struct vmw_screen_target_display_unit *stdu;
378 int ret;
379
380
381 stdu = vmw_crtc_to_stdu(crtc);
382 dev_priv = vmw_priv(crtc->dev);
383
384 if (stdu->defined) {
385 ret = vmw_stdu_bind_st(dev_priv, stdu, NULL);
386 if (ret)
387 DRM_ERROR("Failed to blank CRTC\n");
388
389 (void) vmw_stdu_update_st(dev_priv, stdu);
390
391 ret = vmw_stdu_destroy_st(dev_priv, stdu);
392 if (ret)
393 DRM_ERROR("Failed to destroy Screen Target\n");
394
395 stdu->content_fb_type = SAME_AS_DISPLAY;
396 }
397
398 if (!crtc->state->enable)
399 return;
400
401 vmw_svga_enable(dev_priv);
402 ret = vmw_stdu_define_st(dev_priv, stdu, &crtc->mode, crtc->x, crtc->y);
403
404 if (ret)
405 DRM_ERROR("Failed to define Screen Target of size %dx%d\n",
406 crtc->x, crtc->y);
407}
408
409
410static void vmw_stdu_crtc_helper_prepare(struct drm_crtc *crtc)
411{
412}
413
414
Laurent Pinchart0b20a0f2017-06-30 12:36:44 +0300415static void vmw_stdu_crtc_atomic_enable(struct drm_crtc *crtc,
416 struct drm_crtc_state *old_state)
Sinclair Yeh06ec4192017-03-23 13:14:54 -0700417{
418 struct vmw_private *dev_priv;
419 struct vmw_screen_target_display_unit *stdu;
420 struct vmw_framebuffer *vfb;
421 struct drm_framebuffer *fb;
422
423
424 stdu = vmw_crtc_to_stdu(crtc);
425 dev_priv = vmw_priv(crtc->dev);
426 fb = crtc->primary->fb;
427
428 vfb = (fb) ? vmw_framebuffer_to_vfb(fb) : NULL;
429
430 if (vfb)
431 vmw_kms_add_active(dev_priv, &stdu->base, vfb);
432 else
433 vmw_kms_del_active(dev_priv, &stdu->base);
434}
435
Laurent Pinchart64581712017-06-30 12:36:45 +0300436static void vmw_stdu_crtc_atomic_disable(struct drm_crtc *crtc,
437 struct drm_crtc_state *old_state)
Sinclair Yeh06ec4192017-03-23 13:14:54 -0700438{
439 struct vmw_private *dev_priv;
440 struct vmw_screen_target_display_unit *stdu;
441 int ret;
442
443
444 if (!crtc) {
445 DRM_ERROR("CRTC is NULL\n");
446 return;
447 }
448
449 stdu = vmw_crtc_to_stdu(crtc);
450 dev_priv = vmw_priv(crtc->dev);
451
452 if (stdu->defined) {
453 ret = vmw_stdu_bind_st(dev_priv, stdu, NULL);
454 if (ret)
455 DRM_ERROR("Failed to blank CRTC\n");
456
457 (void) vmw_stdu_update_st(dev_priv, stdu);
458
459 ret = vmw_stdu_destroy_st(dev_priv, stdu);
460 if (ret)
461 DRM_ERROR("Failed to destroy Screen Target\n");
462
463 stdu->content_fb_type = SAME_AS_DISPLAY;
464 }
465}
466
Sinclair Yeh35c05122015-06-26 01:42:06 -0700467/**
Sinclair Yeh35c05122015-06-26 01:42:06 -0700468 * vmw_stdu_crtc_page_flip - Binds a buffer to a screen target
469 *
470 * @crtc: CRTC to attach FB to
471 * @fb: FB to attach
472 * @event: Event to be posted. This event should've been alloced
473 * using k[mz]alloc, and should've been completely initialized.
474 * @page_flip_flags: Input flags.
475 *
476 * If the STDU uses the same display and content buffers, i.e. a true flip,
477 * this function will replace the existing display buffer with the new content
478 * buffer.
479 *
480 * If the STDU uses different display and content buffers, i.e. a blit, then
481 * only the content buffer will be updated.
482 *
483 * RETURNS:
484 * 0 on success, error code on failure
485 */
486static int vmw_stdu_crtc_page_flip(struct drm_crtc *crtc,
487 struct drm_framebuffer *new_fb,
488 struct drm_pending_vblank_event *event,
Daniel Vetter41292b1f2017-03-22 22:50:50 +0100489 uint32_t flags,
490 struct drm_modeset_acquire_ctx *ctx)
Sinclair Yeh35c05122015-06-26 01:42:06 -0700491
492{
493 struct vmw_private *dev_priv = vmw_priv(crtc->dev);
Sinclair Yeh904bb5e2017-03-23 14:29:22 -0700494 struct vmw_screen_target_display_unit *stdu = vmw_crtc_to_stdu(crtc);
Thomas Hellstromb1097ae2016-02-12 08:54:07 +0100495 struct vmw_framebuffer *vfb = vmw_framebuffer_to_vfb(new_fb);
Sinclair Yeh904bb5e2017-03-23 14:29:22 -0700496 struct drm_vmw_rect vclips;
Sinclair Yeh35c05122015-06-26 01:42:06 -0700497 int ret;
498
Sinclair Yeh35c05122015-06-26 01:42:06 -0700499 dev_priv = vmw_priv(crtc->dev);
500 stdu = vmw_crtc_to_stdu(crtc);
Sinclair Yeh35c05122015-06-26 01:42:06 -0700501
Thomas Hellstrom4d492a02016-02-12 09:01:29 +0100502 if (!stdu->defined || !vmw_kms_crtc_flippable(dev_priv, crtc))
Thomas Hellstromb1097ae2016-02-12 08:54:07 +0100503 return -EINVAL;
Sinclair Yeh35c05122015-06-26 01:42:06 -0700504
Sinclair Yeh904bb5e2017-03-23 14:29:22 -0700505 /*
506 * We're always async, but the helper doesn't know how to set async
507 * so lie to the helper. Also, the helper expects someone
508 * to pick the event up from the crtc state, and if nobody does,
509 * it will free it. Since we handle the event in this function,
510 * don't hand it to the helper.
511 */
512 flags &= ~DRM_MODE_PAGE_FLIP_ASYNC;
Dave Airlie320d8c32017-04-03 16:30:24 +1000513 ret = drm_atomic_helper_page_flip(crtc, new_fb, NULL, flags, ctx);
Sinclair Yeh904bb5e2017-03-23 14:29:22 -0700514 if (ret) {
515 DRM_ERROR("Page flip error %d.\n", ret);
Thomas Hellstromb1097ae2016-02-12 08:54:07 +0100516 return ret;
Sinclair Yeh904bb5e2017-03-23 14:29:22 -0700517 }
Sinclair Yeh35c05122015-06-26 01:42:06 -0700518
Thomas Hellstrom4d492a02016-02-12 09:01:29 +0100519 if (stdu->base.is_implicit)
520 vmw_kms_update_implicit_fb(dev_priv, crtc);
521
Sinclair Yeh904bb5e2017-03-23 14:29:22 -0700522 /*
523 * Now that we've bound a new surface to the screen target,
524 * update the contents.
525 */
Thomas Hellstromb1097ae2016-02-12 08:54:07 +0100526 vclips.x = crtc->x;
527 vclips.y = crtc->y;
528 vclips.w = crtc->mode.hdisplay;
529 vclips.h = crtc->mode.vdisplay;
Sinclair Yeh904bb5e2017-03-23 14:29:22 -0700530
Thomas Hellstromb1097ae2016-02-12 08:54:07 +0100531 if (vfb->dmabuf)
532 ret = vmw_kms_stdu_dma(dev_priv, NULL, vfb, NULL, NULL, &vclips,
533 1, 1, true, false);
534 else
535 ret = vmw_kms_stdu_surface_dirty(dev_priv, vfb, NULL, &vclips,
536 NULL, 0, 0, 1, 1, NULL);
Sinclair Yeh904bb5e2017-03-23 14:29:22 -0700537 if (ret) {
538 DRM_ERROR("Page flip update error %d.\n", ret);
Sinclair Yeh35c05122015-06-26 01:42:06 -0700539 return ret;
Sinclair Yeh904bb5e2017-03-23 14:29:22 -0700540 }
Sinclair Yeh35c05122015-06-26 01:42:06 -0700541
542 if (event) {
543 struct vmw_fence_obj *fence = NULL;
Thomas Hellstrom6bf6bf02015-06-26 02:22:40 -0700544 struct drm_file *file_priv = event->base.file_priv;
Sinclair Yeh35c05122015-06-26 01:42:06 -0700545
546 vmw_execbuf_fence_commands(NULL, dev_priv, &fence, NULL);
547 if (!fence)
548 return -ENOMEM;
549
550 ret = vmw_event_fence_action_queue(file_priv, fence,
551 &event->base,
552 &event->event.tv_sec,
553 &event->event.tv_usec,
554 true);
555 vmw_fence_obj_unreference(&fence);
Thomas Hellstrom4e0858a2015-11-05 02:18:55 -0800556 } else {
Sinclair Yeh904bb5e2017-03-23 14:29:22 -0700557 (void) vmw_fifo_flush(dev_priv, false);
Sinclair Yeh35c05122015-06-26 01:42:06 -0700558 }
559
Thomas Hellstromb1097ae2016-02-12 08:54:07 +0100560 return 0;
Sinclair Yeh35c05122015-06-26 01:42:06 -0700561}
562
563
Thomas Hellstrom6bf6bf02015-06-26 02:22:40 -0700564/**
565 * vmw_stdu_dmabuf_clip - Callback to encode a suface DMA command cliprect
566 *
567 * @dirty: The closure structure.
568 *
569 * Encodes a surface DMA command cliprect and updates the bounding box
570 * for the DMA.
571 */
572static void vmw_stdu_dmabuf_clip(struct vmw_kms_dirty *dirty)
573{
574 struct vmw_stdu_dirty *ddirty =
575 container_of(dirty, struct vmw_stdu_dirty, base);
576 struct vmw_stdu_dma *cmd = dirty->cmd;
577 struct SVGA3dCopyBox *blit = (struct SVGA3dCopyBox *) &cmd[1];
578
579 blit += dirty->num_hits;
580 blit->srcx = dirty->fb_x;
581 blit->srcy = dirty->fb_y;
582 blit->x = dirty->unit_x1;
583 blit->y = dirty->unit_y1;
584 blit->d = 1;
585 blit->w = dirty->unit_x2 - dirty->unit_x1;
586 blit->h = dirty->unit_y2 - dirty->unit_y1;
587 dirty->num_hits++;
588
589 if (ddirty->transfer != SVGA3D_WRITE_HOST_VRAM)
590 return;
591
592 /* Destination bounding box */
593 ddirty->left = min_t(s32, ddirty->left, dirty->unit_x1);
594 ddirty->top = min_t(s32, ddirty->top, dirty->unit_y1);
595 ddirty->right = max_t(s32, ddirty->right, dirty->unit_x2);
596 ddirty->bottom = max_t(s32, ddirty->bottom, dirty->unit_y2);
597}
598
599/**
600 * vmw_stdu_dmabuf_fifo_commit - Callback to fill in and submit a DMA command.
601 *
602 * @dirty: The closure structure.
603 *
604 * Fills in the missing fields in a DMA command, and optionally encodes
605 * a screen target update command, depending on transfer direction.
606 */
607static void vmw_stdu_dmabuf_fifo_commit(struct vmw_kms_dirty *dirty)
608{
609 struct vmw_stdu_dirty *ddirty =
610 container_of(dirty, struct vmw_stdu_dirty, base);
611 struct vmw_screen_target_display_unit *stdu =
612 container_of(dirty->unit, typeof(*stdu), base);
613 struct vmw_stdu_dma *cmd = dirty->cmd;
614 struct SVGA3dCopyBox *blit = (struct SVGA3dCopyBox *) &cmd[1];
615 SVGA3dCmdSurfaceDMASuffix *suffix =
616 (SVGA3dCmdSurfaceDMASuffix *) &blit[dirty->num_hits];
617 size_t blit_size = sizeof(*blit) * dirty->num_hits + sizeof(*suffix);
618
619 if (!dirty->num_hits) {
620 vmw_fifo_commit(dirty->dev_priv, 0);
621 return;
622 }
623
624 cmd->header.id = SVGA_3D_CMD_SURFACE_DMA;
625 cmd->header.size = sizeof(cmd->body) + blit_size;
626 vmw_bo_get_guest_ptr(&ddirty->buf->base, &cmd->body.guest.ptr);
627 cmd->body.guest.pitch = ddirty->pitch;
628 cmd->body.host.sid = stdu->display_srf->res.id;
629 cmd->body.host.face = 0;
630 cmd->body.host.mipmap = 0;
631 cmd->body.transfer = ddirty->transfer;
632 suffix->suffixSize = sizeof(*suffix);
633 suffix->maximumOffset = ddirty->buf->base.num_pages * PAGE_SIZE;
634
635 if (ddirty->transfer == SVGA3D_WRITE_HOST_VRAM) {
636 blit_size += sizeof(struct vmw_stdu_update);
637
638 vmw_stdu_populate_update(&suffix[1], stdu->base.unit,
639 ddirty->left, ddirty->right,
640 ddirty->top, ddirty->bottom);
641 }
642
643 vmw_fifo_commit(dirty->dev_priv, sizeof(*cmd) + blit_size);
644
645 ddirty->left = ddirty->top = S32_MAX;
646 ddirty->right = ddirty->bottom = S32_MIN;
647}
648
Sinclair Yeh810b3e162017-03-23 15:39:16 -0700649
650/**
651 * vmw_stdu_dmabuf_cpu_clip - Callback to encode a CPU blit
652 *
653 * @dirty: The closure structure.
654 *
Sinclair Yeha1ac6332017-06-02 07:55:50 +0200655 * This function calculates the bounding box for all the incoming clips.
Sinclair Yeh810b3e162017-03-23 15:39:16 -0700656 */
657static void vmw_stdu_dmabuf_cpu_clip(struct vmw_kms_dirty *dirty)
658{
659 struct vmw_stdu_dirty *ddirty =
660 container_of(dirty, struct vmw_stdu_dirty, base);
661
662 dirty->num_hits = 1;
663
Sinclair Yeha1ac6332017-06-02 07:55:50 +0200664 /* Calculate destination bounding box */
Sinclair Yeh810b3e162017-03-23 15:39:16 -0700665 ddirty->left = min_t(s32, ddirty->left, dirty->unit_x1);
666 ddirty->top = min_t(s32, ddirty->top, dirty->unit_y1);
667 ddirty->right = max_t(s32, ddirty->right, dirty->unit_x2);
668 ddirty->bottom = max_t(s32, ddirty->bottom, dirty->unit_y2);
Sinclair Yeha1ac6332017-06-02 07:55:50 +0200669
670 /*
671 * Calculate content bounding box. We only need the top-left
672 * coordinate because width and height will be the same as the
673 * destination bounding box above
674 */
675 ddirty->fb_left = min_t(s32, ddirty->fb_left, dirty->fb_x);
676 ddirty->fb_top = min_t(s32, ddirty->fb_top, dirty->fb_y);
Sinclair Yeh810b3e162017-03-23 15:39:16 -0700677}
678
679
680/**
681 * vmw_stdu_dmabuf_cpu_commit - Callback to do a CPU blit from DMAbuf
682 *
683 * @dirty: The closure structure.
684 *
685 * For the special case when we cannot create a proxy surface in a
686 * 2D VM, we have to do a CPU blit ourselves.
687 */
688static void vmw_stdu_dmabuf_cpu_commit(struct vmw_kms_dirty *dirty)
689{
690 struct vmw_stdu_dirty *ddirty =
691 container_of(dirty, struct vmw_stdu_dirty, base);
692 struct vmw_screen_target_display_unit *stdu =
693 container_of(dirty->unit, typeof(*stdu), base);
694 s32 width, height;
695 s32 src_pitch, dst_pitch;
696 u8 *src, *dst;
697 bool not_used;
698
699
700 if (!dirty->num_hits)
701 return;
702
703 width = ddirty->right - ddirty->left;
704 height = ddirty->bottom - ddirty->top;
705
706 if (width == 0 || height == 0)
707 return;
708
709
710 /* Assume we are blitting from Host (display_srf) to Guest (dmabuf) */
711 src_pitch = stdu->display_srf->base_size.width * stdu->cpp;
712 src = ttm_kmap_obj_virtual(&stdu->host_map, &not_used);
Sinclair Yeha1ac6332017-06-02 07:55:50 +0200713 src += ddirty->top * src_pitch + ddirty->left * stdu->cpp;
Sinclair Yeh810b3e162017-03-23 15:39:16 -0700714
715 dst_pitch = ddirty->pitch;
716 dst = ttm_kmap_obj_virtual(&stdu->guest_map, &not_used);
Sinclair Yeha1ac6332017-06-02 07:55:50 +0200717 dst += ddirty->fb_top * dst_pitch + ddirty->fb_left * stdu->cpp;
Sinclair Yeh810b3e162017-03-23 15:39:16 -0700718
719
720 /* Figure out the real direction */
721 if (ddirty->transfer == SVGA3D_WRITE_HOST_VRAM) {
722 u8 *tmp;
723 s32 tmp_pitch;
724
725 tmp = src;
726 tmp_pitch = src_pitch;
727
728 src = dst;
729 src_pitch = dst_pitch;
730
731 dst = tmp;
732 dst_pitch = tmp_pitch;
733 }
734
735 /* CPU Blit */
736 while (height-- > 0) {
737 memcpy(dst, src, width * stdu->cpp);
738 dst += dst_pitch;
739 src += src_pitch;
740 }
741
742 if (ddirty->transfer == SVGA3D_WRITE_HOST_VRAM) {
743 struct vmw_private *dev_priv;
744 struct vmw_stdu_update *cmd;
745 struct drm_clip_rect region;
746 int ret;
747
748 /* We are updating the actual surface, not a proxy */
749 region.x1 = ddirty->left;
750 region.x2 = ddirty->right;
751 region.y1 = ddirty->top;
752 region.y2 = ddirty->bottom;
753 ret = vmw_kms_update_proxy(
754 (struct vmw_resource *) &stdu->display_srf->res,
755 (const struct drm_clip_rect *) &region, 1, 1);
756 if (ret)
757 goto out_cleanup;
758
759
760 dev_priv = vmw_priv(stdu->base.crtc.dev);
761 cmd = vmw_fifo_reserve(dev_priv, sizeof(*cmd));
762
763 if (!cmd) {
764 DRM_ERROR("Cannot reserve FIFO space to update STDU");
765 goto out_cleanup;
766 }
767
768 vmw_stdu_populate_update(cmd, stdu->base.unit,
769 ddirty->left, ddirty->right,
770 ddirty->top, ddirty->bottom);
771
772 vmw_fifo_commit(dev_priv, sizeof(*cmd));
773 }
774
775out_cleanup:
Sinclair Yeha1ac6332017-06-02 07:55:50 +0200776 ddirty->left = ddirty->top = ddirty->fb_left = ddirty->fb_top = S32_MAX;
Sinclair Yeh810b3e162017-03-23 15:39:16 -0700777 ddirty->right = ddirty->bottom = S32_MIN;
778}
779
Thomas Hellstrom6bf6bf02015-06-26 02:22:40 -0700780/**
781 * vmw_kms_stdu_dma - Perform a DMA transfer between a dma-buffer backed
782 * framebuffer and the screen target system.
783 *
784 * @dev_priv: Pointer to the device private structure.
785 * @file_priv: Pointer to a struct drm-file identifying the caller. May be
786 * set to NULL, but then @user_fence_rep must also be set to NULL.
787 * @vfb: Pointer to the dma-buffer backed framebuffer.
788 * @clips: Array of clip rects. Either @clips or @vclips must be NULL.
789 * @vclips: Alternate array of clip rects. Either @clips or @vclips must
790 * be NULL.
791 * @num_clips: Number of clip rects in @clips or @vclips.
792 * @increment: Increment to use when looping over @clips or @vclips.
793 * @to_surface: Whether to DMA to the screen target system as opposed to
794 * from the screen target system.
795 * @interruptible: Whether to perform waits interruptible if possible.
796 *
797 * If DMA-ing till the screen target system, the function will also notify
798 * the screen target system that a bounding box of the cliprects has been
799 * updated.
800 * Returns 0 on success, negative error code on failure. -ERESTARTSYS if
801 * interrupted.
802 */
803int vmw_kms_stdu_dma(struct vmw_private *dev_priv,
804 struct drm_file *file_priv,
805 struct vmw_framebuffer *vfb,
806 struct drm_vmw_fence_rep __user *user_fence_rep,
807 struct drm_clip_rect *clips,
808 struct drm_vmw_rect *vclips,
809 uint32_t num_clips,
810 int increment,
811 bool to_surface,
812 bool interruptible)
813{
814 struct vmw_dma_buffer *buf =
815 container_of(vfb, struct vmw_framebuffer_dmabuf, base)->buffer;
816 struct vmw_stdu_dirty ddirty;
817 int ret;
818
819 ret = vmw_kms_helper_buffer_prepare(dev_priv, buf, interruptible,
820 false);
821 if (ret)
822 return ret;
823
824 ddirty.transfer = (to_surface) ? SVGA3D_WRITE_HOST_VRAM :
825 SVGA3D_READ_HOST_VRAM;
826 ddirty.left = ddirty.top = S32_MAX;
827 ddirty.right = ddirty.bottom = S32_MIN;
Sinclair Yeha1ac6332017-06-02 07:55:50 +0200828 ddirty.fb_left = ddirty.fb_top = S32_MAX;
Thomas Hellstrom6bf6bf02015-06-26 02:22:40 -0700829 ddirty.pitch = vfb->base.pitches[0];
830 ddirty.buf = buf;
831 ddirty.base.fifo_commit = vmw_stdu_dmabuf_fifo_commit;
832 ddirty.base.clip = vmw_stdu_dmabuf_clip;
833 ddirty.base.fifo_reserve_size = sizeof(struct vmw_stdu_dma) +
834 num_clips * sizeof(SVGA3dCopyBox) +
835 sizeof(SVGA3dCmdSurfaceDMASuffix);
836 if (to_surface)
837 ddirty.base.fifo_reserve_size += sizeof(struct vmw_stdu_update);
838
Sinclair Yeh810b3e162017-03-23 15:39:16 -0700839 /* 2D VMs cannot use SVGA_3D_CMD_SURFACE_DMA so do CPU blit instead */
840 if (!(dev_priv->capabilities & SVGA_CAP_3D)) {
841 ddirty.base.fifo_commit = vmw_stdu_dmabuf_cpu_commit;
842 ddirty.base.clip = vmw_stdu_dmabuf_cpu_clip;
843 ddirty.base.fifo_reserve_size = 0;
844 }
845
Thomas Hellstrom6bf6bf02015-06-26 02:22:40 -0700846 ret = vmw_kms_helper_dirty(dev_priv, vfb, clips, vclips,
847 0, 0, num_clips, increment, &ddirty.base);
848 vmw_kms_helper_buffer_finish(dev_priv, file_priv, buf, NULL,
849 user_fence_rep);
850
851 return ret;
852}
853
854/**
855 * vmw_stdu_surface_clip - Callback to encode a surface copy command cliprect
856 *
857 * @dirty: The closure structure.
858 *
859 * Encodes a surface copy command cliprect and updates the bounding box
860 * for the copy.
861 */
862static void vmw_kms_stdu_surface_clip(struct vmw_kms_dirty *dirty)
863{
864 struct vmw_stdu_dirty *sdirty =
865 container_of(dirty, struct vmw_stdu_dirty, base);
866 struct vmw_stdu_surface_copy *cmd = dirty->cmd;
867 struct vmw_screen_target_display_unit *stdu =
868 container_of(dirty->unit, typeof(*stdu), base);
869
870 if (sdirty->sid != stdu->display_srf->res.id) {
871 struct SVGA3dCopyBox *blit = (struct SVGA3dCopyBox *) &cmd[1];
872
873 blit += dirty->num_hits;
874 blit->srcx = dirty->fb_x;
875 blit->srcy = dirty->fb_y;
876 blit->x = dirty->unit_x1;
877 blit->y = dirty->unit_y1;
878 blit->d = 1;
879 blit->w = dirty->unit_x2 - dirty->unit_x1;
880 blit->h = dirty->unit_y2 - dirty->unit_y1;
881 }
882
883 dirty->num_hits++;
884
885 /* Destination bounding box */
886 sdirty->left = min_t(s32, sdirty->left, dirty->unit_x1);
887 sdirty->top = min_t(s32, sdirty->top, dirty->unit_y1);
888 sdirty->right = max_t(s32, sdirty->right, dirty->unit_x2);
889 sdirty->bottom = max_t(s32, sdirty->bottom, dirty->unit_y2);
890}
891
892/**
893 * vmw_stdu_surface_fifo_commit - Callback to fill in and submit a surface
894 * copy command.
895 *
896 * @dirty: The closure structure.
897 *
898 * Fills in the missing fields in a surface copy command, and encodes a screen
899 * target update command.
900 */
901static void vmw_kms_stdu_surface_fifo_commit(struct vmw_kms_dirty *dirty)
902{
903 struct vmw_stdu_dirty *sdirty =
904 container_of(dirty, struct vmw_stdu_dirty, base);
905 struct vmw_screen_target_display_unit *stdu =
906 container_of(dirty->unit, typeof(*stdu), base);
907 struct vmw_stdu_surface_copy *cmd = dirty->cmd;
908 struct vmw_stdu_update *update;
909 size_t blit_size = sizeof(SVGA3dCopyBox) * dirty->num_hits;
910 size_t commit_size;
911
912 if (!dirty->num_hits) {
913 vmw_fifo_commit(dirty->dev_priv, 0);
914 return;
915 }
916
917 if (sdirty->sid != stdu->display_srf->res.id) {
918 struct SVGA3dCopyBox *blit = (struct SVGA3dCopyBox *) &cmd[1];
919
920 cmd->header.id = SVGA_3D_CMD_SURFACE_COPY;
921 cmd->header.size = sizeof(cmd->body) + blit_size;
922 cmd->body.src.sid = sdirty->sid;
923 cmd->body.dest.sid = stdu->display_srf->res.id;
924 update = (struct vmw_stdu_update *) &blit[dirty->num_hits];
925 commit_size = sizeof(*cmd) + blit_size + sizeof(*update);
926 } else {
927 update = dirty->cmd;
928 commit_size = sizeof(*update);
929 }
930
931 vmw_stdu_populate_update(update, stdu->base.unit, sdirty->left,
932 sdirty->right, sdirty->top, sdirty->bottom);
933
934 vmw_fifo_commit(dirty->dev_priv, commit_size);
935
936 sdirty->left = sdirty->top = S32_MAX;
937 sdirty->right = sdirty->bottom = S32_MIN;
938}
939
940/**
941 * vmw_kms_stdu_surface_dirty - Dirty part of a surface backed framebuffer
942 *
943 * @dev_priv: Pointer to the device private structure.
944 * @framebuffer: Pointer to the surface-buffer backed framebuffer.
945 * @clips: Array of clip rects. Either @clips or @vclips must be NULL.
946 * @vclips: Alternate array of clip rects. Either @clips or @vclips must
947 * be NULL.
948 * @srf: Pointer to surface to blit from. If NULL, the surface attached
949 * to @framebuffer will be used.
950 * @dest_x: X coordinate offset to align @srf with framebuffer coordinates.
951 * @dest_y: Y coordinate offset to align @srf with framebuffer coordinates.
952 * @num_clips: Number of clip rects in @clips.
953 * @inc: Increment to use when looping over @clips.
954 * @out_fence: If non-NULL, will return a ref-counted pointer to a
955 * struct vmw_fence_obj. The returned fence pointer may be NULL in which
956 * case the device has already synchronized.
957 *
958 * Returns 0 on success, negative error code on failure. -ERESTARTSYS if
959 * interrupted.
960 */
961int vmw_kms_stdu_surface_dirty(struct vmw_private *dev_priv,
962 struct vmw_framebuffer *framebuffer,
963 struct drm_clip_rect *clips,
964 struct drm_vmw_rect *vclips,
965 struct vmw_resource *srf,
966 s32 dest_x,
967 s32 dest_y,
968 unsigned num_clips, int inc,
969 struct vmw_fence_obj **out_fence)
970{
971 struct vmw_framebuffer_surface *vfbs =
972 container_of(framebuffer, typeof(*vfbs), base);
973 struct vmw_stdu_dirty sdirty;
974 int ret;
975
976 if (!srf)
977 srf = &vfbs->surface->res;
978
979 ret = vmw_kms_helper_resource_prepare(srf, true);
980 if (ret)
981 return ret;
982
983 if (vfbs->is_dmabuf_proxy) {
984 ret = vmw_kms_update_proxy(srf, clips, num_clips, inc);
985 if (ret)
986 goto out_finish;
987 }
988
989 sdirty.base.fifo_commit = vmw_kms_stdu_surface_fifo_commit;
990 sdirty.base.clip = vmw_kms_stdu_surface_clip;
991 sdirty.base.fifo_reserve_size = sizeof(struct vmw_stdu_surface_copy) +
992 sizeof(SVGA3dCopyBox) * num_clips +
993 sizeof(struct vmw_stdu_update);
994 sdirty.sid = srf->id;
995 sdirty.left = sdirty.top = S32_MAX;
996 sdirty.right = sdirty.bottom = S32_MIN;
997
998 ret = vmw_kms_helper_dirty(dev_priv, framebuffer, clips, vclips,
999 dest_x, dest_y, num_clips, inc,
1000 &sdirty.base);
1001out_finish:
1002 vmw_kms_helper_resource_finish(srf, out_fence);
1003
1004 return ret;
1005}
1006
Sinclair Yeh35c05122015-06-26 01:42:06 -07001007
1008/*
1009 * Screen Target CRTC dispatch table
1010 */
Ville Syrjäläd7955fc2015-12-15 12:21:15 +01001011static const struct drm_crtc_funcs vmw_stdu_crtc_funcs = {
Sinclair Yeh35c05122015-06-26 01:42:06 -07001012 .gamma_set = vmw_du_crtc_gamma_set,
1013 .destroy = vmw_stdu_crtc_destroy,
Sinclair Yeh9c2542a2017-03-23 11:33:39 -07001014 .reset = vmw_du_crtc_reset,
1015 .atomic_duplicate_state = vmw_du_crtc_duplicate_state,
1016 .atomic_destroy_state = vmw_du_crtc_destroy_state,
Sinclair Yeh904bb5e2017-03-23 14:29:22 -07001017 .set_config = vmw_kms_set_config,
Sinclair Yeh35c05122015-06-26 01:42:06 -07001018 .page_flip = vmw_stdu_crtc_page_flip,
1019};
1020
1021
1022
1023/******************************************************************************
1024 * Screen Target Display Unit Encoder Functions
1025 *****************************************************************************/
1026
1027/**
1028 * vmw_stdu_encoder_destroy - cleans up the STDU
1029 *
1030 * @encoder: used the get the containing STDU
1031 *
1032 * vmwgfx cleans up crtc/encoder/connector all at the same time so technically
1033 * this can be a no-op. Nevertheless, it doesn't hurt of have this in case
1034 * the common KMS code changes and somehow vmw_stdu_crtc_destroy() doesn't
1035 * get called.
1036 */
1037static void vmw_stdu_encoder_destroy(struct drm_encoder *encoder)
1038{
1039 vmw_stdu_destroy(vmw_encoder_to_stdu(encoder));
1040}
1041
Ville Syrjäläd7955fc2015-12-15 12:21:15 +01001042static const struct drm_encoder_funcs vmw_stdu_encoder_funcs = {
Sinclair Yeh35c05122015-06-26 01:42:06 -07001043 .destroy = vmw_stdu_encoder_destroy,
1044};
1045
1046
1047
1048/******************************************************************************
1049 * Screen Target Display Unit Connector Functions
1050 *****************************************************************************/
1051
1052/**
1053 * vmw_stdu_connector_destroy - cleans up the STDU
1054 *
1055 * @connector: used to get the containing STDU
1056 *
1057 * vmwgfx cleans up crtc/encoder/connector all at the same time so technically
1058 * this can be a no-op. Nevertheless, it doesn't hurt of have this in case
1059 * the common KMS code changes and somehow vmw_stdu_crtc_destroy() doesn't
1060 * get called.
1061 */
1062static void vmw_stdu_connector_destroy(struct drm_connector *connector)
1063{
1064 vmw_stdu_destroy(vmw_connector_to_stdu(connector));
1065}
1066
1067
1068
Ville Syrjäläd7955fc2015-12-15 12:21:15 +01001069static const struct drm_connector_funcs vmw_stdu_connector_funcs = {
Sinclair Yeh35c05122015-06-26 01:42:06 -07001070 .dpms = vmw_du_connector_dpms,
Sinclair Yeh35c05122015-06-26 01:42:06 -07001071 .detect = vmw_du_connector_detect,
1072 .fill_modes = vmw_du_connector_fill_modes,
1073 .set_property = vmw_du_connector_set_property,
1074 .destroy = vmw_stdu_connector_destroy,
Sinclair Yehd7721ca2017-03-23 11:48:44 -07001075 .reset = vmw_du_connector_reset,
1076 .atomic_duplicate_state = vmw_du_connector_duplicate_state,
1077 .atomic_destroy_state = vmw_du_connector_destroy_state,
1078 .atomic_set_property = vmw_du_connector_atomic_set_property,
1079 .atomic_get_property = vmw_du_connector_atomic_get_property,
Sinclair Yeh35c05122015-06-26 01:42:06 -07001080};
1081
1082
Sinclair Yehd947d1b2017-03-23 14:23:20 -07001083static const struct
1084drm_connector_helper_funcs vmw_stdu_connector_helper_funcs = {
1085 .best_encoder = drm_atomic_helper_best_encoder,
1086};
1087
1088
Sinclair Yeh35c05122015-06-26 01:42:06 -07001089
Sinclair Yeh36cc79b2017-03-23 11:28:11 -07001090/******************************************************************************
1091 * Screen Target Display Plane Functions
1092 *****************************************************************************/
1093
Sinclair Yeh060e2ad2017-03-23 14:18:32 -07001094
1095
1096/**
1097 * vmw_stdu_primary_plane_cleanup_fb - Unpins the display surface
1098 *
1099 * @plane: display plane
1100 * @old_state: Contains the FB to clean up
1101 *
1102 * Unpins the display surface
1103 *
1104 * Returns 0 on success
1105 */
1106static void
1107vmw_stdu_primary_plane_cleanup_fb(struct drm_plane *plane,
1108 struct drm_plane_state *old_state)
1109{
1110 struct vmw_plane_state *vps = vmw_plane_state_to_vps(old_state);
1111
Sinclair Yeh810b3e162017-03-23 15:39:16 -07001112 if (vps->guest_map.virtual)
1113 ttm_bo_kunmap(&vps->guest_map);
1114
1115 if (vps->host_map.virtual)
1116 ttm_bo_kunmap(&vps->host_map);
1117
Sinclair Yeh060e2ad2017-03-23 14:18:32 -07001118 if (vps->surf)
1119 WARN_ON(!vps->pinned);
1120
1121 vmw_du_plane_cleanup_fb(plane, old_state);
1122
1123 vps->content_fb_type = SAME_AS_DISPLAY;
Sinclair Yeh810b3e162017-03-23 15:39:16 -07001124 vps->cpp = 0;
Sinclair Yeh060e2ad2017-03-23 14:18:32 -07001125}
1126
1127
1128
1129/**
1130 * vmw_stdu_primary_plane_prepare_fb - Readies the display surface
1131 *
1132 * @plane: display plane
1133 * @new_state: info on the new plane state, including the FB
1134 *
1135 * This function allocates a new display surface if the content is
1136 * backed by a DMA. The display surface is pinned here, and it'll
1137 * be unpinned in .cleanup_fb()
1138 *
1139 * Returns 0 on success
1140 */
1141static int
1142vmw_stdu_primary_plane_prepare_fb(struct drm_plane *plane,
1143 struct drm_plane_state *new_state)
1144{
Sinclair Yeh810b3e162017-03-23 15:39:16 -07001145 struct vmw_private *dev_priv = vmw_priv(plane->dev);
Sinclair Yeh060e2ad2017-03-23 14:18:32 -07001146 struct drm_framebuffer *new_fb = new_state->fb;
1147 struct vmw_framebuffer *vfb;
1148 struct vmw_plane_state *vps = vmw_plane_state_to_vps(new_state);
1149 enum stdu_content_type new_content_type;
1150 struct vmw_framebuffer_surface *new_vfbs;
1151 struct drm_crtc *crtc = new_state->crtc;
1152 uint32_t hdisplay = new_state->crtc_w, vdisplay = new_state->crtc_h;
1153 int ret;
1154
1155 /* No FB to prepare */
1156 if (!new_fb) {
1157 if (vps->surf) {
1158 WARN_ON(vps->pinned != 0);
1159 vmw_surface_unreference(&vps->surf);
1160 }
1161
1162 return 0;
1163 }
1164
1165 vfb = vmw_framebuffer_to_vfb(new_fb);
1166 new_vfbs = (vfb->dmabuf) ? NULL : vmw_framebuffer_to_vfbs(new_fb);
1167
1168 if (new_vfbs && new_vfbs->surface->base_size.width == hdisplay &&
1169 new_vfbs->surface->base_size.height == vdisplay)
1170 new_content_type = SAME_AS_DISPLAY;
1171 else if (vfb->dmabuf)
1172 new_content_type = SEPARATE_DMA;
1173 else
1174 new_content_type = SEPARATE_SURFACE;
1175
1176 if (new_content_type != SAME_AS_DISPLAY) {
1177 struct vmw_surface content_srf;
1178 struct drm_vmw_size display_base_size = {0};
1179
1180 display_base_size.width = hdisplay;
1181 display_base_size.height = vdisplay;
1182 display_base_size.depth = 1;
1183
1184 /*
1185 * If content buffer is a DMA buf, then we have to construct
1186 * surface info
1187 */
1188 if (new_content_type == SEPARATE_DMA) {
1189
1190 switch (new_fb->format->cpp[0]*8) {
1191 case 32:
1192 content_srf.format = SVGA3D_X8R8G8B8;
1193 break;
1194
1195 case 16:
1196 content_srf.format = SVGA3D_R5G6B5;
1197 break;
1198
1199 case 8:
1200 content_srf.format = SVGA3D_P8;
1201 break;
1202
1203 default:
1204 DRM_ERROR("Invalid format\n");
1205 return -EINVAL;
1206 }
1207
1208 content_srf.flags = 0;
1209 content_srf.mip_levels[0] = 1;
1210 content_srf.multisample_count = 0;
1211 } else {
1212 content_srf = *new_vfbs->surface;
1213 }
1214
1215 if (vps->surf) {
1216 struct drm_vmw_size cur_base_size = vps->surf->base_size;
1217
1218 if (cur_base_size.width != display_base_size.width ||
1219 cur_base_size.height != display_base_size.height ||
1220 vps->surf->format != content_srf.format) {
1221 WARN_ON(vps->pinned != 0);
1222 vmw_surface_unreference(&vps->surf);
1223 }
1224
1225 }
1226
1227 if (!vps->surf) {
1228 ret = vmw_surface_gb_priv_define
1229 (crtc->dev,
1230 /* Kernel visible only */
1231 0,
1232 content_srf.flags,
1233 content_srf.format,
1234 true, /* a scanout buffer */
1235 content_srf.mip_levels[0],
1236 content_srf.multisample_count,
1237 0,
1238 display_base_size,
1239 &vps->surf);
1240 if (ret != 0) {
1241 DRM_ERROR("Couldn't allocate STDU surface.\n");
1242 return ret;
1243 }
1244 }
1245 } else {
1246 /*
1247 * prepare_fb and clean_fb should only take care of pinning
1248 * and unpinning. References are tracked by state objects.
1249 * The only time we add a reference in prepare_fb is if the
1250 * state object doesn't have a reference to begin with
1251 */
1252 if (vps->surf) {
1253 WARN_ON(vps->pinned != 0);
1254 vmw_surface_unreference(&vps->surf);
1255 }
1256
1257 vps->surf = vmw_surface_reference(new_vfbs->surface);
1258 }
1259
1260 if (vps->surf) {
1261
1262 /* Pin new surface before flipping */
1263 ret = vmw_resource_pin(&vps->surf->res, false);
1264 if (ret)
1265 goto out_srf_unref;
1266
1267 vps->pinned++;
1268 }
1269
1270 vps->content_fb_type = new_content_type;
Sinclair Yeh810b3e162017-03-23 15:39:16 -07001271
1272 /*
1273 * This should only happen if the DMA buf is too large to create a
1274 * proxy surface for.
1275 * If we are a 2D VM with a DMA buffer then we have to use CPU blit
1276 * so cache these mappings
1277 */
1278 if (vps->content_fb_type == SEPARATE_DMA &&
1279 !(dev_priv->capabilities & SVGA_CAP_3D)) {
1280
1281 struct vmw_framebuffer_dmabuf *new_vfbd;
1282
1283 new_vfbd = vmw_framebuffer_to_vfbd(new_fb);
1284
1285 ret = ttm_bo_reserve(&new_vfbd->buffer->base, false, false,
1286 NULL);
1287 if (ret)
1288 goto out_srf_unpin;
1289
1290 ret = ttm_bo_kmap(&new_vfbd->buffer->base, 0,
1291 new_vfbd->buffer->base.num_pages,
1292 &vps->guest_map);
1293
1294 ttm_bo_unreserve(&new_vfbd->buffer->base);
1295
1296 if (ret) {
1297 DRM_ERROR("Failed to map content buffer to CPU\n");
1298 goto out_srf_unpin;
1299 }
1300
1301 ret = ttm_bo_kmap(&vps->surf->res.backup->base, 0,
1302 vps->surf->res.backup->base.num_pages,
1303 &vps->host_map);
1304 if (ret) {
1305 DRM_ERROR("Failed to map display buffer to CPU\n");
1306 ttm_bo_kunmap(&vps->guest_map);
1307 goto out_srf_unpin;
1308 }
1309
1310 vps->cpp = new_fb->pitches[0] / new_fb->width;
1311 }
1312
Sinclair Yeh060e2ad2017-03-23 14:18:32 -07001313 return 0;
1314
Sinclair Yeh810b3e162017-03-23 15:39:16 -07001315out_srf_unpin:
1316 vmw_resource_unpin(&vps->surf->res);
1317 vps->pinned--;
1318
Sinclair Yeh060e2ad2017-03-23 14:18:32 -07001319out_srf_unref:
1320 vmw_surface_unreference(&vps->surf);
1321 return ret;
1322}
1323
1324
1325
1326/**
1327 * vmw_stdu_primary_plane_atomic_update - formally switches STDU to new plane
1328 *
1329 * @plane: display plane
1330 * @old_state: Only used to get crtc info
1331 *
1332 * Formally update stdu->display_srf to the new plane, and bind the new
1333 * plane STDU. This function is called during the commit phase when
1334 * all the preparation have been done and all the configurations have
1335 * been checked.
1336 */
1337static void
1338vmw_stdu_primary_plane_atomic_update(struct drm_plane *plane,
1339 struct drm_plane_state *old_state)
1340{
1341 struct vmw_private *dev_priv;
1342 struct vmw_screen_target_display_unit *stdu;
1343 struct vmw_plane_state *vps = vmw_plane_state_to_vps(plane->state);
1344 struct drm_crtc *crtc = plane->state->crtc ?: old_state->crtc;
1345 int ret;
1346
1347 stdu = vmw_crtc_to_stdu(crtc);
1348 dev_priv = vmw_priv(crtc->dev);
1349
1350 stdu->display_srf = vps->surf;
1351 stdu->content_fb_type = vps->content_fb_type;
Sinclair Yeh810b3e162017-03-23 15:39:16 -07001352 stdu->cpp = vps->cpp;
1353 memcpy(&stdu->guest_map, &vps->guest_map, sizeof(vps->guest_map));
1354 memcpy(&stdu->host_map, &vps->host_map, sizeof(vps->host_map));
Sinclair Yeh060e2ad2017-03-23 14:18:32 -07001355
1356 if (!stdu->defined)
1357 return;
1358
1359 if (plane->state->fb)
1360 ret = vmw_stdu_bind_st(dev_priv, stdu, &stdu->display_srf->res);
1361 else
1362 ret = vmw_stdu_bind_st(dev_priv, stdu, NULL);
1363
1364 /*
1365 * We cannot really fail this function, so if we do, then output an
1366 * error and quit
1367 */
1368 if (ret)
1369 DRM_ERROR("Failed to bind surface to STDU.\n");
1370 else
1371 crtc->primary->fb = plane->state->fb;
Sinclair Yeh8a309c82017-06-02 07:53:27 +02001372
1373 ret = vmw_stdu_update_st(dev_priv, stdu);
1374
1375 if (ret)
1376 DRM_ERROR("Failed to update STDU.\n");
Sinclair Yeh060e2ad2017-03-23 14:18:32 -07001377}
1378
1379
Sinclair Yeh36cc79b2017-03-23 11:28:11 -07001380static const struct drm_plane_funcs vmw_stdu_plane_funcs = {
Sinclair Yeh904bb5e2017-03-23 14:29:22 -07001381 .update_plane = drm_atomic_helper_update_plane,
1382 .disable_plane = drm_atomic_helper_disable_plane,
Sinclair Yeh36cc79b2017-03-23 11:28:11 -07001383 .destroy = vmw_du_primary_plane_destroy,
Sinclair Yehcc5ec452017-03-23 11:36:05 -07001384 .reset = vmw_du_plane_reset,
1385 .atomic_duplicate_state = vmw_du_plane_duplicate_state,
1386 .atomic_destroy_state = vmw_du_plane_destroy_state,
Sinclair Yeh36cc79b2017-03-23 11:28:11 -07001387};
1388
1389static const struct drm_plane_funcs vmw_stdu_cursor_funcs = {
Sinclair Yeh904bb5e2017-03-23 14:29:22 -07001390 .update_plane = drm_atomic_helper_update_plane,
1391 .disable_plane = drm_atomic_helper_disable_plane,
Sinclair Yeh36cc79b2017-03-23 11:28:11 -07001392 .destroy = vmw_du_cursor_plane_destroy,
Sinclair Yehcc5ec452017-03-23 11:36:05 -07001393 .reset = vmw_du_plane_reset,
1394 .atomic_duplicate_state = vmw_du_plane_duplicate_state,
1395 .atomic_destroy_state = vmw_du_plane_destroy_state,
Sinclair Yeh36cc79b2017-03-23 11:28:11 -07001396};
1397
1398
Sinclair Yeh06ec4192017-03-23 13:14:54 -07001399/*
1400 * Atomic Helpers
1401 */
Sinclair Yeh060e2ad2017-03-23 14:18:32 -07001402static const struct
1403drm_plane_helper_funcs vmw_stdu_cursor_plane_helper_funcs = {
1404 .atomic_check = vmw_du_cursor_plane_atomic_check,
1405 .atomic_update = vmw_du_cursor_plane_atomic_update,
1406 .prepare_fb = vmw_du_cursor_plane_prepare_fb,
1407 .cleanup_fb = vmw_du_plane_cleanup_fb,
1408};
1409
1410static const struct
1411drm_plane_helper_funcs vmw_stdu_primary_plane_helper_funcs = {
1412 .atomic_check = vmw_du_primary_plane_atomic_check,
1413 .atomic_update = vmw_stdu_primary_plane_atomic_update,
1414 .prepare_fb = vmw_stdu_primary_plane_prepare_fb,
1415 .cleanup_fb = vmw_stdu_primary_plane_cleanup_fb,
1416};
1417
Sinclair Yeh06ec4192017-03-23 13:14:54 -07001418static const struct drm_crtc_helper_funcs vmw_stdu_crtc_helper_funcs = {
1419 .prepare = vmw_stdu_crtc_helper_prepare,
Sinclair Yeh06ec4192017-03-23 13:14:54 -07001420 .mode_set_nofb = vmw_stdu_crtc_mode_set_nofb,
1421 .atomic_check = vmw_du_crtc_atomic_check,
1422 .atomic_begin = vmw_du_crtc_atomic_begin,
1423 .atomic_flush = vmw_du_crtc_atomic_flush,
Laurent Pinchart0b20a0f2017-06-30 12:36:44 +03001424 .atomic_enable = vmw_stdu_crtc_atomic_enable,
Laurent Pinchart64581712017-06-30 12:36:45 +03001425 .atomic_disable = vmw_stdu_crtc_atomic_disable,
Sinclair Yeh06ec4192017-03-23 13:14:54 -07001426};
1427
1428
Sinclair Yeh35c05122015-06-26 01:42:06 -07001429/**
1430 * vmw_stdu_init - Sets up a Screen Target Display Unit
1431 *
1432 * @dev_priv: VMW DRM device
1433 * @unit: unit number range from 0 to VMWGFX_NUM_DISPLAY_UNITS
1434 *
1435 * This function is called once per CRTC, and allocates one Screen Target
1436 * display unit to represent that CRTC. Since the SVGA device does not separate
1437 * out encoder and connector, they are represented as part of the STDU as well.
1438 */
1439static int vmw_stdu_init(struct vmw_private *dev_priv, unsigned unit)
1440{
1441 struct vmw_screen_target_display_unit *stdu;
1442 struct drm_device *dev = dev_priv->dev;
1443 struct drm_connector *connector;
1444 struct drm_encoder *encoder;
Sinclair Yeh36cc79b2017-03-23 11:28:11 -07001445 struct drm_plane *primary, *cursor;
Sinclair Yeh35c05122015-06-26 01:42:06 -07001446 struct drm_crtc *crtc;
Sinclair Yeh36cc79b2017-03-23 11:28:11 -07001447 int ret;
Sinclair Yeh35c05122015-06-26 01:42:06 -07001448
1449
1450 stdu = kzalloc(sizeof(*stdu), GFP_KERNEL);
1451 if (!stdu)
1452 return -ENOMEM;
1453
1454 stdu->base.unit = unit;
1455 crtc = &stdu->base.crtc;
1456 encoder = &stdu->base.encoder;
1457 connector = &stdu->base.connector;
Sinclair Yeh36cc79b2017-03-23 11:28:11 -07001458 primary = &stdu->base.primary;
1459 cursor = &stdu->base.cursor;
Sinclair Yeh35c05122015-06-26 01:42:06 -07001460
1461 stdu->base.pref_active = (unit == 0);
1462 stdu->base.pref_width = dev_priv->initial_width;
1463 stdu->base.pref_height = dev_priv->initial_height;
Sinclair Yeh9c2542a2017-03-23 11:33:39 -07001464
1465 /*
1466 * Remove this after enabling atomic because property values can
1467 * only exist in a state object
1468 */
Thomas Hellstrom2e69b252016-02-12 09:59:50 +01001469 stdu->base.is_implicit = false;
Sinclair Yeh35c05122015-06-26 01:42:06 -07001470
Sinclair Yeh36cc79b2017-03-23 11:28:11 -07001471 /* Initialize primary plane */
Sinclair Yehcc5ec452017-03-23 11:36:05 -07001472 vmw_du_plane_reset(primary);
1473
Sinclair Yeh36cc79b2017-03-23 11:28:11 -07001474 ret = drm_universal_plane_init(dev, primary,
1475 0, &vmw_stdu_plane_funcs,
1476 vmw_primary_plane_formats,
1477 ARRAY_SIZE(vmw_primary_plane_formats),
Ben Widawskye6fc3b62017-07-23 20:46:38 -07001478 NULL, DRM_PLANE_TYPE_PRIMARY, NULL);
Sinclair Yeh36cc79b2017-03-23 11:28:11 -07001479 if (ret) {
1480 DRM_ERROR("Failed to initialize primary plane");
1481 goto err_free;
1482 }
1483
Sinclair Yeh060e2ad2017-03-23 14:18:32 -07001484 drm_plane_helper_add(primary, &vmw_stdu_primary_plane_helper_funcs);
1485
Sinclair Yeh36cc79b2017-03-23 11:28:11 -07001486 /* Initialize cursor plane */
Sinclair Yehcc5ec452017-03-23 11:36:05 -07001487 vmw_du_plane_reset(cursor);
1488
Sinclair Yeh36cc79b2017-03-23 11:28:11 -07001489 ret = drm_universal_plane_init(dev, cursor,
1490 0, &vmw_stdu_cursor_funcs,
1491 vmw_cursor_plane_formats,
1492 ARRAY_SIZE(vmw_cursor_plane_formats),
Ben Widawskye6fc3b62017-07-23 20:46:38 -07001493 NULL, DRM_PLANE_TYPE_CURSOR, NULL);
Sinclair Yeh36cc79b2017-03-23 11:28:11 -07001494 if (ret) {
1495 DRM_ERROR("Failed to initialize cursor plane");
1496 drm_plane_cleanup(&stdu->base.primary);
1497 goto err_free;
1498 }
1499
Sinclair Yeh060e2ad2017-03-23 14:18:32 -07001500 drm_plane_helper_add(cursor, &vmw_stdu_cursor_plane_helper_funcs);
1501
Sinclair Yehd7721ca2017-03-23 11:48:44 -07001502 vmw_du_connector_reset(connector);
1503
Sinclair Yeh36cc79b2017-03-23 11:28:11 -07001504 ret = drm_connector_init(dev, connector, &vmw_stdu_connector_funcs,
1505 DRM_MODE_CONNECTOR_VIRTUAL);
1506 if (ret) {
1507 DRM_ERROR("Failed to initialize connector\n");
1508 goto err_free;
1509 }
Sinclair Yehd947d1b2017-03-23 14:23:20 -07001510
1511 drm_connector_helper_add(connector, &vmw_stdu_connector_helper_funcs);
Sinclair Yeh35c05122015-06-26 01:42:06 -07001512 connector->status = vmw_du_connector_detect(connector, false);
Sinclair Yehd7721ca2017-03-23 11:48:44 -07001513 vmw_connector_state_to_vcs(connector->state)->is_implicit = false;
Sinclair Yeh35c05122015-06-26 01:42:06 -07001514
Sinclair Yeh36cc79b2017-03-23 11:28:11 -07001515 ret = drm_encoder_init(dev, encoder, &vmw_stdu_encoder_funcs,
1516 DRM_MODE_ENCODER_VIRTUAL, NULL);
1517 if (ret) {
1518 DRM_ERROR("Failed to initialize encoder\n");
1519 goto err_free_connector;
1520 }
1521
1522 (void) drm_mode_connector_attach_encoder(connector, encoder);
Sinclair Yeh35c05122015-06-26 01:42:06 -07001523 encoder->possible_crtcs = (1 << unit);
1524 encoder->possible_clones = 0;
1525
Sinclair Yeh36cc79b2017-03-23 11:28:11 -07001526 ret = drm_connector_register(connector);
1527 if (ret) {
1528 DRM_ERROR("Failed to register connector\n");
1529 goto err_free_encoder;
1530 }
Sinclair Yeh35c05122015-06-26 01:42:06 -07001531
Sinclair Yehd7721ca2017-03-23 11:48:44 -07001532 vmw_du_crtc_reset(crtc);
Sinclair Yeh36cc79b2017-03-23 11:28:11 -07001533 ret = drm_crtc_init_with_planes(dev, crtc, &stdu->base.primary,
1534 &stdu->base.cursor,
1535 &vmw_stdu_crtc_funcs, NULL);
1536 if (ret) {
1537 DRM_ERROR("Failed to initialize CRTC\n");
1538 goto err_free_unregister;
1539 }
Sinclair Yeh35c05122015-06-26 01:42:06 -07001540
Sinclair Yeh06ec4192017-03-23 13:14:54 -07001541 drm_crtc_helper_add(crtc, &vmw_stdu_crtc_helper_funcs);
1542
Sinclair Yeh35c05122015-06-26 01:42:06 -07001543 drm_mode_crtc_set_gamma_size(crtc, 256);
1544
1545 drm_object_attach_property(&connector->base,
Thomas Hellstrom578e6092016-02-12 09:45:42 +01001546 dev_priv->hotplug_mode_update_property, 1);
1547 drm_object_attach_property(&connector->base,
1548 dev->mode_config.suggested_x_property, 0);
1549 drm_object_attach_property(&connector->base,
1550 dev->mode_config.suggested_y_property, 0);
Thomas Hellstrom76404ac2016-02-12 09:55:45 +01001551 if (dev_priv->implicit_placement_property)
1552 drm_object_attach_property
1553 (&connector->base,
1554 dev_priv->implicit_placement_property,
1555 stdu->base.is_implicit);
Sinclair Yeh35c05122015-06-26 01:42:06 -07001556 return 0;
Sinclair Yeh36cc79b2017-03-23 11:28:11 -07001557
1558err_free_unregister:
1559 drm_connector_unregister(connector);
1560err_free_encoder:
1561 drm_encoder_cleanup(encoder);
1562err_free_connector:
1563 drm_connector_cleanup(connector);
1564err_free:
1565 kfree(stdu);
1566 return ret;
Sinclair Yeh35c05122015-06-26 01:42:06 -07001567}
1568
1569
1570
1571/**
1572 * vmw_stdu_destroy - Cleans up a vmw_screen_target_display_unit
1573 *
1574 * @stdu: Screen Target Display Unit to be destroyed
1575 *
1576 * Clean up after vmw_stdu_init
1577 */
1578static void vmw_stdu_destroy(struct vmw_screen_target_display_unit *stdu)
1579{
Sinclair Yeh35c05122015-06-26 01:42:06 -07001580 vmw_du_cleanup(&stdu->base);
1581 kfree(stdu);
1582}
1583
1584
1585
1586/******************************************************************************
1587 * Screen Target Display KMS Functions
1588 *
1589 * These functions are called by the common KMS code in vmwgfx_kms.c
1590 *****************************************************************************/
1591
1592/**
1593 * vmw_kms_stdu_init_display - Initializes a Screen Target based display
1594 *
1595 * @dev_priv: VMW DRM device
1596 *
1597 * This function initialize a Screen Target based display device. It checks
1598 * the capability bits to make sure the underlying hardware can support
1599 * screen targets, and then creates the maximum number of CRTCs, a.k.a Display
1600 * Units, as supported by the display hardware.
1601 *
1602 * RETURNS:
1603 * 0 on success, error code otherwise
1604 */
1605int vmw_kms_stdu_init_display(struct vmw_private *dev_priv)
1606{
1607 struct drm_device *dev = dev_priv->dev;
1608 int i, ret;
1609
1610
1611 /* Do nothing if Screen Target support is turned off */
1612 if (!VMWGFX_ENABLE_SCREEN_TARGET_OTABLE)
1613 return -ENOSYS;
1614
Sinclair Yehf89c6c32015-06-26 01:54:28 -07001615 if (!(dev_priv->capabilities & SVGA_CAP_GBOBJECTS))
Sinclair Yeh35c05122015-06-26 01:42:06 -07001616 return -ENOSYS;
1617
1618 ret = drm_vblank_init(dev, VMWGFX_NUM_DISPLAY_UNITS);
1619 if (unlikely(ret != 0))
1620 return ret;
1621
Thomas Hellstrom6bf6bf02015-06-26 02:22:40 -07001622 dev_priv->active_display_unit = vmw_du_screen_target;
1623
Sinclair Yeh28c95422017-03-27 11:12:27 -07001624 if (dev_priv->capabilities & SVGA_CAP_3D) {
1625 /*
1626 * For 3D VMs, display (scanout) buffer size is the smaller of
1627 * max texture and max STDU
1628 */
1629 uint32_t max_width, max_height;
1630
1631 max_width = min(dev_priv->texture_max_width,
1632 dev_priv->stdu_max_width);
1633 max_height = min(dev_priv->texture_max_height,
1634 dev_priv->stdu_max_height);
1635
1636 dev->mode_config.max_width = max_width;
1637 dev->mode_config.max_height = max_height;
1638 } else {
Sinclair Yeh810b3e162017-03-23 15:39:16 -07001639 /*
1640 * Given various display aspect ratios, there's no way to
1641 * estimate these using prim_bb_mem. So just set these to
1642 * something arbitrarily large and we will reject any layout
1643 * that doesn't fit prim_bb_mem later
1644 */
1645 dev->mode_config.max_width = 16384;
1646 dev->mode_config.max_height = 16384;
1647 }
1648
Thomas Hellstrom76404ac2016-02-12 09:55:45 +01001649 vmw_kms_create_implicit_placement_property(dev_priv, false);
1650
Sinclair Yeh35c05122015-06-26 01:42:06 -07001651 for (i = 0; i < VMWGFX_NUM_DISPLAY_UNITS; ++i) {
1652 ret = vmw_stdu_init(dev_priv, i);
1653
1654 if (unlikely(ret != 0)) {
1655 DRM_ERROR("Failed to initialize STDU %d", i);
Daniel Vetter5f58e972017-06-26 18:19:48 +02001656 return ret;
Sinclair Yeh35c05122015-06-26 01:42:06 -07001657 }
1658 }
1659
Sinclair Yeh35c05122015-06-26 01:42:06 -07001660 DRM_INFO("Screen Target Display device initialized\n");
1661
1662 return 0;
Sinclair Yeh35c05122015-06-26 01:42:06 -07001663}