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Jerome Anand5dab11d2017-01-25 04:27:52 +05301/*
2 * intel_hdmi_audio.c - Intel HDMI audio driver
3 *
4 * Copyright (C) 2016 Intel Corp
5 * Authors: Sailaja Bandarupalli <sailaja.bandarupalli@intel.com>
6 * Ramesh Babu K V <ramesh.babu@intel.com>
7 * Vaibhav Agarwal <vaibhav.agarwal@intel.com>
8 * Jerome Anand <jerome.anand@intel.com>
9 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
10 *
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License as published by
13 * the Free Software Foundation; version 2 of the License.
14 *
15 * This program is distributed in the hope that it will be useful, but
16 * WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
18 * General Public License for more details.
19 *
20 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
21 * ALSA driver for Intel HDMI audio
22 */
23
Takashi Iwai03c34372017-02-02 16:19:03 +010024#include <linux/types.h>
Jerome Anand5dab11d2017-01-25 04:27:52 +053025#include <linux/platform_device.h>
26#include <linux/io.h>
27#include <linux/slab.h>
28#include <linux/module.h>
Takashi Iwaida864802017-01-31 13:52:22 +010029#include <linux/interrupt.h>
Takashi Iwai03c34372017-02-02 16:19:03 +010030#include <linux/pm_runtime.h>
Takashi Iwai412bbe7d52017-02-02 22:03:22 +010031#include <linux/dma-mapping.h>
Jerome Anand5dab11d2017-01-25 04:27:52 +053032#include <asm/cacheflush.h>
Jerome Anand5dab11d2017-01-25 04:27:52 +053033#include <sound/core.h>
Takashi Iwai03c34372017-02-02 16:19:03 +010034#include <sound/asoundef.h>
35#include <sound/pcm.h>
Jerome Anand5dab11d2017-01-25 04:27:52 +053036#include <sound/pcm_params.h>
37#include <sound/initval.h>
38#include <sound/control.h>
Takashi Iwai03c34372017-02-02 16:19:03 +010039#include <drm/drm_edid.h>
Takashi Iwaida864802017-01-31 13:52:22 +010040#include <drm/intel_lpe_audio.h>
Jerome Anand5dab11d2017-01-25 04:27:52 +053041#include "intel_hdmi_audio.h"
42
Jerome Anand5dab11d2017-01-25 04:27:52 +053043/*standard module options for ALSA. This module supports only one card*/
44static int hdmi_card_index = SNDRV_DEFAULT_IDX1;
45static char *hdmi_card_id = SNDRV_DEFAULT_STR1;
Jerome Anand5dab11d2017-01-25 04:27:52 +053046
47module_param_named(index, hdmi_card_index, int, 0444);
48MODULE_PARM_DESC(index,
49 "Index value for INTEL Intel HDMI Audio controller.");
50module_param_named(id, hdmi_card_id, charp, 0444);
51MODULE_PARM_DESC(id,
52 "ID string for INTEL Intel HDMI Audio controller.");
53
54/*
55 * ELD SA bits in the CEA Speaker Allocation data block
56 */
Takashi Iwai4a5ddb22017-02-01 16:45:38 +010057static const int eld_speaker_allocation_bits[] = {
Jerome Anand5dab11d2017-01-25 04:27:52 +053058 [0] = FL | FR,
59 [1] = LFE,
60 [2] = FC,
61 [3] = RL | RR,
62 [4] = RC,
63 [5] = FLC | FRC,
64 [6] = RLC | RRC,
65 /* the following are not defined in ELD yet */
66 [7] = 0,
67};
68
69/*
70 * This is an ordered list!
71 *
72 * The preceding ones have better chances to be selected by
73 * hdmi_channel_allocation().
74 */
75static struct cea_channel_speaker_allocation channel_allocations[] = {
76/* channel: 7 6 5 4 3 2 1 0 */
77{ .ca_index = 0x00, .speakers = { 0, 0, 0, 0, 0, 0, FR, FL } },
78 /* 2.1 */
79{ .ca_index = 0x01, .speakers = { 0, 0, 0, 0, 0, LFE, FR, FL } },
80 /* Dolby Surround */
81{ .ca_index = 0x02, .speakers = { 0, 0, 0, 0, FC, 0, FR, FL } },
82 /* surround40 */
83{ .ca_index = 0x08, .speakers = { 0, 0, RR, RL, 0, 0, FR, FL } },
84 /* surround41 */
85{ .ca_index = 0x09, .speakers = { 0, 0, RR, RL, 0, LFE, FR, FL } },
86 /* surround50 */
87{ .ca_index = 0x0a, .speakers = { 0, 0, RR, RL, FC, 0, FR, FL } },
88 /* surround51 */
89{ .ca_index = 0x0b, .speakers = { 0, 0, RR, RL, FC, LFE, FR, FL } },
90 /* 6.1 */
91{ .ca_index = 0x0f, .speakers = { 0, RC, RR, RL, FC, LFE, FR, FL } },
92 /* surround71 */
93{ .ca_index = 0x13, .speakers = { RRC, RLC, RR, RL, FC, LFE, FR, FL } },
94
95{ .ca_index = 0x03, .speakers = { 0, 0, 0, 0, FC, LFE, FR, FL } },
96{ .ca_index = 0x04, .speakers = { 0, 0, 0, RC, 0, 0, FR, FL } },
97{ .ca_index = 0x05, .speakers = { 0, 0, 0, RC, 0, LFE, FR, FL } },
98{ .ca_index = 0x06, .speakers = { 0, 0, 0, RC, FC, 0, FR, FL } },
99{ .ca_index = 0x07, .speakers = { 0, 0, 0, RC, FC, LFE, FR, FL } },
100{ .ca_index = 0x0c, .speakers = { 0, RC, RR, RL, 0, 0, FR, FL } },
101{ .ca_index = 0x0d, .speakers = { 0, RC, RR, RL, 0, LFE, FR, FL } },
102{ .ca_index = 0x0e, .speakers = { 0, RC, RR, RL, FC, 0, FR, FL } },
103{ .ca_index = 0x10, .speakers = { RRC, RLC, RR, RL, 0, 0, FR, FL } },
104{ .ca_index = 0x11, .speakers = { RRC, RLC, RR, RL, 0, LFE, FR, FL } },
105{ .ca_index = 0x12, .speakers = { RRC, RLC, RR, RL, FC, 0, FR, FL } },
106{ .ca_index = 0x14, .speakers = { FRC, FLC, 0, 0, 0, 0, FR, FL } },
107{ .ca_index = 0x15, .speakers = { FRC, FLC, 0, 0, 0, LFE, FR, FL } },
108{ .ca_index = 0x16, .speakers = { FRC, FLC, 0, 0, FC, 0, FR, FL } },
109{ .ca_index = 0x17, .speakers = { FRC, FLC, 0, 0, FC, LFE, FR, FL } },
110{ .ca_index = 0x18, .speakers = { FRC, FLC, 0, RC, 0, 0, FR, FL } },
111{ .ca_index = 0x19, .speakers = { FRC, FLC, 0, RC, 0, LFE, FR, FL } },
112{ .ca_index = 0x1a, .speakers = { FRC, FLC, 0, RC, FC, 0, FR, FL } },
113{ .ca_index = 0x1b, .speakers = { FRC, FLC, 0, RC, FC, LFE, FR, FL } },
114{ .ca_index = 0x1c, .speakers = { FRC, FLC, RR, RL, 0, 0, FR, FL } },
115{ .ca_index = 0x1d, .speakers = { FRC, FLC, RR, RL, 0, LFE, FR, FL } },
116{ .ca_index = 0x1e, .speakers = { FRC, FLC, RR, RL, FC, 0, FR, FL } },
117{ .ca_index = 0x1f, .speakers = { FRC, FLC, RR, RL, FC, LFE, FR, FL } },
118};
119
Takashi Iwai4a5ddb22017-02-01 16:45:38 +0100120static const struct channel_map_table map_tables[] = {
Jerome Anand5dab11d2017-01-25 04:27:52 +0530121 { SNDRV_CHMAP_FL, 0x00, FL },
122 { SNDRV_CHMAP_FR, 0x01, FR },
123 { SNDRV_CHMAP_RL, 0x04, RL },
124 { SNDRV_CHMAP_RR, 0x05, RR },
125 { SNDRV_CHMAP_LFE, 0x02, LFE },
126 { SNDRV_CHMAP_FC, 0x03, FC },
127 { SNDRV_CHMAP_RLC, 0x06, RLC },
128 { SNDRV_CHMAP_RRC, 0x07, RRC },
129 {} /* terminator */
130};
131
132/* hardware capability structure */
Takashi Iwaib5562902017-02-04 22:05:33 +0100133static const struct snd_pcm_hardware had_pcm_hardware = {
Jerome Anand5dab11d2017-01-25 04:27:52 +0530134 .info = (SNDRV_PCM_INFO_INTERLEAVED |
Takashi Iwaia9ebdd02017-02-02 21:33:54 +0100135 SNDRV_PCM_INFO_MMAP |
Takashi Iwaie8de9852017-02-07 08:09:12 +0100136 SNDRV_PCM_INFO_MMAP_VALID |
137 SNDRV_PCM_INFO_NO_PERIOD_WAKEUP),
Takashi Iwai3e21a762017-02-07 08:13:50 +0100138 .formats = SNDRV_PCM_FMTBIT_S24,
Jerome Anand5dab11d2017-01-25 04:27:52 +0530139 .rates = SNDRV_PCM_RATE_32000 |
140 SNDRV_PCM_RATE_44100 |
141 SNDRV_PCM_RATE_48000 |
142 SNDRV_PCM_RATE_88200 |
143 SNDRV_PCM_RATE_96000 |
144 SNDRV_PCM_RATE_176400 |
145 SNDRV_PCM_RATE_192000,
146 .rate_min = HAD_MIN_RATE,
147 .rate_max = HAD_MAX_RATE,
148 .channels_min = HAD_MIN_CHANNEL,
149 .channels_max = HAD_MAX_CHANNEL,
150 .buffer_bytes_max = HAD_MAX_BUFFER,
151 .period_bytes_min = HAD_MIN_PERIOD_BYTES,
152 .period_bytes_max = HAD_MAX_PERIOD_BYTES,
153 .periods_min = HAD_MIN_PERIODS,
154 .periods_max = HAD_MAX_PERIODS,
155 .fifo_size = HAD_FIFO_SIZE,
156};
157
Takashi Iwai313d9f22017-02-02 13:00:12 +0100158/* Get the active PCM substream;
159 * Call had_substream_put() for unreferecing.
160 * Don't call this inside had_spinlock, as it takes by itself
161 */
162static struct snd_pcm_substream *
163had_substream_get(struct snd_intelhad *intelhaddata)
164{
165 struct snd_pcm_substream *substream;
166 unsigned long flags;
167
168 spin_lock_irqsave(&intelhaddata->had_spinlock, flags);
169 substream = intelhaddata->stream_info.substream;
170 if (substream)
171 intelhaddata->stream_info.substream_refcount++;
172 spin_unlock_irqrestore(&intelhaddata->had_spinlock, flags);
173 return substream;
174}
175
176/* Unref the active PCM substream;
177 * Don't call this inside had_spinlock, as it takes by itself
178 */
179static void had_substream_put(struct snd_intelhad *intelhaddata)
180{
181 unsigned long flags;
182
183 spin_lock_irqsave(&intelhaddata->had_spinlock, flags);
184 intelhaddata->stream_info.substream_refcount--;
185 spin_unlock_irqrestore(&intelhaddata->had_spinlock, flags);
186}
187
Jerome Anand5dab11d2017-01-25 04:27:52 +0530188/* Register access functions */
Takashi Iwai83af57d2017-02-03 08:50:06 +0100189static void had_read_register(struct snd_intelhad *ctx, u32 reg, u32 *val)
Jerome Anand5dab11d2017-01-25 04:27:52 +0530190{
Takashi Iwaida864802017-01-31 13:52:22 +0100191 *val = ioread32(ctx->mmio_start + ctx->had_config_offset + reg);
Jerome Anand5dab11d2017-01-25 04:27:52 +0530192}
193
Takashi Iwai83af57d2017-02-03 08:50:06 +0100194static void had_write_register(struct snd_intelhad *ctx, u32 reg, u32 val)
Jerome Anand5dab11d2017-01-25 04:27:52 +0530195{
Takashi Iwaida864802017-01-31 13:52:22 +0100196 iowrite32(val, ctx->mmio_start + ctx->had_config_offset + reg);
Jerome Anand5dab11d2017-01-25 04:27:52 +0530197}
198
Takashi Iwaida864802017-01-31 13:52:22 +0100199/*
Takashi Iwai313d9f22017-02-02 13:00:12 +0100200 * enable / disable audio configuration
201 *
Takashi Iwai83af57d2017-02-03 08:50:06 +0100202 * The normal read/modify should not directly be used on VLV2 for
Takashi Iwaida864802017-01-31 13:52:22 +0100203 * updating AUD_CONFIG register.
Jerome Anand5dab11d2017-01-25 04:27:52 +0530204 * This is because:
205 * Bit6 of AUD_CONFIG register is writeonly due to a silicon bug on VLV2
206 * HDMI IP. As a result a read-modify of AUD_CONFIG regiter will always
207 * clear bit6. AUD_CONFIG[6:4] represents the "channels" field of the
208 * register. This field should be 1xy binary for configuration with 6 or
209 * more channels. Read-modify of AUD_CONFIG (Eg. for enabling audio)
210 * causes the "channels" field to be updated as 0xy binary resulting in
211 * bad audio. The fix is to always write the AUD_CONFIG[6:4] with
212 * appropriate value when doing read-modify of AUD_CONFIG register.
Jerome Anand5dab11d2017-01-25 04:27:52 +0530213 */
Takashi Iwai40ce4b52017-02-07 16:17:06 +0100214static void had_enable_audio(struct snd_intelhad *intelhaddata,
Takashi Iwaib5562902017-02-04 22:05:33 +0100215 bool enable)
Jerome Anand5dab11d2017-01-25 04:27:52 +0530216{
Takashi Iwai40ce4b52017-02-07 16:17:06 +0100217 /* update the cached value */
218 intelhaddata->aud_config.regx.aud_en = enable;
219 had_write_register(intelhaddata, AUD_CONFIG,
220 intelhaddata->aud_config.regval);
Jerome Anand5dab11d2017-01-25 04:27:52 +0530221}
222
Takashi Iwai075a1d42017-02-07 07:55:27 +0100223/* forcibly ACKs to both BUFFER_DONE and BUFFER_UNDERRUN interrupts */
224static void had_ack_irqs(struct snd_intelhad *ctx)
Jerome Anand5dab11d2017-01-25 04:27:52 +0530225{
Takashi Iwaida864802017-01-31 13:52:22 +0100226 u32 status_reg;
227
Takashi Iwai075a1d42017-02-07 07:55:27 +0100228 had_read_register(ctx, AUD_HDMI_STATUS, &status_reg);
229 status_reg |= HDMI_AUDIO_BUFFER_DONE | HDMI_AUDIO_UNDERRUN;
230 had_write_register(ctx, AUD_HDMI_STATUS, status_reg);
231 had_read_register(ctx, AUD_HDMI_STATUS, &status_reg);
Takashi Iwaida864802017-01-31 13:52:22 +0100232}
233
Takashi Iwaif4566aa2017-02-04 21:39:56 +0100234/* Reset buffer pointers */
235static void had_reset_audio(struct snd_intelhad *intelhaddata)
Jerome Anand5dab11d2017-01-25 04:27:52 +0530236{
Takashi Iwai77531be2017-02-07 12:17:23 +0100237 had_write_register(intelhaddata, AUD_HDMI_STATUS,
238 AUD_HDMI_STATUSG_MASK_FUNCRST);
Takashi Iwaif4566aa2017-02-04 21:39:56 +0100239 had_write_register(intelhaddata, AUD_HDMI_STATUS, 0);
Jerome Anand5dab11d2017-01-25 04:27:52 +0530240}
241
Takashi Iwai2e52f5e2017-01-31 17:09:13 +0100242/*
Jerome Anand5dab11d2017-01-25 04:27:52 +0530243 * initialize audio channel status registers
244 * This function is called in the prepare callback
245 */
246static int had_prog_status_reg(struct snd_pcm_substream *substream,
247 struct snd_intelhad *intelhaddata)
248{
Takashi Iwai7ceba752017-02-02 15:58:35 +0100249 union aud_cfg cfg_val = {.regval = 0};
250 union aud_ch_status_0 ch_stat0 = {.regval = 0};
251 union aud_ch_status_1 ch_stat1 = {.regval = 0};
Jerome Anand5dab11d2017-01-25 04:27:52 +0530252 int format;
253
Takashi Iwai7ceba752017-02-02 15:58:35 +0100254 ch_stat0.regx.lpcm_id = (intelhaddata->aes_bits &
Takashi Iwai2e52f5e2017-01-31 17:09:13 +0100255 IEC958_AES0_NONAUDIO) >> 1;
Takashi Iwai7ceba752017-02-02 15:58:35 +0100256 ch_stat0.regx.clk_acc = (intelhaddata->aes_bits &
Takashi Iwai2e52f5e2017-01-31 17:09:13 +0100257 IEC958_AES3_CON_CLOCK) >> 4;
Takashi Iwai7ceba752017-02-02 15:58:35 +0100258 cfg_val.regx.val_bit = ch_stat0.regx.lpcm_id;
Jerome Anand5dab11d2017-01-25 04:27:52 +0530259
260 switch (substream->runtime->rate) {
261 case AUD_SAMPLE_RATE_32:
Takashi Iwai7ceba752017-02-02 15:58:35 +0100262 ch_stat0.regx.samp_freq = CH_STATUS_MAP_32KHZ;
Jerome Anand5dab11d2017-01-25 04:27:52 +0530263 break;
264
265 case AUD_SAMPLE_RATE_44_1:
Takashi Iwai7ceba752017-02-02 15:58:35 +0100266 ch_stat0.regx.samp_freq = CH_STATUS_MAP_44KHZ;
Jerome Anand5dab11d2017-01-25 04:27:52 +0530267 break;
268 case AUD_SAMPLE_RATE_48:
Takashi Iwai7ceba752017-02-02 15:58:35 +0100269 ch_stat0.regx.samp_freq = CH_STATUS_MAP_48KHZ;
Jerome Anand5dab11d2017-01-25 04:27:52 +0530270 break;
271 case AUD_SAMPLE_RATE_88_2:
Takashi Iwai7ceba752017-02-02 15:58:35 +0100272 ch_stat0.regx.samp_freq = CH_STATUS_MAP_88KHZ;
Jerome Anand5dab11d2017-01-25 04:27:52 +0530273 break;
274 case AUD_SAMPLE_RATE_96:
Takashi Iwai7ceba752017-02-02 15:58:35 +0100275 ch_stat0.regx.samp_freq = CH_STATUS_MAP_96KHZ;
Jerome Anand5dab11d2017-01-25 04:27:52 +0530276 break;
277 case AUD_SAMPLE_RATE_176_4:
Takashi Iwai7ceba752017-02-02 15:58:35 +0100278 ch_stat0.regx.samp_freq = CH_STATUS_MAP_176KHZ;
Jerome Anand5dab11d2017-01-25 04:27:52 +0530279 break;
280 case AUD_SAMPLE_RATE_192:
Takashi Iwai7ceba752017-02-02 15:58:35 +0100281 ch_stat0.regx.samp_freq = CH_STATUS_MAP_192KHZ;
Jerome Anand5dab11d2017-01-25 04:27:52 +0530282 break;
283
284 default:
285 /* control should never come here */
286 return -EINVAL;
Jerome Anand5dab11d2017-01-25 04:27:52 +0530287 }
Takashi Iwai2e52f5e2017-01-31 17:09:13 +0100288
Takashi Iwai79dda752017-01-30 17:23:39 +0100289 had_write_register(intelhaddata,
Takashi Iwai7ceba752017-02-02 15:58:35 +0100290 AUD_CH_STATUS_0, ch_stat0.regval);
Jerome Anand5dab11d2017-01-25 04:27:52 +0530291
292 format = substream->runtime->format;
293
294 if (format == SNDRV_PCM_FORMAT_S16_LE) {
Takashi Iwai7ceba752017-02-02 15:58:35 +0100295 ch_stat1.regx.max_wrd_len = MAX_SMPL_WIDTH_20;
296 ch_stat1.regx.wrd_len = SMPL_WIDTH_16BITS;
Jerome Anand5dab11d2017-01-25 04:27:52 +0530297 } else if (format == SNDRV_PCM_FORMAT_S24_LE) {
Takashi Iwai7ceba752017-02-02 15:58:35 +0100298 ch_stat1.regx.max_wrd_len = MAX_SMPL_WIDTH_24;
299 ch_stat1.regx.wrd_len = SMPL_WIDTH_24BITS;
Jerome Anand5dab11d2017-01-25 04:27:52 +0530300 } else {
Takashi Iwai7ceba752017-02-02 15:58:35 +0100301 ch_stat1.regx.max_wrd_len = 0;
302 ch_stat1.regx.wrd_len = 0;
Jerome Anand5dab11d2017-01-25 04:27:52 +0530303 }
Takashi Iwai2e52f5e2017-01-31 17:09:13 +0100304
Takashi Iwai79dda752017-01-30 17:23:39 +0100305 had_write_register(intelhaddata,
Takashi Iwai7ceba752017-02-02 15:58:35 +0100306 AUD_CH_STATUS_1, ch_stat1.regval);
Jerome Anand5dab11d2017-01-25 04:27:52 +0530307 return 0;
308}
309
Takashi Iwai76296ef2017-01-30 16:09:11 +0100310/*
Jerome Anand5dab11d2017-01-25 04:27:52 +0530311 * function to initialize audio
312 * registers and buffer confgiuration registers
313 * This function is called in the prepare callback
314 */
Takashi Iwaib5562902017-02-04 22:05:33 +0100315static int had_init_audio_ctrl(struct snd_pcm_substream *substream,
316 struct snd_intelhad *intelhaddata)
Jerome Anand5dab11d2017-01-25 04:27:52 +0530317{
Takashi Iwai7ceba752017-02-02 15:58:35 +0100318 union aud_cfg cfg_val = {.regval = 0};
319 union aud_buf_config buf_cfg = {.regval = 0};
Jerome Anand5dab11d2017-01-25 04:27:52 +0530320 u8 channels;
321
322 had_prog_status_reg(substream, intelhaddata);
323
Takashi Iwai7ceba752017-02-02 15:58:35 +0100324 buf_cfg.regx.audio_fifo_watermark = FIFO_THRESHOLD;
325 buf_cfg.regx.dma_fifo_watermark = DMA_FIFO_THRESHOLD;
326 buf_cfg.regx.aud_delay = 0;
327 had_write_register(intelhaddata, AUD_BUF_CONFIG, buf_cfg.regval);
Jerome Anand5dab11d2017-01-25 04:27:52 +0530328
329 channels = substream->runtime->channels;
Takashi Iwai7ceba752017-02-02 15:58:35 +0100330 cfg_val.regx.num_ch = channels - 2;
Jerome Anand5dab11d2017-01-25 04:27:52 +0530331 if (channels <= 2)
Takashi Iwai7ceba752017-02-02 15:58:35 +0100332 cfg_val.regx.layout = LAYOUT0;
Jerome Anand5dab11d2017-01-25 04:27:52 +0530333 else
Takashi Iwai7ceba752017-02-02 15:58:35 +0100334 cfg_val.regx.layout = LAYOUT1;
Jerome Anand5dab11d2017-01-25 04:27:52 +0530335
Takashi Iwai7ceba752017-02-02 15:58:35 +0100336 cfg_val.regx.val_bit = 1;
Takashi Iwai83af57d2017-02-03 08:50:06 +0100337
338 /* fix up the DP bits */
339 if (intelhaddata->dp_output) {
340 cfg_val.regx.dp_modei = 1;
341 cfg_val.regx.set = 1;
342 }
343
Takashi Iwai7ceba752017-02-02 15:58:35 +0100344 had_write_register(intelhaddata, AUD_CONFIG, cfg_val.regval);
Takashi Iwai40ce4b52017-02-07 16:17:06 +0100345 intelhaddata->aud_config = cfg_val;
Jerome Anand5dab11d2017-01-25 04:27:52 +0530346 return 0;
347}
348
Jerome Anand5dab11d2017-01-25 04:27:52 +0530349/*
350 * Compute derived values in channel_allocations[].
351 */
352static void init_channel_allocations(void)
353{
354 int i, j;
355 struct cea_channel_speaker_allocation *p;
356
Jerome Anand5dab11d2017-01-25 04:27:52 +0530357 for (i = 0; i < ARRAY_SIZE(channel_allocations); i++) {
358 p = channel_allocations + i;
359 p->channels = 0;
360 p->spk_mask = 0;
361 for (j = 0; j < ARRAY_SIZE(p->speakers); j++)
362 if (p->speakers[j]) {
363 p->channels++;
364 p->spk_mask |= p->speakers[j];
365 }
366 }
367}
368
369/*
370 * The transformation takes two steps:
371 *
372 * eld->spk_alloc => (eld_speaker_allocation_bits[]) => spk_mask
373 * spk_mask => (channel_allocations[]) => ai->CA
374 *
375 * TODO: it could select the wrong CA from multiple candidates.
376 */
Takashi Iwaib5562902017-02-04 22:05:33 +0100377static int had_channel_allocation(struct snd_intelhad *intelhaddata,
378 int channels)
Jerome Anand5dab11d2017-01-25 04:27:52 +0530379{
380 int i;
381 int ca = 0;
382 int spk_mask = 0;
383
384 /*
385 * CA defaults to 0 for basic stereo audio
386 */
387 if (channels <= 2)
388 return 0;
389
390 /*
391 * expand ELD's speaker allocation mask
392 *
393 * ELD tells the speaker mask in a compact(paired) form,
394 * expand ELD's notions to match the ones used by Audio InfoFrame.
395 */
396
397 for (i = 0; i < ARRAY_SIZE(eld_speaker_allocation_bits); i++) {
Takashi Iwaidf0435d2017-02-02 15:37:11 +0100398 if (intelhaddata->eld[DRM_ELD_SPEAKER] & (1 << i))
Jerome Anand5dab11d2017-01-25 04:27:52 +0530399 spk_mask |= eld_speaker_allocation_bits[i];
400 }
401
402 /* search for the first working match in the CA table */
403 for (i = 0; i < ARRAY_SIZE(channel_allocations); i++) {
404 if (channels == channel_allocations[i].channels &&
405 (spk_mask & channel_allocations[i].spk_mask) ==
406 channel_allocations[i].spk_mask) {
407 ca = channel_allocations[i].ca_index;
408 break;
409 }
410 }
411
Takashi Iwaic75b0472017-01-31 15:49:15 +0100412 dev_dbg(intelhaddata->dev, "select CA 0x%x for %d\n", ca, channels);
Jerome Anand5dab11d2017-01-25 04:27:52 +0530413
414 return ca;
415}
416
417/* from speaker bit mask to ALSA API channel position */
418static int spk_to_chmap(int spk)
419{
Takashi Iwai4a5ddb22017-02-01 16:45:38 +0100420 const struct channel_map_table *t = map_tables;
Jerome Anand5dab11d2017-01-25 04:27:52 +0530421
422 for (; t->map; t++) {
423 if (t->spk_mask == spk)
424 return t->map;
425 }
426 return 0;
427}
428
Takashi Iwai372d8552017-01-31 13:57:58 +0100429static void had_build_channel_allocation_map(struct snd_intelhad *intelhaddata)
Jerome Anand5dab11d2017-01-25 04:27:52 +0530430{
Takashi Iwai2e52f5e2017-01-31 17:09:13 +0100431 int i, c;
Jerome Anand5dab11d2017-01-25 04:27:52 +0530432 int spk_mask = 0;
433 struct snd_pcm_chmap_elem *chmap;
434 u8 eld_high, eld_high_mask = 0xF0;
435 u8 high_msb;
436
437 chmap = kzalloc(sizeof(*chmap), GFP_KERNEL);
Takashi Iwai2e52f5e2017-01-31 17:09:13 +0100438 if (!chmap) {
Jerome Anand5dab11d2017-01-25 04:27:52 +0530439 intelhaddata->chmap->chmap = NULL;
440 return;
441 }
442
Takashi Iwaidf0435d2017-02-02 15:37:11 +0100443 dev_dbg(intelhaddata->dev, "eld speaker = %x\n",
444 intelhaddata->eld[DRM_ELD_SPEAKER]);
Jerome Anand5dab11d2017-01-25 04:27:52 +0530445
446 /* WA: Fix the max channel supported to 8 */
447
448 /*
449 * Sink may support more than 8 channels, if eld_high has more than
450 * one bit set. SOC supports max 8 channels.
451 * Refer eld_speaker_allocation_bits, for sink speaker allocation
452 */
453
454 /* if 0x2F < eld < 0x4F fall back to 0x2f, else fall back to 0x4F */
Takashi Iwaidf0435d2017-02-02 15:37:11 +0100455 eld_high = intelhaddata->eld[DRM_ELD_SPEAKER] & eld_high_mask;
Jerome Anand5dab11d2017-01-25 04:27:52 +0530456 if ((eld_high & (eld_high-1)) && (eld_high > 0x1F)) {
457 /* eld_high & (eld_high-1): if more than 1 bit set */
458 /* 0x1F: 7 channels */
459 for (i = 1; i < 4; i++) {
460 high_msb = eld_high & (0x80 >> i);
461 if (high_msb) {
Takashi Iwaidf0435d2017-02-02 15:37:11 +0100462 intelhaddata->eld[DRM_ELD_SPEAKER] &=
Jerome Anand5dab11d2017-01-25 04:27:52 +0530463 high_msb | 0xF;
464 break;
465 }
466 }
467 }
468
469 for (i = 0; i < ARRAY_SIZE(eld_speaker_allocation_bits); i++) {
Takashi Iwaidf0435d2017-02-02 15:37:11 +0100470 if (intelhaddata->eld[DRM_ELD_SPEAKER] & (1 << i))
Jerome Anand5dab11d2017-01-25 04:27:52 +0530471 spk_mask |= eld_speaker_allocation_bits[i];
472 }
473
474 for (i = 0; i < ARRAY_SIZE(channel_allocations); i++) {
475 if (spk_mask == channel_allocations[i].spk_mask) {
476 for (c = 0; c < channel_allocations[i].channels; c++) {
477 chmap->map[c] = spk_to_chmap(
478 channel_allocations[i].speakers[
Takashi Iwai2e52f5e2017-01-31 17:09:13 +0100479 (MAX_SPEAKERS - 1) - c]);
Jerome Anand5dab11d2017-01-25 04:27:52 +0530480 }
481 chmap->channels = channel_allocations[i].channels;
482 intelhaddata->chmap->chmap = chmap;
483 break;
484 }
485 }
486 if (i >= ARRAY_SIZE(channel_allocations)) {
487 intelhaddata->chmap->chmap = NULL;
488 kfree(chmap);
489 }
490}
491
492/*
493 * ALSA API channel-map control callbacks
494 */
495static int had_chmap_ctl_info(struct snd_kcontrol *kcontrol,
496 struct snd_ctl_elem_info *uinfo)
497{
498 struct snd_pcm_chmap *info = snd_kcontrol_chip(kcontrol);
499 struct snd_intelhad *intelhaddata = info->private_data;
500
Takashi Iwai91b0cb02017-02-02 17:46:49 +0100501 if (!intelhaddata->connected)
Jerome Anand5dab11d2017-01-25 04:27:52 +0530502 return -ENODEV;
503 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
504 uinfo->count = HAD_MAX_CHANNEL;
505 uinfo->value.integer.min = 0;
506 uinfo->value.integer.max = SNDRV_CHMAP_LAST;
507 return 0;
508}
509
510static int had_chmap_ctl_get(struct snd_kcontrol *kcontrol,
511 struct snd_ctl_elem_value *ucontrol)
512{
513 struct snd_pcm_chmap *info = snd_kcontrol_chip(kcontrol);
514 struct snd_intelhad *intelhaddata = info->private_data;
Takashi Iwai2e52f5e2017-01-31 17:09:13 +0100515 int i;
Jerome Anand5dab11d2017-01-25 04:27:52 +0530516 const struct snd_pcm_chmap_elem *chmap;
517
Takashi Iwai91b0cb02017-02-02 17:46:49 +0100518 if (!intelhaddata->connected)
Jerome Anand5dab11d2017-01-25 04:27:52 +0530519 return -ENODEV;
Takashi Iwai8f8d1d72017-02-01 17:24:02 +0100520
521 mutex_lock(&intelhaddata->mutex);
522 if (!intelhaddata->chmap->chmap) {
523 mutex_unlock(&intelhaddata->mutex);
Jerome Anand5dab11d2017-01-25 04:27:52 +0530524 return -ENODATA;
Takashi Iwai8f8d1d72017-02-01 17:24:02 +0100525 }
526
Jerome Anand5dab11d2017-01-25 04:27:52 +0530527 chmap = intelhaddata->chmap->chmap;
Takashi Iwaic75b0472017-01-31 15:49:15 +0100528 for (i = 0; i < chmap->channels; i++)
Jerome Anand5dab11d2017-01-25 04:27:52 +0530529 ucontrol->value.integer.value[i] = chmap->map[i];
Takashi Iwai8f8d1d72017-02-01 17:24:02 +0100530 mutex_unlock(&intelhaddata->mutex);
Jerome Anand5dab11d2017-01-25 04:27:52 +0530531
532 return 0;
533}
534
535static int had_register_chmap_ctls(struct snd_intelhad *intelhaddata,
536 struct snd_pcm *pcm)
537{
Takashi Iwai2e52f5e2017-01-31 17:09:13 +0100538 int err;
Jerome Anand5dab11d2017-01-25 04:27:52 +0530539
540 err = snd_pcm_add_chmap_ctls(pcm, SNDRV_PCM_STREAM_PLAYBACK,
541 NULL, 0, (unsigned long)intelhaddata,
542 &intelhaddata->chmap);
543 if (err < 0)
544 return err;
545
546 intelhaddata->chmap->private_data = intelhaddata;
Takashi Iwaie9d65ab2017-01-31 16:11:27 +0100547 intelhaddata->chmap->kctl->info = had_chmap_ctl_info;
548 intelhaddata->chmap->kctl->get = had_chmap_ctl_get;
Jerome Anand5dab11d2017-01-25 04:27:52 +0530549 intelhaddata->chmap->chmap = NULL;
550 return 0;
551}
552
Takashi Iwai76296ef2017-01-30 16:09:11 +0100553/*
Takashi Iwai44684f62017-02-02 17:27:40 +0100554 * Initialize Data Island Packets registers
Jerome Anand5dab11d2017-01-25 04:27:52 +0530555 * This function is called in the prepare callback
556 */
Takashi Iwaib5562902017-02-04 22:05:33 +0100557static void had_prog_dip(struct snd_pcm_substream *substream,
558 struct snd_intelhad *intelhaddata)
Jerome Anand5dab11d2017-01-25 04:27:52 +0530559{
560 int i;
Takashi Iwai7ceba752017-02-02 15:58:35 +0100561 union aud_ctrl_st ctrl_state = {.regval = 0};
562 union aud_info_frame2 frame2 = {.regval = 0};
563 union aud_info_frame3 frame3 = {.regval = 0};
Jerome Anand5dab11d2017-01-25 04:27:52 +0530564 u8 checksum = 0;
Pierre-Louis Bossart964ca802017-01-31 14:16:52 -0600565 u32 info_frame;
Jerome Anand5dab11d2017-01-25 04:27:52 +0530566 int channels;
Takashi Iwai36ed3462017-02-02 17:06:38 +0100567 int ca;
Jerome Anand5dab11d2017-01-25 04:27:52 +0530568
569 channels = substream->runtime->channels;
570
Takashi Iwai7ceba752017-02-02 15:58:35 +0100571 had_write_register(intelhaddata, AUD_CNTL_ST, ctrl_state.regval);
Jerome Anand5dab11d2017-01-25 04:27:52 +0530572
Takashi Iwaib5562902017-02-04 22:05:33 +0100573 ca = had_channel_allocation(intelhaddata, channels);
Pierre-Louis Bossart964ca802017-01-31 14:16:52 -0600574 if (intelhaddata->dp_output) {
575 info_frame = DP_INFO_FRAME_WORD1;
Takashi Iwai36ed3462017-02-02 17:06:38 +0100576 frame2.regval = (substream->runtime->channels - 1) | (ca << 24);
Pierre-Louis Bossart964ca802017-01-31 14:16:52 -0600577 } else {
578 info_frame = HDMI_INFO_FRAME_WORD1;
Takashi Iwai7ceba752017-02-02 15:58:35 +0100579 frame2.regx.chnl_cnt = substream->runtime->channels - 1;
Takashi Iwai36ed3462017-02-02 17:06:38 +0100580 frame3.regx.chnl_alloc = ca;
Jerome Anand5dab11d2017-01-25 04:27:52 +0530581
Takashi Iwai2e52f5e2017-01-31 17:09:13 +0100582 /* Calculte the byte wide checksum for all valid DIP words */
Pierre-Louis Bossart964ca802017-01-31 14:16:52 -0600583 for (i = 0; i < BYTES_PER_WORD; i++)
Takashi Iwai7ceba752017-02-02 15:58:35 +0100584 checksum += (info_frame >> (i * 8)) & 0xff;
Pierre-Louis Bossart964ca802017-01-31 14:16:52 -0600585 for (i = 0; i < BYTES_PER_WORD; i++)
Takashi Iwai7ceba752017-02-02 15:58:35 +0100586 checksum += (frame2.regval >> (i * 8)) & 0xff;
Pierre-Louis Bossart964ca802017-01-31 14:16:52 -0600587 for (i = 0; i < BYTES_PER_WORD; i++)
Takashi Iwai7ceba752017-02-02 15:58:35 +0100588 checksum += (frame3.regval >> (i * 8)) & 0xff;
Jerome Anand5dab11d2017-01-25 04:27:52 +0530589
Takashi Iwai7ceba752017-02-02 15:58:35 +0100590 frame2.regx.chksum = -(checksum);
Pierre-Louis Bossart964ca802017-01-31 14:16:52 -0600591 }
Jerome Anand5dab11d2017-01-25 04:27:52 +0530592
Takashi Iwai4151ee82017-01-31 18:14:15 +0100593 had_write_register(intelhaddata, AUD_HDMIW_INFOFR, info_frame);
Takashi Iwai7ceba752017-02-02 15:58:35 +0100594 had_write_register(intelhaddata, AUD_HDMIW_INFOFR, frame2.regval);
595 had_write_register(intelhaddata, AUD_HDMIW_INFOFR, frame3.regval);
Jerome Anand5dab11d2017-01-25 04:27:52 +0530596
597 /* program remaining DIP words with zero */
598 for (i = 0; i < HAD_MAX_DIP_WORDS-VALID_DIP_WORDS; i++)
Takashi Iwai4151ee82017-01-31 18:14:15 +0100599 had_write_register(intelhaddata, AUD_HDMIW_INFOFR, 0x0);
Jerome Anand5dab11d2017-01-25 04:27:52 +0530600
Takashi Iwai7ceba752017-02-02 15:58:35 +0100601 ctrl_state.regx.dip_freq = 1;
602 ctrl_state.regx.dip_en_sta = 1;
603 had_write_register(intelhaddata, AUD_CNTL_ST, ctrl_state.regval);
Jerome Anand5dab11d2017-01-25 04:27:52 +0530604}
605
Pierre-Louis Bossart964ca802017-01-31 14:16:52 -0600606static int had_calculate_maud_value(u32 aud_samp_freq, u32 link_rate)
607{
608 u32 maud_val;
609
Takashi Iwai2e52f5e2017-01-31 17:09:13 +0100610 /* Select maud according to DP 1.2 spec */
Pierre-Louis Bossart964ca802017-01-31 14:16:52 -0600611 if (link_rate == DP_2_7_GHZ) {
612 switch (aud_samp_freq) {
613 case AUD_SAMPLE_RATE_32:
614 maud_val = AUD_SAMPLE_RATE_32_DP_2_7_MAUD_VAL;
615 break;
616
617 case AUD_SAMPLE_RATE_44_1:
618 maud_val = AUD_SAMPLE_RATE_44_1_DP_2_7_MAUD_VAL;
619 break;
620
621 case AUD_SAMPLE_RATE_48:
622 maud_val = AUD_SAMPLE_RATE_48_DP_2_7_MAUD_VAL;
623 break;
624
625 case AUD_SAMPLE_RATE_88_2:
626 maud_val = AUD_SAMPLE_RATE_88_2_DP_2_7_MAUD_VAL;
627 break;
628
629 case AUD_SAMPLE_RATE_96:
630 maud_val = AUD_SAMPLE_RATE_96_DP_2_7_MAUD_VAL;
631 break;
632
633 case AUD_SAMPLE_RATE_176_4:
634 maud_val = AUD_SAMPLE_RATE_176_4_DP_2_7_MAUD_VAL;
635 break;
636
637 case HAD_MAX_RATE:
638 maud_val = HAD_MAX_RATE_DP_2_7_MAUD_VAL;
639 break;
640
641 default:
642 maud_val = -EINVAL;
643 break;
644 }
645 } else if (link_rate == DP_1_62_GHZ) {
646 switch (aud_samp_freq) {
647 case AUD_SAMPLE_RATE_32:
648 maud_val = AUD_SAMPLE_RATE_32_DP_1_62_MAUD_VAL;
649 break;
650
651 case AUD_SAMPLE_RATE_44_1:
652 maud_val = AUD_SAMPLE_RATE_44_1_DP_1_62_MAUD_VAL;
653 break;
654
655 case AUD_SAMPLE_RATE_48:
656 maud_val = AUD_SAMPLE_RATE_48_DP_1_62_MAUD_VAL;
657 break;
658
659 case AUD_SAMPLE_RATE_88_2:
660 maud_val = AUD_SAMPLE_RATE_88_2_DP_1_62_MAUD_VAL;
661 break;
662
663 case AUD_SAMPLE_RATE_96:
664 maud_val = AUD_SAMPLE_RATE_96_DP_1_62_MAUD_VAL;
665 break;
666
667 case AUD_SAMPLE_RATE_176_4:
668 maud_val = AUD_SAMPLE_RATE_176_4_DP_1_62_MAUD_VAL;
669 break;
670
671 case HAD_MAX_RATE:
672 maud_val = HAD_MAX_RATE_DP_1_62_MAUD_VAL;
673 break;
674
675 default:
676 maud_val = -EINVAL;
677 break;
678 }
679 } else
680 maud_val = -EINVAL;
681
682 return maud_val;
683}
684
Takashi Iwai76296ef2017-01-30 16:09:11 +0100685/*
Takashi Iwai44684f62017-02-02 17:27:40 +0100686 * Program HDMI audio CTS value
Jerome Anand5dab11d2017-01-25 04:27:52 +0530687 *
688 * @aud_samp_freq: sampling frequency of audio data
689 * @tmds: sampling frequency of the display data
Takashi Iwaib5562902017-02-04 22:05:33 +0100690 * @link_rate: DP link rate
Jerome Anand5dab11d2017-01-25 04:27:52 +0530691 * @n_param: N value, depends on aud_samp_freq
Takashi Iwaib5562902017-02-04 22:05:33 +0100692 * @intelhaddata: substream private data
Jerome Anand5dab11d2017-01-25 04:27:52 +0530693 *
694 * Program CTS register based on the audio and display sampling frequency
695 */
Takashi Iwaib5562902017-02-04 22:05:33 +0100696static void had_prog_cts(u32 aud_samp_freq, u32 tmds, u32 link_rate,
697 u32 n_param, struct snd_intelhad *intelhaddata)
Jerome Anand5dab11d2017-01-25 04:27:52 +0530698{
699 u32 cts_val;
700 u64 dividend, divisor;
701
Pierre-Louis Bossart964ca802017-01-31 14:16:52 -0600702 if (intelhaddata->dp_output) {
703 /* Substitute cts_val with Maud according to DP 1.2 spec*/
704 cts_val = had_calculate_maud_value(aud_samp_freq, link_rate);
705 } else {
706 /* Calculate CTS according to HDMI 1.3a spec*/
707 dividend = (u64)tmds * n_param*1000;
708 divisor = 128 * aud_samp_freq;
709 cts_val = div64_u64(dividend, divisor);
710 }
Takashi Iwaic75b0472017-01-31 15:49:15 +0100711 dev_dbg(intelhaddata->dev, "TMDS value=%d, N value=%d, CTS Value=%d\n",
Pierre-Louis Bossart964ca802017-01-31 14:16:52 -0600712 tmds, n_param, cts_val);
Takashi Iwai79dda752017-01-30 17:23:39 +0100713 had_write_register(intelhaddata, AUD_HDMI_CTS, (BIT(24) | cts_val));
Jerome Anand5dab11d2017-01-25 04:27:52 +0530714}
715
716static int had_calculate_n_value(u32 aud_samp_freq)
717{
Takashi Iwai2e52f5e2017-01-31 17:09:13 +0100718 int n_val;
Jerome Anand5dab11d2017-01-25 04:27:52 +0530719
720 /* Select N according to HDMI 1.3a spec*/
721 switch (aud_samp_freq) {
722 case AUD_SAMPLE_RATE_32:
723 n_val = 4096;
Takashi Iwai2e52f5e2017-01-31 17:09:13 +0100724 break;
Jerome Anand5dab11d2017-01-25 04:27:52 +0530725
726 case AUD_SAMPLE_RATE_44_1:
727 n_val = 6272;
Takashi Iwai2e52f5e2017-01-31 17:09:13 +0100728 break;
Jerome Anand5dab11d2017-01-25 04:27:52 +0530729
730 case AUD_SAMPLE_RATE_48:
731 n_val = 6144;
Takashi Iwai2e52f5e2017-01-31 17:09:13 +0100732 break;
Jerome Anand5dab11d2017-01-25 04:27:52 +0530733
734 case AUD_SAMPLE_RATE_88_2:
735 n_val = 12544;
Takashi Iwai2e52f5e2017-01-31 17:09:13 +0100736 break;
Jerome Anand5dab11d2017-01-25 04:27:52 +0530737
738 case AUD_SAMPLE_RATE_96:
739 n_val = 12288;
Takashi Iwai2e52f5e2017-01-31 17:09:13 +0100740 break;
Jerome Anand5dab11d2017-01-25 04:27:52 +0530741
742 case AUD_SAMPLE_RATE_176_4:
743 n_val = 25088;
Takashi Iwai2e52f5e2017-01-31 17:09:13 +0100744 break;
Jerome Anand5dab11d2017-01-25 04:27:52 +0530745
746 case HAD_MAX_RATE:
747 n_val = 24576;
Takashi Iwai2e52f5e2017-01-31 17:09:13 +0100748 break;
Jerome Anand5dab11d2017-01-25 04:27:52 +0530749
750 default:
751 n_val = -EINVAL;
Takashi Iwai2e52f5e2017-01-31 17:09:13 +0100752 break;
Jerome Anand5dab11d2017-01-25 04:27:52 +0530753 }
754 return n_val;
755}
756
Takashi Iwai76296ef2017-01-30 16:09:11 +0100757/*
Takashi Iwai44684f62017-02-02 17:27:40 +0100758 * Program HDMI audio N value
Jerome Anand5dab11d2017-01-25 04:27:52 +0530759 *
760 * @aud_samp_freq: sampling frequency of audio data
761 * @n_param: N value, depends on aud_samp_freq
Takashi Iwaib5562902017-02-04 22:05:33 +0100762 * @intelhaddata: substream private data
Jerome Anand5dab11d2017-01-25 04:27:52 +0530763 *
764 * This function is called in the prepare callback.
765 * It programs based on the audio and display sampling frequency
766 */
Takashi Iwaib5562902017-02-04 22:05:33 +0100767static int had_prog_n(u32 aud_samp_freq, u32 *n_param,
768 struct snd_intelhad *intelhaddata)
Jerome Anand5dab11d2017-01-25 04:27:52 +0530769{
Takashi Iwai2e52f5e2017-01-31 17:09:13 +0100770 int n_val;
Jerome Anand5dab11d2017-01-25 04:27:52 +0530771
Pierre-Louis Bossart964ca802017-01-31 14:16:52 -0600772 if (intelhaddata->dp_output) {
773 /*
774 * According to DP specs, Maud and Naud values hold
775 * a relationship, which is stated as:
776 * Maud/Naud = 512 * fs / f_LS_Clk
777 * where, fs is the sampling frequency of the audio stream
778 * and Naud is 32768 for Async clock.
779 */
780
781 n_val = DP_NAUD_VAL;
782 } else
783 n_val = had_calculate_n_value(aud_samp_freq);
Jerome Anand5dab11d2017-01-25 04:27:52 +0530784
785 if (n_val < 0)
786 return n_val;
787
Takashi Iwai79dda752017-01-30 17:23:39 +0100788 had_write_register(intelhaddata, AUD_N_ENABLE, (BIT(24) | n_val));
Jerome Anand5dab11d2017-01-25 04:27:52 +0530789 *n_param = n_val;
790 return 0;
791}
792
Takashi Iwaie1b239f32017-02-03 00:01:18 +0100793/*
794 * PCM ring buffer handling
795 *
796 * The hardware provides a ring buffer with the fixed 4 buffer descriptors
797 * (BDs). The driver maps these 4 BDs onto the PCM ring buffer. The mapping
798 * moves at each period elapsed. The below illustrates how it works:
799 *
800 * At time=0
801 * PCM | 0 | 1 | 2 | 3 | 4 | 5 | .... |n-1|
802 * BD | 0 | 1 | 2 | 3 |
803 *
804 * At time=1 (period elapsed)
805 * PCM | 0 | 1 | 2 | 3 | 4 | 5 | .... |n-1|
806 * BD | 1 | 2 | 3 | 0 |
807 *
808 * At time=2 (second period elapsed)
809 * PCM | 0 | 1 | 2 | 3 | 4 | 5 | .... |n-1|
810 * BD | 2 | 3 | 0 | 1 |
811 *
812 * The bd_head field points to the index of the BD to be read. It's also the
813 * position to be filled at next. The pcm_head and the pcm_filled fields
814 * point to the indices of the current position and of the next position to
815 * be filled, respectively. For PCM buffer there are both _head and _filled
816 * because they may be difference when nperiods > 4. For example, in the
817 * example above at t=1, bd_head=1 and pcm_head=1 while pcm_filled=5:
818 *
819 * pcm_head (=1) --v v-- pcm_filled (=5)
820 * PCM | 0 | 1 | 2 | 3 | 4 | 5 | .... |n-1|
821 * BD | 1 | 2 | 3 | 0 |
822 * bd_head (=1) --^ ^-- next to fill (= bd_head)
823 *
824 * For nperiods < 4, the remaining BDs out of 4 are marked as invalid, so that
825 * the hardware skips those BDs in the loop.
Takashi Iwai8d48c012017-02-07 08:05:46 +0100826 *
827 * An exceptional setup is the case with nperiods=1. Since we have to update
828 * BDs after finishing one BD processing, we'd need at least two BDs, where
829 * both BDs point to the same content, the same address, the same size of the
830 * whole PCM buffer.
Takashi Iwaie1b239f32017-02-03 00:01:18 +0100831 */
832
833#define AUD_BUF_ADDR(x) (AUD_BUF_A_ADDR + (x) * HAD_REG_WIDTH)
834#define AUD_BUF_LEN(x) (AUD_BUF_A_LENGTH + (x) * HAD_REG_WIDTH)
835
836/* Set up a buffer descriptor at the "filled" position */
837static void had_prog_bd(struct snd_pcm_substream *substream,
838 struct snd_intelhad *intelhaddata)
839{
840 int idx = intelhaddata->bd_head;
841 int ofs = intelhaddata->pcmbuf_filled * intelhaddata->period_bytes;
842 u32 addr = substream->runtime->dma_addr + ofs;
843
Takashi Iwaie8de9852017-02-07 08:09:12 +0100844 addr |= AUD_BUF_VALID;
845 if (!substream->runtime->no_period_wakeup)
846 addr |= AUD_BUF_INTR_EN;
Takashi Iwaie1b239f32017-02-03 00:01:18 +0100847 had_write_register(intelhaddata, AUD_BUF_ADDR(idx), addr);
848 had_write_register(intelhaddata, AUD_BUF_LEN(idx),
849 intelhaddata->period_bytes);
850
851 /* advance the indices to the next */
852 intelhaddata->bd_head++;
853 intelhaddata->bd_head %= intelhaddata->num_bds;
854 intelhaddata->pcmbuf_filled++;
855 intelhaddata->pcmbuf_filled %= substream->runtime->periods;
856}
857
858/* invalidate a buffer descriptor with the given index */
859static void had_invalidate_bd(struct snd_intelhad *intelhaddata,
860 int idx)
861{
862 had_write_register(intelhaddata, AUD_BUF_ADDR(idx), 0);
863 had_write_register(intelhaddata, AUD_BUF_LEN(idx), 0);
864}
865
866/* Initial programming of ring buffer */
867static void had_init_ringbuf(struct snd_pcm_substream *substream,
868 struct snd_intelhad *intelhaddata)
869{
870 struct snd_pcm_runtime *runtime = substream->runtime;
871 int i, num_periods;
872
873 num_periods = runtime->periods;
874 intelhaddata->num_bds = min(num_periods, HAD_NUM_OF_RING_BUFS);
Takashi Iwai8d48c012017-02-07 08:05:46 +0100875 /* set the minimum 2 BDs for num_periods=1 */
876 intelhaddata->num_bds = max(intelhaddata->num_bds, 2U);
Takashi Iwaie1b239f32017-02-03 00:01:18 +0100877 intelhaddata->period_bytes =
878 frames_to_bytes(runtime, runtime->period_size);
879 WARN_ON(intelhaddata->period_bytes & 0x3f);
880
881 intelhaddata->bd_head = 0;
882 intelhaddata->pcmbuf_head = 0;
883 intelhaddata->pcmbuf_filled = 0;
884
885 for (i = 0; i < HAD_NUM_OF_RING_BUFS; i++) {
Takashi Iwai8d48c012017-02-07 08:05:46 +0100886 if (i < intelhaddata->num_bds)
Takashi Iwaie1b239f32017-02-03 00:01:18 +0100887 had_prog_bd(substream, intelhaddata);
888 else /* invalidate the rest */
889 had_invalidate_bd(intelhaddata, i);
890 }
891
892 intelhaddata->bd_head = 0; /* reset at head again before starting */
893}
894
895/* process a bd, advance to the next */
896static void had_advance_ringbuf(struct snd_pcm_substream *substream,
897 struct snd_intelhad *intelhaddata)
898{
899 int num_periods = substream->runtime->periods;
900
901 /* reprogram the next buffer */
902 had_prog_bd(substream, intelhaddata);
903
904 /* proceed to next */
905 intelhaddata->pcmbuf_head++;
906 intelhaddata->pcmbuf_head %= num_periods;
907}
908
909/* process the current BD(s);
910 * returns the current PCM buffer byte position, or -EPIPE for underrun.
911 */
912static int had_process_ringbuf(struct snd_pcm_substream *substream,
913 struct snd_intelhad *intelhaddata)
914{
915 int len, processed;
916 unsigned long flags;
917
918 processed = 0;
919 spin_lock_irqsave(&intelhaddata->had_spinlock, flags);
920 for (;;) {
921 /* get the remaining bytes on the buffer */
922 had_read_register(intelhaddata,
923 AUD_BUF_LEN(intelhaddata->bd_head),
924 &len);
925 if (len < 0 || len > intelhaddata->period_bytes) {
926 dev_dbg(intelhaddata->dev, "Invalid buf length %d\n",
927 len);
928 len = -EPIPE;
929 goto out;
930 }
931
932 if (len > 0) /* OK, this is the current buffer */
933 break;
934
935 /* len=0 => already empty, check the next buffer */
936 if (++processed >= intelhaddata->num_bds) {
937 len = -EPIPE; /* all empty? - report underrun */
938 goto out;
939 }
940 had_advance_ringbuf(substream, intelhaddata);
941 }
942
943 len = intelhaddata->period_bytes - len;
944 len += intelhaddata->period_bytes * intelhaddata->pcmbuf_head;
945 out:
946 spin_unlock_irqrestore(&intelhaddata->had_spinlock, flags);
947 return len;
948}
949
950/* called from irq handler */
951static void had_process_buffer_done(struct snd_intelhad *intelhaddata)
952{
953 struct snd_pcm_substream *substream;
954
955 if (!intelhaddata->connected)
956 return; /* disconnected? - bail out */
957
958 substream = had_substream_get(intelhaddata);
959 if (!substream)
960 return; /* no stream? - bail out */
961
962 /* process or stop the stream */
963 if (had_process_ringbuf(substream, intelhaddata) < 0)
964 snd_pcm_stop_xrun(substream);
965 else
966 snd_pcm_period_elapsed(substream);
967
968 had_substream_put(intelhaddata);
969}
970
Takashi Iwai03c34372017-02-02 16:19:03 +0100971#define MAX_CNT 0xFF
972
Takashi Iwaie1b239f32017-02-03 00:01:18 +0100973/*
974 * The interrupt status 'sticky' bits might not be cleared by
975 * setting '1' to that bit once...
976 */
977static void wait_clear_underrun_bit(struct snd_intelhad *intelhaddata)
Jerome Anand5dab11d2017-01-25 04:27:52 +0530978{
Takashi Iwaie1b239f32017-02-03 00:01:18 +0100979 int i;
980 u32 val;
981
982 for (i = 0; i < MAX_CNT; i++) {
983 /* clear bit30, 31 AUD_HDMI_STATUS */
984 had_read_register(intelhaddata, AUD_HDMI_STATUS, &val);
Takashi Iwai77531be2017-02-07 12:17:23 +0100985 if (!(val & AUD_HDMI_STATUS_MASK_UNDERRUN))
Takashi Iwaie1b239f32017-02-03 00:01:18 +0100986 return;
987 had_write_register(intelhaddata, AUD_HDMI_STATUS, val);
988 }
989 dev_err(intelhaddata->dev, "Unable to clear UNDERRUN bits\n");
990}
991
992/* called from irq handler */
993static void had_process_buffer_underrun(struct snd_intelhad *intelhaddata)
994{
995 struct snd_pcm_substream *substream;
Jerome Anand5dab11d2017-01-25 04:27:52 +0530996
997 /* Handle Underrun interrupt within Audio Unit */
Takashi Iwai79dda752017-01-30 17:23:39 +0100998 had_write_register(intelhaddata, AUD_CONFIG, 0);
Takashi Iwai40ce4b52017-02-07 16:17:06 +0100999 intelhaddata->aud_config.regval = 0;
Jerome Anand5dab11d2017-01-25 04:27:52 +05301000 /* Reset buffer pointers */
Takashi Iwaif4566aa2017-02-04 21:39:56 +01001001 had_reset_audio(intelhaddata);
Takashi Iwaie1b239f32017-02-03 00:01:18 +01001002
1003 wait_clear_underrun_bit(intelhaddata);
1004
1005 if (!intelhaddata->connected)
1006 return; /* disconnected? - bail out */
1007
1008 /* Report UNDERRUN error to above layers */
1009 substream = had_substream_get(intelhaddata);
1010 if (substream) {
1011 snd_pcm_stop_xrun(substream);
1012 had_substream_put(intelhaddata);
1013 }
Jerome Anand5dab11d2017-01-25 04:27:52 +05301014}
1015
Takashi Iwai2e52f5e2017-01-31 17:09:13 +01001016/*
Takashi Iwai44684f62017-02-02 17:27:40 +01001017 * ALSA PCM open callback
Jerome Anand5dab11d2017-01-25 04:27:52 +05301018 */
Takashi Iwaib5562902017-02-04 22:05:33 +01001019static int had_pcm_open(struct snd_pcm_substream *substream)
Jerome Anand5dab11d2017-01-25 04:27:52 +05301020{
1021 struct snd_intelhad *intelhaddata;
1022 struct snd_pcm_runtime *runtime;
Jerome Anand5dab11d2017-01-25 04:27:52 +05301023 int retval;
1024
Jerome Anand5dab11d2017-01-25 04:27:52 +05301025 intelhaddata = snd_pcm_substream_chip(substream);
Jerome Anand5dab11d2017-01-25 04:27:52 +05301026 runtime = substream->runtime;
1027
Takashi Iwai182cdf22017-02-02 14:43:39 +01001028 pm_runtime_get_sync(intelhaddata->dev);
Jerome Anand5dab11d2017-01-25 04:27:52 +05301029
Takashi Iwai91b0cb02017-02-02 17:46:49 +01001030 if (!intelhaddata->connected) {
Takashi Iwaic75b0472017-01-31 15:49:15 +01001031 dev_dbg(intelhaddata->dev, "%s: HDMI cable plugged-out\n",
1032 __func__);
Jerome Anand5dab11d2017-01-25 04:27:52 +05301033 retval = -ENODEV;
Takashi Iwaifa5dfe62017-02-01 22:03:26 +01001034 goto error;
Jerome Anand5dab11d2017-01-25 04:27:52 +05301035 }
1036
1037 /* set the runtime hw parameter with local snd_pcm_hardware struct */
Takashi Iwaib5562902017-02-04 22:05:33 +01001038 runtime->hw = had_pcm_hardware;
Jerome Anand5dab11d2017-01-25 04:27:52 +05301039
Jerome Anand5dab11d2017-01-25 04:27:52 +05301040 retval = snd_pcm_hw_constraint_integer(runtime,
1041 SNDRV_PCM_HW_PARAM_PERIODS);
1042 if (retval < 0)
Takashi Iwaifa5dfe62017-02-01 22:03:26 +01001043 goto error;
Jerome Anand5dab11d2017-01-25 04:27:52 +05301044
1045 /* Make sure, that the period size is always aligned
1046 * 64byte boundary
1047 */
1048 retval = snd_pcm_hw_constraint_step(substream->runtime, 0,
1049 SNDRV_PCM_HW_PARAM_PERIOD_BYTES, 64);
Takashi Iwai73997b02017-02-02 17:38:50 +01001050 if (retval < 0)
Takashi Iwaifa5dfe62017-02-01 22:03:26 +01001051 goto error;
Jerome Anand5dab11d2017-01-25 04:27:52 +05301052
Takashi Iwai73997b02017-02-02 17:38:50 +01001053 /* expose PCM substream */
Takashi Iwai313d9f22017-02-02 13:00:12 +01001054 spin_lock_irq(&intelhaddata->had_spinlock);
1055 intelhaddata->stream_info.substream = substream;
1056 intelhaddata->stream_info.substream_refcount++;
1057 spin_unlock_irq(&intelhaddata->had_spinlock);
1058
Jerome Anand5dab11d2017-01-25 04:27:52 +05301059 return retval;
Takashi Iwaifa5dfe62017-02-01 22:03:26 +01001060 error:
Jerome Anand5dab11d2017-01-25 04:27:52 +05301061 pm_runtime_put(intelhaddata->dev);
Jerome Anand5dab11d2017-01-25 04:27:52 +05301062 return retval;
1063}
1064
Takashi Iwaidf76df12017-01-31 16:04:10 +01001065/*
Takashi Iwai44684f62017-02-02 17:27:40 +01001066 * ALSA PCM close callback
Jerome Anand5dab11d2017-01-25 04:27:52 +05301067 */
Takashi Iwaib5562902017-02-04 22:05:33 +01001068static int had_pcm_close(struct snd_pcm_substream *substream)
Jerome Anand5dab11d2017-01-25 04:27:52 +05301069{
1070 struct snd_intelhad *intelhaddata;
Jerome Anand5dab11d2017-01-25 04:27:52 +05301071
Jerome Anand5dab11d2017-01-25 04:27:52 +05301072 intelhaddata = snd_pcm_substream_chip(substream);
Jerome Anand5dab11d2017-01-25 04:27:52 +05301073
Takashi Iwai73997b02017-02-02 17:38:50 +01001074 /* unreference and sync with the pending PCM accesses */
Takashi Iwai313d9f22017-02-02 13:00:12 +01001075 spin_lock_irq(&intelhaddata->had_spinlock);
1076 intelhaddata->stream_info.substream = NULL;
1077 intelhaddata->stream_info.substream_refcount--;
1078 while (intelhaddata->stream_info.substream_refcount > 0) {
1079 spin_unlock_irq(&intelhaddata->had_spinlock);
1080 cpu_relax();
1081 spin_lock_irq(&intelhaddata->had_spinlock);
1082 }
1083 spin_unlock_irq(&intelhaddata->had_spinlock);
Jerome Anand5dab11d2017-01-25 04:27:52 +05301084
Jerome Anand5dab11d2017-01-25 04:27:52 +05301085 pm_runtime_put(intelhaddata->dev);
1086 return 0;
1087}
1088
Takashi Iwai2e52f5e2017-01-31 17:09:13 +01001089/*
Takashi Iwai44684f62017-02-02 17:27:40 +01001090 * ALSA PCM hw_params callback
Jerome Anand5dab11d2017-01-25 04:27:52 +05301091 */
Takashi Iwaib5562902017-02-04 22:05:33 +01001092static int had_pcm_hw_params(struct snd_pcm_substream *substream,
1093 struct snd_pcm_hw_params *hw_params)
Jerome Anand5dab11d2017-01-25 04:27:52 +05301094{
Takashi Iwaic75b0472017-01-31 15:49:15 +01001095 struct snd_intelhad *intelhaddata;
Jerome Anand5dab11d2017-01-25 04:27:52 +05301096 unsigned long addr;
1097 int pages, buf_size, retval;
1098
Takashi Iwaic75b0472017-01-31 15:49:15 +01001099 intelhaddata = snd_pcm_substream_chip(substream);
Jerome Anand5dab11d2017-01-25 04:27:52 +05301100 buf_size = params_buffer_bytes(hw_params);
1101 retval = snd_pcm_lib_malloc_pages(substream, buf_size);
1102 if (retval < 0)
1103 return retval;
Takashi Iwaic75b0472017-01-31 15:49:15 +01001104 dev_dbg(intelhaddata->dev, "%s:allocated memory = %d\n",
1105 __func__, buf_size);
Jerome Anand5dab11d2017-01-25 04:27:52 +05301106 /* mark the pages as uncached region */
1107 addr = (unsigned long) substream->runtime->dma_area;
1108 pages = (substream->runtime->dma_bytes + PAGE_SIZE - 1) / PAGE_SIZE;
1109 retval = set_memory_uc(addr, pages);
1110 if (retval) {
Takashi Iwaic75b0472017-01-31 15:49:15 +01001111 dev_err(intelhaddata->dev, "set_memory_uc failed.Error:%d\n",
1112 retval);
Jerome Anand5dab11d2017-01-25 04:27:52 +05301113 return retval;
1114 }
1115 memset(substream->runtime->dma_area, 0, buf_size);
1116
1117 return retval;
1118}
1119
Takashi Iwai2e52f5e2017-01-31 17:09:13 +01001120/*
Takashi Iwai44684f62017-02-02 17:27:40 +01001121 * ALSA PCM hw_free callback
Jerome Anand5dab11d2017-01-25 04:27:52 +05301122 */
Takashi Iwaib5562902017-02-04 22:05:33 +01001123static int had_pcm_hw_free(struct snd_pcm_substream *substream)
Jerome Anand5dab11d2017-01-25 04:27:52 +05301124{
1125 unsigned long addr;
1126 u32 pages;
1127
Jerome Anand5dab11d2017-01-25 04:27:52 +05301128 /* mark back the pages as cached/writeback region before the free */
1129 if (substream->runtime->dma_area != NULL) {
1130 addr = (unsigned long) substream->runtime->dma_area;
1131 pages = (substream->runtime->dma_bytes + PAGE_SIZE - 1) /
1132 PAGE_SIZE;
1133 set_memory_wb(addr, pages);
1134 return snd_pcm_lib_free_pages(substream);
1135 }
1136 return 0;
1137}
1138
Takashi Iwai2e52f5e2017-01-31 17:09:13 +01001139/*
Takashi Iwai44684f62017-02-02 17:27:40 +01001140 * ALSA PCM trigger callback
Jerome Anand5dab11d2017-01-25 04:27:52 +05301141 */
Takashi Iwaib5562902017-02-04 22:05:33 +01001142static int had_pcm_trigger(struct snd_pcm_substream *substream, int cmd)
Jerome Anand5dab11d2017-01-25 04:27:52 +05301143{
Takashi Iwaida864802017-01-31 13:52:22 +01001144 int retval = 0;
Jerome Anand5dab11d2017-01-25 04:27:52 +05301145 struct snd_intelhad *intelhaddata;
Jerome Anand5dab11d2017-01-25 04:27:52 +05301146
Jerome Anand5dab11d2017-01-25 04:27:52 +05301147 intelhaddata = snd_pcm_substream_chip(substream);
Jerome Anand5dab11d2017-01-25 04:27:52 +05301148
1149 switch (cmd) {
1150 case SNDRV_PCM_TRIGGER_START:
Takashi Iwai182cdf22017-02-02 14:43:39 +01001151 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
1152 case SNDRV_PCM_TRIGGER_RESUME:
Jerome Anand5dab11d2017-01-25 04:27:52 +05301153 /* Disable local INTRs till register prgmng is done */
Takashi Iwai91b0cb02017-02-02 17:46:49 +01001154 if (!intelhaddata->connected) {
Takashi Iwaic75b0472017-01-31 15:49:15 +01001155 dev_dbg(intelhaddata->dev,
1156 "_START: HDMI cable plugged-out\n");
Jerome Anand5dab11d2017-01-25 04:27:52 +05301157 retval = -ENODEV;
1158 break;
1159 }
Jerome Anand5dab11d2017-01-25 04:27:52 +05301160
Takashi Iwaif69bd102017-02-02 14:57:22 +01001161 intelhaddata->stream_info.running = true;
Jerome Anand5dab11d2017-01-25 04:27:52 +05301162
1163 /* Enable Audio */
Takashi Iwai075a1d42017-02-07 07:55:27 +01001164 had_ack_irqs(intelhaddata); /* FIXME: do we need this? */
Takashi Iwai40ce4b52017-02-07 16:17:06 +01001165 had_enable_audio(intelhaddata, true);
Jerome Anand5dab11d2017-01-25 04:27:52 +05301166 break;
1167
1168 case SNDRV_PCM_TRIGGER_STOP:
Takashi Iwai182cdf22017-02-02 14:43:39 +01001169 case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
1170 case SNDRV_PCM_TRIGGER_SUSPEND:
Takashi Iwaibcce7752017-02-01 17:18:20 +01001171 spin_lock(&intelhaddata->had_spinlock);
Jerome Anand5dab11d2017-01-25 04:27:52 +05301172
Takashi Iwaic75b0472017-01-31 15:49:15 +01001173 /* Stop reporting BUFFER_DONE/UNDERRUN to above layers */
Jerome Anand5dab11d2017-01-25 04:27:52 +05301174
Takashi Iwaif69bd102017-02-02 14:57:22 +01001175 intelhaddata->stream_info.running = false;
Takashi Iwaibcce7752017-02-01 17:18:20 +01001176 spin_unlock(&intelhaddata->had_spinlock);
Jerome Anand5dab11d2017-01-25 04:27:52 +05301177 /* Disable Audio */
Takashi Iwai40ce4b52017-02-07 16:17:06 +01001178 had_enable_audio(intelhaddata, false);
Jerome Anand5dab11d2017-01-25 04:27:52 +05301179 /* Reset buffer pointers */
Takashi Iwaif4566aa2017-02-04 21:39:56 +01001180 had_reset_audio(intelhaddata);
Jerome Anand5dab11d2017-01-25 04:27:52 +05301181 break;
1182
1183 default:
1184 retval = -EINVAL;
1185 }
1186 return retval;
1187}
1188
Takashi Iwai2e52f5e2017-01-31 17:09:13 +01001189/*
Takashi Iwai44684f62017-02-02 17:27:40 +01001190 * ALSA PCM prepare callback
Jerome Anand5dab11d2017-01-25 04:27:52 +05301191 */
Takashi Iwaib5562902017-02-04 22:05:33 +01001192static int had_pcm_prepare(struct snd_pcm_substream *substream)
Jerome Anand5dab11d2017-01-25 04:27:52 +05301193{
1194 int retval;
1195 u32 disp_samp_freq, n_param;
Pierre-Louis Bossart964ca802017-01-31 14:16:52 -06001196 u32 link_rate = 0;
Jerome Anand5dab11d2017-01-25 04:27:52 +05301197 struct snd_intelhad *intelhaddata;
1198 struct snd_pcm_runtime *runtime;
Jerome Anand5dab11d2017-01-25 04:27:52 +05301199
Jerome Anand5dab11d2017-01-25 04:27:52 +05301200 intelhaddata = snd_pcm_substream_chip(substream);
1201 runtime = substream->runtime;
Jerome Anand5dab11d2017-01-25 04:27:52 +05301202
Takashi Iwai91b0cb02017-02-02 17:46:49 +01001203 if (!intelhaddata->connected) {
Takashi Iwaic75b0472017-01-31 15:49:15 +01001204 dev_dbg(intelhaddata->dev, "%s: HDMI cable plugged-out\n",
1205 __func__);
Jerome Anand5dab11d2017-01-25 04:27:52 +05301206 retval = -ENODEV;
1207 goto prep_end;
1208 }
1209
Takashi Iwaic75b0472017-01-31 15:49:15 +01001210 dev_dbg(intelhaddata->dev, "period_size=%d\n",
Jerome Anand5dab11d2017-01-25 04:27:52 +05301211 (int)frames_to_bytes(runtime, runtime->period_size));
Takashi Iwaic75b0472017-01-31 15:49:15 +01001212 dev_dbg(intelhaddata->dev, "periods=%d\n", runtime->periods);
1213 dev_dbg(intelhaddata->dev, "buffer_size=%d\n",
1214 (int)snd_pcm_lib_buffer_bytes(substream));
1215 dev_dbg(intelhaddata->dev, "rate=%d\n", runtime->rate);
1216 dev_dbg(intelhaddata->dev, "channels=%d\n", runtime->channels);
Jerome Anand5dab11d2017-01-25 04:27:52 +05301217
Jerome Anand5dab11d2017-01-25 04:27:52 +05301218 /* Get N value in KHz */
Takashi Iwaida864802017-01-31 13:52:22 +01001219 disp_samp_freq = intelhaddata->tmds_clock_speed;
Jerome Anand5dab11d2017-01-25 04:27:52 +05301220
Takashi Iwaib5562902017-02-04 22:05:33 +01001221 retval = had_prog_n(substream->runtime->rate, &n_param, intelhaddata);
Jerome Anand5dab11d2017-01-25 04:27:52 +05301222 if (retval) {
Takashi Iwaic75b0472017-01-31 15:49:15 +01001223 dev_err(intelhaddata->dev,
1224 "programming N value failed %#x\n", retval);
Jerome Anand5dab11d2017-01-25 04:27:52 +05301225 goto prep_end;
1226 }
Pierre-Louis Bossart964ca802017-01-31 14:16:52 -06001227
1228 if (intelhaddata->dp_output)
Takashi Iwaida864802017-01-31 13:52:22 +01001229 link_rate = intelhaddata->link_rate;
Pierre-Louis Bossart964ca802017-01-31 14:16:52 -06001230
Takashi Iwaib5562902017-02-04 22:05:33 +01001231 had_prog_cts(substream->runtime->rate, disp_samp_freq, link_rate,
1232 n_param, intelhaddata);
Jerome Anand5dab11d2017-01-25 04:27:52 +05301233
Takashi Iwaib5562902017-02-04 22:05:33 +01001234 had_prog_dip(substream, intelhaddata);
Jerome Anand5dab11d2017-01-25 04:27:52 +05301235
Takashi Iwaib5562902017-02-04 22:05:33 +01001236 retval = had_init_audio_ctrl(substream, intelhaddata);
Jerome Anand5dab11d2017-01-25 04:27:52 +05301237
1238 /* Prog buffer address */
Takashi Iwaie1b239f32017-02-03 00:01:18 +01001239 had_init_ringbuf(substream, intelhaddata);
Jerome Anand5dab11d2017-01-25 04:27:52 +05301240
1241 /*
1242 * Program channel mapping in following order:
1243 * FL, FR, C, LFE, RL, RR
1244 */
1245
Takashi Iwai79dda752017-01-30 17:23:39 +01001246 had_write_register(intelhaddata, AUD_BUF_CH_SWAP, SWAP_LFE_CENTER);
Jerome Anand5dab11d2017-01-25 04:27:52 +05301247
1248prep_end:
1249 return retval;
1250}
1251
Takashi Iwai2e52f5e2017-01-31 17:09:13 +01001252/*
Takashi Iwai44684f62017-02-02 17:27:40 +01001253 * ALSA PCM pointer callback
Jerome Anand5dab11d2017-01-25 04:27:52 +05301254 */
Takashi Iwaib5562902017-02-04 22:05:33 +01001255static snd_pcm_uframes_t had_pcm_pointer(struct snd_pcm_substream *substream)
Jerome Anand5dab11d2017-01-25 04:27:52 +05301256{
1257 struct snd_intelhad *intelhaddata;
Takashi Iwaie1b239f32017-02-03 00:01:18 +01001258 int len;
Jerome Anand5dab11d2017-01-25 04:27:52 +05301259
Jerome Anand5dab11d2017-01-25 04:27:52 +05301260 intelhaddata = snd_pcm_substream_chip(substream);
1261
Takashi Iwai91b0cb02017-02-02 17:46:49 +01001262 if (!intelhaddata->connected)
Takashi Iwai79f439e2017-01-31 16:46:44 +01001263 return SNDRV_PCM_POS_XRUN;
1264
Takashi Iwaie1b239f32017-02-03 00:01:18 +01001265 len = had_process_ringbuf(substream, intelhaddata);
1266 if (len < 0)
1267 return SNDRV_PCM_POS_XRUN;
Takashi Iwai8d48c012017-02-07 08:05:46 +01001268 len = bytes_to_frames(substream->runtime, len);
1269 /* wrapping may happen when periods=1 */
1270 len %= substream->runtime->buffer_size;
1271 return len;
Jerome Anand5dab11d2017-01-25 04:27:52 +05301272}
1273
Takashi Iwai2e52f5e2017-01-31 17:09:13 +01001274/*
Takashi Iwai44684f62017-02-02 17:27:40 +01001275 * ALSA PCM mmap callback
Jerome Anand5dab11d2017-01-25 04:27:52 +05301276 */
Takashi Iwaib5562902017-02-04 22:05:33 +01001277static int had_pcm_mmap(struct snd_pcm_substream *substream,
1278 struct vm_area_struct *vma)
Jerome Anand5dab11d2017-01-25 04:27:52 +05301279{
Jerome Anand5dab11d2017-01-25 04:27:52 +05301280 vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot);
1281 return remap_pfn_range(vma, vma->vm_start,
1282 substream->dma_buffer.addr >> PAGE_SHIFT,
1283 vma->vm_end - vma->vm_start, vma->vm_page_prot);
1284}
1285
Takashi Iwai73997b02017-02-02 17:38:50 +01001286/*
1287 * ALSA PCM ops
1288 */
Takashi Iwaib5562902017-02-04 22:05:33 +01001289static const struct snd_pcm_ops had_pcm_ops = {
1290 .open = had_pcm_open,
1291 .close = had_pcm_close,
Takashi Iwai73997b02017-02-02 17:38:50 +01001292 .ioctl = snd_pcm_lib_ioctl,
Takashi Iwaib5562902017-02-04 22:05:33 +01001293 .hw_params = had_pcm_hw_params,
1294 .hw_free = had_pcm_hw_free,
1295 .prepare = had_pcm_prepare,
1296 .trigger = had_pcm_trigger,
1297 .pointer = had_pcm_pointer,
1298 .mmap = had_pcm_mmap,
Takashi Iwai73997b02017-02-02 17:38:50 +01001299};
1300
Takashi Iwai8f8d1d72017-02-01 17:24:02 +01001301/* process mode change of the running stream; called in mutex */
Takashi Iwaib5562902017-02-04 22:05:33 +01001302static int had_process_mode_change(struct snd_intelhad *intelhaddata)
Jerome Anand5dab11d2017-01-25 04:27:52 +05301303{
Takashi Iwaida864802017-01-31 13:52:22 +01001304 struct snd_pcm_substream *substream;
Jerome Anand5dab11d2017-01-25 04:27:52 +05301305 int retval = 0;
1306 u32 disp_samp_freq, n_param;
Pierre-Louis Bossart964ca802017-01-31 14:16:52 -06001307 u32 link_rate = 0;
Jerome Anand5dab11d2017-01-25 04:27:52 +05301308
Takashi Iwai313d9f22017-02-02 13:00:12 +01001309 substream = had_substream_get(intelhaddata);
1310 if (!substream)
Takashi Iwaida864802017-01-31 13:52:22 +01001311 return 0;
Jerome Anand5dab11d2017-01-25 04:27:52 +05301312
1313 /* Disable Audio */
Takashi Iwai40ce4b52017-02-07 16:17:06 +01001314 had_enable_audio(intelhaddata, false);
Jerome Anand5dab11d2017-01-25 04:27:52 +05301315
1316 /* Update CTS value */
Takashi Iwaida864802017-01-31 13:52:22 +01001317 disp_samp_freq = intelhaddata->tmds_clock_speed;
Jerome Anand5dab11d2017-01-25 04:27:52 +05301318
Takashi Iwaib5562902017-02-04 22:05:33 +01001319 retval = had_prog_n(substream->runtime->rate, &n_param, intelhaddata);
Jerome Anand5dab11d2017-01-25 04:27:52 +05301320 if (retval) {
Takashi Iwaic75b0472017-01-31 15:49:15 +01001321 dev_err(intelhaddata->dev,
1322 "programming N value failed %#x\n", retval);
Jerome Anand5dab11d2017-01-25 04:27:52 +05301323 goto out;
1324 }
Pierre-Louis Bossart964ca802017-01-31 14:16:52 -06001325
1326 if (intelhaddata->dp_output)
Takashi Iwaida864802017-01-31 13:52:22 +01001327 link_rate = intelhaddata->link_rate;
Pierre-Louis Bossart964ca802017-01-31 14:16:52 -06001328
Takashi Iwaib5562902017-02-04 22:05:33 +01001329 had_prog_cts(substream->runtime->rate, disp_samp_freq, link_rate,
1330 n_param, intelhaddata);
Jerome Anand5dab11d2017-01-25 04:27:52 +05301331
1332 /* Enable Audio */
Takashi Iwai40ce4b52017-02-07 16:17:06 +01001333 had_enable_audio(intelhaddata, true);
Jerome Anand5dab11d2017-01-25 04:27:52 +05301334
1335out:
Takashi Iwai313d9f22017-02-02 13:00:12 +01001336 had_substream_put(intelhaddata);
Jerome Anand5dab11d2017-01-25 04:27:52 +05301337 return retval;
1338}
1339
Takashi Iwai8f8d1d72017-02-01 17:24:02 +01001340/* process hot plug, called from wq with mutex locked */
Takashi Iwai0e9c67d2017-02-01 17:53:19 +01001341static void had_process_hot_plug(struct snd_intelhad *intelhaddata)
Takashi Iwai372d8552017-01-31 13:57:58 +01001342{
Takashi Iwai372d8552017-01-31 13:57:58 +01001343 struct snd_pcm_substream *substream;
Takashi Iwai372d8552017-01-31 13:57:58 +01001344
Takashi Iwaibcce7752017-02-01 17:18:20 +01001345 spin_lock_irq(&intelhaddata->had_spinlock);
Takashi Iwai91b0cb02017-02-02 17:46:49 +01001346 if (intelhaddata->connected) {
Takashi Iwaic75b0472017-01-31 15:49:15 +01001347 dev_dbg(intelhaddata->dev, "Device already connected\n");
Takashi Iwaibcce7752017-02-01 17:18:20 +01001348 spin_unlock_irq(&intelhaddata->had_spinlock);
Takashi Iwai0e9c67d2017-02-01 17:53:19 +01001349 return;
Takashi Iwai372d8552017-01-31 13:57:58 +01001350 }
Takashi Iwai0e9c67d2017-02-01 17:53:19 +01001351
Takashi Iwai91b0cb02017-02-02 17:46:49 +01001352 intelhaddata->connected = true;
Takashi Iwaic75b0472017-01-31 15:49:15 +01001353 dev_dbg(intelhaddata->dev,
1354 "%s @ %d:DEBUG PLUG/UNPLUG : HAD_DRV_CONNECTED\n",
Takashi Iwai372d8552017-01-31 13:57:58 +01001355 __func__, __LINE__);
Takashi Iwaibcce7752017-02-01 17:18:20 +01001356 spin_unlock_irq(&intelhaddata->had_spinlock);
Takashi Iwai372d8552017-01-31 13:57:58 +01001357
Takashi Iwai372d8552017-01-31 13:57:58 +01001358 /* Safety check */
Takashi Iwai313d9f22017-02-02 13:00:12 +01001359 substream = had_substream_get(intelhaddata);
Takashi Iwai372d8552017-01-31 13:57:58 +01001360 if (substream) {
Takashi Iwaic75b0472017-01-31 15:49:15 +01001361 dev_dbg(intelhaddata->dev,
1362 "Force to stop the active stream by disconnection\n");
Takashi Iwai372d8552017-01-31 13:57:58 +01001363 /* Set runtime->state to hw_params done */
1364 snd_pcm_stop(substream, SNDRV_PCM_STATE_SETUP);
Takashi Iwai313d9f22017-02-02 13:00:12 +01001365 had_substream_put(intelhaddata);
Takashi Iwai372d8552017-01-31 13:57:58 +01001366 }
1367
1368 had_build_channel_allocation_map(intelhaddata);
Takashi Iwai372d8552017-01-31 13:57:58 +01001369}
1370
Takashi Iwai8f8d1d72017-02-01 17:24:02 +01001371/* process hot unplug, called from wq with mutex locked */
Takashi Iwai0e9c67d2017-02-01 17:53:19 +01001372static void had_process_hot_unplug(struct snd_intelhad *intelhaddata)
Takashi Iwai372d8552017-01-31 13:57:58 +01001373{
Takashi Iwai313d9f22017-02-02 13:00:12 +01001374 struct snd_pcm_substream *substream;
Takashi Iwai372d8552017-01-31 13:57:58 +01001375
Takashi Iwai313d9f22017-02-02 13:00:12 +01001376 substream = had_substream_get(intelhaddata);
1377
Takashi Iwaibcce7752017-02-01 17:18:20 +01001378 spin_lock_irq(&intelhaddata->had_spinlock);
Takashi Iwai372d8552017-01-31 13:57:58 +01001379
Takashi Iwai91b0cb02017-02-02 17:46:49 +01001380 if (!intelhaddata->connected) {
Takashi Iwaic75b0472017-01-31 15:49:15 +01001381 dev_dbg(intelhaddata->dev, "Device already disconnected\n");
Takashi Iwaibcce7752017-02-01 17:18:20 +01001382 spin_unlock_irq(&intelhaddata->had_spinlock);
Takashi Iwai313d9f22017-02-02 13:00:12 +01001383 goto out;
Takashi Iwai372d8552017-01-31 13:57:58 +01001384
Takashi Iwai372d8552017-01-31 13:57:58 +01001385 }
1386
Takashi Iwai0e9c67d2017-02-01 17:53:19 +01001387 /* Disable Audio */
Takashi Iwai40ce4b52017-02-07 16:17:06 +01001388 had_enable_audio(intelhaddata, false);
Takashi Iwai0e9c67d2017-02-01 17:53:19 +01001389
Takashi Iwai91b0cb02017-02-02 17:46:49 +01001390 intelhaddata->connected = false;
Takashi Iwaic75b0472017-01-31 15:49:15 +01001391 dev_dbg(intelhaddata->dev,
1392 "%s @ %d:DEBUG PLUG/UNPLUG : HAD_DRV_DISCONNECTED\n",
Takashi Iwai372d8552017-01-31 13:57:58 +01001393 __func__, __LINE__);
Takashi Iwaibcce7752017-02-01 17:18:20 +01001394 spin_unlock_irq(&intelhaddata->had_spinlock);
Takashi Iwai313d9f22017-02-02 13:00:12 +01001395
1396 /* Report to above ALSA layer */
1397 if (substream)
1398 snd_pcm_stop(substream, SNDRV_PCM_STATE_SETUP);
1399
1400 out:
1401 if (substream)
1402 had_substream_put(intelhaddata);
Takashi Iwai372d8552017-01-31 13:57:58 +01001403 kfree(intelhaddata->chmap->chmap);
1404 intelhaddata->chmap->chmap = NULL;
Takashi Iwai372d8552017-01-31 13:57:58 +01001405}
1406
Takashi Iwai73997b02017-02-02 17:38:50 +01001407/*
1408 * ALSA iec958 and ELD controls
1409 */
Jerome Anand5dab11d2017-01-25 04:27:52 +05301410
Jerome Anand5dab11d2017-01-25 04:27:52 +05301411static int had_iec958_info(struct snd_kcontrol *kcontrol,
1412 struct snd_ctl_elem_info *uinfo)
1413{
1414 uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
1415 uinfo->count = 1;
1416 return 0;
1417}
1418
1419static int had_iec958_get(struct snd_kcontrol *kcontrol,
1420 struct snd_ctl_elem_value *ucontrol)
1421{
1422 struct snd_intelhad *intelhaddata = snd_kcontrol_chip(kcontrol);
1423
Takashi Iwai8f8d1d72017-02-01 17:24:02 +01001424 mutex_lock(&intelhaddata->mutex);
Jerome Anand5dab11d2017-01-25 04:27:52 +05301425 ucontrol->value.iec958.status[0] = (intelhaddata->aes_bits >> 0) & 0xff;
1426 ucontrol->value.iec958.status[1] = (intelhaddata->aes_bits >> 8) & 0xff;
1427 ucontrol->value.iec958.status[2] =
1428 (intelhaddata->aes_bits >> 16) & 0xff;
1429 ucontrol->value.iec958.status[3] =
1430 (intelhaddata->aes_bits >> 24) & 0xff;
Takashi Iwai8f8d1d72017-02-01 17:24:02 +01001431 mutex_unlock(&intelhaddata->mutex);
Jerome Anand5dab11d2017-01-25 04:27:52 +05301432 return 0;
1433}
Takashi Iwai372d8552017-01-31 13:57:58 +01001434
Jerome Anand5dab11d2017-01-25 04:27:52 +05301435static int had_iec958_mask_get(struct snd_kcontrol *kcontrol,
1436 struct snd_ctl_elem_value *ucontrol)
1437{
1438 ucontrol->value.iec958.status[0] = 0xff;
1439 ucontrol->value.iec958.status[1] = 0xff;
1440 ucontrol->value.iec958.status[2] = 0xff;
1441 ucontrol->value.iec958.status[3] = 0xff;
1442 return 0;
1443}
Takashi Iwai372d8552017-01-31 13:57:58 +01001444
Jerome Anand5dab11d2017-01-25 04:27:52 +05301445static int had_iec958_put(struct snd_kcontrol *kcontrol,
1446 struct snd_ctl_elem_value *ucontrol)
1447{
1448 unsigned int val;
1449 struct snd_intelhad *intelhaddata = snd_kcontrol_chip(kcontrol);
Takashi Iwai8f8d1d72017-02-01 17:24:02 +01001450 int changed = 0;
Jerome Anand5dab11d2017-01-25 04:27:52 +05301451
Jerome Anand5dab11d2017-01-25 04:27:52 +05301452 val = (ucontrol->value.iec958.status[0] << 0) |
1453 (ucontrol->value.iec958.status[1] << 8) |
1454 (ucontrol->value.iec958.status[2] << 16) |
1455 (ucontrol->value.iec958.status[3] << 24);
Takashi Iwai8f8d1d72017-02-01 17:24:02 +01001456 mutex_lock(&intelhaddata->mutex);
Jerome Anand5dab11d2017-01-25 04:27:52 +05301457 if (intelhaddata->aes_bits != val) {
1458 intelhaddata->aes_bits = val;
Takashi Iwai8f8d1d72017-02-01 17:24:02 +01001459 changed = 1;
Jerome Anand5dab11d2017-01-25 04:27:52 +05301460 }
Takashi Iwai8f8d1d72017-02-01 17:24:02 +01001461 mutex_unlock(&intelhaddata->mutex);
1462 return changed;
Jerome Anand5dab11d2017-01-25 04:27:52 +05301463}
1464
Takashi Iwai4aedb942017-02-02 16:38:39 +01001465static int had_ctl_eld_info(struct snd_kcontrol *kcontrol,
1466 struct snd_ctl_elem_info *uinfo)
1467{
1468 uinfo->type = SNDRV_CTL_ELEM_TYPE_BYTES;
1469 uinfo->count = HDMI_MAX_ELD_BYTES;
1470 return 0;
1471}
1472
1473static int had_ctl_eld_get(struct snd_kcontrol *kcontrol,
1474 struct snd_ctl_elem_value *ucontrol)
1475{
1476 struct snd_intelhad *intelhaddata = snd_kcontrol_chip(kcontrol);
1477
1478 mutex_lock(&intelhaddata->mutex);
1479 memcpy(ucontrol->value.bytes.data, intelhaddata->eld,
1480 HDMI_MAX_ELD_BYTES);
1481 mutex_unlock(&intelhaddata->mutex);
1482 return 0;
1483}
1484
Takashi Iwai73997b02017-02-02 17:38:50 +01001485static const struct snd_kcontrol_new had_controls[] = {
Takashi Iwai4aedb942017-02-02 16:38:39 +01001486 {
1487 .access = SNDRV_CTL_ELEM_ACCESS_READ,
1488 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
1489 .name = SNDRV_CTL_NAME_IEC958("", PLAYBACK, MASK),
1490 .info = had_iec958_info, /* shared */
1491 .get = had_iec958_mask_get,
1492 },
1493 {
1494 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
1495 .name = SNDRV_CTL_NAME_IEC958("", PLAYBACK, DEFAULT),
1496 .info = had_iec958_info,
1497 .get = had_iec958_get,
1498 .put = had_iec958_put,
1499 },
1500 {
1501 .access = (SNDRV_CTL_ELEM_ACCESS_READ |
1502 SNDRV_CTL_ELEM_ACCESS_VOLATILE),
1503 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
1504 .name = "ELD",
1505 .info = had_ctl_eld_info,
1506 .get = had_ctl_eld_get,
1507 },
Jerome Anand5dab11d2017-01-25 04:27:52 +05301508};
1509
Takashi Iwai73997b02017-02-02 17:38:50 +01001510/*
1511 * audio interrupt handler
1512 */
Takashi Iwaida864802017-01-31 13:52:22 +01001513static irqreturn_t display_pipe_interrupt_handler(int irq, void *dev_id)
1514{
1515 struct snd_intelhad *ctx = dev_id;
1516 u32 audio_stat, audio_reg;
1517
Takashi Iwai4151ee82017-01-31 18:14:15 +01001518 audio_reg = AUD_HDMI_STATUS;
Takashi Iwai83af57d2017-02-03 08:50:06 +01001519 had_read_register(ctx, audio_reg, &audio_stat);
Takashi Iwaida864802017-01-31 13:52:22 +01001520
1521 if (audio_stat & HDMI_AUDIO_UNDERRUN) {
Takashi Iwai83af57d2017-02-03 08:50:06 +01001522 had_write_register(ctx, audio_reg, HDMI_AUDIO_UNDERRUN);
Takashi Iwaida864802017-01-31 13:52:22 +01001523 had_process_buffer_underrun(ctx);
1524 }
1525
1526 if (audio_stat & HDMI_AUDIO_BUFFER_DONE) {
Takashi Iwai83af57d2017-02-03 08:50:06 +01001527 had_write_register(ctx, audio_reg, HDMI_AUDIO_BUFFER_DONE);
Takashi Iwaida864802017-01-31 13:52:22 +01001528 had_process_buffer_done(ctx);
1529 }
1530
1531 return IRQ_HANDLED;
1532}
1533
Takashi Iwai73997b02017-02-02 17:38:50 +01001534/*
1535 * monitor plug/unplug notification from i915; just kick off the work
1536 */
Takashi Iwaida864802017-01-31 13:52:22 +01001537static void notify_audio_lpe(struct platform_device *pdev)
1538{
1539 struct snd_intelhad *ctx = platform_get_drvdata(pdev);
Takashi Iwaida864802017-01-31 13:52:22 +01001540
Takashi Iwai99b2ab92017-01-31 16:26:10 +01001541 schedule_work(&ctx->hdmi_audio_wq);
1542}
Takashi Iwaida864802017-01-31 13:52:22 +01001543
Takashi Iwai73997b02017-02-02 17:38:50 +01001544/* the work to handle monitor hot plug/unplug */
Takashi Iwai99b2ab92017-01-31 16:26:10 +01001545static void had_audio_wq(struct work_struct *work)
1546{
1547 struct snd_intelhad *ctx =
1548 container_of(work, struct snd_intelhad, hdmi_audio_wq);
1549 struct intel_hdmi_lpe_audio_pdata *pdata = ctx->dev->platform_data;
1550
Takashi Iwai182cdf22017-02-02 14:43:39 +01001551 pm_runtime_get_sync(ctx->dev);
Takashi Iwai8f8d1d72017-02-01 17:24:02 +01001552 mutex_lock(&ctx->mutex);
Takashi Iwai99b2ab92017-01-31 16:26:10 +01001553 if (!pdata->hdmi_connected) {
1554 dev_dbg(ctx->dev, "%s: Event: HAD_NOTIFY_HOT_UNPLUG\n",
Takashi Iwaida864802017-01-31 13:52:22 +01001555 __func__);
Takashi Iwai4aedb942017-02-02 16:38:39 +01001556 memset(ctx->eld, 0, sizeof(ctx->eld)); /* clear the old ELD */
Takashi Iwai0e9c67d2017-02-01 17:53:19 +01001557 had_process_hot_unplug(ctx);
Takashi Iwaida864802017-01-31 13:52:22 +01001558 } else {
1559 struct intel_hdmi_lpe_audio_eld *eld = &pdata->eld;
1560
Takashi Iwai0e9c67d2017-02-01 17:53:19 +01001561 dev_dbg(ctx->dev, "%s: HAD_NOTIFY_ELD : port = %d, tmds = %d\n",
1562 __func__, eld->port_id, pdata->tmds_clock_speed);
1563
Takashi Iwaida864802017-01-31 13:52:22 +01001564 switch (eld->pipe_id) {
1565 case 0:
1566 ctx->had_config_offset = AUDIO_HDMI_CONFIG_A;
1567 break;
1568 case 1:
1569 ctx->had_config_offset = AUDIO_HDMI_CONFIG_B;
1570 break;
1571 case 2:
1572 ctx->had_config_offset = AUDIO_HDMI_CONFIG_C;
1573 break;
1574 default:
Takashi Iwai99b2ab92017-01-31 16:26:10 +01001575 dev_dbg(ctx->dev, "Invalid pipe %d\n",
Takashi Iwaida864802017-01-31 13:52:22 +01001576 eld->pipe_id);
1577 break;
1578 }
1579
Takashi Iwaidf0435d2017-02-02 15:37:11 +01001580 memcpy(ctx->eld, eld->eld_data, sizeof(ctx->eld));
Takashi Iwaida864802017-01-31 13:52:22 +01001581
Takashi Iwai0e9c67d2017-02-01 17:53:19 +01001582 ctx->dp_output = pdata->dp_output;
1583 ctx->tmds_clock_speed = pdata->tmds_clock_speed;
1584 ctx->link_rate = pdata->link_rate;
1585
Takashi Iwaida864802017-01-31 13:52:22 +01001586 had_process_hot_plug(ctx);
1587
Takashi Iwai0e9c67d2017-02-01 17:53:19 +01001588 /* Process mode change if stream is active */
Takashi Iwaib5562902017-02-04 22:05:33 +01001589 had_process_mode_change(ctx);
Takashi Iwaida864802017-01-31 13:52:22 +01001590 }
Takashi Iwai8f8d1d72017-02-01 17:24:02 +01001591 mutex_unlock(&ctx->mutex);
Takashi Iwai182cdf22017-02-02 14:43:39 +01001592 pm_runtime_put(ctx->dev);
1593}
1594
1595/*
1596 * PM callbacks
1597 */
1598
1599static int hdmi_lpe_audio_runtime_suspend(struct device *dev)
1600{
1601 struct snd_intelhad *ctx = dev_get_drvdata(dev);
1602 struct snd_pcm_substream *substream;
1603
1604 substream = had_substream_get(ctx);
1605 if (substream) {
1606 snd_pcm_suspend(substream);
1607 had_substream_put(ctx);
1608 }
1609
1610 return 0;
1611}
1612
Arnd Bergmann1df98922017-02-07 14:38:51 +01001613static int __maybe_unused hdmi_lpe_audio_suspend(struct device *dev)
Takashi Iwai182cdf22017-02-02 14:43:39 +01001614{
1615 struct snd_intelhad *ctx = dev_get_drvdata(dev);
1616 int err;
1617
1618 err = hdmi_lpe_audio_runtime_suspend(dev);
1619 if (!err)
1620 snd_power_change_state(ctx->card, SNDRV_CTL_POWER_D3hot);
1621 return err;
1622}
1623
Arnd Bergmann1df98922017-02-07 14:38:51 +01001624static int __maybe_unused hdmi_lpe_audio_resume(struct device *dev)
Takashi Iwai182cdf22017-02-02 14:43:39 +01001625{
1626 struct snd_intelhad *ctx = dev_get_drvdata(dev);
1627
1628 snd_power_change_state(ctx->card, SNDRV_CTL_POWER_D0);
1629 return 0;
Takashi Iwaida864802017-01-31 13:52:22 +01001630}
1631
1632/* release resources */
1633static void hdmi_lpe_audio_free(struct snd_card *card)
1634{
1635 struct snd_intelhad *ctx = card->private_data;
1636
Takashi Iwai99b2ab92017-01-31 16:26:10 +01001637 cancel_work_sync(&ctx->hdmi_audio_wq);
1638
Takashi Iwaida864802017-01-31 13:52:22 +01001639 if (ctx->mmio_start)
1640 iounmap(ctx->mmio_start);
1641 if (ctx->irq >= 0)
1642 free_irq(ctx->irq, ctx);
1643}
1644
1645/*
1646 * hdmi_lpe_audio_probe - start bridge with i915
1647 *
1648 * This function is called when the i915 driver creates the
Takashi Iwai2e52f5e2017-01-31 17:09:13 +01001649 * hdmi-lpe-audio platform device.
Takashi Iwaida864802017-01-31 13:52:22 +01001650 */
1651static int hdmi_lpe_audio_probe(struct platform_device *pdev)
1652{
1653 struct snd_card *card;
1654 struct snd_intelhad *ctx;
1655 struct snd_pcm *pcm;
1656 struct intel_hdmi_lpe_audio_pdata *pdata;
1657 int irq;
1658 struct resource *res_mmio;
Takashi Iwai4aedb942017-02-02 16:38:39 +01001659 int i, ret;
Takashi Iwaida864802017-01-31 13:52:22 +01001660
Takashi Iwaida864802017-01-31 13:52:22 +01001661 pdata = pdev->dev.platform_data;
1662 if (!pdata) {
1663 dev_err(&pdev->dev, "%s: quit: pdata not allocated by i915!!\n", __func__);
1664 return -EINVAL;
1665 }
1666
1667 /* get resources */
1668 irq = platform_get_irq(pdev, 0);
1669 if (irq < 0) {
1670 dev_err(&pdev->dev, "Could not get irq resource\n");
1671 return -ENODEV;
1672 }
1673
1674 res_mmio = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1675 if (!res_mmio) {
1676 dev_err(&pdev->dev, "Could not get IO_MEM resources\n");
1677 return -ENXIO;
1678 }
Jerome Anand5dab11d2017-01-25 04:27:52 +05301679
Takashi Iwai5647aec2017-01-31 08:14:34 +01001680 /* create a card instance with ALSA framework */
Takashi Iwaida864802017-01-31 13:52:22 +01001681 ret = snd_card_new(&pdev->dev, hdmi_card_index, hdmi_card_id,
1682 THIS_MODULE, sizeof(*ctx), &card);
1683 if (ret)
1684 return ret;
Jerome Anand5dab11d2017-01-25 04:27:52 +05301685
Takashi Iwaida864802017-01-31 13:52:22 +01001686 ctx = card->private_data;
1687 spin_lock_init(&ctx->had_spinlock);
Takashi Iwai8f8d1d72017-02-01 17:24:02 +01001688 mutex_init(&ctx->mutex);
Takashi Iwai91b0cb02017-02-02 17:46:49 +01001689 ctx->connected = false;
Takashi Iwaida864802017-01-31 13:52:22 +01001690 ctx->dev = &pdev->dev;
1691 ctx->card = card;
Takashi Iwaida864802017-01-31 13:52:22 +01001692 ctx->aes_bits = SNDRV_PCM_DEFAULT_CON_SPDIF;
1693 strcpy(card->driver, INTEL_HAD);
Takashi Iwai873ab032017-02-07 12:14:04 +01001694 strcpy(card->shortname, "Intel HDMI/DP LPE Audio");
1695 strcpy(card->longname, "Intel HDMI/DP LPE Audio");
Jerome Anand5dab11d2017-01-25 04:27:52 +05301696
Takashi Iwaida864802017-01-31 13:52:22 +01001697 ctx->irq = -1;
1698 ctx->tmds_clock_speed = DIS_SAMPLE_RATE_148_5;
Takashi Iwai99b2ab92017-01-31 16:26:10 +01001699 INIT_WORK(&ctx->hdmi_audio_wq, had_audio_wq);
Jerome Anand5dab11d2017-01-25 04:27:52 +05301700
Takashi Iwaida864802017-01-31 13:52:22 +01001701 card->private_free = hdmi_lpe_audio_free;
1702
1703 /* assume pipe A as default */
1704 ctx->had_config_offset = AUDIO_HDMI_CONFIG_A;
1705
1706 platform_set_drvdata(pdev, ctx);
1707
1708 dev_dbg(&pdev->dev, "%s: mmio_start = 0x%x, mmio_end = 0x%x\n",
1709 __func__, (unsigned int)res_mmio->start,
1710 (unsigned int)res_mmio->end);
1711
1712 ctx->mmio_start = ioremap_nocache(res_mmio->start,
1713 (size_t)(resource_size(res_mmio)));
1714 if (!ctx->mmio_start) {
1715 dev_err(&pdev->dev, "Could not get ioremap\n");
1716 ret = -EACCES;
1717 goto err;
1718 }
1719
1720 /* setup interrupt handler */
1721 ret = request_irq(irq, display_pipe_interrupt_handler, 0,
1722 pdev->name, ctx);
1723 if (ret < 0) {
1724 dev_err(&pdev->dev, "request_irq failed\n");
1725 goto err;
1726 }
1727
1728 ctx->irq = irq;
1729
1730 ret = snd_pcm_new(card, INTEL_HAD, PCM_INDEX, MAX_PB_STREAMS,
1731 MAX_CAP_STREAMS, &pcm);
1732 if (ret)
Jerome Anand5dab11d2017-01-25 04:27:52 +05301733 goto err;
1734
1735 /* setup private data which can be retrieved when required */
Takashi Iwaida864802017-01-31 13:52:22 +01001736 pcm->private_data = ctx;
Jerome Anand5dab11d2017-01-25 04:27:52 +05301737 pcm->info_flags = 0;
1738 strncpy(pcm->name, card->shortname, strlen(card->shortname));
Takashi Iwaida864802017-01-31 13:52:22 +01001739 /* setup the ops for playabck */
Takashi Iwaib5562902017-02-04 22:05:33 +01001740 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &had_pcm_ops);
Takashi Iwai412bbe7d52017-02-02 22:03:22 +01001741
1742 /* only 32bit addressable */
1743 dma_set_mask(&pdev->dev, DMA_BIT_MASK(32));
1744 dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(32));
1745
Takashi Iwaie1b239f32017-02-03 00:01:18 +01001746 /* allocate dma pages;
1747 * try to allocate 600k buffer as default which is large enough
Jerome Anand5dab11d2017-01-25 04:27:52 +05301748 */
Takashi Iwaida864802017-01-31 13:52:22 +01001749 snd_pcm_lib_preallocate_pages_for_all(pcm,
Jerome Anand5dab11d2017-01-25 04:27:52 +05301750 SNDRV_DMA_TYPE_DEV, NULL,
Takashi Iwaie1b239f32017-02-03 00:01:18 +01001751 HAD_DEFAULT_BUFFER, HAD_MAX_BUFFER);
Jerome Anand5dab11d2017-01-25 04:27:52 +05301752
Takashi Iwai4aedb942017-02-02 16:38:39 +01001753 /* create controls */
1754 for (i = 0; i < ARRAY_SIZE(had_controls); i++) {
1755 ret = snd_ctl_add(card, snd_ctl_new1(&had_controls[i], ctx));
1756 if (ret < 0)
1757 goto err;
1758 }
Jerome Anand5dab11d2017-01-25 04:27:52 +05301759
1760 init_channel_allocations();
1761
1762 /* Register channel map controls */
Takashi Iwaida864802017-01-31 13:52:22 +01001763 ret = had_register_chmap_ctls(ctx, pcm);
1764 if (ret < 0)
Jerome Anand5dab11d2017-01-25 04:27:52 +05301765 goto err;
1766
Takashi Iwaida864802017-01-31 13:52:22 +01001767 ret = snd_card_register(card);
1768 if (ret)
Takashi Iwai36ec0d92017-01-31 08:47:05 +01001769 goto err;
1770
Takashi Iwaibcce7752017-02-01 17:18:20 +01001771 spin_lock_irq(&pdata->lpe_audio_slock);
Takashi Iwaida864802017-01-31 13:52:22 +01001772 pdata->notify_audio_lpe = notify_audio_lpe;
Takashi Iwai99b2ab92017-01-31 16:26:10 +01001773 pdata->notify_pending = false;
Takashi Iwaibcce7752017-02-01 17:18:20 +01001774 spin_unlock_irq(&pdata->lpe_audio_slock);
Takashi Iwaida864802017-01-31 13:52:22 +01001775
1776 pm_runtime_set_active(&pdev->dev);
1777 pm_runtime_enable(&pdev->dev);
1778
Takashi Iwai99b2ab92017-01-31 16:26:10 +01001779 dev_dbg(&pdev->dev, "%s: handle pending notification\n", __func__);
Takashi Iwaida864802017-01-31 13:52:22 +01001780 schedule_work(&ctx->hdmi_audio_wq);
Jerome Anand5dab11d2017-01-25 04:27:52 +05301781
Takashi Iwai79dda752017-01-30 17:23:39 +01001782 return 0;
Takashi Iwai5647aec2017-01-31 08:14:34 +01001783
Jerome Anand5dab11d2017-01-25 04:27:52 +05301784err:
1785 snd_card_free(card);
Takashi Iwaida864802017-01-31 13:52:22 +01001786 return ret;
Jerome Anand5dab11d2017-01-25 04:27:52 +05301787}
1788
Takashi Iwai79dda752017-01-30 17:23:39 +01001789/*
Takashi Iwaida864802017-01-31 13:52:22 +01001790 * hdmi_lpe_audio_remove - stop bridge with i915
Jerome Anand5dab11d2017-01-25 04:27:52 +05301791 *
Takashi Iwai2e52f5e2017-01-31 17:09:13 +01001792 * This function is called when the platform device is destroyed.
Jerome Anand5dab11d2017-01-25 04:27:52 +05301793 */
Takashi Iwaida864802017-01-31 13:52:22 +01001794static int hdmi_lpe_audio_remove(struct platform_device *pdev)
Jerome Anand5dab11d2017-01-25 04:27:52 +05301795{
Takashi Iwaida864802017-01-31 13:52:22 +01001796 struct snd_intelhad *ctx = platform_get_drvdata(pdev);
Jerome Anand5dab11d2017-01-25 04:27:52 +05301797
Takashi Iwaida864802017-01-31 13:52:22 +01001798 snd_card_free(ctx->card);
Jerome Anand5dab11d2017-01-25 04:27:52 +05301799 return 0;
1800}
1801
Takashi Iwai182cdf22017-02-02 14:43:39 +01001802static const struct dev_pm_ops hdmi_lpe_audio_pm = {
1803 SET_SYSTEM_SLEEP_PM_OPS(hdmi_lpe_audio_suspend, hdmi_lpe_audio_resume)
1804 SET_RUNTIME_PM_OPS(hdmi_lpe_audio_runtime_suspend, NULL, NULL)
1805};
1806
Takashi Iwaida864802017-01-31 13:52:22 +01001807static struct platform_driver hdmi_lpe_audio_driver = {
1808 .driver = {
1809 .name = "hdmi-lpe-audio",
Takashi Iwai182cdf22017-02-02 14:43:39 +01001810 .pm = &hdmi_lpe_audio_pm,
Takashi Iwaida864802017-01-31 13:52:22 +01001811 },
1812 .probe = hdmi_lpe_audio_probe,
1813 .remove = hdmi_lpe_audio_remove,
Takashi Iwaida864802017-01-31 13:52:22 +01001814};
1815
1816module_platform_driver(hdmi_lpe_audio_driver);
1817MODULE_ALIAS("platform:hdmi_lpe_audio");
1818
Jerome Anand5dab11d2017-01-25 04:27:52 +05301819MODULE_AUTHOR("Sailaja Bandarupalli <sailaja.bandarupalli@intel.com>");
1820MODULE_AUTHOR("Ramesh Babu K V <ramesh.babu@intel.com>");
1821MODULE_AUTHOR("Vaibhav Agarwal <vaibhav.agarwal@intel.com>");
1822MODULE_AUTHOR("Jerome Anand <jerome.anand@intel.com>");
1823MODULE_DESCRIPTION("Intel HDMI Audio driver");
1824MODULE_LICENSE("GPL v2");
1825MODULE_SUPPORTED_DEVICE("{Intel,Intel_HAD}");