Mischa Jonker | a92a5d0 | 2013-04-18 11:40:39 +0200 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (C) 2013 Synopsys, Inc. (www.synopsys.com) |
| 3 | * |
| 4 | * This program is free software; you can redistribute it and/or modify |
| 5 | * it under the terms of the GNU General Public License version 2 as |
| 6 | * published by the Free Software Foundation. |
| 7 | */ |
| 8 | /dts-v1/; |
| 9 | |
| 10 | /include/ "skeleton.dtsi" |
| 11 | |
| 12 | / { |
| 13 | compatible = "snps,nsimosci"; |
Mischa Jonker | 6eda477 | 2013-05-16 19:36:08 +0200 | [diff] [blame] | 14 | clock-frequency = <20000000>; /* 20 MHZ */ |
Mischa Jonker | a92a5d0 | 2013-04-18 11:40:39 +0200 | [diff] [blame] | 15 | #address-cells = <1>; |
| 16 | #size-cells = <1>; |
| 17 | interrupt-parent = <&intc>; |
| 18 | |
| 19 | chosen { |
Vineet Gupta | 61fb4bf | 2014-04-05 15:30:22 +0530 | [diff] [blame] | 20 | /* this is for console on PGU */ |
| 21 | /* bootargs = "console=tty0 consoleblank=0"; */ |
| 22 | /* this is for console on serial */ |
Vineet Gupta | e8ef060 | 2014-10-01 14:28:36 +0530 | [diff] [blame^] | 23 | bootargs = "earlycon=uart8250,mmio32,0xf0000000,115200n8 console=tty0 console=ttyS0,115200n8 consoleblank=0 debug"; |
Mischa Jonker | a92a5d0 | 2013-04-18 11:40:39 +0200 | [diff] [blame] | 24 | }; |
| 25 | |
| 26 | aliases { |
| 27 | serial0 = &uart0; |
| 28 | }; |
| 29 | |
Mischa Jonker | a92a5d0 | 2013-04-18 11:40:39 +0200 | [diff] [blame] | 30 | fpga { |
| 31 | compatible = "simple-bus"; |
| 32 | #address-cells = <1>; |
| 33 | #size-cells = <1>; |
| 34 | |
| 35 | /* child and parent address space 1:1 mapped */ |
| 36 | ranges; |
| 37 | |
| 38 | intc: interrupt-controller { |
| 39 | compatible = "snps,arc700-intc"; |
| 40 | interrupt-controller; |
| 41 | #interrupt-cells = <1>; |
| 42 | }; |
| 43 | |
Vineet Gupta | e8ef060 | 2014-10-01 14:28:36 +0530 | [diff] [blame^] | 44 | uart0: serial@f0000000 { |
Mischa Jonker | 6eda477 | 2013-05-16 19:36:08 +0200 | [diff] [blame] | 45 | compatible = "ns8250"; |
Vineet Gupta | e8ef060 | 2014-10-01 14:28:36 +0530 | [diff] [blame^] | 46 | reg = <0xf0000000 0x2000>; |
Mischa Jonker | a92a5d0 | 2013-04-18 11:40:39 +0200 | [diff] [blame] | 47 | interrupts = <11>; |
Mischa Jonker | a92a5d0 | 2013-04-18 11:40:39 +0200 | [diff] [blame] | 48 | clock-frequency = <3686400>; |
| 49 | baud = <115200>; |
| 50 | reg-shift = <2>; |
| 51 | reg-io-width = <4>; |
Mischa Jonker | 6eda477 | 2013-05-16 19:36:08 +0200 | [diff] [blame] | 52 | no-loopback-test = <1>; |
Mischa Jonker | a92a5d0 | 2013-04-18 11:40:39 +0200 | [diff] [blame] | 53 | }; |
| 54 | |
Vineet Gupta | e8ef060 | 2014-10-01 14:28:36 +0530 | [diff] [blame^] | 55 | pgu0: pgu@f9000000 { |
Mischa Jonker | a92a5d0 | 2013-04-18 11:40:39 +0200 | [diff] [blame] | 56 | compatible = "snps,arcpgufb"; |
Vineet Gupta | e8ef060 | 2014-10-01 14:28:36 +0530 | [diff] [blame^] | 57 | reg = <0xf9000000 0x400>; |
Mischa Jonker | a92a5d0 | 2013-04-18 11:40:39 +0200 | [diff] [blame] | 58 | }; |
| 59 | |
Vineet Gupta | e8ef060 | 2014-10-01 14:28:36 +0530 | [diff] [blame^] | 60 | ps2: ps2@f9001000 { |
Mischa Jonker | a92a5d0 | 2013-04-18 11:40:39 +0200 | [diff] [blame] | 61 | compatible = "snps,arc_ps2"; |
Vineet Gupta | e8ef060 | 2014-10-01 14:28:36 +0530 | [diff] [blame^] | 62 | reg = <0xf9000400 0x14>; |
Mischa Jonker | a92a5d0 | 2013-04-18 11:40:39 +0200 | [diff] [blame] | 63 | interrupts = <13>; |
| 64 | interrupt-names = "arc_ps2_irq"; |
| 65 | }; |
| 66 | |
Vineet Gupta | e8ef060 | 2014-10-01 14:28:36 +0530 | [diff] [blame^] | 67 | eth0: ethernet@f0003000 { |
Mischa Jonker | a92a5d0 | 2013-04-18 11:40:39 +0200 | [diff] [blame] | 68 | compatible = "snps,oscilan"; |
Vineet Gupta | e8ef060 | 2014-10-01 14:28:36 +0530 | [diff] [blame^] | 69 | reg = <0xf0003000 0x44>; |
Mischa Jonker | a92a5d0 | 2013-04-18 11:40:39 +0200 | [diff] [blame] | 70 | interrupts = <7>, <8>; |
| 71 | interrupt-names = "rx", "tx"; |
| 72 | }; |
| 73 | }; |
| 74 | }; |