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gerrit-public.fairphone.software / kernel / msm-5.4 / eb5e76ffd4e626655944e99bb85b07e17172620d / . / arch / arm / boot / dts / at91sam9g45.dtsi
blob: 621a329307d675bfea2bc07fac10854a38f2fe8e [file] [log] [blame]
Nicolas Ferre49fe2ba2011-10-10 18:29:24 +0200[diff] [blame]1/*
2 * at91sam9g45.dtsi - Device Tree Include file for AT91SAM9G45 family SoC
3 * applies to AT91SAM9G45, AT91SAM9M10,
4 * AT91SAM9G46, AT91SAM9M11 SoC
5 *
6 * Copyright (C) 2011 Atmel,
7 * 2011 Nicolas Ferre <nicolas.ferre@atmel.com>
8 *
9 * Licensed under GPLv2 or later.
10 */
11
12/include/ "skeleton.dtsi"
13
14/ {
15 model = "Atmel AT91SAM9G45 family SoC";
16 compatible = "atmel,at91sam9g45";
17 interrupt-parent = <&aic>;
18
19 aliases {
20 serial0 = &dbgu;
21 serial1 = &usart0;
22 serial2 = &usart1;
23 serial3 = &usart2;
24 serial4 = &usart3;
Nicolas Ferre21f81872012-02-11 15:41:40 +0100[diff] [blame]25 gpio0 = &pioA;
26 gpio1 = &pioB;
27 gpio2 = &pioC;
28 gpio3 = &pioD;
29 gpio4 = &pioE;
Nicolas Ferre3a61a5d2012-01-19 10:13:40 +0100[diff] [blame]30 tcb0 = &tcb0;
31 tcb1 = &tcb1;
Nicolas Ferre49fe2ba2011-10-10 18:29:24 +0200[diff] [blame]32 };
33 cpus {
34 cpu@0 {
35 compatible = "arm,arm926ejs";
36 };
37 };
38
39 memory@70000000 {
40 reg = <0x70000000 0x10000000>;
41 };
42
43 ahb {
44 compatible = "simple-bus";
45 #address-cells = <1>;
46 #size-cells = <1>;
47 ranges;
48
49 apb {
50 compatible = "simple-bus";
51 #address-cells = <1>;
52 #size-cells = <1>;
53 ranges;
54
55 aic: interrupt-controller@fffff000 {
Nicolas Ferree2615012011-11-22 22:26:09 +0100[diff] [blame]56 #interrupt-cells = <2>;
Nicolas Ferre49fe2ba2011-10-10 18:29:24 +0200[diff] [blame]57 compatible = "atmel,at91rm9200-aic";
58 interrupt-controller;
59 interrupt-parent;
60 reg = <0xfffff000 0x200>;
61 };
62
Jean-Christophe PLAGNIOL-VILLARDeb5e76f2012-03-02 20:44:23 +0800[diff] [blame^]63 pmc: pmc@fffffc00 {
64 compatible = "atmel,at91rm9200-pmc";
65 reg = <0xfffffc00 0x100>;
66 };
67
Jean-Christophe PLAGNIOL-VILLARD23fa6482012-02-27 11:19:34 +0100[diff] [blame]68 pit: timer@fffffd30 {
69 compatible = "atmel,at91sam9260-pit";
70 reg = <0xfffffd30 0xf>;
71 interrupts = <1 4>;
72 };
73
Nicolas Ferre3a61a5d2012-01-19 10:13:40 +0100[diff] [blame]74
75 tcb0: timer@fff7c000 {
76 compatible = "atmel,at91rm9200-tcb";
77 reg = <0xfff7c000 0x100>;
78 interrupts = <18 4>;
79 };
80
81 tcb1: timer@fffd4000 {
82 compatible = "atmel,at91rm9200-tcb";
83 reg = <0xfffd4000 0x100>;
84 interrupts = <18 4>;
85 };
86
Nicolas Ferre49fe2ba2011-10-10 18:29:24 +0200[diff] [blame]87 dma: dma-controller@ffffec00 {
88 compatible = "atmel,at91sam9g45-dma";
89 reg = <0xffffec00 0x200>;
Nicolas Ferree2615012011-11-22 22:26:09 +0100[diff] [blame]90 interrupts = <21 4>;
Nicolas Ferre49fe2ba2011-10-10 18:29:24 +0200[diff] [blame]91 };
92
Nicolas Ferre21f81872012-02-11 15:41:40 +0100[diff] [blame]93 pioA: gpio@fffff200 {
94 compatible = "atmel,at91rm9200-gpio";
95 reg = <0xfffff200 0x100>;
96 interrupts = <2 4>;
97 #gpio-cells = <2>;
98 gpio-controller;
99 interrupt-controller;
100 };
101
102 pioB: gpio@fffff400 {
103 compatible = "atmel,at91rm9200-gpio";
104 reg = <0xfffff400 0x100>;
105 interrupts = <3 4>;
106 #gpio-cells = <2>;
107 gpio-controller;
108 interrupt-controller;
109 };
110
111 pioC: gpio@fffff600 {
112 compatible = "atmel,at91rm9200-gpio";
113 reg = <0xfffff600 0x100>;
114 interrupts = <4 4>;
115 #gpio-cells = <2>;
116 gpio-controller;
117 interrupt-controller;
118 };
119
120 pioD: gpio@fffff800 {
121 compatible = "atmel,at91rm9200-gpio";
122 reg = <0xfffff800 0x100>;
123 interrupts = <5 4>;
124 #gpio-cells = <2>;
125 gpio-controller;
126 interrupt-controller;
127 };
128
129 pioE: gpio@fffffa00 {
130 compatible = "atmel,at91rm9200-gpio";
131 reg = <0xfffffa00 0x100>;
132 interrupts = <5 4>;
133 #gpio-cells = <2>;
134 gpio-controller;
135 interrupt-controller;
136 };
137
Nicolas Ferre49fe2ba2011-10-10 18:29:24 +0200[diff] [blame]138 dbgu: serial@ffffee00 {
139 compatible = "atmel,at91sam9260-usart";
140 reg = <0xffffee00 0x200>;
Nicolas Ferree2615012011-11-22 22:26:09 +0100[diff] [blame]141 interrupts = <1 4>;
Nicolas Ferre49fe2ba2011-10-10 18:29:24 +0200[diff] [blame]142 status = "disabled";
143 };
144
145 usart0: serial@fff8c000 {
146 compatible = "atmel,at91sam9260-usart";
147 reg = <0xfff8c000 0x200>;
Nicolas Ferree2615012011-11-22 22:26:09 +0100[diff] [blame]148 interrupts = <7 4>;
Nicolas Ferre49fe2ba2011-10-10 18:29:24 +0200[diff] [blame]149 atmel,use-dma-rx;
150 atmel,use-dma-tx;
151 status = "disabled";
152 };
153
154 usart1: serial@fff90000 {
155 compatible = "atmel,at91sam9260-usart";
156 reg = <0xfff90000 0x200>;
Nicolas Ferree2615012011-11-22 22:26:09 +0100[diff] [blame]157 interrupts = <8 4>;
Nicolas Ferre49fe2ba2011-10-10 18:29:24 +0200[diff] [blame]158 atmel,use-dma-rx;
159 atmel,use-dma-tx;
160 status = "disabled";
161 };
162
163 usart2: serial@fff94000 {
164 compatible = "atmel,at91sam9260-usart";
165 reg = <0xfff94000 0x200>;
Nicolas Ferree2615012011-11-22 22:26:09 +0100[diff] [blame]166 interrupts = <9 4>;
Nicolas Ferre49fe2ba2011-10-10 18:29:24 +0200[diff] [blame]167 atmel,use-dma-rx;
168 atmel,use-dma-tx;
169 status = "disabled";
170 };
171
172 usart3: serial@fff98000 {
173 compatible = "atmel,at91sam9260-usart";
174 reg = <0xfff98000 0x200>;
Nicolas Ferree2615012011-11-22 22:26:09 +0100[diff] [blame]175 interrupts = <10 4>;
Nicolas Ferre49fe2ba2011-10-10 18:29:24 +0200[diff] [blame]176 atmel,use-dma-rx;
177 atmel,use-dma-tx;
178 status = "disabled";
179 };
Nicolas Ferre0d4f99d2011-12-05 18:03:05 +0100[diff] [blame]180
181 macb0: ethernet@fffbc000 {
182 compatible = "cdns,at32ap7000-macb", "cdns,macb";
183 reg = <0xfffbc000 0x100>;
Nicolas Ferree2615012011-11-22 22:26:09 +0100[diff] [blame]184 interrupts = <25 4>;
Nicolas Ferre0d4f99d2011-12-05 18:03:05 +0100[diff] [blame]185 status = "disabled";
186 };
Nicolas Ferre49fe2ba2011-10-10 18:29:24 +0200[diff] [blame]187 };
Jean-Christophe PLAGNIOL-VILLARDd6a01662012-01-26 02:11:06 +0800[diff] [blame]188
189 nand0: nand@40000000 {
190 compatible = "atmel,at91rm9200-nand";
191 #address-cells = <1>;
192 #size-cells = <1>;
193 reg = <0x40000000 0x10000000
194 0xffffe200 0x200
195 >;
196 atmel,nand-addr-offset = <21>;
197 atmel,nand-cmd-offset = <22>;
198 gpios = <&pioC 8 0
199 &pioC 14 0
200 0
201 >;
202 status = "disabled";
203 };
Nicolas Ferre49fe2ba2011-10-10 18:29:24 +0200[diff] [blame]204 };
Jean-Christophe PLAGNIOL-VILLARD8f24bda2012-02-05 18:32:37 +0800[diff] [blame]205
206 i2c@0 {
207 compatible = "i2c-gpio";
208 gpios = <&pioA 20 0 /* sda */
209 &pioA 21 0 /* scl */
210 >;
211 i2c-gpio,sda-open-drain;
212 i2c-gpio,scl-open-drain;
213 i2c-gpio,delay-us = <5>; /* ~100 kHz */
214 #address-cells = <1>;
215 #size-cells = <0>;
216 status = "disabled";
217 };
Nicolas Ferre49fe2ba2011-10-10 18:29:24 +0200[diff] [blame]218};