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Greg Ungerercd3dd402009-04-27 15:09:29 +10001/*
2 * intc-simr.c
3 *
Philippe De Muyter03cbc3852010-08-19 19:04:58 +02004 * Interrupt controller code for the ColdFire 5208, 5207 & 532x parts.
5 *
Greg Ungerercd3dd402009-04-27 15:09:29 +10006 * (C) Copyright 2009, Greg Ungerer <gerg@snapgear.com>
7 *
8 * This file is subject to the terms and conditions of the GNU General Public
9 * License. See the file COPYING in the main directory of this archive
10 * for more details.
11 */
12
13#include <linux/types.h>
14#include <linux/init.h>
15#include <linux/kernel.h>
16#include <linux/interrupt.h>
17#include <linux/irq.h>
18#include <linux/io.h>
19#include <asm/coldfire.h>
20#include <asm/mcfsim.h>
21#include <asm/traps.h>
22
Thomas Gleixnerf80c3532011-02-06 23:39:14 +000023static void intc_irq_mask(struct irq_data *d)
Greg Ungerercd3dd402009-04-27 15:09:29 +100024{
Thomas Gleixnerf80c3532011-02-06 23:39:14 +000025 unsigned int irq = d->irq;
26
Greg Ungerer277c5e32009-04-29 12:07:13 +100027 if (irq >= MCFINT_VECBASE) {
28 if (irq < MCFINT_VECBASE + 64)
29 __raw_writeb(irq - MCFINT_VECBASE, MCFINTC0_SIMR);
30 else if ((irq < MCFINT_VECBASE + 128) && MCFINTC1_SIMR)
31 __raw_writeb(irq - MCFINT_VECBASE - 64, MCFINTC1_SIMR);
32 }
Greg Ungerercd3dd402009-04-27 15:09:29 +100033}
34
Thomas Gleixnerf80c3532011-02-06 23:39:14 +000035static void intc_irq_unmask(struct irq_data *d)
Greg Ungerercd3dd402009-04-27 15:09:29 +100036{
Thomas Gleixnerf80c3532011-02-06 23:39:14 +000037 unsigned int irq = d->irq;
38
Greg Ungerer277c5e32009-04-29 12:07:13 +100039 if (irq >= MCFINT_VECBASE) {
40 if (irq < MCFINT_VECBASE + 64)
41 __raw_writeb(irq - MCFINT_VECBASE, MCFINTC0_CIMR);
42 else if ((irq < MCFINT_VECBASE + 128) && MCFINTC1_CIMR)
43 __raw_writeb(irq - MCFINT_VECBASE - 64, MCFINTC1_CIMR);
44 }
Greg Ungerercd3dd402009-04-27 15:09:29 +100045}
46
Thomas Gleixnerf80c3532011-02-06 23:39:14 +000047static int intc_irq_set_type(struct irq_data *d, unsigned int type)
Greg Ungerercd3dd402009-04-27 15:09:29 +100048{
Thomas Gleixnerf80c3532011-02-06 23:39:14 +000049 unsigned int irq = d->irq;
50
Greg Ungerer277c5e32009-04-29 12:07:13 +100051 if (irq >= MCFINT_VECBASE) {
52 if (irq < MCFINT_VECBASE + 64)
53 __raw_writeb(5, MCFINTC0_ICR0 + irq - MCFINT_VECBASE);
54 else if ((irq < MCFINT_VECBASE) && MCFINTC1_ICR0)
55 __raw_writeb(5, MCFINTC1_ICR0 + irq - MCFINT_VECBASE - 64);
56 }
Greg Ungerercd3dd402009-04-27 15:09:29 +100057 return 0;
58}
59
60static struct irq_chip intc_irq_chip = {
61 .name = "CF-INTC",
Thomas Gleixnerf80c3532011-02-06 23:39:14 +000062 .irq_mask = intc_irq_mask,
63 .irq_unmask = intc_irq_unmask,
64 .irq_set_type = intc_irq_set_type,
Greg Ungerercd3dd402009-04-27 15:09:29 +100065};
66
67void __init init_IRQ(void)
68{
69 int irq;
70
71 init_vectors();
72
Greg Ungerere47cc3d2009-05-06 14:28:25 +100073 /* Mask all interrupt sources */
74 __raw_writeb(0xff, MCFINTC0_SIMR);
75 if (MCFINTC1_SIMR)
76 __raw_writeb(0xff, MCFINTC1_SIMR);
77
Greg Ungerercd3dd402009-04-27 15:09:29 +100078 for (irq = 0; (irq < NR_IRQS); irq++) {
Greg Ungerer04570b42010-09-09 17:12:53 +100079 set_irq_chip(irq, &intc_irq_chip);
80 set_irq_type(irq, IRQ_TYPE_LEVEL_HIGH);
81 set_irq_handler(irq, handle_level_irq);
Greg Ungerercd3dd402009-04-27 15:09:29 +100082 }
83}
84