blob: 006562f7f23e724722226280799c401a1f80c2ee [file] [log] [blame]
Ben Skeggs56d237d2014-05-19 14:54:33 +10001/*
Ben Skeggs26f6d882011-07-04 16:25:18 +10002 * Copyright 2011 Red Hat Inc.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
21 *
22 * Authors: Ben Skeggs
23 */
Ben Skeggs15907002018-05-08 20:39:47 +100024#include "disp.h"
25#include "atom.h"
26#include "core.h"
27#include "head.h"
28#include "wndw.h"
Ben Skeggs26f6d882011-07-04 16:25:18 +100029
Ben Skeggs51beb422011-07-05 10:33:08 +100030#include <linux/dma-mapping.h>
Alastair Bridgewater34fd3e52017-04-11 13:11:18 -040031#include <linux/hdmi.h>
Ben Skeggs83fc0832011-07-05 13:08:40 +100032
David Howells760285e2012-10-02 18:01:07 +010033#include <drm/drmP.h>
Ben Skeggs973f10c2016-11-04 17:20:36 +100034#include <drm/drm_atomic_helper.h>
David Howells760285e2012-10-02 18:01:07 +010035#include <drm/drm_crtc_helper.h>
Ben Skeggs48743222014-05-31 01:48:06 +100036#include <drm/drm_dp_helper.h>
Daniel Vetterb516a9e2015-12-04 09:45:43 +010037#include <drm/drm_fb_helper.h>
Ben Skeggsad633612016-11-04 17:20:36 +100038#include <drm/drm_plane_helper.h>
Alastair Bridgewater34fd3e52017-04-11 13:11:18 -040039#include <drm/drm_edid.h>
Ben Skeggs26f6d882011-07-04 16:25:18 +100040
Ben Skeggsfdb751e2014-08-10 04:10:23 +100041#include <nvif/class.h>
Ben Skeggs845f2722015-11-08 12:16:40 +100042#include <nvif/cl0002.h>
Ben Skeggs7568b102015-11-08 10:44:19 +100043#include <nvif/cl5070.h>
Ben Skeggs7568b102015-11-08 10:44:19 +100044#include <nvif/cl507d.h>
Ben Skeggs973f10c2016-11-04 17:20:36 +100045#include <nvif/event.h>
Ben Skeggsfdb751e2014-08-10 04:10:23 +100046
Ben Skeggs4dc28132016-05-20 09:22:55 +100047#include "nouveau_drv.h"
Ben Skeggs77145f12012-07-31 16:16:21 +100048#include "nouveau_dma.h"
49#include "nouveau_gem.h"
Ben Skeggs26f6d882011-07-04 16:25:18 +100050#include "nouveau_connector.h"
51#include "nouveau_encoder.h"
Ben Skeggsf589be82012-07-22 11:55:54 +100052#include "nouveau_fence.h"
Ben Skeggs839ca902016-11-04 17:20:36 +100053#include "nouveau_fbcon.h"
Ben Skeggs816af2f2011-11-16 15:48:48 +100054
Ben Skeggsb5a794b2012-10-16 14:18:32 +100055/******************************************************************************
Ben Skeggs3dbd0362016-11-04 17:20:36 +100056 * Atomic state
57 *****************************************************************************/
Ben Skeggs839ca902016-11-04 17:20:36 +100058
59struct nv50_outp_atom {
60 struct list_head head;
61
62 struct drm_encoder *encoder;
63 bool flush_disable;
64
Ben Skeggsf88bc9d32018-05-08 20:39:47 +100065 union nv50_outp_atom_mask {
Ben Skeggs839ca902016-11-04 17:20:36 +100066 struct {
67 bool ctrl:1;
68 };
69 u8 mask;
Ben Skeggsf88bc9d32018-05-08 20:39:47 +100070 } set, clr;
Ben Skeggs839ca902016-11-04 17:20:36 +100071};
72
Ben Skeggs3dbd0362016-11-04 17:20:36 +100073/******************************************************************************
Ben Skeggsb5a794b2012-10-16 14:18:32 +100074 * EVO channel
75 *****************************************************************************/
76
Ben Skeggsb5a794b2012-10-16 14:18:32 +100077static int
Ben Skeggsa01ca782015-08-20 14:54:15 +100078nv50_chan_create(struct nvif_device *device, struct nvif_object *disp,
Ben Skeggs315a8b22015-08-20 14:54:16 +100079 const s32 *oclass, u8 head, void *data, u32 size,
Ben Skeggsa01ca782015-08-20 14:54:15 +100080 struct nv50_chan *chan)
Ben Skeggsb5a794b2012-10-16 14:18:32 +100081{
Ben Skeggs41a63402015-08-20 14:54:16 +100082 struct nvif_sclass *sclass;
83 int ret, i, n;
Ben Skeggs6af52892014-11-03 15:01:33 +100084
Ben Skeggsa01ca782015-08-20 14:54:15 +100085 chan->device = device;
86
Ben Skeggs41a63402015-08-20 14:54:16 +100087 ret = n = nvif_object_sclass_get(disp, &sclass);
Ben Skeggs6af52892014-11-03 15:01:33 +100088 if (ret < 0)
89 return ret;
90
Ben Skeggs410f3ec2014-08-10 04:10:25 +100091 while (oclass[0]) {
Ben Skeggs41a63402015-08-20 14:54:16 +100092 for (i = 0; i < n; i++) {
93 if (sclass[i].oclass == oclass[0]) {
Ben Skeggsfcf3f912015-09-04 14:40:32 +100094 ret = nvif_object_init(disp, 0, oclass[0],
Ben Skeggsa01ca782015-08-20 14:54:15 +100095 data, size, &chan->user);
Ben Skeggs6af52892014-11-03 15:01:33 +100096 if (ret == 0)
Ben Skeggs01326052017-11-01 03:56:19 +100097 nvif_object_map(&chan->user, NULL, 0);
Ben Skeggs41a63402015-08-20 14:54:16 +100098 nvif_object_sclass_put(&sclass);
Ben Skeggs6af52892014-11-03 15:01:33 +100099 return ret;
100 }
Ben Skeggsb76f1522014-08-10 04:10:28 +1000101 }
Ben Skeggs6af52892014-11-03 15:01:33 +1000102 oclass++;
Ben Skeggs410f3ec2014-08-10 04:10:25 +1000103 }
Ben Skeggs6af52892014-11-03 15:01:33 +1000104
Ben Skeggs41a63402015-08-20 14:54:16 +1000105 nvif_object_sclass_put(&sclass);
Ben Skeggs410f3ec2014-08-10 04:10:25 +1000106 return -ENOSYS;
Ben Skeggsb5a794b2012-10-16 14:18:32 +1000107}
108
109static void
Ben Skeggs0ad72862014-08-10 04:10:22 +1000110nv50_chan_destroy(struct nv50_chan *chan)
Ben Skeggsb5a794b2012-10-16 14:18:32 +1000111{
Ben Skeggs0ad72862014-08-10 04:10:22 +1000112 nvif_object_fini(&chan->user);
Ben Skeggsb5a794b2012-10-16 14:18:32 +1000113}
114
115/******************************************************************************
Ben Skeggsb5a794b2012-10-16 14:18:32 +1000116 * DMA EVO channel
117 *****************************************************************************/
118
Ben Skeggs15907002018-05-08 20:39:47 +1000119void
Ben Skeggsf5650472018-05-08 20:39:46 +1000120nv50_dmac_destroy(struct nv50_dmac *dmac)
Ben Skeggsb5a794b2012-10-16 14:18:32 +1000121{
Ben Skeggs0ad72862014-08-10 04:10:22 +1000122 nvif_object_fini(&dmac->vram);
123 nvif_object_fini(&dmac->sync);
124
125 nv50_chan_destroy(&dmac->base);
126
Ben Skeggsf5650472018-05-08 20:39:46 +1000127 nvif_mem_fini(&dmac->push);
Ben Skeggsb5a794b2012-10-16 14:18:32 +1000128}
129
Ben Skeggs15907002018-05-08 20:39:47 +1000130int
Ben Skeggsa01ca782015-08-20 14:54:15 +1000131nv50_dmac_create(struct nvif_device *device, struct nvif_object *disp,
Ben Skeggs315a8b22015-08-20 14:54:16 +1000132 const s32 *oclass, u8 head, void *data, u32 size, u64 syncbuf,
Ben Skeggse225f442012-11-21 14:40:21 +1000133 struct nv50_dmac *dmac)
Ben Skeggsb5a794b2012-10-16 14:18:32 +1000134{
Ben Skeggsf5650472018-05-08 20:39:46 +1000135 struct nouveau_cli *cli = (void *)device->object.client;
Ben Skeggs648d4df2014-08-10 04:10:27 +1000136 struct nv50_disp_core_channel_dma_v0 *args = data;
Ben Skeggsb5a794b2012-10-16 14:18:32 +1000137 int ret;
138
Daniel Vetter59ad1462012-12-02 14:49:44 +0100139 mutex_init(&dmac->lock);
140
Ben Skeggsf5650472018-05-08 20:39:46 +1000141 ret = nvif_mem_init_map(&cli->mmu, NVIF_MEM_COHERENT, 0x1000,
142 &dmac->push);
Ben Skeggsb5a794b2012-10-16 14:18:32 +1000143 if (ret)
144 return ret;
145
Ben Skeggsf5650472018-05-08 20:39:46 +1000146 dmac->ptr = dmac->push.object.map.ptr;
147
148 args->pushbuf = nvif_handle(&dmac->push.object);
Ben Skeggsbf81df92015-08-20 14:54:16 +1000149
Ben Skeggsa01ca782015-08-20 14:54:15 +1000150 ret = nv50_chan_create(device, disp, oclass, head, data, size,
151 &dmac->base);
Ben Skeggsb5a794b2012-10-16 14:18:32 +1000152 if (ret)
153 return ret;
154
Ben Skeggsa01ca782015-08-20 14:54:15 +1000155 ret = nvif_object_init(&dmac->base.user, 0xf0000000, NV_DMA_IN_MEMORY,
Ben Skeggs4acfd702014-08-10 04:10:24 +1000156 &(struct nv_dma_v0) {
157 .target = NV_DMA_V0_TARGET_VRAM,
158 .access = NV_DMA_V0_ACCESS_RDWR,
Ben Skeggsb5a794b2012-10-16 14:18:32 +1000159 .start = syncbuf + 0x0000,
160 .limit = syncbuf + 0x0fff,
Ben Skeggs4acfd702014-08-10 04:10:24 +1000161 }, sizeof(struct nv_dma_v0),
Ben Skeggs0ad72862014-08-10 04:10:22 +1000162 &dmac->sync);
Ben Skeggsb5a794b2012-10-16 14:18:32 +1000163 if (ret)
Ben Skeggs47057302012-11-16 13:58:48 +1000164 return ret;
Ben Skeggsb5a794b2012-10-16 14:18:32 +1000165
Ben Skeggsa01ca782015-08-20 14:54:15 +1000166 ret = nvif_object_init(&dmac->base.user, 0xf0000001, NV_DMA_IN_MEMORY,
Ben Skeggs4acfd702014-08-10 04:10:24 +1000167 &(struct nv_dma_v0) {
168 .target = NV_DMA_V0_TARGET_VRAM,
169 .access = NV_DMA_V0_ACCESS_RDWR,
Ben Skeggsb5a794b2012-10-16 14:18:32 +1000170 .start = 0,
Ben Skeggsf392ec42014-08-10 04:10:28 +1000171 .limit = device->info.ram_user - 1,
Ben Skeggs4acfd702014-08-10 04:10:24 +1000172 }, sizeof(struct nv_dma_v0),
Ben Skeggs0ad72862014-08-10 04:10:22 +1000173 &dmac->vram);
Ben Skeggsb5a794b2012-10-16 14:18:32 +1000174 if (ret)
Ben Skeggs47057302012-11-16 13:58:48 +1000175 return ret;
Ben Skeggsb5a794b2012-10-16 14:18:32 +1000176
Ben Skeggsb5a794b2012-10-16 14:18:32 +1000177 return ret;
178}
179
Ben Skeggs410f3ec2014-08-10 04:10:25 +1000180/******************************************************************************
Ben Skeggsbdb8c212011-11-12 01:30:24 +1000181 * EVO channel helpers
182 *****************************************************************************/
Ben Skeggs15907002018-05-08 20:39:47 +1000183u32 *
184evo_wait(struct nv50_dmac *evoc, int nr)
Ben Skeggs51beb422011-07-05 10:33:08 +1000185{
Ben Skeggse225f442012-11-21 14:40:21 +1000186 struct nv50_dmac *dmac = evoc;
Ben Skeggsa01ca782015-08-20 14:54:15 +1000187 struct nvif_device *device = dmac->base.device;
Ben Skeggs0ad72862014-08-10 04:10:22 +1000188 u32 put = nvif_rd32(&dmac->base.user, 0x0000) / 4;
Ben Skeggs51beb422011-07-05 10:33:08 +1000189
Daniel Vetter59ad1462012-12-02 14:49:44 +0100190 mutex_lock(&dmac->lock);
Ben Skeggsde8268c2012-11-16 10:24:31 +1000191 if (put + nr >= (PAGE_SIZE / 4) - 8) {
Ben Skeggsb5a794b2012-10-16 14:18:32 +1000192 dmac->ptr[put] = 0x20000000;
Ben Skeggs51beb422011-07-05 10:33:08 +1000193
Ben Skeggs0ad72862014-08-10 04:10:22 +1000194 nvif_wr32(&dmac->base.user, 0x0000, 0x00000000);
Ben Skeggs54442042015-08-20 14:54:11 +1000195 if (nvif_msec(device, 2000,
196 if (!nvif_rd32(&dmac->base.user, 0x0004))
197 break;
198 ) < 0) {
Daniel Vetter59ad1462012-12-02 14:49:44 +0100199 mutex_unlock(&dmac->lock);
Joe Perches8dfe1622017-02-28 04:55:54 -0800200 pr_err("nouveau: evo channel stalled\n");
Ben Skeggs51beb422011-07-05 10:33:08 +1000201 return NULL;
202 }
203
204 put = 0;
205 }
206
Ben Skeggsb5a794b2012-10-16 14:18:32 +1000207 return dmac->ptr + put;
Ben Skeggs51beb422011-07-05 10:33:08 +1000208}
209
Ben Skeggs15907002018-05-08 20:39:47 +1000210void
211evo_kick(u32 *push, struct nv50_dmac *evoc)
Ben Skeggs51beb422011-07-05 10:33:08 +1000212{
Ben Skeggse225f442012-11-21 14:40:21 +1000213 struct nv50_dmac *dmac = evoc;
Ben Skeggs0ad72862014-08-10 04:10:22 +1000214 nvif_wr32(&dmac->base.user, 0x0000, (push - dmac->ptr) << 2);
Daniel Vetter59ad1462012-12-02 14:49:44 +0100215 mutex_unlock(&dmac->lock);
Ben Skeggs51beb422011-07-05 10:33:08 +1000216}
217
Ben Skeggs438d99e2011-07-05 16:48:06 +1000218/******************************************************************************
Ben Skeggsd92c8ad2016-11-04 17:20:36 +1000219 * Output path helpers
Ben Skeggsa91d3222014-12-22 16:30:13 +1000220 *****************************************************************************/
Ben Skeggs6c22ea32017-05-19 23:59:35 +1000221static void
222nv50_outp_release(struct nouveau_encoder *nv_encoder)
223{
224 struct nv50_disp *disp = nv50_disp(nv_encoder->base.base.dev);
225 struct {
226 struct nv50_disp_mthd_v1 base;
227 } args = {
228 .base.version = 1,
229 .base.method = NV50_DISP_MTHD_V1_RELEASE,
230 .base.hasht = nv_encoder->dcb->hasht,
231 .base.hashm = nv_encoder->dcb->hashm,
232 };
233
Ben Skeggs0d4a2c52018-05-08 20:39:47 +1000234 nvif_mthd(&disp->disp->object, 0, &args, sizeof(args));
Ben Skeggs6c22ea32017-05-19 23:59:35 +1000235 nv_encoder->or = -1;
236 nv_encoder->link = 0;
237}
238
239static int
240nv50_outp_acquire(struct nouveau_encoder *nv_encoder)
241{
242 struct nouveau_drm *drm = nouveau_drm(nv_encoder->base.base.dev);
243 struct nv50_disp *disp = nv50_disp(drm->dev);
244 struct {
245 struct nv50_disp_mthd_v1 base;
246 struct nv50_disp_acquire_v0 info;
247 } args = {
248 .base.version = 1,
249 .base.method = NV50_DISP_MTHD_V1_ACQUIRE,
250 .base.hasht = nv_encoder->dcb->hasht,
251 .base.hashm = nv_encoder->dcb->hashm,
252 };
253 int ret;
254
Ben Skeggs0d4a2c52018-05-08 20:39:47 +1000255 ret = nvif_mthd(&disp->disp->object, 0, &args, sizeof(args));
Ben Skeggs6c22ea32017-05-19 23:59:35 +1000256 if (ret) {
257 NV_ERROR(drm, "error acquiring output path: %d\n", ret);
258 return ret;
259 }
260
261 nv_encoder->or = args.info.or;
262 nv_encoder->link = args.info.link;
263 return 0;
264}
265
Ben Skeggsd92c8ad2016-11-04 17:20:36 +1000266static int
267nv50_outp_atomic_check_view(struct drm_encoder *encoder,
268 struct drm_crtc_state *crtc_state,
269 struct drm_connector_state *conn_state,
270 struct drm_display_mode *native_mode)
271{
272 struct drm_display_mode *adjusted_mode = &crtc_state->adjusted_mode;
273 struct drm_display_mode *mode = &crtc_state->mode;
274 struct drm_connector *connector = conn_state->connector;
275 struct nouveau_conn_atom *asyc = nouveau_conn_atom(conn_state);
276 struct nouveau_drm *drm = nouveau_drm(encoder->dev);
277
278 NV_ATOMIC(drm, "%s atomic_check\n", encoder->name);
279 asyc->scaler.full = false;
280 if (!native_mode)
281 return 0;
282
283 if (asyc->scaler.mode == DRM_MODE_SCALE_NONE) {
284 switch (connector->connector_type) {
285 case DRM_MODE_CONNECTOR_LVDS:
286 case DRM_MODE_CONNECTOR_eDP:
287 /* Force use of scaler for non-EDID modes. */
288 if (adjusted_mode->type & DRM_MODE_TYPE_DRIVER)
289 break;
290 mode = native_mode;
291 asyc->scaler.full = true;
292 break;
293 default:
294 break;
295 }
296 } else {
297 mode = native_mode;
298 }
299
300 if (!drm_mode_equal(adjusted_mode, mode)) {
301 drm_mode_copy(adjusted_mode, mode);
302 crtc_state->mode_changed = true;
303 }
304
305 return 0;
306}
307
Ben Skeggs839ca902016-11-04 17:20:36 +1000308static int
309nv50_outp_atomic_check(struct drm_encoder *encoder,
310 struct drm_crtc_state *crtc_state,
311 struct drm_connector_state *conn_state)
Ben Skeggsa91d3222014-12-22 16:30:13 +1000312{
Ben Skeggs839ca902016-11-04 17:20:36 +1000313 struct nouveau_connector *nv_connector =
314 nouveau_connector(conn_state->connector);
315 return nv50_outp_atomic_check_view(encoder, crtc_state, conn_state,
316 nv_connector->native_mode);
Ben Skeggsa91d3222014-12-22 16:30:13 +1000317}
318
319/******************************************************************************
Ben Skeggs26f6d882011-07-04 16:25:18 +1000320 * DAC
321 *****************************************************************************/
Ben Skeggs8eaa9662011-07-06 15:25:47 +1000322static void
Ben Skeggs839ca902016-11-04 17:20:36 +1000323nv50_dac_disable(struct drm_encoder *encoder)
Ben Skeggs8eaa9662011-07-06 15:25:47 +1000324{
Ben Skeggsf20c6652016-11-04 17:20:36 +1000325 struct nouveau_encoder *nv_encoder = nouveau_encoder(encoder);
Ben Skeggs0a368772018-05-08 20:39:47 +1000326 struct nv50_core *core = nv50_disp(encoder->dev)->core;
327 if (nv_encoder->crtc)
328 core->func->dac->ctrl(core, nv_encoder->or, 0x00000000, NULL);
Ben Skeggsf20c6652016-11-04 17:20:36 +1000329 nv_encoder->crtc = NULL;
Ben Skeggs6c22ea32017-05-19 23:59:35 +1000330 nv50_outp_release(nv_encoder);
Ben Skeggs8eaa9662011-07-06 15:25:47 +1000331}
332
333static void
Ben Skeggs839ca902016-11-04 17:20:36 +1000334nv50_dac_enable(struct drm_encoder *encoder)
Ben Skeggs8eaa9662011-07-06 15:25:47 +1000335{
336 struct nouveau_encoder *nv_encoder = nouveau_encoder(encoder);
337 struct nouveau_crtc *nv_crtc = nouveau_crtc(encoder->crtc);
Ben Skeggs2ca7fb52018-05-08 20:39:47 +1000338 struct nv50_head_atom *asyh = nv50_head_atom(nv_crtc->base.state);
Ben Skeggs0a368772018-05-08 20:39:47 +1000339 struct nv50_core *core = nv50_disp(encoder->dev)->core;
Ben Skeggs8eaa9662011-07-06 15:25:47 +1000340
Ben Skeggs6c22ea32017-05-19 23:59:35 +1000341 nv50_outp_acquire(nv_encoder);
342
Ben Skeggs0a368772018-05-08 20:39:47 +1000343 core->func->dac->ctrl(core, nv_encoder->or, 1 << nv_crtc->index, asyh);
Ben Skeggs2ca7fb52018-05-08 20:39:47 +1000344 asyh->or.depth = 0;
Ben Skeggs8eaa9662011-07-06 15:25:47 +1000345
346 nv_encoder->crtc = encoder->crtc;
347}
348
Ben Skeggsb6d8e7e2011-07-07 09:51:29 +1000349static enum drm_connector_status
Ben Skeggse225f442012-11-21 14:40:21 +1000350nv50_dac_detect(struct drm_encoder *encoder, struct drm_connector *connector)
Ben Skeggsb6d8e7e2011-07-07 09:51:29 +1000351{
Ben Skeggsc4abd312014-08-10 04:10:26 +1000352 struct nouveau_encoder *nv_encoder = nouveau_encoder(encoder);
Ben Skeggse225f442012-11-21 14:40:21 +1000353 struct nv50_disp *disp = nv50_disp(encoder->dev);
Ben Skeggsc4abd312014-08-10 04:10:26 +1000354 struct {
355 struct nv50_disp_mthd_v1 base;
356 struct nv50_disp_dac_load_v0 load;
357 } args = {
358 .base.version = 1,
359 .base.method = NV50_DISP_MTHD_V1_DAC_LOAD,
360 .base.hasht = nv_encoder->dcb->hasht,
361 .base.hashm = nv_encoder->dcb->hashm,
362 };
363 int ret;
Ben Skeggsb6819932011-07-08 11:14:50 +1000364
Ben Skeggsc4abd312014-08-10 04:10:26 +1000365 args.load.data = nouveau_drm(encoder->dev)->vbios.dactestval;
366 if (args.load.data == 0)
367 args.load.data = 340;
368
Ben Skeggs0d4a2c52018-05-08 20:39:47 +1000369 ret = nvif_mthd(&disp->disp->object, 0, &args, sizeof(args));
Ben Skeggsc4abd312014-08-10 04:10:26 +1000370 if (ret || !args.load.load)
Ben Skeggs35b21d32012-11-08 12:08:55 +1000371 return connector_status_disconnected;
Ben Skeggsb6819932011-07-08 11:14:50 +1000372
Ben Skeggs35b21d32012-11-08 12:08:55 +1000373 return connector_status_connected;
Ben Skeggsb6d8e7e2011-07-07 09:51:29 +1000374}
375
Ben Skeggsf20c6652016-11-04 17:20:36 +1000376static const struct drm_encoder_helper_funcs
377nv50_dac_help = {
Ben Skeggs839ca902016-11-04 17:20:36 +1000378 .atomic_check = nv50_outp_atomic_check,
379 .enable = nv50_dac_enable,
380 .disable = nv50_dac_disable,
Ben Skeggsf20c6652016-11-04 17:20:36 +1000381 .detect = nv50_dac_detect
382};
383
Ben Skeggs8eaa9662011-07-06 15:25:47 +1000384static void
Ben Skeggse225f442012-11-21 14:40:21 +1000385nv50_dac_destroy(struct drm_encoder *encoder)
Ben Skeggs8eaa9662011-07-06 15:25:47 +1000386{
387 drm_encoder_cleanup(encoder);
388 kfree(encoder);
389}
390
Ben Skeggsf20c6652016-11-04 17:20:36 +1000391static const struct drm_encoder_funcs
392nv50_dac_func = {
Ben Skeggse225f442012-11-21 14:40:21 +1000393 .destroy = nv50_dac_destroy,
Ben Skeggs8eaa9662011-07-06 15:25:47 +1000394};
395
396static int
Ben Skeggse225f442012-11-21 14:40:21 +1000397nv50_dac_create(struct drm_connector *connector, struct dcb_output *dcbe)
Ben Skeggs8eaa9662011-07-06 15:25:47 +1000398{
Ben Skeggs5ed50202013-02-11 20:15:03 +1000399 struct nouveau_drm *drm = nouveau_drm(connector->dev);
Ben Skeggs1167c6b2016-05-18 13:57:42 +1000400 struct nvkm_i2c *i2c = nvxx_i2c(&drm->client.device);
Ben Skeggs2aa5eac2015-08-20 14:54:15 +1000401 struct nvkm_i2c_bus *bus;
Ben Skeggs8eaa9662011-07-06 15:25:47 +1000402 struct nouveau_encoder *nv_encoder;
403 struct drm_encoder *encoder;
Ben Skeggs5ed50202013-02-11 20:15:03 +1000404 int type = DRM_MODE_ENCODER_DAC;
Ben Skeggs8eaa9662011-07-06 15:25:47 +1000405
406 nv_encoder = kzalloc(sizeof(*nv_encoder), GFP_KERNEL);
407 if (!nv_encoder)
408 return -ENOMEM;
409 nv_encoder->dcb = dcbe;
Ben Skeggs2aa5eac2015-08-20 14:54:15 +1000410
411 bus = nvkm_i2c_bus_find(i2c, dcbe->i2c_index);
412 if (bus)
413 nv_encoder->i2c = &bus->i2c;
Ben Skeggs8eaa9662011-07-06 15:25:47 +1000414
415 encoder = to_drm_encoder(nv_encoder);
416 encoder->possible_crtcs = dcbe->heads;
417 encoder->possible_clones = 0;
Ben Skeggs5a223da2016-11-04 17:20:36 +1000418 drm_encoder_init(connector->dev, encoder, &nv50_dac_func, type,
419 "dac-%04x-%04x", dcbe->hasht, dcbe->hashm);
Ben Skeggsf20c6652016-11-04 17:20:36 +1000420 drm_encoder_helper_add(encoder, &nv50_dac_help);
Ben Skeggs8eaa9662011-07-06 15:25:47 +1000421
422 drm_mode_connector_attach_encoder(connector, encoder);
423 return 0;
424}
Ben Skeggs26f6d882011-07-04 16:25:18 +1000425
426/******************************************************************************
Ben Skeggs78951d22011-11-11 18:13:13 +1000427 * Audio
428 *****************************************************************************/
429static void
Ben Skeggsf20c6652016-11-04 17:20:36 +1000430nv50_audio_disable(struct drm_encoder *encoder, struct nouveau_crtc *nv_crtc)
431{
432 struct nouveau_encoder *nv_encoder = nouveau_encoder(encoder);
433 struct nv50_disp *disp = nv50_disp(encoder->dev);
434 struct {
435 struct nv50_disp_mthd_v1 base;
436 struct nv50_disp_sor_hda_eld_v0 eld;
437 } args = {
438 .base.version = 1,
439 .base.method = NV50_DISP_MTHD_V1_SOR_HDA_ELD,
440 .base.hasht = nv_encoder->dcb->hasht,
441 .base.hashm = (0xf0ff & nv_encoder->dcb->hashm) |
442 (0x0100 << nv_crtc->index),
443 };
444
Ben Skeggs0d4a2c52018-05-08 20:39:47 +1000445 nvif_mthd(&disp->disp->object, 0, &args, sizeof(args));
Ben Skeggsf20c6652016-11-04 17:20:36 +1000446}
447
448static void
449nv50_audio_enable(struct drm_encoder *encoder, struct drm_display_mode *mode)
Ben Skeggs78951d22011-11-11 18:13:13 +1000450{
451 struct nouveau_encoder *nv_encoder = nouveau_encoder(encoder);
Ben Skeggscc2a9072014-09-15 21:29:05 +1000452 struct nouveau_crtc *nv_crtc = nouveau_crtc(encoder->crtc);
Ben Skeggs78951d22011-11-11 18:13:13 +1000453 struct nouveau_connector *nv_connector;
Ben Skeggse225f442012-11-21 14:40:21 +1000454 struct nv50_disp *disp = nv50_disp(encoder->dev);
Ben Skeggsd889c522014-09-15 21:11:51 +1000455 struct __packed {
456 struct {
457 struct nv50_disp_mthd_v1 mthd;
458 struct nv50_disp_sor_hda_eld_v0 eld;
459 } base;
Ben Skeggs120b0c32014-08-10 04:10:26 +1000460 u8 data[sizeof(nv_connector->base.eld)];
461 } args = {
Ben Skeggsd889c522014-09-15 21:11:51 +1000462 .base.mthd.version = 1,
463 .base.mthd.method = NV50_DISP_MTHD_V1_SOR_HDA_ELD,
464 .base.mthd.hasht = nv_encoder->dcb->hasht,
Ben Skeggscc2a9072014-09-15 21:29:05 +1000465 .base.mthd.hashm = (0xf0ff & nv_encoder->dcb->hashm) |
466 (0x0100 << nv_crtc->index),
Ben Skeggs120b0c32014-08-10 04:10:26 +1000467 };
Ben Skeggs78951d22011-11-11 18:13:13 +1000468
469 nv_connector = nouveau_encoder_connector_get(nv_encoder);
470 if (!drm_detect_monitor_audio(nv_connector->edid))
471 return;
472
Ben Skeggs120b0c32014-08-10 04:10:26 +1000473 memcpy(args.data, nv_connector->base.eld, sizeof(args.data));
Ben Skeggs78951d22011-11-11 18:13:13 +1000474
Ben Skeggs0d4a2c52018-05-08 20:39:47 +1000475 nvif_mthd(&disp->disp->object, 0, &args,
Jani Nikula938fd8a2014-10-28 16:20:48 +0200476 sizeof(args.base) + drm_eld_size(args.data));
Ben Skeggs78951d22011-11-11 18:13:13 +1000477}
478
Ben Skeggsf20c6652016-11-04 17:20:36 +1000479/******************************************************************************
480 * HDMI
481 *****************************************************************************/
Ben Skeggs78951d22011-11-11 18:13:13 +1000482static void
Ben Skeggsf20c6652016-11-04 17:20:36 +1000483nv50_hdmi_disable(struct drm_encoder *encoder, struct nouveau_crtc *nv_crtc)
Ben Skeggs78951d22011-11-11 18:13:13 +1000484{
485 struct nouveau_encoder *nv_encoder = nouveau_encoder(encoder);
Ben Skeggse225f442012-11-21 14:40:21 +1000486 struct nv50_disp *disp = nv50_disp(encoder->dev);
Ben Skeggs120b0c32014-08-10 04:10:26 +1000487 struct {
488 struct nv50_disp_mthd_v1 base;
Ben Skeggsf20c6652016-11-04 17:20:36 +1000489 struct nv50_disp_sor_hdmi_pwr_v0 pwr;
Ben Skeggs120b0c32014-08-10 04:10:26 +1000490 } args = {
491 .base.version = 1,
Ben Skeggsf20c6652016-11-04 17:20:36 +1000492 .base.method = NV50_DISP_MTHD_V1_SOR_HDMI_PWR,
493 .base.hasht = nv_encoder->dcb->hasht,
494 .base.hashm = (0xf0ff & nv_encoder->dcb->hashm) |
495 (0x0100 << nv_crtc->index),
Ben Skeggs120b0c32014-08-10 04:10:26 +1000496 };
Ben Skeggs78951d22011-11-11 18:13:13 +1000497
Ben Skeggs0d4a2c52018-05-08 20:39:47 +1000498 nvif_mthd(&disp->disp->object, 0, &args, sizeof(args));
Ben Skeggs78951d22011-11-11 18:13:13 +1000499}
500
Ben Skeggs78951d22011-11-11 18:13:13 +1000501static void
Ben Skeggsf20c6652016-11-04 17:20:36 +1000502nv50_hdmi_enable(struct drm_encoder *encoder, struct drm_display_mode *mode)
Ben Skeggs78951d22011-11-11 18:13:13 +1000503{
Ben Skeggs64d9cc02011-11-11 19:51:20 +1000504 struct nouveau_encoder *nv_encoder = nouveau_encoder(encoder);
505 struct nouveau_crtc *nv_crtc = nouveau_crtc(encoder->crtc);
Ben Skeggse225f442012-11-21 14:40:21 +1000506 struct nv50_disp *disp = nv50_disp(encoder->dev);
Ben Skeggse00f2232014-08-10 04:10:26 +1000507 struct {
508 struct nv50_disp_mthd_v1 base;
509 struct nv50_disp_sor_hdmi_pwr_v0 pwr;
Alastair Bridgewater34fd3e52017-04-11 13:11:18 -0400510 u8 infoframes[2 * 17]; /* two frames, up to 17 bytes each */
Ben Skeggse00f2232014-08-10 04:10:26 +1000511 } args = {
512 .base.version = 1,
513 .base.method = NV50_DISP_MTHD_V1_SOR_HDMI_PWR,
514 .base.hasht = nv_encoder->dcb->hasht,
515 .base.hashm = (0xf0ff & nv_encoder->dcb->hashm) |
516 (0x0100 << nv_crtc->index),
517 .pwr.state = 1,
518 .pwr.rekey = 56, /* binary driver, and tegra, constant */
519 };
520 struct nouveau_connector *nv_connector;
Ben Skeggs64d9cc02011-11-11 19:51:20 +1000521 u32 max_ac_packet;
Alastair Bridgewater34fd3e52017-04-11 13:11:18 -0400522 union hdmi_infoframe avi_frame;
523 union hdmi_infoframe vendor_frame;
524 int ret;
525 int size;
Ben Skeggs64d9cc02011-11-11 19:51:20 +1000526
527 nv_connector = nouveau_encoder_connector_get(nv_encoder);
528 if (!drm_detect_hdmi_monitor(nv_connector->edid))
529 return;
530
Shashank Sharma0c1f5282017-07-13 21:03:07 +0530531 ret = drm_hdmi_avi_infoframe_from_display_mode(&avi_frame.avi, mode,
532 false);
Alastair Bridgewater34fd3e52017-04-11 13:11:18 -0400533 if (!ret) {
534 /* We have an AVI InfoFrame, populate it to the display */
535 args.pwr.avi_infoframe_length
536 = hdmi_infoframe_pack(&avi_frame, args.infoframes, 17);
537 }
538
Ville Syrjäläf1781e92017-11-13 19:04:19 +0200539 ret = drm_hdmi_vendor_infoframe_from_display_mode(&vendor_frame.vendor.hdmi,
540 &nv_connector->base, mode);
Alastair Bridgewater34fd3e52017-04-11 13:11:18 -0400541 if (!ret) {
542 /* We have a Vendor InfoFrame, populate it to the display */
543 args.pwr.vendor_infoframe_length
544 = hdmi_infoframe_pack(&vendor_frame,
545 args.infoframes
546 + args.pwr.avi_infoframe_length,
547 17);
548 }
549
Ben Skeggs64d9cc02011-11-11 19:51:20 +1000550 max_ac_packet = mode->htotal - mode->hdisplay;
Ben Skeggse00f2232014-08-10 04:10:26 +1000551 max_ac_packet -= args.pwr.rekey;
Ben Skeggs64d9cc02011-11-11 19:51:20 +1000552 max_ac_packet -= 18; /* constant from tegra */
Ben Skeggse00f2232014-08-10 04:10:26 +1000553 args.pwr.max_ac_packet = max_ac_packet / 32;
Ben Skeggs64d9cc02011-11-11 19:51:20 +1000554
Alastair Bridgewater34fd3e52017-04-11 13:11:18 -0400555 size = sizeof(args.base)
556 + sizeof(args.pwr)
557 + args.pwr.avi_infoframe_length
558 + args.pwr.vendor_infoframe_length;
Ben Skeggs0d4a2c52018-05-08 20:39:47 +1000559 nvif_mthd(&disp->disp->object, 0, &args, size);
Ben Skeggsf20c6652016-11-04 17:20:36 +1000560 nv50_audio_enable(encoder, mode);
Ben Skeggs78951d22011-11-11 18:13:13 +1000561}
562
563/******************************************************************************
Ben Skeggs52aa30f2016-11-04 17:20:36 +1000564 * MST
565 *****************************************************************************/
Ben Skeggsf479c0b2016-11-04 17:20:36 +1000566#define nv50_mstm(p) container_of((p), struct nv50_mstm, mgr)
567#define nv50_mstc(p) container_of((p), struct nv50_mstc, connector)
568#define nv50_msto(p) container_of((p), struct nv50_msto, encoder)
569
Ben Skeggs52aa30f2016-11-04 17:20:36 +1000570struct nv50_mstm {
571 struct nouveau_encoder *outp;
572
573 struct drm_dp_mst_topology_mgr mgr;
Ben Skeggsf479c0b2016-11-04 17:20:36 +1000574 struct nv50_msto *msto[4];
575
576 bool modified;
Ben Skeggs6c22ea32017-05-19 23:59:35 +1000577 bool disabled;
578 int links;
Ben Skeggs52aa30f2016-11-04 17:20:36 +1000579};
580
Ben Skeggsf479c0b2016-11-04 17:20:36 +1000581struct nv50_mstc {
582 struct nv50_mstm *mstm;
583 struct drm_dp_mst_port *port;
584 struct drm_connector connector;
585
586 struct drm_display_mode *native;
587 struct edid *edid;
588
589 int pbn;
590};
591
592struct nv50_msto {
593 struct drm_encoder encoder;
594
595 struct nv50_head *head;
596 struct nv50_mstc *mstc;
597 bool disabled;
598};
599
600static struct drm_dp_payload *
601nv50_msto_payload(struct nv50_msto *msto)
602{
603 struct nouveau_drm *drm = nouveau_drm(msto->encoder.dev);
604 struct nv50_mstc *mstc = msto->mstc;
605 struct nv50_mstm *mstm = mstc->mstm;
606 int vcpi = mstc->port->vcpi.vcpi, i;
607
608 NV_ATOMIC(drm, "%s: vcpi %d\n", msto->encoder.name, vcpi);
609 for (i = 0; i < mstm->mgr.max_payloads; i++) {
610 struct drm_dp_payload *payload = &mstm->mgr.payloads[i];
611 NV_ATOMIC(drm, "%s: %d: vcpi %d start 0x%02x slots 0x%02x\n",
612 mstm->outp->base.base.name, i, payload->vcpi,
613 payload->start_slot, payload->num_slots);
614 }
615
616 for (i = 0; i < mstm->mgr.max_payloads; i++) {
617 struct drm_dp_payload *payload = &mstm->mgr.payloads[i];
618 if (payload->vcpi == vcpi)
619 return payload;
620 }
621
622 return NULL;
623}
624
625static void
626nv50_msto_cleanup(struct nv50_msto *msto)
627{
628 struct nouveau_drm *drm = nouveau_drm(msto->encoder.dev);
629 struct nv50_mstc *mstc = msto->mstc;
630 struct nv50_mstm *mstm = mstc->mstm;
631
632 NV_ATOMIC(drm, "%s: msto cleanup\n", msto->encoder.name);
633 if (mstc->port && mstc->port->vcpi.vcpi > 0 && !nv50_msto_payload(msto))
634 drm_dp_mst_deallocate_vcpi(&mstm->mgr, mstc->port);
635 if (msto->disabled) {
636 msto->mstc = NULL;
637 msto->head = NULL;
638 msto->disabled = false;
639 }
640}
641
642static void
643nv50_msto_prepare(struct nv50_msto *msto)
644{
645 struct nouveau_drm *drm = nouveau_drm(msto->encoder.dev);
646 struct nv50_mstc *mstc = msto->mstc;
647 struct nv50_mstm *mstm = mstc->mstm;
648 struct {
649 struct nv50_disp_mthd_v1 base;
650 struct nv50_disp_sor_dp_mst_vcpi_v0 vcpi;
651 } args = {
652 .base.version = 1,
653 .base.method = NV50_DISP_MTHD_V1_SOR_DP_MST_VCPI,
654 .base.hasht = mstm->outp->dcb->hasht,
655 .base.hashm = (0xf0ff & mstm->outp->dcb->hashm) |
656 (0x0100 << msto->head->base.index),
657 };
658
659 NV_ATOMIC(drm, "%s: msto prepare\n", msto->encoder.name);
660 if (mstc->port && mstc->port->vcpi.vcpi > 0) {
661 struct drm_dp_payload *payload = nv50_msto_payload(msto);
662 if (payload) {
663 args.vcpi.start_slot = payload->start_slot;
664 args.vcpi.num_slots = payload->num_slots;
665 args.vcpi.pbn = mstc->port->vcpi.pbn;
666 args.vcpi.aligned_pbn = mstc->port->vcpi.aligned_pbn;
667 }
668 }
669
670 NV_ATOMIC(drm, "%s: %s: %02x %02x %04x %04x\n",
671 msto->encoder.name, msto->head->base.base.name,
672 args.vcpi.start_slot, args.vcpi.num_slots,
673 args.vcpi.pbn, args.vcpi.aligned_pbn);
Ben Skeggs0d4a2c52018-05-08 20:39:47 +1000674 nvif_mthd(&drm->display->disp.object, 0, &args, sizeof(args));
Ben Skeggsf479c0b2016-11-04 17:20:36 +1000675}
676
677static int
678nv50_msto_atomic_check(struct drm_encoder *encoder,
679 struct drm_crtc_state *crtc_state,
680 struct drm_connector_state *conn_state)
681{
682 struct nv50_mstc *mstc = nv50_mstc(conn_state->connector);
683 struct nv50_mstm *mstm = mstc->mstm;
684 int bpp = conn_state->connector->display_info.bpc * 3;
685 int slots;
686
687 mstc->pbn = drm_dp_calc_pbn_mode(crtc_state->adjusted_mode.clock, bpp);
688
689 slots = drm_dp_find_vcpi_slots(&mstm->mgr, mstc->pbn);
690 if (slots < 0)
691 return slots;
692
693 return nv50_outp_atomic_check_view(encoder, crtc_state, conn_state,
694 mstc->native);
695}
696
697static void
698nv50_msto_enable(struct drm_encoder *encoder)
699{
700 struct nv50_head *head = nv50_head(encoder->crtc);
701 struct nv50_msto *msto = nv50_msto(encoder);
702 struct nv50_mstc *mstc = NULL;
703 struct nv50_mstm *mstm = NULL;
704 struct drm_connector *connector;
Gustavo Padovan875dd622017-05-11 16:10:46 -0300705 struct drm_connector_list_iter conn_iter;
Ben Skeggsf479c0b2016-11-04 17:20:36 +1000706 u8 proto, depth;
707 int slots;
708 bool r;
709
Gustavo Padovan875dd622017-05-11 16:10:46 -0300710 drm_connector_list_iter_begin(encoder->dev, &conn_iter);
711 drm_for_each_connector_iter(connector, &conn_iter) {
Ben Skeggsf479c0b2016-11-04 17:20:36 +1000712 if (connector->state->best_encoder == &msto->encoder) {
713 mstc = nv50_mstc(connector);
714 mstm = mstc->mstm;
715 break;
716 }
717 }
Gustavo Padovan875dd622017-05-11 16:10:46 -0300718 drm_connector_list_iter_end(&conn_iter);
Ben Skeggsf479c0b2016-11-04 17:20:36 +1000719
720 if (WARN_ON(!mstc))
721 return;
722
Pandiyan, Dhinakaran1e797f52017-03-16 00:10:26 -0700723 slots = drm_dp_find_vcpi_slots(&mstm->mgr, mstc->pbn);
724 r = drm_dp_mst_allocate_vcpi(&mstm->mgr, mstc->port, mstc->pbn, slots);
Ben Skeggsf479c0b2016-11-04 17:20:36 +1000725 WARN_ON(!r);
726
Ben Skeggs6c22ea32017-05-19 23:59:35 +1000727 if (!mstm->links++)
728 nv50_outp_acquire(mstm->outp);
729
730 if (mstm->outp->link & 1)
Ben Skeggsf479c0b2016-11-04 17:20:36 +1000731 proto = 0x8;
732 else
733 proto = 0x9;
734
735 switch (mstc->connector.display_info.bpc) {
736 case 6: depth = 0x2; break;
737 case 8: depth = 0x5; break;
738 case 10:
739 default: depth = 0x6; break;
740 }
741
742 mstm->outp->update(mstm->outp, head->base.index,
Ben Skeggs2ca7fb52018-05-08 20:39:47 +1000743 nv50_head_atom(head->base.base.state), proto, depth);
Ben Skeggsf479c0b2016-11-04 17:20:36 +1000744
745 msto->head = head;
746 msto->mstc = mstc;
747 mstm->modified = true;
748}
749
750static void
751nv50_msto_disable(struct drm_encoder *encoder)
752{
753 struct nv50_msto *msto = nv50_msto(encoder);
754 struct nv50_mstc *mstc = msto->mstc;
755 struct nv50_mstm *mstm = mstc->mstm;
756
757 if (mstc->port)
758 drm_dp_mst_reset_vcpi_slots(&mstm->mgr, mstc->port);
759
760 mstm->outp->update(mstm->outp, msto->head->base.index, NULL, 0, 0);
761 mstm->modified = true;
Ben Skeggs6c22ea32017-05-19 23:59:35 +1000762 if (!--mstm->links)
763 mstm->disabled = true;
Ben Skeggsf479c0b2016-11-04 17:20:36 +1000764 msto->disabled = true;
765}
766
767static const struct drm_encoder_helper_funcs
768nv50_msto_help = {
769 .disable = nv50_msto_disable,
770 .enable = nv50_msto_enable,
771 .atomic_check = nv50_msto_atomic_check,
772};
773
774static void
775nv50_msto_destroy(struct drm_encoder *encoder)
776{
777 struct nv50_msto *msto = nv50_msto(encoder);
778 drm_encoder_cleanup(&msto->encoder);
779 kfree(msto);
780}
781
782static const struct drm_encoder_funcs
783nv50_msto = {
784 .destroy = nv50_msto_destroy,
785};
786
787static int
788nv50_msto_new(struct drm_device *dev, u32 heads, const char *name, int id,
789 struct nv50_msto **pmsto)
790{
791 struct nv50_msto *msto;
792 int ret;
793
794 if (!(msto = *pmsto = kzalloc(sizeof(*msto), GFP_KERNEL)))
795 return -ENOMEM;
796
797 ret = drm_encoder_init(dev, &msto->encoder, &nv50_msto,
798 DRM_MODE_ENCODER_DPMST, "%s-mst-%d", name, id);
799 if (ret) {
800 kfree(*pmsto);
801 *pmsto = NULL;
802 return ret;
803 }
804
805 drm_encoder_helper_add(&msto->encoder, &nv50_msto_help);
806 msto->encoder.possible_crtcs = heads;
807 return 0;
808}
809
810static struct drm_encoder *
811nv50_mstc_atomic_best_encoder(struct drm_connector *connector,
812 struct drm_connector_state *connector_state)
813{
814 struct nv50_head *head = nv50_head(connector_state->crtc);
815 struct nv50_mstc *mstc = nv50_mstc(connector);
816 if (mstc->port) {
817 struct nv50_mstm *mstm = mstc->mstm;
818 return &mstm->msto[head->base.index]->encoder;
819 }
820 return NULL;
821}
822
823static struct drm_encoder *
824nv50_mstc_best_encoder(struct drm_connector *connector)
825{
826 struct nv50_mstc *mstc = nv50_mstc(connector);
827 if (mstc->port) {
828 struct nv50_mstm *mstm = mstc->mstm;
829 return &mstm->msto[0]->encoder;
830 }
831 return NULL;
832}
833
834static enum drm_mode_status
835nv50_mstc_mode_valid(struct drm_connector *connector,
836 struct drm_display_mode *mode)
837{
838 return MODE_OK;
839}
840
841static int
842nv50_mstc_get_modes(struct drm_connector *connector)
843{
844 struct nv50_mstc *mstc = nv50_mstc(connector);
845 int ret = 0;
846
847 mstc->edid = drm_dp_mst_get_edid(&mstc->connector, mstc->port->mgr, mstc->port);
848 drm_mode_connector_update_edid_property(&mstc->connector, mstc->edid);
Jani Nikulad471ed02017-11-01 16:21:02 +0200849 if (mstc->edid)
Ben Skeggsf479c0b2016-11-04 17:20:36 +1000850 ret = drm_add_edid_modes(&mstc->connector, mstc->edid);
Ben Skeggsf479c0b2016-11-04 17:20:36 +1000851
852 if (!mstc->connector.display_info.bpc)
853 mstc->connector.display_info.bpc = 8;
854
855 if (mstc->native)
856 drm_mode_destroy(mstc->connector.dev, mstc->native);
857 mstc->native = nouveau_conn_native_mode(&mstc->connector);
858 return ret;
859}
860
861static const struct drm_connector_helper_funcs
862nv50_mstc_help = {
863 .get_modes = nv50_mstc_get_modes,
864 .mode_valid = nv50_mstc_mode_valid,
865 .best_encoder = nv50_mstc_best_encoder,
866 .atomic_best_encoder = nv50_mstc_atomic_best_encoder,
867};
868
869static enum drm_connector_status
870nv50_mstc_detect(struct drm_connector *connector, bool force)
871{
872 struct nv50_mstc *mstc = nv50_mstc(connector);
873 if (!mstc->port)
874 return connector_status_disconnected;
875 return drm_dp_mst_detect_port(connector, mstc->port->mgr, mstc->port);
876}
877
878static void
879nv50_mstc_destroy(struct drm_connector *connector)
880{
881 struct nv50_mstc *mstc = nv50_mstc(connector);
882 drm_connector_cleanup(&mstc->connector);
883 kfree(mstc);
884}
885
886static const struct drm_connector_funcs
887nv50_mstc = {
Ben Skeggsf479c0b2016-11-04 17:20:36 +1000888 .reset = nouveau_conn_reset,
889 .detect = nv50_mstc_detect,
890 .fill_modes = drm_helper_probe_single_connector_modes,
Ben Skeggsf479c0b2016-11-04 17:20:36 +1000891 .destroy = nv50_mstc_destroy,
892 .atomic_duplicate_state = nouveau_conn_atomic_duplicate_state,
893 .atomic_destroy_state = nouveau_conn_atomic_destroy_state,
894 .atomic_set_property = nouveau_conn_atomic_set_property,
895 .atomic_get_property = nouveau_conn_atomic_get_property,
896};
897
898static int
899nv50_mstc_new(struct nv50_mstm *mstm, struct drm_dp_mst_port *port,
900 const char *path, struct nv50_mstc **pmstc)
901{
902 struct drm_device *dev = mstm->outp->base.base.dev;
903 struct nv50_mstc *mstc;
904 int ret, i;
905
906 if (!(mstc = *pmstc = kzalloc(sizeof(*mstc), GFP_KERNEL)))
907 return -ENOMEM;
908 mstc->mstm = mstm;
909 mstc->port = port;
910
911 ret = drm_connector_init(dev, &mstc->connector, &nv50_mstc,
912 DRM_MODE_CONNECTOR_DisplayPort);
913 if (ret) {
914 kfree(*pmstc);
915 *pmstc = NULL;
916 return ret;
917 }
918
919 drm_connector_helper_add(&mstc->connector, &nv50_mstc_help);
920
921 mstc->connector.funcs->reset(&mstc->connector);
922 nouveau_conn_attach_properties(&mstc->connector);
923
Colin Ian King27a451e2017-08-17 23:03:23 +0100924 for (i = 0; i < ARRAY_SIZE(mstm->msto) && mstm->msto[i]; i++)
Ben Skeggsf479c0b2016-11-04 17:20:36 +1000925 drm_mode_connector_attach_encoder(&mstc->connector, &mstm->msto[i]->encoder);
926
927 drm_object_attach_property(&mstc->connector.base, dev->mode_config.path_property, 0);
928 drm_object_attach_property(&mstc->connector.base, dev->mode_config.tile_property, 0);
929 drm_mode_connector_set_path_property(&mstc->connector, path);
930 return 0;
931}
932
933static void
934nv50_mstm_cleanup(struct nv50_mstm *mstm)
935{
936 struct nouveau_drm *drm = nouveau_drm(mstm->outp->base.base.dev);
937 struct drm_encoder *encoder;
938 int ret;
939
940 NV_ATOMIC(drm, "%s: mstm cleanup\n", mstm->outp->base.base.name);
941 ret = drm_dp_check_act_status(&mstm->mgr);
942
943 ret = drm_dp_update_payload_part2(&mstm->mgr);
944
945 drm_for_each_encoder(encoder, mstm->outp->base.base.dev) {
946 if (encoder->encoder_type == DRM_MODE_ENCODER_DPMST) {
947 struct nv50_msto *msto = nv50_msto(encoder);
948 struct nv50_mstc *mstc = msto->mstc;
949 if (mstc && mstc->mstm == mstm)
950 nv50_msto_cleanup(msto);
951 }
952 }
953
954 mstm->modified = false;
955}
956
957static void
958nv50_mstm_prepare(struct nv50_mstm *mstm)
959{
960 struct nouveau_drm *drm = nouveau_drm(mstm->outp->base.base.dev);
961 struct drm_encoder *encoder;
962 int ret;
963
964 NV_ATOMIC(drm, "%s: mstm prepare\n", mstm->outp->base.base.name);
965 ret = drm_dp_update_payload_part1(&mstm->mgr);
966
967 drm_for_each_encoder(encoder, mstm->outp->base.base.dev) {
968 if (encoder->encoder_type == DRM_MODE_ENCODER_DPMST) {
969 struct nv50_msto *msto = nv50_msto(encoder);
970 struct nv50_mstc *mstc = msto->mstc;
971 if (mstc && mstc->mstm == mstm)
972 nv50_msto_prepare(msto);
973 }
974 }
Ben Skeggs6c22ea32017-05-19 23:59:35 +1000975
976 if (mstm->disabled) {
977 if (!mstm->links)
978 nv50_outp_release(mstm->outp);
979 mstm->disabled = false;
980 }
Ben Skeggsf479c0b2016-11-04 17:20:36 +1000981}
982
983static void
984nv50_mstm_hotplug(struct drm_dp_mst_topology_mgr *mgr)
985{
986 struct nv50_mstm *mstm = nv50_mstm(mgr);
987 drm_kms_helper_hotplug_event(mstm->outp->base.base.dev);
988}
989
990static void
991nv50_mstm_destroy_connector(struct drm_dp_mst_topology_mgr *mgr,
992 struct drm_connector *connector)
993{
994 struct nouveau_drm *drm = nouveau_drm(connector->dev);
995 struct nv50_mstc *mstc = nv50_mstc(connector);
996
997 drm_connector_unregister(&mstc->connector);
998
Ben Skeggsf479c0b2016-11-04 17:20:36 +1000999 drm_fb_helper_remove_one_connector(&drm->fbcon->helper, &mstc->connector);
Lyude Paul352672d2018-05-02 19:38:48 -04001000
1001 drm_modeset_lock(&drm->dev->mode_config.connection_mutex, NULL);
Ben Skeggsf479c0b2016-11-04 17:20:36 +10001002 mstc->port = NULL;
Lyude Paul352672d2018-05-02 19:38:48 -04001003 drm_modeset_unlock(&drm->dev->mode_config.connection_mutex);
Ben Skeggsf479c0b2016-11-04 17:20:36 +10001004
1005 drm_connector_unreference(&mstc->connector);
1006}
1007
1008static void
1009nv50_mstm_register_connector(struct drm_connector *connector)
1010{
1011 struct nouveau_drm *drm = nouveau_drm(connector->dev);
1012
Ben Skeggsf479c0b2016-11-04 17:20:36 +10001013 drm_fb_helper_add_one_connector(&drm->fbcon->helper, connector);
Ben Skeggsf479c0b2016-11-04 17:20:36 +10001014
1015 drm_connector_register(connector);
1016}
1017
1018static struct drm_connector *
1019nv50_mstm_add_connector(struct drm_dp_mst_topology_mgr *mgr,
1020 struct drm_dp_mst_port *port, const char *path)
1021{
1022 struct nv50_mstm *mstm = nv50_mstm(mgr);
1023 struct nv50_mstc *mstc;
1024 int ret;
1025
1026 ret = nv50_mstc_new(mstm, port, path, &mstc);
1027 if (ret) {
1028 if (mstc)
1029 mstc->connector.funcs->destroy(&mstc->connector);
1030 return NULL;
1031 }
1032
1033 return &mstc->connector;
1034}
1035
1036static const struct drm_dp_mst_topology_cbs
1037nv50_mstm = {
1038 .add_connector = nv50_mstm_add_connector,
1039 .register_connector = nv50_mstm_register_connector,
1040 .destroy_connector = nv50_mstm_destroy_connector,
1041 .hotplug = nv50_mstm_hotplug,
1042};
1043
1044void
1045nv50_mstm_service(struct nv50_mstm *mstm)
1046{
Ben Skeggs227f66d2017-10-03 16:24:28 +10001047 struct drm_dp_aux *aux = mstm ? mstm->mgr.aux : NULL;
Ben Skeggsf479c0b2016-11-04 17:20:36 +10001048 bool handled = true;
1049 int ret;
1050 u8 esi[8] = {};
1051
Ben Skeggs227f66d2017-10-03 16:24:28 +10001052 if (!aux)
1053 return;
1054
Ben Skeggsf479c0b2016-11-04 17:20:36 +10001055 while (handled) {
1056 ret = drm_dp_dpcd_read(aux, DP_SINK_COUNT_ESI, esi, 8);
1057 if (ret != 8) {
1058 drm_dp_mst_topology_mgr_set_mst(&mstm->mgr, false);
1059 return;
1060 }
1061
1062 drm_dp_mst_hpd_irq(&mstm->mgr, esi, &handled);
1063 if (!handled)
1064 break;
1065
1066 drm_dp_dpcd_write(aux, DP_SINK_COUNT_ESI + 1, &esi[1], 3);
1067 }
1068}
1069
1070void
1071nv50_mstm_remove(struct nv50_mstm *mstm)
1072{
1073 if (mstm)
1074 drm_dp_mst_topology_mgr_set_mst(&mstm->mgr, false);
1075}
1076
Ben Skeggs52aa30f2016-11-04 17:20:36 +10001077static int
1078nv50_mstm_enable(struct nv50_mstm *mstm, u8 dpcd, int state)
1079{
1080 struct nouveau_encoder *outp = mstm->outp;
1081 struct {
1082 struct nv50_disp_mthd_v1 base;
1083 struct nv50_disp_sor_dp_mst_link_v0 mst;
1084 } args = {
1085 .base.version = 1,
1086 .base.method = NV50_DISP_MTHD_V1_SOR_DP_MST_LINK,
1087 .base.hasht = outp->dcb->hasht,
1088 .base.hashm = outp->dcb->hashm,
1089 .mst.state = state,
1090 };
1091 struct nouveau_drm *drm = nouveau_drm(outp->base.base.dev);
Ben Skeggs0d4a2c52018-05-08 20:39:47 +10001092 struct nvif_object *disp = &drm->display->disp.object;
Ben Skeggs52aa30f2016-11-04 17:20:36 +10001093 int ret;
1094
1095 if (dpcd >= 0x12) {
1096 ret = drm_dp_dpcd_readb(mstm->mgr.aux, DP_MSTM_CTRL, &dpcd);
1097 if (ret < 0)
1098 return ret;
1099
1100 dpcd &= ~DP_MST_EN;
1101 if (state)
1102 dpcd |= DP_MST_EN;
1103
1104 ret = drm_dp_dpcd_writeb(mstm->mgr.aux, DP_MSTM_CTRL, dpcd);
1105 if (ret < 0)
1106 return ret;
1107 }
1108
1109 return nvif_mthd(disp, 0, &args, sizeof(args));
1110}
1111
1112int
1113nv50_mstm_detect(struct nv50_mstm *mstm, u8 dpcd[8], int allow)
1114{
1115 int ret, state = 0;
1116
1117 if (!mstm)
1118 return 0;
1119
Ben Skeggs3ca03ca2016-11-07 14:51:53 +10001120 if (dpcd[0] >= 0x12) {
Ben Skeggs52aa30f2016-11-04 17:20:36 +10001121 ret = drm_dp_dpcd_readb(mstm->mgr.aux, DP_MSTM_CAP, &dpcd[1]);
1122 if (ret < 0)
1123 return ret;
1124
Ben Skeggs3ca03ca2016-11-07 14:51:53 +10001125 if (!(dpcd[1] & DP_MST_CAP))
1126 dpcd[0] = 0x11;
1127 else
1128 state = allow;
Ben Skeggs52aa30f2016-11-04 17:20:36 +10001129 }
1130
1131 ret = nv50_mstm_enable(mstm, dpcd[0], state);
1132 if (ret)
1133 return ret;
1134
1135 ret = drm_dp_mst_topology_mgr_set_mst(&mstm->mgr, state);
1136 if (ret)
1137 return nv50_mstm_enable(mstm, dpcd[0], 0);
1138
1139 return mstm->mgr.mst_state;
1140}
1141
1142static void
Ben Skeggsf479c0b2016-11-04 17:20:36 +10001143nv50_mstm_fini(struct nv50_mstm *mstm)
1144{
1145 if (mstm && mstm->mgr.mst_state)
1146 drm_dp_mst_topology_mgr_suspend(&mstm->mgr);
1147}
1148
1149static void
1150nv50_mstm_init(struct nv50_mstm *mstm)
1151{
1152 if (mstm && mstm->mgr.mst_state)
1153 drm_dp_mst_topology_mgr_resume(&mstm->mgr);
1154}
1155
1156static void
Ben Skeggs52aa30f2016-11-04 17:20:36 +10001157nv50_mstm_del(struct nv50_mstm **pmstm)
1158{
1159 struct nv50_mstm *mstm = *pmstm;
1160 if (mstm) {
1161 kfree(*pmstm);
1162 *pmstm = NULL;
1163 }
1164}
1165
1166static int
1167nv50_mstm_new(struct nouveau_encoder *outp, struct drm_dp_aux *aux, int aux_max,
1168 int conn_base_id, struct nv50_mstm **pmstm)
1169{
1170 const int max_payloads = hweight8(outp->dcb->heads);
1171 struct drm_device *dev = outp->base.base.dev;
1172 struct nv50_mstm *mstm;
Ben Skeggsf479c0b2016-11-04 17:20:36 +10001173 int ret, i;
1174 u8 dpcd;
1175
1176 /* This is a workaround for some monitors not functioning
1177 * correctly in MST mode on initial module load. I think
1178 * some bad interaction with the VBIOS may be responsible.
1179 *
1180 * A good ol' off and on again seems to work here ;)
1181 */
1182 ret = drm_dp_dpcd_readb(aux, DP_DPCD_REV, &dpcd);
1183 if (ret >= 0 && dpcd >= 0x12)
1184 drm_dp_dpcd_writeb(aux, DP_MSTM_CTRL, 0);
Ben Skeggs52aa30f2016-11-04 17:20:36 +10001185
1186 if (!(mstm = *pmstm = kzalloc(sizeof(*mstm), GFP_KERNEL)))
1187 return -ENOMEM;
1188 mstm->outp = outp;
Ben Skeggsf479c0b2016-11-04 17:20:36 +10001189 mstm->mgr.cbs = &nv50_mstm;
Ben Skeggs52aa30f2016-11-04 17:20:36 +10001190
Dhinakaran Pandiyan7b0a89a2017-01-24 15:49:29 -08001191 ret = drm_dp_mst_topology_mgr_init(&mstm->mgr, dev, aux, aux_max,
Ben Skeggs52aa30f2016-11-04 17:20:36 +10001192 max_payloads, conn_base_id);
1193 if (ret)
1194 return ret;
1195
Ben Skeggsf479c0b2016-11-04 17:20:36 +10001196 for (i = 0; i < max_payloads; i++) {
1197 ret = nv50_msto_new(dev, outp->dcb->heads, outp->base.base.name,
1198 i, &mstm->msto[i]);
1199 if (ret)
1200 return ret;
1201 }
1202
Ben Skeggs52aa30f2016-11-04 17:20:36 +10001203 return 0;
1204}
1205
1206/******************************************************************************
Ben Skeggs26f6d882011-07-04 16:25:18 +10001207 * SOR
1208 *****************************************************************************/
Ben Skeggs6e83fda2012-03-11 01:28:48 +10001209static void
Ben Skeggsd665c7e2016-11-04 17:20:36 +10001210nv50_sor_update(struct nouveau_encoder *nv_encoder, u8 head,
Ben Skeggs2ca7fb52018-05-08 20:39:47 +10001211 struct nv50_head_atom *asyh, u8 proto, u8 depth)
Ben Skeggse84a35a2014-06-05 10:59:55 +10001212{
Ben Skeggs9ca6f1e2018-05-08 20:39:47 +10001213 struct nv50_disp *disp = nv50_disp(nv_encoder->base.base.dev);
Ben Skeggs0a368772018-05-08 20:39:47 +10001214 struct nv50_core *core = disp->core;
Ben Skeggsd665c7e2016-11-04 17:20:36 +10001215
Ben Skeggs2ca7fb52018-05-08 20:39:47 +10001216 if (!asyh) {
Ben Skeggsd665c7e2016-11-04 17:20:36 +10001217 nv_encoder->ctrl &= ~BIT(head);
1218 if (!(nv_encoder->ctrl & 0x0000000f))
1219 nv_encoder->ctrl = 0;
1220 } else {
1221 nv_encoder->ctrl |= proto << 8;
1222 nv_encoder->ctrl |= BIT(head);
Ben Skeggs2ca7fb52018-05-08 20:39:47 +10001223 asyh->or.depth = depth;
Ben Skeggsd665c7e2016-11-04 17:20:36 +10001224 }
1225
Ben Skeggs0a368772018-05-08 20:39:47 +10001226 core->func->sor->ctrl(core, nv_encoder->or, nv_encoder->ctrl, asyh);
Ben Skeggse84a35a2014-06-05 10:59:55 +10001227}
1228
1229static void
Ben Skeggs839ca902016-11-04 17:20:36 +10001230nv50_sor_disable(struct drm_encoder *encoder)
Ben Skeggs4cbb0f82012-03-12 15:23:44 +10001231{
1232 struct nouveau_encoder *nv_encoder = nouveau_encoder(encoder);
Ben Skeggse84a35a2014-06-05 10:59:55 +10001233 struct nouveau_crtc *nv_crtc = nouveau_crtc(nv_encoder->crtc);
Ben Skeggs419e8dc2012-11-16 11:40:34 +10001234
Ben Skeggs419e8dc2012-11-16 11:40:34 +10001235 nv_encoder->crtc = NULL;
Ben Skeggse84a35a2014-06-05 10:59:55 +10001236
1237 if (nv_crtc) {
Ben Skeggs839ca902016-11-04 17:20:36 +10001238 struct nvkm_i2c_aux *aux = nv_encoder->aux;
1239 u8 pwr;
1240
1241 if (aux) {
1242 int ret = nvkm_rdaux(aux, DP_SET_POWER, &pwr, 1);
1243 if (ret == 0) {
1244 pwr &= ~DP_SET_POWER_MASK;
1245 pwr |= DP_SET_POWER_D3;
1246 nvkm_wraux(aux, DP_SET_POWER, &pwr, 1);
1247 }
1248 }
1249
Ben Skeggsd665c7e2016-11-04 17:20:36 +10001250 nv_encoder->update(nv_encoder, nv_crtc->index, NULL, 0, 0);
Ben Skeggsf20c6652016-11-04 17:20:36 +10001251 nv50_audio_disable(encoder, nv_crtc);
1252 nv50_hdmi_disable(&nv_encoder->base.base, nv_crtc);
Ben Skeggs6c22ea32017-05-19 23:59:35 +10001253 nv50_outp_release(nv_encoder);
Ben Skeggse84a35a2014-06-05 10:59:55 +10001254 }
Ben Skeggs4cbb0f82012-03-12 15:23:44 +10001255}
1256
1257static void
Ben Skeggs839ca902016-11-04 17:20:36 +10001258nv50_sor_enable(struct drm_encoder *encoder)
Ben Skeggs83fc0832011-07-05 13:08:40 +10001259{
Ben Skeggsa3761fa2014-08-10 04:10:27 +10001260 struct nouveau_encoder *nv_encoder = nouveau_encoder(encoder);
1261 struct nouveau_crtc *nv_crtc = nouveau_crtc(encoder->crtc);
Ben Skeggs2ca7fb52018-05-08 20:39:47 +10001262 struct nv50_head_atom *asyh = nv50_head_atom(nv_crtc->base.state);
1263 struct drm_display_mode *mode = &asyh->state.adjusted_mode;
Ben Skeggsa3761fa2014-08-10 04:10:27 +10001264 struct {
1265 struct nv50_disp_mthd_v1 base;
1266 struct nv50_disp_sor_lvds_script_v0 lvds;
1267 } lvds = {
1268 .base.version = 1,
1269 .base.method = NV50_DISP_MTHD_V1_SOR_LVDS_SCRIPT,
1270 .base.hasht = nv_encoder->dcb->hasht,
1271 .base.hashm = nv_encoder->dcb->hashm,
1272 };
Ben Skeggse225f442012-11-21 14:40:21 +10001273 struct nv50_disp *disp = nv50_disp(encoder->dev);
Ben Skeggs78951d22011-11-11 18:13:13 +10001274 struct drm_device *dev = encoder->dev;
Ben Skeggs77145f12012-07-31 16:16:21 +10001275 struct nouveau_drm *drm = nouveau_drm(dev);
Ben Skeggs3b6d83d12011-07-08 12:52:14 +10001276 struct nouveau_connector *nv_connector;
Ben Skeggs77145f12012-07-31 16:16:21 +10001277 struct nvbios *bios = &drm->vbios;
Ben Skeggs419e8dc2012-11-16 11:40:34 +10001278 u8 proto = 0xf;
1279 u8 depth = 0x0;
Ben Skeggs83fc0832011-07-05 13:08:40 +10001280
Ben Skeggs3b6d83d12011-07-08 12:52:14 +10001281 nv_connector = nouveau_encoder_connector_get(nv_encoder);
Ben Skeggse84a35a2014-06-05 10:59:55 +10001282 nv_encoder->crtc = encoder->crtc;
Ben Skeggs6c22ea32017-05-19 23:59:35 +10001283 nv50_outp_acquire(nv_encoder);
Ben Skeggse84a35a2014-06-05 10:59:55 +10001284
Ben Skeggs3b6d83d12011-07-08 12:52:14 +10001285 switch (nv_encoder->dcb->type) {
Ben Skeggscb75d972012-07-11 10:44:20 +10001286 case DCB_OUTPUT_TMDS:
Ben Skeggs6c22ea32017-05-19 23:59:35 +10001287 if (nv_encoder->link & 1) {
Hauke Mehrtens16ef53a92015-11-03 21:00:10 -05001288 proto = 0x1;
1289 /* Only enable dual-link if:
1290 * - Need to (i.e. rate > 165MHz)
1291 * - DCB says we can
1292 * - Not an HDMI monitor, since there's no dual-link
1293 * on HDMI.
1294 */
1295 if (mode->clock >= 165000 &&
1296 nv_encoder->dcb->duallink_possible &&
1297 !drm_detect_hdmi_monitor(nv_connector->edid))
1298 proto |= 0x4;
Ben Skeggs3b6d83d12011-07-08 12:52:14 +10001299 } else {
Ben Skeggs419e8dc2012-11-16 11:40:34 +10001300 proto = 0x2;
Ben Skeggs3b6d83d12011-07-08 12:52:14 +10001301 }
Ben Skeggs83fc0832011-07-05 13:08:40 +10001302
Ben Skeggsf20c6652016-11-04 17:20:36 +10001303 nv50_hdmi_enable(&nv_encoder->base.base, mode);
Ben Skeggs3b6d83d12011-07-08 12:52:14 +10001304 break;
Ben Skeggscb75d972012-07-11 10:44:20 +10001305 case DCB_OUTPUT_LVDS:
Ben Skeggs419e8dc2012-11-16 11:40:34 +10001306 proto = 0x0;
1307
Ben Skeggs3b6d83d12011-07-08 12:52:14 +10001308 if (bios->fp_no_ddc) {
1309 if (bios->fp.dual_link)
Ben Skeggsa3761fa2014-08-10 04:10:27 +10001310 lvds.lvds.script |= 0x0100;
Ben Skeggs3b6d83d12011-07-08 12:52:14 +10001311 if (bios->fp.if_is_24bit)
Ben Skeggsa3761fa2014-08-10 04:10:27 +10001312 lvds.lvds.script |= 0x0200;
Ben Skeggs3b6d83d12011-07-08 12:52:14 +10001313 } else {
Ben Skeggsbefb51e2011-11-18 10:23:59 +10001314 if (nv_connector->type == DCB_CONNECTOR_LVDS_SPWG) {
Ben Skeggs3b6d83d12011-07-08 12:52:14 +10001315 if (((u8 *)nv_connector->edid)[121] == 2)
Ben Skeggsa3761fa2014-08-10 04:10:27 +10001316 lvds.lvds.script |= 0x0100;
Ben Skeggs3b6d83d12011-07-08 12:52:14 +10001317 } else
1318 if (mode->clock >= bios->fp.duallink_transition_clk) {
Ben Skeggsa3761fa2014-08-10 04:10:27 +10001319 lvds.lvds.script |= 0x0100;
Ben Skeggs3b6d83d12011-07-08 12:52:14 +10001320 }
1321
Ben Skeggsa3761fa2014-08-10 04:10:27 +10001322 if (lvds.lvds.script & 0x0100) {
Ben Skeggs3b6d83d12011-07-08 12:52:14 +10001323 if (bios->fp.strapless_is_24bit & 2)
Ben Skeggsa3761fa2014-08-10 04:10:27 +10001324 lvds.lvds.script |= 0x0200;
Ben Skeggs3b6d83d12011-07-08 12:52:14 +10001325 } else {
1326 if (bios->fp.strapless_is_24bit & 1)
Ben Skeggsa3761fa2014-08-10 04:10:27 +10001327 lvds.lvds.script |= 0x0200;
Ben Skeggs3b6d83d12011-07-08 12:52:14 +10001328 }
1329
1330 if (nv_connector->base.display_info.bpc == 8)
Ben Skeggsa3761fa2014-08-10 04:10:27 +10001331 lvds.lvds.script |= 0x0200;
Ben Skeggs3b6d83d12011-07-08 12:52:14 +10001332 }
Ben Skeggs4a230fa2012-11-09 11:25:37 +10001333
Ben Skeggs0d4a2c52018-05-08 20:39:47 +10001334 nvif_mthd(&disp->disp->object, 0, &lvds, sizeof(lvds));
Ben Skeggs3b6d83d12011-07-08 12:52:14 +10001335 break;
Ben Skeggscb75d972012-07-11 10:44:20 +10001336 case DCB_OUTPUT_DP:
Ben Skeggsf20c6652016-11-04 17:20:36 +10001337 if (nv_connector->base.display_info.bpc == 6)
Ben Skeggs419e8dc2012-11-16 11:40:34 +10001338 depth = 0x2;
Ben Skeggsf20c6652016-11-04 17:20:36 +10001339 else
1340 if (nv_connector->base.display_info.bpc == 8)
Ben Skeggs419e8dc2012-11-16 11:40:34 +10001341 depth = 0x5;
Ben Skeggsf20c6652016-11-04 17:20:36 +10001342 else
Ben Skeggsbf2c8862012-11-21 14:49:54 +10001343 depth = 0x6;
Ben Skeggs6e83fda2012-03-11 01:28:48 +10001344
Ben Skeggs6c22ea32017-05-19 23:59:35 +10001345 if (nv_encoder->link & 1)
Ben Skeggs419e8dc2012-11-16 11:40:34 +10001346 proto = 0x8;
Ben Skeggs6e83fda2012-03-11 01:28:48 +10001347 else
Ben Skeggs419e8dc2012-11-16 11:40:34 +10001348 proto = 0x9;
Ben Skeggsf20c6652016-11-04 17:20:36 +10001349
1350 nv50_audio_enable(encoder, mode);
Ben Skeggs6e83fda2012-03-11 01:28:48 +10001351 break;
Ben Skeggs3b6d83d12011-07-08 12:52:14 +10001352 default:
Ben Skeggsaf7db032016-03-03 12:56:33 +10001353 BUG();
Ben Skeggs3b6d83d12011-07-08 12:52:14 +10001354 break;
1355 }
Ben Skeggsff8ff502011-07-08 11:53:37 +10001356
Ben Skeggs2ca7fb52018-05-08 20:39:47 +10001357 nv_encoder->update(nv_encoder, nv_crtc->index, asyh, proto, depth);
Ben Skeggs83fc0832011-07-05 13:08:40 +10001358}
1359
Ben Skeggsf20c6652016-11-04 17:20:36 +10001360static const struct drm_encoder_helper_funcs
1361nv50_sor_help = {
Ben Skeggs839ca902016-11-04 17:20:36 +10001362 .atomic_check = nv50_outp_atomic_check,
1363 .enable = nv50_sor_enable,
1364 .disable = nv50_sor_disable,
Ben Skeggsf20c6652016-11-04 17:20:36 +10001365};
1366
Ben Skeggs83fc0832011-07-05 13:08:40 +10001367static void
Ben Skeggse225f442012-11-21 14:40:21 +10001368nv50_sor_destroy(struct drm_encoder *encoder)
Ben Skeggs83fc0832011-07-05 13:08:40 +10001369{
Ben Skeggs52aa30f2016-11-04 17:20:36 +10001370 struct nouveau_encoder *nv_encoder = nouveau_encoder(encoder);
1371 nv50_mstm_del(&nv_encoder->dp.mstm);
Ben Skeggs83fc0832011-07-05 13:08:40 +10001372 drm_encoder_cleanup(encoder);
1373 kfree(encoder);
1374}
1375
Ben Skeggsf20c6652016-11-04 17:20:36 +10001376static const struct drm_encoder_funcs
1377nv50_sor_func = {
Ben Skeggse225f442012-11-21 14:40:21 +10001378 .destroy = nv50_sor_destroy,
Ben Skeggs83fc0832011-07-05 13:08:40 +10001379};
1380
1381static int
Ben Skeggse225f442012-11-21 14:40:21 +10001382nv50_sor_create(struct drm_connector *connector, struct dcb_output *dcbe)
Ben Skeggs83fc0832011-07-05 13:08:40 +10001383{
Ben Skeggs52aa30f2016-11-04 17:20:36 +10001384 struct nouveau_connector *nv_connector = nouveau_connector(connector);
Ben Skeggs5ed50202013-02-11 20:15:03 +10001385 struct nouveau_drm *drm = nouveau_drm(connector->dev);
Ben Skeggs1167c6b2016-05-18 13:57:42 +10001386 struct nvkm_i2c *i2c = nvxx_i2c(&drm->client.device);
Ben Skeggs83fc0832011-07-05 13:08:40 +10001387 struct nouveau_encoder *nv_encoder;
1388 struct drm_encoder *encoder;
Ben Skeggs52aa30f2016-11-04 17:20:36 +10001389 int type, ret;
Ben Skeggs5ed50202013-02-11 20:15:03 +10001390
1391 switch (dcbe->type) {
1392 case DCB_OUTPUT_LVDS: type = DRM_MODE_ENCODER_LVDS; break;
1393 case DCB_OUTPUT_TMDS:
1394 case DCB_OUTPUT_DP:
1395 default:
1396 type = DRM_MODE_ENCODER_TMDS;
1397 break;
1398 }
Ben Skeggs83fc0832011-07-05 13:08:40 +10001399
1400 nv_encoder = kzalloc(sizeof(*nv_encoder), GFP_KERNEL);
1401 if (!nv_encoder)
1402 return -ENOMEM;
1403 nv_encoder->dcb = dcbe;
Ben Skeggsd665c7e2016-11-04 17:20:36 +10001404 nv_encoder->update = nv50_sor_update;
Ben Skeggs83fc0832011-07-05 13:08:40 +10001405
Ben Skeggs52aa30f2016-11-04 17:20:36 +10001406 encoder = to_drm_encoder(nv_encoder);
1407 encoder->possible_crtcs = dcbe->heads;
1408 encoder->possible_clones = 0;
Ben Skeggs5a223da2016-11-04 17:20:36 +10001409 drm_encoder_init(connector->dev, encoder, &nv50_sor_func, type,
1410 "sor-%04x-%04x", dcbe->hasht, dcbe->hashm);
Ben Skeggsf20c6652016-11-04 17:20:36 +10001411 drm_encoder_helper_add(encoder, &nv50_sor_help);
Ben Skeggs52aa30f2016-11-04 17:20:36 +10001412
1413 drm_mode_connector_attach_encoder(connector, encoder);
1414
Ben Skeggs2aa5eac2015-08-20 14:54:15 +10001415 if (dcbe->type == DCB_OUTPUT_DP) {
Ben Skeggs13a86512017-07-19 16:49:59 +10001416 struct nv50_disp *disp = nv50_disp(encoder->dev);
Ben Skeggs2aa5eac2015-08-20 14:54:15 +10001417 struct nvkm_i2c_aux *aux =
1418 nvkm_i2c_aux_find(i2c, dcbe->i2c_index);
1419 if (aux) {
Ben Skeggs0d4a2c52018-05-08 20:39:47 +10001420 if (disp->disp->object.oclass < GF110_DISP) {
Ben Skeggs13a86512017-07-19 16:49:59 +10001421 /* HW has no support for address-only
1422 * transactions, so we're required to
1423 * use custom I2C-over-AUX code.
1424 */
1425 nv_encoder->i2c = &aux->i2c;
1426 } else {
1427 nv_encoder->i2c = &nv_connector->aux.ddc;
1428 }
Ben Skeggs2aa5eac2015-08-20 14:54:15 +10001429 nv_encoder->aux = aux;
1430 }
Ben Skeggs52aa30f2016-11-04 17:20:36 +10001431
1432 /*TODO: Use DP Info Table to check for support. */
Ben Skeggs0d4a2c52018-05-08 20:39:47 +10001433 if (disp->disp->object.oclass >= GF110_DISP) {
Ben Skeggs52aa30f2016-11-04 17:20:36 +10001434 ret = nv50_mstm_new(nv_encoder, &nv_connector->aux, 16,
1435 nv_connector->base.base.id,
1436 &nv_encoder->dp.mstm);
1437 if (ret)
1438 return ret;
1439 }
Ben Skeggs2aa5eac2015-08-20 14:54:15 +10001440 } else {
1441 struct nvkm_i2c_bus *bus =
1442 nvkm_i2c_bus_find(i2c, dcbe->i2c_index);
1443 if (bus)
1444 nv_encoder->i2c = &bus->i2c;
1445 }
1446
Ben Skeggs83fc0832011-07-05 13:08:40 +10001447 return 0;
1448}
Ben Skeggs26f6d882011-07-04 16:25:18 +10001449
1450/******************************************************************************
Ben Skeggseb6313a2013-02-11 09:52:58 +10001451 * PIOR
1452 *****************************************************************************/
Ben Skeggs839ca902016-11-04 17:20:36 +10001453static int
1454nv50_pior_atomic_check(struct drm_encoder *encoder,
1455 struct drm_crtc_state *crtc_state,
1456 struct drm_connector_state *conn_state)
Ben Skeggseb6313a2013-02-11 09:52:58 +10001457{
Ben Skeggs839ca902016-11-04 17:20:36 +10001458 int ret = nv50_outp_atomic_check(encoder, crtc_state, conn_state);
1459 if (ret)
1460 return ret;
1461 crtc_state->adjusted_mode.clock *= 2;
1462 return 0;
Ben Skeggseb6313a2013-02-11 09:52:58 +10001463}
1464
1465static void
Ben Skeggs839ca902016-11-04 17:20:36 +10001466nv50_pior_disable(struct drm_encoder *encoder)
Ben Skeggseb6313a2013-02-11 09:52:58 +10001467{
Ben Skeggsf20c6652016-11-04 17:20:36 +10001468 struct nouveau_encoder *nv_encoder = nouveau_encoder(encoder);
Ben Skeggs0a368772018-05-08 20:39:47 +10001469 struct nv50_core *core = nv50_disp(encoder->dev)->core;
1470 if (nv_encoder->crtc)
1471 core->func->pior->ctrl(core, nv_encoder->or, 0x00000000, NULL);
Ben Skeggsf20c6652016-11-04 17:20:36 +10001472 nv_encoder->crtc = NULL;
Ben Skeggs6c22ea32017-05-19 23:59:35 +10001473 nv50_outp_release(nv_encoder);
Ben Skeggseb6313a2013-02-11 09:52:58 +10001474}
1475
1476static void
Ben Skeggs839ca902016-11-04 17:20:36 +10001477nv50_pior_enable(struct drm_encoder *encoder)
Ben Skeggseb6313a2013-02-11 09:52:58 +10001478{
Ben Skeggseb6313a2013-02-11 09:52:58 +10001479 struct nouveau_encoder *nv_encoder = nouveau_encoder(encoder);
1480 struct nouveau_crtc *nv_crtc = nouveau_crtc(encoder->crtc);
1481 struct nouveau_connector *nv_connector;
Ben Skeggs2ca7fb52018-05-08 20:39:47 +10001482 struct nv50_head_atom *asyh = nv50_head_atom(nv_crtc->base.state);
Ben Skeggs0a368772018-05-08 20:39:47 +10001483 struct nv50_core *core = nv50_disp(encoder->dev)->core;
Ben Skeggseb6313a2013-02-11 09:52:58 +10001484 u8 owner = 1 << nv_crtc->index;
Ben Skeggs2ca7fb52018-05-08 20:39:47 +10001485 u8 proto;
Ben Skeggseb6313a2013-02-11 09:52:58 +10001486
Ben Skeggs6c22ea32017-05-19 23:59:35 +10001487 nv50_outp_acquire(nv_encoder);
1488
Ben Skeggseb6313a2013-02-11 09:52:58 +10001489 nv_connector = nouveau_encoder_connector_get(nv_encoder);
1490 switch (nv_connector->base.display_info.bpc) {
Ben Skeggs2ca7fb52018-05-08 20:39:47 +10001491 case 10: asyh->or.depth = 0x6; break;
1492 case 8: asyh->or.depth = 0x5; break;
1493 case 6: asyh->or.depth = 0x2; break;
1494 default: asyh->or.depth = 0x0; break;
Ben Skeggseb6313a2013-02-11 09:52:58 +10001495 }
1496
1497 switch (nv_encoder->dcb->type) {
1498 case DCB_OUTPUT_TMDS:
1499 case DCB_OUTPUT_DP:
1500 proto = 0x0;
1501 break;
1502 default:
Ben Skeggsaf7db032016-03-03 12:56:33 +10001503 BUG();
Ben Skeggseb6313a2013-02-11 09:52:58 +10001504 break;
1505 }
1506
Ben Skeggs0a368772018-05-08 20:39:47 +10001507 core->func->pior->ctrl(core, nv_encoder->or, (proto << 8) | owner, asyh);
Ben Skeggseb6313a2013-02-11 09:52:58 +10001508 nv_encoder->crtc = encoder->crtc;
1509}
1510
Ben Skeggsf20c6652016-11-04 17:20:36 +10001511static const struct drm_encoder_helper_funcs
1512nv50_pior_help = {
Ben Skeggs839ca902016-11-04 17:20:36 +10001513 .atomic_check = nv50_pior_atomic_check,
1514 .enable = nv50_pior_enable,
1515 .disable = nv50_pior_disable,
Ben Skeggsf20c6652016-11-04 17:20:36 +10001516};
Ben Skeggseb6313a2013-02-11 09:52:58 +10001517
1518static void
1519nv50_pior_destroy(struct drm_encoder *encoder)
1520{
1521 drm_encoder_cleanup(encoder);
1522 kfree(encoder);
1523}
1524
Ben Skeggsf20c6652016-11-04 17:20:36 +10001525static const struct drm_encoder_funcs
1526nv50_pior_func = {
Ben Skeggseb6313a2013-02-11 09:52:58 +10001527 .destroy = nv50_pior_destroy,
1528};
1529
1530static int
1531nv50_pior_create(struct drm_connector *connector, struct dcb_output *dcbe)
1532{
1533 struct nouveau_drm *drm = nouveau_drm(connector->dev);
Ben Skeggs1167c6b2016-05-18 13:57:42 +10001534 struct nvkm_i2c *i2c = nvxx_i2c(&drm->client.device);
Ben Skeggs2aa5eac2015-08-20 14:54:15 +10001535 struct nvkm_i2c_bus *bus = NULL;
1536 struct nvkm_i2c_aux *aux = NULL;
1537 struct i2c_adapter *ddc;
Ben Skeggseb6313a2013-02-11 09:52:58 +10001538 struct nouveau_encoder *nv_encoder;
1539 struct drm_encoder *encoder;
1540 int type;
1541
1542 switch (dcbe->type) {
1543 case DCB_OUTPUT_TMDS:
Ben Skeggs2aa5eac2015-08-20 14:54:15 +10001544 bus = nvkm_i2c_bus_find(i2c, NVKM_I2C_BUS_EXT(dcbe->extdev));
1545 ddc = bus ? &bus->i2c : NULL;
Ben Skeggseb6313a2013-02-11 09:52:58 +10001546 type = DRM_MODE_ENCODER_TMDS;
1547 break;
1548 case DCB_OUTPUT_DP:
Ben Skeggs2aa5eac2015-08-20 14:54:15 +10001549 aux = nvkm_i2c_aux_find(i2c, NVKM_I2C_AUX_EXT(dcbe->extdev));
Ben Skeggs62b290f2018-05-08 20:39:47 +10001550 ddc = aux ? &aux->i2c : NULL;
Ben Skeggseb6313a2013-02-11 09:52:58 +10001551 type = DRM_MODE_ENCODER_TMDS;
1552 break;
1553 default:
1554 return -ENODEV;
1555 }
1556
1557 nv_encoder = kzalloc(sizeof(*nv_encoder), GFP_KERNEL);
1558 if (!nv_encoder)
1559 return -ENOMEM;
1560 nv_encoder->dcb = dcbe;
Ben Skeggseb6313a2013-02-11 09:52:58 +10001561 nv_encoder->i2c = ddc;
Ben Skeggs2aa5eac2015-08-20 14:54:15 +10001562 nv_encoder->aux = aux;
Ben Skeggseb6313a2013-02-11 09:52:58 +10001563
1564 encoder = to_drm_encoder(nv_encoder);
1565 encoder->possible_crtcs = dcbe->heads;
1566 encoder->possible_clones = 0;
Ben Skeggs5a223da2016-11-04 17:20:36 +10001567 drm_encoder_init(connector->dev, encoder, &nv50_pior_func, type,
1568 "pior-%04x-%04x", dcbe->hasht, dcbe->hashm);
Ben Skeggsf20c6652016-11-04 17:20:36 +10001569 drm_encoder_helper_add(encoder, &nv50_pior_help);
Ben Skeggseb6313a2013-02-11 09:52:58 +10001570
1571 drm_mode_connector_attach_encoder(connector, encoder);
1572 return 0;
1573}
1574
1575/******************************************************************************
Ben Skeggs839ca902016-11-04 17:20:36 +10001576 * Atomic
1577 *****************************************************************************/
1578
1579static void
1580nv50_disp_atomic_commit_core(struct nouveau_drm *drm, u32 interlock)
1581{
1582 struct nv50_disp *disp = nv50_disp(drm->dev);
Ben Skeggs09e1b782018-05-08 20:39:47 +10001583 struct nv50_core *core = disp->core;
Ben Skeggsf479c0b2016-11-04 17:20:36 +10001584 struct nv50_mstm *mstm;
1585 struct drm_encoder *encoder;
Ben Skeggs839ca902016-11-04 17:20:36 +10001586
1587 NV_ATOMIC(drm, "commit core %08x\n", interlock);
1588
Ben Skeggsf479c0b2016-11-04 17:20:36 +10001589 drm_for_each_encoder(encoder, drm->dev) {
1590 if (encoder->encoder_type != DRM_MODE_ENCODER_DPMST) {
1591 mstm = nouveau_encoder(encoder)->dp.mstm;
1592 if (mstm && mstm->modified)
1593 nv50_mstm_prepare(mstm);
1594 }
1595 }
1596
Ben Skeggs09e1b782018-05-08 20:39:47 +10001597 core->func->ntfy_init(disp->sync, NV50_DISP_CORE_NTFY);
1598 core->func->update(core, interlock, true);
1599 if (core->func->ntfy_wait_done(disp->sync, NV50_DISP_CORE_NTFY,
1600 disp->core->chan.base.device))
1601 NV_ERROR(drm, "core notifier timeout\n");
Ben Skeggsf479c0b2016-11-04 17:20:36 +10001602
1603 drm_for_each_encoder(encoder, drm->dev) {
1604 if (encoder->encoder_type != DRM_MODE_ENCODER_DPMST) {
1605 mstm = nouveau_encoder(encoder)->dp.mstm;
1606 if (mstm && mstm->modified)
1607 nv50_mstm_cleanup(mstm);
1608 }
1609 }
Ben Skeggs839ca902016-11-04 17:20:36 +10001610}
1611
1612static void
1613nv50_disp_atomic_commit_tail(struct drm_atomic_state *state)
1614{
1615 struct drm_device *dev = state->dev;
Maarten Lankhorstefa47932017-08-15 10:52:50 +02001616 struct drm_crtc_state *new_crtc_state, *old_crtc_state;
Ben Skeggs839ca902016-11-04 17:20:36 +10001617 struct drm_crtc *crtc;
Maarten Lankhorst3c847d62017-07-19 16:39:19 +02001618 struct drm_plane_state *new_plane_state;
Ben Skeggs839ca902016-11-04 17:20:36 +10001619 struct drm_plane *plane;
1620 struct nouveau_drm *drm = nouveau_drm(dev);
1621 struct nv50_disp *disp = nv50_disp(dev);
1622 struct nv50_atom *atom = nv50_atom(state);
1623 struct nv50_outp_atom *outp, *outt;
1624 u32 interlock_core = 0;
1625 u32 interlock_chan = 0;
1626 int i;
1627
1628 NV_ATOMIC(drm, "commit %d %d\n", atom->lock_core, atom->flush_disable);
1629 drm_atomic_helper_wait_for_fences(dev, state, false);
1630 drm_atomic_helper_wait_for_dependencies(state);
1631 drm_atomic_helper_update_legacy_modeset_state(dev, state);
1632
1633 if (atom->lock_core)
1634 mutex_lock(&disp->mutex);
1635
1636 /* Disable head(s). */
Maarten Lankhorstefa47932017-08-15 10:52:50 +02001637 for_each_oldnew_crtc_in_state(state, crtc, old_crtc_state, new_crtc_state, i) {
Maarten Lankhorst3c847d62017-07-19 16:39:19 +02001638 struct nv50_head_atom *asyh = nv50_head_atom(new_crtc_state);
Ben Skeggs839ca902016-11-04 17:20:36 +10001639 struct nv50_head *head = nv50_head(crtc);
1640
1641 NV_ATOMIC(drm, "%s: clr %04x (set %04x)\n", crtc->name,
1642 asyh->clr.mask, asyh->set.mask);
Maarten Lankhorstefa47932017-08-15 10:52:50 +02001643 if (old_crtc_state->active && !new_crtc_state->active)
Ben Skeggs4a5431a2017-07-24 11:01:52 +10001644 drm_crtc_vblank_off(crtc);
Ben Skeggs839ca902016-11-04 17:20:36 +10001645
1646 if (asyh->clr.mask) {
1647 nv50_head_flush_clr(head, asyh, atom->flush_disable);
1648 interlock_core |= 1;
1649 }
1650 }
1651
1652 /* Disable plane(s). */
Maarten Lankhorst3c847d62017-07-19 16:39:19 +02001653 for_each_new_plane_in_state(state, plane, new_plane_state, i) {
1654 struct nv50_wndw_atom *asyw = nv50_wndw_atom(new_plane_state);
Ben Skeggs839ca902016-11-04 17:20:36 +10001655 struct nv50_wndw *wndw = nv50_wndw(plane);
1656
1657 NV_ATOMIC(drm, "%s: clr %02x (set %02x)\n", plane->name,
1658 asyw->clr.mask, asyw->set.mask);
1659 if (!asyw->clr.mask)
1660 continue;
1661
1662 interlock_chan |= nv50_wndw_flush_clr(wndw, interlock_core,
1663 atom->flush_disable,
1664 asyw);
1665 }
1666
1667 /* Disable output path(s). */
1668 list_for_each_entry(outp, &atom->outp, head) {
1669 const struct drm_encoder_helper_funcs *help;
1670 struct drm_encoder *encoder;
1671
1672 encoder = outp->encoder;
1673 help = encoder->helper_private;
1674
1675 NV_ATOMIC(drm, "%s: clr %02x (set %02x)\n", encoder->name,
1676 outp->clr.mask, outp->set.mask);
1677
1678 if (outp->clr.mask) {
1679 help->disable(encoder);
1680 interlock_core |= 1;
1681 if (outp->flush_disable) {
1682 nv50_disp_atomic_commit_core(drm, interlock_chan);
1683 interlock_core = 0;
1684 interlock_chan = 0;
1685 }
1686 }
1687 }
1688
1689 /* Flush disable. */
1690 if (interlock_core) {
1691 if (atom->flush_disable) {
1692 nv50_disp_atomic_commit_core(drm, interlock_chan);
1693 interlock_core = 0;
1694 interlock_chan = 0;
1695 }
1696 }
1697
1698 /* Update output path(s). */
1699 list_for_each_entry_safe(outp, outt, &atom->outp, head) {
1700 const struct drm_encoder_helper_funcs *help;
1701 struct drm_encoder *encoder;
1702
1703 encoder = outp->encoder;
1704 help = encoder->helper_private;
1705
1706 NV_ATOMIC(drm, "%s: set %02x (clr %02x)\n", encoder->name,
1707 outp->set.mask, outp->clr.mask);
1708
1709 if (outp->set.mask) {
1710 help->enable(encoder);
1711 interlock_core = 1;
1712 }
1713
1714 list_del(&outp->head);
1715 kfree(outp);
1716 }
1717
1718 /* Update head(s). */
Maarten Lankhorstefa47932017-08-15 10:52:50 +02001719 for_each_oldnew_crtc_in_state(state, crtc, old_crtc_state, new_crtc_state, i) {
Maarten Lankhorst3c847d62017-07-19 16:39:19 +02001720 struct nv50_head_atom *asyh = nv50_head_atom(new_crtc_state);
Ben Skeggs839ca902016-11-04 17:20:36 +10001721 struct nv50_head *head = nv50_head(crtc);
1722
1723 NV_ATOMIC(drm, "%s: set %04x (clr %04x)\n", crtc->name,
1724 asyh->set.mask, asyh->clr.mask);
1725
1726 if (asyh->set.mask) {
1727 nv50_head_flush_set(head, asyh);
1728 interlock_core = 1;
1729 }
Ben Skeggs839ca902016-11-04 17:20:36 +10001730
Maarten Lankhorstefa47932017-08-15 10:52:50 +02001731 if (new_crtc_state->active) {
1732 if (!old_crtc_state->active)
Ben Skeggs4a5431a2017-07-24 11:01:52 +10001733 drm_crtc_vblank_on(crtc);
Maarten Lankhorstefa47932017-08-15 10:52:50 +02001734 if (new_crtc_state->event)
Ben Skeggs4a5431a2017-07-24 11:01:52 +10001735 drm_crtc_vblank_get(crtc);
1736 }
Ben Skeggs2b507892017-01-24 09:32:26 +10001737 }
1738
Ben Skeggs839ca902016-11-04 17:20:36 +10001739 /* Update plane(s). */
Maarten Lankhorst3c847d62017-07-19 16:39:19 +02001740 for_each_new_plane_in_state(state, plane, new_plane_state, i) {
1741 struct nv50_wndw_atom *asyw = nv50_wndw_atom(new_plane_state);
Ben Skeggs839ca902016-11-04 17:20:36 +10001742 struct nv50_wndw *wndw = nv50_wndw(plane);
1743
1744 NV_ATOMIC(drm, "%s: set %02x (clr %02x)\n", plane->name,
1745 asyw->set.mask, asyw->clr.mask);
1746 if ( !asyw->set.mask &&
1747 (!asyw->clr.mask || atom->flush_disable))
1748 continue;
1749
1750 interlock_chan |= nv50_wndw_flush_set(wndw, interlock_core, asyw);
1751 }
1752
1753 /* Flush update. */
1754 if (interlock_core) {
Ben Skeggs09e1b782018-05-08 20:39:47 +10001755 if (interlock_chan || !atom->state.legacy_cursor_update)
Ben Skeggs839ca902016-11-04 17:20:36 +10001756 nv50_disp_atomic_commit_core(drm, interlock_chan);
Ben Skeggs09e1b782018-05-08 20:39:47 +10001757 else
1758 disp->core->func->update(disp->core, 0, false);
Ben Skeggs839ca902016-11-04 17:20:36 +10001759 }
1760
1761 if (atom->lock_core)
1762 mutex_unlock(&disp->mutex);
1763
1764 /* Wait for HW to signal completion. */
Maarten Lankhorst3c847d62017-07-19 16:39:19 +02001765 for_each_new_plane_in_state(state, plane, new_plane_state, i) {
1766 struct nv50_wndw_atom *asyw = nv50_wndw_atom(new_plane_state);
Ben Skeggs839ca902016-11-04 17:20:36 +10001767 struct nv50_wndw *wndw = nv50_wndw(plane);
1768 int ret = nv50_wndw_wait_armed(wndw, asyw);
1769 if (ret)
1770 NV_ERROR(drm, "%s: timeout\n", plane->name);
1771 }
1772
Maarten Lankhorst3c847d62017-07-19 16:39:19 +02001773 for_each_new_crtc_in_state(state, crtc, new_crtc_state, i) {
1774 if (new_crtc_state->event) {
Ben Skeggs839ca902016-11-04 17:20:36 +10001775 unsigned long flags;
Mario Kleinerbd9f6602016-11-23 07:58:54 +01001776 /* Get correct count/ts if racing with vblank irq */
Maarten Lankhorstefa47932017-08-15 10:52:50 +02001777 if (new_crtc_state->active)
Dave Airlie0c697fa2017-08-15 16:16:58 +10001778 drm_crtc_accurate_vblank_count(crtc);
Ben Skeggs839ca902016-11-04 17:20:36 +10001779 spin_lock_irqsave(&crtc->dev->event_lock, flags);
Maarten Lankhorst3c847d62017-07-19 16:39:19 +02001780 drm_crtc_send_vblank_event(crtc, new_crtc_state->event);
Ben Skeggs839ca902016-11-04 17:20:36 +10001781 spin_unlock_irqrestore(&crtc->dev->event_lock, flags);
Maarten Lankhorstefa47932017-08-15 10:52:50 +02001782
Maarten Lankhorst3c847d62017-07-19 16:39:19 +02001783 new_crtc_state->event = NULL;
Maarten Lankhorstefa47932017-08-15 10:52:50 +02001784 if (new_crtc_state->active)
Ben Skeggs4a5431a2017-07-24 11:01:52 +10001785 drm_crtc_vblank_put(crtc);
Ben Skeggs839ca902016-11-04 17:20:36 +10001786 }
1787 }
1788
1789 drm_atomic_helper_commit_hw_done(state);
1790 drm_atomic_helper_cleanup_planes(dev, state);
1791 drm_atomic_helper_commit_cleanup_done(state);
1792 drm_atomic_state_put(state);
1793}
1794
1795static void
1796nv50_disp_atomic_commit_work(struct work_struct *work)
1797{
1798 struct drm_atomic_state *state =
1799 container_of(work, typeof(*state), commit_work);
1800 nv50_disp_atomic_commit_tail(state);
1801}
1802
1803static int
1804nv50_disp_atomic_commit(struct drm_device *dev,
1805 struct drm_atomic_state *state, bool nonblock)
1806{
1807 struct nouveau_drm *drm = nouveau_drm(dev);
Ben Skeggsd324c5b2017-11-01 09:12:25 +10001808 struct drm_plane_state *new_plane_state;
Ben Skeggs839ca902016-11-04 17:20:36 +10001809 struct drm_plane *plane;
1810 struct drm_crtc *crtc;
1811 bool active = false;
1812 int ret, i;
1813
1814 ret = pm_runtime_get_sync(dev->dev);
1815 if (ret < 0 && ret != -EACCES)
1816 return ret;
1817
1818 ret = drm_atomic_helper_setup_commit(state, nonblock);
1819 if (ret)
1820 goto done;
1821
1822 INIT_WORK(&state->commit_work, nv50_disp_atomic_commit_work);
1823
1824 ret = drm_atomic_helper_prepare_planes(dev, state);
1825 if (ret)
1826 goto done;
1827
1828 if (!nonblock) {
1829 ret = drm_atomic_helper_wait_for_fences(dev, state, true);
1830 if (ret)
Maarten Lankhorst813a7e12017-07-11 16:33:03 +02001831 goto err_cleanup;
Ben Skeggs839ca902016-11-04 17:20:36 +10001832 }
1833
Maarten Lankhorst85726362017-07-11 16:33:05 +02001834 ret = drm_atomic_helper_swap_state(state, true);
1835 if (ret)
1836 goto err_cleanup;
1837
Ben Skeggsd324c5b2017-11-01 09:12:25 +10001838 for_each_new_plane_in_state(state, plane, new_plane_state, i) {
1839 struct nv50_wndw_atom *asyw = nv50_wndw_atom(new_plane_state);
Ben Skeggs839ca902016-11-04 17:20:36 +10001840 struct nv50_wndw *wndw = nv50_wndw(plane);
Maarten Lankhorst3c847d62017-07-19 16:39:19 +02001841
Ben Skeggsccd27db2018-05-08 20:39:47 +10001842 if (asyw->set.image)
1843 nv50_wndw_ntfy_enable(wndw, asyw);
Ben Skeggs839ca902016-11-04 17:20:36 +10001844 }
1845
Ben Skeggs839ca902016-11-04 17:20:36 +10001846 drm_atomic_state_get(state);
1847
1848 if (nonblock)
1849 queue_work(system_unbound_wq, &state->commit_work);
1850 else
1851 nv50_disp_atomic_commit_tail(state);
1852
1853 drm_for_each_crtc(crtc, dev) {
1854 if (crtc->state->enable) {
1855 if (!drm->have_disp_power_ref) {
1856 drm->have_disp_power_ref = true;
Maarten Lankhorst813a7e12017-07-11 16:33:03 +02001857 return 0;
Ben Skeggs839ca902016-11-04 17:20:36 +10001858 }
1859 active = true;
1860 break;
1861 }
1862 }
1863
1864 if (!active && drm->have_disp_power_ref) {
1865 pm_runtime_put_autosuspend(dev->dev);
1866 drm->have_disp_power_ref = false;
1867 }
1868
Maarten Lankhorst813a7e12017-07-11 16:33:03 +02001869err_cleanup:
1870 if (ret)
1871 drm_atomic_helper_cleanup_planes(dev, state);
Ben Skeggs839ca902016-11-04 17:20:36 +10001872done:
1873 pm_runtime_put_autosuspend(dev->dev);
1874 return ret;
1875}
1876
1877static struct nv50_outp_atom *
1878nv50_disp_outp_atomic_add(struct nv50_atom *atom, struct drm_encoder *encoder)
1879{
1880 struct nv50_outp_atom *outp;
1881
1882 list_for_each_entry(outp, &atom->outp, head) {
1883 if (outp->encoder == encoder)
1884 return outp;
1885 }
1886
1887 outp = kzalloc(sizeof(*outp), GFP_KERNEL);
1888 if (!outp)
1889 return ERR_PTR(-ENOMEM);
1890
1891 list_add(&outp->head, &atom->outp);
1892 outp->encoder = encoder;
1893 return outp;
1894}
1895
1896static int
1897nv50_disp_outp_atomic_check_clr(struct nv50_atom *atom,
Maarten Lankhorst3c847d62017-07-19 16:39:19 +02001898 struct drm_connector_state *old_connector_state)
Ben Skeggs839ca902016-11-04 17:20:36 +10001899{
Maarten Lankhorst3c847d62017-07-19 16:39:19 +02001900 struct drm_encoder *encoder = old_connector_state->best_encoder;
1901 struct drm_crtc_state *old_crtc_state, *new_crtc_state;
Ben Skeggs839ca902016-11-04 17:20:36 +10001902 struct drm_crtc *crtc;
1903 struct nv50_outp_atom *outp;
1904
Maarten Lankhorst3c847d62017-07-19 16:39:19 +02001905 if (!(crtc = old_connector_state->crtc))
Ben Skeggs839ca902016-11-04 17:20:36 +10001906 return 0;
1907
Maarten Lankhorst3c847d62017-07-19 16:39:19 +02001908 old_crtc_state = drm_atomic_get_old_crtc_state(&atom->state, crtc);
1909 new_crtc_state = drm_atomic_get_new_crtc_state(&atom->state, crtc);
1910 if (old_crtc_state->active && drm_atomic_crtc_needs_modeset(new_crtc_state)) {
Ben Skeggs839ca902016-11-04 17:20:36 +10001911 outp = nv50_disp_outp_atomic_add(atom, encoder);
1912 if (IS_ERR(outp))
1913 return PTR_ERR(outp);
1914
1915 if (outp->encoder->encoder_type == DRM_MODE_ENCODER_DPMST) {
1916 outp->flush_disable = true;
1917 atom->flush_disable = true;
1918 }
1919 outp->clr.ctrl = true;
1920 atom->lock_core = true;
1921 }
1922
1923 return 0;
1924}
1925
1926static int
1927nv50_disp_outp_atomic_check_set(struct nv50_atom *atom,
1928 struct drm_connector_state *connector_state)
1929{
1930 struct drm_encoder *encoder = connector_state->best_encoder;
Maarten Lankhorst3c847d62017-07-19 16:39:19 +02001931 struct drm_crtc_state *new_crtc_state;
Ben Skeggs839ca902016-11-04 17:20:36 +10001932 struct drm_crtc *crtc;
1933 struct nv50_outp_atom *outp;
1934
1935 if (!(crtc = connector_state->crtc))
1936 return 0;
1937
Maarten Lankhorst3c847d62017-07-19 16:39:19 +02001938 new_crtc_state = drm_atomic_get_new_crtc_state(&atom->state, crtc);
1939 if (new_crtc_state->active && drm_atomic_crtc_needs_modeset(new_crtc_state)) {
Ben Skeggs839ca902016-11-04 17:20:36 +10001940 outp = nv50_disp_outp_atomic_add(atom, encoder);
1941 if (IS_ERR(outp))
1942 return PTR_ERR(outp);
1943
1944 outp->set.ctrl = true;
1945 atom->lock_core = true;
1946 }
1947
1948 return 0;
1949}
1950
1951static int
1952nv50_disp_atomic_check(struct drm_device *dev, struct drm_atomic_state *state)
1953{
1954 struct nv50_atom *atom = nv50_atom(state);
Maarten Lankhorst3c847d62017-07-19 16:39:19 +02001955 struct drm_connector_state *old_connector_state, *new_connector_state;
Ben Skeggs839ca902016-11-04 17:20:36 +10001956 struct drm_connector *connector;
1957 int ret, i;
1958
1959 ret = drm_atomic_helper_check(dev, state);
1960 if (ret)
1961 return ret;
1962
Maarten Lankhorst3c847d62017-07-19 16:39:19 +02001963 for_each_oldnew_connector_in_state(state, connector, old_connector_state, new_connector_state, i) {
1964 ret = nv50_disp_outp_atomic_check_clr(atom, old_connector_state);
Ben Skeggs839ca902016-11-04 17:20:36 +10001965 if (ret)
1966 return ret;
1967
Maarten Lankhorst3c847d62017-07-19 16:39:19 +02001968 ret = nv50_disp_outp_atomic_check_set(atom, new_connector_state);
Ben Skeggs839ca902016-11-04 17:20:36 +10001969 if (ret)
1970 return ret;
1971 }
1972
1973 return 0;
1974}
1975
1976static void
1977nv50_disp_atomic_state_clear(struct drm_atomic_state *state)
1978{
1979 struct nv50_atom *atom = nv50_atom(state);
1980 struct nv50_outp_atom *outp, *outt;
1981
1982 list_for_each_entry_safe(outp, outt, &atom->outp, head) {
1983 list_del(&outp->head);
1984 kfree(outp);
1985 }
1986
1987 drm_atomic_state_default_clear(state);
1988}
1989
1990static void
1991nv50_disp_atomic_state_free(struct drm_atomic_state *state)
1992{
1993 struct nv50_atom *atom = nv50_atom(state);
1994 drm_atomic_state_default_release(&atom->state);
1995 kfree(atom);
1996}
1997
1998static struct drm_atomic_state *
1999nv50_disp_atomic_state_alloc(struct drm_device *dev)
2000{
2001 struct nv50_atom *atom;
2002 if (!(atom = kzalloc(sizeof(*atom), GFP_KERNEL)) ||
2003 drm_atomic_state_init(dev, &atom->state) < 0) {
2004 kfree(atom);
2005 return NULL;
2006 }
2007 INIT_LIST_HEAD(&atom->outp);
2008 return &atom->state;
2009}
2010
2011static const struct drm_mode_config_funcs
2012nv50_disp_func = {
2013 .fb_create = nouveau_user_framebuffer_create,
Noralf Trønnesd0f54f52017-12-05 19:25:00 +01002014 .output_poll_changed = drm_fb_helper_output_poll_changed,
Ben Skeggs839ca902016-11-04 17:20:36 +10002015 .atomic_check = nv50_disp_atomic_check,
2016 .atomic_commit = nv50_disp_atomic_commit,
2017 .atomic_state_alloc = nv50_disp_atomic_state_alloc,
2018 .atomic_state_clear = nv50_disp_atomic_state_clear,
2019 .atomic_state_free = nv50_disp_atomic_state_free,
2020};
2021
2022/******************************************************************************
Ben Skeggs26f6d882011-07-04 16:25:18 +10002023 * Init
2024 *****************************************************************************/
Ben Skeggsab0af552014-08-10 04:10:19 +10002025
Ben Skeggs2a44e492011-11-09 11:36:33 +10002026void
Ben Skeggse225f442012-11-21 14:40:21 +10002027nv50_display_fini(struct drm_device *dev)
Ben Skeggs26f6d882011-07-04 16:25:18 +10002028{
Ben Skeggsf479c0b2016-11-04 17:20:36 +10002029 struct nouveau_encoder *nv_encoder;
2030 struct drm_encoder *encoder;
Ben Skeggs973f10c2016-11-04 17:20:36 +10002031 struct drm_plane *plane;
2032
2033 drm_for_each_plane(plane, dev) {
2034 struct nv50_wndw *wndw = nv50_wndw(plane);
2035 if (plane->funcs != &nv50_wndw)
2036 continue;
2037 nv50_wndw_fini(wndw);
2038 }
Ben Skeggsf479c0b2016-11-04 17:20:36 +10002039
2040 list_for_each_entry(encoder, &dev->mode_config.encoder_list, head) {
2041 if (encoder->encoder_type != DRM_MODE_ENCODER_DPMST) {
2042 nv_encoder = nouveau_encoder(encoder);
2043 nv50_mstm_fini(nv_encoder->dp.mstm);
2044 }
2045 }
Ben Skeggs26f6d882011-07-04 16:25:18 +10002046}
2047
2048int
Ben Skeggse225f442012-11-21 14:40:21 +10002049nv50_display_init(struct drm_device *dev)
Ben Skeggs26f6d882011-07-04 16:25:18 +10002050{
Ben Skeggs09e1b782018-05-08 20:39:47 +10002051 struct nv50_core *core = nv50_disp(dev)->core;
Ben Skeggs354d3502016-11-04 17:20:36 +10002052 struct drm_encoder *encoder;
Ben Skeggs973f10c2016-11-04 17:20:36 +10002053 struct drm_plane *plane;
Ben Skeggs9f9bdaa2013-03-02 13:21:31 +10002054
Ben Skeggs09e1b782018-05-08 20:39:47 +10002055 core->func->init(core);
Ben Skeggs973f10c2016-11-04 17:20:36 +10002056
Ben Skeggs354d3502016-11-04 17:20:36 +10002057 list_for_each_entry(encoder, &dev->mode_config.encoder_list, head) {
2058 if (encoder->encoder_type != DRM_MODE_ENCODER_DPMST) {
Ben Skeggs9c5753b2017-05-19 23:59:35 +10002059 struct nouveau_encoder *nv_encoder =
2060 nouveau_encoder(encoder);
Ben Skeggsf479c0b2016-11-04 17:20:36 +10002061 nv50_mstm_init(nv_encoder->dp.mstm);
Ben Skeggs354d3502016-11-04 17:20:36 +10002062 }
2063 }
2064
Ben Skeggs973f10c2016-11-04 17:20:36 +10002065 drm_for_each_plane(plane, dev) {
2066 struct nv50_wndw *wndw = nv50_wndw(plane);
2067 if (plane->funcs != &nv50_wndw)
2068 continue;
2069 nv50_wndw_init(wndw);
2070 }
2071
Ben Skeggs9f9bdaa2013-03-02 13:21:31 +10002072 return 0;
Ben Skeggs26f6d882011-07-04 16:25:18 +10002073}
2074
2075void
Ben Skeggse225f442012-11-21 14:40:21 +10002076nv50_display_destroy(struct drm_device *dev)
Ben Skeggs26f6d882011-07-04 16:25:18 +10002077{
Ben Skeggse225f442012-11-21 14:40:21 +10002078 struct nv50_disp *disp = nv50_disp(dev);
Ben Skeggs26f6d882011-07-04 16:25:18 +10002079
Ben Skeggs9ca6f1e2018-05-08 20:39:47 +10002080 nv50_core_del(&disp->core);
Ben Skeggsbdb8c212011-11-12 01:30:24 +10002081
Ben Skeggs816af2f2011-11-16 15:48:48 +10002082 nouveau_bo_unmap(disp->sync);
Marcin Slusarz04c8c212012-11-25 23:04:23 +01002083 if (disp->sync)
2084 nouveau_bo_unpin(disp->sync);
Ben Skeggs816af2f2011-11-16 15:48:48 +10002085 nouveau_bo_ref(NULL, &disp->sync);
Ben Skeggs51beb422011-07-05 10:33:08 +10002086
Ben Skeggs77145f12012-07-31 16:16:21 +10002087 nouveau_display(dev)->priv = NULL;
Ben Skeggs26f6d882011-07-04 16:25:18 +10002088 kfree(disp);
2089}
2090
Ben Skeggs839ca902016-11-04 17:20:36 +10002091MODULE_PARM_DESC(atomic, "Expose atomic ioctl (default: disabled)");
2092static int nouveau_atomic = 0;
2093module_param_named(atomic, nouveau_atomic, int, 0400);
2094
Ben Skeggs26f6d882011-07-04 16:25:18 +10002095int
Ben Skeggse225f442012-11-21 14:40:21 +10002096nv50_display_create(struct drm_device *dev)
Ben Skeggs26f6d882011-07-04 16:25:18 +10002097{
Ben Skeggs1167c6b2016-05-18 13:57:42 +10002098 struct nvif_device *device = &nouveau_drm(dev)->client.device;
Ben Skeggs77145f12012-07-31 16:16:21 +10002099 struct nouveau_drm *drm = nouveau_drm(dev);
Ben Skeggs77145f12012-07-31 16:16:21 +10002100 struct dcb_table *dcb = &drm->vbios.dcb;
Ben Skeggs83fc0832011-07-05 13:08:40 +10002101 struct drm_connector *connector, *tmp;
Ben Skeggse225f442012-11-21 14:40:21 +10002102 struct nv50_disp *disp;
Ben Skeggscb75d972012-07-11 10:44:20 +10002103 struct dcb_output *dcbe;
Ben Skeggs7c5f6a82012-03-04 16:25:59 +10002104 int crtcs, ret, i;
Ben Skeggs26f6d882011-07-04 16:25:18 +10002105
2106 disp = kzalloc(sizeof(*disp), GFP_KERNEL);
2107 if (!disp)
2108 return -ENOMEM;
Ben Skeggs77145f12012-07-31 16:16:21 +10002109
Ben Skeggs839ca902016-11-04 17:20:36 +10002110 mutex_init(&disp->mutex);
2111
Ben Skeggs77145f12012-07-31 16:16:21 +10002112 nouveau_display(dev)->priv = disp;
Ben Skeggse225f442012-11-21 14:40:21 +10002113 nouveau_display(dev)->dtor = nv50_display_destroy;
2114 nouveau_display(dev)->init = nv50_display_init;
2115 nouveau_display(dev)->fini = nv50_display_fini;
Ben Skeggs0ad72862014-08-10 04:10:22 +10002116 disp->disp = &nouveau_display(dev)->disp;
Ben Skeggs839ca902016-11-04 17:20:36 +10002117 dev->mode_config.funcs = &nv50_disp_func;
Ilia Mirkinc20bb152018-02-03 14:11:23 -05002118 dev->driver->driver_features |= DRIVER_PREFER_XBGR_30BPP;
Ben Skeggs839ca902016-11-04 17:20:36 +10002119 if (nouveau_atomic)
2120 dev->driver->driver_features |= DRIVER_ATOMIC;
Ben Skeggs26f6d882011-07-04 16:25:18 +10002121
Ben Skeggsb5a794b2012-10-16 14:18:32 +10002122 /* small shared memory area we use for notifiers and semaphores */
Ben Skeggsbab7cc12016-05-24 17:26:48 +10002123 ret = nouveau_bo_new(&drm->client, 4096, 0x1000, TTM_PL_FLAG_VRAM,
Maarten Lankhorstbb6178b2014-01-09 11:03:15 +01002124 0, 0x0000, NULL, NULL, &disp->sync);
Ben Skeggsb5a794b2012-10-16 14:18:32 +10002125 if (!ret) {
Ben Skeggs547ad072014-11-10 12:35:06 +10002126 ret = nouveau_bo_pin(disp->sync, TTM_PL_FLAG_VRAM, true);
Marcin Slusarz04c8c212012-11-25 23:04:23 +01002127 if (!ret) {
Ben Skeggsb5a794b2012-10-16 14:18:32 +10002128 ret = nouveau_bo_map(disp->sync);
Marcin Slusarz04c8c212012-11-25 23:04:23 +01002129 if (ret)
2130 nouveau_bo_unpin(disp->sync);
2131 }
Ben Skeggsb5a794b2012-10-16 14:18:32 +10002132 if (ret)
2133 nouveau_bo_ref(NULL, &disp->sync);
2134 }
2135
2136 if (ret)
2137 goto out;
2138
Ben Skeggsb5a794b2012-10-16 14:18:32 +10002139 /* allocate master evo channel */
Ben Skeggs9ca6f1e2018-05-08 20:39:47 +10002140 ret = nv50_core_new(drm, &disp->core);
Ben Skeggsb5a794b2012-10-16 14:18:32 +10002141 if (ret)
2142 goto out;
2143
Ben Skeggs438d99e2011-07-05 16:48:06 +10002144 /* create crtc objects to represent the hw heads */
Ben Skeggs0d4a2c52018-05-08 20:39:47 +10002145 if (disp->disp->object.oclass >= GF110_DISP)
Ilia Mirkineba5e562017-07-03 13:06:26 -04002146 crtcs = nvif_rd32(&device->object, 0x612004) & 0xf;
Ben Skeggs63718a02012-11-16 11:44:14 +10002147 else
Ilia Mirkineba5e562017-07-03 13:06:26 -04002148 crtcs = 0x3;
Ben Skeggs63718a02012-11-16 11:44:14 +10002149
Ilia Mirkineba5e562017-07-03 13:06:26 -04002150 for (i = 0; i < fls(crtcs); i++) {
2151 if (!(crtcs & (1 << i)))
2152 continue;
Ben Skeggs9bfdee92016-11-04 17:20:36 +10002153 ret = nv50_head_create(dev, i);
Ben Skeggs438d99e2011-07-05 16:48:06 +10002154 if (ret)
2155 goto out;
2156 }
2157
Ben Skeggs83fc0832011-07-05 13:08:40 +10002158 /* create encoder/connector objects based on VBIOS DCB table */
2159 for (i = 0, dcbe = &dcb->entry[0]; i < dcb->entries; i++, dcbe++) {
2160 connector = nouveau_connector_create(dev, dcbe->connector);
2161 if (IS_ERR(connector))
2162 continue;
2163
Ben Skeggseb6313a2013-02-11 09:52:58 +10002164 if (dcbe->location == DCB_LOC_ON_CHIP) {
2165 switch (dcbe->type) {
2166 case DCB_OUTPUT_TMDS:
2167 case DCB_OUTPUT_LVDS:
2168 case DCB_OUTPUT_DP:
2169 ret = nv50_sor_create(connector, dcbe);
2170 break;
2171 case DCB_OUTPUT_ANALOG:
2172 ret = nv50_dac_create(connector, dcbe);
2173 break;
2174 default:
2175 ret = -ENODEV;
2176 break;
2177 }
2178 } else {
2179 ret = nv50_pior_create(connector, dcbe);
Ben Skeggs83fc0832011-07-05 13:08:40 +10002180 }
2181
Ben Skeggseb6313a2013-02-11 09:52:58 +10002182 if (ret) {
2183 NV_WARN(drm, "failed to create encoder %d/%d/%d: %d\n",
2184 dcbe->location, dcbe->type,
2185 ffs(dcbe->or) - 1, ret);
Ben Skeggs94f54f52013-03-05 22:26:06 +10002186 ret = 0;
Ben Skeggs83fc0832011-07-05 13:08:40 +10002187 }
2188 }
2189
2190 /* cull any connectors we created that don't have an encoder */
2191 list_for_each_entry_safe(connector, tmp, &dev->mode_config.connector_list, head) {
2192 if (connector->encoder_ids[0])
2193 continue;
2194
Ben Skeggs77145f12012-07-31 16:16:21 +10002195 NV_WARN(drm, "%s has no encoders, removing\n",
Jani Nikula8c6c3612014-06-03 14:56:18 +03002196 connector->name);
Ben Skeggs83fc0832011-07-05 13:08:40 +10002197 connector->funcs->destroy(connector);
2198 }
2199
Ben Skeggs26f6d882011-07-04 16:25:18 +10002200out:
2201 if (ret)
Ben Skeggse225f442012-11-21 14:40:21 +10002202 nv50_display_destroy(dev);
Ben Skeggs26f6d882011-07-04 16:25:18 +10002203 return ret;
2204}