blob: 261462e85d1ca62dd5d40bd038d18016f9a42808 [file] [log] [blame]
Linus Torvalds1da177e2005-04-16 15:20:36 -07001/**
2 * \file radeon_drv.c
3 * ATI Radeon driver
4 *
5 * \author Gareth Hughes <gareth@valinux.com>
6 */
7
8/*
9 * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
10 * All Rights Reserved.
11 *
12 * Permission is hereby granted, free of charge, to any person obtaining a
13 * copy of this software and associated documentation files (the "Software"),
14 * to deal in the Software without restriction, including without limitation
15 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
16 * and/or sell copies of the Software, and to permit persons to whom the
17 * Software is furnished to do so, subject to the following conditions:
18 *
19 * The above copyright notice and this permission notice (including the next
20 * paragraph) shall be included in all copies or substantial portions of the
21 * Software.
22 *
23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
24 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
25 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
26 * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
27 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
28 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
29 * OTHER DEALINGS IN THE SOFTWARE.
30 */
31
David Howells760285e2012-10-02 18:01:07 +010032#include <drm/drmP.h>
33#include <drm/radeon_drm.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070034#include "radeon_drv.h"
35
David Howells760285e2012-10-02 18:01:07 +010036#include <drm/drm_pciids.h>
Lukas Wunner14d20002016-01-11 20:09:20 +010037#include <linux/apple-gmux.h>
Jerome Glisse771fe6b2009-06-05 14:42:42 +020038#include <linux/console.h>
Paul Gortmakere0cd3602011-08-30 11:04:30 -040039#include <linux/module.h>
Dave Airlie10ebc0b2012-09-17 14:40:31 +100040#include <linux/pm_runtime.h>
Lukas Wunner14d20002016-01-11 20:09:20 +010041#include <linux/vgaarb.h>
Dave Airlie10ebc0b2012-09-17 14:40:31 +100042#include <linux/vga_switcheroo.h>
Daniel Vetterd9fc9412014-09-23 15:46:53 +020043#include <drm/drm_gem.h>
44
Dave Airlie10ebc0b2012-09-17 14:40:31 +100045#include "drm_crtc_helper.h"
Oded Gabbaye28740e2014-07-15 13:53:32 +030046#include "radeon_kfd.h"
47
Jerome Glisse771fe6b2009-06-05 14:42:42 +020048/*
49 * KMS wrapper.
Dave Airlie0de1a572010-03-01 16:32:15 +100050 * - 2.0.0 - initial interface
51 * - 2.1.0 - add square tiling interface
Alex Deucherfdb43522010-03-26 15:24:14 -040052 * - 2.2.0 - add r6xx/r7xx const buffer support
Marek Olšákcae94b02010-02-21 21:24:15 +010053 * - 2.3.0 - add MSPOS + 3D texture + r500 VAP regs
Jerome Glissebc35afd2010-05-12 18:01:13 +020054 * - 2.4.0 - add crtc id query
Alex Deucher148a03b2010-06-03 19:00:03 -040055 * - 2.5.0 - add get accel 2 to work around ddx breakage for evergreen
Dave Airlieab9e1f52010-07-13 11:11:11 +100056 * - 2.6.0 - add tiling config query (r6xx+), add initial HiZ support (r300->r500)
Alex Deucher71901cc2010-10-21 13:45:30 -040057 * 2.7.0 - fixups for r600 2D tiling support. (no external ABI change), add eg dyn gpr regs
Alex Deucher58bbf012011-01-24 17:14:26 -050058 * 2.8.0 - pageflip support, r500 US_FORMAT regs. r500 ARGB2101010 colorbuf, r300->r500 CMASK, clock crystal query
Dave Airlie486af182011-03-01 14:32:27 +100059 * 2.9.0 - r600 tiling (s3tc,rgtc) working, SET_PREDICATION packet 3 on r600 + eg, backend query
Alex Deucherb8709892011-07-27 04:17:25 +000060 * 2.10.0 - fusion 2D tiling
61 * 2.11.0 - backend map, initial compute support for the CS checker
Marek Olšáke70f2242011-10-25 01:38:45 +020062 * 2.12.0 - RADEON_CS_KEEP_TILING_FLAGS
Marek Olšákdd220a02012-01-27 12:17:59 -050063 * 2.13.0 - virtual memory support, streamout
Jerome Glisse285484e2011-12-16 17:03:42 -050064 * 2.14.0 - add evergreen tiling informations
Tom Stellard609c1e12012-03-20 17:17:55 -040065 * 2.15.0 - add max_pipes query
Jerome Glissed2609872012-06-09 10:57:41 -040066 * 2.16.0 - fix evergreen 2D tiled surface calculation
Alex Deucher7c77bf22012-06-14 22:06:37 +020067 * 2.17.0 - add STRMOUT_BASE_UPDATE for r7xx
Marek Olšák0f457e42012-07-29 16:24:57 +020068 * 2.18.0 - r600-eg: allow "invalid" DB formats
Marek Olšákb51ad122012-08-09 16:34:16 +020069 * 2.19.0 - r600-eg: MSAA textures
Marek Olšák6759a0a2012-08-09 16:34:17 +020070 * 2.20.0 - r600-si: RADEON_INFO_TIMESTAMP query
Marek Olšákc116cc92012-08-19 02:22:09 +020071 * 2.21.0 - r600-r700: FMASK and CMASK
Marek Olšák523885d2012-08-24 14:27:36 +020072 * 2.22.0 - r600 only: RESOLVE_BOX allowed
Marek Olšák46fc8782012-09-25 01:45:33 +020073 * 2.23.0 - allow STRMOUT_BASE_UPDATE on RS780 and RS880
Marek Olšák61051af2012-09-25 03:34:01 +020074 * 2.24.0 - eg only: allow MIP_ADDRESS=0 for MSAA textures
Alex Deucher71bfe912012-12-07 20:00:30 -050075 * 2.25.0 - eg+: new info request for num SE and num SH
Jerome Glisse4ac05332012-12-13 12:08:11 -050076 * 2.26.0 - r600-eg: fix htile size computation
Alex Deucher8696e332012-12-13 18:57:07 -050077 * 2.27.0 - r600-SI: Add CS ioctl support for async DMA
Jerome Glisse4613ca12012-12-19 12:26:45 -050078 * 2.28.0 - r600-eg: Add MEM_WRITE packet support
Marek Olšákc18b1172013-01-12 04:19:37 +010079 * 2.29.0 - R500 FP16 color clear registers
Marek Olšák774c3892013-03-01 13:40:31 +010080 * 2.30.0 - fix for FMASK texturing
Samuel Lia0a53aa2013-04-08 17:25:47 -040081 * 2.31.0 - Add fastfb support for rs690
Christian König902aaef2013-04-09 10:35:42 -040082 * 2.32.0 - new info request for rings working
Jerome Glisse64d7b8b2013-04-09 11:17:08 -040083 * 2.33.0 - Add SI tiling mode array query
Alex Deucher39aee492013-04-10 13:41:25 -040084 * 2.34.0 - Add CIK tiling mode array query
Michel Dänzer32f79a82013-11-18 18:26:00 +090085 * 2.35.0 - Add CIK macrotile mode array query
Alex Deucher9482d0d2013-12-23 11:31:44 -050086 * 2.36.0 - Fix CIK DCE tiling setup
Dave Airlie7c4c62a2014-01-30 14:11:12 +100087 * 2.37.0 - allow GS ring setup on r6xx/r7xx
Marek Olšák020ff542014-03-22 16:20:43 +010088 * 2.38.0 - RADEON_GEM_OP (GET_INITIAL_DOMAIN, SET_INITIAL_DOMAIN),
89 * CIK: 1D and linear tiling modes contain valid PIPE_CONFIG
Alex Deucher65fcf662014-06-02 16:13:21 -040090 * 2.39.0 - Add INFO query for number of active CUs
Michel Dänzer72a99872014-07-31 18:43:49 +090091 * 2.40.0 - Add RADEON_GEM_GTT_WC/UC, flush HDP cache before submitting
Michel Dänzer897eba82014-09-17 16:25:55 +090092 * CS to GPU on >= r600
Glenn Kennard16613742014-12-13 03:32:37 +010093 * 2.41.0 - evergreen/cayman: Add SET_BASE/DRAW_INDIRECT command parsing support
Leo Liu1957d6b2015-03-31 11:19:50 -040094 * 2.42.0 - Add VCE/VUI (Video Usability Information) support
Marek Olšák72b90762015-04-29 19:40:33 +020095 * 2.43.0 - RADEON_INFO_GPU_RESET_COUNTER
Jerome Glisse771fe6b2009-06-05 14:42:42 +020096 */
97#define KMS_DRIVER_MAJOR 2
Marek Olšák72b90762015-04-29 19:40:33 +020098#define KMS_DRIVER_MINOR 43
Jerome Glisse771fe6b2009-06-05 14:42:42 +020099#define KMS_DRIVER_PATCHLEVEL 0
100int radeon_driver_load_kms(struct drm_device *dev, unsigned long flags);
101int radeon_driver_unload_kms(struct drm_device *dev);
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200102void radeon_driver_lastclose_kms(struct drm_device *dev);
103int radeon_driver_open_kms(struct drm_device *dev, struct drm_file *file_priv);
104void radeon_driver_postclose_kms(struct drm_device *dev,
105 struct drm_file *file_priv);
106void radeon_driver_preclose_kms(struct drm_device *dev,
107 struct drm_file *file_priv);
Dave Airlie10ebc0b2012-09-17 14:40:31 +1000108int radeon_suspend_kms(struct drm_device *dev, bool suspend, bool fbcon);
109int radeon_resume_kms(struct drm_device *dev, bool resume, bool fbcon);
Thierry Reding88e72712015-09-24 18:35:31 +0200110u32 radeon_get_vblank_counter_kms(struct drm_device *dev, unsigned int pipe);
111int radeon_enable_vblank_kms(struct drm_device *dev, unsigned int pipe);
112void radeon_disable_vblank_kms(struct drm_device *dev, unsigned int pipe);
113int radeon_get_vblank_timestamp_kms(struct drm_device *dev, unsigned int pipe,
Mario Kleinerf5a80202010-10-23 04:42:17 +0200114 int *max_error,
115 struct timeval *vblank_time,
116 unsigned flags);
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200117void radeon_driver_irq_preinstall_kms(struct drm_device *dev);
118int radeon_driver_irq_postinstall_kms(struct drm_device *dev);
119void radeon_driver_irq_uninstall_kms(struct drm_device *dev);
Daniel Vettere9f0d762013-12-11 11:34:42 +0100120irqreturn_t radeon_driver_irq_handler_kms(int irq, void *arg);
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200121void radeon_gem_object_free(struct drm_gem_object *obj);
Jerome Glisse721604a2012-01-05 22:11:05 -0500122int radeon_gem_object_open(struct drm_gem_object *obj,
123 struct drm_file *file_priv);
124void radeon_gem_object_close(struct drm_gem_object *obj,
125 struct drm_file *file_priv);
Christian Königf72a113a2014-08-07 09:36:00 +0200126struct dma_buf *radeon_gem_prime_export(struct drm_device *dev,
127 struct drm_gem_object *gobj,
128 int flags);
Thierry Reding88e72712015-09-24 18:35:31 +0200129extern int radeon_get_crtc_scanoutpos(struct drm_device *dev, unsigned int crtc,
130 unsigned int flags, int *vpos, int *hpos,
Ville Syrjälä3bb403b2015-09-14 22:43:44 +0300131 ktime_t *stime, ktime_t *etime,
132 const struct drm_display_mode *mode);
Alex Deucher90c4cde2014-04-10 22:29:01 -0400133extern bool radeon_is_px(struct drm_device *dev);
Rob Clarkbaa70942013-08-02 13:27:49 -0400134extern const struct drm_ioctl_desc radeon_ioctls_kms[];
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200135extern int radeon_max_kms_ioctl;
136int radeon_mmap(struct file *filp, struct vm_area_struct *vma);
Dave Airlieff72145b2011-02-07 12:16:14 +1000137int radeon_mode_dumb_mmap(struct drm_file *filp,
138 struct drm_device *dev,
139 uint32_t handle, uint64_t *offset_p);
140int radeon_mode_dumb_create(struct drm_file *file_priv,
141 struct drm_device *dev,
142 struct drm_mode_create_dumb *args);
Aaron Plattner1e6d17a2013-01-15 20:47:44 +0000143struct sg_table *radeon_gem_prime_get_sg_table(struct drm_gem_object *obj);
144struct drm_gem_object *radeon_gem_prime_import_sg_table(struct drm_device *dev,
Maarten Lankhorstb5e9c1a2014-01-09 11:03:14 +0100145 struct dma_buf_attachment *,
Aaron Plattner1e6d17a2013-01-15 20:47:44 +0000146 struct sg_table *sg);
147int radeon_gem_prime_pin(struct drm_gem_object *obj);
Maarten Lankhorst280cf212013-06-27 13:38:18 +0200148void radeon_gem_prime_unpin(struct drm_gem_object *obj);
Maarten Lankhorst3aac4502014-07-01 12:57:26 +0200149struct reservation_object *radeon_gem_prime_res_obj(struct drm_gem_object *);
Aaron Plattner1e6d17a2013-01-15 20:47:44 +0000150void *radeon_gem_prime_vmap(struct drm_gem_object *obj);
151void radeon_gem_prime_vunmap(struct drm_gem_object *obj, void *vaddr);
Christian König14adc892013-01-21 13:58:46 +0100152extern long radeon_kms_compat_ioctl(struct file *filp, unsigned int cmd,
153 unsigned long arg);
Dave Airlieff72145b2011-02-07 12:16:14 +1000154
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200155#if defined(CONFIG_DEBUG_FS)
156int radeon_debugfs_init(struct drm_minor *minor);
157void radeon_debugfs_cleanup(struct drm_minor *minor);
158#endif
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200159
Christian König14adc892013-01-21 13:58:46 +0100160/* atpx handler */
161#if defined(CONFIG_VGA_SWITCHEROO)
162void radeon_register_atpx_handler(void);
163void radeon_unregister_atpx_handler(void);
164#else
165static inline void radeon_register_atpx_handler(void) {}
166static inline void radeon_unregister_atpx_handler(void) {}
167#endif
Linus Torvalds1da177e2005-04-16 15:20:36 -0700168
Dave Airlie689b9d72005-09-30 17:09:07 +1000169int radeon_no_wb;
Dave Airliee9ced8e2013-05-15 01:23:36 +0000170int radeon_modeset = -1;
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200171int radeon_dynclks = -1;
172int radeon_r4xx_atom = 0;
173int radeon_agpmode = 0;
174int radeon_vram_limit = 0;
Alex Deucheredcd26e2013-07-05 17:16:51 -0400175int radeon_gart_size = -1; /* auto */
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200176int radeon_benchmarking = 0;
Michel Dänzerecc0b322009-07-21 11:23:57 +0200177int radeon_testing = 0;
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200178int radeon_connector_table = 0;
Dave Airlie4ce001a2009-08-13 16:32:14 +1000179int radeon_tv = 1;
Alex Deucher108dc8e2013-10-14 13:17:50 -0400180int radeon_audio = -1;
Alex Deucherf46c0122010-03-31 00:33:27 -0400181int radeon_disp_priority = 0;
Alex Deuchere2b0a8e2010-03-17 02:07:37 -0400182int radeon_hw_i2c = 0;
Dave Airlie197bbb32012-06-27 08:35:54 +0100183int radeon_pcie_gen2 = -1;
Alex Deuchera18cee12011-11-01 14:20:30 -0400184int radeon_msi = -1;
Christian König3368ff02012-05-02 15:11:21 +0200185int radeon_lockup_timeout = 10000;
Samuel Lia0a53aa2013-04-08 17:25:47 -0400186int radeon_fastfb = 0;
Alex Deucherda321c82013-04-12 13:55:22 -0400187int radeon_dpm = -1;
Alex Deucher1294d4a2013-07-16 15:58:50 -0400188int radeon_aspm = -1;
Dave Airlie10ebc0b2012-09-17 14:40:31 +1000189int radeon_runtime_pm = -1;
Alex Deucher363eb0b2014-01-08 17:55:08 -0500190int radeon_hard_reset = 0;
Christian Königdfc230f2014-07-19 13:55:58 +0200191int radeon_vm_size = 8;
192int radeon_vm_block_size = -1;
Alex Deuchera624f422014-07-01 11:23:03 -0400193int radeon_deep_color = 0;
Mario Kleiner39dc5452014-07-29 06:21:44 +0200194int radeon_use_pflipirq = 2;
Alex Deucher6e909f72014-08-07 09:28:31 -0400195int radeon_bapm = -1;
Alex Deucherbc130182014-09-16 20:57:26 -0400196int radeon_backlight = -1;
Dave Airlie875711f2015-02-20 09:21:36 +1000197int radeon_auxch = -1;
Dave Airlie9843ead2015-02-24 09:24:04 +1000198int radeon_mst = 0;
Jérome Glissef1a0a672016-03-18 16:58:36 +0100199int radeon_uvd = 1;
Jérome Glissefabb5932016-03-18 16:58:37 +0100200int radeon_vce = 1;
Dave Airlie689b9d72005-09-30 17:09:07 +1000201
Niels de Vos61a2d072008-07-31 00:07:23 -0700202MODULE_PARM_DESC(no_wb, "Disable AGP writeback for scratch registers");
Dave Airlie689b9d72005-09-30 17:09:07 +1000203module_param_named(no_wb, radeon_no_wb, int, 0444);
204
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200205MODULE_PARM_DESC(modeset, "Disable/Enable modesetting");
206module_param_named(modeset, radeon_modeset, int, 0400);
207
208MODULE_PARM_DESC(dynclks, "Disable/Enable dynamic clocks");
209module_param_named(dynclks, radeon_dynclks, int, 0444);
210
211MODULE_PARM_DESC(r4xx_atom, "Enable ATOMBIOS modesetting for R4xx");
212module_param_named(r4xx_atom, radeon_r4xx_atom, int, 0444);
213
Lauri Kasanen8902e6f2014-04-08 13:39:36 +0300214MODULE_PARM_DESC(vramlimit, "Restrict VRAM for testing, in megabytes");
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200215module_param_named(vramlimit, radeon_vram_limit, int, 0600);
216
217MODULE_PARM_DESC(agpmode, "AGP Mode (-1 == PCI)");
218module_param_named(agpmode, radeon_agpmode, int, 0444);
219
Alex Deucheredcd26e2013-07-05 17:16:51 -0400220MODULE_PARM_DESC(gartsize, "Size of PCIE/IGP gart to setup in megabytes (32, 64, etc., -1 = auto)");
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200221module_param_named(gartsize, radeon_gart_size, int, 0600);
222
223MODULE_PARM_DESC(benchmark, "Run benchmark");
224module_param_named(benchmark, radeon_benchmarking, int, 0444);
225
Michel Dänzerecc0b322009-07-21 11:23:57 +0200226MODULE_PARM_DESC(test, "Run tests");
227module_param_named(test, radeon_testing, int, 0444);
228
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200229MODULE_PARM_DESC(connector_table, "Force connector table");
230module_param_named(connector_table, radeon_connector_table, int, 0444);
Dave Airlie4ce001a2009-08-13 16:32:14 +1000231
232MODULE_PARM_DESC(tv, "TV enable (0 = disable)");
233module_param_named(tv, radeon_tv, int, 0444);
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200234
Alex Deucher108dc8e2013-10-14 13:17:50 -0400235MODULE_PARM_DESC(audio, "Audio enable (-1 = auto, 0 = disable, 1 = enable)");
Christian Koenigdafc3bd2009-10-11 23:49:13 +0200236module_param_named(audio, radeon_audio, int, 0444);
237
Alex Deucherf46c0122010-03-31 00:33:27 -0400238MODULE_PARM_DESC(disp_priority, "Display Priority (0 = auto, 1 = normal, 2 = high)");
239module_param_named(disp_priority, radeon_disp_priority, int, 0444);
240
Alex Deuchere2b0a8e2010-03-17 02:07:37 -0400241MODULE_PARM_DESC(hw_i2c, "hw i2c engine enable (0 = disable)");
242module_param_named(hw_i2c, radeon_hw_i2c, int, 0444);
243
Dave Airlie197bbb32012-06-27 08:35:54 +0100244MODULE_PARM_DESC(pcie_gen2, "PCIE Gen2 mode (-1 = auto, 0 = disable, 1 = enable)");
Alex Deucherd42dd572011-01-12 20:05:11 -0500245module_param_named(pcie_gen2, radeon_pcie_gen2, int, 0444);
246
Alex Deuchera18cee12011-11-01 14:20:30 -0400247MODULE_PARM_DESC(msi, "MSI support (1 = enable, 0 = disable, -1 = auto)");
248module_param_named(msi, radeon_msi, int, 0444);
249
Vincent Battsb5c9eca2015-03-06 21:07:05 +0000250MODULE_PARM_DESC(lockup_timeout, "GPU lockup timeout in ms (default 10000 = 10 seconds, 0 = disable)");
Christian König3368ff02012-05-02 15:11:21 +0200251module_param_named(lockup_timeout, radeon_lockup_timeout, int, 0444);
252
Samuel Lia0a53aa2013-04-08 17:25:47 -0400253MODULE_PARM_DESC(fastfb, "Direct FB access for IGP chips (0 = disable, 1 = enable)");
254module_param_named(fastfb, radeon_fastfb, int, 0444);
255
Alex Deucherda321c82013-04-12 13:55:22 -0400256MODULE_PARM_DESC(dpm, "DPM support (1 = enable, 0 = disable, -1 = auto)");
257module_param_named(dpm, radeon_dpm, int, 0444);
258
Alex Deucher1294d4a2013-07-16 15:58:50 -0400259MODULE_PARM_DESC(aspm, "ASPM support (1 = enable, 0 = disable, -1 = auto)");
260module_param_named(aspm, radeon_aspm, int, 0444);
261
Dave Airlie10ebc0b2012-09-17 14:40:31 +1000262MODULE_PARM_DESC(runpm, "PX runtime pm (1 = force enable, 0 = disable, -1 = PX only default)");
263module_param_named(runpm, radeon_runtime_pm, int, 0444);
264
Alex Deucher363eb0b2014-01-08 17:55:08 -0500265MODULE_PARM_DESC(hard_reset, "PCI config reset (1 = force enable, 0 = disable (default))");
266module_param_named(hard_reset, radeon_hard_reset, int, 0444);
267
Christian König20b26562014-07-18 13:56:56 +0200268MODULE_PARM_DESC(vm_size, "VM address space size in gigabytes (default 4GB)");
Christian Königc1c44132014-06-05 23:47:32 -0400269module_param_named(vm_size, radeon_vm_size, int, 0444);
270
Christian Königdfc230f2014-07-19 13:55:58 +0200271MODULE_PARM_DESC(vm_block_size, "VM page table size in bits (default depending on vm_size)");
Christian König4510fb92014-06-05 23:56:50 -0400272module_param_named(vm_block_size, radeon_vm_block_size, int, 0444);
273
Alex Deuchera624f422014-07-01 11:23:03 -0400274MODULE_PARM_DESC(deep_color, "Deep Color support (1 = enable, 0 = disable (default))");
275module_param_named(deep_color, radeon_deep_color, int, 0444);
276
Mario Kleiner39dc5452014-07-29 06:21:44 +0200277MODULE_PARM_DESC(use_pflipirq, "Pflip irqs for pageflip completion (0 = disable, 1 = as fallback, 2 = exclusive (default))");
278module_param_named(use_pflipirq, radeon_use_pflipirq, int, 0444);
279
Alex Deucher6e909f72014-08-07 09:28:31 -0400280MODULE_PARM_DESC(bapm, "BAPM support (1 = enable, 0 = disable, -1 = auto)");
281module_param_named(bapm, radeon_bapm, int, 0444);
282
Alex Deucherbc130182014-09-16 20:57:26 -0400283MODULE_PARM_DESC(backlight, "backlight support (1 = enable, 0 = disable, -1 = auto)");
284module_param_named(backlight, radeon_backlight, int, 0444);
285
Dave Airlie875711f2015-02-20 09:21:36 +1000286MODULE_PARM_DESC(auxch, "Use native auxch experimental support (1 = enable, 0 = disable, -1 = auto)");
287module_param_named(auxch, radeon_auxch, int, 0444);
288
Dave Airlie9843ead2015-02-24 09:24:04 +1000289MODULE_PARM_DESC(mst, "DisplayPort MST experimental support (1 = enable, 0 = disable)");
290module_param_named(mst, radeon_mst, int, 0444);
291
Jérome Glissef1a0a672016-03-18 16:58:36 +0100292MODULE_PARM_DESC(uvd, "uvd enable/disable uvd support (1 = enable, 0 = disable)");
293module_param_named(uvd, radeon_uvd, int, 0444);
294
Jérome Glissefabb5932016-03-18 16:58:37 +0100295MODULE_PARM_DESC(vce, "vce enable/disable vce support (1 = enable, 0 = disable)");
296module_param_named(vce, radeon_vce, int, 0444);
297
Christian König14adc892013-01-21 13:58:46 +0100298static struct pci_device_id pciidlist[] = {
299 radeon_PCI_IDS
300};
301
302MODULE_DEVICE_TABLE(pci, pciidlist);
303
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200304static struct drm_driver kms_driver;
305
Tommi Rantala30238152012-11-09 09:19:39 +0000306static int radeon_kick_out_firmware_fb(struct pci_dev *pdev)
Benjamin Herrenschmidta56f7422010-10-06 16:39:07 +0000307{
308 struct apertures_struct *ap;
309 bool primary = false;
310
311 ap = alloc_apertures(1);
Tommi Rantala30238152012-11-09 09:19:39 +0000312 if (!ap)
313 return -ENOMEM;
314
Benjamin Herrenschmidta56f7422010-10-06 16:39:07 +0000315 ap->ranges[0].base = pci_resource_start(pdev, 0);
316 ap->ranges[0].size = pci_resource_len(pdev, 0);
317
318#ifdef CONFIG_X86
319 primary = pdev->resource[PCI_ROM_RESOURCE].flags & IORESOURCE_ROM_SHADOW;
320#endif
321 remove_conflicting_framebuffers(ap, "radeondrmfb", primary);
322 kfree(ap);
Tommi Rantala30238152012-11-09 09:19:39 +0000323
324 return 0;
Benjamin Herrenschmidta56f7422010-10-06 16:39:07 +0000325}
326
Greg Kroah-Hartman56550d92012-12-21 15:09:25 -0800327static int radeon_pci_probe(struct pci_dev *pdev,
328 const struct pci_device_id *ent)
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200329{
Tommi Rantala30238152012-11-09 09:19:39 +0000330 int ret;
331
Lukas Wunner14d20002016-01-11 20:09:20 +0100332 /*
Oded Gabbay412c8f72016-02-09 13:30:04 +0200333 * Initialize amdkfd before starting radeon. If it was not loaded yet,
334 * defer radeon probing
335 */
336 ret = radeon_kfd_init();
337 if (ret == -EPROBE_DEFER)
338 return ret;
339
340 /*
Lukas Wunner14d20002016-01-11 20:09:20 +0100341 * apple-gmux is needed on dual GPU MacBook Pro
342 * to probe the panel if we're the inactive GPU.
343 */
344 if (IS_ENABLED(CONFIG_VGA_ARB) && IS_ENABLED(CONFIG_VGA_SWITCHEROO) &&
345 apple_gmux_present() && pdev != vga_default_device() &&
346 !vga_switcheroo_handler_flags())
347 return -EPROBE_DEFER;
348
Benjamin Herrenschmidta56f7422010-10-06 16:39:07 +0000349 /* Get rid of things like offb */
Tommi Rantala30238152012-11-09 09:19:39 +0000350 ret = radeon_kick_out_firmware_fb(pdev);
351 if (ret)
352 return ret;
Benjamin Herrenschmidta56f7422010-10-06 16:39:07 +0000353
Jordan Crousedcdb1672010-05-27 13:40:25 -0600354 return drm_get_pci_dev(pdev, ent, &kms_driver);
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200355}
356
357static void
358radeon_pci_remove(struct pci_dev *pdev)
359{
360 struct drm_device *dev = pci_get_drvdata(pdev);
361
362 drm_put_dev(dev);
363}
364
Dave Airlie7473e832012-09-13 12:02:30 +1000365static int radeon_pmops_suspend(struct device *dev)
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200366{
Dave Airlie7473e832012-09-13 12:02:30 +1000367 struct pci_dev *pdev = to_pci_dev(dev);
368 struct drm_device *drm_dev = pci_get_drvdata(pdev);
Dave Airlie10ebc0b2012-09-17 14:40:31 +1000369 return radeon_suspend_kms(drm_dev, true, true);
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200370}
371
Dave Airlie7473e832012-09-13 12:02:30 +1000372static int radeon_pmops_resume(struct device *dev)
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200373{
Dave Airlie7473e832012-09-13 12:02:30 +1000374 struct pci_dev *pdev = to_pci_dev(dev);
375 struct drm_device *drm_dev = pci_get_drvdata(pdev);
Dave Airlie10ebc0b2012-09-17 14:40:31 +1000376 return radeon_resume_kms(drm_dev, true, true);
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200377}
378
Dave Airlie7473e832012-09-13 12:02:30 +1000379static int radeon_pmops_freeze(struct device *dev)
380{
381 struct pci_dev *pdev = to_pci_dev(dev);
382 struct drm_device *drm_dev = pci_get_drvdata(pdev);
Dave Airlie10ebc0b2012-09-17 14:40:31 +1000383 return radeon_suspend_kms(drm_dev, false, true);
Dave Airlie7473e832012-09-13 12:02:30 +1000384}
385
386static int radeon_pmops_thaw(struct device *dev)
387{
388 struct pci_dev *pdev = to_pci_dev(dev);
389 struct drm_device *drm_dev = pci_get_drvdata(pdev);
Dave Airlie10ebc0b2012-09-17 14:40:31 +1000390 return radeon_resume_kms(drm_dev, false, true);
391}
392
393static int radeon_pmops_runtime_suspend(struct device *dev)
394{
395 struct pci_dev *pdev = to_pci_dev(dev);
396 struct drm_device *drm_dev = pci_get_drvdata(pdev);
397 int ret;
398
Alex Deucher90c4cde2014-04-10 22:29:01 -0400399 if (!radeon_is_px(drm_dev)) {
Dave Airlie1d8eec82014-03-27 14:09:18 +1000400 pm_runtime_forbid(dev);
401 return -EBUSY;
402 }
Alex Deucher9babd352014-01-24 14:59:42 -0500403
Dave Airlie10ebc0b2012-09-17 14:40:31 +1000404 drm_dev->switch_power_state = DRM_SWITCH_POWER_CHANGING;
405 drm_kms_helper_poll_disable(drm_dev);
406 vga_switcheroo_set_dynamic_switch(pdev, VGA_SWITCHEROO_OFF);
407
408 ret = radeon_suspend_kms(drm_dev, false, false);
409 pci_save_state(pdev);
410 pci_disable_device(pdev);
Bjorn Helgaasb440bde2014-09-10 13:45:01 -0600411 pci_ignore_hotplug(pdev);
Dave Airlie10ebc0b2012-09-17 14:40:31 +1000412 pci_set_power_state(pdev, PCI_D3cold);
413 drm_dev->switch_power_state = DRM_SWITCH_POWER_DYNAMIC_OFF;
414
415 return 0;
416}
417
418static int radeon_pmops_runtime_resume(struct device *dev)
419{
420 struct pci_dev *pdev = to_pci_dev(dev);
421 struct drm_device *drm_dev = pci_get_drvdata(pdev);
422 int ret;
423
Alex Deucher90c4cde2014-04-10 22:29:01 -0400424 if (!radeon_is_px(drm_dev))
Alex Deucher9babd352014-01-24 14:59:42 -0500425 return -EINVAL;
426
Dave Airlie10ebc0b2012-09-17 14:40:31 +1000427 drm_dev->switch_power_state = DRM_SWITCH_POWER_CHANGING;
428
429 pci_set_power_state(pdev, PCI_D0);
430 pci_restore_state(pdev);
431 ret = pci_enable_device(pdev);
432 if (ret)
433 return ret;
434 pci_set_master(pdev);
435
436 ret = radeon_resume_kms(drm_dev, false, false);
437 drm_kms_helper_poll_enable(drm_dev);
438 vga_switcheroo_set_dynamic_switch(pdev, VGA_SWITCHEROO_ON);
439 drm_dev->switch_power_state = DRM_SWITCH_POWER_ON;
440 return 0;
441}
442
443static int radeon_pmops_runtime_idle(struct device *dev)
444{
445 struct pci_dev *pdev = to_pci_dev(dev);
446 struct drm_device *drm_dev = pci_get_drvdata(pdev);
447 struct drm_crtc *crtc;
448
Alex Deucher90c4cde2014-04-10 22:29:01 -0400449 if (!radeon_is_px(drm_dev)) {
Dave Airlie1d8eec82014-03-27 14:09:18 +1000450 pm_runtime_forbid(dev);
Dave Airlie10ebc0b2012-09-17 14:40:31 +1000451 return -EBUSY;
452 }
453
454 list_for_each_entry(crtc, &drm_dev->mode_config.crtc_list, head) {
455 if (crtc->enabled) {
456 DRM_DEBUG_DRIVER("failing to power off - crtc active\n");
457 return -EBUSY;
458 }
459 }
460
461 pm_runtime_mark_last_busy(dev);
462 pm_runtime_autosuspend(dev);
463 /* we don't want the main rpm_idle to call suspend - we want to autosuspend */
464 return 1;
465}
466
467long radeon_drm_ioctl(struct file *filp,
468 unsigned int cmd, unsigned long arg)
469{
470 struct drm_file *file_priv = filp->private_data;
471 struct drm_device *dev;
472 long ret;
473 dev = file_priv->minor->dev;
474 ret = pm_runtime_get_sync(dev->dev);
475 if (ret < 0)
476 return ret;
477
478 ret = drm_ioctl(filp, cmd, arg);
479
480 pm_runtime_mark_last_busy(dev->dev);
481 pm_runtime_put_autosuspend(dev->dev);
482 return ret;
Dave Airlie7473e832012-09-13 12:02:30 +1000483}
484
485static const struct dev_pm_ops radeon_pm_ops = {
486 .suspend = radeon_pmops_suspend,
487 .resume = radeon_pmops_resume,
488 .freeze = radeon_pmops_freeze,
489 .thaw = radeon_pmops_thaw,
490 .poweroff = radeon_pmops_freeze,
491 .restore = radeon_pmops_resume,
Dave Airlie10ebc0b2012-09-17 14:40:31 +1000492 .runtime_suspend = radeon_pmops_runtime_suspend,
493 .runtime_resume = radeon_pmops_runtime_resume,
494 .runtime_idle = radeon_pmops_runtime_idle,
Dave Airlie7473e832012-09-13 12:02:30 +1000495};
496
Arjan van de Vene08e96d2011-10-31 07:28:57 -0700497static const struct file_operations radeon_driver_kms_fops = {
498 .owner = THIS_MODULE,
499 .open = drm_open,
500 .release = drm_release,
Dave Airlie10ebc0b2012-09-17 14:40:31 +1000501 .unlocked_ioctl = radeon_drm_ioctl,
Arjan van de Vene08e96d2011-10-31 07:28:57 -0700502 .mmap = radeon_mmap,
503 .poll = drm_poll,
Arjan van de Vene08e96d2011-10-31 07:28:57 -0700504 .read = drm_read,
505#ifdef CONFIG_COMPAT
506 .compat_ioctl = radeon_kms_compat_ioctl,
507#endif
508};
509
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200510static struct drm_driver kms_driver = {
511 .driver_features =
Daniel Vetter28185642013-08-08 15:41:27 +0200512 DRIVER_USE_AGP |
Daniel Vetter81e95692013-07-10 14:11:49 +0200513 DRIVER_HAVE_IRQ | DRIVER_IRQ_SHARED | DRIVER_GEM |
Christian Königf33bcab2013-08-25 18:29:03 +0200514 DRIVER_PRIME | DRIVER_RENDER,
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200515 .load = radeon_driver_load_kms,
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200516 .open = radeon_driver_open_kms,
517 .preclose = radeon_driver_preclose_kms,
518 .postclose = radeon_driver_postclose_kms,
519 .lastclose = radeon_driver_lastclose_kms,
David Herrmann915b4d12014-08-29 12:12:43 +0200520 .set_busid = drm_pci_set_busid,
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200521 .unload = radeon_driver_unload_kms,
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200522 .get_vblank_counter = radeon_get_vblank_counter_kms,
523 .enable_vblank = radeon_enable_vblank_kms,
524 .disable_vblank = radeon_disable_vblank_kms,
Mario Kleinerf5a80202010-10-23 04:42:17 +0200525 .get_vblank_timestamp = radeon_get_vblank_timestamp_kms,
526 .get_scanout_position = radeon_get_crtc_scanoutpos,
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200527#if defined(CONFIG_DEBUG_FS)
528 .debugfs_init = radeon_debugfs_init,
529 .debugfs_cleanup = radeon_debugfs_cleanup,
530#endif
531 .irq_preinstall = radeon_driver_irq_preinstall_kms,
532 .irq_postinstall = radeon_driver_irq_postinstall_kms,
533 .irq_uninstall = radeon_driver_irq_uninstall_kms,
534 .irq_handler = radeon_driver_irq_handler_kms,
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200535 .ioctls = radeon_ioctls_kms,
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200536 .gem_free_object = radeon_gem_object_free,
Jerome Glisse721604a2012-01-05 22:11:05 -0500537 .gem_open_object = radeon_gem_object_open,
538 .gem_close_object = radeon_gem_object_close,
Dave Airlieff72145b2011-02-07 12:16:14 +1000539 .dumb_create = radeon_mode_dumb_create,
540 .dumb_map_offset = radeon_mode_dumb_mmap,
Daniel Vetter43387b32013-07-16 09:12:04 +0200541 .dumb_destroy = drm_gem_dumb_destroy,
Arjan van de Vene08e96d2011-10-31 07:28:57 -0700542 .fops = &radeon_driver_kms_fops,
Alex Deucher40f5cf92012-05-10 18:33:13 -0400543
544 .prime_handle_to_fd = drm_gem_prime_handle_to_fd,
545 .prime_fd_to_handle = drm_gem_prime_fd_to_handle,
Christian Königf72a113a2014-08-07 09:36:00 +0200546 .gem_prime_export = radeon_gem_prime_export,
Aaron Plattner1e6d17a2013-01-15 20:47:44 +0000547 .gem_prime_import = drm_gem_prime_import,
548 .gem_prime_pin = radeon_gem_prime_pin,
Maarten Lankhorst280cf212013-06-27 13:38:18 +0200549 .gem_prime_unpin = radeon_gem_prime_unpin,
Maarten Lankhorst3aac4502014-07-01 12:57:26 +0200550 .gem_prime_res_obj = radeon_gem_prime_res_obj,
Aaron Plattner1e6d17a2013-01-15 20:47:44 +0000551 .gem_prime_get_sg_table = radeon_gem_prime_get_sg_table,
552 .gem_prime_import_sg_table = radeon_gem_prime_import_sg_table,
553 .gem_prime_vmap = radeon_gem_prime_vmap,
554 .gem_prime_vunmap = radeon_gem_prime_vunmap,
Alex Deucher40f5cf92012-05-10 18:33:13 -0400555
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200556 .name = DRIVER_NAME,
557 .desc = DRIVER_DESC,
558 .date = DRIVER_DATE,
559 .major = KMS_DRIVER_MAJOR,
560 .minor = KMS_DRIVER_MINOR,
561 .patchlevel = KMS_DRIVER_PATCHLEVEL,
562};
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200563
564static struct drm_driver *driver;
Dave Airlie8410ea32010-12-15 03:16:38 +1000565static struct pci_driver *pdriver;
566
Dave Airlie8410ea32010-12-15 03:16:38 +1000567static struct pci_driver radeon_kms_pci_driver = {
568 .name = DRIVER_NAME,
569 .id_table = pciidlist,
570 .probe = radeon_pci_probe,
571 .remove = radeon_pci_remove,
Dave Airlie7473e832012-09-13 12:02:30 +1000572 .driver.pm = &radeon_pm_ops,
Dave Airlie8410ea32010-12-15 03:16:38 +1000573};
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200574
Linus Torvalds1da177e2005-04-16 15:20:36 -0700575static int __init radeon_init(void)
576{
Dave Airliee9ced8e2013-05-15 01:23:36 +0000577 if (vgacon_text_force() && radeon_modeset == -1) {
578 DRM_INFO("VGACON disable radeon kernel modesetting.\n");
579 radeon_modeset = 0;
580 }
Dave Airliee9ced8e2013-05-15 01:23:36 +0000581 /* set to modesetting by default if not nomodeset */
582 if (radeon_modeset == -1)
583 radeon_modeset = 1;
584
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200585 if (radeon_modeset == 1) {
586 DRM_INFO("radeon kernel modesetting enabled.\n");
587 driver = &kms_driver;
Dave Airlie8410ea32010-12-15 03:16:38 +1000588 pdriver = &radeon_kms_pci_driver;
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200589 driver->driver_features |= DRIVER_MODESET;
590 driver->num_ioctls = radeon_max_kms_ioctl;
Dave Airlie6a9ee8a2010-02-01 15:38:10 +1000591 radeon_register_atpx_handler();
Christian König14adc892013-01-21 13:58:46 +0100592
593 } else {
Christian König14adc892013-01-21 13:58:46 +0100594 DRM_ERROR("No UMS support in radeon module!\n");
595 return -EINVAL;
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200596 }
Christian König14adc892013-01-21 13:58:46 +0100597
598 /* let modprobe override vga console setting */
Dave Airlie8410ea32010-12-15 03:16:38 +1000599 return drm_pci_init(driver, pdriver);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700600}
601
602static void __exit radeon_exit(void)
603{
Oded Gabbaye28740e2014-07-15 13:53:32 +0300604 radeon_kfd_fini();
Dave Airlie8410ea32010-12-15 03:16:38 +1000605 drm_pci_exit(driver, pdriver);
Dave Airlie6a9ee8a2010-02-01 15:38:10 +1000606 radeon_unregister_atpx_handler();
Linus Torvalds1da177e2005-04-16 15:20:36 -0700607}
608
Jerome Glisse176f6132009-06-22 18:16:13 +0200609module_init(radeon_init);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700610module_exit(radeon_exit);
611
Dave Airlieb5e89ed2005-09-25 14:28:13 +1000612MODULE_AUTHOR(DRIVER_AUTHOR);
613MODULE_DESCRIPTION(DRIVER_DESC);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700614MODULE_LICENSE("GPL and additional rights");