blob: e91d548063efdfafac19371f6a7f6d5e2a67dd66 [file] [log] [blame]
Linus Torvalds1da177e2005-04-16 15:20:36 -07001/**
2 * \file radeon_drv.c
3 * ATI Radeon driver
4 *
5 * \author Gareth Hughes <gareth@valinux.com>
6 */
7
8/*
9 * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
10 * All Rights Reserved.
11 *
12 * Permission is hereby granted, free of charge, to any person obtaining a
13 * copy of this software and associated documentation files (the "Software"),
14 * to deal in the Software without restriction, including without limitation
15 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
16 * and/or sell copies of the Software, and to permit persons to whom the
17 * Software is furnished to do so, subject to the following conditions:
18 *
19 * The above copyright notice and this permission notice (including the next
20 * paragraph) shall be included in all copies or substantial portions of the
21 * Software.
22 *
23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
24 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
25 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
26 * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
27 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
28 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
29 * OTHER DEALINGS IN THE SOFTWARE.
30 */
31
David Howells760285e2012-10-02 18:01:07 +010032#include <drm/drmP.h>
33#include <drm/radeon_drm.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070034#include "radeon_drv.h"
35
David Howells760285e2012-10-02 18:01:07 +010036#include <drm/drm_pciids.h>
Jerome Glisse771fe6b2009-06-05 14:42:42 +020037#include <linux/console.h>
Paul Gortmakere0cd3602011-08-30 11:04:30 -040038#include <linux/module.h>
Dave Airlie10ebc0b2012-09-17 14:40:31 +100039#include <linux/pm_runtime.h>
40#include <linux/vga_switcheroo.h>
41#include "drm_crtc_helper.h"
Jerome Glisse771fe6b2009-06-05 14:42:42 +020042/*
43 * KMS wrapper.
Dave Airlie0de1a572010-03-01 16:32:15 +100044 * - 2.0.0 - initial interface
45 * - 2.1.0 - add square tiling interface
Alex Deucherfdb43522010-03-26 15:24:14 -040046 * - 2.2.0 - add r6xx/r7xx const buffer support
Marek Olšákcae94b02010-02-21 21:24:15 +010047 * - 2.3.0 - add MSPOS + 3D texture + r500 VAP regs
Jerome Glissebc35afd2010-05-12 18:01:13 +020048 * - 2.4.0 - add crtc id query
Alex Deucher148a03b2010-06-03 19:00:03 -040049 * - 2.5.0 - add get accel 2 to work around ddx breakage for evergreen
Dave Airlieab9e1f52010-07-13 11:11:11 +100050 * - 2.6.0 - add tiling config query (r6xx+), add initial HiZ support (r300->r500)
Alex Deucher71901cc2010-10-21 13:45:30 -040051 * 2.7.0 - fixups for r600 2D tiling support. (no external ABI change), add eg dyn gpr regs
Alex Deucher58bbf012011-01-24 17:14:26 -050052 * 2.8.0 - pageflip support, r500 US_FORMAT regs. r500 ARGB2101010 colorbuf, r300->r500 CMASK, clock crystal query
Dave Airlie486af182011-03-01 14:32:27 +100053 * 2.9.0 - r600 tiling (s3tc,rgtc) working, SET_PREDICATION packet 3 on r600 + eg, backend query
Alex Deucherb8709892011-07-27 04:17:25 +000054 * 2.10.0 - fusion 2D tiling
55 * 2.11.0 - backend map, initial compute support for the CS checker
Marek Olšáke70f2242011-10-25 01:38:45 +020056 * 2.12.0 - RADEON_CS_KEEP_TILING_FLAGS
Marek Olšákdd220a02012-01-27 12:17:59 -050057 * 2.13.0 - virtual memory support, streamout
Jerome Glisse285484e2011-12-16 17:03:42 -050058 * 2.14.0 - add evergreen tiling informations
Tom Stellard609c1e12012-03-20 17:17:55 -040059 * 2.15.0 - add max_pipes query
Jerome Glissed2609872012-06-09 10:57:41 -040060 * 2.16.0 - fix evergreen 2D tiled surface calculation
Alex Deucher7c77bf22012-06-14 22:06:37 +020061 * 2.17.0 - add STRMOUT_BASE_UPDATE for r7xx
Marek Olšák0f457e42012-07-29 16:24:57 +020062 * 2.18.0 - r600-eg: allow "invalid" DB formats
Marek Olšákb51ad122012-08-09 16:34:16 +020063 * 2.19.0 - r600-eg: MSAA textures
Marek Olšák6759a0a2012-08-09 16:34:17 +020064 * 2.20.0 - r600-si: RADEON_INFO_TIMESTAMP query
Marek Olšákc116cc92012-08-19 02:22:09 +020065 * 2.21.0 - r600-r700: FMASK and CMASK
Marek Olšák523885d2012-08-24 14:27:36 +020066 * 2.22.0 - r600 only: RESOLVE_BOX allowed
Marek Olšák46fc8782012-09-25 01:45:33 +020067 * 2.23.0 - allow STRMOUT_BASE_UPDATE on RS780 and RS880
Marek Olšák61051af2012-09-25 03:34:01 +020068 * 2.24.0 - eg only: allow MIP_ADDRESS=0 for MSAA textures
Alex Deucher71bfe912012-12-07 20:00:30 -050069 * 2.25.0 - eg+: new info request for num SE and num SH
Jerome Glisse4ac05332012-12-13 12:08:11 -050070 * 2.26.0 - r600-eg: fix htile size computation
Alex Deucher8696e332012-12-13 18:57:07 -050071 * 2.27.0 - r600-SI: Add CS ioctl support for async DMA
Jerome Glisse4613ca12012-12-19 12:26:45 -050072 * 2.28.0 - r600-eg: Add MEM_WRITE packet support
Marek Olšákc18b1172013-01-12 04:19:37 +010073 * 2.29.0 - R500 FP16 color clear registers
Marek Olšák774c3892013-03-01 13:40:31 +010074 * 2.30.0 - fix for FMASK texturing
Samuel Lia0a53aa2013-04-08 17:25:47 -040075 * 2.31.0 - Add fastfb support for rs690
Christian König902aaef2013-04-09 10:35:42 -040076 * 2.32.0 - new info request for rings working
Jerome Glisse64d7b8b2013-04-09 11:17:08 -040077 * 2.33.0 - Add SI tiling mode array query
Alex Deucher39aee492013-04-10 13:41:25 -040078 * 2.34.0 - Add CIK tiling mode array query
Michel Dänzer32f79a82013-11-18 18:26:00 +090079 * 2.35.0 - Add CIK macrotile mode array query
Jerome Glisse771fe6b2009-06-05 14:42:42 +020080 */
81#define KMS_DRIVER_MAJOR 2
Michel Dänzer32f79a82013-11-18 18:26:00 +090082#define KMS_DRIVER_MINOR 35
Jerome Glisse771fe6b2009-06-05 14:42:42 +020083#define KMS_DRIVER_PATCHLEVEL 0
84int radeon_driver_load_kms(struct drm_device *dev, unsigned long flags);
85int radeon_driver_unload_kms(struct drm_device *dev);
Jerome Glisse771fe6b2009-06-05 14:42:42 +020086void radeon_driver_lastclose_kms(struct drm_device *dev);
87int radeon_driver_open_kms(struct drm_device *dev, struct drm_file *file_priv);
88void radeon_driver_postclose_kms(struct drm_device *dev,
89 struct drm_file *file_priv);
90void radeon_driver_preclose_kms(struct drm_device *dev,
91 struct drm_file *file_priv);
Dave Airlie10ebc0b2012-09-17 14:40:31 +100092int radeon_suspend_kms(struct drm_device *dev, bool suspend, bool fbcon);
93int radeon_resume_kms(struct drm_device *dev, bool resume, bool fbcon);
Jerome Glisse771fe6b2009-06-05 14:42:42 +020094u32 radeon_get_vblank_counter_kms(struct drm_device *dev, int crtc);
95int radeon_enable_vblank_kms(struct drm_device *dev, int crtc);
96void radeon_disable_vblank_kms(struct drm_device *dev, int crtc);
Mario Kleinerf5a80202010-10-23 04:42:17 +020097int radeon_get_vblank_timestamp_kms(struct drm_device *dev, int crtc,
98 int *max_error,
99 struct timeval *vblank_time,
100 unsigned flags);
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200101void radeon_driver_irq_preinstall_kms(struct drm_device *dev);
102int radeon_driver_irq_postinstall_kms(struct drm_device *dev);
103void radeon_driver_irq_uninstall_kms(struct drm_device *dev);
Daniel Vettere9f0d762013-12-11 11:34:42 +0100104irqreturn_t radeon_driver_irq_handler_kms(int irq, void *arg);
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200105void radeon_gem_object_free(struct drm_gem_object *obj);
Jerome Glisse721604a2012-01-05 22:11:05 -0500106int radeon_gem_object_open(struct drm_gem_object *obj,
107 struct drm_file *file_priv);
108void radeon_gem_object_close(struct drm_gem_object *obj,
109 struct drm_file *file_priv);
Mario Kleinerf5a80202010-10-23 04:42:17 +0200110extern int radeon_get_crtc_scanoutpos(struct drm_device *dev, int crtc,
Mario Kleinerd47abc52013-10-30 05:13:07 +0100111 int *vpos, int *hpos, ktime_t *stime,
112 ktime_t *etime);
Rob Clarkbaa70942013-08-02 13:27:49 -0400113extern const struct drm_ioctl_desc radeon_ioctls_kms[];
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200114extern int radeon_max_kms_ioctl;
115int radeon_mmap(struct file *filp, struct vm_area_struct *vma);
Dave Airlieff72145b2011-02-07 12:16:14 +1000116int radeon_mode_dumb_mmap(struct drm_file *filp,
117 struct drm_device *dev,
118 uint32_t handle, uint64_t *offset_p);
119int radeon_mode_dumb_create(struct drm_file *file_priv,
120 struct drm_device *dev,
121 struct drm_mode_create_dumb *args);
Aaron Plattner1e6d17a2013-01-15 20:47:44 +0000122struct sg_table *radeon_gem_prime_get_sg_table(struct drm_gem_object *obj);
123struct drm_gem_object *radeon_gem_prime_import_sg_table(struct drm_device *dev,
124 size_t size,
125 struct sg_table *sg);
126int radeon_gem_prime_pin(struct drm_gem_object *obj);
Maarten Lankhorst280cf212013-06-27 13:38:18 +0200127void radeon_gem_prime_unpin(struct drm_gem_object *obj);
Aaron Plattner1e6d17a2013-01-15 20:47:44 +0000128void *radeon_gem_prime_vmap(struct drm_gem_object *obj);
129void radeon_gem_prime_vunmap(struct drm_gem_object *obj, void *vaddr);
Christian König14adc892013-01-21 13:58:46 +0100130extern long radeon_kms_compat_ioctl(struct file *filp, unsigned int cmd,
131 unsigned long arg);
Dave Airlieff72145b2011-02-07 12:16:14 +1000132
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200133#if defined(CONFIG_DEBUG_FS)
134int radeon_debugfs_init(struct drm_minor *minor);
135void radeon_debugfs_cleanup(struct drm_minor *minor);
136#endif
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200137
Christian König14adc892013-01-21 13:58:46 +0100138/* atpx handler */
139#if defined(CONFIG_VGA_SWITCHEROO)
140void radeon_register_atpx_handler(void);
141void radeon_unregister_atpx_handler(void);
Dave Airlie10ebc0b2012-09-17 14:40:31 +1000142bool radeon_is_px(void);
Christian König14adc892013-01-21 13:58:46 +0100143#else
144static inline void radeon_register_atpx_handler(void) {}
145static inline void radeon_unregister_atpx_handler(void) {}
Dave Airlie10ebc0b2012-09-17 14:40:31 +1000146static inline bool radeon_is_px(void) { return false; }
Christian König14adc892013-01-21 13:58:46 +0100147#endif
Linus Torvalds1da177e2005-04-16 15:20:36 -0700148
Dave Airlie689b9d72005-09-30 17:09:07 +1000149int radeon_no_wb;
Dave Airliee9ced8e2013-05-15 01:23:36 +0000150int radeon_modeset = -1;
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200151int radeon_dynclks = -1;
152int radeon_r4xx_atom = 0;
153int radeon_agpmode = 0;
154int radeon_vram_limit = 0;
Alex Deucheredcd26e2013-07-05 17:16:51 -0400155int radeon_gart_size = -1; /* auto */
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200156int radeon_benchmarking = 0;
Michel Dänzerecc0b322009-07-21 11:23:57 +0200157int radeon_testing = 0;
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200158int radeon_connector_table = 0;
Dave Airlie4ce001a2009-08-13 16:32:14 +1000159int radeon_tv = 1;
Alex Deucher108dc8e2013-10-14 13:17:50 -0400160int radeon_audio = -1;
Alex Deucherf46c0122010-03-31 00:33:27 -0400161int radeon_disp_priority = 0;
Alex Deuchere2b0a8e2010-03-17 02:07:37 -0400162int radeon_hw_i2c = 0;
Dave Airlie197bbb32012-06-27 08:35:54 +0100163int radeon_pcie_gen2 = -1;
Alex Deuchera18cee12011-11-01 14:20:30 -0400164int radeon_msi = -1;
Christian König3368ff02012-05-02 15:11:21 +0200165int radeon_lockup_timeout = 10000;
Samuel Lia0a53aa2013-04-08 17:25:47 -0400166int radeon_fastfb = 0;
Alex Deucherda321c82013-04-12 13:55:22 -0400167int radeon_dpm = -1;
Alex Deucher1294d4a2013-07-16 15:58:50 -0400168int radeon_aspm = -1;
Dave Airlie10ebc0b2012-09-17 14:40:31 +1000169int radeon_runtime_pm = -1;
Alex Deucher363eb0b2014-01-08 17:55:08 -0500170int radeon_hard_reset = 0;
Dave Airlie689b9d72005-09-30 17:09:07 +1000171
Niels de Vos61a2d072008-07-31 00:07:23 -0700172MODULE_PARM_DESC(no_wb, "Disable AGP writeback for scratch registers");
Dave Airlie689b9d72005-09-30 17:09:07 +1000173module_param_named(no_wb, radeon_no_wb, int, 0444);
174
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200175MODULE_PARM_DESC(modeset, "Disable/Enable modesetting");
176module_param_named(modeset, radeon_modeset, int, 0400);
177
178MODULE_PARM_DESC(dynclks, "Disable/Enable dynamic clocks");
179module_param_named(dynclks, radeon_dynclks, int, 0444);
180
181MODULE_PARM_DESC(r4xx_atom, "Enable ATOMBIOS modesetting for R4xx");
182module_param_named(r4xx_atom, radeon_r4xx_atom, int, 0444);
183
184MODULE_PARM_DESC(vramlimit, "Restrict VRAM for testing");
185module_param_named(vramlimit, radeon_vram_limit, int, 0600);
186
187MODULE_PARM_DESC(agpmode, "AGP Mode (-1 == PCI)");
188module_param_named(agpmode, radeon_agpmode, int, 0444);
189
Alex Deucheredcd26e2013-07-05 17:16:51 -0400190MODULE_PARM_DESC(gartsize, "Size of PCIE/IGP gart to setup in megabytes (32, 64, etc., -1 = auto)");
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200191module_param_named(gartsize, radeon_gart_size, int, 0600);
192
193MODULE_PARM_DESC(benchmark, "Run benchmark");
194module_param_named(benchmark, radeon_benchmarking, int, 0444);
195
Michel Dänzerecc0b322009-07-21 11:23:57 +0200196MODULE_PARM_DESC(test, "Run tests");
197module_param_named(test, radeon_testing, int, 0444);
198
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200199MODULE_PARM_DESC(connector_table, "Force connector table");
200module_param_named(connector_table, radeon_connector_table, int, 0444);
Dave Airlie4ce001a2009-08-13 16:32:14 +1000201
202MODULE_PARM_DESC(tv, "TV enable (0 = disable)");
203module_param_named(tv, radeon_tv, int, 0444);
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200204
Alex Deucher108dc8e2013-10-14 13:17:50 -0400205MODULE_PARM_DESC(audio, "Audio enable (-1 = auto, 0 = disable, 1 = enable)");
Christian Koenigdafc3bd2009-10-11 23:49:13 +0200206module_param_named(audio, radeon_audio, int, 0444);
207
Alex Deucherf46c0122010-03-31 00:33:27 -0400208MODULE_PARM_DESC(disp_priority, "Display Priority (0 = auto, 1 = normal, 2 = high)");
209module_param_named(disp_priority, radeon_disp_priority, int, 0444);
210
Alex Deuchere2b0a8e2010-03-17 02:07:37 -0400211MODULE_PARM_DESC(hw_i2c, "hw i2c engine enable (0 = disable)");
212module_param_named(hw_i2c, radeon_hw_i2c, int, 0444);
213
Dave Airlie197bbb32012-06-27 08:35:54 +0100214MODULE_PARM_DESC(pcie_gen2, "PCIE Gen2 mode (-1 = auto, 0 = disable, 1 = enable)");
Alex Deucherd42dd572011-01-12 20:05:11 -0500215module_param_named(pcie_gen2, radeon_pcie_gen2, int, 0444);
216
Alex Deuchera18cee12011-11-01 14:20:30 -0400217MODULE_PARM_DESC(msi, "MSI support (1 = enable, 0 = disable, -1 = auto)");
218module_param_named(msi, radeon_msi, int, 0444);
219
Christian König3368ff02012-05-02 15:11:21 +0200220MODULE_PARM_DESC(lockup_timeout, "GPU lockup timeout in ms (defaul 10000 = 10 seconds, 0 = disable)");
221module_param_named(lockup_timeout, radeon_lockup_timeout, int, 0444);
222
Samuel Lia0a53aa2013-04-08 17:25:47 -0400223MODULE_PARM_DESC(fastfb, "Direct FB access for IGP chips (0 = disable, 1 = enable)");
224module_param_named(fastfb, radeon_fastfb, int, 0444);
225
Alex Deucherda321c82013-04-12 13:55:22 -0400226MODULE_PARM_DESC(dpm, "DPM support (1 = enable, 0 = disable, -1 = auto)");
227module_param_named(dpm, radeon_dpm, int, 0444);
228
Alex Deucher1294d4a2013-07-16 15:58:50 -0400229MODULE_PARM_DESC(aspm, "ASPM support (1 = enable, 0 = disable, -1 = auto)");
230module_param_named(aspm, radeon_aspm, int, 0444);
231
Dave Airlie10ebc0b2012-09-17 14:40:31 +1000232MODULE_PARM_DESC(runpm, "PX runtime pm (1 = force enable, 0 = disable, -1 = PX only default)");
233module_param_named(runpm, radeon_runtime_pm, int, 0444);
234
Alex Deucher363eb0b2014-01-08 17:55:08 -0500235MODULE_PARM_DESC(hard_reset, "PCI config reset (1 = force enable, 0 = disable (default))");
236module_param_named(hard_reset, radeon_hard_reset, int, 0444);
237
Christian König14adc892013-01-21 13:58:46 +0100238static struct pci_device_id pciidlist[] = {
239 radeon_PCI_IDS
240};
241
242MODULE_DEVICE_TABLE(pci, pciidlist);
243
244#ifdef CONFIG_DRM_RADEON_UMS
245
Jesse Barnes0a3e67a2008-09-30 12:14:26 -0700246static int radeon_suspend(struct drm_device *dev, pm_message_t state)
247{
248 drm_radeon_private_t *dev_priv = dev->dev_private;
249
Dave Airlie03efb882009-03-10 18:36:38 +1000250 if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_R600)
251 return 0;
252
Jesse Barnes0a3e67a2008-09-30 12:14:26 -0700253 /* Disable *all* interrupts */
Alex Deucher800b6992009-03-06 11:47:54 -0500254 if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_RS600)
Jesse Barnes0a3e67a2008-09-30 12:14:26 -0700255 RADEON_WRITE(R500_DxMODE_INT_MASK, 0);
256 RADEON_WRITE(RADEON_GEN_INT_CNTL, 0);
257 return 0;
258}
259
260static int radeon_resume(struct drm_device *dev)
261{
262 drm_radeon_private_t *dev_priv = dev->dev_private;
263
Dave Airlie03efb882009-03-10 18:36:38 +1000264 if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_R600)
265 return 0;
266
Jesse Barnes0a3e67a2008-09-30 12:14:26 -0700267 /* Restore interrupt registers */
Alex Deucher800b6992009-03-06 11:47:54 -0500268 if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_RS600)
Jesse Barnes0a3e67a2008-09-30 12:14:26 -0700269 RADEON_WRITE(R500_DxMODE_INT_MASK, dev_priv->r500_disp_irq_reg);
270 RADEON_WRITE(RADEON_GEN_INT_CNTL, dev_priv->irq_enable_reg);
271 return 0;
272}
273
Dave Airlie10ebc0b2012-09-17 14:40:31 +1000274
Arjan van de Vene08e96d2011-10-31 07:28:57 -0700275static const struct file_operations radeon_driver_old_fops = {
276 .owner = THIS_MODULE,
277 .open = drm_open,
278 .release = drm_release,
279 .unlocked_ioctl = drm_ioctl,
280 .mmap = drm_mmap,
281 .poll = drm_poll,
Arjan van de Vene08e96d2011-10-31 07:28:57 -0700282 .read = drm_read,
283#ifdef CONFIG_COMPAT
284 .compat_ioctl = radeon_compat_ioctl,
285#endif
286 .llseek = noop_llseek,
287};
288
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200289static struct drm_driver driver_old = {
Dave Airlieb5e89ed2005-09-25 14:28:13 +1000290 .driver_features =
Daniel Vetter28185642013-08-08 15:41:27 +0200291 DRIVER_USE_AGP | DRIVER_PCI_DMA | DRIVER_SG |
Jesse Barnes0a3e67a2008-09-30 12:14:26 -0700292 DRIVER_HAVE_IRQ | DRIVER_HAVE_DMA | DRIVER_IRQ_SHARED,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700293 .dev_priv_size = sizeof(drm_radeon_buf_priv_t),
Dave Airlie22eae942005-11-10 22:16:34 +1100294 .load = radeon_driver_load,
295 .firstopen = radeon_driver_firstopen,
296 .open = radeon_driver_open,
297 .preclose = radeon_driver_preclose,
298 .postclose = radeon_driver_postclose,
299 .lastclose = radeon_driver_lastclose,
300 .unload = radeon_driver_unload,
Jesse Barnes0a3e67a2008-09-30 12:14:26 -0700301 .suspend = radeon_suspend,
302 .resume = radeon_resume,
303 .get_vblank_counter = radeon_get_vblank_counter,
304 .enable_vblank = radeon_enable_vblank,
305 .disable_vblank = radeon_disable_vblank,
Dave Airlie60f2ee02008-12-19 10:22:02 +1100306 .master_create = radeon_master_create,
307 .master_destroy = radeon_master_destroy,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700308 .irq_preinstall = radeon_driver_irq_preinstall,
309 .irq_postinstall = radeon_driver_irq_postinstall,
310 .irq_uninstall = radeon_driver_irq_uninstall,
311 .irq_handler = radeon_driver_irq_handler,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700312 .ioctls = radeon_ioctls,
313 .dma_ioctl = radeon_cp_buffers,
Arjan van de Vene08e96d2011-10-31 07:28:57 -0700314 .fops = &radeon_driver_old_fops,
Dave Airlie22eae942005-11-10 22:16:34 +1100315 .name = DRIVER_NAME,
316 .desc = DRIVER_DESC,
317 .date = DRIVER_DATE,
318 .major = DRIVER_MAJOR,
319 .minor = DRIVER_MINOR,
320 .patchlevel = DRIVER_PATCHLEVEL,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700321};
322
Christian König14adc892013-01-21 13:58:46 +0100323#endif
324
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200325static struct drm_driver kms_driver;
326
Tommi Rantala30238152012-11-09 09:19:39 +0000327static int radeon_kick_out_firmware_fb(struct pci_dev *pdev)
Benjamin Herrenschmidta56f7422010-10-06 16:39:07 +0000328{
329 struct apertures_struct *ap;
330 bool primary = false;
331
332 ap = alloc_apertures(1);
Tommi Rantala30238152012-11-09 09:19:39 +0000333 if (!ap)
334 return -ENOMEM;
335
Benjamin Herrenschmidta56f7422010-10-06 16:39:07 +0000336 ap->ranges[0].base = pci_resource_start(pdev, 0);
337 ap->ranges[0].size = pci_resource_len(pdev, 0);
338
339#ifdef CONFIG_X86
340 primary = pdev->resource[PCI_ROM_RESOURCE].flags & IORESOURCE_ROM_SHADOW;
341#endif
342 remove_conflicting_framebuffers(ap, "radeondrmfb", primary);
343 kfree(ap);
Tommi Rantala30238152012-11-09 09:19:39 +0000344
345 return 0;
Benjamin Herrenschmidta56f7422010-10-06 16:39:07 +0000346}
347
Greg Kroah-Hartman56550d92012-12-21 15:09:25 -0800348static int radeon_pci_probe(struct pci_dev *pdev,
349 const struct pci_device_id *ent)
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200350{
Tommi Rantala30238152012-11-09 09:19:39 +0000351 int ret;
352
Benjamin Herrenschmidta56f7422010-10-06 16:39:07 +0000353 /* Get rid of things like offb */
Tommi Rantala30238152012-11-09 09:19:39 +0000354 ret = radeon_kick_out_firmware_fb(pdev);
355 if (ret)
356 return ret;
Benjamin Herrenschmidta56f7422010-10-06 16:39:07 +0000357
Jordan Crousedcdb1672010-05-27 13:40:25 -0600358 return drm_get_pci_dev(pdev, ent, &kms_driver);
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200359}
360
361static void
362radeon_pci_remove(struct pci_dev *pdev)
363{
364 struct drm_device *dev = pci_get_drvdata(pdev);
365
366 drm_put_dev(dev);
367}
368
Dave Airlie7473e832012-09-13 12:02:30 +1000369static int radeon_pmops_suspend(struct device *dev)
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200370{
Dave Airlie7473e832012-09-13 12:02:30 +1000371 struct pci_dev *pdev = to_pci_dev(dev);
372 struct drm_device *drm_dev = pci_get_drvdata(pdev);
Dave Airlie10ebc0b2012-09-17 14:40:31 +1000373 return radeon_suspend_kms(drm_dev, true, true);
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200374}
375
Dave Airlie7473e832012-09-13 12:02:30 +1000376static int radeon_pmops_resume(struct device *dev)
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200377{
Dave Airlie7473e832012-09-13 12:02:30 +1000378 struct pci_dev *pdev = to_pci_dev(dev);
379 struct drm_device *drm_dev = pci_get_drvdata(pdev);
Dave Airlie10ebc0b2012-09-17 14:40:31 +1000380 return radeon_resume_kms(drm_dev, true, true);
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200381}
382
Dave Airlie7473e832012-09-13 12:02:30 +1000383static int radeon_pmops_freeze(struct device *dev)
384{
385 struct pci_dev *pdev = to_pci_dev(dev);
386 struct drm_device *drm_dev = pci_get_drvdata(pdev);
Dave Airlie10ebc0b2012-09-17 14:40:31 +1000387 return radeon_suspend_kms(drm_dev, false, true);
Dave Airlie7473e832012-09-13 12:02:30 +1000388}
389
390static int radeon_pmops_thaw(struct device *dev)
391{
392 struct pci_dev *pdev = to_pci_dev(dev);
393 struct drm_device *drm_dev = pci_get_drvdata(pdev);
Dave Airlie10ebc0b2012-09-17 14:40:31 +1000394 return radeon_resume_kms(drm_dev, false, true);
395}
396
397static int radeon_pmops_runtime_suspend(struct device *dev)
398{
399 struct pci_dev *pdev = to_pci_dev(dev);
400 struct drm_device *drm_dev = pci_get_drvdata(pdev);
401 int ret;
402
403 if (radeon_runtime_pm == 0)
404 return -EINVAL;
405
406 drm_dev->switch_power_state = DRM_SWITCH_POWER_CHANGING;
407 drm_kms_helper_poll_disable(drm_dev);
408 vga_switcheroo_set_dynamic_switch(pdev, VGA_SWITCHEROO_OFF);
409
410 ret = radeon_suspend_kms(drm_dev, false, false);
411 pci_save_state(pdev);
412 pci_disable_device(pdev);
413 pci_set_power_state(pdev, PCI_D3cold);
414 drm_dev->switch_power_state = DRM_SWITCH_POWER_DYNAMIC_OFF;
415
416 return 0;
417}
418
419static int radeon_pmops_runtime_resume(struct device *dev)
420{
421 struct pci_dev *pdev = to_pci_dev(dev);
422 struct drm_device *drm_dev = pci_get_drvdata(pdev);
423 int ret;
424
425 if (radeon_runtime_pm == 0)
426 return -EINVAL;
427
428 drm_dev->switch_power_state = DRM_SWITCH_POWER_CHANGING;
429
430 pci_set_power_state(pdev, PCI_D0);
431 pci_restore_state(pdev);
432 ret = pci_enable_device(pdev);
433 if (ret)
434 return ret;
435 pci_set_master(pdev);
436
437 ret = radeon_resume_kms(drm_dev, false, false);
438 drm_kms_helper_poll_enable(drm_dev);
439 vga_switcheroo_set_dynamic_switch(pdev, VGA_SWITCHEROO_ON);
440 drm_dev->switch_power_state = DRM_SWITCH_POWER_ON;
441 return 0;
442}
443
444static int radeon_pmops_runtime_idle(struct device *dev)
445{
446 struct pci_dev *pdev = to_pci_dev(dev);
447 struct drm_device *drm_dev = pci_get_drvdata(pdev);
448 struct drm_crtc *crtc;
449
450 if (radeon_runtime_pm == 0)
451 return -EBUSY;
452
453 /* are we PX enabled? */
454 if (radeon_runtime_pm == -1 && !radeon_is_px()) {
455 DRM_DEBUG_DRIVER("failing to power off - not px\n");
456 return -EBUSY;
457 }
458
459 list_for_each_entry(crtc, &drm_dev->mode_config.crtc_list, head) {
460 if (crtc->enabled) {
461 DRM_DEBUG_DRIVER("failing to power off - crtc active\n");
462 return -EBUSY;
463 }
464 }
465
466 pm_runtime_mark_last_busy(dev);
467 pm_runtime_autosuspend(dev);
468 /* we don't want the main rpm_idle to call suspend - we want to autosuspend */
469 return 1;
470}
471
472long radeon_drm_ioctl(struct file *filp,
473 unsigned int cmd, unsigned long arg)
474{
475 struct drm_file *file_priv = filp->private_data;
476 struct drm_device *dev;
477 long ret;
478 dev = file_priv->minor->dev;
479 ret = pm_runtime_get_sync(dev->dev);
480 if (ret < 0)
481 return ret;
482
483 ret = drm_ioctl(filp, cmd, arg);
484
485 pm_runtime_mark_last_busy(dev->dev);
486 pm_runtime_put_autosuspend(dev->dev);
487 return ret;
Dave Airlie7473e832012-09-13 12:02:30 +1000488}
489
490static const struct dev_pm_ops radeon_pm_ops = {
491 .suspend = radeon_pmops_suspend,
492 .resume = radeon_pmops_resume,
493 .freeze = radeon_pmops_freeze,
494 .thaw = radeon_pmops_thaw,
495 .poweroff = radeon_pmops_freeze,
496 .restore = radeon_pmops_resume,
Dave Airlie10ebc0b2012-09-17 14:40:31 +1000497 .runtime_suspend = radeon_pmops_runtime_suspend,
498 .runtime_resume = radeon_pmops_runtime_resume,
499 .runtime_idle = radeon_pmops_runtime_idle,
Dave Airlie7473e832012-09-13 12:02:30 +1000500};
501
Arjan van de Vene08e96d2011-10-31 07:28:57 -0700502static const struct file_operations radeon_driver_kms_fops = {
503 .owner = THIS_MODULE,
504 .open = drm_open,
505 .release = drm_release,
Dave Airlie10ebc0b2012-09-17 14:40:31 +1000506 .unlocked_ioctl = radeon_drm_ioctl,
Arjan van de Vene08e96d2011-10-31 07:28:57 -0700507 .mmap = radeon_mmap,
508 .poll = drm_poll,
Arjan van de Vene08e96d2011-10-31 07:28:57 -0700509 .read = drm_read,
510#ifdef CONFIG_COMPAT
511 .compat_ioctl = radeon_kms_compat_ioctl,
512#endif
513};
514
Markus Trippelsdorf846ae412013-10-23 17:07:30 -0400515
516static void
517radeon_pci_shutdown(struct pci_dev *pdev)
518{
519 struct drm_device *dev = pci_get_drvdata(pdev);
520
521 radeon_driver_unload_kms(dev);
522}
523
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200524static struct drm_driver kms_driver = {
525 .driver_features =
Daniel Vetter28185642013-08-08 15:41:27 +0200526 DRIVER_USE_AGP |
Daniel Vetter81e95692013-07-10 14:11:49 +0200527 DRIVER_HAVE_IRQ | DRIVER_IRQ_SHARED | DRIVER_GEM |
Christian Königf33bcab2013-08-25 18:29:03 +0200528 DRIVER_PRIME | DRIVER_RENDER,
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200529 .dev_priv_size = 0,
530 .load = radeon_driver_load_kms,
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200531 .open = radeon_driver_open_kms,
532 .preclose = radeon_driver_preclose_kms,
533 .postclose = radeon_driver_postclose_kms,
534 .lastclose = radeon_driver_lastclose_kms,
535 .unload = radeon_driver_unload_kms,
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200536 .get_vblank_counter = radeon_get_vblank_counter_kms,
537 .enable_vblank = radeon_enable_vblank_kms,
538 .disable_vblank = radeon_disable_vblank_kms,
Mario Kleinerf5a80202010-10-23 04:42:17 +0200539 .get_vblank_timestamp = radeon_get_vblank_timestamp_kms,
540 .get_scanout_position = radeon_get_crtc_scanoutpos,
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200541#if defined(CONFIG_DEBUG_FS)
542 .debugfs_init = radeon_debugfs_init,
543 .debugfs_cleanup = radeon_debugfs_cleanup,
544#endif
545 .irq_preinstall = radeon_driver_irq_preinstall_kms,
546 .irq_postinstall = radeon_driver_irq_postinstall_kms,
547 .irq_uninstall = radeon_driver_irq_uninstall_kms,
548 .irq_handler = radeon_driver_irq_handler_kms,
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200549 .ioctls = radeon_ioctls_kms,
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200550 .gem_free_object = radeon_gem_object_free,
Jerome Glisse721604a2012-01-05 22:11:05 -0500551 .gem_open_object = radeon_gem_object_open,
552 .gem_close_object = radeon_gem_object_close,
Dave Airlieff72145b2011-02-07 12:16:14 +1000553 .dumb_create = radeon_mode_dumb_create,
554 .dumb_map_offset = radeon_mode_dumb_mmap,
Daniel Vetter43387b32013-07-16 09:12:04 +0200555 .dumb_destroy = drm_gem_dumb_destroy,
Arjan van de Vene08e96d2011-10-31 07:28:57 -0700556 .fops = &radeon_driver_kms_fops,
Alex Deucher40f5cf92012-05-10 18:33:13 -0400557
558 .prime_handle_to_fd = drm_gem_prime_handle_to_fd,
559 .prime_fd_to_handle = drm_gem_prime_fd_to_handle,
Aaron Plattner1e6d17a2013-01-15 20:47:44 +0000560 .gem_prime_export = drm_gem_prime_export,
561 .gem_prime_import = drm_gem_prime_import,
562 .gem_prime_pin = radeon_gem_prime_pin,
Maarten Lankhorst280cf212013-06-27 13:38:18 +0200563 .gem_prime_unpin = radeon_gem_prime_unpin,
Aaron Plattner1e6d17a2013-01-15 20:47:44 +0000564 .gem_prime_get_sg_table = radeon_gem_prime_get_sg_table,
565 .gem_prime_import_sg_table = radeon_gem_prime_import_sg_table,
566 .gem_prime_vmap = radeon_gem_prime_vmap,
567 .gem_prime_vunmap = radeon_gem_prime_vunmap,
Alex Deucher40f5cf92012-05-10 18:33:13 -0400568
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200569 .name = DRIVER_NAME,
570 .desc = DRIVER_DESC,
571 .date = DRIVER_DATE,
572 .major = KMS_DRIVER_MAJOR,
573 .minor = KMS_DRIVER_MINOR,
574 .patchlevel = KMS_DRIVER_PATCHLEVEL,
575};
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200576
577static struct drm_driver *driver;
Dave Airlie8410ea32010-12-15 03:16:38 +1000578static struct pci_driver *pdriver;
579
Christian König14adc892013-01-21 13:58:46 +0100580#ifdef CONFIG_DRM_RADEON_UMS
Dave Airlie8410ea32010-12-15 03:16:38 +1000581static struct pci_driver radeon_pci_driver = {
582 .name = DRIVER_NAME,
583 .id_table = pciidlist,
584};
Christian König14adc892013-01-21 13:58:46 +0100585#endif
Dave Airlie8410ea32010-12-15 03:16:38 +1000586
587static struct pci_driver radeon_kms_pci_driver = {
588 .name = DRIVER_NAME,
589 .id_table = pciidlist,
590 .probe = radeon_pci_probe,
591 .remove = radeon_pci_remove,
Dave Airlie7473e832012-09-13 12:02:30 +1000592 .driver.pm = &radeon_pm_ops,
Markus Trippelsdorf846ae412013-10-23 17:07:30 -0400593 .shutdown = radeon_pci_shutdown,
Dave Airlie8410ea32010-12-15 03:16:38 +1000594};
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200595
Linus Torvalds1da177e2005-04-16 15:20:36 -0700596static int __init radeon_init(void)
597{
Dave Airliee9ced8e2013-05-15 01:23:36 +0000598#ifdef CONFIG_VGA_CONSOLE
599 if (vgacon_text_force() && radeon_modeset == -1) {
600 DRM_INFO("VGACON disable radeon kernel modesetting.\n");
601 radeon_modeset = 0;
602 }
603#endif
604 /* set to modesetting by default if not nomodeset */
605 if (radeon_modeset == -1)
606 radeon_modeset = 1;
607
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200608 if (radeon_modeset == 1) {
609 DRM_INFO("radeon kernel modesetting enabled.\n");
610 driver = &kms_driver;
Dave Airlie8410ea32010-12-15 03:16:38 +1000611 pdriver = &radeon_kms_pci_driver;
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200612 driver->driver_features |= DRIVER_MODESET;
613 driver->num_ioctls = radeon_max_kms_ioctl;
Dave Airlie6a9ee8a2010-02-01 15:38:10 +1000614 radeon_register_atpx_handler();
Christian König14adc892013-01-21 13:58:46 +0100615
616 } else {
617#ifdef CONFIG_DRM_RADEON_UMS
618 DRM_INFO("radeon userspace modesetting enabled.\n");
619 driver = &driver_old;
620 pdriver = &radeon_pci_driver;
621 driver->driver_features &= ~DRIVER_MODESET;
622 driver->num_ioctls = radeon_max_ioctl;
623#else
624 DRM_ERROR("No UMS support in radeon module!\n");
625 return -EINVAL;
626#endif
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200627 }
Christian König14adc892013-01-21 13:58:46 +0100628
629 /* let modprobe override vga console setting */
Dave Airlie8410ea32010-12-15 03:16:38 +1000630 return drm_pci_init(driver, pdriver);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700631}
632
633static void __exit radeon_exit(void)
634{
Dave Airlie8410ea32010-12-15 03:16:38 +1000635 drm_pci_exit(driver, pdriver);
Dave Airlie6a9ee8a2010-02-01 15:38:10 +1000636 radeon_unregister_atpx_handler();
Linus Torvalds1da177e2005-04-16 15:20:36 -0700637}
638
Jerome Glisse176f6132009-06-22 18:16:13 +0200639module_init(radeon_init);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700640module_exit(radeon_exit);
641
Dave Airlieb5e89ed2005-09-25 14:28:13 +1000642MODULE_AUTHOR(DRIVER_AUTHOR);
643MODULE_DESCRIPTION(DRIVER_DESC);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700644MODULE_LICENSE("GPL and additional rights");