blob: 29ed785f1dc22699962ea15904118c3fee314207 [file] [log] [blame]
Yuval Mintz32a47e72016-05-11 16:36:12 +03001/* QLogic qed NIC Driver
Mintz, Yuvale8f1cb52017-01-01 13:57:00 +02002 * Copyright (c) 2015-2017 QLogic Corporation
Yuval Mintz32a47e72016-05-11 16:36:12 +03003 *
Mintz, Yuvale8f1cb52017-01-01 13:57:00 +02004 * This software is available to you under a choice of one of two
5 * licenses. You may choose to be licensed under the terms of the GNU
6 * General Public License (GPL) Version 2, available from the file
7 * COPYING in the main directory of this source tree, or the
8 * OpenIB.org BSD license below:
9 *
10 * Redistribution and use in source and binary forms, with or
11 * without modification, are permitted provided that the following
12 * conditions are met:
13 *
14 * - Redistributions of source code must retain the above
15 * copyright notice, this list of conditions and the following
16 * disclaimer.
17 *
18 * - Redistributions in binary form must reproduce the above
19 * copyright notice, this list of conditions and the following
20 * disclaimer in the documentation and /or other materials
21 * provided with the distribution.
22 *
23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
24 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
25 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
26 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
27 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
28 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
29 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
30 * SOFTWARE.
Yuval Mintz32a47e72016-05-11 16:36:12 +030031 */
32
Yuval Mintzdacd88d2016-05-11 16:36:16 +030033#include <linux/etherdevice.h>
Yuval Mintz36558c32016-05-11 16:36:17 +030034#include <linux/crc32.h>
Mintz, Yuvalf29ffdb2017-01-01 13:57:07 +020035#include <linux/vmalloc.h>
Yuval Mintz0b55e272016-05-11 16:36:15 +030036#include <linux/qed/qed_iov_if.h>
Yuval Mintz1408cc1f2016-05-11 16:36:14 +030037#include "qed_cxt.h"
38#include "qed_hsi.h"
Yuval Mintz32a47e72016-05-11 16:36:12 +030039#include "qed_hw.h"
Yuval Mintz1408cc1f2016-05-11 16:36:14 +030040#include "qed_init_ops.h"
Yuval Mintz32a47e72016-05-11 16:36:12 +030041#include "qed_int.h"
Yuval Mintz1408cc1f2016-05-11 16:36:14 +030042#include "qed_mcp.h"
Yuval Mintz32a47e72016-05-11 16:36:12 +030043#include "qed_reg_addr.h"
Yuval Mintz1408cc1f2016-05-11 16:36:14 +030044#include "qed_sp.h"
Yuval Mintz32a47e72016-05-11 16:36:12 +030045#include "qed_sriov.h"
46#include "qed_vf.h"
47
Yuval Mintz1408cc1f2016-05-11 16:36:14 +030048/* IOV ramrods */
Yuval Mintz1fe614d2016-06-05 13:11:11 +030049static int qed_sp_vf_start(struct qed_hwfn *p_hwfn, struct qed_vf_info *p_vf)
Yuval Mintz1408cc1f2016-05-11 16:36:14 +030050{
51 struct vf_start_ramrod_data *p_ramrod = NULL;
52 struct qed_spq_entry *p_ent = NULL;
53 struct qed_sp_init_data init_data;
54 int rc = -EINVAL;
Yuval Mintz1fe614d2016-06-05 13:11:11 +030055 u8 fp_minor;
Yuval Mintz1408cc1f2016-05-11 16:36:14 +030056
57 /* Get SPQ entry */
58 memset(&init_data, 0, sizeof(init_data));
59 init_data.cid = qed_spq_get_cid(p_hwfn);
Yuval Mintz1fe614d2016-06-05 13:11:11 +030060 init_data.opaque_fid = p_vf->opaque_fid;
Yuval Mintz1408cc1f2016-05-11 16:36:14 +030061 init_data.comp_mode = QED_SPQ_MODE_EBLOCK;
62
63 rc = qed_sp_init_request(p_hwfn, &p_ent,
64 COMMON_RAMROD_VF_START,
65 PROTOCOLID_COMMON, &init_data);
66 if (rc)
67 return rc;
68
69 p_ramrod = &p_ent->ramrod.vf_start;
70
Yuval Mintz1fe614d2016-06-05 13:11:11 +030071 p_ramrod->vf_id = GET_FIELD(p_vf->concrete_fid, PXP_CONCRETE_FID_VFID);
72 p_ramrod->opaque_fid = cpu_to_le16(p_vf->opaque_fid);
Yuval Mintz1408cc1f2016-05-11 16:36:14 +030073
Yuval Mintz1fe614d2016-06-05 13:11:11 +030074 switch (p_hwfn->hw_info.personality) {
75 case QED_PCI_ETH:
76 p_ramrod->personality = PERSONALITY_ETH;
77 break;
78 case QED_PCI_ETH_ROCE:
79 p_ramrod->personality = PERSONALITY_RDMA_AND_ETH;
80 break;
81 default:
82 DP_NOTICE(p_hwfn, "Unknown VF personality %d\n",
83 p_hwfn->hw_info.personality);
84 return -EINVAL;
85 }
86
87 fp_minor = p_vf->acquire.vfdev_info.eth_fp_hsi_minor;
Yuval Mintza044df82016-08-22 13:25:09 +030088 if (fp_minor > ETH_HSI_VER_MINOR &&
89 fp_minor != ETH_HSI_VER_NO_PKT_LEN_TUNN) {
Yuval Mintz1fe614d2016-06-05 13:11:11 +030090 DP_VERBOSE(p_hwfn,
91 QED_MSG_IOV,
92 "VF [%d] - Requested fp hsi %02x.%02x which is slightly newer than PF's %02x.%02x; Configuring PFs version\n",
93 p_vf->abs_vf_id,
94 ETH_HSI_VER_MAJOR,
95 fp_minor, ETH_HSI_VER_MAJOR, ETH_HSI_VER_MINOR);
96 fp_minor = ETH_HSI_VER_MINOR;
97 }
98
Yuval Mintz351a4ded2016-06-02 10:23:29 +030099 p_ramrod->hsi_fp_ver.major_ver_arr[ETH_VER_KEY] = ETH_HSI_VER_MAJOR;
Yuval Mintz1fe614d2016-06-05 13:11:11 +0300100 p_ramrod->hsi_fp_ver.minor_ver_arr[ETH_VER_KEY] = fp_minor;
101
102 DP_VERBOSE(p_hwfn, QED_MSG_IOV,
103 "VF[%d] - Starting using HSI %02x.%02x\n",
104 p_vf->abs_vf_id, ETH_HSI_VER_MAJOR, fp_minor);
Yuval Mintz1408cc1f2016-05-11 16:36:14 +0300105
106 return qed_spq_post(p_hwfn, p_ent, NULL);
107}
108
Yuval Mintz0b55e272016-05-11 16:36:15 +0300109static int qed_sp_vf_stop(struct qed_hwfn *p_hwfn,
110 u32 concrete_vfid, u16 opaque_vfid)
111{
112 struct vf_stop_ramrod_data *p_ramrod = NULL;
113 struct qed_spq_entry *p_ent = NULL;
114 struct qed_sp_init_data init_data;
115 int rc = -EINVAL;
116
117 /* Get SPQ entry */
118 memset(&init_data, 0, sizeof(init_data));
119 init_data.cid = qed_spq_get_cid(p_hwfn);
120 init_data.opaque_fid = opaque_vfid;
121 init_data.comp_mode = QED_SPQ_MODE_EBLOCK;
122
123 rc = qed_sp_init_request(p_hwfn, &p_ent,
124 COMMON_RAMROD_VF_STOP,
125 PROTOCOLID_COMMON, &init_data);
126 if (rc)
127 return rc;
128
129 p_ramrod = &p_ent->ramrod.vf_stop;
130
131 p_ramrod->vf_id = GET_FIELD(concrete_vfid, PXP_CONCRETE_FID_VFID);
132
133 return qed_spq_post(p_hwfn, p_ent, NULL);
134}
135
Baoyou Xieba569472016-09-09 09:21:15 +0800136static bool qed_iov_is_valid_vfid(struct qed_hwfn *p_hwfn,
Yuval Mintz7eff82b2016-10-14 05:19:22 -0400137 int rel_vf_id,
138 bool b_enabled_only, bool b_non_malicious)
Yuval Mintz32a47e72016-05-11 16:36:12 +0300139{
140 if (!p_hwfn->pf_iov_info) {
141 DP_NOTICE(p_hwfn->cdev, "No iov info\n");
142 return false;
143 }
144
145 if ((rel_vf_id >= p_hwfn->cdev->p_iov_info->total_vfs) ||
146 (rel_vf_id < 0))
147 return false;
148
149 if ((!p_hwfn->pf_iov_info->vfs_array[rel_vf_id].b_init) &&
150 b_enabled_only)
151 return false;
152
Yuval Mintz7eff82b2016-10-14 05:19:22 -0400153 if ((p_hwfn->pf_iov_info->vfs_array[rel_vf_id].b_malicious) &&
154 b_non_malicious)
155 return false;
156
Yuval Mintz32a47e72016-05-11 16:36:12 +0300157 return true;
158}
159
Yuval Mintz37bff2b2016-05-11 16:36:13 +0300160static struct qed_vf_info *qed_iov_get_vf_info(struct qed_hwfn *p_hwfn,
161 u16 relative_vf_id,
162 bool b_enabled_only)
163{
164 struct qed_vf_info *vf = NULL;
165
166 if (!p_hwfn->pf_iov_info) {
167 DP_NOTICE(p_hwfn->cdev, "No iov info\n");
168 return NULL;
169 }
170
Yuval Mintz7eff82b2016-10-14 05:19:22 -0400171 if (qed_iov_is_valid_vfid(p_hwfn, relative_vf_id,
172 b_enabled_only, false))
Yuval Mintz37bff2b2016-05-11 16:36:13 +0300173 vf = &p_hwfn->pf_iov_info->vfs_array[relative_vf_id];
174 else
175 DP_ERR(p_hwfn, "qed_iov_get_vf_info: VF[%d] is not enabled\n",
176 relative_vf_id);
177
178 return vf;
179}
180
Yuval Mintz41086462016-06-05 13:11:13 +0300181static bool qed_iov_validate_rxq(struct qed_hwfn *p_hwfn,
182 struct qed_vf_info *p_vf, u16 rx_qid)
183{
184 if (rx_qid >= p_vf->num_rxqs)
185 DP_VERBOSE(p_hwfn,
186 QED_MSG_IOV,
187 "VF[0x%02x] - can't touch Rx queue[%04x]; Only 0x%04x are allocated\n",
188 p_vf->abs_vf_id, rx_qid, p_vf->num_rxqs);
189 return rx_qid < p_vf->num_rxqs;
190}
191
192static bool qed_iov_validate_txq(struct qed_hwfn *p_hwfn,
193 struct qed_vf_info *p_vf, u16 tx_qid)
194{
195 if (tx_qid >= p_vf->num_txqs)
196 DP_VERBOSE(p_hwfn,
197 QED_MSG_IOV,
198 "VF[0x%02x] - can't touch Tx queue[%04x]; Only 0x%04x are allocated\n",
199 p_vf->abs_vf_id, tx_qid, p_vf->num_txqs);
200 return tx_qid < p_vf->num_txqs;
201}
202
203static bool qed_iov_validate_sb(struct qed_hwfn *p_hwfn,
204 struct qed_vf_info *p_vf, u16 sb_idx)
205{
206 int i;
207
208 for (i = 0; i < p_vf->num_sbs; i++)
209 if (p_vf->igu_sbs[i] == sb_idx)
210 return true;
211
212 DP_VERBOSE(p_hwfn,
213 QED_MSG_IOV,
214 "VF[0%02x] - tried using sb_idx %04x which doesn't exist as one of its 0x%02x SBs\n",
215 p_vf->abs_vf_id, sb_idx, p_vf->num_sbs);
216
217 return false;
218}
219
Baoyou Xieba569472016-09-09 09:21:15 +0800220static int qed_iov_post_vf_bulletin(struct qed_hwfn *p_hwfn,
221 int vfid, struct qed_ptt *p_ptt)
Yuval Mintz36558c32016-05-11 16:36:17 +0300222{
223 struct qed_bulletin_content *p_bulletin;
224 int crc_size = sizeof(p_bulletin->crc);
225 struct qed_dmae_params params;
226 struct qed_vf_info *p_vf;
227
228 p_vf = qed_iov_get_vf_info(p_hwfn, (u16) vfid, true);
229 if (!p_vf)
230 return -EINVAL;
231
232 if (!p_vf->vf_bulletin)
233 return -EINVAL;
234
235 p_bulletin = p_vf->bulletin.p_virt;
236
237 /* Increment bulletin board version and compute crc */
238 p_bulletin->version++;
239 p_bulletin->crc = crc32(0, (u8 *)p_bulletin + crc_size,
240 p_vf->bulletin.size - crc_size);
241
242 DP_VERBOSE(p_hwfn, QED_MSG_IOV,
243 "Posting Bulletin 0x%08x to VF[%d] (CRC 0x%08x)\n",
244 p_bulletin->version, p_vf->relative_vf_id, p_bulletin->crc);
245
246 /* propagate bulletin board via dmae to vm memory */
247 memset(&params, 0, sizeof(params));
248 params.flags = QED_DMAE_FLAG_VF_DST;
249 params.dst_vfid = p_vf->abs_vf_id;
250 return qed_dmae_host2host(p_hwfn, p_ptt, p_vf->bulletin.phys,
251 p_vf->vf_bulletin, p_vf->bulletin.size / 4,
252 &params);
253}
254
Yuval Mintz32a47e72016-05-11 16:36:12 +0300255static int qed_iov_pci_cfg_info(struct qed_dev *cdev)
256{
257 struct qed_hw_sriov_info *iov = cdev->p_iov_info;
258 int pos = iov->pos;
259
260 DP_VERBOSE(cdev, QED_MSG_IOV, "sriov ext pos %d\n", pos);
261 pci_read_config_word(cdev->pdev, pos + PCI_SRIOV_CTRL, &iov->ctrl);
262
263 pci_read_config_word(cdev->pdev,
264 pos + PCI_SRIOV_TOTAL_VF, &iov->total_vfs);
265 pci_read_config_word(cdev->pdev,
266 pos + PCI_SRIOV_INITIAL_VF, &iov->initial_vfs);
267
268 pci_read_config_word(cdev->pdev, pos + PCI_SRIOV_NUM_VF, &iov->num_vfs);
269 if (iov->num_vfs) {
270 DP_VERBOSE(cdev,
271 QED_MSG_IOV,
272 "Number of VFs are already set to non-zero value. Ignoring PCI configuration value\n");
273 iov->num_vfs = 0;
274 }
275
276 pci_read_config_word(cdev->pdev,
277 pos + PCI_SRIOV_VF_OFFSET, &iov->offset);
278
279 pci_read_config_word(cdev->pdev,
280 pos + PCI_SRIOV_VF_STRIDE, &iov->stride);
281
282 pci_read_config_word(cdev->pdev,
283 pos + PCI_SRIOV_VF_DID, &iov->vf_device_id);
284
285 pci_read_config_dword(cdev->pdev,
286 pos + PCI_SRIOV_SUP_PGSIZE, &iov->pgsz);
287
288 pci_read_config_dword(cdev->pdev, pos + PCI_SRIOV_CAP, &iov->cap);
289
290 pci_read_config_byte(cdev->pdev, pos + PCI_SRIOV_FUNC_LINK, &iov->link);
291
292 DP_VERBOSE(cdev,
293 QED_MSG_IOV,
294 "IOV info: nres %d, cap 0x%x, ctrl 0x%x, total %d, initial %d, num vfs %d, offset %d, stride %d, page size 0x%x\n",
295 iov->nres,
296 iov->cap,
297 iov->ctrl,
298 iov->total_vfs,
299 iov->initial_vfs,
300 iov->nr_virtfn, iov->offset, iov->stride, iov->pgsz);
301
302 /* Some sanity checks */
303 if (iov->num_vfs > NUM_OF_VFS(cdev) ||
304 iov->total_vfs > NUM_OF_VFS(cdev)) {
305 /* This can happen only due to a bug. In this case we set
306 * num_vfs to zero to avoid memory corruption in the code that
307 * assumes max number of vfs
308 */
309 DP_NOTICE(cdev,
310 "IOV: Unexpected number of vfs set: %d setting num_vf to zero\n",
311 iov->num_vfs);
312
313 iov->num_vfs = 0;
314 iov->total_vfs = 0;
315 }
316
317 return 0;
318}
319
320static void qed_iov_clear_vf_igu_blocks(struct qed_hwfn *p_hwfn,
321 struct qed_ptt *p_ptt)
322{
323 struct qed_igu_block *p_sb;
324 u16 sb_id;
325 u32 val;
326
327 if (!p_hwfn->hw_info.p_igu_info) {
328 DP_ERR(p_hwfn,
329 "qed_iov_clear_vf_igu_blocks IGU Info not initialized\n");
330 return;
331 }
332
333 for (sb_id = 0; sb_id < QED_MAPPING_MEMORY_SIZE(p_hwfn->cdev);
334 sb_id++) {
335 p_sb = &p_hwfn->hw_info.p_igu_info->igu_map.igu_blocks[sb_id];
336 if ((p_sb->status & QED_IGU_STATUS_FREE) &&
337 !(p_sb->status & QED_IGU_STATUS_PF)) {
338 val = qed_rd(p_hwfn, p_ptt,
339 IGU_REG_MAPPING_MEMORY + sb_id * 4);
340 SET_FIELD(val, IGU_MAPPING_LINE_VALID, 0);
341 qed_wr(p_hwfn, p_ptt,
342 IGU_REG_MAPPING_MEMORY + 4 * sb_id, val);
343 }
344 }
345}
346
347static void qed_iov_setup_vfdb(struct qed_hwfn *p_hwfn)
348{
349 struct qed_hw_sriov_info *p_iov = p_hwfn->cdev->p_iov_info;
350 struct qed_pf_iov *p_iov_info = p_hwfn->pf_iov_info;
351 struct qed_bulletin_content *p_bulletin_virt;
352 dma_addr_t req_p, rply_p, bulletin_p;
353 union pfvf_tlvs *p_reply_virt_addr;
354 union vfpf_tlvs *p_req_virt_addr;
355 u8 idx = 0;
356
357 memset(p_iov_info->vfs_array, 0, sizeof(p_iov_info->vfs_array));
358
359 p_req_virt_addr = p_iov_info->mbx_msg_virt_addr;
360 req_p = p_iov_info->mbx_msg_phys_addr;
361 p_reply_virt_addr = p_iov_info->mbx_reply_virt_addr;
362 rply_p = p_iov_info->mbx_reply_phys_addr;
363 p_bulletin_virt = p_iov_info->p_bulletins;
364 bulletin_p = p_iov_info->bulletins_phys;
365 if (!p_req_virt_addr || !p_reply_virt_addr || !p_bulletin_virt) {
366 DP_ERR(p_hwfn,
367 "qed_iov_setup_vfdb called without allocating mem first\n");
368 return;
369 }
370
371 for (idx = 0; idx < p_iov->total_vfs; idx++) {
372 struct qed_vf_info *vf = &p_iov_info->vfs_array[idx];
373 u32 concrete;
374
375 vf->vf_mbx.req_virt = p_req_virt_addr + idx;
376 vf->vf_mbx.req_phys = req_p + idx * sizeof(union vfpf_tlvs);
377 vf->vf_mbx.reply_virt = p_reply_virt_addr + idx;
378 vf->vf_mbx.reply_phys = rply_p + idx * sizeof(union pfvf_tlvs);
379
380 vf->state = VF_STOPPED;
381 vf->b_init = false;
382
383 vf->bulletin.phys = idx *
384 sizeof(struct qed_bulletin_content) +
385 bulletin_p;
386 vf->bulletin.p_virt = p_bulletin_virt + idx;
387 vf->bulletin.size = sizeof(struct qed_bulletin_content);
388
389 vf->relative_vf_id = idx;
390 vf->abs_vf_id = idx + p_iov->first_vf_in_pf;
391 concrete = qed_vfid_to_concrete(p_hwfn, vf->abs_vf_id);
392 vf->concrete_fid = concrete;
393 vf->opaque_fid = (p_hwfn->hw_info.opaque_fid & 0xff) |
394 (vf->abs_vf_id << 8);
395 vf->vport_id = idx + 1;
Yuval Mintz1cf2b1a2016-06-05 13:11:12 +0300396
397 vf->num_mac_filters = QED_ETH_VF_NUM_MAC_FILTERS;
398 vf->num_vlan_filters = QED_ETH_VF_NUM_VLAN_FILTERS;
Yuval Mintz32a47e72016-05-11 16:36:12 +0300399 }
400}
401
402static int qed_iov_allocate_vfdb(struct qed_hwfn *p_hwfn)
403{
404 struct qed_pf_iov *p_iov_info = p_hwfn->pf_iov_info;
405 void **p_v_addr;
406 u16 num_vfs = 0;
407
408 num_vfs = p_hwfn->cdev->p_iov_info->total_vfs;
409
410 DP_VERBOSE(p_hwfn, QED_MSG_IOV,
411 "qed_iov_allocate_vfdb for %d VFs\n", num_vfs);
412
413 /* Allocate PF Mailbox buffer (per-VF) */
414 p_iov_info->mbx_msg_size = sizeof(union vfpf_tlvs) * num_vfs;
415 p_v_addr = &p_iov_info->mbx_msg_virt_addr;
416 *p_v_addr = dma_alloc_coherent(&p_hwfn->cdev->pdev->dev,
417 p_iov_info->mbx_msg_size,
418 &p_iov_info->mbx_msg_phys_addr,
419 GFP_KERNEL);
420 if (!*p_v_addr)
421 return -ENOMEM;
422
423 /* Allocate PF Mailbox Reply buffer (per-VF) */
424 p_iov_info->mbx_reply_size = sizeof(union pfvf_tlvs) * num_vfs;
425 p_v_addr = &p_iov_info->mbx_reply_virt_addr;
426 *p_v_addr = dma_alloc_coherent(&p_hwfn->cdev->pdev->dev,
427 p_iov_info->mbx_reply_size,
428 &p_iov_info->mbx_reply_phys_addr,
429 GFP_KERNEL);
430 if (!*p_v_addr)
431 return -ENOMEM;
432
433 p_iov_info->bulletins_size = sizeof(struct qed_bulletin_content) *
434 num_vfs;
435 p_v_addr = &p_iov_info->p_bulletins;
436 *p_v_addr = dma_alloc_coherent(&p_hwfn->cdev->pdev->dev,
437 p_iov_info->bulletins_size,
438 &p_iov_info->bulletins_phys,
439 GFP_KERNEL);
440 if (!*p_v_addr)
441 return -ENOMEM;
442
443 DP_VERBOSE(p_hwfn,
444 QED_MSG_IOV,
445 "PF's Requests mailbox [%p virt 0x%llx phys], Response mailbox [%p virt 0x%llx phys] Bulletins [%p virt 0x%llx phys]\n",
446 p_iov_info->mbx_msg_virt_addr,
447 (u64) p_iov_info->mbx_msg_phys_addr,
448 p_iov_info->mbx_reply_virt_addr,
449 (u64) p_iov_info->mbx_reply_phys_addr,
450 p_iov_info->p_bulletins, (u64) p_iov_info->bulletins_phys);
451
452 return 0;
453}
454
455static void qed_iov_free_vfdb(struct qed_hwfn *p_hwfn)
456{
457 struct qed_pf_iov *p_iov_info = p_hwfn->pf_iov_info;
458
459 if (p_hwfn->pf_iov_info->mbx_msg_virt_addr)
460 dma_free_coherent(&p_hwfn->cdev->pdev->dev,
461 p_iov_info->mbx_msg_size,
462 p_iov_info->mbx_msg_virt_addr,
463 p_iov_info->mbx_msg_phys_addr);
464
465 if (p_hwfn->pf_iov_info->mbx_reply_virt_addr)
466 dma_free_coherent(&p_hwfn->cdev->pdev->dev,
467 p_iov_info->mbx_reply_size,
468 p_iov_info->mbx_reply_virt_addr,
469 p_iov_info->mbx_reply_phys_addr);
470
471 if (p_iov_info->p_bulletins)
472 dma_free_coherent(&p_hwfn->cdev->pdev->dev,
473 p_iov_info->bulletins_size,
474 p_iov_info->p_bulletins,
475 p_iov_info->bulletins_phys);
476}
477
478int qed_iov_alloc(struct qed_hwfn *p_hwfn)
479{
480 struct qed_pf_iov *p_sriov;
481
482 if (!IS_PF_SRIOV(p_hwfn)) {
483 DP_VERBOSE(p_hwfn, QED_MSG_IOV,
484 "No SR-IOV - no need for IOV db\n");
485 return 0;
486 }
487
488 p_sriov = kzalloc(sizeof(*p_sriov), GFP_KERNEL);
Joe Perches2591c282016-09-04 14:24:03 -0700489 if (!p_sriov)
Yuval Mintz32a47e72016-05-11 16:36:12 +0300490 return -ENOMEM;
Yuval Mintz32a47e72016-05-11 16:36:12 +0300491
492 p_hwfn->pf_iov_info = p_sriov;
493
494 return qed_iov_allocate_vfdb(p_hwfn);
495}
496
497void qed_iov_setup(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt)
498{
499 if (!IS_PF_SRIOV(p_hwfn) || !IS_PF_SRIOV_ALLOC(p_hwfn))
500 return;
501
502 qed_iov_setup_vfdb(p_hwfn);
503 qed_iov_clear_vf_igu_blocks(p_hwfn, p_ptt);
504}
505
506void qed_iov_free(struct qed_hwfn *p_hwfn)
507{
508 if (IS_PF_SRIOV_ALLOC(p_hwfn)) {
509 qed_iov_free_vfdb(p_hwfn);
510 kfree(p_hwfn->pf_iov_info);
511 }
512}
513
514void qed_iov_free_hw_info(struct qed_dev *cdev)
515{
516 kfree(cdev->p_iov_info);
517 cdev->p_iov_info = NULL;
518}
519
520int qed_iov_hw_info(struct qed_hwfn *p_hwfn)
521{
522 struct qed_dev *cdev = p_hwfn->cdev;
523 int pos;
524 int rc;
525
Yuval Mintz1408cc1f2016-05-11 16:36:14 +0300526 if (IS_VF(p_hwfn->cdev))
527 return 0;
528
Yuval Mintz32a47e72016-05-11 16:36:12 +0300529 /* Learn the PCI configuration */
530 pos = pci_find_ext_capability(p_hwfn->cdev->pdev,
531 PCI_EXT_CAP_ID_SRIOV);
532 if (!pos) {
533 DP_VERBOSE(p_hwfn, QED_MSG_IOV, "No PCIe IOV support\n");
534 return 0;
535 }
536
537 /* Allocate a new struct for IOV information */
538 cdev->p_iov_info = kzalloc(sizeof(*cdev->p_iov_info), GFP_KERNEL);
Joe Perches2591c282016-09-04 14:24:03 -0700539 if (!cdev->p_iov_info)
Yuval Mintz32a47e72016-05-11 16:36:12 +0300540 return -ENOMEM;
Joe Perches2591c282016-09-04 14:24:03 -0700541
Yuval Mintz32a47e72016-05-11 16:36:12 +0300542 cdev->p_iov_info->pos = pos;
543
544 rc = qed_iov_pci_cfg_info(cdev);
545 if (rc)
546 return rc;
547
548 /* We want PF IOV to be synonemous with the existance of p_iov_info;
549 * In case the capability is published but there are no VFs, simply
550 * de-allocate the struct.
551 */
552 if (!cdev->p_iov_info->total_vfs) {
553 DP_VERBOSE(p_hwfn, QED_MSG_IOV,
554 "IOV capabilities, but no VFs are published\n");
555 kfree(cdev->p_iov_info);
556 cdev->p_iov_info = NULL;
557 return 0;
558 }
559
560 /* Calculate the first VF index - this is a bit tricky; Basically,
561 * VFs start at offset 16 relative to PF0, and 2nd engine VFs begin
562 * after the first engine's VFs.
563 */
564 cdev->p_iov_info->first_vf_in_pf = p_hwfn->cdev->p_iov_info->offset +
565 p_hwfn->abs_pf_id - 16;
566 if (QED_PATH_ID(p_hwfn))
567 cdev->p_iov_info->first_vf_in_pf -= MAX_NUM_VFS_BB;
568
569 DP_VERBOSE(p_hwfn, QED_MSG_IOV,
570 "First VF in hwfn 0x%08x\n",
571 cdev->p_iov_info->first_vf_in_pf);
572
573 return 0;
574}
575
Yuval Mintz7eff82b2016-10-14 05:19:22 -0400576bool _qed_iov_pf_sanity_check(struct qed_hwfn *p_hwfn,
577 int vfid, bool b_fail_malicious)
Yuval Mintz37bff2b2016-05-11 16:36:13 +0300578{
579 /* Check PF supports sriov */
Yuval Mintzb0409fa2016-05-15 14:48:05 +0300580 if (IS_VF(p_hwfn->cdev) || !IS_QED_SRIOV(p_hwfn->cdev) ||
581 !IS_PF_SRIOV_ALLOC(p_hwfn))
Yuval Mintz37bff2b2016-05-11 16:36:13 +0300582 return false;
583
584 /* Check VF validity */
Yuval Mintz7eff82b2016-10-14 05:19:22 -0400585 if (!qed_iov_is_valid_vfid(p_hwfn, vfid, true, b_fail_malicious))
Yuval Mintz37bff2b2016-05-11 16:36:13 +0300586 return false;
587
588 return true;
589}
590
Yuval Mintz7eff82b2016-10-14 05:19:22 -0400591bool qed_iov_pf_sanity_check(struct qed_hwfn *p_hwfn, int vfid)
592{
593 return _qed_iov_pf_sanity_check(p_hwfn, vfid, true);
594}
595
Yuval Mintz0b55e272016-05-11 16:36:15 +0300596static void qed_iov_set_vf_to_disable(struct qed_dev *cdev,
597 u16 rel_vf_id, u8 to_disable)
598{
599 struct qed_vf_info *vf;
600 int i;
601
602 for_each_hwfn(cdev, i) {
603 struct qed_hwfn *p_hwfn = &cdev->hwfns[i];
604
605 vf = qed_iov_get_vf_info(p_hwfn, rel_vf_id, false);
606 if (!vf)
607 continue;
608
609 vf->to_disable = to_disable;
610 }
611}
612
Baoyou Xieba569472016-09-09 09:21:15 +0800613static void qed_iov_set_vfs_to_disable(struct qed_dev *cdev, u8 to_disable)
Yuval Mintz0b55e272016-05-11 16:36:15 +0300614{
615 u16 i;
616
617 if (!IS_QED_SRIOV(cdev))
618 return;
619
620 for (i = 0; i < cdev->p_iov_info->total_vfs; i++)
621 qed_iov_set_vf_to_disable(cdev, i, to_disable);
622}
623
Yuval Mintz1408cc1f2016-05-11 16:36:14 +0300624static void qed_iov_vf_pglue_clear_err(struct qed_hwfn *p_hwfn,
625 struct qed_ptt *p_ptt, u8 abs_vfid)
626{
627 qed_wr(p_hwfn, p_ptt,
628 PGLUE_B_REG_WAS_ERROR_VF_31_0_CLR + (abs_vfid >> 5) * 4,
629 1 << (abs_vfid & 0x1f));
630}
631
Yuval Mintzdacd88d2016-05-11 16:36:16 +0300632static void qed_iov_vf_igu_reset(struct qed_hwfn *p_hwfn,
633 struct qed_ptt *p_ptt, struct qed_vf_info *vf)
634{
Yuval Mintzdacd88d2016-05-11 16:36:16 +0300635 int i;
636
637 /* Set VF masks and configuration - pretend */
638 qed_fid_pretend(p_hwfn, p_ptt, (u16) vf->concrete_fid);
639
640 qed_wr(p_hwfn, p_ptt, IGU_REG_STATISTIC_NUM_VF_MSG_SENT, 0);
641
Yuval Mintzdacd88d2016-05-11 16:36:16 +0300642 /* unpretend */
643 qed_fid_pretend(p_hwfn, p_ptt, (u16) p_hwfn->hw_info.concrete_fid);
644
645 /* iterate over all queues, clear sb consumer */
Yuval Mintzb2b897e2016-05-15 14:48:06 +0300646 for (i = 0; i < vf->num_sbs; i++)
647 qed_int_igu_init_pure_rt_single(p_hwfn, p_ptt,
648 vf->igu_sbs[i],
649 vf->opaque_fid, true);
Yuval Mintzdacd88d2016-05-11 16:36:16 +0300650}
651
Yuval Mintz0b55e272016-05-11 16:36:15 +0300652static void qed_iov_vf_igu_set_int(struct qed_hwfn *p_hwfn,
653 struct qed_ptt *p_ptt,
654 struct qed_vf_info *vf, bool enable)
655{
656 u32 igu_vf_conf;
657
658 qed_fid_pretend(p_hwfn, p_ptt, (u16) vf->concrete_fid);
659
660 igu_vf_conf = qed_rd(p_hwfn, p_ptt, IGU_REG_VF_CONFIGURATION);
661
662 if (enable)
663 igu_vf_conf |= IGU_VF_CONF_MSI_MSIX_EN;
664 else
665 igu_vf_conf &= ~IGU_VF_CONF_MSI_MSIX_EN;
666
667 qed_wr(p_hwfn, p_ptt, IGU_REG_VF_CONFIGURATION, igu_vf_conf);
668
669 /* unpretend */
670 qed_fid_pretend(p_hwfn, p_ptt, (u16) p_hwfn->hw_info.concrete_fid);
671}
672
Yuval Mintz1408cc1f2016-05-11 16:36:14 +0300673static int qed_iov_enable_vf_access(struct qed_hwfn *p_hwfn,
674 struct qed_ptt *p_ptt,
675 struct qed_vf_info *vf)
676{
677 u32 igu_vf_conf = IGU_VF_CONF_FUNC_EN;
678 int rc;
679
Yuval Mintz0b55e272016-05-11 16:36:15 +0300680 if (vf->to_disable)
681 return 0;
682
Yuval Mintz1408cc1f2016-05-11 16:36:14 +0300683 DP_VERBOSE(p_hwfn,
684 QED_MSG_IOV,
685 "Enable internal access for vf %x [abs %x]\n",
686 vf->abs_vf_id, QED_VF_ABS_ID(p_hwfn, vf));
687
688 qed_iov_vf_pglue_clear_err(p_hwfn, p_ptt, QED_VF_ABS_ID(p_hwfn, vf));
689
Yuval Mintzb2b897e2016-05-15 14:48:06 +0300690 qed_iov_vf_igu_reset(p_hwfn, p_ptt, vf);
691
Yuval Mintz7eff82b2016-10-14 05:19:22 -0400692 /* It's possible VF was previously considered malicious */
693 vf->b_malicious = false;
694
Yuval Mintz1408cc1f2016-05-11 16:36:14 +0300695 rc = qed_mcp_config_vf_msix(p_hwfn, p_ptt, vf->abs_vf_id, vf->num_sbs);
696 if (rc)
697 return rc;
698
699 qed_fid_pretend(p_hwfn, p_ptt, (u16) vf->concrete_fid);
700
701 SET_FIELD(igu_vf_conf, IGU_VF_CONF_PARENT, p_hwfn->rel_pf_id);
702 STORE_RT_REG(p_hwfn, IGU_REG_VF_CONFIGURATION_RT_OFFSET, igu_vf_conf);
703
704 qed_init_run(p_hwfn, p_ptt, PHASE_VF, vf->abs_vf_id,
705 p_hwfn->hw_info.hw_mode);
706
707 /* unpretend */
708 qed_fid_pretend(p_hwfn, p_ptt, (u16) p_hwfn->hw_info.concrete_fid);
709
Yuval Mintz1408cc1f2016-05-11 16:36:14 +0300710 vf->state = VF_FREE;
711
712 return rc;
713}
714
Yuval Mintz0b55e272016-05-11 16:36:15 +0300715/**
716 * @brief qed_iov_config_perm_table - configure the permission
717 * zone table.
718 * In E4, queue zone permission table size is 320x9. There
719 * are 320 VF queues for single engine device (256 for dual
720 * engine device), and each entry has the following format:
721 * {Valid, VF[7:0]}
722 * @param p_hwfn
723 * @param p_ptt
724 * @param vf
725 * @param enable
726 */
727static void qed_iov_config_perm_table(struct qed_hwfn *p_hwfn,
728 struct qed_ptt *p_ptt,
729 struct qed_vf_info *vf, u8 enable)
730{
731 u32 reg_addr, val;
732 u16 qzone_id = 0;
733 int qid;
734
735 for (qid = 0; qid < vf->num_rxqs; qid++) {
736 qed_fw_l2_queue(p_hwfn, vf->vf_queues[qid].fw_rx_qid,
737 &qzone_id);
738
739 reg_addr = PSWHST_REG_ZONE_PERMISSION_TABLE + qzone_id * 4;
Yuval Mintz1a635e42016-08-15 10:42:43 +0300740 val = enable ? (vf->abs_vf_id | BIT(8)) : 0;
Yuval Mintz0b55e272016-05-11 16:36:15 +0300741 qed_wr(p_hwfn, p_ptt, reg_addr, val);
742 }
743}
744
Yuval Mintzdacd88d2016-05-11 16:36:16 +0300745static void qed_iov_enable_vf_traffic(struct qed_hwfn *p_hwfn,
746 struct qed_ptt *p_ptt,
747 struct qed_vf_info *vf)
748{
749 /* Reset vf in IGU - interrupts are still disabled */
750 qed_iov_vf_igu_reset(p_hwfn, p_ptt, vf);
751
752 qed_iov_vf_igu_set_int(p_hwfn, p_ptt, vf, 1);
753
754 /* Permission Table */
755 qed_iov_config_perm_table(p_hwfn, p_ptt, vf, true);
756}
757
Yuval Mintz1408cc1f2016-05-11 16:36:14 +0300758static u8 qed_iov_alloc_vf_igu_sbs(struct qed_hwfn *p_hwfn,
759 struct qed_ptt *p_ptt,
760 struct qed_vf_info *vf, u16 num_rx_queues)
761{
762 struct qed_igu_block *igu_blocks;
763 int qid = 0, igu_id = 0;
764 u32 val = 0;
765
766 igu_blocks = p_hwfn->hw_info.p_igu_info->igu_map.igu_blocks;
767
768 if (num_rx_queues > p_hwfn->hw_info.p_igu_info->free_blks)
769 num_rx_queues = p_hwfn->hw_info.p_igu_info->free_blks;
770 p_hwfn->hw_info.p_igu_info->free_blks -= num_rx_queues;
771
772 SET_FIELD(val, IGU_MAPPING_LINE_FUNCTION_NUMBER, vf->abs_vf_id);
773 SET_FIELD(val, IGU_MAPPING_LINE_VALID, 1);
774 SET_FIELD(val, IGU_MAPPING_LINE_PF_VALID, 0);
775
776 while ((qid < num_rx_queues) &&
777 (igu_id < QED_MAPPING_MEMORY_SIZE(p_hwfn->cdev))) {
778 if (igu_blocks[igu_id].status & QED_IGU_STATUS_FREE) {
779 struct cau_sb_entry sb_entry;
780
781 vf->igu_sbs[qid] = (u16)igu_id;
782 igu_blocks[igu_id].status &= ~QED_IGU_STATUS_FREE;
783
784 SET_FIELD(val, IGU_MAPPING_LINE_VECTOR_NUMBER, qid);
785
786 qed_wr(p_hwfn, p_ptt,
787 IGU_REG_MAPPING_MEMORY + sizeof(u32) * igu_id,
788 val);
789
790 /* Configure igu sb in CAU which were marked valid */
791 qed_init_cau_sb_entry(p_hwfn, &sb_entry,
792 p_hwfn->rel_pf_id,
793 vf->abs_vf_id, 1);
794 qed_dmae_host2grc(p_hwfn, p_ptt,
795 (u64)(uintptr_t)&sb_entry,
796 CAU_REG_SB_VAR_MEMORY +
797 igu_id * sizeof(u64), 2, 0);
798 qid++;
799 }
800 igu_id++;
801 }
802
803 vf->num_sbs = (u8) num_rx_queues;
804
805 return vf->num_sbs;
806}
807
Yuval Mintz0b55e272016-05-11 16:36:15 +0300808static void qed_iov_free_vf_igu_sbs(struct qed_hwfn *p_hwfn,
809 struct qed_ptt *p_ptt,
810 struct qed_vf_info *vf)
811{
812 struct qed_igu_info *p_info = p_hwfn->hw_info.p_igu_info;
813 int idx, igu_id;
814 u32 addr, val;
815
816 /* Invalidate igu CAM lines and mark them as free */
817 for (idx = 0; idx < vf->num_sbs; idx++) {
818 igu_id = vf->igu_sbs[idx];
819 addr = IGU_REG_MAPPING_MEMORY + sizeof(u32) * igu_id;
820
821 val = qed_rd(p_hwfn, p_ptt, addr);
822 SET_FIELD(val, IGU_MAPPING_LINE_VALID, 0);
823 qed_wr(p_hwfn, p_ptt, addr, val);
824
825 p_info->igu_map.igu_blocks[igu_id].status |=
826 QED_IGU_STATUS_FREE;
827
828 p_hwfn->hw_info.p_igu_info->free_blks++;
829 }
830
831 vf->num_sbs = 0;
832}
833
Mintz, Yuval33b2fbd2017-02-20 22:43:36 +0200834static void qed_iov_set_link(struct qed_hwfn *p_hwfn,
835 u16 vfid,
836 struct qed_mcp_link_params *params,
837 struct qed_mcp_link_state *link,
838 struct qed_mcp_link_capabilities *p_caps)
839{
840 struct qed_vf_info *p_vf = qed_iov_get_vf_info(p_hwfn,
841 vfid,
842 false);
843 struct qed_bulletin_content *p_bulletin;
844
845 if (!p_vf)
846 return;
847
848 p_bulletin = p_vf->bulletin.p_virt;
849 p_bulletin->req_autoneg = params->speed.autoneg;
850 p_bulletin->req_adv_speed = params->speed.advertised_speeds;
851 p_bulletin->req_forced_speed = params->speed.forced_speed;
852 p_bulletin->req_autoneg_pause = params->pause.autoneg;
853 p_bulletin->req_forced_rx = params->pause.forced_rx;
854 p_bulletin->req_forced_tx = params->pause.forced_tx;
855 p_bulletin->req_loopback = params->loopback_mode;
856
857 p_bulletin->link_up = link->link_up;
858 p_bulletin->speed = link->speed;
859 p_bulletin->full_duplex = link->full_duplex;
860 p_bulletin->autoneg = link->an;
861 p_bulletin->autoneg_complete = link->an_complete;
862 p_bulletin->parallel_detection = link->parallel_detection;
863 p_bulletin->pfc_enabled = link->pfc_enabled;
864 p_bulletin->partner_adv_speed = link->partner_adv_speed;
865 p_bulletin->partner_tx_flow_ctrl_en = link->partner_tx_flow_ctrl_en;
866 p_bulletin->partner_rx_flow_ctrl_en = link->partner_rx_flow_ctrl_en;
867 p_bulletin->partner_adv_pause = link->partner_adv_pause;
868 p_bulletin->sfp_tx_fault = link->sfp_tx_fault;
869
870 p_bulletin->capability_speed = p_caps->speed_capabilities;
871}
872
Yuval Mintz1408cc1f2016-05-11 16:36:14 +0300873static int qed_iov_init_hw_for_vf(struct qed_hwfn *p_hwfn,
874 struct qed_ptt *p_ptt,
Mintz, Yuval3da7a372016-11-29 16:47:06 +0200875 struct qed_iov_vf_init_params *p_params)
Yuval Mintz1408cc1f2016-05-11 16:36:14 +0300876{
Mintz, Yuval33b2fbd2017-02-20 22:43:36 +0200877 struct qed_mcp_link_capabilities link_caps;
878 struct qed_mcp_link_params link_params;
879 struct qed_mcp_link_state link_state;
Yuval Mintz1408cc1f2016-05-11 16:36:14 +0300880 u8 num_of_vf_avaiable_chains = 0;
881 struct qed_vf_info *vf = NULL;
Mintz, Yuval3da7a372016-11-29 16:47:06 +0200882 u16 qid, num_irqs;
Yuval Mintz1408cc1f2016-05-11 16:36:14 +0300883 int rc = 0;
884 u32 cids;
885 u8 i;
886
Mintz, Yuval3da7a372016-11-29 16:47:06 +0200887 vf = qed_iov_get_vf_info(p_hwfn, p_params->rel_vf_id, false);
Yuval Mintz1408cc1f2016-05-11 16:36:14 +0300888 if (!vf) {
889 DP_ERR(p_hwfn, "qed_iov_init_hw_for_vf : vf is NULL\n");
890 return -EINVAL;
891 }
892
893 if (vf->b_init) {
Mintz, Yuval3da7a372016-11-29 16:47:06 +0200894 DP_NOTICE(p_hwfn, "VF[%d] is already active.\n",
895 p_params->rel_vf_id);
Yuval Mintz1408cc1f2016-05-11 16:36:14 +0300896 return -EINVAL;
897 }
898
Mintz, Yuval3da7a372016-11-29 16:47:06 +0200899 /* Perform sanity checking on the requested queue_id */
900 for (i = 0; i < p_params->num_queues; i++) {
901 u16 min_vf_qzone = FEAT_NUM(p_hwfn, QED_PF_L2_QUE);
902 u16 max_vf_qzone = min_vf_qzone +
903 FEAT_NUM(p_hwfn, QED_VF_L2_QUE) - 1;
904
905 qid = p_params->req_rx_queue[i];
906 if (qid < min_vf_qzone || qid > max_vf_qzone) {
907 DP_NOTICE(p_hwfn,
908 "Can't enable Rx qid [%04x] for VF[%d]: qids [0x%04x,...,0x%04x] available\n",
909 qid,
910 p_params->rel_vf_id,
911 min_vf_qzone, max_vf_qzone);
912 return -EINVAL;
913 }
914
915 qid = p_params->req_tx_queue[i];
916 if (qid > max_vf_qzone) {
917 DP_NOTICE(p_hwfn,
918 "Can't enable Tx qid [%04x] for VF[%d]: max qid 0x%04x\n",
919 qid, p_params->rel_vf_id, max_vf_qzone);
920 return -EINVAL;
921 }
922
923 /* If client *really* wants, Tx qid can be shared with PF */
924 if (qid < min_vf_qzone)
925 DP_VERBOSE(p_hwfn,
926 QED_MSG_IOV,
927 "VF[%d] is using PF qid [0x%04x] for Txq[0x%02x]\n",
928 p_params->rel_vf_id, qid, i);
929 }
930
Yuval Mintz1408cc1f2016-05-11 16:36:14 +0300931 /* Limit number of queues according to number of CIDs */
932 qed_cxt_get_proto_cid_count(p_hwfn, PROTOCOLID_ETH, &cids);
933 DP_VERBOSE(p_hwfn,
934 QED_MSG_IOV,
935 "VF[%d] - requesting to initialize for 0x%04x queues [0x%04x CIDs available]\n",
Mintz, Yuval3da7a372016-11-29 16:47:06 +0200936 vf->relative_vf_id, p_params->num_queues, (u16)cids);
937 num_irqs = min_t(u16, p_params->num_queues, ((u16)cids));
Yuval Mintz1408cc1f2016-05-11 16:36:14 +0300938
939 num_of_vf_avaiable_chains = qed_iov_alloc_vf_igu_sbs(p_hwfn,
940 p_ptt,
Mintz, Yuval3da7a372016-11-29 16:47:06 +0200941 vf, num_irqs);
Yuval Mintz1408cc1f2016-05-11 16:36:14 +0300942 if (!num_of_vf_avaiable_chains) {
943 DP_ERR(p_hwfn, "no available igu sbs\n");
944 return -ENOMEM;
945 }
946
947 /* Choose queue number and index ranges */
948 vf->num_rxqs = num_of_vf_avaiable_chains;
949 vf->num_txqs = num_of_vf_avaiable_chains;
950
951 for (i = 0; i < vf->num_rxqs; i++) {
Mintz, Yuval3da7a372016-11-29 16:47:06 +0200952 struct qed_vf_q_info *p_queue = &vf->vf_queues[i];
Yuval Mintz1408cc1f2016-05-11 16:36:14 +0300953
Mintz, Yuval3da7a372016-11-29 16:47:06 +0200954 p_queue->fw_rx_qid = p_params->req_rx_queue[i];
955 p_queue->fw_tx_qid = p_params->req_tx_queue[i];
Yuval Mintz1408cc1f2016-05-11 16:36:14 +0300956
957 /* CIDs are per-VF, so no problem having them 0-based. */
Mintz, Yuval3da7a372016-11-29 16:47:06 +0200958 p_queue->fw_cid = i;
Yuval Mintz1408cc1f2016-05-11 16:36:14 +0300959
960 DP_VERBOSE(p_hwfn, QED_MSG_IOV,
Mintz, Yuval3da7a372016-11-29 16:47:06 +0200961 "VF[%d] - Q[%d] SB %04x, qid [Rx %04x Tx %04x] CID %04x\n",
962 vf->relative_vf_id,
963 i, vf->igu_sbs[i],
964 p_queue->fw_rx_qid,
965 p_queue->fw_tx_qid, p_queue->fw_cid);
Yuval Mintz1408cc1f2016-05-11 16:36:14 +0300966 }
Mintz, Yuval3da7a372016-11-29 16:47:06 +0200967
Mintz, Yuval33b2fbd2017-02-20 22:43:36 +0200968 /* Update the link configuration in bulletin */
969 memcpy(&link_params, qed_mcp_get_link_params(p_hwfn),
970 sizeof(link_params));
971 memcpy(&link_state, qed_mcp_get_link_state(p_hwfn), sizeof(link_state));
972 memcpy(&link_caps, qed_mcp_get_link_capabilities(p_hwfn),
973 sizeof(link_caps));
974 qed_iov_set_link(p_hwfn, p_params->rel_vf_id,
975 &link_params, &link_state, &link_caps);
976
Yuval Mintz1408cc1f2016-05-11 16:36:14 +0300977 rc = qed_iov_enable_vf_access(p_hwfn, p_ptt, vf);
978 if (!rc) {
979 vf->b_init = true;
980
981 if (IS_LEAD_HWFN(p_hwfn))
982 p_hwfn->cdev->p_iov_info->num_vfs++;
983 }
984
985 return rc;
986}
987
Yuval Mintz0b55e272016-05-11 16:36:15 +0300988static int qed_iov_release_hw_for_vf(struct qed_hwfn *p_hwfn,
989 struct qed_ptt *p_ptt, u16 rel_vf_id)
990{
Manish Chopra079d20a2016-05-15 14:48:07 +0300991 struct qed_mcp_link_capabilities caps;
992 struct qed_mcp_link_params params;
993 struct qed_mcp_link_state link;
Yuval Mintz0b55e272016-05-11 16:36:15 +0300994 struct qed_vf_info *vf = NULL;
Yuval Mintz0b55e272016-05-11 16:36:15 +0300995
996 vf = qed_iov_get_vf_info(p_hwfn, rel_vf_id, true);
997 if (!vf) {
998 DP_ERR(p_hwfn, "qed_iov_release_hw_for_vf : vf is NULL\n");
999 return -EINVAL;
1000 }
1001
Yuval Mintz36558c32016-05-11 16:36:17 +03001002 if (vf->bulletin.p_virt)
1003 memset(vf->bulletin.p_virt, 0, sizeof(*vf->bulletin.p_virt));
1004
1005 memset(&vf->p_vf_info, 0, sizeof(vf->p_vf_info));
1006
Manish Chopra079d20a2016-05-15 14:48:07 +03001007 /* Get the link configuration back in bulletin so
1008 * that when VFs are re-enabled they get the actual
1009 * link configuration.
1010 */
1011 memcpy(&params, qed_mcp_get_link_params(p_hwfn), sizeof(params));
1012 memcpy(&link, qed_mcp_get_link_state(p_hwfn), sizeof(link));
1013 memcpy(&caps, qed_mcp_get_link_capabilities(p_hwfn), sizeof(caps));
1014 qed_iov_set_link(p_hwfn, rel_vf_id, &params, &link, &caps);
1015
Yuval Mintz1fe614d2016-06-05 13:11:11 +03001016 /* Forget the VF's acquisition message */
1017 memset(&vf->acquire, 0, sizeof(vf->acquire));
Yuval Mintz0b55e272016-05-11 16:36:15 +03001018
1019 /* disablng interrupts and resetting permission table was done during
1020 * vf-close, however, we could get here without going through vf_close
1021 */
1022 /* Disable Interrupts for VF */
1023 qed_iov_vf_igu_set_int(p_hwfn, p_ptt, vf, 0);
1024
1025 /* Reset Permission table */
1026 qed_iov_config_perm_table(p_hwfn, p_ptt, vf, 0);
1027
1028 vf->num_rxqs = 0;
1029 vf->num_txqs = 0;
1030 qed_iov_free_vf_igu_sbs(p_hwfn, p_ptt, vf);
1031
1032 if (vf->b_init) {
1033 vf->b_init = false;
1034
1035 if (IS_LEAD_HWFN(p_hwfn))
1036 p_hwfn->cdev->p_iov_info->num_vfs--;
1037 }
1038
1039 return 0;
1040}
1041
Yuval Mintz37bff2b2016-05-11 16:36:13 +03001042static bool qed_iov_tlv_supported(u16 tlvtype)
1043{
1044 return CHANNEL_TLV_NONE < tlvtype && tlvtype < CHANNEL_TLV_MAX;
1045}
1046
1047/* place a given tlv on the tlv buffer, continuing current tlv list */
1048void *qed_add_tlv(struct qed_hwfn *p_hwfn, u8 **offset, u16 type, u16 length)
1049{
1050 struct channel_tlv *tl = (struct channel_tlv *)*offset;
1051
1052 tl->type = type;
1053 tl->length = length;
1054
1055 /* Offset should keep pointing to next TLV (the end of the last) */
1056 *offset += length;
1057
1058 /* Return a pointer to the start of the added tlv */
1059 return *offset - length;
1060}
1061
1062/* list the types and lengths of the tlvs on the buffer */
1063void qed_dp_tlv_list(struct qed_hwfn *p_hwfn, void *tlvs_list)
1064{
1065 u16 i = 1, total_length = 0;
1066 struct channel_tlv *tlv;
1067
1068 do {
1069 tlv = (struct channel_tlv *)((u8 *)tlvs_list + total_length);
1070
1071 /* output tlv */
1072 DP_VERBOSE(p_hwfn, QED_MSG_IOV,
1073 "TLV number %d: type %d, length %d\n",
1074 i, tlv->type, tlv->length);
1075
1076 if (tlv->type == CHANNEL_TLV_LIST_END)
1077 return;
1078
1079 /* Validate entry - protect against malicious VFs */
1080 if (!tlv->length) {
1081 DP_NOTICE(p_hwfn, "TLV of length 0 found\n");
1082 return;
1083 }
1084
1085 total_length += tlv->length;
1086
1087 if (total_length >= sizeof(struct tlv_buffer_size)) {
1088 DP_NOTICE(p_hwfn, "TLV ==> Buffer overflow\n");
1089 return;
1090 }
1091
1092 i++;
1093 } while (1);
1094}
1095
1096static void qed_iov_send_response(struct qed_hwfn *p_hwfn,
1097 struct qed_ptt *p_ptt,
1098 struct qed_vf_info *p_vf,
1099 u16 length, u8 status)
1100{
1101 struct qed_iov_vf_mbx *mbx = &p_vf->vf_mbx;
1102 struct qed_dmae_params params;
1103 u8 eng_vf_id;
1104
1105 mbx->reply_virt->default_resp.hdr.status = status;
1106
1107 qed_dp_tlv_list(p_hwfn, mbx->reply_virt);
1108
1109 eng_vf_id = p_vf->abs_vf_id;
1110
1111 memset(&params, 0, sizeof(struct qed_dmae_params));
1112 params.flags = QED_DMAE_FLAG_VF_DST;
1113 params.dst_vfid = eng_vf_id;
1114
1115 qed_dmae_host2host(p_hwfn, p_ptt, mbx->reply_phys + sizeof(u64),
1116 mbx->req_virt->first_tlv.reply_address +
1117 sizeof(u64),
1118 (sizeof(union pfvf_tlvs) - sizeof(u64)) / 4,
1119 &params);
1120
1121 qed_dmae_host2host(p_hwfn, p_ptt, mbx->reply_phys,
1122 mbx->req_virt->first_tlv.reply_address,
1123 sizeof(u64) / 4, &params);
1124
1125 REG_WR(p_hwfn,
1126 GTT_BAR0_MAP_REG_USDM_RAM +
1127 USTORM_VF_PF_CHANNEL_READY_OFFSET(eng_vf_id), 1);
1128}
1129
Yuval Mintzdacd88d2016-05-11 16:36:16 +03001130static u16 qed_iov_vport_to_tlv(struct qed_hwfn *p_hwfn,
1131 enum qed_iov_vport_update_flag flag)
1132{
1133 switch (flag) {
1134 case QED_IOV_VP_UPDATE_ACTIVATE:
1135 return CHANNEL_TLV_VPORT_UPDATE_ACTIVATE;
Yuval Mintz17b235c2016-05-11 16:36:18 +03001136 case QED_IOV_VP_UPDATE_VLAN_STRIP:
1137 return CHANNEL_TLV_VPORT_UPDATE_VLAN_STRIP;
1138 case QED_IOV_VP_UPDATE_TX_SWITCH:
1139 return CHANNEL_TLV_VPORT_UPDATE_TX_SWITCH;
Yuval Mintzdacd88d2016-05-11 16:36:16 +03001140 case QED_IOV_VP_UPDATE_MCAST:
1141 return CHANNEL_TLV_VPORT_UPDATE_MCAST;
1142 case QED_IOV_VP_UPDATE_ACCEPT_PARAM:
1143 return CHANNEL_TLV_VPORT_UPDATE_ACCEPT_PARAM;
1144 case QED_IOV_VP_UPDATE_RSS:
1145 return CHANNEL_TLV_VPORT_UPDATE_RSS;
Yuval Mintz17b235c2016-05-11 16:36:18 +03001146 case QED_IOV_VP_UPDATE_ACCEPT_ANY_VLAN:
1147 return CHANNEL_TLV_VPORT_UPDATE_ACCEPT_ANY_VLAN;
1148 case QED_IOV_VP_UPDATE_SGE_TPA:
1149 return CHANNEL_TLV_VPORT_UPDATE_SGE_TPA;
Yuval Mintzdacd88d2016-05-11 16:36:16 +03001150 default:
1151 return 0;
1152 }
1153}
1154
1155static u16 qed_iov_prep_vp_update_resp_tlvs(struct qed_hwfn *p_hwfn,
1156 struct qed_vf_info *p_vf,
1157 struct qed_iov_vf_mbx *p_mbx,
1158 u8 status,
1159 u16 tlvs_mask, u16 tlvs_accepted)
1160{
1161 struct pfvf_def_resp_tlv *resp;
1162 u16 size, total_len, i;
1163
1164 memset(p_mbx->reply_virt, 0, sizeof(union pfvf_tlvs));
1165 p_mbx->offset = (u8 *)p_mbx->reply_virt;
1166 size = sizeof(struct pfvf_def_resp_tlv);
1167 total_len = size;
1168
1169 qed_add_tlv(p_hwfn, &p_mbx->offset, CHANNEL_TLV_VPORT_UPDATE, size);
1170
1171 /* Prepare response for all extended tlvs if they are found by PF */
1172 for (i = 0; i < QED_IOV_VP_UPDATE_MAX; i++) {
Yuval Mintz1a635e42016-08-15 10:42:43 +03001173 if (!(tlvs_mask & BIT(i)))
Yuval Mintzdacd88d2016-05-11 16:36:16 +03001174 continue;
1175
1176 resp = qed_add_tlv(p_hwfn, &p_mbx->offset,
1177 qed_iov_vport_to_tlv(p_hwfn, i), size);
1178
Yuval Mintz1a635e42016-08-15 10:42:43 +03001179 if (tlvs_accepted & BIT(i))
Yuval Mintzdacd88d2016-05-11 16:36:16 +03001180 resp->hdr.status = status;
1181 else
1182 resp->hdr.status = PFVF_STATUS_NOT_SUPPORTED;
1183
1184 DP_VERBOSE(p_hwfn,
1185 QED_MSG_IOV,
1186 "VF[%d] - vport_update response: TLV %d, status %02x\n",
1187 p_vf->relative_vf_id,
1188 qed_iov_vport_to_tlv(p_hwfn, i), resp->hdr.status);
1189
1190 total_len += size;
1191 }
1192
1193 qed_add_tlv(p_hwfn, &p_mbx->offset, CHANNEL_TLV_LIST_END,
1194 sizeof(struct channel_list_end_tlv));
1195
1196 return total_len;
1197}
1198
Yuval Mintz37bff2b2016-05-11 16:36:13 +03001199static void qed_iov_prepare_resp(struct qed_hwfn *p_hwfn,
1200 struct qed_ptt *p_ptt,
1201 struct qed_vf_info *vf_info,
1202 u16 type, u16 length, u8 status)
1203{
1204 struct qed_iov_vf_mbx *mbx = &vf_info->vf_mbx;
1205
1206 mbx->offset = (u8 *)mbx->reply_virt;
1207
1208 qed_add_tlv(p_hwfn, &mbx->offset, type, length);
1209 qed_add_tlv(p_hwfn, &mbx->offset, CHANNEL_TLV_LIST_END,
1210 sizeof(struct channel_list_end_tlv));
1211
1212 qed_iov_send_response(p_hwfn, p_ptt, vf_info, length, status);
1213}
1214
Baoyou Xieba569472016-09-09 09:21:15 +08001215static struct
1216qed_public_vf_info *qed_iov_get_public_vf_info(struct qed_hwfn *p_hwfn,
1217 u16 relative_vf_id,
1218 bool b_enabled_only)
Yuval Mintz0b55e272016-05-11 16:36:15 +03001219{
1220 struct qed_vf_info *vf = NULL;
1221
1222 vf = qed_iov_get_vf_info(p_hwfn, relative_vf_id, b_enabled_only);
1223 if (!vf)
1224 return NULL;
1225
1226 return &vf->p_vf_info;
1227}
1228
Baoyou Xieba569472016-09-09 09:21:15 +08001229static void qed_iov_clean_vf(struct qed_hwfn *p_hwfn, u8 vfid)
Yuval Mintz0b55e272016-05-11 16:36:15 +03001230{
1231 struct qed_public_vf_info *vf_info;
1232
1233 vf_info = qed_iov_get_public_vf_info(p_hwfn, vfid, false);
1234
1235 if (!vf_info)
1236 return;
1237
1238 /* Clear the VF mac */
Shyam Saini0ee28e32017-01-17 07:35:04 +05301239 eth_zero_addr(vf_info->mac);
Mintz, Yuvalf990c822017-01-01 13:57:08 +02001240
1241 vf_info->rx_accept_mode = 0;
1242 vf_info->tx_accept_mode = 0;
Yuval Mintz0b55e272016-05-11 16:36:15 +03001243}
1244
1245static void qed_iov_vf_cleanup(struct qed_hwfn *p_hwfn,
1246 struct qed_vf_info *p_vf)
1247{
1248 u32 i;
1249
1250 p_vf->vf_bulletin = 0;
Yuval Mintzdacd88d2016-05-11 16:36:16 +03001251 p_vf->vport_instance = 0;
Yuval Mintz08feecd2016-05-11 16:36:20 +03001252 p_vf->configured_features = 0;
Yuval Mintz0b55e272016-05-11 16:36:15 +03001253
1254 /* If VF previously requested less resources, go back to default */
1255 p_vf->num_rxqs = p_vf->num_sbs;
1256 p_vf->num_txqs = p_vf->num_sbs;
1257
Yuval Mintzdacd88d2016-05-11 16:36:16 +03001258 p_vf->num_active_rxqs = 0;
1259
Mintz, Yuval3da7a372016-11-29 16:47:06 +02001260 for (i = 0; i < QED_MAX_VF_CHAINS_PER_PF; i++) {
1261 struct qed_vf_q_info *p_queue = &p_vf->vf_queues[i];
1262
1263 if (p_queue->p_rx_cid) {
1264 qed_eth_queue_cid_release(p_hwfn, p_queue->p_rx_cid);
1265 p_queue->p_rx_cid = NULL;
1266 }
1267
1268 if (p_queue->p_tx_cid) {
1269 qed_eth_queue_cid_release(p_hwfn, p_queue->p_tx_cid);
1270 p_queue->p_tx_cid = NULL;
1271 }
1272 }
Yuval Mintz0b55e272016-05-11 16:36:15 +03001273
Yuval Mintz08feecd2016-05-11 16:36:20 +03001274 memset(&p_vf->shadow_config, 0, sizeof(p_vf->shadow_config));
Yuval Mintz1fe614d2016-06-05 13:11:11 +03001275 memset(&p_vf->acquire, 0, sizeof(p_vf->acquire));
Yuval Mintz0b55e272016-05-11 16:36:15 +03001276 qed_iov_clean_vf(p_hwfn, p_vf->relative_vf_id);
1277}
1278
Yuval Mintz1cf2b1a2016-06-05 13:11:12 +03001279static u8 qed_iov_vf_mbx_acquire_resc(struct qed_hwfn *p_hwfn,
1280 struct qed_ptt *p_ptt,
1281 struct qed_vf_info *p_vf,
1282 struct vf_pf_resc_request *p_req,
1283 struct pf_vf_resc *p_resp)
1284{
1285 int i;
1286
1287 /* Queue related information */
1288 p_resp->num_rxqs = p_vf->num_rxqs;
1289 p_resp->num_txqs = p_vf->num_txqs;
1290 p_resp->num_sbs = p_vf->num_sbs;
1291
1292 for (i = 0; i < p_resp->num_sbs; i++) {
1293 p_resp->hw_sbs[i].hw_sb_id = p_vf->igu_sbs[i];
1294 p_resp->hw_sbs[i].sb_qid = 0;
1295 }
1296
1297 /* These fields are filled for backward compatibility.
1298 * Unused by modern vfs.
1299 */
1300 for (i = 0; i < p_resp->num_rxqs; i++) {
1301 qed_fw_l2_queue(p_hwfn, p_vf->vf_queues[i].fw_rx_qid,
1302 (u16 *)&p_resp->hw_qid[i]);
1303 p_resp->cid[i] = p_vf->vf_queues[i].fw_cid;
1304 }
1305
1306 /* Filter related information */
1307 p_resp->num_mac_filters = min_t(u8, p_vf->num_mac_filters,
1308 p_req->num_mac_filters);
1309 p_resp->num_vlan_filters = min_t(u8, p_vf->num_vlan_filters,
1310 p_req->num_vlan_filters);
1311
1312 /* This isn't really needed/enforced, but some legacy VFs might depend
1313 * on the correct filling of this field.
1314 */
1315 p_resp->num_mc_filters = QED_MAX_MC_ADDRS;
1316
1317 /* Validate sufficient resources for VF */
1318 if (p_resp->num_rxqs < p_req->num_rxqs ||
1319 p_resp->num_txqs < p_req->num_txqs ||
1320 p_resp->num_sbs < p_req->num_sbs ||
1321 p_resp->num_mac_filters < p_req->num_mac_filters ||
1322 p_resp->num_vlan_filters < p_req->num_vlan_filters ||
1323 p_resp->num_mc_filters < p_req->num_mc_filters) {
1324 DP_VERBOSE(p_hwfn,
1325 QED_MSG_IOV,
1326 "VF[%d] - Insufficient resources: rxq [%02x/%02x] txq [%02x/%02x] sbs [%02x/%02x] mac [%02x/%02x] vlan [%02x/%02x] mc [%02x/%02x]\n",
1327 p_vf->abs_vf_id,
1328 p_req->num_rxqs,
1329 p_resp->num_rxqs,
1330 p_req->num_rxqs,
1331 p_resp->num_txqs,
1332 p_req->num_sbs,
1333 p_resp->num_sbs,
1334 p_req->num_mac_filters,
1335 p_resp->num_mac_filters,
1336 p_req->num_vlan_filters,
1337 p_resp->num_vlan_filters,
1338 p_req->num_mc_filters, p_resp->num_mc_filters);
Yuval Mintza044df82016-08-22 13:25:09 +03001339
1340 /* Some legacy OSes are incapable of correctly handling this
1341 * failure.
1342 */
1343 if ((p_vf->acquire.vfdev_info.eth_fp_hsi_minor ==
1344 ETH_HSI_VER_NO_PKT_LEN_TUNN) &&
1345 (p_vf->acquire.vfdev_info.os_type ==
1346 VFPF_ACQUIRE_OS_WINDOWS))
1347 return PFVF_STATUS_SUCCESS;
1348
Yuval Mintz1cf2b1a2016-06-05 13:11:12 +03001349 return PFVF_STATUS_NO_RESOURCE;
1350 }
1351
1352 return PFVF_STATUS_SUCCESS;
1353}
1354
1355static void qed_iov_vf_mbx_acquire_stats(struct qed_hwfn *p_hwfn,
1356 struct pfvf_stats_info *p_stats)
1357{
1358 p_stats->mstats.address = PXP_VF_BAR0_START_MSDM_ZONE_B +
1359 offsetof(struct mstorm_vf_zone,
1360 non_trigger.eth_queue_stat);
1361 p_stats->mstats.len = sizeof(struct eth_mstorm_per_queue_stat);
1362 p_stats->ustats.address = PXP_VF_BAR0_START_USDM_ZONE_B +
1363 offsetof(struct ustorm_vf_zone,
1364 non_trigger.eth_queue_stat);
1365 p_stats->ustats.len = sizeof(struct eth_ustorm_per_queue_stat);
1366 p_stats->pstats.address = PXP_VF_BAR0_START_PSDM_ZONE_B +
1367 offsetof(struct pstorm_vf_zone,
1368 non_trigger.eth_queue_stat);
1369 p_stats->pstats.len = sizeof(struct eth_pstorm_per_queue_stat);
1370 p_stats->tstats.address = 0;
1371 p_stats->tstats.len = 0;
1372}
1373
Yuval Mintz1408cc1f2016-05-11 16:36:14 +03001374static void qed_iov_vf_mbx_acquire(struct qed_hwfn *p_hwfn,
1375 struct qed_ptt *p_ptt,
1376 struct qed_vf_info *vf)
Yuval Mintz37bff2b2016-05-11 16:36:13 +03001377{
Yuval Mintz1408cc1f2016-05-11 16:36:14 +03001378 struct qed_iov_vf_mbx *mbx = &vf->vf_mbx;
1379 struct pfvf_acquire_resp_tlv *resp = &mbx->reply_virt->acquire_resp;
1380 struct pf_vf_pfdev_info *pfdev_info = &resp->pfdev_info;
1381 struct vfpf_acquire_tlv *req = &mbx->req_virt->acquire;
Yuval Mintz1cf2b1a2016-06-05 13:11:12 +03001382 u8 vfpf_status = PFVF_STATUS_NOT_SUPPORTED;
Yuval Mintz1408cc1f2016-05-11 16:36:14 +03001383 struct pf_vf_resc *resc = &resp->resc;
Yuval Mintz1fe614d2016-06-05 13:11:11 +03001384 int rc;
1385
1386 memset(resp, 0, sizeof(*resp));
Yuval Mintz1408cc1f2016-05-11 16:36:14 +03001387
Yuval Mintz05fafbf2016-08-19 09:33:31 +03001388 /* Write the PF version so that VF would know which version
1389 * is supported - might be later overriden. This guarantees that
1390 * VF could recognize legacy PF based on lack of versions in reply.
1391 */
1392 pfdev_info->major_fp_hsi = ETH_HSI_VER_MAJOR;
1393 pfdev_info->minor_fp_hsi = ETH_HSI_VER_MINOR;
1394
Yuval Mintza044df82016-08-22 13:25:09 +03001395 if (vf->state != VF_FREE && vf->state != VF_STOPPED) {
1396 DP_VERBOSE(p_hwfn,
1397 QED_MSG_IOV,
1398 "VF[%d] sent ACQUIRE but is already in state %d - fail request\n",
1399 vf->abs_vf_id, vf->state);
1400 goto out;
1401 }
1402
Yuval Mintz1408cc1f2016-05-11 16:36:14 +03001403 /* Validate FW compatibility */
Yuval Mintz1fe614d2016-06-05 13:11:11 +03001404 if (req->vfdev_info.eth_fp_hsi_major != ETH_HSI_VER_MAJOR) {
Yuval Mintza044df82016-08-22 13:25:09 +03001405 if (req->vfdev_info.capabilities &
1406 VFPF_ACQUIRE_CAP_PRE_FP_HSI) {
1407 struct vf_pf_vfdev_info *p_vfdev = &req->vfdev_info;
Yuval Mintz1fe614d2016-06-05 13:11:11 +03001408
Yuval Mintza044df82016-08-22 13:25:09 +03001409 DP_VERBOSE(p_hwfn, QED_MSG_IOV,
1410 "VF[%d] is pre-fastpath HSI\n",
1411 vf->abs_vf_id);
1412 p_vfdev->eth_fp_hsi_major = ETH_HSI_VER_MAJOR;
1413 p_vfdev->eth_fp_hsi_minor = ETH_HSI_VER_NO_PKT_LEN_TUNN;
1414 } else {
1415 DP_INFO(p_hwfn,
1416 "VF[%d] needs fastpath HSI %02x.%02x, which is incompatible with loaded FW's faspath HSI %02x.%02x\n",
1417 vf->abs_vf_id,
1418 req->vfdev_info.eth_fp_hsi_major,
1419 req->vfdev_info.eth_fp_hsi_minor,
1420 ETH_HSI_VER_MAJOR, ETH_HSI_VER_MINOR);
1421
1422 goto out;
1423 }
Yuval Mintz1408cc1f2016-05-11 16:36:14 +03001424 }
1425
1426 /* On 100g PFs, prevent old VFs from loading */
1427 if ((p_hwfn->cdev->num_hwfns > 1) &&
1428 !(req->vfdev_info.capabilities & VFPF_ACQUIRE_CAP_100G)) {
1429 DP_INFO(p_hwfn,
1430 "VF[%d] is running an old driver that doesn't support 100g\n",
1431 vf->abs_vf_id);
Yuval Mintz1408cc1f2016-05-11 16:36:14 +03001432 goto out;
1433 }
1434
Yuval Mintz1fe614d2016-06-05 13:11:11 +03001435 /* Store the acquire message */
1436 memcpy(&vf->acquire, req, sizeof(vf->acquire));
Yuval Mintz1408cc1f2016-05-11 16:36:14 +03001437
Yuval Mintz1408cc1f2016-05-11 16:36:14 +03001438 vf->opaque_fid = req->vfdev_info.opaque_fid;
Yuval Mintz1408cc1f2016-05-11 16:36:14 +03001439
1440 vf->vf_bulletin = req->bulletin_addr;
1441 vf->bulletin.size = (vf->bulletin.size < req->bulletin_size) ?
1442 vf->bulletin.size : req->bulletin_size;
1443
1444 /* fill in pfdev info */
1445 pfdev_info->chip_num = p_hwfn->cdev->chip_num;
1446 pfdev_info->db_size = 0;
1447 pfdev_info->indices_per_sb = PIS_PER_SB;
1448
1449 pfdev_info->capabilities = PFVF_ACQUIRE_CAP_DEFAULT_UNTAGGED |
1450 PFVF_ACQUIRE_CAP_POST_FW_OVERRIDE;
1451 if (p_hwfn->cdev->num_hwfns > 1)
1452 pfdev_info->capabilities |= PFVF_ACQUIRE_CAP_100G;
1453
Yuval Mintz1cf2b1a2016-06-05 13:11:12 +03001454 qed_iov_vf_mbx_acquire_stats(p_hwfn, &pfdev_info->stats_info);
Yuval Mintz1408cc1f2016-05-11 16:36:14 +03001455
1456 memcpy(pfdev_info->port_mac, p_hwfn->hw_info.hw_mac_addr, ETH_ALEN);
1457
1458 pfdev_info->fw_major = FW_MAJOR_VERSION;
1459 pfdev_info->fw_minor = FW_MINOR_VERSION;
1460 pfdev_info->fw_rev = FW_REVISION_VERSION;
1461 pfdev_info->fw_eng = FW_ENGINEERING_VERSION;
Yuval Mintza044df82016-08-22 13:25:09 +03001462
1463 /* Incorrect when legacy, but doesn't matter as legacy isn't reading
1464 * this field.
1465 */
Yuval Mintz1a635e42016-08-15 10:42:43 +03001466 pfdev_info->minor_fp_hsi = min_t(u8, ETH_HSI_VER_MINOR,
Yuval Mintz1fe614d2016-06-05 13:11:11 +03001467 req->vfdev_info.eth_fp_hsi_minor);
Yuval Mintz1408cc1f2016-05-11 16:36:14 +03001468 pfdev_info->os_type = VFPF_ACQUIRE_OS_LINUX;
1469 qed_mcp_get_mfw_ver(p_hwfn, p_ptt, &pfdev_info->mfw_ver, NULL);
1470
1471 pfdev_info->dev_type = p_hwfn->cdev->type;
1472 pfdev_info->chip_rev = p_hwfn->cdev->chip_rev;
1473
Yuval Mintz1cf2b1a2016-06-05 13:11:12 +03001474 /* Fill resources available to VF; Make sure there are enough to
1475 * satisfy the VF's request.
Yuval Mintz1408cc1f2016-05-11 16:36:14 +03001476 */
Yuval Mintz1cf2b1a2016-06-05 13:11:12 +03001477 vfpf_status = qed_iov_vf_mbx_acquire_resc(p_hwfn, p_ptt, vf,
1478 &req->resc_request, resc);
1479 if (vfpf_status != PFVF_STATUS_SUCCESS)
1480 goto out;
Yuval Mintz1408cc1f2016-05-11 16:36:14 +03001481
Yuval Mintz1fe614d2016-06-05 13:11:11 +03001482 /* Start the VF in FW */
1483 rc = qed_sp_vf_start(p_hwfn, vf);
1484 if (rc) {
1485 DP_NOTICE(p_hwfn, "Failed to start VF[%02x]\n", vf->abs_vf_id);
1486 vfpf_status = PFVF_STATUS_FAILURE;
1487 goto out;
1488 }
1489
Yuval Mintz1408cc1f2016-05-11 16:36:14 +03001490 /* Fill agreed size of bulletin board in response */
1491 resp->bulletin_size = vf->bulletin.size;
Yuval Mintz36558c32016-05-11 16:36:17 +03001492 qed_iov_post_vf_bulletin(p_hwfn, vf->relative_vf_id, p_ptt);
Yuval Mintz1408cc1f2016-05-11 16:36:14 +03001493
1494 DP_VERBOSE(p_hwfn,
1495 QED_MSG_IOV,
1496 "VF[%d] ACQUIRE_RESPONSE: pfdev_info- chip_num=0x%x, db_size=%d, idx_per_sb=%d, pf_cap=0x%llx\n"
1497 "resources- n_rxq-%d, n_txq-%d, n_sbs-%d, n_macs-%d, n_vlans-%d\n",
1498 vf->abs_vf_id,
1499 resp->pfdev_info.chip_num,
1500 resp->pfdev_info.db_size,
1501 resp->pfdev_info.indices_per_sb,
1502 resp->pfdev_info.capabilities,
1503 resc->num_rxqs,
1504 resc->num_txqs,
1505 resc->num_sbs,
1506 resc->num_mac_filters,
1507 resc->num_vlan_filters);
1508 vf->state = VF_ACQUIRED;
1509
1510 /* Prepare Response */
1511out:
1512 qed_iov_prepare_resp(p_hwfn, p_ptt, vf, CHANNEL_TLV_ACQUIRE,
1513 sizeof(struct pfvf_acquire_resp_tlv), vfpf_status);
Yuval Mintz37bff2b2016-05-11 16:36:13 +03001514}
1515
Yuval Mintz6ddc7602016-05-11 16:36:23 +03001516static int __qed_iov_spoofchk_set(struct qed_hwfn *p_hwfn,
1517 struct qed_vf_info *p_vf, bool val)
1518{
1519 struct qed_sp_vport_update_params params;
1520 int rc;
1521
1522 if (val == p_vf->spoof_chk) {
1523 DP_VERBOSE(p_hwfn, QED_MSG_IOV,
1524 "Spoofchk value[%d] is already configured\n", val);
1525 return 0;
1526 }
1527
1528 memset(&params, 0, sizeof(struct qed_sp_vport_update_params));
1529 params.opaque_fid = p_vf->opaque_fid;
1530 params.vport_id = p_vf->vport_id;
1531 params.update_anti_spoofing_en_flg = 1;
1532 params.anti_spoofing_en = val;
1533
1534 rc = qed_sp_vport_update(p_hwfn, &params, QED_SPQ_MODE_EBLOCK, NULL);
Yuval Mintzcb1fa082016-07-27 14:45:20 +03001535 if (!rc) {
Yuval Mintz6ddc7602016-05-11 16:36:23 +03001536 p_vf->spoof_chk = val;
1537 p_vf->req_spoofchk_val = p_vf->spoof_chk;
1538 DP_VERBOSE(p_hwfn, QED_MSG_IOV,
1539 "Spoofchk val[%d] configured\n", val);
1540 } else {
1541 DP_VERBOSE(p_hwfn, QED_MSG_IOV,
1542 "Spoofchk configuration[val:%d] failed for VF[%d]\n",
1543 val, p_vf->relative_vf_id);
1544 }
1545
1546 return rc;
1547}
1548
Yuval Mintz08feecd2016-05-11 16:36:20 +03001549static int qed_iov_reconfigure_unicast_vlan(struct qed_hwfn *p_hwfn,
1550 struct qed_vf_info *p_vf)
1551{
1552 struct qed_filter_ucast filter;
1553 int rc = 0;
1554 int i;
1555
1556 memset(&filter, 0, sizeof(filter));
1557 filter.is_rx_filter = 1;
1558 filter.is_tx_filter = 1;
1559 filter.vport_to_add_to = p_vf->vport_id;
1560 filter.opcode = QED_FILTER_ADD;
1561
1562 /* Reconfigure vlans */
1563 for (i = 0; i < QED_ETH_VF_NUM_VLAN_FILTERS + 1; i++) {
1564 if (!p_vf->shadow_config.vlans[i].used)
1565 continue;
1566
1567 filter.type = QED_FILTER_VLAN;
1568 filter.vlan = p_vf->shadow_config.vlans[i].vid;
Yuval Mintz1a635e42016-08-15 10:42:43 +03001569 DP_VERBOSE(p_hwfn, QED_MSG_IOV,
Yuval Mintz08feecd2016-05-11 16:36:20 +03001570 "Reconfiguring VLAN [0x%04x] for VF [%04x]\n",
1571 filter.vlan, p_vf->relative_vf_id);
Yuval Mintz1a635e42016-08-15 10:42:43 +03001572 rc = qed_sp_eth_filter_ucast(p_hwfn, p_vf->opaque_fid,
1573 &filter, QED_SPQ_MODE_CB, NULL);
Yuval Mintz08feecd2016-05-11 16:36:20 +03001574 if (rc) {
1575 DP_NOTICE(p_hwfn,
1576 "Failed to configure VLAN [%04x] to VF [%04x]\n",
1577 filter.vlan, p_vf->relative_vf_id);
1578 break;
1579 }
1580 }
1581
1582 return rc;
1583}
1584
1585static int
1586qed_iov_reconfigure_unicast_shadow(struct qed_hwfn *p_hwfn,
1587 struct qed_vf_info *p_vf, u64 events)
1588{
1589 int rc = 0;
1590
Yuval Mintz1a635e42016-08-15 10:42:43 +03001591 if ((events & BIT(VLAN_ADDR_FORCED)) &&
Yuval Mintz08feecd2016-05-11 16:36:20 +03001592 !(p_vf->configured_features & (1 << VLAN_ADDR_FORCED)))
1593 rc = qed_iov_reconfigure_unicast_vlan(p_hwfn, p_vf);
1594
1595 return rc;
1596}
1597
1598static int qed_iov_configure_vport_forced(struct qed_hwfn *p_hwfn,
1599 struct qed_vf_info *p_vf, u64 events)
1600{
1601 int rc = 0;
1602 struct qed_filter_ucast filter;
1603
1604 if (!p_vf->vport_instance)
1605 return -EINVAL;
1606
Yuval Mintz1a635e42016-08-15 10:42:43 +03001607 if (events & BIT(MAC_ADDR_FORCED)) {
Yuval Mintzeff16962016-05-11 16:36:21 +03001608 /* Since there's no way [currently] of removing the MAC,
1609 * we can always assume this means we need to force it.
1610 */
1611 memset(&filter, 0, sizeof(filter));
1612 filter.type = QED_FILTER_MAC;
1613 filter.opcode = QED_FILTER_REPLACE;
1614 filter.is_rx_filter = 1;
1615 filter.is_tx_filter = 1;
1616 filter.vport_to_add_to = p_vf->vport_id;
1617 ether_addr_copy(filter.mac, p_vf->bulletin.p_virt->mac);
1618
1619 rc = qed_sp_eth_filter_ucast(p_hwfn, p_vf->opaque_fid,
1620 &filter, QED_SPQ_MODE_CB, NULL);
1621 if (rc) {
1622 DP_NOTICE(p_hwfn,
1623 "PF failed to configure MAC for VF\n");
1624 return rc;
1625 }
1626
1627 p_vf->configured_features |= 1 << MAC_ADDR_FORCED;
1628 }
1629
Yuval Mintz1a635e42016-08-15 10:42:43 +03001630 if (events & BIT(VLAN_ADDR_FORCED)) {
Yuval Mintz08feecd2016-05-11 16:36:20 +03001631 struct qed_sp_vport_update_params vport_update;
1632 u8 removal;
1633 int i;
1634
1635 memset(&filter, 0, sizeof(filter));
1636 filter.type = QED_FILTER_VLAN;
1637 filter.is_rx_filter = 1;
1638 filter.is_tx_filter = 1;
1639 filter.vport_to_add_to = p_vf->vport_id;
1640 filter.vlan = p_vf->bulletin.p_virt->pvid;
1641 filter.opcode = filter.vlan ? QED_FILTER_REPLACE :
1642 QED_FILTER_FLUSH;
1643
1644 /* Send the ramrod */
1645 rc = qed_sp_eth_filter_ucast(p_hwfn, p_vf->opaque_fid,
1646 &filter, QED_SPQ_MODE_CB, NULL);
1647 if (rc) {
1648 DP_NOTICE(p_hwfn,
1649 "PF failed to configure VLAN for VF\n");
1650 return rc;
1651 }
1652
1653 /* Update the default-vlan & silent vlan stripping */
1654 memset(&vport_update, 0, sizeof(vport_update));
1655 vport_update.opaque_fid = p_vf->opaque_fid;
1656 vport_update.vport_id = p_vf->vport_id;
1657 vport_update.update_default_vlan_enable_flg = 1;
1658 vport_update.default_vlan_enable_flg = filter.vlan ? 1 : 0;
1659 vport_update.update_default_vlan_flg = 1;
1660 vport_update.default_vlan = filter.vlan;
1661
1662 vport_update.update_inner_vlan_removal_flg = 1;
1663 removal = filter.vlan ? 1
1664 : p_vf->shadow_config.inner_vlan_removal;
1665 vport_update.inner_vlan_removal_flg = removal;
1666 vport_update.silent_vlan_removal_flg = filter.vlan ? 1 : 0;
1667 rc = qed_sp_vport_update(p_hwfn,
1668 &vport_update,
1669 QED_SPQ_MODE_EBLOCK, NULL);
1670 if (rc) {
1671 DP_NOTICE(p_hwfn,
1672 "PF failed to configure VF vport for vlan\n");
1673 return rc;
1674 }
1675
1676 /* Update all the Rx queues */
1677 for (i = 0; i < QED_MAX_VF_CHAINS_PER_PF; i++) {
Mintz, Yuval3da7a372016-11-29 16:47:06 +02001678 struct qed_queue_cid *p_cid;
Yuval Mintz08feecd2016-05-11 16:36:20 +03001679
Mintz, Yuval3da7a372016-11-29 16:47:06 +02001680 p_cid = p_vf->vf_queues[i].p_rx_cid;
1681 if (!p_cid)
Yuval Mintz08feecd2016-05-11 16:36:20 +03001682 continue;
1683
Mintz, Yuval3da7a372016-11-29 16:47:06 +02001684 rc = qed_sp_eth_rx_queues_update(p_hwfn,
1685 (void **)&p_cid,
Yuval Mintz08feecd2016-05-11 16:36:20 +03001686 1, 0, 1,
1687 QED_SPQ_MODE_EBLOCK,
1688 NULL);
1689 if (rc) {
1690 DP_NOTICE(p_hwfn,
1691 "Failed to send Rx update fo queue[0x%04x]\n",
Mintz, Yuval3da7a372016-11-29 16:47:06 +02001692 p_cid->rel.queue_id);
Yuval Mintz08feecd2016-05-11 16:36:20 +03001693 return rc;
1694 }
1695 }
1696
1697 if (filter.vlan)
1698 p_vf->configured_features |= 1 << VLAN_ADDR_FORCED;
1699 else
Yuval Mintz1a635e42016-08-15 10:42:43 +03001700 p_vf->configured_features &= ~BIT(VLAN_ADDR_FORCED);
Yuval Mintz08feecd2016-05-11 16:36:20 +03001701 }
1702
1703 /* If forced features are terminated, we need to configure the shadow
1704 * configuration back again.
1705 */
1706 if (events)
1707 qed_iov_reconfigure_unicast_shadow(p_hwfn, p_vf, events);
1708
1709 return rc;
1710}
1711
Yuval Mintzdacd88d2016-05-11 16:36:16 +03001712static void qed_iov_vf_mbx_start_vport(struct qed_hwfn *p_hwfn,
1713 struct qed_ptt *p_ptt,
1714 struct qed_vf_info *vf)
1715{
1716 struct qed_sp_vport_start_params params = { 0 };
1717 struct qed_iov_vf_mbx *mbx = &vf->vf_mbx;
1718 struct vfpf_vport_start_tlv *start;
1719 u8 status = PFVF_STATUS_SUCCESS;
1720 struct qed_vf_info *vf_info;
Yuval Mintz08feecd2016-05-11 16:36:20 +03001721 u64 *p_bitmap;
Yuval Mintzdacd88d2016-05-11 16:36:16 +03001722 int sb_id;
1723 int rc;
1724
1725 vf_info = qed_iov_get_vf_info(p_hwfn, (u16) vf->relative_vf_id, true);
1726 if (!vf_info) {
1727 DP_NOTICE(p_hwfn->cdev,
1728 "Failed to get VF info, invalid vfid [%d]\n",
1729 vf->relative_vf_id);
1730 return;
1731 }
1732
1733 vf->state = VF_ENABLED;
1734 start = &mbx->req_virt->start_vport;
1735
1736 /* Initialize Status block in CAU */
1737 for (sb_id = 0; sb_id < vf->num_sbs; sb_id++) {
1738 if (!start->sb_addr[sb_id]) {
1739 DP_VERBOSE(p_hwfn, QED_MSG_IOV,
1740 "VF[%d] did not fill the address of SB %d\n",
1741 vf->relative_vf_id, sb_id);
1742 break;
1743 }
1744
1745 qed_int_cau_conf_sb(p_hwfn, p_ptt,
1746 start->sb_addr[sb_id],
Yuval Mintz1a635e42016-08-15 10:42:43 +03001747 vf->igu_sbs[sb_id], vf->abs_vf_id, 1);
Yuval Mintzdacd88d2016-05-11 16:36:16 +03001748 }
1749 qed_iov_enable_vf_traffic(p_hwfn, p_ptt, vf);
1750
1751 vf->mtu = start->mtu;
Yuval Mintz08feecd2016-05-11 16:36:20 +03001752 vf->shadow_config.inner_vlan_removal = start->inner_vlan_removal;
1753
1754 /* Take into consideration configuration forced by hypervisor;
1755 * If none is configured, use the supplied VF values [for old
1756 * vfs that would still be fine, since they passed '0' as padding].
1757 */
1758 p_bitmap = &vf_info->bulletin.p_virt->valid_bitmap;
Yuval Mintz1a635e42016-08-15 10:42:43 +03001759 if (!(*p_bitmap & BIT(VFPF_BULLETIN_UNTAGGED_DEFAULT_FORCED))) {
Yuval Mintz08feecd2016-05-11 16:36:20 +03001760 u8 vf_req = start->only_untagged;
1761
1762 vf_info->bulletin.p_virt->default_only_untagged = vf_req;
1763 *p_bitmap |= 1 << VFPF_BULLETIN_UNTAGGED_DEFAULT;
1764 }
Yuval Mintzdacd88d2016-05-11 16:36:16 +03001765
1766 params.tpa_mode = start->tpa_mode;
1767 params.remove_inner_vlan = start->inner_vlan_removal;
Yuval Mintz831bfb0e2016-05-11 16:36:25 +03001768 params.tx_switching = true;
Yuval Mintzdacd88d2016-05-11 16:36:16 +03001769
Yuval Mintz08feecd2016-05-11 16:36:20 +03001770 params.only_untagged = vf_info->bulletin.p_virt->default_only_untagged;
Yuval Mintzdacd88d2016-05-11 16:36:16 +03001771 params.drop_ttl0 = false;
1772 params.concrete_fid = vf->concrete_fid;
1773 params.opaque_fid = vf->opaque_fid;
1774 params.vport_id = vf->vport_id;
1775 params.max_buffers_per_cqe = start->max_buffers_per_cqe;
1776 params.mtu = vf->mtu;
Yuval Mintz11a85d72016-08-22 13:25:10 +03001777 params.check_mac = true;
Yuval Mintzdacd88d2016-05-11 16:36:16 +03001778
1779 rc = qed_sp_eth_vport_start(p_hwfn, &params);
Yuval Mintz1a635e42016-08-15 10:42:43 +03001780 if (rc) {
Yuval Mintzdacd88d2016-05-11 16:36:16 +03001781 DP_ERR(p_hwfn,
1782 "qed_iov_vf_mbx_start_vport returned error %d\n", rc);
1783 status = PFVF_STATUS_FAILURE;
1784 } else {
1785 vf->vport_instance++;
Yuval Mintz08feecd2016-05-11 16:36:20 +03001786
1787 /* Force configuration if needed on the newly opened vport */
1788 qed_iov_configure_vport_forced(p_hwfn, vf, *p_bitmap);
Yuval Mintz6ddc7602016-05-11 16:36:23 +03001789
1790 __qed_iov_spoofchk_set(p_hwfn, vf, vf->req_spoofchk_val);
Yuval Mintzdacd88d2016-05-11 16:36:16 +03001791 }
1792 qed_iov_prepare_resp(p_hwfn, p_ptt, vf, CHANNEL_TLV_VPORT_START,
1793 sizeof(struct pfvf_def_resp_tlv), status);
1794}
1795
1796static void qed_iov_vf_mbx_stop_vport(struct qed_hwfn *p_hwfn,
1797 struct qed_ptt *p_ptt,
1798 struct qed_vf_info *vf)
1799{
1800 u8 status = PFVF_STATUS_SUCCESS;
1801 int rc;
1802
1803 vf->vport_instance--;
Yuval Mintz6ddc7602016-05-11 16:36:23 +03001804 vf->spoof_chk = false;
Yuval Mintzdacd88d2016-05-11 16:36:16 +03001805
1806 rc = qed_sp_vport_stop(p_hwfn, vf->opaque_fid, vf->vport_id);
Yuval Mintz1a635e42016-08-15 10:42:43 +03001807 if (rc) {
Yuval Mintzdacd88d2016-05-11 16:36:16 +03001808 DP_ERR(p_hwfn, "qed_iov_vf_mbx_stop_vport returned error %d\n",
1809 rc);
1810 status = PFVF_STATUS_FAILURE;
1811 }
1812
Yuval Mintz08feecd2016-05-11 16:36:20 +03001813 /* Forget the configuration on the vport */
1814 vf->configured_features = 0;
1815 memset(&vf->shadow_config, 0, sizeof(vf->shadow_config));
1816
Yuval Mintzdacd88d2016-05-11 16:36:16 +03001817 qed_iov_prepare_resp(p_hwfn, p_ptt, vf, CHANNEL_TLV_VPORT_TEARDOWN,
1818 sizeof(struct pfvf_def_resp_tlv), status);
1819}
1820
Yuval Mintzdacd88d2016-05-11 16:36:16 +03001821static void qed_iov_vf_mbx_start_rxq_resp(struct qed_hwfn *p_hwfn,
1822 struct qed_ptt *p_ptt,
Yuval Mintza044df82016-08-22 13:25:09 +03001823 struct qed_vf_info *vf,
1824 u8 status, bool b_legacy)
Yuval Mintzdacd88d2016-05-11 16:36:16 +03001825{
1826 struct qed_iov_vf_mbx *mbx = &vf->vf_mbx;
1827 struct pfvf_start_queue_resp_tlv *p_tlv;
1828 struct vfpf_start_rxq_tlv *req;
Yuval Mintza044df82016-08-22 13:25:09 +03001829 u16 length;
Yuval Mintzdacd88d2016-05-11 16:36:16 +03001830
1831 mbx->offset = (u8 *)mbx->reply_virt;
1832
Yuval Mintza044df82016-08-22 13:25:09 +03001833 /* Taking a bigger struct instead of adding a TLV to list was a
1834 * mistake, but one which we're now stuck with, as some older
1835 * clients assume the size of the previous response.
1836 */
1837 if (!b_legacy)
1838 length = sizeof(*p_tlv);
1839 else
1840 length = sizeof(struct pfvf_def_resp_tlv);
1841
Yuval Mintzdacd88d2016-05-11 16:36:16 +03001842 p_tlv = qed_add_tlv(p_hwfn, &mbx->offset, CHANNEL_TLV_START_RXQ,
Yuval Mintza044df82016-08-22 13:25:09 +03001843 length);
Yuval Mintzdacd88d2016-05-11 16:36:16 +03001844 qed_add_tlv(p_hwfn, &mbx->offset, CHANNEL_TLV_LIST_END,
1845 sizeof(struct channel_list_end_tlv));
1846
1847 /* Update the TLV with the response */
Yuval Mintza044df82016-08-22 13:25:09 +03001848 if ((status == PFVF_STATUS_SUCCESS) && !b_legacy) {
Yuval Mintzdacd88d2016-05-11 16:36:16 +03001849 req = &mbx->req_virt->start_rxq;
Yuval Mintz351a4ded2016-06-02 10:23:29 +03001850 p_tlv->offset = PXP_VF_BAR0_START_MSDM_ZONE_B +
1851 offsetof(struct mstorm_vf_zone,
1852 non_trigger.eth_rx_queue_producers) +
1853 sizeof(struct eth_rx_prod_data) * req->rx_qid;
Yuval Mintzdacd88d2016-05-11 16:36:16 +03001854 }
1855
Yuval Mintza044df82016-08-22 13:25:09 +03001856 qed_iov_send_response(p_hwfn, p_ptt, vf, length, status);
Yuval Mintzdacd88d2016-05-11 16:36:16 +03001857}
1858
1859static void qed_iov_vf_mbx_start_rxq(struct qed_hwfn *p_hwfn,
1860 struct qed_ptt *p_ptt,
1861 struct qed_vf_info *vf)
1862{
1863 struct qed_queue_start_common_params params;
1864 struct qed_iov_vf_mbx *mbx = &vf->vf_mbx;
Yuval Mintz41086462016-06-05 13:11:13 +03001865 u8 status = PFVF_STATUS_NO_RESOURCE;
Mintz, Yuval3da7a372016-11-29 16:47:06 +02001866 struct qed_vf_q_info *p_queue;
Yuval Mintzdacd88d2016-05-11 16:36:16 +03001867 struct vfpf_start_rxq_tlv *req;
Yuval Mintza044df82016-08-22 13:25:09 +03001868 bool b_legacy_vf = false;
Yuval Mintzdacd88d2016-05-11 16:36:16 +03001869 int rc;
1870
Yuval Mintzdacd88d2016-05-11 16:36:16 +03001871 req = &mbx->req_virt->start_rxq;
Yuval Mintz41086462016-06-05 13:11:13 +03001872
1873 if (!qed_iov_validate_rxq(p_hwfn, vf, req->rx_qid) ||
1874 !qed_iov_validate_sb(p_hwfn, vf, req->hw_sb))
1875 goto out;
1876
Mintz, Yuval3da7a372016-11-29 16:47:06 +02001877 /* Acquire a new queue-cid */
1878 p_queue = &vf->vf_queues[req->rx_qid];
1879
1880 memset(&params, 0, sizeof(params));
1881 params.queue_id = p_queue->fw_rx_qid;
Yuval Mintzdacd88d2016-05-11 16:36:16 +03001882 params.vport_id = vf->vport_id;
Mintz, Yuval3da7a372016-11-29 16:47:06 +02001883 params.stats_id = vf->abs_vf_id + 0x10;
Yuval Mintzdacd88d2016-05-11 16:36:16 +03001884 params.sb = req->hw_sb;
1885 params.sb_idx = req->sb_index;
1886
Mintz, Yuval3da7a372016-11-29 16:47:06 +02001887 p_queue->p_rx_cid = _qed_eth_queue_to_cid(p_hwfn,
1888 vf->opaque_fid,
1889 p_queue->fw_cid,
1890 req->rx_qid, &params);
1891 if (!p_queue->p_rx_cid)
1892 goto out;
1893
Yuval Mintza044df82016-08-22 13:25:09 +03001894 /* Legacy VFs have their Producers in a different location, which they
1895 * calculate on their own and clean the producer prior to this.
1896 */
1897 if (vf->acquire.vfdev_info.eth_fp_hsi_minor ==
1898 ETH_HSI_VER_NO_PKT_LEN_TUNN) {
1899 b_legacy_vf = true;
1900 } else {
1901 REG_WR(p_hwfn,
1902 GTT_BAR0_MAP_REG_MSDM_RAM +
1903 MSTORM_ETH_VF_PRODS_OFFSET(vf->abs_vf_id, req->rx_qid),
1904 0);
1905 }
Mintz, Yuval3da7a372016-11-29 16:47:06 +02001906 p_queue->p_rx_cid->b_legacy_vf = b_legacy_vf;
Yuval Mintza044df82016-08-22 13:25:09 +03001907
Mintz, Yuval3da7a372016-11-29 16:47:06 +02001908 rc = qed_eth_rxq_start_ramrod(p_hwfn,
1909 p_queue->p_rx_cid,
1910 req->bd_max_bytes,
1911 req->rxq_addr,
1912 req->cqe_pbl_addr, req->cqe_pbl_size);
Yuval Mintzdacd88d2016-05-11 16:36:16 +03001913 if (rc) {
1914 status = PFVF_STATUS_FAILURE;
Mintz, Yuval3da7a372016-11-29 16:47:06 +02001915 qed_eth_queue_cid_release(p_hwfn, p_queue->p_rx_cid);
1916 p_queue->p_rx_cid = NULL;
Yuval Mintzdacd88d2016-05-11 16:36:16 +03001917 } else {
Yuval Mintz41086462016-06-05 13:11:13 +03001918 status = PFVF_STATUS_SUCCESS;
Yuval Mintzdacd88d2016-05-11 16:36:16 +03001919 vf->num_active_rxqs++;
1920 }
1921
Yuval Mintz41086462016-06-05 13:11:13 +03001922out:
Yuval Mintza044df82016-08-22 13:25:09 +03001923 qed_iov_vf_mbx_start_rxq_resp(p_hwfn, p_ptt, vf, status, b_legacy_vf);
Yuval Mintzdacd88d2016-05-11 16:36:16 +03001924}
1925
Yuval Mintz5040acf2016-06-05 13:11:14 +03001926static void qed_iov_vf_mbx_start_txq_resp(struct qed_hwfn *p_hwfn,
1927 struct qed_ptt *p_ptt,
1928 struct qed_vf_info *p_vf, u8 status)
1929{
1930 struct qed_iov_vf_mbx *mbx = &p_vf->vf_mbx;
1931 struct pfvf_start_queue_resp_tlv *p_tlv;
Yuval Mintza044df82016-08-22 13:25:09 +03001932 bool b_legacy = false;
1933 u16 length;
Yuval Mintz5040acf2016-06-05 13:11:14 +03001934
1935 mbx->offset = (u8 *)mbx->reply_virt;
1936
Yuval Mintza044df82016-08-22 13:25:09 +03001937 /* Taking a bigger struct instead of adding a TLV to list was a
1938 * mistake, but one which we're now stuck with, as some older
1939 * clients assume the size of the previous response.
1940 */
1941 if (p_vf->acquire.vfdev_info.eth_fp_hsi_minor ==
1942 ETH_HSI_VER_NO_PKT_LEN_TUNN)
1943 b_legacy = true;
1944
1945 if (!b_legacy)
1946 length = sizeof(*p_tlv);
1947 else
1948 length = sizeof(struct pfvf_def_resp_tlv);
1949
Yuval Mintz5040acf2016-06-05 13:11:14 +03001950 p_tlv = qed_add_tlv(p_hwfn, &mbx->offset, CHANNEL_TLV_START_TXQ,
Yuval Mintza044df82016-08-22 13:25:09 +03001951 length);
Yuval Mintz5040acf2016-06-05 13:11:14 +03001952 qed_add_tlv(p_hwfn, &mbx->offset, CHANNEL_TLV_LIST_END,
1953 sizeof(struct channel_list_end_tlv));
1954
1955 /* Update the TLV with the response */
Yuval Mintza044df82016-08-22 13:25:09 +03001956 if ((status == PFVF_STATUS_SUCCESS) && !b_legacy) {
Yuval Mintz5040acf2016-06-05 13:11:14 +03001957 u16 qid = mbx->req_virt->start_txq.tx_qid;
1958
Ram Amrani51ff1722016-10-01 21:59:57 +03001959 p_tlv->offset = qed_db_addr_vf(p_vf->vf_queues[qid].fw_cid,
1960 DQ_DEMS_LEGACY);
Yuval Mintz5040acf2016-06-05 13:11:14 +03001961 }
1962
Yuval Mintza044df82016-08-22 13:25:09 +03001963 qed_iov_send_response(p_hwfn, p_ptt, p_vf, length, status);
Yuval Mintz5040acf2016-06-05 13:11:14 +03001964}
1965
Yuval Mintzdacd88d2016-05-11 16:36:16 +03001966static void qed_iov_vf_mbx_start_txq(struct qed_hwfn *p_hwfn,
1967 struct qed_ptt *p_ptt,
1968 struct qed_vf_info *vf)
1969{
Yuval Mintzdacd88d2016-05-11 16:36:16 +03001970 struct qed_queue_start_common_params params;
1971 struct qed_iov_vf_mbx *mbx = &vf->vf_mbx;
Yuval Mintz41086462016-06-05 13:11:13 +03001972 u8 status = PFVF_STATUS_NO_RESOURCE;
Yuval Mintzdacd88d2016-05-11 16:36:16 +03001973 union qed_qm_pq_params pq_params;
Yuval Mintzdacd88d2016-05-11 16:36:16 +03001974 struct vfpf_start_txq_tlv *req;
Mintz, Yuval3da7a372016-11-29 16:47:06 +02001975 struct qed_vf_q_info *p_queue;
Yuval Mintzdacd88d2016-05-11 16:36:16 +03001976 int rc;
Mintz, Yuval3da7a372016-11-29 16:47:06 +02001977 u16 pq;
Yuval Mintzdacd88d2016-05-11 16:36:16 +03001978
1979 /* Prepare the parameters which would choose the right PQ */
1980 memset(&pq_params, 0, sizeof(pq_params));
1981 pq_params.eth.is_vf = 1;
1982 pq_params.eth.vf_id = vf->relative_vf_id;
1983
1984 memset(&params, 0, sizeof(params));
1985 req = &mbx->req_virt->start_txq;
Yuval Mintz41086462016-06-05 13:11:13 +03001986
1987 if (!qed_iov_validate_txq(p_hwfn, vf, req->tx_qid) ||
1988 !qed_iov_validate_sb(p_hwfn, vf, req->hw_sb))
1989 goto out;
1990
Mintz, Yuval3da7a372016-11-29 16:47:06 +02001991 /* Acquire a new queue-cid */
1992 p_queue = &vf->vf_queues[req->tx_qid];
1993
1994 params.queue_id = p_queue->fw_tx_qid;
Yuval Mintzdacd88d2016-05-11 16:36:16 +03001995 params.vport_id = vf->vport_id;
Mintz, Yuval3da7a372016-11-29 16:47:06 +02001996 params.stats_id = vf->abs_vf_id + 0x10;
Yuval Mintzdacd88d2016-05-11 16:36:16 +03001997 params.sb = req->hw_sb;
1998 params.sb_idx = req->sb_index;
1999
Mintz, Yuval3da7a372016-11-29 16:47:06 +02002000 p_queue->p_tx_cid = _qed_eth_queue_to_cid(p_hwfn,
2001 vf->opaque_fid,
2002 p_queue->fw_cid,
2003 req->tx_qid, &params);
2004 if (!p_queue->p_tx_cid)
2005 goto out;
Yuval Mintzdacd88d2016-05-11 16:36:16 +03002006
Mintz, Yuval3da7a372016-11-29 16:47:06 +02002007 pq = qed_get_qm_pq(p_hwfn, PROTOCOLID_ETH, &pq_params);
2008 rc = qed_eth_txq_start_ramrod(p_hwfn, p_queue->p_tx_cid,
2009 req->pbl_addr, req->pbl_size, pq);
Yuval Mintz41086462016-06-05 13:11:13 +03002010 if (rc) {
Yuval Mintzdacd88d2016-05-11 16:36:16 +03002011 status = PFVF_STATUS_FAILURE;
Mintz, Yuval3da7a372016-11-29 16:47:06 +02002012 qed_eth_queue_cid_release(p_hwfn, p_queue->p_tx_cid);
2013 p_queue->p_tx_cid = NULL;
Yuval Mintz41086462016-06-05 13:11:13 +03002014 } else {
2015 status = PFVF_STATUS_SUCCESS;
Yuval Mintz41086462016-06-05 13:11:13 +03002016 }
Yuval Mintzdacd88d2016-05-11 16:36:16 +03002017
Yuval Mintz41086462016-06-05 13:11:13 +03002018out:
Yuval Mintz5040acf2016-06-05 13:11:14 +03002019 qed_iov_vf_mbx_start_txq_resp(p_hwfn, p_ptt, vf, status);
Yuval Mintzdacd88d2016-05-11 16:36:16 +03002020}
2021
2022static int qed_iov_vf_stop_rxqs(struct qed_hwfn *p_hwfn,
2023 struct qed_vf_info *vf,
2024 u16 rxq_id, u8 num_rxqs, bool cqe_completion)
2025{
Mintz, Yuval3da7a372016-11-29 16:47:06 +02002026 struct qed_vf_q_info *p_queue;
Yuval Mintzdacd88d2016-05-11 16:36:16 +03002027 int rc = 0;
2028 int qid;
2029
2030 if (rxq_id + num_rxqs > ARRAY_SIZE(vf->vf_queues))
2031 return -EINVAL;
2032
2033 for (qid = rxq_id; qid < rxq_id + num_rxqs; qid++) {
Mintz, Yuval3da7a372016-11-29 16:47:06 +02002034 p_queue = &vf->vf_queues[qid];
Yuval Mintzdacd88d2016-05-11 16:36:16 +03002035
Mintz, Yuval3da7a372016-11-29 16:47:06 +02002036 if (!p_queue->p_rx_cid)
2037 continue;
2038
2039 rc = qed_eth_rx_queue_stop(p_hwfn,
2040 p_queue->p_rx_cid,
2041 false, cqe_completion);
2042 if (rc)
2043 return rc;
2044
2045 vf->vf_queues[qid].p_rx_cid = NULL;
Yuval Mintzdacd88d2016-05-11 16:36:16 +03002046 vf->num_active_rxqs--;
2047 }
2048
2049 return rc;
2050}
2051
2052static int qed_iov_vf_stop_txqs(struct qed_hwfn *p_hwfn,
2053 struct qed_vf_info *vf, u16 txq_id, u8 num_txqs)
2054{
2055 int rc = 0;
Mintz, Yuval3da7a372016-11-29 16:47:06 +02002056 struct qed_vf_q_info *p_queue;
Yuval Mintzdacd88d2016-05-11 16:36:16 +03002057 int qid;
2058
2059 if (txq_id + num_txqs > ARRAY_SIZE(vf->vf_queues))
2060 return -EINVAL;
2061
2062 for (qid = txq_id; qid < txq_id + num_txqs; qid++) {
Mintz, Yuval3da7a372016-11-29 16:47:06 +02002063 p_queue = &vf->vf_queues[qid];
2064 if (!p_queue->p_tx_cid)
2065 continue;
Yuval Mintzdacd88d2016-05-11 16:36:16 +03002066
Mintz, Yuval3da7a372016-11-29 16:47:06 +02002067 rc = qed_eth_tx_queue_stop(p_hwfn, p_queue->p_tx_cid);
2068 if (rc)
2069 return rc;
2070
2071 p_queue->p_tx_cid = NULL;
Yuval Mintzdacd88d2016-05-11 16:36:16 +03002072 }
Mintz, Yuval3da7a372016-11-29 16:47:06 +02002073
Yuval Mintzdacd88d2016-05-11 16:36:16 +03002074 return rc;
2075}
2076
2077static void qed_iov_vf_mbx_stop_rxqs(struct qed_hwfn *p_hwfn,
2078 struct qed_ptt *p_ptt,
2079 struct qed_vf_info *vf)
2080{
2081 u16 length = sizeof(struct pfvf_def_resp_tlv);
2082 struct qed_iov_vf_mbx *mbx = &vf->vf_mbx;
2083 u8 status = PFVF_STATUS_SUCCESS;
2084 struct vfpf_stop_rxqs_tlv *req;
2085 int rc;
2086
2087 /* We give the option of starting from qid != 0, in this case we
2088 * need to make sure that qid + num_qs doesn't exceed the actual
2089 * amount of queues that exist.
2090 */
2091 req = &mbx->req_virt->stop_rxqs;
2092 rc = qed_iov_vf_stop_rxqs(p_hwfn, vf, req->rx_qid,
2093 req->num_rxqs, req->cqe_completion);
2094 if (rc)
2095 status = PFVF_STATUS_FAILURE;
2096
2097 qed_iov_prepare_resp(p_hwfn, p_ptt, vf, CHANNEL_TLV_STOP_RXQS,
2098 length, status);
2099}
2100
2101static void qed_iov_vf_mbx_stop_txqs(struct qed_hwfn *p_hwfn,
2102 struct qed_ptt *p_ptt,
2103 struct qed_vf_info *vf)
2104{
2105 u16 length = sizeof(struct pfvf_def_resp_tlv);
2106 struct qed_iov_vf_mbx *mbx = &vf->vf_mbx;
2107 u8 status = PFVF_STATUS_SUCCESS;
2108 struct vfpf_stop_txqs_tlv *req;
2109 int rc;
2110
2111 /* We give the option of starting from qid != 0, in this case we
2112 * need to make sure that qid + num_qs doesn't exceed the actual
2113 * amount of queues that exist.
2114 */
2115 req = &mbx->req_virt->stop_txqs;
2116 rc = qed_iov_vf_stop_txqs(p_hwfn, vf, req->tx_qid, req->num_txqs);
2117 if (rc)
2118 status = PFVF_STATUS_FAILURE;
2119
2120 qed_iov_prepare_resp(p_hwfn, p_ptt, vf, CHANNEL_TLV_STOP_TXQS,
2121 length, status);
2122}
2123
Yuval Mintz17b235c2016-05-11 16:36:18 +03002124static void qed_iov_vf_mbx_update_rxqs(struct qed_hwfn *p_hwfn,
2125 struct qed_ptt *p_ptt,
2126 struct qed_vf_info *vf)
2127{
Mintz, Yuval3da7a372016-11-29 16:47:06 +02002128 struct qed_queue_cid *handlers[QED_MAX_VF_CHAINS_PER_PF];
Yuval Mintz17b235c2016-05-11 16:36:18 +03002129 u16 length = sizeof(struct pfvf_def_resp_tlv);
2130 struct qed_iov_vf_mbx *mbx = &vf->vf_mbx;
2131 struct vfpf_update_rxq_tlv *req;
Mintz, Yuval3da7a372016-11-29 16:47:06 +02002132 u8 status = PFVF_STATUS_FAILURE;
Yuval Mintz17b235c2016-05-11 16:36:18 +03002133 u8 complete_event_flg;
2134 u8 complete_cqe_flg;
2135 u16 qid;
2136 int rc;
2137 u8 i;
2138
2139 req = &mbx->req_virt->update_rxq;
2140 complete_cqe_flg = !!(req->flags & VFPF_RXQ_UPD_COMPLETE_CQE_FLAG);
2141 complete_event_flg = !!(req->flags & VFPF_RXQ_UPD_COMPLETE_EVENT_FLAG);
2142
Mintz, Yuval3da7a372016-11-29 16:47:06 +02002143 /* Validate inputs */
2144 if (req->num_rxqs + req->rx_qid > QED_MAX_VF_CHAINS_PER_PF ||
2145 !qed_iov_validate_rxq(p_hwfn, vf, req->rx_qid)) {
2146 DP_INFO(p_hwfn, "VF[%d]: Incorrect Rxqs [%04x, %02x]\n",
2147 vf->relative_vf_id, req->rx_qid, req->num_rxqs);
2148 goto out;
Yuval Mintz17b235c2016-05-11 16:36:18 +03002149 }
2150
Mintz, Yuval3da7a372016-11-29 16:47:06 +02002151 for (i = 0; i < req->num_rxqs; i++) {
2152 qid = req->rx_qid + i;
2153 if (!vf->vf_queues[qid].p_rx_cid) {
2154 DP_INFO(p_hwfn,
2155 "VF[%d] rx_qid = %d isn`t active!\n",
2156 vf->relative_vf_id, qid);
2157 goto out;
2158 }
2159
2160 handlers[i] = vf->vf_queues[qid].p_rx_cid;
2161 }
2162
2163 rc = qed_sp_eth_rx_queues_update(p_hwfn, (void **)&handlers,
2164 req->num_rxqs,
2165 complete_cqe_flg,
2166 complete_event_flg,
2167 QED_SPQ_MODE_EBLOCK, NULL);
2168 if (rc)
2169 goto out;
2170
2171 status = PFVF_STATUS_SUCCESS;
2172out:
Yuval Mintz17b235c2016-05-11 16:36:18 +03002173 qed_iov_prepare_resp(p_hwfn, p_ptt, vf, CHANNEL_TLV_UPDATE_RXQ,
2174 length, status);
2175}
2176
Yuval Mintzdacd88d2016-05-11 16:36:16 +03002177void *qed_iov_search_list_tlvs(struct qed_hwfn *p_hwfn,
2178 void *p_tlvs_list, u16 req_type)
2179{
2180 struct channel_tlv *p_tlv = (struct channel_tlv *)p_tlvs_list;
2181 int len = 0;
2182
2183 do {
2184 if (!p_tlv->length) {
2185 DP_NOTICE(p_hwfn, "Zero length TLV found\n");
2186 return NULL;
2187 }
2188
2189 if (p_tlv->type == req_type) {
2190 DP_VERBOSE(p_hwfn, QED_MSG_IOV,
2191 "Extended tlv type %d, length %d found\n",
2192 p_tlv->type, p_tlv->length);
2193 return p_tlv;
2194 }
2195
2196 len += p_tlv->length;
2197 p_tlv = (struct channel_tlv *)((u8 *)p_tlv + p_tlv->length);
2198
2199 if ((len + p_tlv->length) > TLV_BUFFER_SIZE) {
2200 DP_NOTICE(p_hwfn, "TLVs has overrun the buffer size\n");
2201 return NULL;
2202 }
2203 } while (p_tlv->type != CHANNEL_TLV_LIST_END);
2204
2205 return NULL;
2206}
2207
2208static void
2209qed_iov_vp_update_act_param(struct qed_hwfn *p_hwfn,
2210 struct qed_sp_vport_update_params *p_data,
2211 struct qed_iov_vf_mbx *p_mbx, u16 *tlvs_mask)
2212{
2213 struct vfpf_vport_update_activate_tlv *p_act_tlv;
2214 u16 tlv = CHANNEL_TLV_VPORT_UPDATE_ACTIVATE;
2215
2216 p_act_tlv = (struct vfpf_vport_update_activate_tlv *)
2217 qed_iov_search_list_tlvs(p_hwfn, p_mbx->req_virt, tlv);
2218 if (!p_act_tlv)
2219 return;
2220
2221 p_data->update_vport_active_rx_flg = p_act_tlv->update_rx;
2222 p_data->vport_active_rx_flg = p_act_tlv->active_rx;
2223 p_data->update_vport_active_tx_flg = p_act_tlv->update_tx;
2224 p_data->vport_active_tx_flg = p_act_tlv->active_tx;
2225 *tlvs_mask |= 1 << QED_IOV_VP_UPDATE_ACTIVATE;
2226}
2227
2228static void
Yuval Mintz17b235c2016-05-11 16:36:18 +03002229qed_iov_vp_update_vlan_param(struct qed_hwfn *p_hwfn,
2230 struct qed_sp_vport_update_params *p_data,
2231 struct qed_vf_info *p_vf,
2232 struct qed_iov_vf_mbx *p_mbx, u16 *tlvs_mask)
2233{
2234 struct vfpf_vport_update_vlan_strip_tlv *p_vlan_tlv;
2235 u16 tlv = CHANNEL_TLV_VPORT_UPDATE_VLAN_STRIP;
2236
2237 p_vlan_tlv = (struct vfpf_vport_update_vlan_strip_tlv *)
2238 qed_iov_search_list_tlvs(p_hwfn, p_mbx->req_virt, tlv);
2239 if (!p_vlan_tlv)
2240 return;
2241
Yuval Mintz08feecd2016-05-11 16:36:20 +03002242 p_vf->shadow_config.inner_vlan_removal = p_vlan_tlv->remove_vlan;
2243
2244 /* Ignore the VF request if we're forcing a vlan */
Yuval Mintz1a635e42016-08-15 10:42:43 +03002245 if (!(p_vf->configured_features & BIT(VLAN_ADDR_FORCED))) {
Yuval Mintz08feecd2016-05-11 16:36:20 +03002246 p_data->update_inner_vlan_removal_flg = 1;
2247 p_data->inner_vlan_removal_flg = p_vlan_tlv->remove_vlan;
2248 }
Yuval Mintz17b235c2016-05-11 16:36:18 +03002249
2250 *tlvs_mask |= 1 << QED_IOV_VP_UPDATE_VLAN_STRIP;
2251}
2252
2253static void
2254qed_iov_vp_update_tx_switch(struct qed_hwfn *p_hwfn,
2255 struct qed_sp_vport_update_params *p_data,
2256 struct qed_iov_vf_mbx *p_mbx, u16 *tlvs_mask)
2257{
2258 struct vfpf_vport_update_tx_switch_tlv *p_tx_switch_tlv;
2259 u16 tlv = CHANNEL_TLV_VPORT_UPDATE_TX_SWITCH;
2260
2261 p_tx_switch_tlv = (struct vfpf_vport_update_tx_switch_tlv *)
2262 qed_iov_search_list_tlvs(p_hwfn, p_mbx->req_virt,
2263 tlv);
2264 if (!p_tx_switch_tlv)
2265 return;
2266
2267 p_data->update_tx_switching_flg = 1;
2268 p_data->tx_switching_flg = p_tx_switch_tlv->tx_switching;
2269 *tlvs_mask |= 1 << QED_IOV_VP_UPDATE_TX_SWITCH;
2270}
2271
2272static void
Yuval Mintzdacd88d2016-05-11 16:36:16 +03002273qed_iov_vp_update_mcast_bin_param(struct qed_hwfn *p_hwfn,
2274 struct qed_sp_vport_update_params *p_data,
2275 struct qed_iov_vf_mbx *p_mbx, u16 *tlvs_mask)
2276{
2277 struct vfpf_vport_update_mcast_bin_tlv *p_mcast_tlv;
2278 u16 tlv = CHANNEL_TLV_VPORT_UPDATE_MCAST;
2279
2280 p_mcast_tlv = (struct vfpf_vport_update_mcast_bin_tlv *)
2281 qed_iov_search_list_tlvs(p_hwfn, p_mbx->req_virt, tlv);
2282 if (!p_mcast_tlv)
2283 return;
2284
2285 p_data->update_approx_mcast_flg = 1;
2286 memcpy(p_data->bins, p_mcast_tlv->bins,
2287 sizeof(unsigned long) * ETH_MULTICAST_MAC_BINS_IN_REGS);
2288 *tlvs_mask |= 1 << QED_IOV_VP_UPDATE_MCAST;
2289}
2290
2291static void
2292qed_iov_vp_update_accept_flag(struct qed_hwfn *p_hwfn,
2293 struct qed_sp_vport_update_params *p_data,
2294 struct qed_iov_vf_mbx *p_mbx, u16 *tlvs_mask)
2295{
2296 struct qed_filter_accept_flags *p_flags = &p_data->accept_flags;
2297 struct vfpf_vport_update_accept_param_tlv *p_accept_tlv;
2298 u16 tlv = CHANNEL_TLV_VPORT_UPDATE_ACCEPT_PARAM;
2299
2300 p_accept_tlv = (struct vfpf_vport_update_accept_param_tlv *)
2301 qed_iov_search_list_tlvs(p_hwfn, p_mbx->req_virt, tlv);
2302 if (!p_accept_tlv)
2303 return;
2304
2305 p_flags->update_rx_mode_config = p_accept_tlv->update_rx_mode;
2306 p_flags->rx_accept_filter = p_accept_tlv->rx_accept_filter;
2307 p_flags->update_tx_mode_config = p_accept_tlv->update_tx_mode;
2308 p_flags->tx_accept_filter = p_accept_tlv->tx_accept_filter;
2309 *tlvs_mask |= 1 << QED_IOV_VP_UPDATE_ACCEPT_PARAM;
2310}
2311
2312static void
Yuval Mintz17b235c2016-05-11 16:36:18 +03002313qed_iov_vp_update_accept_any_vlan(struct qed_hwfn *p_hwfn,
2314 struct qed_sp_vport_update_params *p_data,
2315 struct qed_iov_vf_mbx *p_mbx, u16 *tlvs_mask)
2316{
2317 struct vfpf_vport_update_accept_any_vlan_tlv *p_accept_any_vlan;
2318 u16 tlv = CHANNEL_TLV_VPORT_UPDATE_ACCEPT_ANY_VLAN;
2319
2320 p_accept_any_vlan = (struct vfpf_vport_update_accept_any_vlan_tlv *)
2321 qed_iov_search_list_tlvs(p_hwfn, p_mbx->req_virt,
2322 tlv);
2323 if (!p_accept_any_vlan)
2324 return;
2325
2326 p_data->accept_any_vlan = p_accept_any_vlan->accept_any_vlan;
2327 p_data->update_accept_any_vlan_flg =
2328 p_accept_any_vlan->update_accept_any_vlan_flg;
2329 *tlvs_mask |= 1 << QED_IOV_VP_UPDATE_ACCEPT_ANY_VLAN;
2330}
2331
2332static void
Yuval Mintzdacd88d2016-05-11 16:36:16 +03002333qed_iov_vp_update_rss_param(struct qed_hwfn *p_hwfn,
2334 struct qed_vf_info *vf,
2335 struct qed_sp_vport_update_params *p_data,
2336 struct qed_rss_params *p_rss,
Mintz, Yuvalf29ffdb2017-01-01 13:57:07 +02002337 struct qed_iov_vf_mbx *p_mbx,
2338 u16 *tlvs_mask, u16 *tlvs_accepted)
Yuval Mintzdacd88d2016-05-11 16:36:16 +03002339{
2340 struct vfpf_vport_update_rss_tlv *p_rss_tlv;
2341 u16 tlv = CHANNEL_TLV_VPORT_UPDATE_RSS;
Mintz, Yuvalf29ffdb2017-01-01 13:57:07 +02002342 bool b_reject = false;
Yuval Mintzdacd88d2016-05-11 16:36:16 +03002343 u16 table_size;
Mintz, Yuvalf29ffdb2017-01-01 13:57:07 +02002344 u16 i, q_idx;
Yuval Mintzdacd88d2016-05-11 16:36:16 +03002345
2346 p_rss_tlv = (struct vfpf_vport_update_rss_tlv *)
2347 qed_iov_search_list_tlvs(p_hwfn, p_mbx->req_virt, tlv);
2348 if (!p_rss_tlv) {
2349 p_data->rss_params = NULL;
2350 return;
2351 }
2352
2353 memset(p_rss, 0, sizeof(struct qed_rss_params));
2354
2355 p_rss->update_rss_config = !!(p_rss_tlv->update_rss_flags &
2356 VFPF_UPDATE_RSS_CONFIG_FLAG);
2357 p_rss->update_rss_capabilities = !!(p_rss_tlv->update_rss_flags &
2358 VFPF_UPDATE_RSS_CAPS_FLAG);
2359 p_rss->update_rss_ind_table = !!(p_rss_tlv->update_rss_flags &
2360 VFPF_UPDATE_RSS_IND_TABLE_FLAG);
2361 p_rss->update_rss_key = !!(p_rss_tlv->update_rss_flags &
2362 VFPF_UPDATE_RSS_KEY_FLAG);
2363
2364 p_rss->rss_enable = p_rss_tlv->rss_enable;
2365 p_rss->rss_eng_id = vf->relative_vf_id + 1;
2366 p_rss->rss_caps = p_rss_tlv->rss_caps;
2367 p_rss->rss_table_size_log = p_rss_tlv->rss_table_size_log;
Yuval Mintzdacd88d2016-05-11 16:36:16 +03002368 memcpy(p_rss->rss_key, p_rss_tlv->rss_key, sizeof(p_rss->rss_key));
2369
2370 table_size = min_t(u16, ARRAY_SIZE(p_rss->rss_ind_table),
2371 (1 << p_rss_tlv->rss_table_size_log));
2372
Yuval Mintzdacd88d2016-05-11 16:36:16 +03002373 for (i = 0; i < table_size; i++) {
Mintz, Yuvalf29ffdb2017-01-01 13:57:07 +02002374 q_idx = p_rss_tlv->rss_ind_table[i];
2375 if (!qed_iov_validate_rxq(p_hwfn, vf, q_idx)) {
2376 DP_VERBOSE(p_hwfn,
2377 QED_MSG_IOV,
2378 "VF[%d]: Omitting RSS due to wrong queue %04x\n",
2379 vf->relative_vf_id, q_idx);
2380 b_reject = true;
2381 goto out;
2382 }
Yuval Mintzdacd88d2016-05-11 16:36:16 +03002383
Mintz, Yuvalf29ffdb2017-01-01 13:57:07 +02002384 if (!vf->vf_queues[q_idx].p_rx_cid) {
2385 DP_VERBOSE(p_hwfn,
2386 QED_MSG_IOV,
2387 "VF[%d]: Omitting RSS due to inactive queue %08x\n",
2388 vf->relative_vf_id, q_idx);
2389 b_reject = true;
2390 goto out;
2391 }
2392
2393 p_rss->rss_ind_table[i] = vf->vf_queues[q_idx].p_rx_cid;
Yuval Mintzdacd88d2016-05-11 16:36:16 +03002394 }
2395
2396 p_data->rss_params = p_rss;
Mintz, Yuvalf29ffdb2017-01-01 13:57:07 +02002397out:
Yuval Mintzdacd88d2016-05-11 16:36:16 +03002398 *tlvs_mask |= 1 << QED_IOV_VP_UPDATE_RSS;
Mintz, Yuvalf29ffdb2017-01-01 13:57:07 +02002399 if (!b_reject)
2400 *tlvs_accepted |= 1 << QED_IOV_VP_UPDATE_RSS;
Yuval Mintzdacd88d2016-05-11 16:36:16 +03002401}
2402
Yuval Mintz17b235c2016-05-11 16:36:18 +03002403static void
2404qed_iov_vp_update_sge_tpa_param(struct qed_hwfn *p_hwfn,
2405 struct qed_vf_info *vf,
2406 struct qed_sp_vport_update_params *p_data,
2407 struct qed_sge_tpa_params *p_sge_tpa,
2408 struct qed_iov_vf_mbx *p_mbx, u16 *tlvs_mask)
2409{
2410 struct vfpf_vport_update_sge_tpa_tlv *p_sge_tpa_tlv;
2411 u16 tlv = CHANNEL_TLV_VPORT_UPDATE_SGE_TPA;
2412
2413 p_sge_tpa_tlv = (struct vfpf_vport_update_sge_tpa_tlv *)
2414 qed_iov_search_list_tlvs(p_hwfn, p_mbx->req_virt, tlv);
2415
2416 if (!p_sge_tpa_tlv) {
2417 p_data->sge_tpa_params = NULL;
2418 return;
2419 }
2420
2421 memset(p_sge_tpa, 0, sizeof(struct qed_sge_tpa_params));
2422
2423 p_sge_tpa->update_tpa_en_flg =
2424 !!(p_sge_tpa_tlv->update_sge_tpa_flags & VFPF_UPDATE_TPA_EN_FLAG);
2425 p_sge_tpa->update_tpa_param_flg =
2426 !!(p_sge_tpa_tlv->update_sge_tpa_flags &
2427 VFPF_UPDATE_TPA_PARAM_FLAG);
2428
2429 p_sge_tpa->tpa_ipv4_en_flg =
2430 !!(p_sge_tpa_tlv->sge_tpa_flags & VFPF_TPA_IPV4_EN_FLAG);
2431 p_sge_tpa->tpa_ipv6_en_flg =
2432 !!(p_sge_tpa_tlv->sge_tpa_flags & VFPF_TPA_IPV6_EN_FLAG);
2433 p_sge_tpa->tpa_pkt_split_flg =
2434 !!(p_sge_tpa_tlv->sge_tpa_flags & VFPF_TPA_PKT_SPLIT_FLAG);
2435 p_sge_tpa->tpa_hdr_data_split_flg =
2436 !!(p_sge_tpa_tlv->sge_tpa_flags & VFPF_TPA_HDR_DATA_SPLIT_FLAG);
2437 p_sge_tpa->tpa_gro_consistent_flg =
2438 !!(p_sge_tpa_tlv->sge_tpa_flags & VFPF_TPA_GRO_CONSIST_FLAG);
2439
2440 p_sge_tpa->tpa_max_aggs_num = p_sge_tpa_tlv->tpa_max_aggs_num;
2441 p_sge_tpa->tpa_max_size = p_sge_tpa_tlv->tpa_max_size;
2442 p_sge_tpa->tpa_min_size_to_start = p_sge_tpa_tlv->tpa_min_size_to_start;
2443 p_sge_tpa->tpa_min_size_to_cont = p_sge_tpa_tlv->tpa_min_size_to_cont;
2444 p_sge_tpa->max_buffers_per_cqe = p_sge_tpa_tlv->max_buffers_per_cqe;
2445
2446 p_data->sge_tpa_params = p_sge_tpa;
2447
2448 *tlvs_mask |= 1 << QED_IOV_VP_UPDATE_SGE_TPA;
2449}
2450
Mintz, Yuvalf990c822017-01-01 13:57:08 +02002451static int qed_iov_pre_update_vport(struct qed_hwfn *hwfn,
2452 u8 vfid,
2453 struct qed_sp_vport_update_params *params,
2454 u16 *tlvs)
2455{
2456 u8 mask = QED_ACCEPT_UCAST_UNMATCHED | QED_ACCEPT_MCAST_UNMATCHED;
2457 struct qed_filter_accept_flags *flags = &params->accept_flags;
2458 struct qed_public_vf_info *vf_info;
2459
2460 /* Untrusted VFs can't even be trusted to know that fact.
2461 * Simply indicate everything is configured fine, and trace
2462 * configuration 'behind their back'.
2463 */
2464 if (!(*tlvs & BIT(QED_IOV_VP_UPDATE_ACCEPT_PARAM)))
2465 return 0;
2466
2467 vf_info = qed_iov_get_public_vf_info(hwfn, vfid, true);
2468
2469 if (flags->update_rx_mode_config) {
2470 vf_info->rx_accept_mode = flags->rx_accept_filter;
2471 if (!vf_info->is_trusted_configured)
2472 flags->rx_accept_filter &= ~mask;
2473 }
2474
2475 if (flags->update_tx_mode_config) {
2476 vf_info->tx_accept_mode = flags->tx_accept_filter;
2477 if (!vf_info->is_trusted_configured)
2478 flags->tx_accept_filter &= ~mask;
2479 }
2480
2481 return 0;
2482}
2483
Yuval Mintzdacd88d2016-05-11 16:36:16 +03002484static void qed_iov_vf_mbx_vport_update(struct qed_hwfn *p_hwfn,
2485 struct qed_ptt *p_ptt,
2486 struct qed_vf_info *vf)
2487{
Mintz, Yuvalf29ffdb2017-01-01 13:57:07 +02002488 struct qed_rss_params *p_rss_params = NULL;
Yuval Mintzdacd88d2016-05-11 16:36:16 +03002489 struct qed_sp_vport_update_params params;
2490 struct qed_iov_vf_mbx *mbx = &vf->vf_mbx;
Yuval Mintz17b235c2016-05-11 16:36:18 +03002491 struct qed_sge_tpa_params sge_tpa_params;
Mintz, Yuvalf29ffdb2017-01-01 13:57:07 +02002492 u16 tlvs_mask = 0, tlvs_accepted = 0;
Yuval Mintzdacd88d2016-05-11 16:36:16 +03002493 u8 status = PFVF_STATUS_SUCCESS;
Yuval Mintzdacd88d2016-05-11 16:36:16 +03002494 u16 length;
2495 int rc;
2496
Yuval Mintz41086462016-06-05 13:11:13 +03002497 /* Valiate PF can send such a request */
2498 if (!vf->vport_instance) {
2499 DP_VERBOSE(p_hwfn,
2500 QED_MSG_IOV,
2501 "No VPORT instance available for VF[%d], failing vport update\n",
2502 vf->abs_vf_id);
2503 status = PFVF_STATUS_FAILURE;
2504 goto out;
2505 }
Mintz, Yuvalf29ffdb2017-01-01 13:57:07 +02002506 p_rss_params = vzalloc(sizeof(*p_rss_params));
2507 if (p_rss_params == NULL) {
2508 status = PFVF_STATUS_FAILURE;
2509 goto out;
2510 }
Yuval Mintz41086462016-06-05 13:11:13 +03002511
Yuval Mintzdacd88d2016-05-11 16:36:16 +03002512 memset(&params, 0, sizeof(params));
2513 params.opaque_fid = vf->opaque_fid;
2514 params.vport_id = vf->vport_id;
2515 params.rss_params = NULL;
2516
2517 /* Search for extended tlvs list and update values
2518 * from VF in struct qed_sp_vport_update_params.
2519 */
2520 qed_iov_vp_update_act_param(p_hwfn, &params, mbx, &tlvs_mask);
Yuval Mintz17b235c2016-05-11 16:36:18 +03002521 qed_iov_vp_update_vlan_param(p_hwfn, &params, vf, mbx, &tlvs_mask);
2522 qed_iov_vp_update_tx_switch(p_hwfn, &params, mbx, &tlvs_mask);
Yuval Mintzdacd88d2016-05-11 16:36:16 +03002523 qed_iov_vp_update_mcast_bin_param(p_hwfn, &params, mbx, &tlvs_mask);
2524 qed_iov_vp_update_accept_flag(p_hwfn, &params, mbx, &tlvs_mask);
Yuval Mintz17b235c2016-05-11 16:36:18 +03002525 qed_iov_vp_update_accept_any_vlan(p_hwfn, &params, mbx, &tlvs_mask);
2526 qed_iov_vp_update_sge_tpa_param(p_hwfn, vf, &params,
2527 &sge_tpa_params, mbx, &tlvs_mask);
Yuval Mintzdacd88d2016-05-11 16:36:16 +03002528
Mintz, Yuvalf29ffdb2017-01-01 13:57:07 +02002529 tlvs_accepted = tlvs_mask;
2530
2531 /* Some of the extended TLVs need to be validated first; In that case,
2532 * they can update the mask without updating the accepted [so that
2533 * PF could communicate to VF it has rejected request].
Yuval Mintzdacd88d2016-05-11 16:36:16 +03002534 */
Mintz, Yuvalf29ffdb2017-01-01 13:57:07 +02002535 qed_iov_vp_update_rss_param(p_hwfn, vf, &params, p_rss_params,
2536 mbx, &tlvs_mask, &tlvs_accepted);
2537
Mintz, Yuvalf990c822017-01-01 13:57:08 +02002538 if (qed_iov_pre_update_vport(p_hwfn, vf->relative_vf_id,
2539 &params, &tlvs_accepted)) {
2540 tlvs_accepted = 0;
2541 status = PFVF_STATUS_NOT_SUPPORTED;
2542 goto out;
2543 }
2544
Mintz, Yuvalf29ffdb2017-01-01 13:57:07 +02002545 if (!tlvs_accepted) {
2546 if (tlvs_mask)
2547 DP_VERBOSE(p_hwfn, QED_MSG_IOV,
2548 "Upper-layer prevents VF vport configuration\n");
2549 else
2550 DP_VERBOSE(p_hwfn, QED_MSG_IOV,
2551 "No feature tlvs found for vport update\n");
Yuval Mintzdacd88d2016-05-11 16:36:16 +03002552 status = PFVF_STATUS_NOT_SUPPORTED;
2553 goto out;
2554 }
2555
2556 rc = qed_sp_vport_update(p_hwfn, &params, QED_SPQ_MODE_EBLOCK, NULL);
2557
2558 if (rc)
2559 status = PFVF_STATUS_FAILURE;
2560
2561out:
Mintz, Yuvalf29ffdb2017-01-01 13:57:07 +02002562 vfree(p_rss_params);
Yuval Mintzdacd88d2016-05-11 16:36:16 +03002563 length = qed_iov_prep_vp_update_resp_tlvs(p_hwfn, vf, mbx, status,
Mintz, Yuvalf29ffdb2017-01-01 13:57:07 +02002564 tlvs_mask, tlvs_accepted);
Yuval Mintzdacd88d2016-05-11 16:36:16 +03002565 qed_iov_send_response(p_hwfn, p_ptt, vf, length, status);
2566}
2567
Yuval Mintz8246d0b2016-06-05 13:11:15 +03002568static int qed_iov_vf_update_vlan_shadow(struct qed_hwfn *p_hwfn,
2569 struct qed_vf_info *p_vf,
2570 struct qed_filter_ucast *p_params)
Yuval Mintz08feecd2016-05-11 16:36:20 +03002571{
2572 int i;
2573
Yuval Mintz08feecd2016-05-11 16:36:20 +03002574 /* First remove entries and then add new ones */
2575 if (p_params->opcode == QED_FILTER_REMOVE) {
2576 for (i = 0; i < QED_ETH_VF_NUM_VLAN_FILTERS + 1; i++)
2577 if (p_vf->shadow_config.vlans[i].used &&
2578 p_vf->shadow_config.vlans[i].vid ==
2579 p_params->vlan) {
2580 p_vf->shadow_config.vlans[i].used = false;
2581 break;
2582 }
2583 if (i == QED_ETH_VF_NUM_VLAN_FILTERS + 1) {
2584 DP_VERBOSE(p_hwfn,
2585 QED_MSG_IOV,
2586 "VF [%d] - Tries to remove a non-existing vlan\n",
2587 p_vf->relative_vf_id);
2588 return -EINVAL;
2589 }
2590 } else if (p_params->opcode == QED_FILTER_REPLACE ||
2591 p_params->opcode == QED_FILTER_FLUSH) {
2592 for (i = 0; i < QED_ETH_VF_NUM_VLAN_FILTERS + 1; i++)
2593 p_vf->shadow_config.vlans[i].used = false;
2594 }
2595
2596 /* In forced mode, we're willing to remove entries - but we don't add
2597 * new ones.
2598 */
Yuval Mintz1a635e42016-08-15 10:42:43 +03002599 if (p_vf->bulletin.p_virt->valid_bitmap & BIT(VLAN_ADDR_FORCED))
Yuval Mintz08feecd2016-05-11 16:36:20 +03002600 return 0;
2601
2602 if (p_params->opcode == QED_FILTER_ADD ||
2603 p_params->opcode == QED_FILTER_REPLACE) {
2604 for (i = 0; i < QED_ETH_VF_NUM_VLAN_FILTERS + 1; i++) {
2605 if (p_vf->shadow_config.vlans[i].used)
2606 continue;
2607
2608 p_vf->shadow_config.vlans[i].used = true;
2609 p_vf->shadow_config.vlans[i].vid = p_params->vlan;
2610 break;
2611 }
2612
2613 if (i == QED_ETH_VF_NUM_VLAN_FILTERS + 1) {
2614 DP_VERBOSE(p_hwfn,
2615 QED_MSG_IOV,
2616 "VF [%d] - Tries to configure more than %d vlan filters\n",
2617 p_vf->relative_vf_id,
2618 QED_ETH_VF_NUM_VLAN_FILTERS + 1);
2619 return -EINVAL;
2620 }
2621 }
2622
2623 return 0;
2624}
2625
Yuval Mintz8246d0b2016-06-05 13:11:15 +03002626static int qed_iov_vf_update_mac_shadow(struct qed_hwfn *p_hwfn,
2627 struct qed_vf_info *p_vf,
2628 struct qed_filter_ucast *p_params)
2629{
2630 int i;
2631
2632 /* If we're in forced-mode, we don't allow any change */
Yuval Mintz1a635e42016-08-15 10:42:43 +03002633 if (p_vf->bulletin.p_virt->valid_bitmap & BIT(MAC_ADDR_FORCED))
Yuval Mintz8246d0b2016-06-05 13:11:15 +03002634 return 0;
2635
2636 /* First remove entries and then add new ones */
2637 if (p_params->opcode == QED_FILTER_REMOVE) {
2638 for (i = 0; i < QED_ETH_VF_NUM_MAC_FILTERS; i++) {
2639 if (ether_addr_equal(p_vf->shadow_config.macs[i],
2640 p_params->mac)) {
Shyam Saini0ee28e32017-01-17 07:35:04 +05302641 eth_zero_addr(p_vf->shadow_config.macs[i]);
Yuval Mintz8246d0b2016-06-05 13:11:15 +03002642 break;
2643 }
2644 }
2645
2646 if (i == QED_ETH_VF_NUM_MAC_FILTERS) {
2647 DP_VERBOSE(p_hwfn, QED_MSG_IOV,
2648 "MAC isn't configured\n");
2649 return -EINVAL;
2650 }
2651 } else if (p_params->opcode == QED_FILTER_REPLACE ||
2652 p_params->opcode == QED_FILTER_FLUSH) {
2653 for (i = 0; i < QED_ETH_VF_NUM_MAC_FILTERS; i++)
Shyam Saini0ee28e32017-01-17 07:35:04 +05302654 eth_zero_addr(p_vf->shadow_config.macs[i]);
Yuval Mintz8246d0b2016-06-05 13:11:15 +03002655 }
2656
2657 /* List the new MAC address */
2658 if (p_params->opcode != QED_FILTER_ADD &&
2659 p_params->opcode != QED_FILTER_REPLACE)
2660 return 0;
2661
2662 for (i = 0; i < QED_ETH_VF_NUM_MAC_FILTERS; i++) {
2663 if (is_zero_ether_addr(p_vf->shadow_config.macs[i])) {
2664 ether_addr_copy(p_vf->shadow_config.macs[i],
2665 p_params->mac);
2666 DP_VERBOSE(p_hwfn, QED_MSG_IOV,
2667 "Added MAC at %d entry in shadow\n", i);
2668 break;
2669 }
2670 }
2671
2672 if (i == QED_ETH_VF_NUM_MAC_FILTERS) {
2673 DP_VERBOSE(p_hwfn, QED_MSG_IOV, "No available place for MAC\n");
2674 return -EINVAL;
2675 }
2676
2677 return 0;
2678}
2679
2680static int
2681qed_iov_vf_update_unicast_shadow(struct qed_hwfn *p_hwfn,
2682 struct qed_vf_info *p_vf,
2683 struct qed_filter_ucast *p_params)
2684{
2685 int rc = 0;
2686
2687 if (p_params->type == QED_FILTER_MAC) {
2688 rc = qed_iov_vf_update_mac_shadow(p_hwfn, p_vf, p_params);
2689 if (rc)
2690 return rc;
2691 }
2692
2693 if (p_params->type == QED_FILTER_VLAN)
2694 rc = qed_iov_vf_update_vlan_shadow(p_hwfn, p_vf, p_params);
2695
2696 return rc;
2697}
2698
Baoyou Xieba569472016-09-09 09:21:15 +08002699static int qed_iov_chk_ucast(struct qed_hwfn *hwfn,
2700 int vfid, struct qed_filter_ucast *params)
Yuval Mintzdacd88d2016-05-11 16:36:16 +03002701{
2702 struct qed_public_vf_info *vf;
2703
2704 vf = qed_iov_get_public_vf_info(hwfn, vfid, true);
2705 if (!vf)
2706 return -EINVAL;
2707
2708 /* No real decision to make; Store the configured MAC */
2709 if (params->type == QED_FILTER_MAC ||
2710 params->type == QED_FILTER_MAC_VLAN)
2711 ether_addr_copy(vf->mac, params->mac);
2712
2713 return 0;
2714}
2715
2716static void qed_iov_vf_mbx_ucast_filter(struct qed_hwfn *p_hwfn,
2717 struct qed_ptt *p_ptt,
2718 struct qed_vf_info *vf)
2719{
Yuval Mintz08feecd2016-05-11 16:36:20 +03002720 struct qed_bulletin_content *p_bulletin = vf->bulletin.p_virt;
Yuval Mintzdacd88d2016-05-11 16:36:16 +03002721 struct qed_iov_vf_mbx *mbx = &vf->vf_mbx;
2722 struct vfpf_ucast_filter_tlv *req;
2723 u8 status = PFVF_STATUS_SUCCESS;
2724 struct qed_filter_ucast params;
2725 int rc;
2726
2727 /* Prepare the unicast filter params */
2728 memset(&params, 0, sizeof(struct qed_filter_ucast));
2729 req = &mbx->req_virt->ucast_filter;
2730 params.opcode = (enum qed_filter_opcode)req->opcode;
2731 params.type = (enum qed_filter_ucast_type)req->type;
2732
2733 params.is_rx_filter = 1;
2734 params.is_tx_filter = 1;
2735 params.vport_to_remove_from = vf->vport_id;
2736 params.vport_to_add_to = vf->vport_id;
2737 memcpy(params.mac, req->mac, ETH_ALEN);
2738 params.vlan = req->vlan;
2739
2740 DP_VERBOSE(p_hwfn,
2741 QED_MSG_IOV,
2742 "VF[%d]: opcode 0x%02x type 0x%02x [%s %s] [vport 0x%02x] MAC %02x:%02x:%02x:%02x:%02x:%02x, vlan 0x%04x\n",
2743 vf->abs_vf_id, params.opcode, params.type,
2744 params.is_rx_filter ? "RX" : "",
2745 params.is_tx_filter ? "TX" : "",
2746 params.vport_to_add_to,
2747 params.mac[0], params.mac[1],
2748 params.mac[2], params.mac[3],
2749 params.mac[4], params.mac[5], params.vlan);
2750
2751 if (!vf->vport_instance) {
2752 DP_VERBOSE(p_hwfn,
2753 QED_MSG_IOV,
2754 "No VPORT instance available for VF[%d], failing ucast MAC configuration\n",
2755 vf->abs_vf_id);
2756 status = PFVF_STATUS_FAILURE;
2757 goto out;
2758 }
2759
Yuval Mintz08feecd2016-05-11 16:36:20 +03002760 /* Update shadow copy of the VF configuration */
2761 if (qed_iov_vf_update_unicast_shadow(p_hwfn, vf, &params)) {
2762 status = PFVF_STATUS_FAILURE;
2763 goto out;
2764 }
2765
2766 /* Determine if the unicast filtering is acceptible by PF */
Yuval Mintz1a635e42016-08-15 10:42:43 +03002767 if ((p_bulletin->valid_bitmap & BIT(VLAN_ADDR_FORCED)) &&
Yuval Mintz08feecd2016-05-11 16:36:20 +03002768 (params.type == QED_FILTER_VLAN ||
2769 params.type == QED_FILTER_MAC_VLAN)) {
2770 /* Once VLAN is forced or PVID is set, do not allow
2771 * to add/replace any further VLANs.
2772 */
2773 if (params.opcode == QED_FILTER_ADD ||
2774 params.opcode == QED_FILTER_REPLACE)
2775 status = PFVF_STATUS_FORCED;
2776 goto out;
2777 }
2778
Yuval Mintz1a635e42016-08-15 10:42:43 +03002779 if ((p_bulletin->valid_bitmap & BIT(MAC_ADDR_FORCED)) &&
Yuval Mintzeff16962016-05-11 16:36:21 +03002780 (params.type == QED_FILTER_MAC ||
2781 params.type == QED_FILTER_MAC_VLAN)) {
2782 if (!ether_addr_equal(p_bulletin->mac, params.mac) ||
2783 (params.opcode != QED_FILTER_ADD &&
2784 params.opcode != QED_FILTER_REPLACE))
2785 status = PFVF_STATUS_FORCED;
2786 goto out;
2787 }
2788
Yuval Mintzdacd88d2016-05-11 16:36:16 +03002789 rc = qed_iov_chk_ucast(p_hwfn, vf->relative_vf_id, &params);
2790 if (rc) {
2791 status = PFVF_STATUS_FAILURE;
2792 goto out;
2793 }
2794
2795 rc = qed_sp_eth_filter_ucast(p_hwfn, vf->opaque_fid, &params,
2796 QED_SPQ_MODE_CB, NULL);
2797 if (rc)
2798 status = PFVF_STATUS_FAILURE;
2799
2800out:
2801 qed_iov_prepare_resp(p_hwfn, p_ptt, vf, CHANNEL_TLV_UCAST_FILTER,
2802 sizeof(struct pfvf_def_resp_tlv), status);
2803}
2804
Yuval Mintz0b55e272016-05-11 16:36:15 +03002805static void qed_iov_vf_mbx_int_cleanup(struct qed_hwfn *p_hwfn,
2806 struct qed_ptt *p_ptt,
2807 struct qed_vf_info *vf)
2808{
2809 int i;
2810
2811 /* Reset the SBs */
2812 for (i = 0; i < vf->num_sbs; i++)
2813 qed_int_igu_init_pure_rt_single(p_hwfn, p_ptt,
2814 vf->igu_sbs[i],
2815 vf->opaque_fid, false);
2816
2817 qed_iov_prepare_resp(p_hwfn, p_ptt, vf, CHANNEL_TLV_INT_CLEANUP,
2818 sizeof(struct pfvf_def_resp_tlv),
2819 PFVF_STATUS_SUCCESS);
2820}
2821
2822static void qed_iov_vf_mbx_close(struct qed_hwfn *p_hwfn,
2823 struct qed_ptt *p_ptt, struct qed_vf_info *vf)
2824{
2825 u16 length = sizeof(struct pfvf_def_resp_tlv);
2826 u8 status = PFVF_STATUS_SUCCESS;
2827
2828 /* Disable Interrupts for VF */
2829 qed_iov_vf_igu_set_int(p_hwfn, p_ptt, vf, 0);
2830
2831 /* Reset Permission table */
2832 qed_iov_config_perm_table(p_hwfn, p_ptt, vf, 0);
2833
2834 qed_iov_prepare_resp(p_hwfn, p_ptt, vf, CHANNEL_TLV_CLOSE,
2835 length, status);
2836}
2837
2838static void qed_iov_vf_mbx_release(struct qed_hwfn *p_hwfn,
2839 struct qed_ptt *p_ptt,
2840 struct qed_vf_info *p_vf)
2841{
2842 u16 length = sizeof(struct pfvf_def_resp_tlv);
Yuval Mintz1fe614d2016-06-05 13:11:11 +03002843 u8 status = PFVF_STATUS_SUCCESS;
2844 int rc = 0;
Yuval Mintz0b55e272016-05-11 16:36:15 +03002845
2846 qed_iov_vf_cleanup(p_hwfn, p_vf);
2847
Yuval Mintz1fe614d2016-06-05 13:11:11 +03002848 if (p_vf->state != VF_STOPPED && p_vf->state != VF_FREE) {
2849 /* Stopping the VF */
2850 rc = qed_sp_vf_stop(p_hwfn, p_vf->concrete_fid,
2851 p_vf->opaque_fid);
2852
2853 if (rc) {
2854 DP_ERR(p_hwfn, "qed_sp_vf_stop returned error %d\n",
2855 rc);
2856 status = PFVF_STATUS_FAILURE;
2857 }
2858
2859 p_vf->state = VF_STOPPED;
2860 }
2861
Yuval Mintz0b55e272016-05-11 16:36:15 +03002862 qed_iov_prepare_resp(p_hwfn, p_ptt, p_vf, CHANNEL_TLV_RELEASE,
Yuval Mintz1fe614d2016-06-05 13:11:11 +03002863 length, status);
Yuval Mintz0b55e272016-05-11 16:36:15 +03002864}
2865
2866static int
2867qed_iov_vf_flr_poll_dorq(struct qed_hwfn *p_hwfn,
2868 struct qed_vf_info *p_vf, struct qed_ptt *p_ptt)
2869{
2870 int cnt;
2871 u32 val;
2872
2873 qed_fid_pretend(p_hwfn, p_ptt, (u16) p_vf->concrete_fid);
2874
2875 for (cnt = 0; cnt < 50; cnt++) {
2876 val = qed_rd(p_hwfn, p_ptt, DORQ_REG_VF_USAGE_CNT);
2877 if (!val)
2878 break;
2879 msleep(20);
2880 }
2881 qed_fid_pretend(p_hwfn, p_ptt, (u16) p_hwfn->hw_info.concrete_fid);
2882
2883 if (cnt == 50) {
2884 DP_ERR(p_hwfn,
2885 "VF[%d] - dorq failed to cleanup [usage 0x%08x]\n",
2886 p_vf->abs_vf_id, val);
2887 return -EBUSY;
2888 }
2889
2890 return 0;
2891}
2892
2893static int
2894qed_iov_vf_flr_poll_pbf(struct qed_hwfn *p_hwfn,
2895 struct qed_vf_info *p_vf, struct qed_ptt *p_ptt)
2896{
2897 u32 cons[MAX_NUM_VOQS], distance[MAX_NUM_VOQS];
2898 int i, cnt;
2899
2900 /* Read initial consumers & producers */
2901 for (i = 0; i < MAX_NUM_VOQS; i++) {
2902 u32 prod;
2903
2904 cons[i] = qed_rd(p_hwfn, p_ptt,
2905 PBF_REG_NUM_BLOCKS_ALLOCATED_CONS_VOQ0 +
2906 i * 0x40);
2907 prod = qed_rd(p_hwfn, p_ptt,
2908 PBF_REG_NUM_BLOCKS_ALLOCATED_PROD_VOQ0 +
2909 i * 0x40);
2910 distance[i] = prod - cons[i];
2911 }
2912
2913 /* Wait for consumers to pass the producers */
2914 i = 0;
2915 for (cnt = 0; cnt < 50; cnt++) {
2916 for (; i < MAX_NUM_VOQS; i++) {
2917 u32 tmp;
2918
2919 tmp = qed_rd(p_hwfn, p_ptt,
2920 PBF_REG_NUM_BLOCKS_ALLOCATED_CONS_VOQ0 +
2921 i * 0x40);
2922 if (distance[i] > tmp - cons[i])
2923 break;
2924 }
2925
2926 if (i == MAX_NUM_VOQS)
2927 break;
2928
2929 msleep(20);
2930 }
2931
2932 if (cnt == 50) {
2933 DP_ERR(p_hwfn, "VF[%d] - pbf polling failed on VOQ %d\n",
2934 p_vf->abs_vf_id, i);
2935 return -EBUSY;
2936 }
2937
2938 return 0;
2939}
2940
2941static int qed_iov_vf_flr_poll(struct qed_hwfn *p_hwfn,
2942 struct qed_vf_info *p_vf, struct qed_ptt *p_ptt)
2943{
2944 int rc;
2945
2946 rc = qed_iov_vf_flr_poll_dorq(p_hwfn, p_vf, p_ptt);
2947 if (rc)
2948 return rc;
2949
2950 rc = qed_iov_vf_flr_poll_pbf(p_hwfn, p_vf, p_ptt);
2951 if (rc)
2952 return rc;
2953
2954 return 0;
2955}
2956
2957static int
2958qed_iov_execute_vf_flr_cleanup(struct qed_hwfn *p_hwfn,
2959 struct qed_ptt *p_ptt,
2960 u16 rel_vf_id, u32 *ack_vfs)
2961{
2962 struct qed_vf_info *p_vf;
2963 int rc = 0;
2964
2965 p_vf = qed_iov_get_vf_info(p_hwfn, rel_vf_id, false);
2966 if (!p_vf)
2967 return 0;
2968
2969 if (p_hwfn->pf_iov_info->pending_flr[rel_vf_id / 64] &
2970 (1ULL << (rel_vf_id % 64))) {
2971 u16 vfid = p_vf->abs_vf_id;
2972
2973 DP_VERBOSE(p_hwfn, QED_MSG_IOV,
2974 "VF[%d] - Handling FLR\n", vfid);
2975
2976 qed_iov_vf_cleanup(p_hwfn, p_vf);
2977
2978 /* If VF isn't active, no need for anything but SW */
2979 if (!p_vf->b_init)
2980 goto cleanup;
2981
2982 rc = qed_iov_vf_flr_poll(p_hwfn, p_vf, p_ptt);
2983 if (rc)
2984 goto cleanup;
2985
2986 rc = qed_final_cleanup(p_hwfn, p_ptt, vfid, true);
2987 if (rc) {
2988 DP_ERR(p_hwfn, "Failed handle FLR of VF[%d]\n", vfid);
2989 return rc;
2990 }
2991
Yuval Mintz7eff82b2016-10-14 05:19:22 -04002992 /* Workaround to make VF-PF channel ready, as FW
2993 * doesn't do that as a part of FLR.
2994 */
2995 REG_WR(p_hwfn,
2996 GTT_BAR0_MAP_REG_USDM_RAM +
2997 USTORM_VF_PF_CHANNEL_READY_OFFSET(vfid), 1);
2998
Yuval Mintz0b55e272016-05-11 16:36:15 +03002999 /* VF_STOPPED has to be set only after final cleanup
3000 * but prior to re-enabling the VF.
3001 */
3002 p_vf->state = VF_STOPPED;
3003
3004 rc = qed_iov_enable_vf_access(p_hwfn, p_ptt, p_vf);
3005 if (rc) {
3006 DP_ERR(p_hwfn, "Failed to re-enable VF[%d] acces\n",
3007 vfid);
3008 return rc;
3009 }
3010cleanup:
3011 /* Mark VF for ack and clean pending state */
3012 if (p_vf->state == VF_RESET)
3013 p_vf->state = VF_STOPPED;
Yuval Mintz1a635e42016-08-15 10:42:43 +03003014 ack_vfs[vfid / 32] |= BIT((vfid % 32));
Yuval Mintz0b55e272016-05-11 16:36:15 +03003015 p_hwfn->pf_iov_info->pending_flr[rel_vf_id / 64] &=
3016 ~(1ULL << (rel_vf_id % 64));
3017 p_hwfn->pf_iov_info->pending_events[rel_vf_id / 64] &=
3018 ~(1ULL << (rel_vf_id % 64));
3019 }
3020
3021 return rc;
3022}
3023
Baoyou Xieba569472016-09-09 09:21:15 +08003024static int
3025qed_iov_vf_flr_cleanup(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt)
Yuval Mintz0b55e272016-05-11 16:36:15 +03003026{
3027 u32 ack_vfs[VF_MAX_STATIC / 32];
3028 int rc = 0;
3029 u16 i;
3030
3031 memset(ack_vfs, 0, sizeof(u32) * (VF_MAX_STATIC / 32));
3032
3033 /* Since BRB <-> PRS interface can't be tested as part of the flr
3034 * polling due to HW limitations, simply sleep a bit. And since
3035 * there's no need to wait per-vf, do it before looping.
3036 */
3037 msleep(100);
3038
3039 for (i = 0; i < p_hwfn->cdev->p_iov_info->total_vfs; i++)
3040 qed_iov_execute_vf_flr_cleanup(p_hwfn, p_ptt, i, ack_vfs);
3041
3042 rc = qed_mcp_ack_vf_flr(p_hwfn, p_ptt, ack_vfs);
3043 return rc;
3044}
3045
3046int qed_iov_mark_vf_flr(struct qed_hwfn *p_hwfn, u32 *p_disabled_vfs)
3047{
3048 u16 i, found = 0;
3049
3050 DP_VERBOSE(p_hwfn, QED_MSG_IOV, "Marking FLR-ed VFs\n");
3051 for (i = 0; i < (VF_MAX_STATIC / 32); i++)
3052 DP_VERBOSE(p_hwfn, QED_MSG_IOV,
3053 "[%08x,...,%08x]: %08x\n",
3054 i * 32, (i + 1) * 32 - 1, p_disabled_vfs[i]);
3055
3056 if (!p_hwfn->cdev->p_iov_info) {
3057 DP_NOTICE(p_hwfn, "VF flr but no IOV\n");
3058 return 0;
3059 }
3060
3061 /* Mark VFs */
3062 for (i = 0; i < p_hwfn->cdev->p_iov_info->total_vfs; i++) {
3063 struct qed_vf_info *p_vf;
3064 u8 vfid;
3065
3066 p_vf = qed_iov_get_vf_info(p_hwfn, i, false);
3067 if (!p_vf)
3068 continue;
3069
3070 vfid = p_vf->abs_vf_id;
Yuval Mintz1a635e42016-08-15 10:42:43 +03003071 if (BIT((vfid % 32)) & p_disabled_vfs[vfid / 32]) {
Yuval Mintz0b55e272016-05-11 16:36:15 +03003072 u64 *p_flr = p_hwfn->pf_iov_info->pending_flr;
3073 u16 rel_vf_id = p_vf->relative_vf_id;
3074
3075 DP_VERBOSE(p_hwfn, QED_MSG_IOV,
3076 "VF[%d] [rel %d] got FLR-ed\n",
3077 vfid, rel_vf_id);
3078
3079 p_vf->state = VF_RESET;
3080
3081 /* No need to lock here, since pending_flr should
3082 * only change here and before ACKing MFw. Since
3083 * MFW will not trigger an additional attention for
3084 * VF flr until ACKs, we're safe.
3085 */
3086 p_flr[rel_vf_id / 64] |= 1ULL << (rel_vf_id % 64);
3087 found = 1;
3088 }
3089 }
3090
3091 return found;
3092}
3093
Yuval Mintz73390ac2016-05-11 16:36:24 +03003094static void qed_iov_get_link(struct qed_hwfn *p_hwfn,
3095 u16 vfid,
3096 struct qed_mcp_link_params *p_params,
3097 struct qed_mcp_link_state *p_link,
3098 struct qed_mcp_link_capabilities *p_caps)
3099{
3100 struct qed_vf_info *p_vf = qed_iov_get_vf_info(p_hwfn,
3101 vfid,
3102 false);
3103 struct qed_bulletin_content *p_bulletin;
3104
3105 if (!p_vf)
3106 return;
3107
3108 p_bulletin = p_vf->bulletin.p_virt;
3109
3110 if (p_params)
3111 __qed_vf_get_link_params(p_hwfn, p_params, p_bulletin);
3112 if (p_link)
3113 __qed_vf_get_link_state(p_hwfn, p_link, p_bulletin);
3114 if (p_caps)
3115 __qed_vf_get_link_caps(p_hwfn, p_caps, p_bulletin);
3116}
3117
Yuval Mintz37bff2b2016-05-11 16:36:13 +03003118static void qed_iov_process_mbx_req(struct qed_hwfn *p_hwfn,
3119 struct qed_ptt *p_ptt, int vfid)
3120{
3121 struct qed_iov_vf_mbx *mbx;
3122 struct qed_vf_info *p_vf;
Yuval Mintz37bff2b2016-05-11 16:36:13 +03003123
3124 p_vf = qed_iov_get_vf_info(p_hwfn, (u16) vfid, true);
3125 if (!p_vf)
3126 return;
3127
3128 mbx = &p_vf->vf_mbx;
3129
3130 /* qed_iov_process_mbx_request */
Yuval Mintz54fdd802016-06-05 13:11:16 +03003131 DP_VERBOSE(p_hwfn, QED_MSG_IOV,
3132 "VF[%02x]: Processing mailbox message\n", p_vf->abs_vf_id);
Yuval Mintz37bff2b2016-05-11 16:36:13 +03003133
3134 mbx->first_tlv = mbx->req_virt->first_tlv;
3135
3136 /* check if tlv type is known */
Yuval Mintz7eff82b2016-10-14 05:19:22 -04003137 if (qed_iov_tlv_supported(mbx->first_tlv.tl.type) &&
3138 !p_vf->b_malicious) {
Yuval Mintz1408cc1f2016-05-11 16:36:14 +03003139 switch (mbx->first_tlv.tl.type) {
3140 case CHANNEL_TLV_ACQUIRE:
3141 qed_iov_vf_mbx_acquire(p_hwfn, p_ptt, p_vf);
3142 break;
Yuval Mintzdacd88d2016-05-11 16:36:16 +03003143 case CHANNEL_TLV_VPORT_START:
3144 qed_iov_vf_mbx_start_vport(p_hwfn, p_ptt, p_vf);
3145 break;
3146 case CHANNEL_TLV_VPORT_TEARDOWN:
3147 qed_iov_vf_mbx_stop_vport(p_hwfn, p_ptt, p_vf);
3148 break;
3149 case CHANNEL_TLV_START_RXQ:
3150 qed_iov_vf_mbx_start_rxq(p_hwfn, p_ptt, p_vf);
3151 break;
3152 case CHANNEL_TLV_START_TXQ:
3153 qed_iov_vf_mbx_start_txq(p_hwfn, p_ptt, p_vf);
3154 break;
3155 case CHANNEL_TLV_STOP_RXQS:
3156 qed_iov_vf_mbx_stop_rxqs(p_hwfn, p_ptt, p_vf);
3157 break;
3158 case CHANNEL_TLV_STOP_TXQS:
3159 qed_iov_vf_mbx_stop_txqs(p_hwfn, p_ptt, p_vf);
3160 break;
Yuval Mintz17b235c2016-05-11 16:36:18 +03003161 case CHANNEL_TLV_UPDATE_RXQ:
3162 qed_iov_vf_mbx_update_rxqs(p_hwfn, p_ptt, p_vf);
3163 break;
Yuval Mintzdacd88d2016-05-11 16:36:16 +03003164 case CHANNEL_TLV_VPORT_UPDATE:
3165 qed_iov_vf_mbx_vport_update(p_hwfn, p_ptt, p_vf);
3166 break;
3167 case CHANNEL_TLV_UCAST_FILTER:
3168 qed_iov_vf_mbx_ucast_filter(p_hwfn, p_ptt, p_vf);
3169 break;
Yuval Mintz0b55e272016-05-11 16:36:15 +03003170 case CHANNEL_TLV_CLOSE:
3171 qed_iov_vf_mbx_close(p_hwfn, p_ptt, p_vf);
3172 break;
3173 case CHANNEL_TLV_INT_CLEANUP:
3174 qed_iov_vf_mbx_int_cleanup(p_hwfn, p_ptt, p_vf);
3175 break;
3176 case CHANNEL_TLV_RELEASE:
3177 qed_iov_vf_mbx_release(p_hwfn, p_ptt, p_vf);
3178 break;
Yuval Mintz1408cc1f2016-05-11 16:36:14 +03003179 }
Yuval Mintz7eff82b2016-10-14 05:19:22 -04003180 } else if (qed_iov_tlv_supported(mbx->first_tlv.tl.type)) {
3181 DP_VERBOSE(p_hwfn, QED_MSG_IOV,
3182 "VF [%02x] - considered malicious; Ignoring TLV [%04x]\n",
3183 p_vf->abs_vf_id, mbx->first_tlv.tl.type);
3184
3185 qed_iov_prepare_resp(p_hwfn, p_ptt, p_vf,
3186 mbx->first_tlv.tl.type,
3187 sizeof(struct pfvf_def_resp_tlv),
3188 PFVF_STATUS_MALICIOUS);
Yuval Mintz37bff2b2016-05-11 16:36:13 +03003189 } else {
3190 /* unknown TLV - this may belong to a VF driver from the future
3191 * - a version written after this PF driver was written, which
3192 * supports features unknown as of yet. Too bad since we don't
3193 * support them. Or this may be because someone wrote a crappy
3194 * VF driver and is sending garbage over the channel.
3195 */
Yuval Mintz54fdd802016-06-05 13:11:16 +03003196 DP_NOTICE(p_hwfn,
3197 "VF[%02x]: unknown TLV. type %04x length %04x padding %08x reply address %llu\n",
3198 p_vf->abs_vf_id,
3199 mbx->first_tlv.tl.type,
3200 mbx->first_tlv.tl.length,
3201 mbx->first_tlv.padding, mbx->first_tlv.reply_address);
Yuval Mintz37bff2b2016-05-11 16:36:13 +03003202
Yuval Mintz54fdd802016-06-05 13:11:16 +03003203 /* Try replying in case reply address matches the acquisition's
3204 * posted address.
3205 */
3206 if (p_vf->acquire.first_tlv.reply_address &&
3207 (mbx->first_tlv.reply_address ==
3208 p_vf->acquire.first_tlv.reply_address)) {
3209 qed_iov_prepare_resp(p_hwfn, p_ptt, p_vf,
3210 mbx->first_tlv.tl.type,
3211 sizeof(struct pfvf_def_resp_tlv),
3212 PFVF_STATUS_NOT_SUPPORTED);
3213 } else {
Yuval Mintz37bff2b2016-05-11 16:36:13 +03003214 DP_VERBOSE(p_hwfn,
3215 QED_MSG_IOV,
Yuval Mintz54fdd802016-06-05 13:11:16 +03003216 "VF[%02x]: Can't respond to TLV - no valid reply address\n",
3217 p_vf->abs_vf_id);
Yuval Mintz37bff2b2016-05-11 16:36:13 +03003218 }
3219 }
3220}
3221
Baoyou Xieba569472016-09-09 09:21:15 +08003222static void qed_iov_pf_add_pending_events(struct qed_hwfn *p_hwfn, u8 vfid)
Yuval Mintz37bff2b2016-05-11 16:36:13 +03003223{
3224 u64 add_bit = 1ULL << (vfid % 64);
3225
3226 p_hwfn->pf_iov_info->pending_events[vfid / 64] |= add_bit;
3227}
3228
3229static void qed_iov_pf_get_and_clear_pending_events(struct qed_hwfn *p_hwfn,
3230 u64 *events)
3231{
3232 u64 *p_pending_events = p_hwfn->pf_iov_info->pending_events;
3233
3234 memcpy(events, p_pending_events, sizeof(u64) * QED_VF_ARRAY_LENGTH);
3235 memset(p_pending_events, 0, sizeof(u64) * QED_VF_ARRAY_LENGTH);
3236}
3237
Yuval Mintz7eff82b2016-10-14 05:19:22 -04003238static struct qed_vf_info *qed_sriov_get_vf_from_absid(struct qed_hwfn *p_hwfn,
3239 u16 abs_vfid)
3240{
3241 u8 min = (u8) p_hwfn->cdev->p_iov_info->first_vf_in_pf;
3242
3243 if (!_qed_iov_pf_sanity_check(p_hwfn, (int)abs_vfid - min, false)) {
3244 DP_VERBOSE(p_hwfn,
3245 QED_MSG_IOV,
3246 "Got indication for VF [abs 0x%08x] that cannot be handled by PF\n",
3247 abs_vfid);
3248 return NULL;
3249 }
3250
3251 return &p_hwfn->pf_iov_info->vfs_array[(u8) abs_vfid - min];
3252}
3253
Yuval Mintz37bff2b2016-05-11 16:36:13 +03003254static int qed_sriov_vfpf_msg(struct qed_hwfn *p_hwfn,
3255 u16 abs_vfid, struct regpair *vf_msg)
3256{
Yuval Mintz7eff82b2016-10-14 05:19:22 -04003257 struct qed_vf_info *p_vf = qed_sriov_get_vf_from_absid(p_hwfn,
Yuval Mintz37bff2b2016-05-11 16:36:13 +03003258 abs_vfid);
Yuval Mintz7eff82b2016-10-14 05:19:22 -04003259
3260 if (!p_vf)
Yuval Mintz37bff2b2016-05-11 16:36:13 +03003261 return 0;
Yuval Mintz37bff2b2016-05-11 16:36:13 +03003262
3263 /* List the physical address of the request so that handler
3264 * could later on copy the message from it.
3265 */
3266 p_vf->vf_mbx.pending_req = (((u64)vf_msg->hi) << 32) | vf_msg->lo;
3267
3268 /* Mark the event and schedule the workqueue */
3269 qed_iov_pf_add_pending_events(p_hwfn, p_vf->relative_vf_id);
3270 qed_schedule_iov(p_hwfn, QED_IOV_WQ_MSG_FLAG);
3271
3272 return 0;
3273}
3274
Yuval Mintz7eff82b2016-10-14 05:19:22 -04003275static void qed_sriov_vfpf_malicious(struct qed_hwfn *p_hwfn,
3276 struct malicious_vf_eqe_data *p_data)
3277{
3278 struct qed_vf_info *p_vf;
3279
3280 p_vf = qed_sriov_get_vf_from_absid(p_hwfn, p_data->vf_id);
3281
3282 if (!p_vf)
3283 return;
3284
3285 DP_INFO(p_hwfn,
3286 "VF [%d] - Malicious behavior [%02x]\n",
3287 p_vf->abs_vf_id, p_data->err_id);
3288
3289 p_vf->b_malicious = true;
3290}
3291
Yuval Mintz37bff2b2016-05-11 16:36:13 +03003292int qed_sriov_eqe_event(struct qed_hwfn *p_hwfn,
3293 u8 opcode, __le16 echo, union event_ring_data *data)
3294{
3295 switch (opcode) {
3296 case COMMON_EVENT_VF_PF_CHANNEL:
3297 return qed_sriov_vfpf_msg(p_hwfn, le16_to_cpu(echo),
3298 &data->vf_pf_channel.msg_addr);
Yuval Mintz7eff82b2016-10-14 05:19:22 -04003299 case COMMON_EVENT_MALICIOUS_VF:
3300 qed_sriov_vfpf_malicious(p_hwfn, &data->malicious_vf);
3301 return 0;
Yuval Mintz37bff2b2016-05-11 16:36:13 +03003302 default:
3303 DP_INFO(p_hwfn->cdev, "Unknown sriov eqe event 0x%02x\n",
3304 opcode);
3305 return -EINVAL;
3306 }
3307}
3308
Yuval Mintz32a47e72016-05-11 16:36:12 +03003309u16 qed_iov_get_next_active_vf(struct qed_hwfn *p_hwfn, u16 rel_vf_id)
3310{
3311 struct qed_hw_sriov_info *p_iov = p_hwfn->cdev->p_iov_info;
3312 u16 i;
3313
3314 if (!p_iov)
3315 goto out;
3316
3317 for (i = rel_vf_id; i < p_iov->total_vfs; i++)
Yuval Mintz7eff82b2016-10-14 05:19:22 -04003318 if (qed_iov_is_valid_vfid(p_hwfn, rel_vf_id, true, false))
Yuval Mintz32a47e72016-05-11 16:36:12 +03003319 return i;
3320
3321out:
3322 return MAX_NUM_VFS;
3323}
Yuval Mintz37bff2b2016-05-11 16:36:13 +03003324
3325static int qed_iov_copy_vf_msg(struct qed_hwfn *p_hwfn, struct qed_ptt *ptt,
3326 int vfid)
3327{
3328 struct qed_dmae_params params;
3329 struct qed_vf_info *vf_info;
3330
3331 vf_info = qed_iov_get_vf_info(p_hwfn, (u16) vfid, true);
3332 if (!vf_info)
3333 return -EINVAL;
3334
3335 memset(&params, 0, sizeof(struct qed_dmae_params));
3336 params.flags = QED_DMAE_FLAG_VF_SRC | QED_DMAE_FLAG_COMPLETION_DST;
3337 params.src_vfid = vf_info->abs_vf_id;
3338
3339 if (qed_dmae_host2host(p_hwfn, ptt,
3340 vf_info->vf_mbx.pending_req,
3341 vf_info->vf_mbx.req_phys,
3342 sizeof(union vfpf_tlvs) / 4, &params)) {
3343 DP_VERBOSE(p_hwfn, QED_MSG_IOV,
3344 "Failed to copy message from VF 0x%02x\n", vfid);
3345
3346 return -EIO;
3347 }
3348
3349 return 0;
3350}
3351
Yuval Mintzeff16962016-05-11 16:36:21 +03003352static void qed_iov_bulletin_set_forced_mac(struct qed_hwfn *p_hwfn,
3353 u8 *mac, int vfid)
3354{
3355 struct qed_vf_info *vf_info;
3356 u64 feature;
3357
3358 vf_info = qed_iov_get_vf_info(p_hwfn, (u16)vfid, true);
3359 if (!vf_info) {
3360 DP_NOTICE(p_hwfn->cdev,
3361 "Can not set forced MAC, invalid vfid [%d]\n", vfid);
3362 return;
3363 }
3364
Yuval Mintz7eff82b2016-10-14 05:19:22 -04003365 if (vf_info->b_malicious) {
3366 DP_NOTICE(p_hwfn->cdev,
3367 "Can't set forced MAC to malicious VF [%d]\n", vfid);
3368 return;
3369 }
3370
Yuval Mintzeff16962016-05-11 16:36:21 +03003371 feature = 1 << MAC_ADDR_FORCED;
3372 memcpy(vf_info->bulletin.p_virt->mac, mac, ETH_ALEN);
3373
3374 vf_info->bulletin.p_virt->valid_bitmap |= feature;
3375 /* Forced MAC will disable MAC_ADDR */
Yuval Mintz1a635e42016-08-15 10:42:43 +03003376 vf_info->bulletin.p_virt->valid_bitmap &= ~BIT(VFPF_BULLETIN_MAC_ADDR);
Yuval Mintzeff16962016-05-11 16:36:21 +03003377
3378 qed_iov_configure_vport_forced(p_hwfn, vf_info, feature);
3379}
3380
Baoyou Xieba569472016-09-09 09:21:15 +08003381static void qed_iov_bulletin_set_forced_vlan(struct qed_hwfn *p_hwfn,
3382 u16 pvid, int vfid)
Yuval Mintz08feecd2016-05-11 16:36:20 +03003383{
3384 struct qed_vf_info *vf_info;
3385 u64 feature;
3386
3387 vf_info = qed_iov_get_vf_info(p_hwfn, (u16) vfid, true);
3388 if (!vf_info) {
3389 DP_NOTICE(p_hwfn->cdev,
3390 "Can not set forced MAC, invalid vfid [%d]\n", vfid);
3391 return;
3392 }
3393
Yuval Mintz7eff82b2016-10-14 05:19:22 -04003394 if (vf_info->b_malicious) {
3395 DP_NOTICE(p_hwfn->cdev,
3396 "Can't set forced vlan to malicious VF [%d]\n", vfid);
3397 return;
3398 }
3399
Yuval Mintz08feecd2016-05-11 16:36:20 +03003400 feature = 1 << VLAN_ADDR_FORCED;
3401 vf_info->bulletin.p_virt->pvid = pvid;
3402 if (pvid)
3403 vf_info->bulletin.p_virt->valid_bitmap |= feature;
3404 else
3405 vf_info->bulletin.p_virt->valid_bitmap &= ~feature;
3406
3407 qed_iov_configure_vport_forced(p_hwfn, vf_info, feature);
3408}
3409
Yuval Mintz6ddc7602016-05-11 16:36:23 +03003410static bool qed_iov_vf_has_vport_instance(struct qed_hwfn *p_hwfn, int vfid)
3411{
3412 struct qed_vf_info *p_vf_info;
3413
3414 p_vf_info = qed_iov_get_vf_info(p_hwfn, (u16) vfid, true);
3415 if (!p_vf_info)
3416 return false;
3417
3418 return !!p_vf_info->vport_instance;
3419}
3420
Baoyou Xieba569472016-09-09 09:21:15 +08003421static bool qed_iov_is_vf_stopped(struct qed_hwfn *p_hwfn, int vfid)
Yuval Mintz0b55e272016-05-11 16:36:15 +03003422{
3423 struct qed_vf_info *p_vf_info;
3424
3425 p_vf_info = qed_iov_get_vf_info(p_hwfn, (u16) vfid, true);
3426 if (!p_vf_info)
3427 return true;
3428
3429 return p_vf_info->state == VF_STOPPED;
3430}
3431
Yuval Mintz73390ac2016-05-11 16:36:24 +03003432static bool qed_iov_spoofchk_get(struct qed_hwfn *p_hwfn, int vfid)
3433{
3434 struct qed_vf_info *vf_info;
3435
3436 vf_info = qed_iov_get_vf_info(p_hwfn, (u16) vfid, true);
3437 if (!vf_info)
3438 return false;
3439
3440 return vf_info->spoof_chk;
3441}
3442
Baoyou Xieba569472016-09-09 09:21:15 +08003443static int qed_iov_spoofchk_set(struct qed_hwfn *p_hwfn, int vfid, bool val)
Yuval Mintz6ddc7602016-05-11 16:36:23 +03003444{
3445 struct qed_vf_info *vf;
3446 int rc = -EINVAL;
3447
3448 if (!qed_iov_pf_sanity_check(p_hwfn, vfid)) {
3449 DP_NOTICE(p_hwfn,
3450 "SR-IOV sanity check failed, can't set spoofchk\n");
3451 goto out;
3452 }
3453
3454 vf = qed_iov_get_vf_info(p_hwfn, (u16) vfid, true);
3455 if (!vf)
3456 goto out;
3457
3458 if (!qed_iov_vf_has_vport_instance(p_hwfn, vfid)) {
3459 /* After VF VPORT start PF will configure spoof check */
3460 vf->req_spoofchk_val = val;
3461 rc = 0;
3462 goto out;
3463 }
3464
3465 rc = __qed_iov_spoofchk_set(p_hwfn, vf, val);
3466
3467out:
3468 return rc;
3469}
3470
Yuval Mintzeff16962016-05-11 16:36:21 +03003471static u8 *qed_iov_bulletin_get_forced_mac(struct qed_hwfn *p_hwfn,
3472 u16 rel_vf_id)
3473{
3474 struct qed_vf_info *p_vf;
3475
3476 p_vf = qed_iov_get_vf_info(p_hwfn, rel_vf_id, true);
3477 if (!p_vf || !p_vf->bulletin.p_virt)
3478 return NULL;
3479
Yuval Mintz1a635e42016-08-15 10:42:43 +03003480 if (!(p_vf->bulletin.p_virt->valid_bitmap & BIT(MAC_ADDR_FORCED)))
Yuval Mintzeff16962016-05-11 16:36:21 +03003481 return NULL;
3482
3483 return p_vf->bulletin.p_virt->mac;
3484}
3485
Baoyou Xieba569472016-09-09 09:21:15 +08003486static u16
3487qed_iov_bulletin_get_forced_vlan(struct qed_hwfn *p_hwfn, u16 rel_vf_id)
Yuval Mintz08feecd2016-05-11 16:36:20 +03003488{
3489 struct qed_vf_info *p_vf;
3490
3491 p_vf = qed_iov_get_vf_info(p_hwfn, rel_vf_id, true);
3492 if (!p_vf || !p_vf->bulletin.p_virt)
3493 return 0;
3494
Yuval Mintz1a635e42016-08-15 10:42:43 +03003495 if (!(p_vf->bulletin.p_virt->valid_bitmap & BIT(VLAN_ADDR_FORCED)))
Yuval Mintz08feecd2016-05-11 16:36:20 +03003496 return 0;
3497
3498 return p_vf->bulletin.p_virt->pvid;
3499}
3500
Yuval Mintz733def62016-05-11 16:36:22 +03003501static int qed_iov_configure_tx_rate(struct qed_hwfn *p_hwfn,
3502 struct qed_ptt *p_ptt, int vfid, int val)
3503{
3504 struct qed_vf_info *vf;
3505 u8 abs_vp_id = 0;
3506 int rc;
3507
3508 vf = qed_iov_get_vf_info(p_hwfn, (u16)vfid, true);
3509 if (!vf)
3510 return -EINVAL;
3511
3512 rc = qed_fw_vport(p_hwfn, vf->vport_id, &abs_vp_id);
3513 if (rc)
3514 return rc;
3515
3516 return qed_init_vport_rl(p_hwfn, p_ptt, abs_vp_id, (u32)val);
3517}
3518
Baoyou Xieba569472016-09-09 09:21:15 +08003519static int
3520qed_iov_configure_min_tx_rate(struct qed_dev *cdev, int vfid, u32 rate)
Yuval Mintz733def62016-05-11 16:36:22 +03003521{
3522 struct qed_vf_info *vf;
3523 u8 vport_id;
3524 int i;
3525
3526 for_each_hwfn(cdev, i) {
3527 struct qed_hwfn *p_hwfn = &cdev->hwfns[i];
3528
3529 if (!qed_iov_pf_sanity_check(p_hwfn, vfid)) {
3530 DP_NOTICE(p_hwfn,
3531 "SR-IOV sanity check failed, can't set min rate\n");
3532 return -EINVAL;
3533 }
3534 }
3535
3536 vf = qed_iov_get_vf_info(QED_LEADING_HWFN(cdev), (u16)vfid, true);
3537 vport_id = vf->vport_id;
3538
3539 return qed_configure_vport_wfq(cdev, vport_id, rate);
3540}
3541
Yuval Mintz73390ac2016-05-11 16:36:24 +03003542static int qed_iov_get_vf_min_rate(struct qed_hwfn *p_hwfn, int vfid)
3543{
3544 struct qed_wfq_data *vf_vp_wfq;
3545 struct qed_vf_info *vf_info;
3546
3547 vf_info = qed_iov_get_vf_info(p_hwfn, (u16) vfid, true);
3548 if (!vf_info)
3549 return 0;
3550
3551 vf_vp_wfq = &p_hwfn->qm_info.wfq_data[vf_info->vport_id];
3552
3553 if (vf_vp_wfq->configured)
3554 return vf_vp_wfq->min_speed;
3555 else
3556 return 0;
3557}
3558
Yuval Mintz37bff2b2016-05-11 16:36:13 +03003559/**
3560 * qed_schedule_iov - schedules IOV task for VF and PF
3561 * @hwfn: hardware function pointer
3562 * @flag: IOV flag for VF/PF
3563 */
3564void qed_schedule_iov(struct qed_hwfn *hwfn, enum qed_iov_wq_flag flag)
3565{
3566 smp_mb__before_atomic();
3567 set_bit(flag, &hwfn->iov_task_flags);
3568 smp_mb__after_atomic();
3569 DP_VERBOSE(hwfn, QED_MSG_IOV, "Scheduling iov task [Flag: %d]\n", flag);
3570 queue_delayed_work(hwfn->iov_wq, &hwfn->iov_task, 0);
3571}
3572
Yuval Mintz1408cc1f2016-05-11 16:36:14 +03003573void qed_vf_start_iov_wq(struct qed_dev *cdev)
3574{
3575 int i;
3576
3577 for_each_hwfn(cdev, i)
3578 queue_delayed_work(cdev->hwfns[i].iov_wq,
3579 &cdev->hwfns[i].iov_task, 0);
3580}
3581
Yuval Mintz0b55e272016-05-11 16:36:15 +03003582int qed_sriov_disable(struct qed_dev *cdev, bool pci_enabled)
3583{
3584 int i, j;
3585
3586 for_each_hwfn(cdev, i)
3587 if (cdev->hwfns[i].iov_wq)
3588 flush_workqueue(cdev->hwfns[i].iov_wq);
3589
3590 /* Mark VFs for disablement */
3591 qed_iov_set_vfs_to_disable(cdev, true);
3592
3593 if (cdev->p_iov_info && cdev->p_iov_info->num_vfs && pci_enabled)
3594 pci_disable_sriov(cdev->pdev);
3595
3596 for_each_hwfn(cdev, i) {
3597 struct qed_hwfn *hwfn = &cdev->hwfns[i];
3598 struct qed_ptt *ptt = qed_ptt_acquire(hwfn);
3599
3600 /* Failure to acquire the ptt in 100g creates an odd error
3601 * where the first engine has already relased IOV.
3602 */
3603 if (!ptt) {
3604 DP_ERR(hwfn, "Failed to acquire ptt\n");
3605 return -EBUSY;
3606 }
3607
Yuval Mintz733def62016-05-11 16:36:22 +03003608 /* Clean WFQ db and configure equal weight for all vports */
3609 qed_clean_wfq_db(hwfn, ptt);
3610
Yuval Mintz0b55e272016-05-11 16:36:15 +03003611 qed_for_each_vf(hwfn, j) {
3612 int k;
3613
Yuval Mintz7eff82b2016-10-14 05:19:22 -04003614 if (!qed_iov_is_valid_vfid(hwfn, j, true, false))
Yuval Mintz0b55e272016-05-11 16:36:15 +03003615 continue;
3616
3617 /* Wait until VF is disabled before releasing */
3618 for (k = 0; k < 100; k++) {
3619 if (!qed_iov_is_vf_stopped(hwfn, j))
3620 msleep(20);
3621 else
3622 break;
3623 }
3624
3625 if (k < 100)
3626 qed_iov_release_hw_for_vf(&cdev->hwfns[i],
3627 ptt, j);
3628 else
3629 DP_ERR(hwfn,
3630 "Timeout waiting for VF's FLR to end\n");
3631 }
3632
3633 qed_ptt_release(hwfn, ptt);
3634 }
3635
3636 qed_iov_set_vfs_to_disable(cdev, false);
3637
3638 return 0;
3639}
3640
Mintz, Yuval3da7a372016-11-29 16:47:06 +02003641static void qed_sriov_enable_qid_config(struct qed_hwfn *hwfn,
3642 u16 vfid,
3643 struct qed_iov_vf_init_params *params)
3644{
3645 u16 base, i;
3646
3647 /* Since we have an equal resource distribution per-VF, and we assume
3648 * PF has acquired the QED_PF_L2_QUE first queues, we start setting
3649 * sequentially from there.
3650 */
3651 base = FEAT_NUM(hwfn, QED_PF_L2_QUE) + vfid * params->num_queues;
3652
3653 params->rel_vf_id = vfid;
3654 for (i = 0; i < params->num_queues; i++) {
3655 params->req_rx_queue[i] = base + i;
3656 params->req_tx_queue[i] = base + i;
3657 }
3658}
3659
Yuval Mintz0b55e272016-05-11 16:36:15 +03003660static int qed_sriov_enable(struct qed_dev *cdev, int num)
3661{
Mintz, Yuval3da7a372016-11-29 16:47:06 +02003662 struct qed_iov_vf_init_params params;
Yuval Mintz0b55e272016-05-11 16:36:15 +03003663 int i, j, rc;
3664
3665 if (num >= RESC_NUM(&cdev->hwfns[0], QED_VPORT)) {
3666 DP_NOTICE(cdev, "Can start at most %d VFs\n",
3667 RESC_NUM(&cdev->hwfns[0], QED_VPORT) - 1);
3668 return -EINVAL;
3669 }
3670
Mintz, Yuval3da7a372016-11-29 16:47:06 +02003671 memset(&params, 0, sizeof(params));
3672
Yuval Mintz0b55e272016-05-11 16:36:15 +03003673 /* Initialize HW for VF access */
3674 for_each_hwfn(cdev, j) {
3675 struct qed_hwfn *hwfn = &cdev->hwfns[j];
3676 struct qed_ptt *ptt = qed_ptt_acquire(hwfn);
Mintz, Yuval5a1f9652016-10-31 07:14:26 +02003677
3678 /* Make sure not to use more than 16 queues per VF */
Mintz, Yuval3da7a372016-11-29 16:47:06 +02003679 params.num_queues = min_t(int,
3680 FEAT_NUM(hwfn, QED_VF_L2_QUE) / num,
3681 16);
Yuval Mintz0b55e272016-05-11 16:36:15 +03003682
3683 if (!ptt) {
3684 DP_ERR(hwfn, "Failed to acquire ptt\n");
3685 rc = -EBUSY;
3686 goto err;
3687 }
3688
Yuval Mintz0b55e272016-05-11 16:36:15 +03003689 for (i = 0; i < num; i++) {
Yuval Mintz7eff82b2016-10-14 05:19:22 -04003690 if (!qed_iov_is_valid_vfid(hwfn, i, false, true))
Yuval Mintz0b55e272016-05-11 16:36:15 +03003691 continue;
3692
Mintz, Yuval3da7a372016-11-29 16:47:06 +02003693 qed_sriov_enable_qid_config(hwfn, i, &params);
3694 rc = qed_iov_init_hw_for_vf(hwfn, ptt, &params);
Yuval Mintz0b55e272016-05-11 16:36:15 +03003695 if (rc) {
3696 DP_ERR(cdev, "Failed to enable VF[%d]\n", i);
3697 qed_ptt_release(hwfn, ptt);
3698 goto err;
3699 }
3700 }
3701
3702 qed_ptt_release(hwfn, ptt);
3703 }
3704
3705 /* Enable SRIOV PCIe functions */
3706 rc = pci_enable_sriov(cdev->pdev, num);
3707 if (rc) {
3708 DP_ERR(cdev, "Failed to enable sriov [%d]\n", rc);
3709 goto err;
3710 }
3711
3712 return num;
3713
3714err:
3715 qed_sriov_disable(cdev, false);
3716 return rc;
3717}
3718
3719static int qed_sriov_configure(struct qed_dev *cdev, int num_vfs_param)
3720{
3721 if (!IS_QED_SRIOV(cdev)) {
3722 DP_VERBOSE(cdev, QED_MSG_IOV, "SR-IOV is not supported\n");
3723 return -EOPNOTSUPP;
3724 }
3725
3726 if (num_vfs_param)
3727 return qed_sriov_enable(cdev, num_vfs_param);
3728 else
3729 return qed_sriov_disable(cdev, true);
3730}
3731
Yuval Mintzeff16962016-05-11 16:36:21 +03003732static int qed_sriov_pf_set_mac(struct qed_dev *cdev, u8 *mac, int vfid)
3733{
3734 int i;
3735
3736 if (!IS_QED_SRIOV(cdev) || !IS_PF_SRIOV_ALLOC(&cdev->hwfns[0])) {
3737 DP_VERBOSE(cdev, QED_MSG_IOV,
3738 "Cannot set a VF MAC; Sriov is not enabled\n");
3739 return -EINVAL;
3740 }
3741
Yuval Mintz7eff82b2016-10-14 05:19:22 -04003742 if (!qed_iov_is_valid_vfid(&cdev->hwfns[0], vfid, true, true)) {
Yuval Mintzeff16962016-05-11 16:36:21 +03003743 DP_VERBOSE(cdev, QED_MSG_IOV,
3744 "Cannot set VF[%d] MAC (VF is not active)\n", vfid);
3745 return -EINVAL;
3746 }
3747
3748 for_each_hwfn(cdev, i) {
3749 struct qed_hwfn *hwfn = &cdev->hwfns[i];
3750 struct qed_public_vf_info *vf_info;
3751
3752 vf_info = qed_iov_get_public_vf_info(hwfn, vfid, true);
3753 if (!vf_info)
3754 continue;
3755
3756 /* Set the forced MAC, and schedule the IOV task */
3757 ether_addr_copy(vf_info->forced_mac, mac);
3758 qed_schedule_iov(hwfn, QED_IOV_WQ_SET_UNICAST_FILTER_FLAG);
3759 }
3760
3761 return 0;
3762}
3763
Yuval Mintz08feecd2016-05-11 16:36:20 +03003764static int qed_sriov_pf_set_vlan(struct qed_dev *cdev, u16 vid, int vfid)
3765{
3766 int i;
3767
3768 if (!IS_QED_SRIOV(cdev) || !IS_PF_SRIOV_ALLOC(&cdev->hwfns[0])) {
3769 DP_VERBOSE(cdev, QED_MSG_IOV,
3770 "Cannot set a VF MAC; Sriov is not enabled\n");
3771 return -EINVAL;
3772 }
3773
Yuval Mintz7eff82b2016-10-14 05:19:22 -04003774 if (!qed_iov_is_valid_vfid(&cdev->hwfns[0], vfid, true, true)) {
Yuval Mintz08feecd2016-05-11 16:36:20 +03003775 DP_VERBOSE(cdev, QED_MSG_IOV,
3776 "Cannot set VF[%d] MAC (VF is not active)\n", vfid);
3777 return -EINVAL;
3778 }
3779
3780 for_each_hwfn(cdev, i) {
3781 struct qed_hwfn *hwfn = &cdev->hwfns[i];
3782 struct qed_public_vf_info *vf_info;
3783
3784 vf_info = qed_iov_get_public_vf_info(hwfn, vfid, true);
3785 if (!vf_info)
3786 continue;
3787
3788 /* Set the forced vlan, and schedule the IOV task */
3789 vf_info->forced_vlan = vid;
3790 qed_schedule_iov(hwfn, QED_IOV_WQ_SET_UNICAST_FILTER_FLAG);
3791 }
3792
3793 return 0;
3794}
3795
Yuval Mintz73390ac2016-05-11 16:36:24 +03003796static int qed_get_vf_config(struct qed_dev *cdev,
3797 int vf_id, struct ifla_vf_info *ivi)
3798{
3799 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev);
3800 struct qed_public_vf_info *vf_info;
3801 struct qed_mcp_link_state link;
3802 u32 tx_rate;
3803
3804 /* Sanitize request */
3805 if (IS_VF(cdev))
3806 return -EINVAL;
3807
Yuval Mintz7eff82b2016-10-14 05:19:22 -04003808 if (!qed_iov_is_valid_vfid(&cdev->hwfns[0], vf_id, true, false)) {
Yuval Mintz73390ac2016-05-11 16:36:24 +03003809 DP_VERBOSE(cdev, QED_MSG_IOV,
3810 "VF index [%d] isn't active\n", vf_id);
3811 return -EINVAL;
3812 }
3813
3814 vf_info = qed_iov_get_public_vf_info(hwfn, vf_id, true);
3815
3816 qed_iov_get_link(hwfn, vf_id, NULL, &link, NULL);
3817
3818 /* Fill information about VF */
3819 ivi->vf = vf_id;
3820
3821 if (is_valid_ether_addr(vf_info->forced_mac))
3822 ether_addr_copy(ivi->mac, vf_info->forced_mac);
3823 else
3824 ether_addr_copy(ivi->mac, vf_info->mac);
3825
3826 ivi->vlan = vf_info->forced_vlan;
3827 ivi->spoofchk = qed_iov_spoofchk_get(hwfn, vf_id);
3828 ivi->linkstate = vf_info->link_state;
3829 tx_rate = vf_info->tx_rate;
3830 ivi->max_tx_rate = tx_rate ? tx_rate : link.speed;
3831 ivi->min_tx_rate = qed_iov_get_vf_min_rate(hwfn, vf_id);
3832
3833 return 0;
3834}
3835
Yuval Mintz36558c32016-05-11 16:36:17 +03003836void qed_inform_vf_link_state(struct qed_hwfn *hwfn)
3837{
3838 struct qed_mcp_link_capabilities caps;
3839 struct qed_mcp_link_params params;
3840 struct qed_mcp_link_state link;
3841 int i;
3842
3843 if (!hwfn->pf_iov_info)
3844 return;
3845
3846 /* Update bulletin of all future possible VFs with link configuration */
3847 for (i = 0; i < hwfn->cdev->p_iov_info->total_vfs; i++) {
Yuval Mintz733def62016-05-11 16:36:22 +03003848 struct qed_public_vf_info *vf_info;
3849
3850 vf_info = qed_iov_get_public_vf_info(hwfn, i, false);
3851 if (!vf_info)
3852 continue;
3853
Yuval Mintz36558c32016-05-11 16:36:17 +03003854 memcpy(&params, qed_mcp_get_link_params(hwfn), sizeof(params));
3855 memcpy(&link, qed_mcp_get_link_state(hwfn), sizeof(link));
3856 memcpy(&caps, qed_mcp_get_link_capabilities(hwfn),
3857 sizeof(caps));
3858
Yuval Mintz733def62016-05-11 16:36:22 +03003859 /* Modify link according to the VF's configured link state */
3860 switch (vf_info->link_state) {
3861 case IFLA_VF_LINK_STATE_DISABLE:
3862 link.link_up = false;
3863 break;
3864 case IFLA_VF_LINK_STATE_ENABLE:
3865 link.link_up = true;
3866 /* Set speed according to maximum supported by HW.
3867 * that is 40G for regular devices and 100G for CMT
3868 * mode devices.
3869 */
3870 link.speed = (hwfn->cdev->num_hwfns > 1) ?
3871 100000 : 40000;
3872 default:
3873 /* In auto mode pass PF link image to VF */
3874 break;
3875 }
3876
3877 if (link.link_up && vf_info->tx_rate) {
3878 struct qed_ptt *ptt;
3879 int rate;
3880
3881 rate = min_t(int, vf_info->tx_rate, link.speed);
3882
3883 ptt = qed_ptt_acquire(hwfn);
3884 if (!ptt) {
3885 DP_NOTICE(hwfn, "Failed to acquire PTT\n");
3886 return;
3887 }
3888
3889 if (!qed_iov_configure_tx_rate(hwfn, ptt, i, rate)) {
3890 vf_info->tx_rate = rate;
3891 link.speed = rate;
3892 }
3893
3894 qed_ptt_release(hwfn, ptt);
3895 }
3896
Yuval Mintz36558c32016-05-11 16:36:17 +03003897 qed_iov_set_link(hwfn, i, &params, &link, &caps);
3898 }
3899
3900 qed_schedule_iov(hwfn, QED_IOV_WQ_BULLETIN_UPDATE_FLAG);
3901}
3902
Yuval Mintz733def62016-05-11 16:36:22 +03003903static int qed_set_vf_link_state(struct qed_dev *cdev,
3904 int vf_id, int link_state)
3905{
3906 int i;
3907
3908 /* Sanitize request */
3909 if (IS_VF(cdev))
3910 return -EINVAL;
3911
Yuval Mintz7eff82b2016-10-14 05:19:22 -04003912 if (!qed_iov_is_valid_vfid(&cdev->hwfns[0], vf_id, true, true)) {
Yuval Mintz733def62016-05-11 16:36:22 +03003913 DP_VERBOSE(cdev, QED_MSG_IOV,
3914 "VF index [%d] isn't active\n", vf_id);
3915 return -EINVAL;
3916 }
3917
3918 /* Handle configuration of link state */
3919 for_each_hwfn(cdev, i) {
3920 struct qed_hwfn *hwfn = &cdev->hwfns[i];
3921 struct qed_public_vf_info *vf;
3922
3923 vf = qed_iov_get_public_vf_info(hwfn, vf_id, true);
3924 if (!vf)
3925 continue;
3926
3927 if (vf->link_state == link_state)
3928 continue;
3929
3930 vf->link_state = link_state;
3931 qed_inform_vf_link_state(&cdev->hwfns[i]);
3932 }
3933
3934 return 0;
3935}
3936
Yuval Mintz6ddc7602016-05-11 16:36:23 +03003937static int qed_spoof_configure(struct qed_dev *cdev, int vfid, bool val)
3938{
3939 int i, rc = -EINVAL;
3940
3941 for_each_hwfn(cdev, i) {
3942 struct qed_hwfn *p_hwfn = &cdev->hwfns[i];
3943
3944 rc = qed_iov_spoofchk_set(p_hwfn, vfid, val);
3945 if (rc)
3946 break;
3947 }
3948
3949 return rc;
3950}
3951
Yuval Mintz733def62016-05-11 16:36:22 +03003952static int qed_configure_max_vf_rate(struct qed_dev *cdev, int vfid, int rate)
3953{
3954 int i;
3955
3956 for_each_hwfn(cdev, i) {
3957 struct qed_hwfn *p_hwfn = &cdev->hwfns[i];
3958 struct qed_public_vf_info *vf;
3959
3960 if (!qed_iov_pf_sanity_check(p_hwfn, vfid)) {
3961 DP_NOTICE(p_hwfn,
3962 "SR-IOV sanity check failed, can't set tx rate\n");
3963 return -EINVAL;
3964 }
3965
3966 vf = qed_iov_get_public_vf_info(p_hwfn, vfid, true);
3967
3968 vf->tx_rate = rate;
3969
3970 qed_inform_vf_link_state(p_hwfn);
3971 }
3972
3973 return 0;
3974}
3975
3976static int qed_set_vf_rate(struct qed_dev *cdev,
3977 int vfid, u32 min_rate, u32 max_rate)
3978{
3979 int rc_min = 0, rc_max = 0;
3980
3981 if (max_rate)
3982 rc_max = qed_configure_max_vf_rate(cdev, vfid, max_rate);
3983
3984 if (min_rate)
3985 rc_min = qed_iov_configure_min_tx_rate(cdev, vfid, min_rate);
3986
3987 if (rc_max | rc_min)
3988 return -EINVAL;
3989
3990 return 0;
3991}
3992
Mintz, Yuvalf990c822017-01-01 13:57:08 +02003993static int qed_set_vf_trust(struct qed_dev *cdev, int vfid, bool trust)
3994{
3995 int i;
3996
3997 for_each_hwfn(cdev, i) {
3998 struct qed_hwfn *hwfn = &cdev->hwfns[i];
3999 struct qed_public_vf_info *vf;
4000
4001 if (!qed_iov_pf_sanity_check(hwfn, vfid)) {
4002 DP_NOTICE(hwfn,
4003 "SR-IOV sanity check failed, can't set trust\n");
4004 return -EINVAL;
4005 }
4006
4007 vf = qed_iov_get_public_vf_info(hwfn, vfid, true);
4008
4009 if (vf->is_trusted_request == trust)
4010 return 0;
4011 vf->is_trusted_request = trust;
4012
4013 qed_schedule_iov(hwfn, QED_IOV_WQ_TRUST_FLAG);
4014 }
4015
4016 return 0;
4017}
4018
Yuval Mintz37bff2b2016-05-11 16:36:13 +03004019static void qed_handle_vf_msg(struct qed_hwfn *hwfn)
4020{
4021 u64 events[QED_VF_ARRAY_LENGTH];
4022 struct qed_ptt *ptt;
4023 int i;
4024
4025 ptt = qed_ptt_acquire(hwfn);
4026 if (!ptt) {
4027 DP_VERBOSE(hwfn, QED_MSG_IOV,
4028 "Can't acquire PTT; re-scheduling\n");
4029 qed_schedule_iov(hwfn, QED_IOV_WQ_MSG_FLAG);
4030 return;
4031 }
4032
4033 qed_iov_pf_get_and_clear_pending_events(hwfn, events);
4034
4035 DP_VERBOSE(hwfn, QED_MSG_IOV,
4036 "Event mask of VF events: 0x%llx 0x%llx 0x%llx\n",
4037 events[0], events[1], events[2]);
4038
4039 qed_for_each_vf(hwfn, i) {
4040 /* Skip VFs with no pending messages */
4041 if (!(events[i / 64] & (1ULL << (i % 64))))
4042 continue;
4043
4044 DP_VERBOSE(hwfn, QED_MSG_IOV,
4045 "Handling VF message from VF 0x%02x [Abs 0x%02x]\n",
4046 i, hwfn->cdev->p_iov_info->first_vf_in_pf + i);
4047
4048 /* Copy VF's message to PF's request buffer for that VF */
4049 if (qed_iov_copy_vf_msg(hwfn, ptt, i))
4050 continue;
4051
4052 qed_iov_process_mbx_req(hwfn, ptt, i);
4053 }
4054
4055 qed_ptt_release(hwfn, ptt);
4056}
4057
Yuval Mintz08feecd2016-05-11 16:36:20 +03004058static void qed_handle_pf_set_vf_unicast(struct qed_hwfn *hwfn)
4059{
4060 int i;
4061
4062 qed_for_each_vf(hwfn, i) {
4063 struct qed_public_vf_info *info;
4064 bool update = false;
Yuval Mintzeff16962016-05-11 16:36:21 +03004065 u8 *mac;
Yuval Mintz08feecd2016-05-11 16:36:20 +03004066
4067 info = qed_iov_get_public_vf_info(hwfn, i, true);
4068 if (!info)
4069 continue;
4070
4071 /* Update data on bulletin board */
Yuval Mintzeff16962016-05-11 16:36:21 +03004072 mac = qed_iov_bulletin_get_forced_mac(hwfn, i);
4073 if (is_valid_ether_addr(info->forced_mac) &&
4074 (!mac || !ether_addr_equal(mac, info->forced_mac))) {
4075 DP_VERBOSE(hwfn,
4076 QED_MSG_IOV,
4077 "Handling PF setting of VF MAC to VF 0x%02x [Abs 0x%02x]\n",
4078 i,
4079 hwfn->cdev->p_iov_info->first_vf_in_pf + i);
4080
4081 /* Update bulletin board with forced MAC */
4082 qed_iov_bulletin_set_forced_mac(hwfn,
4083 info->forced_mac, i);
4084 update = true;
4085 }
Yuval Mintz08feecd2016-05-11 16:36:20 +03004086
4087 if (qed_iov_bulletin_get_forced_vlan(hwfn, i) ^
4088 info->forced_vlan) {
4089 DP_VERBOSE(hwfn,
4090 QED_MSG_IOV,
4091 "Handling PF setting of pvid [0x%04x] to VF 0x%02x [Abs 0x%02x]\n",
4092 info->forced_vlan,
4093 i,
4094 hwfn->cdev->p_iov_info->first_vf_in_pf + i);
4095 qed_iov_bulletin_set_forced_vlan(hwfn,
4096 info->forced_vlan, i);
4097 update = true;
4098 }
4099
4100 if (update)
4101 qed_schedule_iov(hwfn, QED_IOV_WQ_BULLETIN_UPDATE_FLAG);
4102 }
4103}
4104
Yuval Mintz36558c32016-05-11 16:36:17 +03004105static void qed_handle_bulletin_post(struct qed_hwfn *hwfn)
4106{
4107 struct qed_ptt *ptt;
4108 int i;
4109
4110 ptt = qed_ptt_acquire(hwfn);
4111 if (!ptt) {
4112 DP_NOTICE(hwfn, "Failed allocating a ptt entry\n");
4113 qed_schedule_iov(hwfn, QED_IOV_WQ_BULLETIN_UPDATE_FLAG);
4114 return;
4115 }
4116
4117 qed_for_each_vf(hwfn, i)
4118 qed_iov_post_vf_bulletin(hwfn, i, ptt);
4119
4120 qed_ptt_release(hwfn, ptt);
4121}
4122
Mintz, Yuvalf990c822017-01-01 13:57:08 +02004123static void qed_iov_handle_trust_change(struct qed_hwfn *hwfn)
4124{
4125 struct qed_sp_vport_update_params params;
4126 struct qed_filter_accept_flags *flags;
4127 struct qed_public_vf_info *vf_info;
4128 struct qed_vf_info *vf;
4129 u8 mask;
4130 int i;
4131
4132 mask = QED_ACCEPT_UCAST_UNMATCHED | QED_ACCEPT_MCAST_UNMATCHED;
4133 flags = &params.accept_flags;
4134
4135 qed_for_each_vf(hwfn, i) {
4136 /* Need to make sure current requested configuration didn't
4137 * flip so that we'll end up configuring something that's not
4138 * needed.
4139 */
4140 vf_info = qed_iov_get_public_vf_info(hwfn, i, true);
4141 if (vf_info->is_trusted_configured ==
4142 vf_info->is_trusted_request)
4143 continue;
4144 vf_info->is_trusted_configured = vf_info->is_trusted_request;
4145
4146 /* Validate that the VF has a configured vport */
4147 vf = qed_iov_get_vf_info(hwfn, i, true);
4148 if (!vf->vport_instance)
4149 continue;
4150
4151 memset(&params, 0, sizeof(params));
4152 params.opaque_fid = vf->opaque_fid;
4153 params.vport_id = vf->vport_id;
4154
4155 if (vf_info->rx_accept_mode & mask) {
4156 flags->update_rx_mode_config = 1;
4157 flags->rx_accept_filter = vf_info->rx_accept_mode;
4158 }
4159
4160 if (vf_info->tx_accept_mode & mask) {
4161 flags->update_tx_mode_config = 1;
4162 flags->tx_accept_filter = vf_info->tx_accept_mode;
4163 }
4164
4165 /* Remove if needed; Otherwise this would set the mask */
4166 if (!vf_info->is_trusted_configured) {
4167 flags->rx_accept_filter &= ~mask;
4168 flags->tx_accept_filter &= ~mask;
4169 }
4170
4171 if (flags->update_rx_mode_config ||
4172 flags->update_tx_mode_config)
4173 qed_sp_vport_update(hwfn, &params,
4174 QED_SPQ_MODE_EBLOCK, NULL);
4175 }
4176}
4177
Baoyou Xieba569472016-09-09 09:21:15 +08004178static void qed_iov_pf_task(struct work_struct *work)
4179
Yuval Mintz37bff2b2016-05-11 16:36:13 +03004180{
4181 struct qed_hwfn *hwfn = container_of(work, struct qed_hwfn,
4182 iov_task.work);
Yuval Mintz0b55e272016-05-11 16:36:15 +03004183 int rc;
Yuval Mintz37bff2b2016-05-11 16:36:13 +03004184
4185 if (test_and_clear_bit(QED_IOV_WQ_STOP_WQ_FLAG, &hwfn->iov_task_flags))
4186 return;
4187
Yuval Mintz0b55e272016-05-11 16:36:15 +03004188 if (test_and_clear_bit(QED_IOV_WQ_FLR_FLAG, &hwfn->iov_task_flags)) {
4189 struct qed_ptt *ptt = qed_ptt_acquire(hwfn);
4190
4191 if (!ptt) {
4192 qed_schedule_iov(hwfn, QED_IOV_WQ_FLR_FLAG);
4193 return;
4194 }
4195
4196 rc = qed_iov_vf_flr_cleanup(hwfn, ptt);
4197 if (rc)
4198 qed_schedule_iov(hwfn, QED_IOV_WQ_FLR_FLAG);
4199
4200 qed_ptt_release(hwfn, ptt);
4201 }
4202
Yuval Mintz37bff2b2016-05-11 16:36:13 +03004203 if (test_and_clear_bit(QED_IOV_WQ_MSG_FLAG, &hwfn->iov_task_flags))
4204 qed_handle_vf_msg(hwfn);
Yuval Mintz08feecd2016-05-11 16:36:20 +03004205
4206 if (test_and_clear_bit(QED_IOV_WQ_SET_UNICAST_FILTER_FLAG,
4207 &hwfn->iov_task_flags))
4208 qed_handle_pf_set_vf_unicast(hwfn);
4209
Yuval Mintz36558c32016-05-11 16:36:17 +03004210 if (test_and_clear_bit(QED_IOV_WQ_BULLETIN_UPDATE_FLAG,
4211 &hwfn->iov_task_flags))
4212 qed_handle_bulletin_post(hwfn);
Mintz, Yuvalf990c822017-01-01 13:57:08 +02004213
4214 if (test_and_clear_bit(QED_IOV_WQ_TRUST_FLAG, &hwfn->iov_task_flags))
4215 qed_iov_handle_trust_change(hwfn);
Yuval Mintz37bff2b2016-05-11 16:36:13 +03004216}
4217
4218void qed_iov_wq_stop(struct qed_dev *cdev, bool schedule_first)
4219{
4220 int i;
4221
4222 for_each_hwfn(cdev, i) {
4223 if (!cdev->hwfns[i].iov_wq)
4224 continue;
4225
4226 if (schedule_first) {
4227 qed_schedule_iov(&cdev->hwfns[i],
4228 QED_IOV_WQ_STOP_WQ_FLAG);
4229 cancel_delayed_work_sync(&cdev->hwfns[i].iov_task);
4230 }
4231
4232 flush_workqueue(cdev->hwfns[i].iov_wq);
4233 destroy_workqueue(cdev->hwfns[i].iov_wq);
4234 }
4235}
4236
4237int qed_iov_wq_start(struct qed_dev *cdev)
4238{
4239 char name[NAME_SIZE];
4240 int i;
4241
4242 for_each_hwfn(cdev, i) {
4243 struct qed_hwfn *p_hwfn = &cdev->hwfns[i];
4244
Yuval Mintz36558c32016-05-11 16:36:17 +03004245 /* PFs needs a dedicated workqueue only if they support IOV.
4246 * VFs always require one.
4247 */
4248 if (IS_PF(p_hwfn->cdev) && !IS_PF_SRIOV(p_hwfn))
Yuval Mintz37bff2b2016-05-11 16:36:13 +03004249 continue;
4250
4251 snprintf(name, NAME_SIZE, "iov-%02x:%02x.%02x",
4252 cdev->pdev->bus->number,
4253 PCI_SLOT(cdev->pdev->devfn), p_hwfn->abs_pf_id);
4254
4255 p_hwfn->iov_wq = create_singlethread_workqueue(name);
4256 if (!p_hwfn->iov_wq) {
4257 DP_NOTICE(p_hwfn, "Cannot create iov workqueue\n");
4258 return -ENOMEM;
4259 }
4260
Yuval Mintz36558c32016-05-11 16:36:17 +03004261 if (IS_PF(cdev))
4262 INIT_DELAYED_WORK(&p_hwfn->iov_task, qed_iov_pf_task);
4263 else
4264 INIT_DELAYED_WORK(&p_hwfn->iov_task, qed_iov_vf_task);
Yuval Mintz37bff2b2016-05-11 16:36:13 +03004265 }
4266
4267 return 0;
4268}
Yuval Mintz0b55e272016-05-11 16:36:15 +03004269
4270const struct qed_iov_hv_ops qed_iov_ops_pass = {
4271 .configure = &qed_sriov_configure,
Yuval Mintzeff16962016-05-11 16:36:21 +03004272 .set_mac = &qed_sriov_pf_set_mac,
Yuval Mintz08feecd2016-05-11 16:36:20 +03004273 .set_vlan = &qed_sriov_pf_set_vlan,
Yuval Mintz73390ac2016-05-11 16:36:24 +03004274 .get_config = &qed_get_vf_config,
Yuval Mintz733def62016-05-11 16:36:22 +03004275 .set_link_state = &qed_set_vf_link_state,
Yuval Mintz6ddc7602016-05-11 16:36:23 +03004276 .set_spoof = &qed_spoof_configure,
Yuval Mintz733def62016-05-11 16:36:22 +03004277 .set_rate = &qed_set_vf_rate,
Mintz, Yuvalf990c822017-01-01 13:57:08 +02004278 .set_trust = &qed_set_vf_trust,
Yuval Mintz0b55e272016-05-11 16:36:15 +03004279};