blob: bdb696612e11f066d37b506bbc164e155d80d469 [file] [log] [blame]
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001/*
2 * Copyright (C) 2015 Microchip Technology
3 *
4 * This program is free software; you can redistribute it and/or
5 * modify it under the terms of the GNU General Public License
6 * as published by the Free Software Foundation; either version 2
7 * of the License, or (at your option) any later version.
8 *
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
13 *
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, see <http://www.gnu.org/licenses/>.
16 */
17#include <linux/version.h>
18#include <linux/module.h>
19#include <linux/netdevice.h>
20#include <linux/etherdevice.h>
21#include <linux/ethtool.h>
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +000022#include <linux/usb.h>
23#include <linux/crc32.h>
24#include <linux/signal.h>
25#include <linux/slab.h>
26#include <linux/if_vlan.h>
27#include <linux/uaccess.h>
28#include <linux/list.h>
29#include <linux/ip.h>
30#include <linux/ipv6.h>
31#include <linux/mdio.h>
Andrew Lunnc6e970a2017-03-28 23:45:06 +020032#include <linux/phy.h>
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +000033#include <net/ip6_checksum.h>
Woojung Huhcc89c322016-11-01 20:02:00 +000034#include <linux/interrupt.h>
35#include <linux/irqdomain.h>
36#include <linux/irq.h>
37#include <linux/irqchip/chained_irq.h>
Woojung.Huh@microchip.combdfba55e2015-09-16 23:41:07 +000038#include <linux/microchipphy.h>
Russell King8c56ea42017-02-07 15:02:57 -080039#include <linux/phy.h>
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +000040#include "lan78xx.h"
41
42#define DRIVER_AUTHOR "WOOJUNG HUH <woojung.huh@microchip.com>"
43#define DRIVER_DESC "LAN78XX USB 3.0 Gigabit Ethernet Devices"
44#define DRIVER_NAME "lan78xx"
Woojung Huh02dc1f32016-12-07 20:26:25 +000045#define DRIVER_VERSION "1.0.6"
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +000046
47#define TX_TIMEOUT_JIFFIES (5 * HZ)
48#define THROTTLE_JIFFIES (HZ / 8)
49#define UNLINK_TIMEOUT_MS 3
50
51#define RX_MAX_QUEUE_MEMORY (60 * 1518)
52
53#define SS_USB_PKT_SIZE (1024)
54#define HS_USB_PKT_SIZE (512)
55#define FS_USB_PKT_SIZE (64)
56
57#define MAX_RX_FIFO_SIZE (12 * 1024)
58#define MAX_TX_FIFO_SIZE (12 * 1024)
59#define DEFAULT_BURST_CAP_SIZE (MAX_TX_FIFO_SIZE)
60#define DEFAULT_BULK_IN_DELAY (0x0800)
61#define MAX_SINGLE_PACKET_SIZE (9000)
62#define DEFAULT_TX_CSUM_ENABLE (true)
63#define DEFAULT_RX_CSUM_ENABLE (true)
64#define DEFAULT_TSO_CSUM_ENABLE (true)
65#define DEFAULT_VLAN_FILTER_ENABLE (true)
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +000066#define TX_OVERHEAD (8)
67#define RXW_PADDING 2
68
69#define LAN78XX_USB_VENDOR_ID (0x0424)
70#define LAN7800_USB_PRODUCT_ID (0x7800)
71#define LAN7850_USB_PRODUCT_ID (0x7850)
Woojung Huh02dc1f32016-12-07 20:26:25 +000072#define LAN7801_USB_PRODUCT_ID (0x7801)
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +000073#define LAN78XX_EEPROM_MAGIC (0x78A5)
74#define LAN78XX_OTP_MAGIC (0x78F3)
75
76#define MII_READ 1
77#define MII_WRITE 0
78
79#define EEPROM_INDICATOR (0xA5)
80#define EEPROM_MAC_OFFSET (0x01)
81#define MAX_EEPROM_SIZE 512
82#define OTP_INDICATOR_1 (0xF3)
83#define OTP_INDICATOR_2 (0xF7)
84
85#define WAKE_ALL (WAKE_PHY | WAKE_UCAST | \
86 WAKE_MCAST | WAKE_BCAST | \
87 WAKE_ARP | WAKE_MAGIC)
88
89/* USB related defines */
90#define BULK_IN_PIPE 1
91#define BULK_OUT_PIPE 2
92
93/* default autosuspend delay (mSec)*/
94#define DEFAULT_AUTOSUSPEND_DELAY (10 * 1000)
95
Woojung Huh20ff5562016-03-16 22:10:40 +000096/* statistic update interval (mSec) */
97#define STAT_UPDATE_TIMER (1 * 1000)
98
Woojung Huhcc89c322016-11-01 20:02:00 +000099/* defines interrupts from interrupt EP */
100#define MAX_INT_EP (32)
101#define INT_EP_INTEP (31)
102#define INT_EP_OTP_WR_DONE (28)
103#define INT_EP_EEE_TX_LPI_START (26)
104#define INT_EP_EEE_TX_LPI_STOP (25)
105#define INT_EP_EEE_RX_LPI (24)
106#define INT_EP_MAC_RESET_TIMEOUT (23)
107#define INT_EP_RDFO (22)
108#define INT_EP_TXE (21)
109#define INT_EP_USB_STATUS (20)
110#define INT_EP_TX_DIS (19)
111#define INT_EP_RX_DIS (18)
112#define INT_EP_PHY (17)
113#define INT_EP_DP (16)
114#define INT_EP_MAC_ERR (15)
115#define INT_EP_TDFU (14)
116#define INT_EP_TDFO (13)
117#define INT_EP_UTX (12)
118#define INT_EP_GPIO_11 (11)
119#define INT_EP_GPIO_10 (10)
120#define INT_EP_GPIO_9 (9)
121#define INT_EP_GPIO_8 (8)
122#define INT_EP_GPIO_7 (7)
123#define INT_EP_GPIO_6 (6)
124#define INT_EP_GPIO_5 (5)
125#define INT_EP_GPIO_4 (4)
126#define INT_EP_GPIO_3 (3)
127#define INT_EP_GPIO_2 (2)
128#define INT_EP_GPIO_1 (1)
129#define INT_EP_GPIO_0 (0)
130
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +0000131static const char lan78xx_gstrings[][ETH_GSTRING_LEN] = {
132 "RX FCS Errors",
133 "RX Alignment Errors",
134 "Rx Fragment Errors",
135 "RX Jabber Errors",
136 "RX Undersize Frame Errors",
137 "RX Oversize Frame Errors",
138 "RX Dropped Frames",
139 "RX Unicast Byte Count",
140 "RX Broadcast Byte Count",
141 "RX Multicast Byte Count",
142 "RX Unicast Frames",
143 "RX Broadcast Frames",
144 "RX Multicast Frames",
145 "RX Pause Frames",
146 "RX 64 Byte Frames",
147 "RX 65 - 127 Byte Frames",
148 "RX 128 - 255 Byte Frames",
149 "RX 256 - 511 Bytes Frames",
150 "RX 512 - 1023 Byte Frames",
151 "RX 1024 - 1518 Byte Frames",
152 "RX Greater 1518 Byte Frames",
153 "EEE RX LPI Transitions",
154 "EEE RX LPI Time",
155 "TX FCS Errors",
156 "TX Excess Deferral Errors",
157 "TX Carrier Errors",
158 "TX Bad Byte Count",
159 "TX Single Collisions",
160 "TX Multiple Collisions",
161 "TX Excessive Collision",
162 "TX Late Collisions",
163 "TX Unicast Byte Count",
164 "TX Broadcast Byte Count",
165 "TX Multicast Byte Count",
166 "TX Unicast Frames",
167 "TX Broadcast Frames",
168 "TX Multicast Frames",
169 "TX Pause Frames",
170 "TX 64 Byte Frames",
171 "TX 65 - 127 Byte Frames",
172 "TX 128 - 255 Byte Frames",
173 "TX 256 - 511 Bytes Frames",
174 "TX 512 - 1023 Byte Frames",
175 "TX 1024 - 1518 Byte Frames",
176 "TX Greater 1518 Byte Frames",
177 "EEE TX LPI Transitions",
178 "EEE TX LPI Time",
179};
180
181struct lan78xx_statstage {
182 u32 rx_fcs_errors;
183 u32 rx_alignment_errors;
184 u32 rx_fragment_errors;
185 u32 rx_jabber_errors;
186 u32 rx_undersize_frame_errors;
187 u32 rx_oversize_frame_errors;
188 u32 rx_dropped_frames;
189 u32 rx_unicast_byte_count;
190 u32 rx_broadcast_byte_count;
191 u32 rx_multicast_byte_count;
192 u32 rx_unicast_frames;
193 u32 rx_broadcast_frames;
194 u32 rx_multicast_frames;
195 u32 rx_pause_frames;
196 u32 rx_64_byte_frames;
197 u32 rx_65_127_byte_frames;
198 u32 rx_128_255_byte_frames;
199 u32 rx_256_511_bytes_frames;
200 u32 rx_512_1023_byte_frames;
201 u32 rx_1024_1518_byte_frames;
202 u32 rx_greater_1518_byte_frames;
203 u32 eee_rx_lpi_transitions;
204 u32 eee_rx_lpi_time;
205 u32 tx_fcs_errors;
206 u32 tx_excess_deferral_errors;
207 u32 tx_carrier_errors;
208 u32 tx_bad_byte_count;
209 u32 tx_single_collisions;
210 u32 tx_multiple_collisions;
211 u32 tx_excessive_collision;
212 u32 tx_late_collisions;
213 u32 tx_unicast_byte_count;
214 u32 tx_broadcast_byte_count;
215 u32 tx_multicast_byte_count;
216 u32 tx_unicast_frames;
217 u32 tx_broadcast_frames;
218 u32 tx_multicast_frames;
219 u32 tx_pause_frames;
220 u32 tx_64_byte_frames;
221 u32 tx_65_127_byte_frames;
222 u32 tx_128_255_byte_frames;
223 u32 tx_256_511_bytes_frames;
224 u32 tx_512_1023_byte_frames;
225 u32 tx_1024_1518_byte_frames;
226 u32 tx_greater_1518_byte_frames;
227 u32 eee_tx_lpi_transitions;
228 u32 eee_tx_lpi_time;
229};
230
Woojung Huh20ff5562016-03-16 22:10:40 +0000231struct lan78xx_statstage64 {
232 u64 rx_fcs_errors;
233 u64 rx_alignment_errors;
234 u64 rx_fragment_errors;
235 u64 rx_jabber_errors;
236 u64 rx_undersize_frame_errors;
237 u64 rx_oversize_frame_errors;
238 u64 rx_dropped_frames;
239 u64 rx_unicast_byte_count;
240 u64 rx_broadcast_byte_count;
241 u64 rx_multicast_byte_count;
242 u64 rx_unicast_frames;
243 u64 rx_broadcast_frames;
244 u64 rx_multicast_frames;
245 u64 rx_pause_frames;
246 u64 rx_64_byte_frames;
247 u64 rx_65_127_byte_frames;
248 u64 rx_128_255_byte_frames;
249 u64 rx_256_511_bytes_frames;
250 u64 rx_512_1023_byte_frames;
251 u64 rx_1024_1518_byte_frames;
252 u64 rx_greater_1518_byte_frames;
253 u64 eee_rx_lpi_transitions;
254 u64 eee_rx_lpi_time;
255 u64 tx_fcs_errors;
256 u64 tx_excess_deferral_errors;
257 u64 tx_carrier_errors;
258 u64 tx_bad_byte_count;
259 u64 tx_single_collisions;
260 u64 tx_multiple_collisions;
261 u64 tx_excessive_collision;
262 u64 tx_late_collisions;
263 u64 tx_unicast_byte_count;
264 u64 tx_broadcast_byte_count;
265 u64 tx_multicast_byte_count;
266 u64 tx_unicast_frames;
267 u64 tx_broadcast_frames;
268 u64 tx_multicast_frames;
269 u64 tx_pause_frames;
270 u64 tx_64_byte_frames;
271 u64 tx_65_127_byte_frames;
272 u64 tx_128_255_byte_frames;
273 u64 tx_256_511_bytes_frames;
274 u64 tx_512_1023_byte_frames;
275 u64 tx_1024_1518_byte_frames;
276 u64 tx_greater_1518_byte_frames;
277 u64 eee_tx_lpi_transitions;
278 u64 eee_tx_lpi_time;
279};
280
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +0000281struct lan78xx_net;
282
283struct lan78xx_priv {
284 struct lan78xx_net *dev;
285 u32 rfe_ctl;
286 u32 mchash_table[DP_SEL_VHF_HASH_LEN]; /* multicat hash table */
287 u32 pfilter_table[NUM_OF_MAF][2]; /* perfect filter table */
288 u32 vlan_table[DP_SEL_VHF_VLAN_LEN];
289 struct mutex dataport_mutex; /* for dataport access */
290 spinlock_t rfe_ctl_lock; /* for rfe register access */
291 struct work_struct set_multicast;
292 struct work_struct set_vlan;
293 u32 wol;
294};
295
296enum skb_state {
297 illegal = 0,
298 tx_start,
299 tx_done,
300 rx_start,
301 rx_done,
302 rx_cleanup,
303 unlink_start
304};
305
306struct skb_data { /* skb->cb is one of these */
307 struct urb *urb;
308 struct lan78xx_net *dev;
309 enum skb_state state;
310 size_t length;
Woojung Huh74d79a22016-04-25 22:22:32 +0000311 int num_of_packet;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +0000312};
313
314struct usb_context {
315 struct usb_ctrlrequest req;
316 struct lan78xx_net *dev;
317};
318
319#define EVENT_TX_HALT 0
320#define EVENT_RX_HALT 1
321#define EVENT_RX_MEMORY 2
322#define EVENT_STS_SPLIT 3
323#define EVENT_LINK_RESET 4
324#define EVENT_RX_PAUSED 5
325#define EVENT_DEV_WAKING 6
326#define EVENT_DEV_ASLEEP 7
327#define EVENT_DEV_OPEN 8
Woojung Huh20ff5562016-03-16 22:10:40 +0000328#define EVENT_STAT_UPDATE 9
329
330struct statstage {
331 struct mutex access_lock; /* for stats access */
332 struct lan78xx_statstage saved;
333 struct lan78xx_statstage rollover_count;
334 struct lan78xx_statstage rollover_max;
335 struct lan78xx_statstage64 curr_stat;
336};
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +0000337
Woojung Huhcc89c322016-11-01 20:02:00 +0000338struct irq_domain_data {
339 struct irq_domain *irqdomain;
340 unsigned int phyirq;
341 struct irq_chip *irqchip;
342 irq_flow_handler_t irq_handler;
343 u32 irqenable;
344 struct mutex irq_lock; /* for irq bus access */
345};
346
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +0000347struct lan78xx_net {
348 struct net_device *net;
349 struct usb_device *udev;
350 struct usb_interface *intf;
351 void *driver_priv;
352
353 int rx_qlen;
354 int tx_qlen;
355 struct sk_buff_head rxq;
356 struct sk_buff_head txq;
357 struct sk_buff_head done;
358 struct sk_buff_head rxq_pause;
359 struct sk_buff_head txq_pend;
360
361 struct tasklet_struct bh;
362 struct delayed_work wq;
363
364 struct usb_host_endpoint *ep_blkin;
365 struct usb_host_endpoint *ep_blkout;
366 struct usb_host_endpoint *ep_intr;
367
368 int msg_enable;
369
370 struct urb *urb_intr;
371 struct usb_anchor deferred;
372
373 struct mutex phy_mutex; /* for phy access */
374 unsigned pipe_in, pipe_out, pipe_intr;
375
376 u32 hard_mtu; /* count any extra framing */
377 size_t rx_urb_size; /* size for rx urbs */
378
379 unsigned long flags;
380
381 wait_queue_head_t *wait;
382 unsigned char suspend_count;
383
384 unsigned maxpacket;
385 struct timer_list delay;
Woojung Huh20ff5562016-03-16 22:10:40 +0000386 struct timer_list stat_monitor;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +0000387
388 unsigned long data[5];
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +0000389
390 int link_on;
391 u8 mdix_ctrl;
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +0000392
Woojung.Huh@microchip.com87177ba2016-02-25 23:33:07 +0000393 u32 chipid;
394 u32 chiprev;
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +0000395 struct mii_bus *mdiobus;
Woojung Huh02dc1f32016-12-07 20:26:25 +0000396 phy_interface_t interface;
Woojung.Huh@microchip.com349e0c52016-02-25 23:33:14 +0000397
398 int fc_autoneg;
399 u8 fc_request_control;
Woojung Huh20ff5562016-03-16 22:10:40 +0000400
401 int delta;
402 struct statstage stats;
Woojung Huhcc89c322016-11-01 20:02:00 +0000403
404 struct irq_domain_data domain_data;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +0000405};
406
Woojung Huh02dc1f32016-12-07 20:26:25 +0000407/* define external phy id */
408#define PHY_LAN8835 (0x0007C130)
409#define PHY_KSZ9031RNX (0x00221620)
410
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +0000411/* use ethtool to change the level for any given device */
412static int msg_level = -1;
413module_param(msg_level, int, 0);
414MODULE_PARM_DESC(msg_level, "Override default message level");
415
416static int lan78xx_read_reg(struct lan78xx_net *dev, u32 index, u32 *data)
417{
418 u32 *buf = kmalloc(sizeof(u32), GFP_KERNEL);
419 int ret;
420
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +0000421 if (!buf)
422 return -ENOMEM;
423
424 ret = usb_control_msg(dev->udev, usb_rcvctrlpipe(dev->udev, 0),
425 USB_VENDOR_REQUEST_READ_REGISTER,
426 USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
427 0, index, buf, 4, USB_CTRL_GET_TIMEOUT);
428 if (likely(ret >= 0)) {
429 le32_to_cpus(buf);
430 *data = *buf;
431 } else {
432 netdev_warn(dev->net,
433 "Failed to read register index 0x%08x. ret = %d",
434 index, ret);
435 }
436
437 kfree(buf);
438
439 return ret;
440}
441
442static int lan78xx_write_reg(struct lan78xx_net *dev, u32 index, u32 data)
443{
444 u32 *buf = kmalloc(sizeof(u32), GFP_KERNEL);
445 int ret;
446
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +0000447 if (!buf)
448 return -ENOMEM;
449
450 *buf = data;
451 cpu_to_le32s(buf);
452
453 ret = usb_control_msg(dev->udev, usb_sndctrlpipe(dev->udev, 0),
454 USB_VENDOR_REQUEST_WRITE_REGISTER,
455 USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
456 0, index, buf, 4, USB_CTRL_SET_TIMEOUT);
457 if (unlikely(ret < 0)) {
458 netdev_warn(dev->net,
459 "Failed to write register index 0x%08x. ret = %d",
460 index, ret);
461 }
462
463 kfree(buf);
464
465 return ret;
466}
467
468static int lan78xx_read_stats(struct lan78xx_net *dev,
469 struct lan78xx_statstage *data)
470{
471 int ret = 0;
472 int i;
473 struct lan78xx_statstage *stats;
474 u32 *src;
475 u32 *dst;
476
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +0000477 stats = kmalloc(sizeof(*stats), GFP_KERNEL);
478 if (!stats)
479 return -ENOMEM;
480
481 ret = usb_control_msg(dev->udev,
482 usb_rcvctrlpipe(dev->udev, 0),
483 USB_VENDOR_REQUEST_GET_STATS,
484 USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
485 0,
486 0,
487 (void *)stats,
488 sizeof(*stats),
489 USB_CTRL_SET_TIMEOUT);
490 if (likely(ret >= 0)) {
491 src = (u32 *)stats;
492 dst = (u32 *)data;
493 for (i = 0; i < sizeof(*stats)/sizeof(u32); i++) {
494 le32_to_cpus(&src[i]);
495 dst[i] = src[i];
496 }
497 } else {
498 netdev_warn(dev->net,
499 "Failed to read stat ret = 0x%x", ret);
500 }
501
502 kfree(stats);
503
504 return ret;
505}
506
Woojung Huh20ff5562016-03-16 22:10:40 +0000507#define check_counter_rollover(struct1, dev_stats, member) { \
508 if (struct1->member < dev_stats.saved.member) \
509 dev_stats.rollover_count.member++; \
510 }
511
512static void lan78xx_check_stat_rollover(struct lan78xx_net *dev,
513 struct lan78xx_statstage *stats)
514{
515 check_counter_rollover(stats, dev->stats, rx_fcs_errors);
516 check_counter_rollover(stats, dev->stats, rx_alignment_errors);
517 check_counter_rollover(stats, dev->stats, rx_fragment_errors);
518 check_counter_rollover(stats, dev->stats, rx_jabber_errors);
519 check_counter_rollover(stats, dev->stats, rx_undersize_frame_errors);
520 check_counter_rollover(stats, dev->stats, rx_oversize_frame_errors);
521 check_counter_rollover(stats, dev->stats, rx_dropped_frames);
522 check_counter_rollover(stats, dev->stats, rx_unicast_byte_count);
523 check_counter_rollover(stats, dev->stats, rx_broadcast_byte_count);
524 check_counter_rollover(stats, dev->stats, rx_multicast_byte_count);
525 check_counter_rollover(stats, dev->stats, rx_unicast_frames);
526 check_counter_rollover(stats, dev->stats, rx_broadcast_frames);
527 check_counter_rollover(stats, dev->stats, rx_multicast_frames);
528 check_counter_rollover(stats, dev->stats, rx_pause_frames);
529 check_counter_rollover(stats, dev->stats, rx_64_byte_frames);
530 check_counter_rollover(stats, dev->stats, rx_65_127_byte_frames);
531 check_counter_rollover(stats, dev->stats, rx_128_255_byte_frames);
532 check_counter_rollover(stats, dev->stats, rx_256_511_bytes_frames);
533 check_counter_rollover(stats, dev->stats, rx_512_1023_byte_frames);
534 check_counter_rollover(stats, dev->stats, rx_1024_1518_byte_frames);
535 check_counter_rollover(stats, dev->stats, rx_greater_1518_byte_frames);
536 check_counter_rollover(stats, dev->stats, eee_rx_lpi_transitions);
537 check_counter_rollover(stats, dev->stats, eee_rx_lpi_time);
538 check_counter_rollover(stats, dev->stats, tx_fcs_errors);
539 check_counter_rollover(stats, dev->stats, tx_excess_deferral_errors);
540 check_counter_rollover(stats, dev->stats, tx_carrier_errors);
541 check_counter_rollover(stats, dev->stats, tx_bad_byte_count);
542 check_counter_rollover(stats, dev->stats, tx_single_collisions);
543 check_counter_rollover(stats, dev->stats, tx_multiple_collisions);
544 check_counter_rollover(stats, dev->stats, tx_excessive_collision);
545 check_counter_rollover(stats, dev->stats, tx_late_collisions);
546 check_counter_rollover(stats, dev->stats, tx_unicast_byte_count);
547 check_counter_rollover(stats, dev->stats, tx_broadcast_byte_count);
548 check_counter_rollover(stats, dev->stats, tx_multicast_byte_count);
549 check_counter_rollover(stats, dev->stats, tx_unicast_frames);
550 check_counter_rollover(stats, dev->stats, tx_broadcast_frames);
551 check_counter_rollover(stats, dev->stats, tx_multicast_frames);
552 check_counter_rollover(stats, dev->stats, tx_pause_frames);
553 check_counter_rollover(stats, dev->stats, tx_64_byte_frames);
554 check_counter_rollover(stats, dev->stats, tx_65_127_byte_frames);
555 check_counter_rollover(stats, dev->stats, tx_128_255_byte_frames);
556 check_counter_rollover(stats, dev->stats, tx_256_511_bytes_frames);
557 check_counter_rollover(stats, dev->stats, tx_512_1023_byte_frames);
558 check_counter_rollover(stats, dev->stats, tx_1024_1518_byte_frames);
559 check_counter_rollover(stats, dev->stats, tx_greater_1518_byte_frames);
560 check_counter_rollover(stats, dev->stats, eee_tx_lpi_transitions);
561 check_counter_rollover(stats, dev->stats, eee_tx_lpi_time);
562
563 memcpy(&dev->stats.saved, stats, sizeof(struct lan78xx_statstage));
564}
565
566static void lan78xx_update_stats(struct lan78xx_net *dev)
567{
568 u32 *p, *count, *max;
569 u64 *data;
570 int i;
571 struct lan78xx_statstage lan78xx_stats;
572
573 if (usb_autopm_get_interface(dev->intf) < 0)
574 return;
575
576 p = (u32 *)&lan78xx_stats;
577 count = (u32 *)&dev->stats.rollover_count;
578 max = (u32 *)&dev->stats.rollover_max;
579 data = (u64 *)&dev->stats.curr_stat;
580
581 mutex_lock(&dev->stats.access_lock);
582
583 if (lan78xx_read_stats(dev, &lan78xx_stats) > 0)
584 lan78xx_check_stat_rollover(dev, &lan78xx_stats);
585
586 for (i = 0; i < (sizeof(lan78xx_stats) / (sizeof(u32))); i++)
587 data[i] = (u64)p[i] + ((u64)count[i] * ((u64)max[i] + 1));
588
589 mutex_unlock(&dev->stats.access_lock);
590
591 usb_autopm_put_interface(dev->intf);
592}
593
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +0000594/* Loop until the read is completed with timeout called with phy_mutex held */
595static int lan78xx_phy_wait_not_busy(struct lan78xx_net *dev)
596{
597 unsigned long start_time = jiffies;
598 u32 val;
599 int ret;
600
601 do {
602 ret = lan78xx_read_reg(dev, MII_ACC, &val);
603 if (unlikely(ret < 0))
604 return -EIO;
605
606 if (!(val & MII_ACC_MII_BUSY_))
607 return 0;
608 } while (!time_after(jiffies, start_time + HZ));
609
610 return -EIO;
611}
612
613static inline u32 mii_access(int id, int index, int read)
614{
615 u32 ret;
616
617 ret = ((u32)id << MII_ACC_PHY_ADDR_SHIFT_) & MII_ACC_PHY_ADDR_MASK_;
618 ret |= ((u32)index << MII_ACC_MIIRINDA_SHIFT_) & MII_ACC_MIIRINDA_MASK_;
619 if (read)
620 ret |= MII_ACC_MII_READ_;
621 else
622 ret |= MII_ACC_MII_WRITE_;
623 ret |= MII_ACC_MII_BUSY_;
624
625 return ret;
626}
627
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +0000628static int lan78xx_wait_eeprom(struct lan78xx_net *dev)
629{
630 unsigned long start_time = jiffies;
631 u32 val;
632 int ret;
633
634 do {
635 ret = lan78xx_read_reg(dev, E2P_CMD, &val);
636 if (unlikely(ret < 0))
637 return -EIO;
638
639 if (!(val & E2P_CMD_EPC_BUSY_) ||
640 (val & E2P_CMD_EPC_TIMEOUT_))
641 break;
642 usleep_range(40, 100);
643 } while (!time_after(jiffies, start_time + HZ));
644
645 if (val & (E2P_CMD_EPC_TIMEOUT_ | E2P_CMD_EPC_BUSY_)) {
646 netdev_warn(dev->net, "EEPROM read operation timeout");
647 return -EIO;
648 }
649
650 return 0;
651}
652
653static int lan78xx_eeprom_confirm_not_busy(struct lan78xx_net *dev)
654{
655 unsigned long start_time = jiffies;
656 u32 val;
657 int ret;
658
659 do {
660 ret = lan78xx_read_reg(dev, E2P_CMD, &val);
661 if (unlikely(ret < 0))
662 return -EIO;
663
664 if (!(val & E2P_CMD_EPC_BUSY_))
665 return 0;
666
667 usleep_range(40, 100);
668 } while (!time_after(jiffies, start_time + HZ));
669
670 netdev_warn(dev->net, "EEPROM is busy");
671 return -EIO;
672}
673
674static int lan78xx_read_raw_eeprom(struct lan78xx_net *dev, u32 offset,
675 u32 length, u8 *data)
676{
677 u32 val;
Woojung.Huh@microchip.coma0db7d12016-01-27 22:57:53 +0000678 u32 saved;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +0000679 int i, ret;
Woojung.Huh@microchip.coma0db7d12016-01-27 22:57:53 +0000680 int retval;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +0000681
Woojung.Huh@microchip.coma0db7d12016-01-27 22:57:53 +0000682 /* depends on chip, some EEPROM pins are muxed with LED function.
683 * disable & restore LED function to access EEPROM.
684 */
685 ret = lan78xx_read_reg(dev, HW_CFG, &val);
686 saved = val;
Woojung.Huh@microchip.com87177ba2016-02-25 23:33:07 +0000687 if (dev->chipid == ID_REV_CHIP_ID_7800_) {
Woojung.Huh@microchip.coma0db7d12016-01-27 22:57:53 +0000688 val &= ~(HW_CFG_LED1_EN_ | HW_CFG_LED0_EN_);
689 ret = lan78xx_write_reg(dev, HW_CFG, val);
690 }
691
692 retval = lan78xx_eeprom_confirm_not_busy(dev);
693 if (retval)
694 return retval;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +0000695
696 for (i = 0; i < length; i++) {
697 val = E2P_CMD_EPC_BUSY_ | E2P_CMD_EPC_CMD_READ_;
698 val |= (offset & E2P_CMD_EPC_ADDR_MASK_);
699 ret = lan78xx_write_reg(dev, E2P_CMD, val);
Woojung.Huh@microchip.coma0db7d12016-01-27 22:57:53 +0000700 if (unlikely(ret < 0)) {
701 retval = -EIO;
702 goto exit;
703 }
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +0000704
Woojung.Huh@microchip.coma0db7d12016-01-27 22:57:53 +0000705 retval = lan78xx_wait_eeprom(dev);
706 if (retval < 0)
707 goto exit;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +0000708
709 ret = lan78xx_read_reg(dev, E2P_DATA, &val);
Woojung.Huh@microchip.coma0db7d12016-01-27 22:57:53 +0000710 if (unlikely(ret < 0)) {
711 retval = -EIO;
712 goto exit;
713 }
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +0000714
715 data[i] = val & 0xFF;
716 offset++;
717 }
718
Woojung.Huh@microchip.coma0db7d12016-01-27 22:57:53 +0000719 retval = 0;
720exit:
Woojung.Huh@microchip.com87177ba2016-02-25 23:33:07 +0000721 if (dev->chipid == ID_REV_CHIP_ID_7800_)
Woojung.Huh@microchip.coma0db7d12016-01-27 22:57:53 +0000722 ret = lan78xx_write_reg(dev, HW_CFG, saved);
723
724 return retval;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +0000725}
726
727static int lan78xx_read_eeprom(struct lan78xx_net *dev, u32 offset,
728 u32 length, u8 *data)
729{
730 u8 sig;
731 int ret;
732
733 ret = lan78xx_read_raw_eeprom(dev, 0, 1, &sig);
734 if ((ret == 0) && (sig == EEPROM_INDICATOR))
735 ret = lan78xx_read_raw_eeprom(dev, offset, length, data);
736 else
737 ret = -EINVAL;
738
739 return ret;
740}
741
742static int lan78xx_write_raw_eeprom(struct lan78xx_net *dev, u32 offset,
743 u32 length, u8 *data)
744{
745 u32 val;
Woojung.Huh@microchip.coma0db7d12016-01-27 22:57:53 +0000746 u32 saved;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +0000747 int i, ret;
Woojung.Huh@microchip.coma0db7d12016-01-27 22:57:53 +0000748 int retval;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +0000749
Woojung.Huh@microchip.coma0db7d12016-01-27 22:57:53 +0000750 /* depends on chip, some EEPROM pins are muxed with LED function.
751 * disable & restore LED function to access EEPROM.
752 */
753 ret = lan78xx_read_reg(dev, HW_CFG, &val);
754 saved = val;
Woojung.Huh@microchip.com87177ba2016-02-25 23:33:07 +0000755 if (dev->chipid == ID_REV_CHIP_ID_7800_) {
Woojung.Huh@microchip.coma0db7d12016-01-27 22:57:53 +0000756 val &= ~(HW_CFG_LED1_EN_ | HW_CFG_LED0_EN_);
757 ret = lan78xx_write_reg(dev, HW_CFG, val);
758 }
759
760 retval = lan78xx_eeprom_confirm_not_busy(dev);
761 if (retval)
762 goto exit;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +0000763
764 /* Issue write/erase enable command */
765 val = E2P_CMD_EPC_BUSY_ | E2P_CMD_EPC_CMD_EWEN_;
766 ret = lan78xx_write_reg(dev, E2P_CMD, val);
Woojung.Huh@microchip.coma0db7d12016-01-27 22:57:53 +0000767 if (unlikely(ret < 0)) {
768 retval = -EIO;
769 goto exit;
770 }
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +0000771
Woojung.Huh@microchip.coma0db7d12016-01-27 22:57:53 +0000772 retval = lan78xx_wait_eeprom(dev);
773 if (retval < 0)
774 goto exit;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +0000775
776 for (i = 0; i < length; i++) {
777 /* Fill data register */
778 val = data[i];
779 ret = lan78xx_write_reg(dev, E2P_DATA, val);
Woojung.Huh@microchip.coma0db7d12016-01-27 22:57:53 +0000780 if (ret < 0) {
781 retval = -EIO;
782 goto exit;
783 }
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +0000784
785 /* Send "write" command */
786 val = E2P_CMD_EPC_BUSY_ | E2P_CMD_EPC_CMD_WRITE_;
787 val |= (offset & E2P_CMD_EPC_ADDR_MASK_);
788 ret = lan78xx_write_reg(dev, E2P_CMD, val);
Woojung.Huh@microchip.coma0db7d12016-01-27 22:57:53 +0000789 if (ret < 0) {
790 retval = -EIO;
791 goto exit;
792 }
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +0000793
Woojung.Huh@microchip.coma0db7d12016-01-27 22:57:53 +0000794 retval = lan78xx_wait_eeprom(dev);
795 if (retval < 0)
796 goto exit;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +0000797
798 offset++;
799 }
800
Woojung.Huh@microchip.coma0db7d12016-01-27 22:57:53 +0000801 retval = 0;
802exit:
Woojung.Huh@microchip.com87177ba2016-02-25 23:33:07 +0000803 if (dev->chipid == ID_REV_CHIP_ID_7800_)
Woojung.Huh@microchip.coma0db7d12016-01-27 22:57:53 +0000804 ret = lan78xx_write_reg(dev, HW_CFG, saved);
805
806 return retval;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +0000807}
808
809static int lan78xx_read_raw_otp(struct lan78xx_net *dev, u32 offset,
810 u32 length, u8 *data)
811{
812 int i;
813 int ret;
814 u32 buf;
815 unsigned long timeout;
816
817 ret = lan78xx_read_reg(dev, OTP_PWR_DN, &buf);
818
819 if (buf & OTP_PWR_DN_PWRDN_N_) {
820 /* clear it and wait to be cleared */
821 ret = lan78xx_write_reg(dev, OTP_PWR_DN, 0);
822
823 timeout = jiffies + HZ;
824 do {
825 usleep_range(1, 10);
826 ret = lan78xx_read_reg(dev, OTP_PWR_DN, &buf);
827 if (time_after(jiffies, timeout)) {
828 netdev_warn(dev->net,
829 "timeout on OTP_PWR_DN");
830 return -EIO;
831 }
832 } while (buf & OTP_PWR_DN_PWRDN_N_);
833 }
834
835 for (i = 0; i < length; i++) {
836 ret = lan78xx_write_reg(dev, OTP_ADDR1,
837 ((offset + i) >> 8) & OTP_ADDR1_15_11);
838 ret = lan78xx_write_reg(dev, OTP_ADDR2,
839 ((offset + i) & OTP_ADDR2_10_3));
840
841 ret = lan78xx_write_reg(dev, OTP_FUNC_CMD, OTP_FUNC_CMD_READ_);
842 ret = lan78xx_write_reg(dev, OTP_CMD_GO, OTP_CMD_GO_GO_);
843
844 timeout = jiffies + HZ;
845 do {
846 udelay(1);
847 ret = lan78xx_read_reg(dev, OTP_STATUS, &buf);
848 if (time_after(jiffies, timeout)) {
849 netdev_warn(dev->net,
850 "timeout on OTP_STATUS");
851 return -EIO;
852 }
853 } while (buf & OTP_STATUS_BUSY_);
854
855 ret = lan78xx_read_reg(dev, OTP_RD_DATA, &buf);
856
857 data[i] = (u8)(buf & 0xFF);
858 }
859
860 return 0;
861}
862
Woojung.Huh@microchip.com9fb60662016-01-05 17:29:59 +0000863static int lan78xx_write_raw_otp(struct lan78xx_net *dev, u32 offset,
864 u32 length, u8 *data)
865{
866 int i;
867 int ret;
868 u32 buf;
869 unsigned long timeout;
870
871 ret = lan78xx_read_reg(dev, OTP_PWR_DN, &buf);
872
873 if (buf & OTP_PWR_DN_PWRDN_N_) {
874 /* clear it and wait to be cleared */
875 ret = lan78xx_write_reg(dev, OTP_PWR_DN, 0);
876
877 timeout = jiffies + HZ;
878 do {
879 udelay(1);
880 ret = lan78xx_read_reg(dev, OTP_PWR_DN, &buf);
881 if (time_after(jiffies, timeout)) {
882 netdev_warn(dev->net,
883 "timeout on OTP_PWR_DN completion");
884 return -EIO;
885 }
886 } while (buf & OTP_PWR_DN_PWRDN_N_);
887 }
888
889 /* set to BYTE program mode */
890 ret = lan78xx_write_reg(dev, OTP_PRGM_MODE, OTP_PRGM_MODE_BYTE_);
891
892 for (i = 0; i < length; i++) {
893 ret = lan78xx_write_reg(dev, OTP_ADDR1,
894 ((offset + i) >> 8) & OTP_ADDR1_15_11);
895 ret = lan78xx_write_reg(dev, OTP_ADDR2,
896 ((offset + i) & OTP_ADDR2_10_3));
897 ret = lan78xx_write_reg(dev, OTP_PRGM_DATA, data[i]);
898 ret = lan78xx_write_reg(dev, OTP_TST_CMD, OTP_TST_CMD_PRGVRFY_);
899 ret = lan78xx_write_reg(dev, OTP_CMD_GO, OTP_CMD_GO_GO_);
900
901 timeout = jiffies + HZ;
902 do {
903 udelay(1);
904 ret = lan78xx_read_reg(dev, OTP_STATUS, &buf);
905 if (time_after(jiffies, timeout)) {
906 netdev_warn(dev->net,
907 "Timeout on OTP_STATUS completion");
908 return -EIO;
909 }
910 } while (buf & OTP_STATUS_BUSY_);
911 }
912
913 return 0;
914}
915
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +0000916static int lan78xx_read_otp(struct lan78xx_net *dev, u32 offset,
917 u32 length, u8 *data)
918{
919 u8 sig;
920 int ret;
921
922 ret = lan78xx_read_raw_otp(dev, 0, 1, &sig);
923
924 if (ret == 0) {
925 if (sig == OTP_INDICATOR_1)
926 offset = offset;
927 else if (sig == OTP_INDICATOR_2)
928 offset += 0x100;
929 else
930 ret = -EINVAL;
Phil Elwell4bfc3382018-04-11 10:59:17 +0100931 if (!ret)
932 ret = lan78xx_read_raw_otp(dev, offset, length, data);
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +0000933 }
934
935 return ret;
936}
937
938static int lan78xx_dataport_wait_not_busy(struct lan78xx_net *dev)
939{
940 int i, ret;
941
942 for (i = 0; i < 100; i++) {
943 u32 dp_sel;
944
945 ret = lan78xx_read_reg(dev, DP_SEL, &dp_sel);
946 if (unlikely(ret < 0))
947 return -EIO;
948
949 if (dp_sel & DP_SEL_DPRDY_)
950 return 0;
951
952 usleep_range(40, 100);
953 }
954
955 netdev_warn(dev->net, "lan78xx_dataport_wait_not_busy timed out");
956
957 return -EIO;
958}
959
960static int lan78xx_dataport_write(struct lan78xx_net *dev, u32 ram_select,
961 u32 addr, u32 length, u32 *buf)
962{
963 struct lan78xx_priv *pdata = (struct lan78xx_priv *)(dev->data[0]);
964 u32 dp_sel;
965 int i, ret;
966
967 if (usb_autopm_get_interface(dev->intf) < 0)
968 return 0;
969
970 mutex_lock(&pdata->dataport_mutex);
971
972 ret = lan78xx_dataport_wait_not_busy(dev);
973 if (ret < 0)
974 goto done;
975
976 ret = lan78xx_read_reg(dev, DP_SEL, &dp_sel);
977
978 dp_sel &= ~DP_SEL_RSEL_MASK_;
979 dp_sel |= ram_select;
980 ret = lan78xx_write_reg(dev, DP_SEL, dp_sel);
981
982 for (i = 0; i < length; i++) {
983 ret = lan78xx_write_reg(dev, DP_ADDR, addr + i);
984
985 ret = lan78xx_write_reg(dev, DP_DATA, buf[i]);
986
987 ret = lan78xx_write_reg(dev, DP_CMD, DP_CMD_WRITE_);
988
989 ret = lan78xx_dataport_wait_not_busy(dev);
990 if (ret < 0)
991 goto done;
992 }
993
994done:
995 mutex_unlock(&pdata->dataport_mutex);
996 usb_autopm_put_interface(dev->intf);
997
998 return ret;
999}
1000
1001static void lan78xx_set_addr_filter(struct lan78xx_priv *pdata,
1002 int index, u8 addr[ETH_ALEN])
1003{
1004 u32 temp;
1005
1006 if ((pdata) && (index > 0) && (index < NUM_OF_MAF)) {
1007 temp = addr[3];
1008 temp = addr[2] | (temp << 8);
1009 temp = addr[1] | (temp << 8);
1010 temp = addr[0] | (temp << 8);
1011 pdata->pfilter_table[index][1] = temp;
1012 temp = addr[5];
1013 temp = addr[4] | (temp << 8);
1014 temp |= MAF_HI_VALID_ | MAF_HI_TYPE_DST_;
1015 pdata->pfilter_table[index][0] = temp;
1016 }
1017}
1018
1019/* returns hash bit number for given MAC address */
1020static inline u32 lan78xx_hash(char addr[ETH_ALEN])
1021{
1022 return (ether_crc(ETH_ALEN, addr) >> 23) & 0x1ff;
1023}
1024
1025static void lan78xx_deferred_multicast_write(struct work_struct *param)
1026{
1027 struct lan78xx_priv *pdata =
1028 container_of(param, struct lan78xx_priv, set_multicast);
1029 struct lan78xx_net *dev = pdata->dev;
1030 int i;
1031 int ret;
1032
1033 netif_dbg(dev, drv, dev->net, "deferred multicast write 0x%08x\n",
1034 pdata->rfe_ctl);
1035
1036 lan78xx_dataport_write(dev, DP_SEL_RSEL_VLAN_DA_, DP_SEL_VHF_VLAN_LEN,
1037 DP_SEL_VHF_HASH_LEN, pdata->mchash_table);
1038
1039 for (i = 1; i < NUM_OF_MAF; i++) {
1040 ret = lan78xx_write_reg(dev, MAF_HI(i), 0);
1041 ret = lan78xx_write_reg(dev, MAF_LO(i),
1042 pdata->pfilter_table[i][1]);
1043 ret = lan78xx_write_reg(dev, MAF_HI(i),
1044 pdata->pfilter_table[i][0]);
1045 }
1046
1047 ret = lan78xx_write_reg(dev, RFE_CTL, pdata->rfe_ctl);
1048}
1049
1050static void lan78xx_set_multicast(struct net_device *netdev)
1051{
1052 struct lan78xx_net *dev = netdev_priv(netdev);
1053 struct lan78xx_priv *pdata = (struct lan78xx_priv *)(dev->data[0]);
1054 unsigned long flags;
1055 int i;
1056
1057 spin_lock_irqsave(&pdata->rfe_ctl_lock, flags);
1058
1059 pdata->rfe_ctl &= ~(RFE_CTL_UCAST_EN_ | RFE_CTL_MCAST_EN_ |
1060 RFE_CTL_DA_PERFECT_ | RFE_CTL_MCAST_HASH_);
1061
1062 for (i = 0; i < DP_SEL_VHF_HASH_LEN; i++)
1063 pdata->mchash_table[i] = 0;
1064 /* pfilter_table[0] has own HW address */
1065 for (i = 1; i < NUM_OF_MAF; i++) {
1066 pdata->pfilter_table[i][0] =
1067 pdata->pfilter_table[i][1] = 0;
1068 }
1069
1070 pdata->rfe_ctl |= RFE_CTL_BCAST_EN_;
1071
1072 if (dev->net->flags & IFF_PROMISC) {
1073 netif_dbg(dev, drv, dev->net, "promiscuous mode enabled");
1074 pdata->rfe_ctl |= RFE_CTL_MCAST_EN_ | RFE_CTL_UCAST_EN_;
1075 } else {
1076 if (dev->net->flags & IFF_ALLMULTI) {
1077 netif_dbg(dev, drv, dev->net,
1078 "receive all multicast enabled");
1079 pdata->rfe_ctl |= RFE_CTL_MCAST_EN_;
1080 }
1081 }
1082
1083 if (netdev_mc_count(dev->net)) {
1084 struct netdev_hw_addr *ha;
1085 int i;
1086
1087 netif_dbg(dev, drv, dev->net, "receive multicast hash filter");
1088
1089 pdata->rfe_ctl |= RFE_CTL_DA_PERFECT_;
1090
1091 i = 1;
1092 netdev_for_each_mc_addr(ha, netdev) {
1093 /* set first 32 into Perfect Filter */
1094 if (i < 33) {
1095 lan78xx_set_addr_filter(pdata, i, ha->addr);
1096 } else {
1097 u32 bitnum = lan78xx_hash(ha->addr);
1098
1099 pdata->mchash_table[bitnum / 32] |=
1100 (1 << (bitnum % 32));
1101 pdata->rfe_ctl |= RFE_CTL_MCAST_HASH_;
1102 }
1103 i++;
1104 }
1105 }
1106
1107 spin_unlock_irqrestore(&pdata->rfe_ctl_lock, flags);
1108
1109 /* defer register writes to a sleepable context */
1110 schedule_work(&pdata->set_multicast);
1111}
1112
1113static int lan78xx_update_flowcontrol(struct lan78xx_net *dev, u8 duplex,
1114 u16 lcladv, u16 rmtadv)
1115{
1116 u32 flow = 0, fct_flow = 0;
1117 int ret;
Woojung.Huh@microchip.com349e0c52016-02-25 23:33:14 +00001118 u8 cap;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001119
Woojung.Huh@microchip.com349e0c52016-02-25 23:33:14 +00001120 if (dev->fc_autoneg)
1121 cap = mii_resolve_flowctrl_fdx(lcladv, rmtadv);
1122 else
1123 cap = dev->fc_request_control;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001124
1125 if (cap & FLOW_CTRL_TX)
Woojung.Huh@microchip.com349e0c52016-02-25 23:33:14 +00001126 flow |= (FLOW_CR_TX_FCEN_ | 0xFFFF);
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001127
1128 if (cap & FLOW_CTRL_RX)
1129 flow |= FLOW_CR_RX_FCEN_;
1130
1131 if (dev->udev->speed == USB_SPEED_SUPER)
1132 fct_flow = 0x817;
1133 else if (dev->udev->speed == USB_SPEED_HIGH)
1134 fct_flow = 0x211;
1135
1136 netif_dbg(dev, link, dev->net, "rx pause %s, tx pause %s",
1137 (cap & FLOW_CTRL_RX ? "enabled" : "disabled"),
1138 (cap & FLOW_CTRL_TX ? "enabled" : "disabled"));
1139
1140 ret = lan78xx_write_reg(dev, FCT_FLOW, fct_flow);
1141
1142 /* threshold value should be set before enabling flow */
1143 ret = lan78xx_write_reg(dev, FLOW, flow);
1144
1145 return 0;
1146}
1147
1148static int lan78xx_link_reset(struct lan78xx_net *dev)
1149{
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00001150 struct phy_device *phydev = dev->net->phydev;
Philippe Reynes6e765102016-10-09 12:07:04 +02001151 struct ethtool_link_ksettings ecmd;
Geert Uytterhoeven99c79ec2015-09-04 12:47:28 +02001152 int ladv, radv, ret;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001153 u32 buf;
1154
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001155 /* clear LAN78xx interrupt status */
1156 ret = lan78xx_write_reg(dev, INT_STS, INT_STS_PHY_INT_);
1157 if (unlikely(ret < 0))
1158 return -EIO;
1159
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00001160 phy_read_status(phydev);
1161
1162 if (!phydev->link && dev->link_on) {
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001163 dev->link_on = false;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001164
1165 /* reset MAC */
1166 ret = lan78xx_read_reg(dev, MAC_CR, &buf);
1167 if (unlikely(ret < 0))
1168 return -EIO;
1169 buf |= MAC_CR_RST_;
1170 ret = lan78xx_write_reg(dev, MAC_CR, buf);
1171 if (unlikely(ret < 0))
1172 return -EIO;
Woojung.Huh@microchip.come4953912016-01-27 22:57:52 +00001173
Woojung Huh20ff5562016-03-16 22:10:40 +00001174 del_timer(&dev->stat_monitor);
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00001175 } else if (phydev->link && !dev->link_on) {
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001176 dev->link_on = true;
1177
Philippe Reynes6e765102016-10-09 12:07:04 +02001178 phy_ethtool_ksettings_get(phydev, &ecmd);
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001179
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001180 if (dev->udev->speed == USB_SPEED_SUPER) {
Philippe Reynes6e765102016-10-09 12:07:04 +02001181 if (ecmd.base.speed == 1000) {
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001182 /* disable U2 */
1183 ret = lan78xx_read_reg(dev, USB_CFG1, &buf);
1184 buf &= ~USB_CFG1_DEV_U2_INIT_EN_;
1185 ret = lan78xx_write_reg(dev, USB_CFG1, buf);
1186 /* enable U1 */
1187 ret = lan78xx_read_reg(dev, USB_CFG1, &buf);
1188 buf |= USB_CFG1_DEV_U1_INIT_EN_;
1189 ret = lan78xx_write_reg(dev, USB_CFG1, buf);
1190 } else {
1191 /* enable U1 & U2 */
1192 ret = lan78xx_read_reg(dev, USB_CFG1, &buf);
1193 buf |= USB_CFG1_DEV_U2_INIT_EN_;
1194 buf |= USB_CFG1_DEV_U1_INIT_EN_;
1195 ret = lan78xx_write_reg(dev, USB_CFG1, buf);
1196 }
1197 }
1198
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00001199 ladv = phy_read(phydev, MII_ADVERTISE);
Geert Uytterhoeven99c79ec2015-09-04 12:47:28 +02001200 if (ladv < 0)
1201 return ladv;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001202
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00001203 radv = phy_read(phydev, MII_LPA);
Geert Uytterhoeven99c79ec2015-09-04 12:47:28 +02001204 if (radv < 0)
1205 return radv;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001206
1207 netif_dbg(dev, link, dev->net,
1208 "speed: %u duplex: %d anadv: 0x%04x anlpa: 0x%04x",
Philippe Reynes6e765102016-10-09 12:07:04 +02001209 ecmd.base.speed, ecmd.base.duplex, ladv, radv);
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001210
Philippe Reynes6e765102016-10-09 12:07:04 +02001211 ret = lan78xx_update_flowcontrol(dev, ecmd.base.duplex, ladv,
1212 radv);
Woojung Huh20ff5562016-03-16 22:10:40 +00001213
1214 if (!timer_pending(&dev->stat_monitor)) {
1215 dev->delta = 1;
1216 mod_timer(&dev->stat_monitor,
1217 jiffies + STAT_UPDATE_TIMER);
1218 }
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001219 }
1220
1221 return ret;
1222}
1223
1224/* some work can't be done in tasklets, so we use keventd
1225 *
1226 * NOTE: annoying asymmetry: if it's active, schedule_work() fails,
1227 * but tasklet_schedule() doesn't. hope the failure is rare.
1228 */
Baoyou Xiee0c79ff2016-09-06 16:19:02 +08001229static void lan78xx_defer_kevent(struct lan78xx_net *dev, int work)
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001230{
1231 set_bit(work, &dev->flags);
1232 if (!schedule_delayed_work(&dev->wq, 0))
1233 netdev_err(dev->net, "kevent %d may have been dropped\n", work);
1234}
1235
1236static void lan78xx_status(struct lan78xx_net *dev, struct urb *urb)
1237{
1238 u32 intdata;
1239
1240 if (urb->actual_length != 4) {
1241 netdev_warn(dev->net,
1242 "unexpected urb length %d", urb->actual_length);
1243 return;
1244 }
1245
1246 memcpy(&intdata, urb->transfer_buffer, 4);
1247 le32_to_cpus(&intdata);
1248
1249 if (intdata & INT_ENP_PHY_INT) {
1250 netif_dbg(dev, link, dev->net, "PHY INTR: 0x%08x\n", intdata);
Woojung Huhcc89c322016-11-01 20:02:00 +00001251 lan78xx_defer_kevent(dev, EVENT_LINK_RESET);
1252
1253 if (dev->domain_data.phyirq > 0)
1254 generic_handle_irq(dev->domain_data.phyirq);
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001255 } else
1256 netdev_warn(dev->net,
1257 "unexpected interrupt: 0x%08x\n", intdata);
1258}
1259
1260static int lan78xx_ethtool_get_eeprom_len(struct net_device *netdev)
1261{
1262 return MAX_EEPROM_SIZE;
1263}
1264
1265static int lan78xx_ethtool_get_eeprom(struct net_device *netdev,
1266 struct ethtool_eeprom *ee, u8 *data)
1267{
1268 struct lan78xx_net *dev = netdev_priv(netdev);
Nisar Sayed8a7ffeb2017-09-21 02:36:36 +05301269 int ret;
1270
1271 ret = usb_autopm_get_interface(dev->intf);
1272 if (ret)
1273 return ret;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001274
1275 ee->magic = LAN78XX_EEPROM_MAGIC;
1276
Nisar Sayed8a7ffeb2017-09-21 02:36:36 +05301277 ret = lan78xx_read_raw_eeprom(dev, ee->offset, ee->len, data);
1278
1279 usb_autopm_put_interface(dev->intf);
1280
1281 return ret;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001282}
1283
1284static int lan78xx_ethtool_set_eeprom(struct net_device *netdev,
1285 struct ethtool_eeprom *ee, u8 *data)
1286{
1287 struct lan78xx_net *dev = netdev_priv(netdev);
Nisar Sayed8a7ffeb2017-09-21 02:36:36 +05301288 int ret;
1289
1290 ret = usb_autopm_get_interface(dev->intf);
1291 if (ret)
1292 return ret;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001293
Nisar Sayedc0776822017-09-21 02:36:37 +05301294 /* Invalid EEPROM_INDICATOR at offset zero will result in a failure
1295 * to load data from EEPROM
1296 */
1297 if (ee->magic == LAN78XX_EEPROM_MAGIC)
Nisar Sayed8a7ffeb2017-09-21 02:36:36 +05301298 ret = lan78xx_write_raw_eeprom(dev, ee->offset, ee->len, data);
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001299 else if ((ee->magic == LAN78XX_OTP_MAGIC) &&
1300 (ee->offset == 0) &&
1301 (ee->len == 512) &&
1302 (data[0] == OTP_INDICATOR_1))
Nisar Sayed8a7ffeb2017-09-21 02:36:36 +05301303 ret = lan78xx_write_raw_otp(dev, ee->offset, ee->len, data);
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001304
Nisar Sayed8a7ffeb2017-09-21 02:36:36 +05301305 usb_autopm_put_interface(dev->intf);
1306
1307 return ret;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001308}
1309
1310static void lan78xx_get_strings(struct net_device *netdev, u32 stringset,
1311 u8 *data)
1312{
1313 if (stringset == ETH_SS_STATS)
1314 memcpy(data, lan78xx_gstrings, sizeof(lan78xx_gstrings));
1315}
1316
1317static int lan78xx_get_sset_count(struct net_device *netdev, int sset)
1318{
1319 if (sset == ETH_SS_STATS)
1320 return ARRAY_SIZE(lan78xx_gstrings);
1321 else
1322 return -EOPNOTSUPP;
1323}
1324
1325static void lan78xx_get_stats(struct net_device *netdev,
1326 struct ethtool_stats *stats, u64 *data)
1327{
1328 struct lan78xx_net *dev = netdev_priv(netdev);
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001329
Woojung Huh20ff5562016-03-16 22:10:40 +00001330 lan78xx_update_stats(dev);
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001331
Woojung Huh20ff5562016-03-16 22:10:40 +00001332 mutex_lock(&dev->stats.access_lock);
1333 memcpy(data, &dev->stats.curr_stat, sizeof(dev->stats.curr_stat));
1334 mutex_unlock(&dev->stats.access_lock);
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001335}
1336
1337static void lan78xx_get_wol(struct net_device *netdev,
1338 struct ethtool_wolinfo *wol)
1339{
1340 struct lan78xx_net *dev = netdev_priv(netdev);
1341 int ret;
1342 u32 buf;
1343 struct lan78xx_priv *pdata = (struct lan78xx_priv *)(dev->data[0]);
1344
1345 if (usb_autopm_get_interface(dev->intf) < 0)
1346 return;
1347
1348 ret = lan78xx_read_reg(dev, USB_CFG0, &buf);
1349 if (unlikely(ret < 0)) {
1350 wol->supported = 0;
1351 wol->wolopts = 0;
1352 } else {
1353 if (buf & USB_CFG_RMT_WKP_) {
1354 wol->supported = WAKE_ALL;
1355 wol->wolopts = pdata->wol;
1356 } else {
1357 wol->supported = 0;
1358 wol->wolopts = 0;
1359 }
1360 }
1361
1362 usb_autopm_put_interface(dev->intf);
1363}
1364
1365static int lan78xx_set_wol(struct net_device *netdev,
1366 struct ethtool_wolinfo *wol)
1367{
1368 struct lan78xx_net *dev = netdev_priv(netdev);
1369 struct lan78xx_priv *pdata = (struct lan78xx_priv *)(dev->data[0]);
1370 int ret;
1371
1372 ret = usb_autopm_get_interface(dev->intf);
1373 if (ret < 0)
1374 return ret;
1375
1376 pdata->wol = 0;
1377 if (wol->wolopts & WAKE_UCAST)
1378 pdata->wol |= WAKE_UCAST;
1379 if (wol->wolopts & WAKE_MCAST)
1380 pdata->wol |= WAKE_MCAST;
1381 if (wol->wolopts & WAKE_BCAST)
1382 pdata->wol |= WAKE_BCAST;
1383 if (wol->wolopts & WAKE_MAGIC)
1384 pdata->wol |= WAKE_MAGIC;
1385 if (wol->wolopts & WAKE_PHY)
1386 pdata->wol |= WAKE_PHY;
1387 if (wol->wolopts & WAKE_ARP)
1388 pdata->wol |= WAKE_ARP;
1389
1390 device_set_wakeup_enable(&dev->udev->dev, (bool)wol->wolopts);
1391
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00001392 phy_ethtool_set_wol(netdev->phydev, wol);
1393
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001394 usb_autopm_put_interface(dev->intf);
1395
1396 return ret;
1397}
1398
1399static int lan78xx_get_eee(struct net_device *net, struct ethtool_eee *edata)
1400{
1401 struct lan78xx_net *dev = netdev_priv(net);
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00001402 struct phy_device *phydev = net->phydev;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001403 int ret;
1404 u32 buf;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001405
1406 ret = usb_autopm_get_interface(dev->intf);
1407 if (ret < 0)
1408 return ret;
1409
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00001410 ret = phy_ethtool_get_eee(phydev, edata);
1411 if (ret < 0)
1412 goto exit;
1413
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001414 ret = lan78xx_read_reg(dev, MAC_CR, &buf);
1415 if (buf & MAC_CR_EEE_EN_) {
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001416 edata->eee_enabled = true;
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00001417 edata->eee_active = !!(edata->advertised &
1418 edata->lp_advertised);
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001419 edata->tx_lpi_enabled = true;
1420 /* EEE_TX_LPI_REQ_DLY & tx_lpi_timer are same uSec unit */
1421 ret = lan78xx_read_reg(dev, EEE_TX_LPI_REQ_DLY, &buf);
1422 edata->tx_lpi_timer = buf;
1423 } else {
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001424 edata->eee_enabled = false;
1425 edata->eee_active = false;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001426 edata->tx_lpi_enabled = false;
1427 edata->tx_lpi_timer = 0;
1428 }
1429
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00001430 ret = 0;
1431exit:
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001432 usb_autopm_put_interface(dev->intf);
1433
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00001434 return ret;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001435}
1436
1437static int lan78xx_set_eee(struct net_device *net, struct ethtool_eee *edata)
1438{
1439 struct lan78xx_net *dev = netdev_priv(net);
1440 int ret;
1441 u32 buf;
1442
1443 ret = usb_autopm_get_interface(dev->intf);
1444 if (ret < 0)
1445 return ret;
1446
1447 if (edata->eee_enabled) {
1448 ret = lan78xx_read_reg(dev, MAC_CR, &buf);
1449 buf |= MAC_CR_EEE_EN_;
1450 ret = lan78xx_write_reg(dev, MAC_CR, buf);
1451
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00001452 phy_ethtool_set_eee(net->phydev, edata);
1453
1454 buf = (u32)edata->tx_lpi_timer;
1455 ret = lan78xx_write_reg(dev, EEE_TX_LPI_REQ_DLY, buf);
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001456 } else {
1457 ret = lan78xx_read_reg(dev, MAC_CR, &buf);
1458 buf &= ~MAC_CR_EEE_EN_;
1459 ret = lan78xx_write_reg(dev, MAC_CR, buf);
1460 }
1461
1462 usb_autopm_put_interface(dev->intf);
1463
1464 return 0;
1465}
1466
1467static u32 lan78xx_get_link(struct net_device *net)
1468{
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00001469 phy_read_status(net->phydev);
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001470
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00001471 return net->phydev->link;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001472}
1473
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001474static void lan78xx_get_drvinfo(struct net_device *net,
1475 struct ethtool_drvinfo *info)
1476{
1477 struct lan78xx_net *dev = netdev_priv(net);
1478
1479 strncpy(info->driver, DRIVER_NAME, sizeof(info->driver));
1480 strncpy(info->version, DRIVER_VERSION, sizeof(info->version));
1481 usb_make_path(dev->udev, info->bus_info, sizeof(info->bus_info));
1482}
1483
1484static u32 lan78xx_get_msglevel(struct net_device *net)
1485{
1486 struct lan78xx_net *dev = netdev_priv(net);
1487
1488 return dev->msg_enable;
1489}
1490
1491static void lan78xx_set_msglevel(struct net_device *net, u32 level)
1492{
1493 struct lan78xx_net *dev = netdev_priv(net);
1494
1495 dev->msg_enable = level;
1496}
1497
Philippe Reynes6e765102016-10-09 12:07:04 +02001498static int lan78xx_get_link_ksettings(struct net_device *net,
1499 struct ethtool_link_ksettings *cmd)
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001500{
1501 struct lan78xx_net *dev = netdev_priv(net);
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00001502 struct phy_device *phydev = net->phydev;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001503 int ret;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001504
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001505 ret = usb_autopm_get_interface(dev->intf);
1506 if (ret < 0)
1507 return ret;
1508
yuval.shaia@oracle.com55141742017-06-13 10:09:46 +03001509 phy_ethtool_ksettings_get(phydev, cmd);
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001510
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001511 usb_autopm_put_interface(dev->intf);
1512
1513 return ret;
1514}
1515
Philippe Reynes6e765102016-10-09 12:07:04 +02001516static int lan78xx_set_link_ksettings(struct net_device *net,
1517 const struct ethtool_link_ksettings *cmd)
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001518{
1519 struct lan78xx_net *dev = netdev_priv(net);
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00001520 struct phy_device *phydev = net->phydev;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001521 int ret = 0;
1522 int temp;
1523
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001524 ret = usb_autopm_get_interface(dev->intf);
1525 if (ret < 0)
1526 return ret;
1527
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001528 /* change speed & duplex */
Philippe Reynes6e765102016-10-09 12:07:04 +02001529 ret = phy_ethtool_ksettings_set(phydev, cmd);
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001530
Philippe Reynes6e765102016-10-09 12:07:04 +02001531 if (!cmd->base.autoneg) {
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001532 /* force link down */
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00001533 temp = phy_read(phydev, MII_BMCR);
1534 phy_write(phydev, MII_BMCR, temp | BMCR_LOOPBACK);
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001535 mdelay(1);
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00001536 phy_write(phydev, MII_BMCR, temp);
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001537 }
1538
1539 usb_autopm_put_interface(dev->intf);
1540
1541 return ret;
1542}
1543
Woojung.Huh@microchip.com349e0c52016-02-25 23:33:14 +00001544static void lan78xx_get_pause(struct net_device *net,
1545 struct ethtool_pauseparam *pause)
1546{
1547 struct lan78xx_net *dev = netdev_priv(net);
1548 struct phy_device *phydev = net->phydev;
Philippe Reynes6e765102016-10-09 12:07:04 +02001549 struct ethtool_link_ksettings ecmd;
Woojung.Huh@microchip.com349e0c52016-02-25 23:33:14 +00001550
Philippe Reynes6e765102016-10-09 12:07:04 +02001551 phy_ethtool_ksettings_get(phydev, &ecmd);
Woojung.Huh@microchip.com349e0c52016-02-25 23:33:14 +00001552
1553 pause->autoneg = dev->fc_autoneg;
1554
1555 if (dev->fc_request_control & FLOW_CTRL_TX)
1556 pause->tx_pause = 1;
1557
1558 if (dev->fc_request_control & FLOW_CTRL_RX)
1559 pause->rx_pause = 1;
1560}
1561
1562static int lan78xx_set_pause(struct net_device *net,
1563 struct ethtool_pauseparam *pause)
1564{
1565 struct lan78xx_net *dev = netdev_priv(net);
1566 struct phy_device *phydev = net->phydev;
Philippe Reynes6e765102016-10-09 12:07:04 +02001567 struct ethtool_link_ksettings ecmd;
Woojung.Huh@microchip.com349e0c52016-02-25 23:33:14 +00001568 int ret;
1569
Philippe Reynes6e765102016-10-09 12:07:04 +02001570 phy_ethtool_ksettings_get(phydev, &ecmd);
Woojung.Huh@microchip.com349e0c52016-02-25 23:33:14 +00001571
Philippe Reynes6e765102016-10-09 12:07:04 +02001572 if (pause->autoneg && !ecmd.base.autoneg) {
Woojung.Huh@microchip.com349e0c52016-02-25 23:33:14 +00001573 ret = -EINVAL;
1574 goto exit;
1575 }
1576
1577 dev->fc_request_control = 0;
1578 if (pause->rx_pause)
1579 dev->fc_request_control |= FLOW_CTRL_RX;
1580
1581 if (pause->tx_pause)
1582 dev->fc_request_control |= FLOW_CTRL_TX;
1583
Philippe Reynes6e765102016-10-09 12:07:04 +02001584 if (ecmd.base.autoneg) {
Woojung.Huh@microchip.com349e0c52016-02-25 23:33:14 +00001585 u32 mii_adv;
Philippe Reynes6e765102016-10-09 12:07:04 +02001586 u32 advertising;
Woojung.Huh@microchip.com349e0c52016-02-25 23:33:14 +00001587
Philippe Reynes6e765102016-10-09 12:07:04 +02001588 ethtool_convert_link_mode_to_legacy_u32(
1589 &advertising, ecmd.link_modes.advertising);
1590
1591 advertising &= ~(ADVERTISED_Pause | ADVERTISED_Asym_Pause);
Woojung.Huh@microchip.com349e0c52016-02-25 23:33:14 +00001592 mii_adv = (u32)mii_advertise_flowctrl(dev->fc_request_control);
Philippe Reynes6e765102016-10-09 12:07:04 +02001593 advertising |= mii_adv_to_ethtool_adv_t(mii_adv);
1594
1595 ethtool_convert_legacy_u32_to_link_mode(
1596 ecmd.link_modes.advertising, advertising);
1597
1598 phy_ethtool_ksettings_set(phydev, &ecmd);
Woojung.Huh@microchip.com349e0c52016-02-25 23:33:14 +00001599 }
1600
1601 dev->fc_autoneg = pause->autoneg;
1602
1603 ret = 0;
1604exit:
1605 return ret;
1606}
1607
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001608static const struct ethtool_ops lan78xx_ethtool_ops = {
1609 .get_link = lan78xx_get_link,
Florian Fainelli860ce4b2016-11-15 10:06:44 -08001610 .nway_reset = phy_ethtool_nway_reset,
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001611 .get_drvinfo = lan78xx_get_drvinfo,
1612 .get_msglevel = lan78xx_get_msglevel,
1613 .set_msglevel = lan78xx_set_msglevel,
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001614 .get_eeprom_len = lan78xx_ethtool_get_eeprom_len,
1615 .get_eeprom = lan78xx_ethtool_get_eeprom,
1616 .set_eeprom = lan78xx_ethtool_set_eeprom,
1617 .get_ethtool_stats = lan78xx_get_stats,
1618 .get_sset_count = lan78xx_get_sset_count,
1619 .get_strings = lan78xx_get_strings,
1620 .get_wol = lan78xx_get_wol,
1621 .set_wol = lan78xx_set_wol,
1622 .get_eee = lan78xx_get_eee,
1623 .set_eee = lan78xx_set_eee,
Woojung.Huh@microchip.com349e0c52016-02-25 23:33:14 +00001624 .get_pauseparam = lan78xx_get_pause,
1625 .set_pauseparam = lan78xx_set_pause,
Philippe Reynes6e765102016-10-09 12:07:04 +02001626 .get_link_ksettings = lan78xx_get_link_ksettings,
1627 .set_link_ksettings = lan78xx_set_link_ksettings,
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001628};
1629
1630static int lan78xx_ioctl(struct net_device *netdev, struct ifreq *rq, int cmd)
1631{
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001632 if (!netif_running(netdev))
1633 return -EINVAL;
1634
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00001635 return phy_mii_ioctl(netdev->phydev, rq, cmd);
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001636}
1637
1638static void lan78xx_init_mac_address(struct lan78xx_net *dev)
1639{
1640 u32 addr_lo, addr_hi;
1641 int ret;
1642 u8 addr[6];
1643
1644 ret = lan78xx_read_reg(dev, RX_ADDRL, &addr_lo);
1645 ret = lan78xx_read_reg(dev, RX_ADDRH, &addr_hi);
1646
1647 addr[0] = addr_lo & 0xFF;
1648 addr[1] = (addr_lo >> 8) & 0xFF;
1649 addr[2] = (addr_lo >> 16) & 0xFF;
1650 addr[3] = (addr_lo >> 24) & 0xFF;
1651 addr[4] = addr_hi & 0xFF;
1652 addr[5] = (addr_hi >> 8) & 0xFF;
1653
1654 if (!is_valid_ether_addr(addr)) {
1655 /* reading mac address from EEPROM or OTP */
1656 if ((lan78xx_read_eeprom(dev, EEPROM_MAC_OFFSET, ETH_ALEN,
1657 addr) == 0) ||
1658 (lan78xx_read_otp(dev, EEPROM_MAC_OFFSET, ETH_ALEN,
1659 addr) == 0)) {
1660 if (is_valid_ether_addr(addr)) {
1661 /* eeprom values are valid so use them */
1662 netif_dbg(dev, ifup, dev->net,
1663 "MAC address read from EEPROM");
1664 } else {
1665 /* generate random MAC */
1666 random_ether_addr(addr);
1667 netif_dbg(dev, ifup, dev->net,
1668 "MAC address set to random addr");
1669 }
1670
1671 addr_lo = addr[0] | (addr[1] << 8) |
1672 (addr[2] << 16) | (addr[3] << 24);
1673 addr_hi = addr[4] | (addr[5] << 8);
1674
1675 ret = lan78xx_write_reg(dev, RX_ADDRL, addr_lo);
1676 ret = lan78xx_write_reg(dev, RX_ADDRH, addr_hi);
1677 } else {
1678 /* generate random MAC */
1679 random_ether_addr(addr);
1680 netif_dbg(dev, ifup, dev->net,
1681 "MAC address set to random addr");
1682 }
1683 }
1684
1685 ret = lan78xx_write_reg(dev, MAF_LO(0), addr_lo);
1686 ret = lan78xx_write_reg(dev, MAF_HI(0), addr_hi | MAF_HI_VALID_);
1687
1688 ether_addr_copy(dev->net->dev_addr, addr);
1689}
1690
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00001691/* MDIO read and write wrappers for phylib */
1692static int lan78xx_mdiobus_read(struct mii_bus *bus, int phy_id, int idx)
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001693{
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00001694 struct lan78xx_net *dev = bus->priv;
1695 u32 val, addr;
1696 int ret;
1697
1698 ret = usb_autopm_get_interface(dev->intf);
1699 if (ret < 0)
1700 return ret;
1701
1702 mutex_lock(&dev->phy_mutex);
1703
1704 /* confirm MII not busy */
1705 ret = lan78xx_phy_wait_not_busy(dev);
1706 if (ret < 0)
1707 goto done;
1708
1709 /* set the address, index & direction (read from PHY) */
1710 addr = mii_access(phy_id, idx, MII_READ);
1711 ret = lan78xx_write_reg(dev, MII_ACC, addr);
1712
1713 ret = lan78xx_phy_wait_not_busy(dev);
1714 if (ret < 0)
1715 goto done;
1716
1717 ret = lan78xx_read_reg(dev, MII_DATA, &val);
1718
1719 ret = (int)(val & 0xFFFF);
1720
1721done:
1722 mutex_unlock(&dev->phy_mutex);
1723 usb_autopm_put_interface(dev->intf);
Woojung Huh02dc1f32016-12-07 20:26:25 +00001724
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00001725 return ret;
1726}
1727
1728static int lan78xx_mdiobus_write(struct mii_bus *bus, int phy_id, int idx,
1729 u16 regval)
1730{
1731 struct lan78xx_net *dev = bus->priv;
1732 u32 val, addr;
1733 int ret;
1734
1735 ret = usb_autopm_get_interface(dev->intf);
1736 if (ret < 0)
1737 return ret;
1738
1739 mutex_lock(&dev->phy_mutex);
1740
1741 /* confirm MII not busy */
1742 ret = lan78xx_phy_wait_not_busy(dev);
1743 if (ret < 0)
1744 goto done;
1745
1746 val = (u32)regval;
1747 ret = lan78xx_write_reg(dev, MII_DATA, val);
1748
1749 /* set the address, index & direction (write to PHY) */
1750 addr = mii_access(phy_id, idx, MII_WRITE);
1751 ret = lan78xx_write_reg(dev, MII_ACC, addr);
1752
1753 ret = lan78xx_phy_wait_not_busy(dev);
1754 if (ret < 0)
1755 goto done;
1756
1757done:
1758 mutex_unlock(&dev->phy_mutex);
1759 usb_autopm_put_interface(dev->intf);
1760 return 0;
1761}
1762
1763static int lan78xx_mdio_init(struct lan78xx_net *dev)
1764{
1765 int ret;
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00001766
1767 dev->mdiobus = mdiobus_alloc();
1768 if (!dev->mdiobus) {
1769 netdev_err(dev->net, "can't allocate MDIO bus\n");
1770 return -ENOMEM;
1771 }
1772
1773 dev->mdiobus->priv = (void *)dev;
1774 dev->mdiobus->read = lan78xx_mdiobus_read;
1775 dev->mdiobus->write = lan78xx_mdiobus_write;
1776 dev->mdiobus->name = "lan78xx-mdiobus";
1777
1778 snprintf(dev->mdiobus->id, MII_BUS_ID_SIZE, "usb-%03d:%03d",
1779 dev->udev->bus->busnum, dev->udev->devnum);
1780
Woojung.Huh@microchip.com87177ba2016-02-25 23:33:07 +00001781 switch (dev->chipid) {
1782 case ID_REV_CHIP_ID_7800_:
1783 case ID_REV_CHIP_ID_7850_:
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00001784 /* set to internal PHY id */
1785 dev->mdiobus->phy_mask = ~(1 << 1);
1786 break;
Woojung Huh02dc1f32016-12-07 20:26:25 +00001787 case ID_REV_CHIP_ID_7801_:
1788 /* scan thru PHYAD[2..0] */
1789 dev->mdiobus->phy_mask = ~(0xFF);
1790 break;
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00001791 }
1792
1793 ret = mdiobus_register(dev->mdiobus);
1794 if (ret) {
1795 netdev_err(dev->net, "can't register MDIO bus\n");
Andrew Lunne7f4dc32016-01-06 20:11:15 +01001796 goto exit1;
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00001797 }
1798
1799 netdev_dbg(dev->net, "registered mdiobus bus %s\n", dev->mdiobus->id);
1800 return 0;
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00001801exit1:
1802 mdiobus_free(dev->mdiobus);
1803 return ret;
1804}
1805
1806static void lan78xx_remove_mdio(struct lan78xx_net *dev)
1807{
1808 mdiobus_unregister(dev->mdiobus);
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00001809 mdiobus_free(dev->mdiobus);
1810}
1811
1812static void lan78xx_link_status_change(struct net_device *net)
1813{
Woojung Huh14437e32016-04-25 22:22:36 +00001814 struct phy_device *phydev = net->phydev;
1815 int ret, temp;
1816
1817 /* At forced 100 F/H mode, chip may fail to set mode correctly
1818 * when cable is switched between long(~50+m) and short one.
1819 * As workaround, set to 10 before setting to 100
1820 * at forced 100 F/H mode.
1821 */
1822 if (!phydev->autoneg && (phydev->speed == 100)) {
1823 /* disable phy interrupt */
1824 temp = phy_read(phydev, LAN88XX_INT_MASK);
1825 temp &= ~LAN88XX_INT_MASK_MDINTPIN_EN_;
1826 ret = phy_write(phydev, LAN88XX_INT_MASK, temp);
1827
1828 temp = phy_read(phydev, MII_BMCR);
1829 temp &= ~(BMCR_SPEED100 | BMCR_SPEED1000);
1830 phy_write(phydev, MII_BMCR, temp); /* set to 10 first */
1831 temp |= BMCR_SPEED100;
1832 phy_write(phydev, MII_BMCR, temp); /* set to 100 later */
1833
1834 /* clear pending interrupt generated while workaround */
1835 temp = phy_read(phydev, LAN88XX_INT_STS);
1836
1837 /* enable phy interrupt back */
1838 temp = phy_read(phydev, LAN88XX_INT_MASK);
1839 temp |= LAN88XX_INT_MASK_MDINTPIN_EN_;
1840 ret = phy_write(phydev, LAN88XX_INT_MASK, temp);
1841 }
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001842}
1843
Woojung Huhcc89c322016-11-01 20:02:00 +00001844static int irq_map(struct irq_domain *d, unsigned int irq,
1845 irq_hw_number_t hwirq)
1846{
1847 struct irq_domain_data *data = d->host_data;
1848
1849 irq_set_chip_data(irq, data);
1850 irq_set_chip_and_handler(irq, data->irqchip, data->irq_handler);
1851 irq_set_noprobe(irq);
1852
1853 return 0;
1854}
1855
1856static void irq_unmap(struct irq_domain *d, unsigned int irq)
1857{
1858 irq_set_chip_and_handler(irq, NULL, NULL);
1859 irq_set_chip_data(irq, NULL);
1860}
1861
1862static const struct irq_domain_ops chip_domain_ops = {
1863 .map = irq_map,
1864 .unmap = irq_unmap,
1865};
1866
1867static void lan78xx_irq_mask(struct irq_data *irqd)
1868{
1869 struct irq_domain_data *data = irq_data_get_irq_chip_data(irqd);
1870
1871 data->irqenable &= ~BIT(irqd_to_hwirq(irqd));
1872}
1873
1874static void lan78xx_irq_unmask(struct irq_data *irqd)
1875{
1876 struct irq_domain_data *data = irq_data_get_irq_chip_data(irqd);
1877
1878 data->irqenable |= BIT(irqd_to_hwirq(irqd));
1879}
1880
1881static void lan78xx_irq_bus_lock(struct irq_data *irqd)
1882{
1883 struct irq_domain_data *data = irq_data_get_irq_chip_data(irqd);
1884
1885 mutex_lock(&data->irq_lock);
1886}
1887
1888static void lan78xx_irq_bus_sync_unlock(struct irq_data *irqd)
1889{
1890 struct irq_domain_data *data = irq_data_get_irq_chip_data(irqd);
1891 struct lan78xx_net *dev =
1892 container_of(data, struct lan78xx_net, domain_data);
1893 u32 buf;
1894 int ret;
1895
1896 /* call register access here because irq_bus_lock & irq_bus_sync_unlock
1897 * are only two callbacks executed in non-atomic contex.
1898 */
1899 ret = lan78xx_read_reg(dev, INT_EP_CTL, &buf);
1900 if (buf != data->irqenable)
1901 ret = lan78xx_write_reg(dev, INT_EP_CTL, data->irqenable);
1902
1903 mutex_unlock(&data->irq_lock);
1904}
1905
1906static struct irq_chip lan78xx_irqchip = {
1907 .name = "lan78xx-irqs",
1908 .irq_mask = lan78xx_irq_mask,
1909 .irq_unmask = lan78xx_irq_unmask,
1910 .irq_bus_lock = lan78xx_irq_bus_lock,
1911 .irq_bus_sync_unlock = lan78xx_irq_bus_sync_unlock,
1912};
1913
1914static int lan78xx_setup_irq_domain(struct lan78xx_net *dev)
1915{
1916 struct device_node *of_node;
1917 struct irq_domain *irqdomain;
1918 unsigned int irqmap = 0;
1919 u32 buf;
1920 int ret = 0;
1921
1922 of_node = dev->udev->dev.parent->of_node;
1923
1924 mutex_init(&dev->domain_data.irq_lock);
1925
1926 lan78xx_read_reg(dev, INT_EP_CTL, &buf);
1927 dev->domain_data.irqenable = buf;
1928
1929 dev->domain_data.irqchip = &lan78xx_irqchip;
1930 dev->domain_data.irq_handler = handle_simple_irq;
1931
1932 irqdomain = irq_domain_add_simple(of_node, MAX_INT_EP, 0,
1933 &chip_domain_ops, &dev->domain_data);
1934 if (irqdomain) {
1935 /* create mapping for PHY interrupt */
1936 irqmap = irq_create_mapping(irqdomain, INT_EP_PHY);
1937 if (!irqmap) {
1938 irq_domain_remove(irqdomain);
1939
1940 irqdomain = NULL;
1941 ret = -EINVAL;
1942 }
1943 } else {
1944 ret = -EINVAL;
1945 }
1946
1947 dev->domain_data.irqdomain = irqdomain;
1948 dev->domain_data.phyirq = irqmap;
1949
1950 return ret;
1951}
1952
1953static void lan78xx_remove_irq_domain(struct lan78xx_net *dev)
1954{
1955 if (dev->domain_data.phyirq > 0) {
1956 irq_dispose_mapping(dev->domain_data.phyirq);
1957
1958 if (dev->domain_data.irqdomain)
1959 irq_domain_remove(dev->domain_data.irqdomain);
1960 }
1961 dev->domain_data.phyirq = 0;
1962 dev->domain_data.irqdomain = NULL;
1963}
1964
Woojung Huh02dc1f32016-12-07 20:26:25 +00001965static int lan8835_fixup(struct phy_device *phydev)
1966{
1967 int buf;
1968 int ret;
1969 struct lan78xx_net *dev = netdev_priv(phydev->attached_dev);
1970
1971 /* LED2/PME_N/IRQ_N/RGMII_ID pin to IRQ_N mode */
Russell King5f613672017-03-21 16:36:48 +00001972 buf = phy_read_mmd(phydev, MDIO_MMD_PCS, 0x8010);
Woojung Huh02dc1f32016-12-07 20:26:25 +00001973 buf &= ~0x1800;
1974 buf |= 0x0800;
Russell King5f613672017-03-21 16:36:48 +00001975 phy_write_mmd(phydev, MDIO_MMD_PCS, 0x8010, buf);
Woojung Huh02dc1f32016-12-07 20:26:25 +00001976
1977 /* RGMII MAC TXC Delay Enable */
1978 ret = lan78xx_write_reg(dev, MAC_RGMII_ID,
1979 MAC_RGMII_ID_TXC_DELAY_EN_);
1980
1981 /* RGMII TX DLL Tune Adjust */
1982 ret = lan78xx_write_reg(dev, RGMII_TX_BYP_DLL, 0x3D00);
1983
1984 dev->interface = PHY_INTERFACE_MODE_RGMII_TXID;
1985
1986 return 1;
1987}
1988
1989static int ksz9031rnx_fixup(struct phy_device *phydev)
1990{
1991 struct lan78xx_net *dev = netdev_priv(phydev->attached_dev);
1992
1993 /* Micrel9301RNX PHY configuration */
1994 /* RGMII Control Signal Pad Skew */
Russell King5f613672017-03-21 16:36:48 +00001995 phy_write_mmd(phydev, MDIO_MMD_WIS, 4, 0x0077);
Woojung Huh02dc1f32016-12-07 20:26:25 +00001996 /* RGMII RX Data Pad Skew */
Russell King5f613672017-03-21 16:36:48 +00001997 phy_write_mmd(phydev, MDIO_MMD_WIS, 5, 0x7777);
Woojung Huh02dc1f32016-12-07 20:26:25 +00001998 /* RGMII RX Clock Pad Skew */
Russell King5f613672017-03-21 16:36:48 +00001999 phy_write_mmd(phydev, MDIO_MMD_WIS, 8, 0x1FF);
Woojung Huh02dc1f32016-12-07 20:26:25 +00002000
2001 dev->interface = PHY_INTERFACE_MODE_RGMII_RXID;
2002
2003 return 1;
2004}
2005
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00002006static int lan78xx_phy_init(struct lan78xx_net *dev)
2007{
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00002008 int ret;
Woojung.Huh@microchip.com349e0c52016-02-25 23:33:14 +00002009 u32 mii_adv;
Colin Ian King3b51cc72018-02-01 17:10:18 +00002010 struct phy_device *phydev;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00002011
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00002012 phydev = phy_find_first(dev->mdiobus);
2013 if (!phydev) {
2014 netdev_err(dev->net, "no PHY found\n");
2015 return -EIO;
2016 }
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00002017
Woojung Huh02dc1f32016-12-07 20:26:25 +00002018 if ((dev->chipid == ID_REV_CHIP_ID_7800_) ||
2019 (dev->chipid == ID_REV_CHIP_ID_7850_)) {
2020 phydev->is_internal = true;
2021 dev->interface = PHY_INTERFACE_MODE_GMII;
2022
2023 } else if (dev->chipid == ID_REV_CHIP_ID_7801_) {
2024 if (!phydev->drv) {
2025 netdev_err(dev->net, "no PHY driver found\n");
2026 return -EIO;
2027 }
2028
2029 dev->interface = PHY_INTERFACE_MODE_RGMII;
2030
2031 /* external PHY fixup for KSZ9031RNX */
2032 ret = phy_register_fixup_for_uid(PHY_KSZ9031RNX, 0xfffffff0,
2033 ksz9031rnx_fixup);
2034 if (ret < 0) {
2035 netdev_err(dev->net, "fail to register fixup\n");
2036 return ret;
2037 }
2038 /* external PHY fixup for LAN8835 */
2039 ret = phy_register_fixup_for_uid(PHY_LAN8835, 0xfffffff0,
2040 lan8835_fixup);
2041 if (ret < 0) {
2042 netdev_err(dev->net, "fail to register fixup\n");
2043 return ret;
2044 }
2045 /* add more external PHY fixup here if needed */
2046
2047 phydev->is_internal = false;
2048 } else {
2049 netdev_err(dev->net, "unknown ID found\n");
2050 ret = -EIO;
2051 goto error;
2052 }
2053
Woojung Huhcc89c322016-11-01 20:02:00 +00002054 /* if phyirq is not set, use polling mode in phylib */
2055 if (dev->domain_data.phyirq > 0)
2056 phydev->irq = dev->domain_data.phyirq;
2057 else
2058 phydev->irq = 0;
2059 netdev_dbg(dev->net, "phydev->irq = %d\n", phydev->irq);
Woojung.Huh@microchip.come4953912016-01-27 22:57:52 +00002060
Woojung Huhf6e3ef32016-11-17 22:10:02 +00002061 /* set to AUTOMDIX */
2062 phydev->mdix = ETH_TP_MDI_AUTO;
2063
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00002064 ret = phy_connect_direct(dev->net, phydev,
2065 lan78xx_link_status_change,
Woojung Huh02dc1f32016-12-07 20:26:25 +00002066 dev->interface);
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00002067 if (ret) {
2068 netdev_err(dev->net, "can't attach PHY to %s\n",
2069 dev->mdiobus->id);
2070 return -EIO;
2071 }
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00002072
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00002073 /* MAC doesn't support 1000T Half */
2074 phydev->supported &= ~SUPPORTED_1000baseT_Half;
Woojung.Huh@microchip.come270b2d2016-02-25 23:33:09 +00002075
Woojung.Huh@microchip.com349e0c52016-02-25 23:33:14 +00002076 /* support both flow controls */
2077 dev->fc_request_control = (FLOW_CTRL_RX | FLOW_CTRL_TX);
2078 phydev->advertising &= ~(ADVERTISED_Pause | ADVERTISED_Asym_Pause);
2079 mii_adv = (u32)mii_advertise_flowctrl(dev->fc_request_control);
2080 phydev->advertising |= mii_adv_to_ethtool_adv_t(mii_adv);
2081
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00002082 genphy_config_aneg(phydev);
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00002083
Woojung.Huh@microchip.com349e0c52016-02-25 23:33:14 +00002084 dev->fc_autoneg = phydev->autoneg;
2085
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00002086 return 0;
Woojung Huh02dc1f32016-12-07 20:26:25 +00002087
2088error:
2089 phy_unregister_fixup_for_uid(PHY_KSZ9031RNX, 0xfffffff0);
2090 phy_unregister_fixup_for_uid(PHY_LAN8835, 0xfffffff0);
2091
2092 return ret;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00002093}
2094
2095static int lan78xx_set_rx_max_frame_length(struct lan78xx_net *dev, int size)
2096{
2097 int ret = 0;
2098 u32 buf;
2099 bool rxenabled;
2100
2101 ret = lan78xx_read_reg(dev, MAC_RX, &buf);
2102
2103 rxenabled = ((buf & MAC_RX_RXEN_) != 0);
2104
2105 if (rxenabled) {
2106 buf &= ~MAC_RX_RXEN_;
2107 ret = lan78xx_write_reg(dev, MAC_RX, buf);
2108 }
2109
2110 /* add 4 to size for FCS */
2111 buf &= ~MAC_RX_MAX_SIZE_MASK_;
2112 buf |= (((size + 4) << MAC_RX_MAX_SIZE_SHIFT_) & MAC_RX_MAX_SIZE_MASK_);
2113
2114 ret = lan78xx_write_reg(dev, MAC_RX, buf);
2115
2116 if (rxenabled) {
2117 buf |= MAC_RX_RXEN_;
2118 ret = lan78xx_write_reg(dev, MAC_RX, buf);
2119 }
2120
2121 return 0;
2122}
2123
2124static int unlink_urbs(struct lan78xx_net *dev, struct sk_buff_head *q)
2125{
2126 struct sk_buff *skb;
2127 unsigned long flags;
2128 int count = 0;
2129
2130 spin_lock_irqsave(&q->lock, flags);
2131 while (!skb_queue_empty(q)) {
2132 struct skb_data *entry;
2133 struct urb *urb;
2134 int ret;
2135
2136 skb_queue_walk(q, skb) {
2137 entry = (struct skb_data *)skb->cb;
2138 if (entry->state != unlink_start)
2139 goto found;
2140 }
2141 break;
2142found:
2143 entry->state = unlink_start;
2144 urb = entry->urb;
2145
2146 /* Get reference count of the URB to avoid it to be
2147 * freed during usb_unlink_urb, which may trigger
2148 * use-after-free problem inside usb_unlink_urb since
2149 * usb_unlink_urb is always racing with .complete
2150 * handler(include defer_bh).
2151 */
2152 usb_get_urb(urb);
2153 spin_unlock_irqrestore(&q->lock, flags);
2154 /* during some PM-driven resume scenarios,
2155 * these (async) unlinks complete immediately
2156 */
2157 ret = usb_unlink_urb(urb);
2158 if (ret != -EINPROGRESS && ret != 0)
2159 netdev_dbg(dev->net, "unlink urb err, %d\n", ret);
2160 else
2161 count++;
2162 usb_put_urb(urb);
2163 spin_lock_irqsave(&q->lock, flags);
2164 }
2165 spin_unlock_irqrestore(&q->lock, flags);
2166 return count;
2167}
2168
2169static int lan78xx_change_mtu(struct net_device *netdev, int new_mtu)
2170{
2171 struct lan78xx_net *dev = netdev_priv(netdev);
2172 int ll_mtu = new_mtu + netdev->hard_header_len;
2173 int old_hard_mtu = dev->hard_mtu;
2174 int old_rx_urb_size = dev->rx_urb_size;
2175 int ret;
2176
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00002177 /* no second zero-length packet read wanted after mtu-sized packets */
2178 if ((ll_mtu % dev->maxpacket) == 0)
2179 return -EDOM;
2180
2181 ret = lan78xx_set_rx_max_frame_length(dev, new_mtu + ETH_HLEN);
2182
2183 netdev->mtu = new_mtu;
2184
2185 dev->hard_mtu = netdev->mtu + netdev->hard_header_len;
2186 if (dev->rx_urb_size == old_hard_mtu) {
2187 dev->rx_urb_size = dev->hard_mtu;
2188 if (dev->rx_urb_size > old_rx_urb_size) {
2189 if (netif_running(dev->net)) {
2190 unlink_urbs(dev, &dev->rxq);
2191 tasklet_schedule(&dev->bh);
2192 }
2193 }
2194 }
2195
2196 return 0;
2197}
2198
Baoyou Xiee0c79ff2016-09-06 16:19:02 +08002199static int lan78xx_set_mac_addr(struct net_device *netdev, void *p)
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00002200{
2201 struct lan78xx_net *dev = netdev_priv(netdev);
2202 struct sockaddr *addr = p;
2203 u32 addr_lo, addr_hi;
2204 int ret;
2205
2206 if (netif_running(netdev))
2207 return -EBUSY;
2208
2209 if (!is_valid_ether_addr(addr->sa_data))
2210 return -EADDRNOTAVAIL;
2211
2212 ether_addr_copy(netdev->dev_addr, addr->sa_data);
2213
2214 addr_lo = netdev->dev_addr[0] |
2215 netdev->dev_addr[1] << 8 |
2216 netdev->dev_addr[2] << 16 |
2217 netdev->dev_addr[3] << 24;
2218 addr_hi = netdev->dev_addr[4] |
2219 netdev->dev_addr[5] << 8;
2220
2221 ret = lan78xx_write_reg(dev, RX_ADDRL, addr_lo);
2222 ret = lan78xx_write_reg(dev, RX_ADDRH, addr_hi);
2223
2224 return 0;
2225}
2226
2227/* Enable or disable Rx checksum offload engine */
2228static int lan78xx_set_features(struct net_device *netdev,
2229 netdev_features_t features)
2230{
2231 struct lan78xx_net *dev = netdev_priv(netdev);
2232 struct lan78xx_priv *pdata = (struct lan78xx_priv *)(dev->data[0]);
2233 unsigned long flags;
2234 int ret;
2235
2236 spin_lock_irqsave(&pdata->rfe_ctl_lock, flags);
2237
2238 if (features & NETIF_F_RXCSUM) {
2239 pdata->rfe_ctl |= RFE_CTL_TCPUDP_COE_ | RFE_CTL_IP_COE_;
2240 pdata->rfe_ctl |= RFE_CTL_ICMP_COE_ | RFE_CTL_IGMP_COE_;
2241 } else {
2242 pdata->rfe_ctl &= ~(RFE_CTL_TCPUDP_COE_ | RFE_CTL_IP_COE_);
2243 pdata->rfe_ctl &= ~(RFE_CTL_ICMP_COE_ | RFE_CTL_IGMP_COE_);
2244 }
2245
2246 if (features & NETIF_F_HW_VLAN_CTAG_RX)
2247 pdata->rfe_ctl |= RFE_CTL_VLAN_FILTER_;
2248 else
2249 pdata->rfe_ctl &= ~RFE_CTL_VLAN_FILTER_;
2250
2251 spin_unlock_irqrestore(&pdata->rfe_ctl_lock, flags);
2252
2253 ret = lan78xx_write_reg(dev, RFE_CTL, pdata->rfe_ctl);
2254
2255 return 0;
2256}
2257
2258static void lan78xx_deferred_vlan_write(struct work_struct *param)
2259{
2260 struct lan78xx_priv *pdata =
2261 container_of(param, struct lan78xx_priv, set_vlan);
2262 struct lan78xx_net *dev = pdata->dev;
2263
2264 lan78xx_dataport_write(dev, DP_SEL_RSEL_VLAN_DA_, 0,
2265 DP_SEL_VHF_VLAN_LEN, pdata->vlan_table);
2266}
2267
2268static int lan78xx_vlan_rx_add_vid(struct net_device *netdev,
2269 __be16 proto, u16 vid)
2270{
2271 struct lan78xx_net *dev = netdev_priv(netdev);
2272 struct lan78xx_priv *pdata = (struct lan78xx_priv *)(dev->data[0]);
2273 u16 vid_bit_index;
2274 u16 vid_dword_index;
2275
2276 vid_dword_index = (vid >> 5) & 0x7F;
2277 vid_bit_index = vid & 0x1F;
2278
2279 pdata->vlan_table[vid_dword_index] |= (1 << vid_bit_index);
2280
2281 /* defer register writes to a sleepable context */
2282 schedule_work(&pdata->set_vlan);
2283
2284 return 0;
2285}
2286
2287static int lan78xx_vlan_rx_kill_vid(struct net_device *netdev,
2288 __be16 proto, u16 vid)
2289{
2290 struct lan78xx_net *dev = netdev_priv(netdev);
2291 struct lan78xx_priv *pdata = (struct lan78xx_priv *)(dev->data[0]);
2292 u16 vid_bit_index;
2293 u16 vid_dword_index;
2294
2295 vid_dword_index = (vid >> 5) & 0x7F;
2296 vid_bit_index = vid & 0x1F;
2297
2298 pdata->vlan_table[vid_dword_index] &= ~(1 << vid_bit_index);
2299
2300 /* defer register writes to a sleepable context */
2301 schedule_work(&pdata->set_vlan);
2302
2303 return 0;
2304}
2305
2306static void lan78xx_init_ltm(struct lan78xx_net *dev)
2307{
2308 int ret;
2309 u32 buf;
2310 u32 regs[6] = { 0 };
2311
2312 ret = lan78xx_read_reg(dev, USB_CFG1, &buf);
2313 if (buf & USB_CFG1_LTM_ENABLE_) {
2314 u8 temp[2];
2315 /* Get values from EEPROM first */
2316 if (lan78xx_read_eeprom(dev, 0x3F, 2, temp) == 0) {
2317 if (temp[0] == 24) {
2318 ret = lan78xx_read_raw_eeprom(dev,
2319 temp[1] * 2,
2320 24,
2321 (u8 *)regs);
2322 if (ret < 0)
2323 return;
2324 }
2325 } else if (lan78xx_read_otp(dev, 0x3F, 2, temp) == 0) {
2326 if (temp[0] == 24) {
2327 ret = lan78xx_read_raw_otp(dev,
2328 temp[1] * 2,
2329 24,
2330 (u8 *)regs);
2331 if (ret < 0)
2332 return;
2333 }
2334 }
2335 }
2336
2337 lan78xx_write_reg(dev, LTM_BELT_IDLE0, regs[0]);
2338 lan78xx_write_reg(dev, LTM_BELT_IDLE1, regs[1]);
2339 lan78xx_write_reg(dev, LTM_BELT_ACT0, regs[2]);
2340 lan78xx_write_reg(dev, LTM_BELT_ACT1, regs[3]);
2341 lan78xx_write_reg(dev, LTM_INACTIVE0, regs[4]);
2342 lan78xx_write_reg(dev, LTM_INACTIVE1, regs[5]);
2343}
2344
2345static int lan78xx_reset(struct lan78xx_net *dev)
2346{
2347 struct lan78xx_priv *pdata = (struct lan78xx_priv *)(dev->data[0]);
2348 u32 buf;
2349 int ret = 0;
2350 unsigned long timeout;
Raghuram Chary Je69647a2018-03-23 15:48:08 +05302351 u8 sig;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00002352
2353 ret = lan78xx_read_reg(dev, HW_CFG, &buf);
2354 buf |= HW_CFG_LRST_;
2355 ret = lan78xx_write_reg(dev, HW_CFG, buf);
2356
2357 timeout = jiffies + HZ;
2358 do {
2359 mdelay(1);
2360 ret = lan78xx_read_reg(dev, HW_CFG, &buf);
2361 if (time_after(jiffies, timeout)) {
2362 netdev_warn(dev->net,
2363 "timeout on completion of LiteReset");
2364 return -EIO;
2365 }
2366 } while (buf & HW_CFG_LRST_);
2367
2368 lan78xx_init_mac_address(dev);
2369
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00002370 /* save DEVID for later usage */
2371 ret = lan78xx_read_reg(dev, ID_REV, &buf);
Woojung.Huh@microchip.com87177ba2016-02-25 23:33:07 +00002372 dev->chipid = (buf & ID_REV_CHIP_ID_MASK_) >> 16;
2373 dev->chiprev = buf & ID_REV_CHIP_REV_MASK_;
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00002374
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00002375 /* Respond to the IN token with a NAK */
2376 ret = lan78xx_read_reg(dev, USB_CFG0, &buf);
2377 buf |= USB_CFG_BIR_;
2378 ret = lan78xx_write_reg(dev, USB_CFG0, buf);
2379
2380 /* Init LTM */
2381 lan78xx_init_ltm(dev);
2382
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00002383 if (dev->udev->speed == USB_SPEED_SUPER) {
2384 buf = DEFAULT_BURST_CAP_SIZE / SS_USB_PKT_SIZE;
2385 dev->rx_urb_size = DEFAULT_BURST_CAP_SIZE;
2386 dev->rx_qlen = 4;
2387 dev->tx_qlen = 4;
2388 } else if (dev->udev->speed == USB_SPEED_HIGH) {
2389 buf = DEFAULT_BURST_CAP_SIZE / HS_USB_PKT_SIZE;
2390 dev->rx_urb_size = DEFAULT_BURST_CAP_SIZE;
2391 dev->rx_qlen = RX_MAX_QUEUE_MEMORY / dev->rx_urb_size;
2392 dev->tx_qlen = RX_MAX_QUEUE_MEMORY / dev->hard_mtu;
2393 } else {
2394 buf = DEFAULT_BURST_CAP_SIZE / FS_USB_PKT_SIZE;
2395 dev->rx_urb_size = DEFAULT_BURST_CAP_SIZE;
2396 dev->rx_qlen = 4;
Yuiko Oshinoa5b13792018-01-15 13:24:28 -05002397 dev->tx_qlen = 4;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00002398 }
2399
2400 ret = lan78xx_write_reg(dev, BURST_CAP, buf);
2401 ret = lan78xx_write_reg(dev, BULK_IN_DLY, DEFAULT_BULK_IN_DELAY);
2402
2403 ret = lan78xx_read_reg(dev, HW_CFG, &buf);
2404 buf |= HW_CFG_MEF_;
2405 ret = lan78xx_write_reg(dev, HW_CFG, buf);
2406
2407 ret = lan78xx_read_reg(dev, USB_CFG0, &buf);
2408 buf |= USB_CFG_BCE_;
2409 ret = lan78xx_write_reg(dev, USB_CFG0, buf);
2410
2411 /* set FIFO sizes */
2412 buf = (MAX_RX_FIFO_SIZE - 512) / 512;
2413 ret = lan78xx_write_reg(dev, FCT_RX_FIFO_END, buf);
2414
2415 buf = (MAX_TX_FIFO_SIZE - 512) / 512;
2416 ret = lan78xx_write_reg(dev, FCT_TX_FIFO_END, buf);
2417
2418 ret = lan78xx_write_reg(dev, INT_STS, INT_STS_CLEAR_ALL_);
2419 ret = lan78xx_write_reg(dev, FLOW, 0);
2420 ret = lan78xx_write_reg(dev, FCT_FLOW, 0);
2421
2422 /* Don't need rfe_ctl_lock during initialisation */
2423 ret = lan78xx_read_reg(dev, RFE_CTL, &pdata->rfe_ctl);
2424 pdata->rfe_ctl |= RFE_CTL_BCAST_EN_ | RFE_CTL_DA_PERFECT_;
2425 ret = lan78xx_write_reg(dev, RFE_CTL, pdata->rfe_ctl);
2426
2427 /* Enable or disable checksum offload engines */
2428 lan78xx_set_features(dev->net, dev->net->features);
2429
2430 lan78xx_set_multicast(dev->net);
2431
2432 /* reset PHY */
2433 ret = lan78xx_read_reg(dev, PMT_CTL, &buf);
2434 buf |= PMT_CTL_PHY_RST_;
2435 ret = lan78xx_write_reg(dev, PMT_CTL, buf);
2436
2437 timeout = jiffies + HZ;
2438 do {
2439 mdelay(1);
2440 ret = lan78xx_read_reg(dev, PMT_CTL, &buf);
2441 if (time_after(jiffies, timeout)) {
2442 netdev_warn(dev->net, "timeout waiting for PHY Reset");
2443 return -EIO;
2444 }
Woojung.Huh@microchip.com6c595b02015-09-16 23:40:39 +00002445 } while ((buf & PMT_CTL_PHY_RST_) || !(buf & PMT_CTL_READY_));
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00002446
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00002447 ret = lan78xx_read_reg(dev, MAC_CR, &buf);
Woojung Huh02dc1f32016-12-07 20:26:25 +00002448 /* LAN7801 only has RGMII mode */
2449 if (dev->chipid == ID_REV_CHIP_ID_7801_)
2450 buf &= ~MAC_CR_GMII_EN_;
Raghuram Chary Je69647a2018-03-23 15:48:08 +05302451
2452 if (dev->chipid == ID_REV_CHIP_ID_7800_) {
2453 ret = lan78xx_read_raw_eeprom(dev, 0, 1, &sig);
2454 if (!ret && sig != EEPROM_INDICATOR) {
2455 /* Implies there is no external eeprom. Set mac speed */
2456 netdev_info(dev->net, "No External EEPROM. Setting MAC Speed\n");
2457 buf |= MAC_CR_AUTO_DUPLEX_ | MAC_CR_AUTO_SPEED_;
2458 }
2459 }
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00002460 ret = lan78xx_write_reg(dev, MAC_CR, buf);
2461
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00002462 ret = lan78xx_read_reg(dev, MAC_TX, &buf);
2463 buf |= MAC_TX_TXEN_;
2464 ret = lan78xx_write_reg(dev, MAC_TX, buf);
2465
2466 ret = lan78xx_read_reg(dev, FCT_TX_CTL, &buf);
2467 buf |= FCT_TX_CTL_EN_;
2468 ret = lan78xx_write_reg(dev, FCT_TX_CTL, buf);
2469
2470 ret = lan78xx_set_rx_max_frame_length(dev, dev->net->mtu + ETH_HLEN);
2471
2472 ret = lan78xx_read_reg(dev, MAC_RX, &buf);
2473 buf |= MAC_RX_RXEN_;
2474 ret = lan78xx_write_reg(dev, MAC_RX, buf);
2475
2476 ret = lan78xx_read_reg(dev, FCT_RX_CTL, &buf);
2477 buf |= FCT_RX_CTL_EN_;
2478 ret = lan78xx_write_reg(dev, FCT_RX_CTL, buf);
2479
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00002480 return 0;
2481}
2482
Woojung Huh20ff5562016-03-16 22:10:40 +00002483static void lan78xx_init_stats(struct lan78xx_net *dev)
2484{
2485 u32 *p;
2486 int i;
2487
2488 /* initialize for stats update
2489 * some counters are 20bits and some are 32bits
2490 */
2491 p = (u32 *)&dev->stats.rollover_max;
2492 for (i = 0; i < (sizeof(dev->stats.rollover_max) / (sizeof(u32))); i++)
2493 p[i] = 0xFFFFF;
2494
2495 dev->stats.rollover_max.rx_unicast_byte_count = 0xFFFFFFFF;
2496 dev->stats.rollover_max.rx_broadcast_byte_count = 0xFFFFFFFF;
2497 dev->stats.rollover_max.rx_multicast_byte_count = 0xFFFFFFFF;
2498 dev->stats.rollover_max.eee_rx_lpi_transitions = 0xFFFFFFFF;
2499 dev->stats.rollover_max.eee_rx_lpi_time = 0xFFFFFFFF;
2500 dev->stats.rollover_max.tx_unicast_byte_count = 0xFFFFFFFF;
2501 dev->stats.rollover_max.tx_broadcast_byte_count = 0xFFFFFFFF;
2502 dev->stats.rollover_max.tx_multicast_byte_count = 0xFFFFFFFF;
2503 dev->stats.rollover_max.eee_tx_lpi_transitions = 0xFFFFFFFF;
2504 dev->stats.rollover_max.eee_tx_lpi_time = 0xFFFFFFFF;
2505
Phil Elwellfed56072018-04-11 12:02:47 +01002506 set_bit(EVENT_STAT_UPDATE, &dev->flags);
Woojung Huh20ff5562016-03-16 22:10:40 +00002507}
2508
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00002509static int lan78xx_open(struct net_device *net)
2510{
2511 struct lan78xx_net *dev = netdev_priv(net);
2512 int ret;
2513
2514 ret = usb_autopm_get_interface(dev->intf);
2515 if (ret < 0)
2516 goto out;
2517
2518 ret = lan78xx_reset(dev);
2519 if (ret < 0)
2520 goto done;
2521
Alexander Graf92571a12018-04-04 00:19:35 +02002522 phy_start(net->phydev);
2523
2524 netif_dbg(dev, ifup, dev->net, "phy initialised successfully");
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00002525
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00002526 /* for Link Check */
2527 if (dev->urb_intr) {
2528 ret = usb_submit_urb(dev->urb_intr, GFP_KERNEL);
2529 if (ret < 0) {
2530 netif_err(dev, ifup, dev->net,
2531 "intr submit %d\n", ret);
2532 goto done;
2533 }
2534 }
2535
Woojung Huh20ff5562016-03-16 22:10:40 +00002536 lan78xx_init_stats(dev);
2537
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00002538 set_bit(EVENT_DEV_OPEN, &dev->flags);
2539
2540 netif_start_queue(net);
2541
2542 dev->link_on = false;
2543
2544 lan78xx_defer_kevent(dev, EVENT_LINK_RESET);
2545done:
2546 usb_autopm_put_interface(dev->intf);
2547
2548out:
2549 return ret;
2550}
2551
2552static void lan78xx_terminate_urbs(struct lan78xx_net *dev)
2553{
2554 DECLARE_WAIT_QUEUE_HEAD_ONSTACK(unlink_wakeup);
2555 DECLARE_WAITQUEUE(wait, current);
2556 int temp;
2557
2558 /* ensure there are no more active urbs */
2559 add_wait_queue(&unlink_wakeup, &wait);
2560 set_current_state(TASK_UNINTERRUPTIBLE);
2561 dev->wait = &unlink_wakeup;
2562 temp = unlink_urbs(dev, &dev->txq) + unlink_urbs(dev, &dev->rxq);
2563
2564 /* maybe wait for deletions to finish. */
2565 while (!skb_queue_empty(&dev->rxq) &&
2566 !skb_queue_empty(&dev->txq) &&
2567 !skb_queue_empty(&dev->done)) {
2568 schedule_timeout(msecs_to_jiffies(UNLINK_TIMEOUT_MS));
2569 set_current_state(TASK_UNINTERRUPTIBLE);
2570 netif_dbg(dev, ifdown, dev->net,
2571 "waited for %d urb completions\n", temp);
2572 }
2573 set_current_state(TASK_RUNNING);
2574 dev->wait = NULL;
2575 remove_wait_queue(&unlink_wakeup, &wait);
2576}
2577
Baoyou Xiee0c79ff2016-09-06 16:19:02 +08002578static int lan78xx_stop(struct net_device *net)
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00002579{
2580 struct lan78xx_net *dev = netdev_priv(net);
2581
Woojung Huh20ff5562016-03-16 22:10:40 +00002582 if (timer_pending(&dev->stat_monitor))
2583 del_timer_sync(&dev->stat_monitor);
2584
Alexander Graf92571a12018-04-04 00:19:35 +02002585 if (net->phydev)
2586 phy_stop(net->phydev);
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00002587
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00002588 clear_bit(EVENT_DEV_OPEN, &dev->flags);
2589 netif_stop_queue(net);
2590
2591 netif_info(dev, ifdown, dev->net,
2592 "stop stats: rx/tx %lu/%lu, errs %lu/%lu\n",
2593 net->stats.rx_packets, net->stats.tx_packets,
2594 net->stats.rx_errors, net->stats.tx_errors);
2595
2596 lan78xx_terminate_urbs(dev);
2597
2598 usb_kill_urb(dev->urb_intr);
2599
2600 skb_queue_purge(&dev->rxq_pause);
2601
2602 /* deferred work (task, timer, softirq) must also stop.
2603 * can't flush_scheduled_work() until we drop rtnl (later),
2604 * else workers could deadlock; so make workers a NOP.
2605 */
2606 dev->flags = 0;
2607 cancel_delayed_work_sync(&dev->wq);
2608 tasklet_kill(&dev->bh);
2609
2610 usb_autopm_put_interface(dev->intf);
2611
2612 return 0;
2613}
2614
2615static int lan78xx_linearize(struct sk_buff *skb)
2616{
2617 return skb_linearize(skb);
2618}
2619
2620static struct sk_buff *lan78xx_tx_prep(struct lan78xx_net *dev,
2621 struct sk_buff *skb, gfp_t flags)
2622{
2623 u32 tx_cmd_a, tx_cmd_b;
2624
Eric Dumazetd4ca7352017-04-19 09:59:24 -07002625 if (skb_cow_head(skb, TX_OVERHEAD)) {
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00002626 dev_kfree_skb_any(skb);
Eric Dumazetd4ca7352017-04-19 09:59:24 -07002627 return NULL;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00002628 }
2629
2630 if (lan78xx_linearize(skb) < 0)
2631 return NULL;
2632
2633 tx_cmd_a = (u32)(skb->len & TX_CMD_A_LEN_MASK_) | TX_CMD_A_FCS_;
2634
2635 if (skb->ip_summed == CHECKSUM_PARTIAL)
2636 tx_cmd_a |= TX_CMD_A_IPE_ | TX_CMD_A_TPE_;
2637
2638 tx_cmd_b = 0;
2639 if (skb_is_gso(skb)) {
2640 u16 mss = max(skb_shinfo(skb)->gso_size, TX_CMD_B_MSS_MIN_);
2641
2642 tx_cmd_b = (mss << TX_CMD_B_MSS_SHIFT_) & TX_CMD_B_MSS_MASK_;
2643
2644 tx_cmd_a |= TX_CMD_A_LSO_;
2645 }
2646
2647 if (skb_vlan_tag_present(skb)) {
2648 tx_cmd_a |= TX_CMD_A_IVTG_;
2649 tx_cmd_b |= skb_vlan_tag_get(skb) & TX_CMD_B_VTAG_MASK_;
2650 }
2651
2652 skb_push(skb, 4);
2653 cpu_to_le32s(&tx_cmd_b);
2654 memcpy(skb->data, &tx_cmd_b, 4);
2655
2656 skb_push(skb, 4);
2657 cpu_to_le32s(&tx_cmd_a);
2658 memcpy(skb->data, &tx_cmd_a, 4);
2659
2660 return skb;
2661}
2662
2663static enum skb_state defer_bh(struct lan78xx_net *dev, struct sk_buff *skb,
2664 struct sk_buff_head *list, enum skb_state state)
2665{
2666 unsigned long flags;
2667 enum skb_state old_state;
2668 struct skb_data *entry = (struct skb_data *)skb->cb;
2669
2670 spin_lock_irqsave(&list->lock, flags);
2671 old_state = entry->state;
2672 entry->state = state;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00002673
2674 __skb_unlink(skb, list);
2675 spin_unlock(&list->lock);
2676 spin_lock(&dev->done.lock);
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00002677
2678 __skb_queue_tail(&dev->done, skb);
2679 if (skb_queue_len(&dev->done) == 1)
2680 tasklet_schedule(&dev->bh);
2681 spin_unlock_irqrestore(&dev->done.lock, flags);
2682
2683 return old_state;
2684}
2685
2686static void tx_complete(struct urb *urb)
2687{
2688 struct sk_buff *skb = (struct sk_buff *)urb->context;
2689 struct skb_data *entry = (struct skb_data *)skb->cb;
2690 struct lan78xx_net *dev = entry->dev;
2691
2692 if (urb->status == 0) {
Woojung Huh74d79a22016-04-25 22:22:32 +00002693 dev->net->stats.tx_packets += entry->num_of_packet;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00002694 dev->net->stats.tx_bytes += entry->length;
2695 } else {
2696 dev->net->stats.tx_errors++;
2697
2698 switch (urb->status) {
2699 case -EPIPE:
2700 lan78xx_defer_kevent(dev, EVENT_TX_HALT);
2701 break;
2702
2703 /* software-driven interface shutdown */
2704 case -ECONNRESET:
2705 case -ESHUTDOWN:
2706 break;
2707
2708 case -EPROTO:
2709 case -ETIME:
2710 case -EILSEQ:
2711 netif_stop_queue(dev->net);
2712 break;
2713 default:
2714 netif_dbg(dev, tx_err, dev->net,
2715 "tx err %d\n", entry->urb->status);
2716 break;
2717 }
2718 }
2719
2720 usb_autopm_put_interface_async(dev->intf);
2721
Woojung.Huh@microchip.com81c38e82015-08-11 15:21:41 +00002722 defer_bh(dev, skb, &dev->txq, tx_done);
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00002723}
2724
2725static void lan78xx_queue_skb(struct sk_buff_head *list,
2726 struct sk_buff *newsk, enum skb_state state)
2727{
2728 struct skb_data *entry = (struct skb_data *)newsk->cb;
2729
2730 __skb_queue_tail(list, newsk);
2731 entry->state = state;
2732}
2733
Baoyou Xiee0c79ff2016-09-06 16:19:02 +08002734static netdev_tx_t
2735lan78xx_start_xmit(struct sk_buff *skb, struct net_device *net)
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00002736{
2737 struct lan78xx_net *dev = netdev_priv(net);
Woojung.Huh@microchip.com81c38e82015-08-11 15:21:41 +00002738 struct sk_buff *skb2 = NULL;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00002739
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00002740 if (skb) {
Woojung.Huh@microchip.com81c38e82015-08-11 15:21:41 +00002741 skb_tx_timestamp(skb);
2742 skb2 = lan78xx_tx_prep(dev, skb, GFP_ATOMIC);
2743 }
2744
2745 if (skb2) {
2746 skb_queue_tail(&dev->txq_pend, skb2);
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00002747
Woojung.Huh@microchip.com4b2a4a92016-01-27 22:57:54 +00002748 /* throttle TX patch at slower than SUPER SPEED USB */
2749 if ((dev->udev->speed < USB_SPEED_SUPER) &&
2750 (skb_queue_len(&dev->txq_pend) > 10))
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00002751 netif_stop_queue(net);
2752 } else {
2753 netif_dbg(dev, tx_err, dev->net,
2754 "lan78xx_tx_prep return NULL\n");
2755 dev->net->stats.tx_errors++;
2756 dev->net->stats.tx_dropped++;
2757 }
2758
2759 tasklet_schedule(&dev->bh);
2760
2761 return NETDEV_TX_OK;
2762}
2763
Baoyou Xiee0c79ff2016-09-06 16:19:02 +08002764static int
2765lan78xx_get_endpoints(struct lan78xx_net *dev, struct usb_interface *intf)
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00002766{
2767 int tmp;
2768 struct usb_host_interface *alt = NULL;
2769 struct usb_host_endpoint *in = NULL, *out = NULL;
2770 struct usb_host_endpoint *status = NULL;
2771
2772 for (tmp = 0; tmp < intf->num_altsetting; tmp++) {
2773 unsigned ep;
2774
2775 in = NULL;
2776 out = NULL;
2777 status = NULL;
2778 alt = intf->altsetting + tmp;
2779
2780 for (ep = 0; ep < alt->desc.bNumEndpoints; ep++) {
2781 struct usb_host_endpoint *e;
2782 int intr = 0;
2783
2784 e = alt->endpoint + ep;
2785 switch (e->desc.bmAttributes) {
2786 case USB_ENDPOINT_XFER_INT:
2787 if (!usb_endpoint_dir_in(&e->desc))
2788 continue;
2789 intr = 1;
2790 /* FALLTHROUGH */
2791 case USB_ENDPOINT_XFER_BULK:
2792 break;
2793 default:
2794 continue;
2795 }
2796 if (usb_endpoint_dir_in(&e->desc)) {
2797 if (!intr && !in)
2798 in = e;
2799 else if (intr && !status)
2800 status = e;
2801 } else {
2802 if (!out)
2803 out = e;
2804 }
2805 }
2806 if (in && out)
2807 break;
2808 }
2809 if (!alt || !in || !out)
2810 return -EINVAL;
2811
2812 dev->pipe_in = usb_rcvbulkpipe(dev->udev,
2813 in->desc.bEndpointAddress &
2814 USB_ENDPOINT_NUMBER_MASK);
2815 dev->pipe_out = usb_sndbulkpipe(dev->udev,
2816 out->desc.bEndpointAddress &
2817 USB_ENDPOINT_NUMBER_MASK);
2818 dev->ep_intr = status;
2819
2820 return 0;
2821}
2822
2823static int lan78xx_bind(struct lan78xx_net *dev, struct usb_interface *intf)
2824{
2825 struct lan78xx_priv *pdata = NULL;
2826 int ret;
2827 int i;
2828
2829 ret = lan78xx_get_endpoints(dev, intf);
2830
2831 dev->data[0] = (unsigned long)kzalloc(sizeof(*pdata), GFP_KERNEL);
2832
2833 pdata = (struct lan78xx_priv *)(dev->data[0]);
2834 if (!pdata) {
2835 netdev_warn(dev->net, "Unable to allocate lan78xx_priv");
2836 return -ENOMEM;
2837 }
2838
2839 pdata->dev = dev;
2840
2841 spin_lock_init(&pdata->rfe_ctl_lock);
2842 mutex_init(&pdata->dataport_mutex);
2843
2844 INIT_WORK(&pdata->set_multicast, lan78xx_deferred_multicast_write);
2845
2846 for (i = 0; i < DP_SEL_VHF_VLAN_LEN; i++)
2847 pdata->vlan_table[i] = 0;
2848
2849 INIT_WORK(&pdata->set_vlan, lan78xx_deferred_vlan_write);
2850
2851 dev->net->features = 0;
2852
2853 if (DEFAULT_TX_CSUM_ENABLE)
2854 dev->net->features |= NETIF_F_HW_CSUM;
2855
2856 if (DEFAULT_RX_CSUM_ENABLE)
2857 dev->net->features |= NETIF_F_RXCSUM;
2858
2859 if (DEFAULT_TSO_CSUM_ENABLE)
2860 dev->net->features |= NETIF_F_TSO | NETIF_F_TSO6 | NETIF_F_SG;
2861
2862 dev->net->hw_features = dev->net->features;
2863
Woojung Huhcc89c322016-11-01 20:02:00 +00002864 ret = lan78xx_setup_irq_domain(dev);
2865 if (ret < 0) {
2866 netdev_warn(dev->net,
2867 "lan78xx_setup_irq_domain() failed : %d", ret);
Raghuram Chary J2d2d99e2018-03-27 14:51:16 +05302868 goto out1;
Woojung Huhcc89c322016-11-01 20:02:00 +00002869 }
2870
Nisar Sayed0573f942017-08-01 10:24:33 +00002871 dev->net->hard_header_len += TX_OVERHEAD;
2872 dev->hard_mtu = dev->net->mtu + dev->net->hard_header_len;
2873
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00002874 /* Init all registers */
2875 ret = lan78xx_reset(dev);
Raghuram Chary J2d2d99e2018-03-27 14:51:16 +05302876 if (ret) {
2877 netdev_warn(dev->net, "Registers INIT FAILED....");
2878 goto out2;
2879 }
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00002880
Nisar Sayedfb52c3b2017-08-01 10:24:17 +00002881 ret = lan78xx_mdio_init(dev);
Raghuram Chary J2d2d99e2018-03-27 14:51:16 +05302882 if (ret) {
2883 netdev_warn(dev->net, "MDIO INIT FAILED.....");
2884 goto out2;
2885 }
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00002886
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00002887 dev->net->flags |= IFF_MULTICAST;
2888
2889 pdata->wol = WAKE_MAGIC;
2890
Nisar Sayedfb52c3b2017-08-01 10:24:17 +00002891 return ret;
Raghuram Chary J2d2d99e2018-03-27 14:51:16 +05302892
2893out2:
2894 lan78xx_remove_irq_domain(dev);
2895
2896out1:
2897 netdev_warn(dev->net, "Bind routine FAILED");
2898 cancel_work_sync(&pdata->set_multicast);
2899 cancel_work_sync(&pdata->set_vlan);
2900 kfree(pdata);
2901 return ret;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00002902}
2903
2904static void lan78xx_unbind(struct lan78xx_net *dev, struct usb_interface *intf)
2905{
2906 struct lan78xx_priv *pdata = (struct lan78xx_priv *)(dev->data[0]);
2907
Woojung Huhcc89c322016-11-01 20:02:00 +00002908 lan78xx_remove_irq_domain(dev);
2909
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00002910 lan78xx_remove_mdio(dev);
2911
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00002912 if (pdata) {
Raghuram Chary J2d2d99e2018-03-27 14:51:16 +05302913 cancel_work_sync(&pdata->set_multicast);
2914 cancel_work_sync(&pdata->set_vlan);
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00002915 netif_dbg(dev, ifdown, dev->net, "free pdata");
2916 kfree(pdata);
2917 pdata = NULL;
2918 dev->data[0] = 0;
2919 }
2920}
2921
2922static void lan78xx_rx_csum_offload(struct lan78xx_net *dev,
2923 struct sk_buff *skb,
2924 u32 rx_cmd_a, u32 rx_cmd_b)
2925{
2926 if (!(dev->net->features & NETIF_F_RXCSUM) ||
2927 unlikely(rx_cmd_a & RX_CMD_A_ICSM_)) {
2928 skb->ip_summed = CHECKSUM_NONE;
2929 } else {
2930 skb->csum = ntohs((u16)(rx_cmd_b >> RX_CMD_B_CSUM_SHIFT_));
2931 skb->ip_summed = CHECKSUM_COMPLETE;
2932 }
2933}
2934
Baoyou Xiee0c79ff2016-09-06 16:19:02 +08002935static void lan78xx_skb_return(struct lan78xx_net *dev, struct sk_buff *skb)
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00002936{
2937 int status;
2938
2939 if (test_bit(EVENT_RX_PAUSED, &dev->flags)) {
2940 skb_queue_tail(&dev->rxq_pause, skb);
2941 return;
2942 }
2943
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00002944 dev->net->stats.rx_packets++;
2945 dev->net->stats.rx_bytes += skb->len;
2946
Woojung Huh74d79a22016-04-25 22:22:32 +00002947 skb->protocol = eth_type_trans(skb, dev->net);
2948
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00002949 netif_dbg(dev, rx_status, dev->net, "< rx, len %zu, type 0x%x\n",
2950 skb->len + sizeof(struct ethhdr), skb->protocol);
2951 memset(skb->cb, 0, sizeof(struct skb_data));
2952
2953 if (skb_defer_rx_timestamp(skb))
2954 return;
2955
2956 status = netif_rx(skb);
2957 if (status != NET_RX_SUCCESS)
2958 netif_dbg(dev, rx_err, dev->net,
2959 "netif_rx status %d\n", status);
2960}
2961
2962static int lan78xx_rx(struct lan78xx_net *dev, struct sk_buff *skb)
2963{
2964 if (skb->len < dev->net->hard_header_len)
2965 return 0;
2966
2967 while (skb->len > 0) {
2968 u32 rx_cmd_a, rx_cmd_b, align_count, size;
2969 u16 rx_cmd_c;
2970 struct sk_buff *skb2;
2971 unsigned char *packet;
2972
2973 memcpy(&rx_cmd_a, skb->data, sizeof(rx_cmd_a));
2974 le32_to_cpus(&rx_cmd_a);
2975 skb_pull(skb, sizeof(rx_cmd_a));
2976
2977 memcpy(&rx_cmd_b, skb->data, sizeof(rx_cmd_b));
2978 le32_to_cpus(&rx_cmd_b);
2979 skb_pull(skb, sizeof(rx_cmd_b));
2980
2981 memcpy(&rx_cmd_c, skb->data, sizeof(rx_cmd_c));
2982 le16_to_cpus(&rx_cmd_c);
2983 skb_pull(skb, sizeof(rx_cmd_c));
2984
2985 packet = skb->data;
2986
2987 /* get the packet length */
2988 size = (rx_cmd_a & RX_CMD_A_LEN_MASK_);
2989 align_count = (4 - ((size + RXW_PADDING) % 4)) % 4;
2990
2991 if (unlikely(rx_cmd_a & RX_CMD_A_RED_)) {
2992 netif_dbg(dev, rx_err, dev->net,
2993 "Error rx_cmd_a=0x%08x", rx_cmd_a);
2994 } else {
2995 /* last frame in this batch */
2996 if (skb->len == size) {
2997 lan78xx_rx_csum_offload(dev, skb,
2998 rx_cmd_a, rx_cmd_b);
2999
3000 skb_trim(skb, skb->len - 4); /* remove fcs */
3001 skb->truesize = size + sizeof(struct sk_buff);
3002
3003 return 1;
3004 }
3005
3006 skb2 = skb_clone(skb, GFP_ATOMIC);
3007 if (unlikely(!skb2)) {
3008 netdev_warn(dev->net, "Error allocating skb");
3009 return 0;
3010 }
3011
3012 skb2->len = size;
3013 skb2->data = packet;
3014 skb_set_tail_pointer(skb2, size);
3015
3016 lan78xx_rx_csum_offload(dev, skb2, rx_cmd_a, rx_cmd_b);
3017
3018 skb_trim(skb2, skb2->len - 4); /* remove fcs */
3019 skb2->truesize = size + sizeof(struct sk_buff);
3020
3021 lan78xx_skb_return(dev, skb2);
3022 }
3023
3024 skb_pull(skb, size);
3025
3026 /* padding bytes before the next frame starts */
3027 if (skb->len)
3028 skb_pull(skb, align_count);
3029 }
3030
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00003031 return 1;
3032}
3033
3034static inline void rx_process(struct lan78xx_net *dev, struct sk_buff *skb)
3035{
3036 if (!lan78xx_rx(dev, skb)) {
3037 dev->net->stats.rx_errors++;
3038 goto done;
3039 }
3040
3041 if (skb->len) {
3042 lan78xx_skb_return(dev, skb);
3043 return;
3044 }
3045
3046 netif_dbg(dev, rx_err, dev->net, "drop\n");
3047 dev->net->stats.rx_errors++;
3048done:
3049 skb_queue_tail(&dev->done, skb);
3050}
3051
3052static void rx_complete(struct urb *urb);
3053
3054static int rx_submit(struct lan78xx_net *dev, struct urb *urb, gfp_t flags)
3055{
3056 struct sk_buff *skb;
3057 struct skb_data *entry;
3058 unsigned long lockflags;
3059 size_t size = dev->rx_urb_size;
3060 int ret = 0;
3061
3062 skb = netdev_alloc_skb_ip_align(dev->net, size);
3063 if (!skb) {
3064 usb_free_urb(urb);
3065 return -ENOMEM;
3066 }
3067
3068 entry = (struct skb_data *)skb->cb;
3069 entry->urb = urb;
3070 entry->dev = dev;
3071 entry->length = 0;
3072
3073 usb_fill_bulk_urb(urb, dev->udev, dev->pipe_in,
3074 skb->data, size, rx_complete, skb);
3075
3076 spin_lock_irqsave(&dev->rxq.lock, lockflags);
3077
3078 if (netif_device_present(dev->net) &&
3079 netif_running(dev->net) &&
3080 !test_bit(EVENT_RX_HALT, &dev->flags) &&
3081 !test_bit(EVENT_DEV_ASLEEP, &dev->flags)) {
3082 ret = usb_submit_urb(urb, GFP_ATOMIC);
3083 switch (ret) {
3084 case 0:
3085 lan78xx_queue_skb(&dev->rxq, skb, rx_start);
3086 break;
3087 case -EPIPE:
3088 lan78xx_defer_kevent(dev, EVENT_RX_HALT);
3089 break;
3090 case -ENODEV:
3091 netif_dbg(dev, ifdown, dev->net, "device gone\n");
3092 netif_device_detach(dev->net);
3093 break;
3094 case -EHOSTUNREACH:
3095 ret = -ENOLINK;
3096 break;
3097 default:
3098 netif_dbg(dev, rx_err, dev->net,
3099 "rx submit, %d\n", ret);
3100 tasklet_schedule(&dev->bh);
3101 }
3102 } else {
3103 netif_dbg(dev, ifdown, dev->net, "rx: stopped\n");
3104 ret = -ENOLINK;
3105 }
3106 spin_unlock_irqrestore(&dev->rxq.lock, lockflags);
3107 if (ret) {
3108 dev_kfree_skb_any(skb);
3109 usb_free_urb(urb);
3110 }
3111 return ret;
3112}
3113
3114static void rx_complete(struct urb *urb)
3115{
3116 struct sk_buff *skb = (struct sk_buff *)urb->context;
3117 struct skb_data *entry = (struct skb_data *)skb->cb;
3118 struct lan78xx_net *dev = entry->dev;
3119 int urb_status = urb->status;
3120 enum skb_state state;
3121
3122 skb_put(skb, urb->actual_length);
3123 state = rx_done;
3124 entry->urb = NULL;
3125
3126 switch (urb_status) {
3127 case 0:
3128 if (skb->len < dev->net->hard_header_len) {
3129 state = rx_cleanup;
3130 dev->net->stats.rx_errors++;
3131 dev->net->stats.rx_length_errors++;
3132 netif_dbg(dev, rx_err, dev->net,
3133 "rx length %d\n", skb->len);
3134 }
3135 usb_mark_last_busy(dev->udev);
3136 break;
3137 case -EPIPE:
3138 dev->net->stats.rx_errors++;
3139 lan78xx_defer_kevent(dev, EVENT_RX_HALT);
3140 /* FALLTHROUGH */
3141 case -ECONNRESET: /* async unlink */
3142 case -ESHUTDOWN: /* hardware gone */
3143 netif_dbg(dev, ifdown, dev->net,
3144 "rx shutdown, code %d\n", urb_status);
3145 state = rx_cleanup;
3146 entry->urb = urb;
3147 urb = NULL;
3148 break;
3149 case -EPROTO:
3150 case -ETIME:
3151 case -EILSEQ:
3152 dev->net->stats.rx_errors++;
3153 state = rx_cleanup;
3154 entry->urb = urb;
3155 urb = NULL;
3156 break;
3157
3158 /* data overrun ... flush fifo? */
3159 case -EOVERFLOW:
3160 dev->net->stats.rx_over_errors++;
3161 /* FALLTHROUGH */
3162
3163 default:
3164 state = rx_cleanup;
3165 dev->net->stats.rx_errors++;
3166 netif_dbg(dev, rx_err, dev->net, "rx status %d\n", urb_status);
3167 break;
3168 }
3169
3170 state = defer_bh(dev, skb, &dev->rxq, state);
3171
3172 if (urb) {
3173 if (netif_running(dev->net) &&
3174 !test_bit(EVENT_RX_HALT, &dev->flags) &&
3175 state != unlink_start) {
3176 rx_submit(dev, urb, GFP_ATOMIC);
3177 return;
3178 }
3179 usb_free_urb(urb);
3180 }
3181 netif_dbg(dev, rx_err, dev->net, "no read resubmitted\n");
3182}
3183
3184static void lan78xx_tx_bh(struct lan78xx_net *dev)
3185{
3186 int length;
3187 struct urb *urb = NULL;
3188 struct skb_data *entry;
3189 unsigned long flags;
3190 struct sk_buff_head *tqp = &dev->txq_pend;
3191 struct sk_buff *skb, *skb2;
3192 int ret;
3193 int count, pos;
3194 int skb_totallen, pkt_cnt;
3195
3196 skb_totallen = 0;
3197 pkt_cnt = 0;
Woojung Huh74d79a22016-04-25 22:22:32 +00003198 count = 0;
3199 length = 0;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00003200 for (skb = tqp->next; pkt_cnt < tqp->qlen; skb = skb->next) {
3201 if (skb_is_gso(skb)) {
3202 if (pkt_cnt) {
3203 /* handle previous packets first */
3204 break;
3205 }
Woojung Huh74d79a22016-04-25 22:22:32 +00003206 count = 1;
3207 length = skb->len - TX_OVERHEAD;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00003208 skb2 = skb_dequeue(tqp);
3209 goto gso_skb;
3210 }
3211
3212 if ((skb_totallen + skb->len) > MAX_SINGLE_PACKET_SIZE)
3213 break;
3214 skb_totallen = skb->len + roundup(skb_totallen, sizeof(u32));
3215 pkt_cnt++;
3216 }
3217
3218 /* copy to a single skb */
3219 skb = alloc_skb(skb_totallen, GFP_ATOMIC);
3220 if (!skb)
3221 goto drop;
3222
3223 skb_put(skb, skb_totallen);
3224
3225 for (count = pos = 0; count < pkt_cnt; count++) {
3226 skb2 = skb_dequeue(tqp);
3227 if (skb2) {
Woojung Huh74d79a22016-04-25 22:22:32 +00003228 length += (skb2->len - TX_OVERHEAD);
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00003229 memcpy(skb->data + pos, skb2->data, skb2->len);
3230 pos += roundup(skb2->len, sizeof(u32));
3231 dev_kfree_skb(skb2);
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00003232 }
3233 }
3234
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00003235gso_skb:
3236 urb = usb_alloc_urb(0, GFP_ATOMIC);
Wolfram Sangd7c4e842016-08-11 23:05:27 +02003237 if (!urb)
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00003238 goto drop;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00003239
3240 entry = (struct skb_data *)skb->cb;
3241 entry->urb = urb;
3242 entry->dev = dev;
3243 entry->length = length;
Woojung Huh74d79a22016-04-25 22:22:32 +00003244 entry->num_of_packet = count;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00003245
3246 spin_lock_irqsave(&dev->txq.lock, flags);
3247 ret = usb_autopm_get_interface_async(dev->intf);
3248 if (ret < 0) {
3249 spin_unlock_irqrestore(&dev->txq.lock, flags);
3250 goto drop;
3251 }
3252
3253 usb_fill_bulk_urb(urb, dev->udev, dev->pipe_out,
3254 skb->data, skb->len, tx_complete, skb);
3255
3256 if (length % dev->maxpacket == 0) {
3257 /* send USB_ZERO_PACKET */
3258 urb->transfer_flags |= URB_ZERO_PACKET;
3259 }
3260
3261#ifdef CONFIG_PM
3262 /* if this triggers the device is still a sleep */
3263 if (test_bit(EVENT_DEV_ASLEEP, &dev->flags)) {
3264 /* transmission will be done in resume */
3265 usb_anchor_urb(urb, &dev->deferred);
3266 /* no use to process more packets */
3267 netif_stop_queue(dev->net);
3268 usb_put_urb(urb);
3269 spin_unlock_irqrestore(&dev->txq.lock, flags);
3270 netdev_dbg(dev->net, "Delaying transmission for resumption\n");
3271 return;
3272 }
3273#endif
3274
3275 ret = usb_submit_urb(urb, GFP_ATOMIC);
3276 switch (ret) {
3277 case 0:
Florian Westphal860e9532016-05-03 16:33:13 +02003278 netif_trans_update(dev->net);
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00003279 lan78xx_queue_skb(&dev->txq, skb, tx_start);
3280 if (skb_queue_len(&dev->txq) >= dev->tx_qlen)
3281 netif_stop_queue(dev->net);
3282 break;
3283 case -EPIPE:
3284 netif_stop_queue(dev->net);
3285 lan78xx_defer_kevent(dev, EVENT_TX_HALT);
3286 usb_autopm_put_interface_async(dev->intf);
3287 break;
3288 default:
3289 usb_autopm_put_interface_async(dev->intf);
3290 netif_dbg(dev, tx_err, dev->net,
3291 "tx: submit urb err %d\n", ret);
3292 break;
3293 }
3294
3295 spin_unlock_irqrestore(&dev->txq.lock, flags);
3296
3297 if (ret) {
3298 netif_dbg(dev, tx_err, dev->net, "drop, code %d\n", ret);
3299drop:
3300 dev->net->stats.tx_dropped++;
3301 if (skb)
3302 dev_kfree_skb_any(skb);
3303 usb_free_urb(urb);
3304 } else
3305 netif_dbg(dev, tx_queued, dev->net,
3306 "> tx, len %d, type 0x%x\n", length, skb->protocol);
3307}
3308
3309static void lan78xx_rx_bh(struct lan78xx_net *dev)
3310{
3311 struct urb *urb;
3312 int i;
3313
3314 if (skb_queue_len(&dev->rxq) < dev->rx_qlen) {
3315 for (i = 0; i < 10; i++) {
3316 if (skb_queue_len(&dev->rxq) >= dev->rx_qlen)
3317 break;
3318 urb = usb_alloc_urb(0, GFP_ATOMIC);
3319 if (urb)
3320 if (rx_submit(dev, urb, GFP_ATOMIC) == -ENOLINK)
3321 return;
3322 }
3323
3324 if (skb_queue_len(&dev->rxq) < dev->rx_qlen)
3325 tasklet_schedule(&dev->bh);
3326 }
3327 if (skb_queue_len(&dev->txq) < dev->tx_qlen)
3328 netif_wake_queue(dev->net);
3329}
3330
3331static void lan78xx_bh(unsigned long param)
3332{
3333 struct lan78xx_net *dev = (struct lan78xx_net *)param;
3334 struct sk_buff *skb;
3335 struct skb_data *entry;
3336
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00003337 while ((skb = skb_dequeue(&dev->done))) {
3338 entry = (struct skb_data *)(skb->cb);
3339 switch (entry->state) {
3340 case rx_done:
3341 entry->state = rx_cleanup;
3342 rx_process(dev, skb);
3343 continue;
3344 case tx_done:
3345 usb_free_urb(entry->urb);
3346 dev_kfree_skb(skb);
3347 continue;
3348 case rx_cleanup:
3349 usb_free_urb(entry->urb);
3350 dev_kfree_skb(skb);
3351 continue;
3352 default:
3353 netdev_dbg(dev->net, "skb state %d\n", entry->state);
3354 return;
3355 }
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00003356 }
3357
3358 if (netif_device_present(dev->net) && netif_running(dev->net)) {
Woojung Huh20ff5562016-03-16 22:10:40 +00003359 /* reset update timer delta */
3360 if (timer_pending(&dev->stat_monitor) && (dev->delta != 1)) {
3361 dev->delta = 1;
3362 mod_timer(&dev->stat_monitor,
3363 jiffies + STAT_UPDATE_TIMER);
3364 }
3365
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00003366 if (!skb_queue_empty(&dev->txq_pend))
3367 lan78xx_tx_bh(dev);
3368
3369 if (!timer_pending(&dev->delay) &&
3370 !test_bit(EVENT_RX_HALT, &dev->flags))
3371 lan78xx_rx_bh(dev);
3372 }
3373}
3374
3375static void lan78xx_delayedwork(struct work_struct *work)
3376{
3377 int status;
3378 struct lan78xx_net *dev;
3379
3380 dev = container_of(work, struct lan78xx_net, wq.work);
3381
3382 if (test_bit(EVENT_TX_HALT, &dev->flags)) {
3383 unlink_urbs(dev, &dev->txq);
3384 status = usb_autopm_get_interface(dev->intf);
3385 if (status < 0)
3386 goto fail_pipe;
3387 status = usb_clear_halt(dev->udev, dev->pipe_out);
3388 usb_autopm_put_interface(dev->intf);
3389 if (status < 0 &&
3390 status != -EPIPE &&
3391 status != -ESHUTDOWN) {
3392 if (netif_msg_tx_err(dev))
3393fail_pipe:
3394 netdev_err(dev->net,
3395 "can't clear tx halt, status %d\n",
3396 status);
3397 } else {
3398 clear_bit(EVENT_TX_HALT, &dev->flags);
3399 if (status != -ESHUTDOWN)
3400 netif_wake_queue(dev->net);
3401 }
3402 }
3403 if (test_bit(EVENT_RX_HALT, &dev->flags)) {
3404 unlink_urbs(dev, &dev->rxq);
3405 status = usb_autopm_get_interface(dev->intf);
3406 if (status < 0)
3407 goto fail_halt;
3408 status = usb_clear_halt(dev->udev, dev->pipe_in);
3409 usb_autopm_put_interface(dev->intf);
3410 if (status < 0 &&
3411 status != -EPIPE &&
3412 status != -ESHUTDOWN) {
3413 if (netif_msg_rx_err(dev))
3414fail_halt:
3415 netdev_err(dev->net,
3416 "can't clear rx halt, status %d\n",
3417 status);
3418 } else {
3419 clear_bit(EVENT_RX_HALT, &dev->flags);
3420 tasklet_schedule(&dev->bh);
3421 }
3422 }
3423
3424 if (test_bit(EVENT_LINK_RESET, &dev->flags)) {
3425 int ret = 0;
3426
3427 clear_bit(EVENT_LINK_RESET, &dev->flags);
3428 status = usb_autopm_get_interface(dev->intf);
3429 if (status < 0)
3430 goto skip_reset;
3431 if (lan78xx_link_reset(dev) < 0) {
3432 usb_autopm_put_interface(dev->intf);
3433skip_reset:
3434 netdev_info(dev->net, "link reset failed (%d)\n",
3435 ret);
3436 } else {
3437 usb_autopm_put_interface(dev->intf);
3438 }
3439 }
Woojung Huh20ff5562016-03-16 22:10:40 +00003440
3441 if (test_bit(EVENT_STAT_UPDATE, &dev->flags)) {
3442 lan78xx_update_stats(dev);
3443
3444 clear_bit(EVENT_STAT_UPDATE, &dev->flags);
3445
3446 mod_timer(&dev->stat_monitor,
3447 jiffies + (STAT_UPDATE_TIMER * dev->delta));
3448
3449 dev->delta = min((dev->delta * 2), 50);
3450 }
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00003451}
3452
3453static void intr_complete(struct urb *urb)
3454{
3455 struct lan78xx_net *dev = urb->context;
3456 int status = urb->status;
3457
3458 switch (status) {
3459 /* success */
3460 case 0:
3461 lan78xx_status(dev, urb);
3462 break;
3463
3464 /* software-driven interface shutdown */
3465 case -ENOENT: /* urb killed */
3466 case -ESHUTDOWN: /* hardware gone */
3467 netif_dbg(dev, ifdown, dev->net,
3468 "intr shutdown, code %d\n", status);
3469 return;
3470
3471 /* NOTE: not throttling like RX/TX, since this endpoint
3472 * already polls infrequently
3473 */
3474 default:
3475 netdev_dbg(dev->net, "intr status %d\n", status);
3476 break;
3477 }
3478
3479 if (!netif_running(dev->net))
3480 return;
3481
3482 memset(urb->transfer_buffer, 0, urb->transfer_buffer_length);
3483 status = usb_submit_urb(urb, GFP_ATOMIC);
3484 if (status != 0)
3485 netif_err(dev, timer, dev->net,
3486 "intr resubmit --> %d\n", status);
3487}
3488
3489static void lan78xx_disconnect(struct usb_interface *intf)
3490{
3491 struct lan78xx_net *dev;
3492 struct usb_device *udev;
3493 struct net_device *net;
3494
3495 dev = usb_get_intfdata(intf);
3496 usb_set_intfdata(intf, NULL);
3497 if (!dev)
3498 return;
3499
3500 udev = interface_to_usbdev(intf);
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00003501 net = dev->net;
Alexander Graf92571a12018-04-04 00:19:35 +02003502
3503 phy_unregister_fixup_for_uid(PHY_KSZ9031RNX, 0xfffffff0);
3504 phy_unregister_fixup_for_uid(PHY_LAN8835, 0xfffffff0);
3505
3506 phy_disconnect(net->phydev);
3507
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00003508 unregister_netdev(net);
3509
3510 cancel_delayed_work_sync(&dev->wq);
3511
3512 usb_scuttle_anchored_urbs(&dev->deferred);
3513
3514 lan78xx_unbind(dev, intf);
3515
3516 usb_kill_urb(dev->urb_intr);
3517 usb_free_urb(dev->urb_intr);
3518
3519 free_netdev(net);
3520 usb_put_dev(udev);
3521}
3522
Baoyou Xiee0c79ff2016-09-06 16:19:02 +08003523static void lan78xx_tx_timeout(struct net_device *net)
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00003524{
3525 struct lan78xx_net *dev = netdev_priv(net);
3526
3527 unlink_urbs(dev, &dev->txq);
3528 tasklet_schedule(&dev->bh);
3529}
3530
3531static const struct net_device_ops lan78xx_netdev_ops = {
3532 .ndo_open = lan78xx_open,
3533 .ndo_stop = lan78xx_stop,
3534 .ndo_start_xmit = lan78xx_start_xmit,
3535 .ndo_tx_timeout = lan78xx_tx_timeout,
3536 .ndo_change_mtu = lan78xx_change_mtu,
3537 .ndo_set_mac_address = lan78xx_set_mac_addr,
3538 .ndo_validate_addr = eth_validate_addr,
3539 .ndo_do_ioctl = lan78xx_ioctl,
3540 .ndo_set_rx_mode = lan78xx_set_multicast,
3541 .ndo_set_features = lan78xx_set_features,
3542 .ndo_vlan_rx_add_vid = lan78xx_vlan_rx_add_vid,
3543 .ndo_vlan_rx_kill_vid = lan78xx_vlan_rx_kill_vid,
3544};
3545
Kees Cookd28bb962017-10-16 17:29:32 -07003546static void lan78xx_stat_monitor(struct timer_list *t)
Woojung Huh20ff5562016-03-16 22:10:40 +00003547{
Kees Cookd28bb962017-10-16 17:29:32 -07003548 struct lan78xx_net *dev = from_timer(dev, t, stat_monitor);
Woojung Huh20ff5562016-03-16 22:10:40 +00003549
3550 lan78xx_defer_kevent(dev, EVENT_STAT_UPDATE);
3551}
3552
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00003553static int lan78xx_probe(struct usb_interface *intf,
3554 const struct usb_device_id *id)
3555{
3556 struct lan78xx_net *dev;
3557 struct net_device *netdev;
3558 struct usb_device *udev;
3559 int ret;
3560 unsigned maxp;
3561 unsigned period;
3562 u8 *buf = NULL;
3563
3564 udev = interface_to_usbdev(intf);
3565 udev = usb_get_dev(udev);
3566
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00003567 netdev = alloc_etherdev(sizeof(struct lan78xx_net));
3568 if (!netdev) {
Nisar Sayedfb52c3b2017-08-01 10:24:17 +00003569 dev_err(&intf->dev, "Error: OOM\n");
3570 ret = -ENOMEM;
3571 goto out1;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00003572 }
3573
3574 /* netdev_printk() needs this */
3575 SET_NETDEV_DEV(netdev, &intf->dev);
3576
3577 dev = netdev_priv(netdev);
3578 dev->udev = udev;
3579 dev->intf = intf;
3580 dev->net = netdev;
3581 dev->msg_enable = netif_msg_init(msg_level, NETIF_MSG_DRV
3582 | NETIF_MSG_PROBE | NETIF_MSG_LINK);
3583
3584 skb_queue_head_init(&dev->rxq);
3585 skb_queue_head_init(&dev->txq);
3586 skb_queue_head_init(&dev->done);
3587 skb_queue_head_init(&dev->rxq_pause);
3588 skb_queue_head_init(&dev->txq_pend);
3589 mutex_init(&dev->phy_mutex);
3590
3591 tasklet_init(&dev->bh, lan78xx_bh, (unsigned long)dev);
3592 INIT_DELAYED_WORK(&dev->wq, lan78xx_delayedwork);
3593 init_usb_anchor(&dev->deferred);
3594
3595 netdev->netdev_ops = &lan78xx_netdev_ops;
3596 netdev->watchdog_timeo = TX_TIMEOUT_JIFFIES;
3597 netdev->ethtool_ops = &lan78xx_ethtool_ops;
3598
Woojung Huh20ff5562016-03-16 22:10:40 +00003599 dev->delta = 1;
Kees Cookd28bb962017-10-16 17:29:32 -07003600 timer_setup(&dev->stat_monitor, lan78xx_stat_monitor, 0);
Woojung Huh20ff5562016-03-16 22:10:40 +00003601
3602 mutex_init(&dev->stats.access_lock);
3603
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00003604 ret = lan78xx_bind(dev, intf);
3605 if (ret < 0)
3606 goto out2;
3607 strcpy(netdev->name, "eth%d");
3608
3609 if (netdev->mtu > (dev->hard_mtu - netdev->hard_header_len))
3610 netdev->mtu = dev->hard_mtu - netdev->hard_header_len;
3611
Jarod Wilsonf77f0ae2016-10-20 13:55:17 -04003612 /* MTU range: 68 - 9000 */
3613 netdev->max_mtu = MAX_SINGLE_PACKET_SIZE;
3614
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00003615 dev->ep_blkin = (intf->cur_altsetting)->endpoint + 0;
3616 dev->ep_blkout = (intf->cur_altsetting)->endpoint + 1;
3617 dev->ep_intr = (intf->cur_altsetting)->endpoint + 2;
3618
3619 dev->pipe_in = usb_rcvbulkpipe(udev, BULK_IN_PIPE);
3620 dev->pipe_out = usb_sndbulkpipe(udev, BULK_OUT_PIPE);
3621
3622 dev->pipe_intr = usb_rcvintpipe(dev->udev,
3623 dev->ep_intr->desc.bEndpointAddress &
3624 USB_ENDPOINT_NUMBER_MASK);
3625 period = dev->ep_intr->desc.bInterval;
3626
3627 maxp = usb_maxpacket(dev->udev, dev->pipe_intr, 0);
3628 buf = kmalloc(maxp, GFP_KERNEL);
3629 if (buf) {
3630 dev->urb_intr = usb_alloc_urb(0, GFP_KERNEL);
3631 if (!dev->urb_intr) {
Pan Bian51920832016-12-03 19:24:48 +08003632 ret = -ENOMEM;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00003633 kfree(buf);
3634 goto out3;
3635 } else {
3636 usb_fill_int_urb(dev->urb_intr, dev->udev,
3637 dev->pipe_intr, buf, maxp,
3638 intr_complete, dev, period);
3639 }
3640 }
3641
3642 dev->maxpacket = usb_maxpacket(dev->udev, dev->pipe_out, 1);
3643
3644 /* driver requires remote-wakeup capability during autosuspend. */
3645 intf->needs_remote_wakeup = 1;
3646
3647 ret = register_netdev(netdev);
3648 if (ret != 0) {
3649 netif_err(dev, probe, netdev, "couldn't register the device\n");
Nisar Sayedfb52c3b2017-08-01 10:24:17 +00003650 goto out3;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00003651 }
3652
3653 usb_set_intfdata(intf, dev);
3654
3655 ret = device_set_wakeup_enable(&udev->dev, true);
3656
3657 /* Default delay of 2sec has more overhead than advantage.
3658 * Set to 10sec as default.
3659 */
3660 pm_runtime_set_autosuspend_delay(&udev->dev,
3661 DEFAULT_AUTOSUSPEND_DELAY);
3662
Alexander Graf92571a12018-04-04 00:19:35 +02003663 ret = lan78xx_phy_init(dev);
3664 if (ret < 0)
3665 goto out4;
3666
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00003667 return 0;
3668
Alexander Graf92571a12018-04-04 00:19:35 +02003669out4:
3670 unregister_netdev(netdev);
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00003671out3:
3672 lan78xx_unbind(dev, intf);
3673out2:
3674 free_netdev(netdev);
3675out1:
3676 usb_put_dev(udev);
3677
3678 return ret;
3679}
3680
3681static u16 lan78xx_wakeframe_crc16(const u8 *buf, int len)
3682{
3683 const u16 crc16poly = 0x8005;
3684 int i;
3685 u16 bit, crc, msb;
3686 u8 data;
3687
3688 crc = 0xFFFF;
3689 for (i = 0; i < len; i++) {
3690 data = *buf++;
3691 for (bit = 0; bit < 8; bit++) {
3692 msb = crc >> 15;
3693 crc <<= 1;
3694
3695 if (msb ^ (u16)(data & 1)) {
3696 crc ^= crc16poly;
3697 crc |= (u16)0x0001U;
3698 }
3699 data >>= 1;
3700 }
3701 }
3702
3703 return crc;
3704}
3705
3706static int lan78xx_set_suspend(struct lan78xx_net *dev, u32 wol)
3707{
3708 u32 buf;
3709 int ret;
3710 int mask_index;
3711 u16 crc;
3712 u32 temp_wucsr;
3713 u32 temp_pmt_ctl;
3714 const u8 ipv4_multicast[3] = { 0x01, 0x00, 0x5E };
3715 const u8 ipv6_multicast[3] = { 0x33, 0x33 };
3716 const u8 arp_type[2] = { 0x08, 0x06 };
3717
3718 ret = lan78xx_read_reg(dev, MAC_TX, &buf);
3719 buf &= ~MAC_TX_TXEN_;
3720 ret = lan78xx_write_reg(dev, MAC_TX, buf);
3721 ret = lan78xx_read_reg(dev, MAC_RX, &buf);
3722 buf &= ~MAC_RX_RXEN_;
3723 ret = lan78xx_write_reg(dev, MAC_RX, buf);
3724
3725 ret = lan78xx_write_reg(dev, WUCSR, 0);
3726 ret = lan78xx_write_reg(dev, WUCSR2, 0);
3727 ret = lan78xx_write_reg(dev, WK_SRC, 0xFFF1FF1FUL);
3728
3729 temp_wucsr = 0;
3730
3731 temp_pmt_ctl = 0;
3732 ret = lan78xx_read_reg(dev, PMT_CTL, &temp_pmt_ctl);
3733 temp_pmt_ctl &= ~PMT_CTL_RES_CLR_WKP_EN_;
3734 temp_pmt_ctl |= PMT_CTL_RES_CLR_WKP_STS_;
3735
3736 for (mask_index = 0; mask_index < NUM_OF_WUF_CFG; mask_index++)
3737 ret = lan78xx_write_reg(dev, WUF_CFG(mask_index), 0);
3738
3739 mask_index = 0;
3740 if (wol & WAKE_PHY) {
3741 temp_pmt_ctl |= PMT_CTL_PHY_WAKE_EN_;
3742
3743 temp_pmt_ctl |= PMT_CTL_WOL_EN_;
3744 temp_pmt_ctl &= ~PMT_CTL_SUS_MODE_MASK_;
3745 temp_pmt_ctl |= PMT_CTL_SUS_MODE_0_;
3746 }
3747 if (wol & WAKE_MAGIC) {
3748 temp_wucsr |= WUCSR_MPEN_;
3749
3750 temp_pmt_ctl |= PMT_CTL_WOL_EN_;
3751 temp_pmt_ctl &= ~PMT_CTL_SUS_MODE_MASK_;
3752 temp_pmt_ctl |= PMT_CTL_SUS_MODE_3_;
3753 }
3754 if (wol & WAKE_BCAST) {
3755 temp_wucsr |= WUCSR_BCST_EN_;
3756
3757 temp_pmt_ctl |= PMT_CTL_WOL_EN_;
3758 temp_pmt_ctl &= ~PMT_CTL_SUS_MODE_MASK_;
3759 temp_pmt_ctl |= PMT_CTL_SUS_MODE_0_;
3760 }
3761 if (wol & WAKE_MCAST) {
3762 temp_wucsr |= WUCSR_WAKE_EN_;
3763
3764 /* set WUF_CFG & WUF_MASK for IPv4 Multicast */
3765 crc = lan78xx_wakeframe_crc16(ipv4_multicast, 3);
3766 ret = lan78xx_write_reg(dev, WUF_CFG(mask_index),
3767 WUF_CFGX_EN_ |
3768 WUF_CFGX_TYPE_MCAST_ |
3769 (0 << WUF_CFGX_OFFSET_SHIFT_) |
3770 (crc & WUF_CFGX_CRC16_MASK_));
3771
3772 ret = lan78xx_write_reg(dev, WUF_MASK0(mask_index), 7);
3773 ret = lan78xx_write_reg(dev, WUF_MASK1(mask_index), 0);
3774 ret = lan78xx_write_reg(dev, WUF_MASK2(mask_index), 0);
3775 ret = lan78xx_write_reg(dev, WUF_MASK3(mask_index), 0);
3776 mask_index++;
3777
3778 /* for IPv6 Multicast */
3779 crc = lan78xx_wakeframe_crc16(ipv6_multicast, 2);
3780 ret = lan78xx_write_reg(dev, WUF_CFG(mask_index),
3781 WUF_CFGX_EN_ |
3782 WUF_CFGX_TYPE_MCAST_ |
3783 (0 << WUF_CFGX_OFFSET_SHIFT_) |
3784 (crc & WUF_CFGX_CRC16_MASK_));
3785
3786 ret = lan78xx_write_reg(dev, WUF_MASK0(mask_index), 3);
3787 ret = lan78xx_write_reg(dev, WUF_MASK1(mask_index), 0);
3788 ret = lan78xx_write_reg(dev, WUF_MASK2(mask_index), 0);
3789 ret = lan78xx_write_reg(dev, WUF_MASK3(mask_index), 0);
3790 mask_index++;
3791
3792 temp_pmt_ctl |= PMT_CTL_WOL_EN_;
3793 temp_pmt_ctl &= ~PMT_CTL_SUS_MODE_MASK_;
3794 temp_pmt_ctl |= PMT_CTL_SUS_MODE_0_;
3795 }
3796 if (wol & WAKE_UCAST) {
3797 temp_wucsr |= WUCSR_PFDA_EN_;
3798
3799 temp_pmt_ctl |= PMT_CTL_WOL_EN_;
3800 temp_pmt_ctl &= ~PMT_CTL_SUS_MODE_MASK_;
3801 temp_pmt_ctl |= PMT_CTL_SUS_MODE_0_;
3802 }
3803 if (wol & WAKE_ARP) {
3804 temp_wucsr |= WUCSR_WAKE_EN_;
3805
3806 /* set WUF_CFG & WUF_MASK
3807 * for packettype (offset 12,13) = ARP (0x0806)
3808 */
3809 crc = lan78xx_wakeframe_crc16(arp_type, 2);
3810 ret = lan78xx_write_reg(dev, WUF_CFG(mask_index),
3811 WUF_CFGX_EN_ |
3812 WUF_CFGX_TYPE_ALL_ |
3813 (0 << WUF_CFGX_OFFSET_SHIFT_) |
3814 (crc & WUF_CFGX_CRC16_MASK_));
3815
3816 ret = lan78xx_write_reg(dev, WUF_MASK0(mask_index), 0x3000);
3817 ret = lan78xx_write_reg(dev, WUF_MASK1(mask_index), 0);
3818 ret = lan78xx_write_reg(dev, WUF_MASK2(mask_index), 0);
3819 ret = lan78xx_write_reg(dev, WUF_MASK3(mask_index), 0);
3820 mask_index++;
3821
3822 temp_pmt_ctl |= PMT_CTL_WOL_EN_;
3823 temp_pmt_ctl &= ~PMT_CTL_SUS_MODE_MASK_;
3824 temp_pmt_ctl |= PMT_CTL_SUS_MODE_0_;
3825 }
3826
3827 ret = lan78xx_write_reg(dev, WUCSR, temp_wucsr);
3828
3829 /* when multiple WOL bits are set */
3830 if (hweight_long((unsigned long)wol) > 1) {
3831 temp_pmt_ctl |= PMT_CTL_WOL_EN_;
3832 temp_pmt_ctl &= ~PMT_CTL_SUS_MODE_MASK_;
3833 temp_pmt_ctl |= PMT_CTL_SUS_MODE_0_;
3834 }
3835 ret = lan78xx_write_reg(dev, PMT_CTL, temp_pmt_ctl);
3836
3837 /* clear WUPS */
3838 ret = lan78xx_read_reg(dev, PMT_CTL, &buf);
3839 buf |= PMT_CTL_WUPS_MASK_;
3840 ret = lan78xx_write_reg(dev, PMT_CTL, buf);
3841
3842 ret = lan78xx_read_reg(dev, MAC_RX, &buf);
3843 buf |= MAC_RX_RXEN_;
3844 ret = lan78xx_write_reg(dev, MAC_RX, buf);
3845
3846 return 0;
3847}
3848
Baoyou Xiee0c79ff2016-09-06 16:19:02 +08003849static int lan78xx_suspend(struct usb_interface *intf, pm_message_t message)
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00003850{
3851 struct lan78xx_net *dev = usb_get_intfdata(intf);
3852 struct lan78xx_priv *pdata = (struct lan78xx_priv *)(dev->data[0]);
3853 u32 buf;
3854 int ret;
3855 int event;
3856
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00003857 event = message.event;
3858
3859 if (!dev->suspend_count++) {
3860 spin_lock_irq(&dev->txq.lock);
3861 /* don't autosuspend while transmitting */
3862 if ((skb_queue_len(&dev->txq) ||
3863 skb_queue_len(&dev->txq_pend)) &&
3864 PMSG_IS_AUTO(message)) {
3865 spin_unlock_irq(&dev->txq.lock);
3866 ret = -EBUSY;
3867 goto out;
3868 } else {
3869 set_bit(EVENT_DEV_ASLEEP, &dev->flags);
3870 spin_unlock_irq(&dev->txq.lock);
3871 }
3872
3873 /* stop TX & RX */
3874 ret = lan78xx_read_reg(dev, MAC_TX, &buf);
3875 buf &= ~MAC_TX_TXEN_;
3876 ret = lan78xx_write_reg(dev, MAC_TX, buf);
3877 ret = lan78xx_read_reg(dev, MAC_RX, &buf);
3878 buf &= ~MAC_RX_RXEN_;
3879 ret = lan78xx_write_reg(dev, MAC_RX, buf);
3880
3881 /* empty out the rx and queues */
3882 netif_device_detach(dev->net);
3883 lan78xx_terminate_urbs(dev);
3884 usb_kill_urb(dev->urb_intr);
3885
3886 /* reattach */
3887 netif_device_attach(dev->net);
3888 }
3889
3890 if (test_bit(EVENT_DEV_ASLEEP, &dev->flags)) {
Woojung Huh20ff5562016-03-16 22:10:40 +00003891 del_timer(&dev->stat_monitor);
3892
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00003893 if (PMSG_IS_AUTO(message)) {
3894 /* auto suspend (selective suspend) */
3895 ret = lan78xx_read_reg(dev, MAC_TX, &buf);
3896 buf &= ~MAC_TX_TXEN_;
3897 ret = lan78xx_write_reg(dev, MAC_TX, buf);
3898 ret = lan78xx_read_reg(dev, MAC_RX, &buf);
3899 buf &= ~MAC_RX_RXEN_;
3900 ret = lan78xx_write_reg(dev, MAC_RX, buf);
3901
3902 ret = lan78xx_write_reg(dev, WUCSR, 0);
3903 ret = lan78xx_write_reg(dev, WUCSR2, 0);
3904 ret = lan78xx_write_reg(dev, WK_SRC, 0xFFF1FF1FUL);
3905
3906 /* set goodframe wakeup */
3907 ret = lan78xx_read_reg(dev, WUCSR, &buf);
3908
3909 buf |= WUCSR_RFE_WAKE_EN_;
3910 buf |= WUCSR_STORE_WAKE_;
3911
3912 ret = lan78xx_write_reg(dev, WUCSR, buf);
3913
3914 ret = lan78xx_read_reg(dev, PMT_CTL, &buf);
3915
3916 buf &= ~PMT_CTL_RES_CLR_WKP_EN_;
3917 buf |= PMT_CTL_RES_CLR_WKP_STS_;
3918
3919 buf |= PMT_CTL_PHY_WAKE_EN_;
3920 buf |= PMT_CTL_WOL_EN_;
3921 buf &= ~PMT_CTL_SUS_MODE_MASK_;
3922 buf |= PMT_CTL_SUS_MODE_3_;
3923
3924 ret = lan78xx_write_reg(dev, PMT_CTL, buf);
3925
3926 ret = lan78xx_read_reg(dev, PMT_CTL, &buf);
3927
3928 buf |= PMT_CTL_WUPS_MASK_;
3929
3930 ret = lan78xx_write_reg(dev, PMT_CTL, buf);
3931
3932 ret = lan78xx_read_reg(dev, MAC_RX, &buf);
3933 buf |= MAC_RX_RXEN_;
3934 ret = lan78xx_write_reg(dev, MAC_RX, buf);
3935 } else {
3936 lan78xx_set_suspend(dev, pdata->wol);
3937 }
3938 }
3939
Woojung.Huh@microchip.com49d28b562015-09-25 21:13:48 +00003940 ret = 0;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00003941out:
3942 return ret;
3943}
3944
Baoyou Xiee0c79ff2016-09-06 16:19:02 +08003945static int lan78xx_resume(struct usb_interface *intf)
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00003946{
3947 struct lan78xx_net *dev = usb_get_intfdata(intf);
3948 struct sk_buff *skb;
3949 struct urb *res;
3950 int ret;
3951 u32 buf;
3952
Woojung Huh20ff5562016-03-16 22:10:40 +00003953 if (!timer_pending(&dev->stat_monitor)) {
3954 dev->delta = 1;
3955 mod_timer(&dev->stat_monitor,
3956 jiffies + STAT_UPDATE_TIMER);
3957 }
3958
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00003959 if (!--dev->suspend_count) {
3960 /* resume interrupt URBs */
3961 if (dev->urb_intr && test_bit(EVENT_DEV_OPEN, &dev->flags))
3962 usb_submit_urb(dev->urb_intr, GFP_NOIO);
3963
3964 spin_lock_irq(&dev->txq.lock);
3965 while ((res = usb_get_from_anchor(&dev->deferred))) {
3966 skb = (struct sk_buff *)res->context;
3967 ret = usb_submit_urb(res, GFP_ATOMIC);
3968 if (ret < 0) {
3969 dev_kfree_skb_any(skb);
3970 usb_free_urb(res);
3971 usb_autopm_put_interface_async(dev->intf);
3972 } else {
Florian Westphal860e9532016-05-03 16:33:13 +02003973 netif_trans_update(dev->net);
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00003974 lan78xx_queue_skb(&dev->txq, skb, tx_start);
3975 }
3976 }
3977
3978 clear_bit(EVENT_DEV_ASLEEP, &dev->flags);
3979 spin_unlock_irq(&dev->txq.lock);
3980
3981 if (test_bit(EVENT_DEV_OPEN, &dev->flags)) {
3982 if (!(skb_queue_len(&dev->txq) >= dev->tx_qlen))
3983 netif_start_queue(dev->net);
3984 tasklet_schedule(&dev->bh);
3985 }
3986 }
3987
3988 ret = lan78xx_write_reg(dev, WUCSR2, 0);
3989 ret = lan78xx_write_reg(dev, WUCSR, 0);
3990 ret = lan78xx_write_reg(dev, WK_SRC, 0xFFF1FF1FUL);
3991
3992 ret = lan78xx_write_reg(dev, WUCSR2, WUCSR2_NS_RCD_ |
3993 WUCSR2_ARP_RCD_ |
3994 WUCSR2_IPV6_TCPSYN_RCD_ |
3995 WUCSR2_IPV4_TCPSYN_RCD_);
3996
3997 ret = lan78xx_write_reg(dev, WUCSR, WUCSR_EEE_TX_WAKE_ |
3998 WUCSR_EEE_RX_WAKE_ |
3999 WUCSR_PFDA_FR_ |
4000 WUCSR_RFE_WAKE_FR_ |
4001 WUCSR_WUFR_ |
4002 WUCSR_MPR_ |
4003 WUCSR_BCST_FR_);
4004
4005 ret = lan78xx_read_reg(dev, MAC_TX, &buf);
4006 buf |= MAC_TX_TXEN_;
4007 ret = lan78xx_write_reg(dev, MAC_TX, buf);
4008
4009 return 0;
4010}
4011
Baoyou Xiee0c79ff2016-09-06 16:19:02 +08004012static int lan78xx_reset_resume(struct usb_interface *intf)
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00004013{
4014 struct lan78xx_net *dev = usb_get_intfdata(intf);
4015
4016 lan78xx_reset(dev);
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00004017
Alexander Graf92571a12018-04-04 00:19:35 +02004018 phy_start(dev->net->phydev);
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00004019
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00004020 return lan78xx_resume(intf);
4021}
4022
4023static const struct usb_device_id products[] = {
4024 {
4025 /* LAN7800 USB Gigabit Ethernet Device */
4026 USB_DEVICE(LAN78XX_USB_VENDOR_ID, LAN7800_USB_PRODUCT_ID),
4027 },
4028 {
4029 /* LAN7850 USB Gigabit Ethernet Device */
4030 USB_DEVICE(LAN78XX_USB_VENDOR_ID, LAN7850_USB_PRODUCT_ID),
4031 },
Woojung Huh02dc1f32016-12-07 20:26:25 +00004032 {
4033 /* LAN7801 USB Gigabit Ethernet Device */
4034 USB_DEVICE(LAN78XX_USB_VENDOR_ID, LAN7801_USB_PRODUCT_ID),
4035 },
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00004036 {},
4037};
4038MODULE_DEVICE_TABLE(usb, products);
4039
4040static struct usb_driver lan78xx_driver = {
4041 .name = DRIVER_NAME,
4042 .id_table = products,
4043 .probe = lan78xx_probe,
4044 .disconnect = lan78xx_disconnect,
4045 .suspend = lan78xx_suspend,
4046 .resume = lan78xx_resume,
4047 .reset_resume = lan78xx_reset_resume,
4048 .supports_autosuspend = 1,
4049 .disable_hub_initiated_lpm = 1,
4050};
4051
4052module_usb_driver(lan78xx_driver);
4053
4054MODULE_AUTHOR(DRIVER_AUTHOR);
4055MODULE_DESCRIPTION(DRIVER_DESC);
4056MODULE_LICENSE("GPL");