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Yuval Mintze712d522015-10-26 11:02:27 +02001/* QLogic qede NIC Driver
2* Copyright (c) 2015 QLogic Corporation
3*
4* This software is available under the terms of the GNU General Public License
5* (GPL) Version 2, available from the file COPYING in the main directory of
6* this source tree.
7*/
8
9#include <linux/module.h>
10#include <linux/pci.h>
11#include <linux/version.h>
12#include <linux/device.h>
13#include <linux/netdevice.h>
14#include <linux/etherdevice.h>
15#include <linux/skbuff.h>
16#include <linux/errno.h>
17#include <linux/list.h>
18#include <linux/string.h>
19#include <linux/dma-mapping.h>
20#include <linux/interrupt.h>
21#include <asm/byteorder.h>
22#include <asm/param.h>
23#include <linux/io.h>
24#include <linux/netdev_features.h>
25#include <linux/udp.h>
26#include <linux/tcp.h>
Manish Choprab18e1702016-04-14 01:38:30 -040027#ifdef CONFIG_QEDE_VXLAN
Yuval Mintze712d522015-10-26 11:02:27 +020028#include <net/vxlan.h>
Manish Choprab18e1702016-04-14 01:38:30 -040029#endif
Manish Chopra9a109dd2016-04-14 01:38:31 -040030#ifdef CONFIG_QEDE_GENEVE
31#include <net/geneve.h>
32#endif
Yuval Mintze712d522015-10-26 11:02:27 +020033#include <linux/ip.h>
34#include <net/ipv6.h>
35#include <net/tcp.h>
36#include <linux/if_ether.h>
37#include <linux/if_vlan.h>
38#include <linux/pkt_sched.h>
39#include <linux/ethtool.h>
40#include <linux/in.h>
41#include <linux/random.h>
42#include <net/ip6_checksum.h>
43#include <linux/bitops.h>
44
45#include "qede.h"
46
Yuval Mintz5abd7e922016-02-24 16:52:50 +020047static char version[] =
48 "QLogic FastLinQ 4xxxx Ethernet Driver qede " DRV_MODULE_VERSION "\n";
Yuval Mintze712d522015-10-26 11:02:27 +020049
Yuval Mintz5abd7e922016-02-24 16:52:50 +020050MODULE_DESCRIPTION("QLogic FastLinQ 4xxxx Ethernet Driver");
Yuval Mintze712d522015-10-26 11:02:27 +020051MODULE_LICENSE("GPL");
52MODULE_VERSION(DRV_MODULE_VERSION);
53
54static uint debug;
55module_param(debug, uint, 0);
56MODULE_PARM_DESC(debug, " Default debug msglevel");
57
58static const struct qed_eth_ops *qed_ops;
59
60#define CHIP_NUM_57980S_40 0x1634
Yuval Mintz0e7441d2016-02-24 16:52:45 +020061#define CHIP_NUM_57980S_10 0x1666
Yuval Mintze712d522015-10-26 11:02:27 +020062#define CHIP_NUM_57980S_MF 0x1636
63#define CHIP_NUM_57980S_100 0x1644
64#define CHIP_NUM_57980S_50 0x1654
65#define CHIP_NUM_57980S_25 0x1656
Yuval Mintzfefb0202016-05-11 16:36:19 +030066#define CHIP_NUM_57980S_IOV 0x1664
Yuval Mintze712d522015-10-26 11:02:27 +020067
68#ifndef PCI_DEVICE_ID_NX2_57980E
69#define PCI_DEVICE_ID_57980S_40 CHIP_NUM_57980S_40
70#define PCI_DEVICE_ID_57980S_10 CHIP_NUM_57980S_10
71#define PCI_DEVICE_ID_57980S_MF CHIP_NUM_57980S_MF
72#define PCI_DEVICE_ID_57980S_100 CHIP_NUM_57980S_100
73#define PCI_DEVICE_ID_57980S_50 CHIP_NUM_57980S_50
74#define PCI_DEVICE_ID_57980S_25 CHIP_NUM_57980S_25
Yuval Mintzfefb0202016-05-11 16:36:19 +030075#define PCI_DEVICE_ID_57980S_IOV CHIP_NUM_57980S_IOV
Yuval Mintze712d522015-10-26 11:02:27 +020076#endif
77
Yuval Mintzfefb0202016-05-11 16:36:19 +030078enum qede_pci_private {
79 QEDE_PRIVATE_PF,
80 QEDE_PRIVATE_VF
81};
82
Yuval Mintze712d522015-10-26 11:02:27 +020083static const struct pci_device_id qede_pci_tbl[] = {
Yuval Mintzfefb0202016-05-11 16:36:19 +030084 {PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_40), QEDE_PRIVATE_PF},
85 {PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_10), QEDE_PRIVATE_PF},
86 {PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_MF), QEDE_PRIVATE_PF},
87 {PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_100), QEDE_PRIVATE_PF},
88 {PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_50), QEDE_PRIVATE_PF},
89 {PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_25), QEDE_PRIVATE_PF},
90 {PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_IOV), QEDE_PRIVATE_VF},
Yuval Mintze712d522015-10-26 11:02:27 +020091 { 0 }
92};
93
94MODULE_DEVICE_TABLE(pci, qede_pci_tbl);
95
96static int qede_probe(struct pci_dev *pdev, const struct pci_device_id *id);
97
98#define TX_TIMEOUT (5 * HZ)
99
100static void qede_remove(struct pci_dev *pdev);
Yuval Mintz29502192015-10-26 11:02:29 +0200101static int qede_alloc_rx_buffer(struct qede_dev *edev,
102 struct qede_rx_queue *rxq);
Sudarsana Kallurua2ec6172015-10-26 11:02:32 +0200103static void qede_link_update(void *dev, struct qed_link_output *link);
Yuval Mintze712d522015-10-26 11:02:27 +0200104
Yuval Mintzfefb0202016-05-11 16:36:19 +0300105#ifdef CONFIG_QED_SRIOV
106static int qede_sriov_configure(struct pci_dev *pdev, int num_vfs_param)
107{
108 struct qede_dev *edev = netdev_priv(pci_get_drvdata(pdev));
109
110 DP_VERBOSE(edev, QED_MSG_IOV, "Requested %d VFs\n", num_vfs_param);
111
112 return edev->ops->iov->configure(edev->cdev, num_vfs_param);
113}
114#endif
115
Yuval Mintze712d522015-10-26 11:02:27 +0200116static struct pci_driver qede_pci_driver = {
117 .name = "qede",
118 .id_table = qede_pci_tbl,
119 .probe = qede_probe,
120 .remove = qede_remove,
Yuval Mintzfefb0202016-05-11 16:36:19 +0300121#ifdef CONFIG_QED_SRIOV
122 .sriov_configure = qede_sriov_configure,
123#endif
Yuval Mintze712d522015-10-26 11:02:27 +0200124};
125
Sudarsana Kallurua2ec6172015-10-26 11:02:32 +0200126static struct qed_eth_cb_ops qede_ll_ops = {
127 {
128 .link_update = qede_link_update,
129 },
130};
131
Yuval Mintz29502192015-10-26 11:02:29 +0200132static int qede_netdev_event(struct notifier_block *this, unsigned long event,
133 void *ptr)
134{
135 struct net_device *ndev = netdev_notifier_info_to_dev(ptr);
136 struct ethtool_drvinfo drvinfo;
137 struct qede_dev *edev;
138
139 /* Currently only support name change */
140 if (event != NETDEV_CHANGENAME)
141 goto done;
142
143 /* Check whether this is a qede device */
144 if (!ndev || !ndev->ethtool_ops || !ndev->ethtool_ops->get_drvinfo)
145 goto done;
146
147 memset(&drvinfo, 0, sizeof(drvinfo));
148 ndev->ethtool_ops->get_drvinfo(ndev, &drvinfo);
149 if (strcmp(drvinfo.driver, "qede"))
150 goto done;
151 edev = netdev_priv(ndev);
152
153 /* Notify qed of the name change */
154 if (!edev->ops || !edev->ops->common)
155 goto done;
156 edev->ops->common->set_id(edev->cdev, edev->ndev->name,
157 "qede");
158
159done:
160 return NOTIFY_DONE;
161}
162
163static struct notifier_block qede_netdev_notifier = {
164 .notifier_call = qede_netdev_event,
165};
166
Yuval Mintze712d522015-10-26 11:02:27 +0200167static
168int __init qede_init(void)
169{
170 int ret;
Yuval Mintze712d522015-10-26 11:02:27 +0200171
172 pr_notice("qede_init: %s\n", version);
173
Rahul Verma95114342016-04-10 12:42:59 +0300174 qed_ops = qed_get_eth_ops();
Yuval Mintze712d522015-10-26 11:02:27 +0200175 if (!qed_ops) {
176 pr_notice("Failed to get qed ethtool operations\n");
177 return -EINVAL;
178 }
179
Yuval Mintz29502192015-10-26 11:02:29 +0200180 /* Must register notifier before pci ops, since we might miss
181 * interface rename after pci probe and netdev registeration.
182 */
183 ret = register_netdevice_notifier(&qede_netdev_notifier);
184 if (ret) {
185 pr_notice("Failed to register netdevice_notifier\n");
186 qed_put_eth_ops();
187 return -EINVAL;
188 }
189
Yuval Mintze712d522015-10-26 11:02:27 +0200190 ret = pci_register_driver(&qede_pci_driver);
191 if (ret) {
192 pr_notice("Failed to register driver\n");
Yuval Mintz29502192015-10-26 11:02:29 +0200193 unregister_netdevice_notifier(&qede_netdev_notifier);
Yuval Mintze712d522015-10-26 11:02:27 +0200194 qed_put_eth_ops();
195 return -EINVAL;
196 }
197
198 return 0;
199}
200
201static void __exit qede_cleanup(void)
202{
203 pr_notice("qede_cleanup called\n");
204
Yuval Mintz29502192015-10-26 11:02:29 +0200205 unregister_netdevice_notifier(&qede_netdev_notifier);
Yuval Mintze712d522015-10-26 11:02:27 +0200206 pci_unregister_driver(&qede_pci_driver);
207 qed_put_eth_ops();
208}
209
210module_init(qede_init);
211module_exit(qede_cleanup);
212
213/* -------------------------------------------------------------------------
Yuval Mintz29502192015-10-26 11:02:29 +0200214 * START OF FAST-PATH
215 * -------------------------------------------------------------------------
216 */
217
218/* Unmap the data and free skb */
219static int qede_free_tx_pkt(struct qede_dev *edev,
220 struct qede_tx_queue *txq,
221 int *len)
222{
223 u16 idx = txq->sw_tx_cons & NUM_TX_BDS_MAX;
224 struct sk_buff *skb = txq->sw_tx_ring[idx].skb;
225 struct eth_tx_1st_bd *first_bd;
226 struct eth_tx_bd *tx_data_bd;
227 int bds_consumed = 0;
228 int nbds;
229 bool data_split = txq->sw_tx_ring[idx].flags & QEDE_TSO_SPLIT_BD;
230 int i, split_bd_len = 0;
231
232 if (unlikely(!skb)) {
233 DP_ERR(edev,
234 "skb is null for txq idx=%d txq->sw_tx_cons=%d txq->sw_tx_prod=%d\n",
235 idx, txq->sw_tx_cons, txq->sw_tx_prod);
236 return -1;
237 }
238
239 *len = skb->len;
240
241 first_bd = (struct eth_tx_1st_bd *)qed_chain_consume(&txq->tx_pbl);
242
243 bds_consumed++;
244
245 nbds = first_bd->data.nbds;
246
247 if (data_split) {
248 struct eth_tx_bd *split = (struct eth_tx_bd *)
249 qed_chain_consume(&txq->tx_pbl);
250 split_bd_len = BD_UNMAP_LEN(split);
251 bds_consumed++;
252 }
253 dma_unmap_page(&edev->pdev->dev, BD_UNMAP_ADDR(first_bd),
254 BD_UNMAP_LEN(first_bd) + split_bd_len, DMA_TO_DEVICE);
255
256 /* Unmap the data of the skb frags */
257 for (i = 0; i < skb_shinfo(skb)->nr_frags; i++, bds_consumed++) {
258 tx_data_bd = (struct eth_tx_bd *)
259 qed_chain_consume(&txq->tx_pbl);
260 dma_unmap_page(&edev->pdev->dev, BD_UNMAP_ADDR(tx_data_bd),
261 BD_UNMAP_LEN(tx_data_bd), DMA_TO_DEVICE);
262 }
263
264 while (bds_consumed++ < nbds)
265 qed_chain_consume(&txq->tx_pbl);
266
267 /* Free skb */
268 dev_kfree_skb_any(skb);
269 txq->sw_tx_ring[idx].skb = NULL;
270 txq->sw_tx_ring[idx].flags = 0;
271
272 return 0;
273}
274
275/* Unmap the data and free skb when mapping failed during start_xmit */
276static void qede_free_failed_tx_pkt(struct qede_dev *edev,
277 struct qede_tx_queue *txq,
278 struct eth_tx_1st_bd *first_bd,
279 int nbd,
280 bool data_split)
281{
282 u16 idx = txq->sw_tx_prod & NUM_TX_BDS_MAX;
283 struct sk_buff *skb = txq->sw_tx_ring[idx].skb;
284 struct eth_tx_bd *tx_data_bd;
285 int i, split_bd_len = 0;
286
287 /* Return prod to its position before this skb was handled */
288 qed_chain_set_prod(&txq->tx_pbl,
289 le16_to_cpu(txq->tx_db.data.bd_prod),
290 first_bd);
291
292 first_bd = (struct eth_tx_1st_bd *)qed_chain_produce(&txq->tx_pbl);
293
294 if (data_split) {
295 struct eth_tx_bd *split = (struct eth_tx_bd *)
296 qed_chain_produce(&txq->tx_pbl);
297 split_bd_len = BD_UNMAP_LEN(split);
298 nbd--;
299 }
300
301 dma_unmap_page(&edev->pdev->dev, BD_UNMAP_ADDR(first_bd),
302 BD_UNMAP_LEN(first_bd) + split_bd_len, DMA_TO_DEVICE);
303
304 /* Unmap the data of the skb frags */
305 for (i = 0; i < nbd; i++) {
306 tx_data_bd = (struct eth_tx_bd *)
307 qed_chain_produce(&txq->tx_pbl);
308 if (tx_data_bd->nbytes)
309 dma_unmap_page(&edev->pdev->dev,
310 BD_UNMAP_ADDR(tx_data_bd),
311 BD_UNMAP_LEN(tx_data_bd), DMA_TO_DEVICE);
312 }
313
314 /* Return again prod to its position before this skb was handled */
315 qed_chain_set_prod(&txq->tx_pbl,
316 le16_to_cpu(txq->tx_db.data.bd_prod),
317 first_bd);
318
319 /* Free skb */
320 dev_kfree_skb_any(skb);
321 txq->sw_tx_ring[idx].skb = NULL;
322 txq->sw_tx_ring[idx].flags = 0;
323}
324
325static u32 qede_xmit_type(struct qede_dev *edev,
326 struct sk_buff *skb,
327 int *ipv6_ext)
328{
329 u32 rc = XMIT_L4_CSUM;
330 __be16 l3_proto;
331
332 if (skb->ip_summed != CHECKSUM_PARTIAL)
333 return XMIT_PLAIN;
334
335 l3_proto = vlan_get_protocol(skb);
336 if (l3_proto == htons(ETH_P_IPV6) &&
337 (ipv6_hdr(skb)->nexthdr == NEXTHDR_IPV6))
338 *ipv6_ext = 1;
339
Manish Chopra14db81d2016-04-14 01:38:33 -0400340 if (skb->encapsulation)
341 rc |= XMIT_ENC;
342
Yuval Mintz29502192015-10-26 11:02:29 +0200343 if (skb_is_gso(skb))
344 rc |= XMIT_LSO;
345
346 return rc;
347}
348
349static void qede_set_params_for_ipv6_ext(struct sk_buff *skb,
350 struct eth_tx_2nd_bd *second_bd,
351 struct eth_tx_3rd_bd *third_bd)
352{
353 u8 l4_proto;
Yuval Mintzfc48b7a2016-02-15 13:22:35 -0500354 u16 bd2_bits1 = 0, bd2_bits2 = 0;
Yuval Mintz29502192015-10-26 11:02:29 +0200355
Yuval Mintzfc48b7a2016-02-15 13:22:35 -0500356 bd2_bits1 |= (1 << ETH_TX_DATA_2ND_BD_IPV6_EXT_SHIFT);
Yuval Mintz29502192015-10-26 11:02:29 +0200357
Yuval Mintzfc48b7a2016-02-15 13:22:35 -0500358 bd2_bits2 |= ((((u8 *)skb_transport_header(skb) - skb->data) >> 1) &
Yuval Mintz29502192015-10-26 11:02:29 +0200359 ETH_TX_DATA_2ND_BD_L4_HDR_START_OFFSET_W_MASK)
360 << ETH_TX_DATA_2ND_BD_L4_HDR_START_OFFSET_W_SHIFT;
361
Yuval Mintzfc48b7a2016-02-15 13:22:35 -0500362 bd2_bits1 |= (ETH_L4_PSEUDO_CSUM_CORRECT_LENGTH <<
Yuval Mintz29502192015-10-26 11:02:29 +0200363 ETH_TX_DATA_2ND_BD_L4_PSEUDO_CSUM_MODE_SHIFT);
364
365 if (vlan_get_protocol(skb) == htons(ETH_P_IPV6))
366 l4_proto = ipv6_hdr(skb)->nexthdr;
367 else
368 l4_proto = ip_hdr(skb)->protocol;
369
370 if (l4_proto == IPPROTO_UDP)
Yuval Mintzfc48b7a2016-02-15 13:22:35 -0500371 bd2_bits1 |= 1 << ETH_TX_DATA_2ND_BD_L4_UDP_SHIFT;
Yuval Mintz29502192015-10-26 11:02:29 +0200372
Yuval Mintzfc48b7a2016-02-15 13:22:35 -0500373 if (third_bd)
Yuval Mintz29502192015-10-26 11:02:29 +0200374 third_bd->data.bitfields |=
Yuval Mintzfc48b7a2016-02-15 13:22:35 -0500375 cpu_to_le16(((tcp_hdrlen(skb) / 4) &
376 ETH_TX_DATA_3RD_BD_TCP_HDR_LEN_DW_MASK) <<
377 ETH_TX_DATA_3RD_BD_TCP_HDR_LEN_DW_SHIFT);
Yuval Mintz29502192015-10-26 11:02:29 +0200378
Yuval Mintzfc48b7a2016-02-15 13:22:35 -0500379 second_bd->data.bitfields1 = cpu_to_le16(bd2_bits1);
Yuval Mintz29502192015-10-26 11:02:29 +0200380 second_bd->data.bitfields2 = cpu_to_le16(bd2_bits2);
381}
382
383static int map_frag_to_bd(struct qede_dev *edev,
384 skb_frag_t *frag,
385 struct eth_tx_bd *bd)
386{
387 dma_addr_t mapping;
388
389 /* Map skb non-linear frag data for DMA */
390 mapping = skb_frag_dma_map(&edev->pdev->dev, frag, 0,
391 skb_frag_size(frag),
392 DMA_TO_DEVICE);
393 if (unlikely(dma_mapping_error(&edev->pdev->dev, mapping))) {
394 DP_NOTICE(edev, "Unable to map frag - dropping packet\n");
395 return -ENOMEM;
396 }
397
398 /* Setup the data pointer of the frag data */
399 BD_SET_UNMAP_ADDR_LEN(bd, mapping, skb_frag_size(frag));
400
401 return 0;
402}
403
Manish Chopra14db81d2016-04-14 01:38:33 -0400404static u16 qede_get_skb_hlen(struct sk_buff *skb, bool is_encap_pkt)
405{
406 if (is_encap_pkt)
407 return (skb_inner_transport_header(skb) +
408 inner_tcp_hdrlen(skb) - skb->data);
409 else
410 return (skb_transport_header(skb) +
411 tcp_hdrlen(skb) - skb->data);
412}
413
Yuval Mintzb1199b12016-02-24 16:52:46 +0200414/* +2 for 1st BD for headers and 2nd BD for headlen (if required) */
415#if ((MAX_SKB_FRAGS + 2) > ETH_TX_MAX_BDS_PER_NON_LSO_PACKET)
416static bool qede_pkt_req_lin(struct qede_dev *edev, struct sk_buff *skb,
417 u8 xmit_type)
418{
419 int allowed_frags = ETH_TX_MAX_BDS_PER_NON_LSO_PACKET - 1;
420
421 if (xmit_type & XMIT_LSO) {
422 int hlen;
423
Manish Chopra14db81d2016-04-14 01:38:33 -0400424 hlen = qede_get_skb_hlen(skb, xmit_type & XMIT_ENC);
Yuval Mintzb1199b12016-02-24 16:52:46 +0200425
426 /* linear payload would require its own BD */
427 if (skb_headlen(skb) > hlen)
428 allowed_frags--;
429 }
430
431 return (skb_shinfo(skb)->nr_frags > allowed_frags);
432}
433#endif
434
Yuval Mintz29502192015-10-26 11:02:29 +0200435/* Main transmit function */
436static
437netdev_tx_t qede_start_xmit(struct sk_buff *skb,
438 struct net_device *ndev)
439{
440 struct qede_dev *edev = netdev_priv(ndev);
441 struct netdev_queue *netdev_txq;
442 struct qede_tx_queue *txq;
443 struct eth_tx_1st_bd *first_bd;
444 struct eth_tx_2nd_bd *second_bd = NULL;
445 struct eth_tx_3rd_bd *third_bd = NULL;
446 struct eth_tx_bd *tx_data_bd = NULL;
447 u16 txq_index;
448 u8 nbd = 0;
449 dma_addr_t mapping;
450 int rc, frag_idx = 0, ipv6_ext = 0;
451 u8 xmit_type;
452 u16 idx;
453 u16 hlen;
Dan Carpenter810810f2016-05-05 16:21:30 +0300454 bool data_split = false;
Yuval Mintz29502192015-10-26 11:02:29 +0200455
456 /* Get tx-queue context and netdev index */
457 txq_index = skb_get_queue_mapping(skb);
458 WARN_ON(txq_index >= QEDE_TSS_CNT(edev));
459 txq = QEDE_TX_QUEUE(edev, txq_index);
460 netdev_txq = netdev_get_tx_queue(ndev, txq_index);
461
Yuval Mintz29502192015-10-26 11:02:29 +0200462 WARN_ON(qed_chain_get_elem_left(&txq->tx_pbl) <
463 (MAX_SKB_FRAGS + 1));
464
465 xmit_type = qede_xmit_type(edev, skb, &ipv6_ext);
466
Yuval Mintzb1199b12016-02-24 16:52:46 +0200467#if ((MAX_SKB_FRAGS + 2) > ETH_TX_MAX_BDS_PER_NON_LSO_PACKET)
468 if (qede_pkt_req_lin(edev, skb, xmit_type)) {
469 if (skb_linearize(skb)) {
470 DP_NOTICE(edev,
471 "SKB linearization failed - silently dropping this SKB\n");
472 dev_kfree_skb_any(skb);
473 return NETDEV_TX_OK;
474 }
475 }
476#endif
477
Yuval Mintz29502192015-10-26 11:02:29 +0200478 /* Fill the entry in the SW ring and the BDs in the FW ring */
479 idx = txq->sw_tx_prod & NUM_TX_BDS_MAX;
480 txq->sw_tx_ring[idx].skb = skb;
481 first_bd = (struct eth_tx_1st_bd *)
482 qed_chain_produce(&txq->tx_pbl);
483 memset(first_bd, 0, sizeof(*first_bd));
484 first_bd->data.bd_flags.bitfields =
485 1 << ETH_TX_1ST_BD_FLAGS_START_BD_SHIFT;
486
487 /* Map skb linear data for DMA and set in the first BD */
488 mapping = dma_map_single(&edev->pdev->dev, skb->data,
489 skb_headlen(skb), DMA_TO_DEVICE);
490 if (unlikely(dma_mapping_error(&edev->pdev->dev, mapping))) {
491 DP_NOTICE(edev, "SKB mapping failed\n");
492 qede_free_failed_tx_pkt(edev, txq, first_bd, 0, false);
493 return NETDEV_TX_OK;
494 }
495 nbd++;
496 BD_SET_UNMAP_ADDR_LEN(first_bd, mapping, skb_headlen(skb));
497
498 /* In case there is IPv6 with extension headers or LSO we need 2nd and
499 * 3rd BDs.
500 */
501 if (unlikely((xmit_type & XMIT_LSO) | ipv6_ext)) {
502 second_bd = (struct eth_tx_2nd_bd *)
503 qed_chain_produce(&txq->tx_pbl);
504 memset(second_bd, 0, sizeof(*second_bd));
505
506 nbd++;
507 third_bd = (struct eth_tx_3rd_bd *)
508 qed_chain_produce(&txq->tx_pbl);
509 memset(third_bd, 0, sizeof(*third_bd));
510
511 nbd++;
512 /* We need to fill in additional data in second_bd... */
513 tx_data_bd = (struct eth_tx_bd *)second_bd;
514 }
515
516 if (skb_vlan_tag_present(skb)) {
517 first_bd->data.vlan = cpu_to_le16(skb_vlan_tag_get(skb));
518 first_bd->data.bd_flags.bitfields |=
519 1 << ETH_TX_1ST_BD_FLAGS_VLAN_INSERTION_SHIFT;
520 }
521
522 /* Fill the parsing flags & params according to the requested offload */
523 if (xmit_type & XMIT_L4_CSUM) {
Yuval Mintzfc48b7a2016-02-15 13:22:35 -0500524 u16 temp = 1 << ETH_TX_DATA_1ST_BD_TUNN_CFG_OVERRIDE_SHIFT;
525
Yuval Mintz29502192015-10-26 11:02:29 +0200526 /* We don't re-calculate IP checksum as it is already done by
527 * the upper stack
528 */
529 first_bd->data.bd_flags.bitfields |=
530 1 << ETH_TX_1ST_BD_FLAGS_L4_CSUM_SHIFT;
531
Manish Chopra14db81d2016-04-14 01:38:33 -0400532 if (xmit_type & XMIT_ENC) {
533 first_bd->data.bd_flags.bitfields |=
534 1 << ETH_TX_1ST_BD_FLAGS_IP_CSUM_SHIFT;
535 } else {
536 /* In cases when OS doesn't indicate for inner offloads
537 * when packet is tunnelled, we need to override the HW
538 * tunnel configuration so that packets are treated as
539 * regular non tunnelled packets and no inner offloads
540 * are done by the hardware.
541 */
542 first_bd->data.bitfields |= cpu_to_le16(temp);
543 }
Yuval Mintzfc48b7a2016-02-15 13:22:35 -0500544
Yuval Mintz29502192015-10-26 11:02:29 +0200545 /* If the packet is IPv6 with extension header, indicate that
546 * to FW and pass few params, since the device cracker doesn't
547 * support parsing IPv6 with extension header/s.
548 */
549 if (unlikely(ipv6_ext))
550 qede_set_params_for_ipv6_ext(skb, second_bd, third_bd);
551 }
552
553 if (xmit_type & XMIT_LSO) {
554 first_bd->data.bd_flags.bitfields |=
555 (1 << ETH_TX_1ST_BD_FLAGS_LSO_SHIFT);
556 third_bd->data.lso_mss =
557 cpu_to_le16(skb_shinfo(skb)->gso_size);
558
Manish Chopra14db81d2016-04-14 01:38:33 -0400559 if (unlikely(xmit_type & XMIT_ENC)) {
560 first_bd->data.bd_flags.bitfields |=
561 1 << ETH_TX_1ST_BD_FLAGS_TUNN_IP_CSUM_SHIFT;
562 hlen = qede_get_skb_hlen(skb, true);
563 } else {
564 first_bd->data.bd_flags.bitfields |=
565 1 << ETH_TX_1ST_BD_FLAGS_IP_CSUM_SHIFT;
566 hlen = qede_get_skb_hlen(skb, false);
567 }
Yuval Mintz29502192015-10-26 11:02:29 +0200568
569 /* @@@TBD - if will not be removed need to check */
570 third_bd->data.bitfields |=
Yuval Mintzfc48b7a2016-02-15 13:22:35 -0500571 cpu_to_le16((1 << ETH_TX_DATA_3RD_BD_HDR_NBD_SHIFT));
Yuval Mintz29502192015-10-26 11:02:29 +0200572
573 /* Make life easier for FW guys who can't deal with header and
574 * data on same BD. If we need to split, use the second bd...
575 */
576 if (unlikely(skb_headlen(skb) > hlen)) {
577 DP_VERBOSE(edev, NETIF_MSG_TX_QUEUED,
578 "TSO split header size is %d (%x:%x)\n",
579 first_bd->nbytes, first_bd->addr.hi,
580 first_bd->addr.lo);
581
582 mapping = HILO_U64(le32_to_cpu(first_bd->addr.hi),
583 le32_to_cpu(first_bd->addr.lo)) +
584 hlen;
585
586 BD_SET_UNMAP_ADDR_LEN(tx_data_bd, mapping,
587 le16_to_cpu(first_bd->nbytes) -
588 hlen);
589
590 /* this marks the BD as one that has no
591 * individual mapping
592 */
593 txq->sw_tx_ring[idx].flags |= QEDE_TSO_SPLIT_BD;
594
595 first_bd->nbytes = cpu_to_le16(hlen);
596
597 tx_data_bd = (struct eth_tx_bd *)third_bd;
598 data_split = true;
599 }
600 }
601
602 /* Handle fragmented skb */
603 /* special handle for frags inside 2nd and 3rd bds.. */
604 while (tx_data_bd && frag_idx < skb_shinfo(skb)->nr_frags) {
605 rc = map_frag_to_bd(edev,
606 &skb_shinfo(skb)->frags[frag_idx],
607 tx_data_bd);
608 if (rc) {
609 qede_free_failed_tx_pkt(edev, txq, first_bd, nbd,
610 data_split);
611 return NETDEV_TX_OK;
612 }
613
614 if (tx_data_bd == (struct eth_tx_bd *)second_bd)
615 tx_data_bd = (struct eth_tx_bd *)third_bd;
616 else
617 tx_data_bd = NULL;
618
619 frag_idx++;
620 }
621
622 /* map last frags into 4th, 5th .... */
623 for (; frag_idx < skb_shinfo(skb)->nr_frags; frag_idx++, nbd++) {
624 tx_data_bd = (struct eth_tx_bd *)
625 qed_chain_produce(&txq->tx_pbl);
626
627 memset(tx_data_bd, 0, sizeof(*tx_data_bd));
628
629 rc = map_frag_to_bd(edev,
630 &skb_shinfo(skb)->frags[frag_idx],
631 tx_data_bd);
632 if (rc) {
633 qede_free_failed_tx_pkt(edev, txq, first_bd, nbd,
634 data_split);
635 return NETDEV_TX_OK;
636 }
637 }
638
639 /* update the first BD with the actual num BDs */
640 first_bd->data.nbds = nbd;
641
642 netdev_tx_sent_queue(netdev_txq, skb->len);
643
644 skb_tx_timestamp(skb);
645
646 /* Advance packet producer only before sending the packet since mapping
647 * of pages may fail.
648 */
649 txq->sw_tx_prod++;
650
651 /* 'next page' entries are counted in the producer value */
652 txq->tx_db.data.bd_prod =
653 cpu_to_le16(qed_chain_get_prod_idx(&txq->tx_pbl));
654
655 /* wmb makes sure that the BDs data is updated before updating the
656 * producer, otherwise FW may read old data from the BDs.
657 */
658 wmb();
659 barrier();
660 writel(txq->tx_db.raw, txq->doorbell_addr);
661
662 /* mmiowb is needed to synchronize doorbell writes from more than one
663 * processor. It guarantees that the write arrives to the device before
664 * the queue lock is released and another start_xmit is called (possibly
665 * on another CPU). Without this barrier, the next doorbell can bypass
666 * this doorbell. This is applicable to IA64/Altix systems.
667 */
668 mmiowb();
669
670 if (unlikely(qed_chain_get_elem_left(&txq->tx_pbl)
671 < (MAX_SKB_FRAGS + 1))) {
672 netif_tx_stop_queue(netdev_txq);
673 DP_VERBOSE(edev, NETIF_MSG_TX_QUEUED,
674 "Stop queue was called\n");
675 /* paired memory barrier is in qede_tx_int(), we have to keep
676 * ordering of set_bit() in netif_tx_stop_queue() and read of
677 * fp->bd_tx_cons
678 */
679 smp_mb();
680
681 if (qed_chain_get_elem_left(&txq->tx_pbl)
682 >= (MAX_SKB_FRAGS + 1) &&
683 (edev->state == QEDE_STATE_OPEN)) {
684 netif_tx_wake_queue(netdev_txq);
685 DP_VERBOSE(edev, NETIF_MSG_TX_QUEUED,
686 "Wake queue was called\n");
687 }
688 }
689
690 return NETDEV_TX_OK;
691}
692
Sudarsana Reddy Kalluru16f46bf2016-04-28 20:20:54 -0400693int qede_txq_has_work(struct qede_tx_queue *txq)
Yuval Mintz29502192015-10-26 11:02:29 +0200694{
695 u16 hw_bd_cons;
696
697 /* Tell compiler that consumer and producer can change */
698 barrier();
699 hw_bd_cons = le16_to_cpu(*txq->hw_cons_ptr);
700 if (qed_chain_get_cons_idx(&txq->tx_pbl) == hw_bd_cons + 1)
701 return 0;
702
703 return hw_bd_cons != qed_chain_get_cons_idx(&txq->tx_pbl);
704}
705
706static int qede_tx_int(struct qede_dev *edev,
707 struct qede_tx_queue *txq)
708{
709 struct netdev_queue *netdev_txq;
710 u16 hw_bd_cons;
711 unsigned int pkts_compl = 0, bytes_compl = 0;
712 int rc;
713
714 netdev_txq = netdev_get_tx_queue(edev->ndev, txq->index);
715
716 hw_bd_cons = le16_to_cpu(*txq->hw_cons_ptr);
717 barrier();
718
719 while (hw_bd_cons != qed_chain_get_cons_idx(&txq->tx_pbl)) {
720 int len = 0;
721
722 rc = qede_free_tx_pkt(edev, txq, &len);
723 if (rc) {
724 DP_NOTICE(edev, "hw_bd_cons = %d, chain_cons=%d\n",
725 hw_bd_cons,
726 qed_chain_get_cons_idx(&txq->tx_pbl));
727 break;
728 }
729
730 bytes_compl += len;
731 pkts_compl++;
732 txq->sw_tx_cons++;
733 }
734
735 netdev_tx_completed_queue(netdev_txq, pkts_compl, bytes_compl);
736
737 /* Need to make the tx_bd_cons update visible to start_xmit()
738 * before checking for netif_tx_queue_stopped(). Without the
739 * memory barrier, there is a small possibility that
740 * start_xmit() will miss it and cause the queue to be stopped
741 * forever.
742 * On the other hand we need an rmb() here to ensure the proper
743 * ordering of bit testing in the following
744 * netif_tx_queue_stopped(txq) call.
745 */
746 smp_mb();
747
748 if (unlikely(netif_tx_queue_stopped(netdev_txq))) {
749 /* Taking tx_lock is needed to prevent reenabling the queue
750 * while it's empty. This could have happen if rx_action() gets
751 * suspended in qede_tx_int() after the condition before
752 * netif_tx_wake_queue(), while tx_action (qede_start_xmit()):
753 *
754 * stops the queue->sees fresh tx_bd_cons->releases the queue->
755 * sends some packets consuming the whole queue again->
756 * stops the queue
757 */
758
759 __netif_tx_lock(netdev_txq, smp_processor_id());
760
761 if ((netif_tx_queue_stopped(netdev_txq)) &&
762 (edev->state == QEDE_STATE_OPEN) &&
763 (qed_chain_get_elem_left(&txq->tx_pbl)
764 >= (MAX_SKB_FRAGS + 1))) {
765 netif_tx_wake_queue(netdev_txq);
766 DP_VERBOSE(edev, NETIF_MSG_TX_DONE,
767 "Wake queue was called\n");
768 }
769
770 __netif_tx_unlock(netdev_txq);
771 }
772
773 return 0;
774}
775
Sudarsana Reddy Kalluru16f46bf2016-04-28 20:20:54 -0400776bool qede_has_rx_work(struct qede_rx_queue *rxq)
Yuval Mintz29502192015-10-26 11:02:29 +0200777{
778 u16 hw_comp_cons, sw_comp_cons;
779
780 /* Tell compiler that status block fields can change */
781 barrier();
782
783 hw_comp_cons = le16_to_cpu(*rxq->hw_cons_ptr);
784 sw_comp_cons = qed_chain_get_cons_idx(&rxq->rx_comp_ring);
785
786 return hw_comp_cons != sw_comp_cons;
787}
788
789static bool qede_has_tx_work(struct qede_fastpath *fp)
790{
791 u8 tc;
792
793 for (tc = 0; tc < fp->edev->num_tc; tc++)
794 if (qede_txq_has_work(&fp->txqs[tc]))
795 return true;
796 return false;
797}
798
Manish Chopraf86af2d2016-04-20 03:03:27 -0400799static inline void qede_rx_bd_ring_consume(struct qede_rx_queue *rxq)
800{
801 qed_chain_consume(&rxq->rx_bd_ring);
802 rxq->sw_rx_cons++;
803}
804
Yuval Mintzfc48b7a2016-02-15 13:22:35 -0500805/* This function reuses the buffer(from an offset) from
806 * consumer index to producer index in the bd ring
Yuval Mintz29502192015-10-26 11:02:29 +0200807 */
Yuval Mintzfc48b7a2016-02-15 13:22:35 -0500808static inline void qede_reuse_page(struct qede_dev *edev,
809 struct qede_rx_queue *rxq,
810 struct sw_rx_data *curr_cons)
Yuval Mintz29502192015-10-26 11:02:29 +0200811{
Yuval Mintz29502192015-10-26 11:02:29 +0200812 struct eth_rx_bd *rx_bd_prod = qed_chain_produce(&rxq->rx_bd_ring);
Yuval Mintzfc48b7a2016-02-15 13:22:35 -0500813 struct sw_rx_data *curr_prod;
814 dma_addr_t new_mapping;
Yuval Mintz29502192015-10-26 11:02:29 +0200815
Yuval Mintzfc48b7a2016-02-15 13:22:35 -0500816 curr_prod = &rxq->sw_rx_ring[rxq->sw_rx_prod & NUM_RX_BDS_MAX];
817 *curr_prod = *curr_cons;
Yuval Mintz29502192015-10-26 11:02:29 +0200818
Yuval Mintzfc48b7a2016-02-15 13:22:35 -0500819 new_mapping = curr_prod->mapping + curr_prod->page_offset;
Yuval Mintz29502192015-10-26 11:02:29 +0200820
Yuval Mintzfc48b7a2016-02-15 13:22:35 -0500821 rx_bd_prod->addr.hi = cpu_to_le32(upper_32_bits(new_mapping));
822 rx_bd_prod->addr.lo = cpu_to_le32(lower_32_bits(new_mapping));
823
Yuval Mintz29502192015-10-26 11:02:29 +0200824 rxq->sw_rx_prod++;
Yuval Mintzfc48b7a2016-02-15 13:22:35 -0500825 curr_cons->data = NULL;
826}
827
Manish Chopraf86af2d2016-04-20 03:03:27 -0400828/* In case of allocation failures reuse buffers
829 * from consumer index to produce buffers for firmware
830 */
Sudarsana Reddy Kalluru16f46bf2016-04-28 20:20:54 -0400831void qede_recycle_rx_bd_ring(struct qede_rx_queue *rxq,
832 struct qede_dev *edev, u8 count)
Manish Chopraf86af2d2016-04-20 03:03:27 -0400833{
834 struct sw_rx_data *curr_cons;
835
836 for (; count > 0; count--) {
837 curr_cons = &rxq->sw_rx_ring[rxq->sw_rx_cons & NUM_RX_BDS_MAX];
838 qede_reuse_page(edev, rxq, curr_cons);
839 qede_rx_bd_ring_consume(rxq);
840 }
841}
842
Yuval Mintzfc48b7a2016-02-15 13:22:35 -0500843static inline int qede_realloc_rx_buffer(struct qede_dev *edev,
844 struct qede_rx_queue *rxq,
845 struct sw_rx_data *curr_cons)
846{
847 /* Move to the next segment in the page */
848 curr_cons->page_offset += rxq->rx_buf_seg_size;
849
850 if (curr_cons->page_offset == PAGE_SIZE) {
Manish Chopraf86af2d2016-04-20 03:03:27 -0400851 if (unlikely(qede_alloc_rx_buffer(edev, rxq))) {
852 /* Since we failed to allocate new buffer
853 * current buffer can be used again.
854 */
855 curr_cons->page_offset -= rxq->rx_buf_seg_size;
856
Yuval Mintzfc48b7a2016-02-15 13:22:35 -0500857 return -ENOMEM;
Manish Chopraf86af2d2016-04-20 03:03:27 -0400858 }
Yuval Mintzfc48b7a2016-02-15 13:22:35 -0500859
860 dma_unmap_page(&edev->pdev->dev, curr_cons->mapping,
861 PAGE_SIZE, DMA_FROM_DEVICE);
862 } else {
863 /* Increment refcount of the page as we don't want
864 * network stack to take the ownership of the page
865 * which can be recycled multiple times by the driver.
866 */
867 atomic_inc(&curr_cons->data->_count);
868 qede_reuse_page(edev, rxq, curr_cons);
869 }
870
871 return 0;
Yuval Mintz29502192015-10-26 11:02:29 +0200872}
873
874static inline void qede_update_rx_prod(struct qede_dev *edev,
875 struct qede_rx_queue *rxq)
876{
877 u16 bd_prod = qed_chain_get_prod_idx(&rxq->rx_bd_ring);
878 u16 cqe_prod = qed_chain_get_prod_idx(&rxq->rx_comp_ring);
879 struct eth_rx_prod_data rx_prods = {0};
880
881 /* Update producers */
882 rx_prods.bd_prod = cpu_to_le16(bd_prod);
883 rx_prods.cqe_prod = cpu_to_le16(cqe_prod);
884
885 /* Make sure that the BD and SGE data is updated before updating the
886 * producers since FW might read the BD/SGE right after the producer
887 * is updated.
888 */
889 wmb();
890
891 internal_ram_wr(rxq->hw_rxq_prod_addr, sizeof(rx_prods),
892 (u32 *)&rx_prods);
893
894 /* mmiowb is needed to synchronize doorbell writes from more than one
895 * processor. It guarantees that the write arrives to the device before
896 * the napi lock is released and another qede_poll is called (possibly
897 * on another CPU). Without this barrier, the next doorbell can bypass
898 * this doorbell. This is applicable to IA64/Altix systems.
899 */
900 mmiowb();
901}
902
903static u32 qede_get_rxhash(struct qede_dev *edev,
904 u8 bitfields,
905 __le32 rss_hash,
906 enum pkt_hash_types *rxhash_type)
907{
908 enum rss_hash_type htype;
909
910 htype = GET_FIELD(bitfields, ETH_FAST_PATH_RX_REG_CQE_RSS_HASH_TYPE);
911
912 if ((edev->ndev->features & NETIF_F_RXHASH) && htype) {
913 *rxhash_type = ((htype == RSS_HASH_TYPE_IPV4) ||
914 (htype == RSS_HASH_TYPE_IPV6)) ?
915 PKT_HASH_TYPE_L3 : PKT_HASH_TYPE_L4;
916 return le32_to_cpu(rss_hash);
917 }
918 *rxhash_type = PKT_HASH_TYPE_NONE;
919 return 0;
920}
921
922static void qede_set_skb_csum(struct sk_buff *skb, u8 csum_flag)
923{
924 skb_checksum_none_assert(skb);
925
926 if (csum_flag & QEDE_CSUM_UNNECESSARY)
927 skb->ip_summed = CHECKSUM_UNNECESSARY;
Manish Chopra14db81d2016-04-14 01:38:33 -0400928
929 if (csum_flag & QEDE_TUNN_CSUM_UNNECESSARY)
930 skb->csum_level = 1;
Yuval Mintz29502192015-10-26 11:02:29 +0200931}
932
933static inline void qede_skb_receive(struct qede_dev *edev,
934 struct qede_fastpath *fp,
935 struct sk_buff *skb,
936 u16 vlan_tag)
937{
938 if (vlan_tag)
939 __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q),
940 vlan_tag);
941
942 napi_gro_receive(&fp->napi, skb);
943}
944
Manish Chopra55482ed2016-03-04 12:35:06 -0500945static void qede_set_gro_params(struct qede_dev *edev,
946 struct sk_buff *skb,
947 struct eth_fast_path_rx_tpa_start_cqe *cqe)
948{
949 u16 parsing_flags = le16_to_cpu(cqe->pars_flags.flags);
950
951 if (((parsing_flags >> PARSING_AND_ERR_FLAGS_L3TYPE_SHIFT) &
952 PARSING_AND_ERR_FLAGS_L3TYPE_MASK) == 2)
953 skb_shinfo(skb)->gso_type = SKB_GSO_TCPV6;
954 else
955 skb_shinfo(skb)->gso_type = SKB_GSO_TCPV4;
956
957 skb_shinfo(skb)->gso_size = __le16_to_cpu(cqe->len_on_first_bd) -
958 cqe->header_len;
959}
960
961static int qede_fill_frag_skb(struct qede_dev *edev,
962 struct qede_rx_queue *rxq,
963 u8 tpa_agg_index,
964 u16 len_on_bd)
965{
966 struct sw_rx_data *current_bd = &rxq->sw_rx_ring[rxq->sw_rx_cons &
967 NUM_RX_BDS_MAX];
968 struct qede_agg_info *tpa_info = &rxq->tpa_info[tpa_agg_index];
969 struct sk_buff *skb = tpa_info->skb;
970
971 if (unlikely(tpa_info->agg_state != QEDE_AGG_STATE_START))
972 goto out;
973
974 /* Add one frag and update the appropriate fields in the skb */
975 skb_fill_page_desc(skb, tpa_info->frag_id++,
976 current_bd->data, current_bd->page_offset,
977 len_on_bd);
978
979 if (unlikely(qede_realloc_rx_buffer(edev, rxq, current_bd))) {
Manish Chopraf86af2d2016-04-20 03:03:27 -0400980 /* Incr page ref count to reuse on allocation failure
981 * so that it doesn't get freed while freeing SKB.
982 */
983 atomic_inc(&current_bd->data->_count);
Manish Chopra55482ed2016-03-04 12:35:06 -0500984 goto out;
985 }
986
987 qed_chain_consume(&rxq->rx_bd_ring);
988 rxq->sw_rx_cons++;
989
990 skb->data_len += len_on_bd;
991 skb->truesize += rxq->rx_buf_seg_size;
992 skb->len += len_on_bd;
993
994 return 0;
995
996out:
Manish Chopraf86af2d2016-04-20 03:03:27 -0400997 tpa_info->agg_state = QEDE_AGG_STATE_ERROR;
998 qede_recycle_rx_bd_ring(rxq, edev, 1);
Manish Chopra55482ed2016-03-04 12:35:06 -0500999 return -ENOMEM;
1000}
1001
1002static void qede_tpa_start(struct qede_dev *edev,
1003 struct qede_rx_queue *rxq,
1004 struct eth_fast_path_rx_tpa_start_cqe *cqe)
1005{
1006 struct qede_agg_info *tpa_info = &rxq->tpa_info[cqe->tpa_agg_index];
1007 struct eth_rx_bd *rx_bd_cons = qed_chain_consume(&rxq->rx_bd_ring);
1008 struct eth_rx_bd *rx_bd_prod = qed_chain_produce(&rxq->rx_bd_ring);
1009 struct sw_rx_data *replace_buf = &tpa_info->replace_buf;
1010 dma_addr_t mapping = tpa_info->replace_buf_mapping;
1011 struct sw_rx_data *sw_rx_data_cons;
1012 struct sw_rx_data *sw_rx_data_prod;
1013 enum pkt_hash_types rxhash_type;
1014 u32 rxhash;
1015
1016 sw_rx_data_cons = &rxq->sw_rx_ring[rxq->sw_rx_cons & NUM_RX_BDS_MAX];
1017 sw_rx_data_prod = &rxq->sw_rx_ring[rxq->sw_rx_prod & NUM_RX_BDS_MAX];
1018
1019 /* Use pre-allocated replacement buffer - we can't release the agg.
1020 * start until its over and we don't want to risk allocation failing
1021 * here, so re-allocate when aggregation will be over.
1022 */
1023 dma_unmap_addr_set(sw_rx_data_prod, mapping,
1024 dma_unmap_addr(replace_buf, mapping));
1025
1026 sw_rx_data_prod->data = replace_buf->data;
1027 rx_bd_prod->addr.hi = cpu_to_le32(upper_32_bits(mapping));
1028 rx_bd_prod->addr.lo = cpu_to_le32(lower_32_bits(mapping));
1029 sw_rx_data_prod->page_offset = replace_buf->page_offset;
1030
1031 rxq->sw_rx_prod++;
1032
1033 /* move partial skb from cons to pool (don't unmap yet)
1034 * save mapping, incase we drop the packet later on.
1035 */
1036 tpa_info->start_buf = *sw_rx_data_cons;
1037 mapping = HILO_U64(le32_to_cpu(rx_bd_cons->addr.hi),
1038 le32_to_cpu(rx_bd_cons->addr.lo));
1039
1040 tpa_info->start_buf_mapping = mapping;
1041 rxq->sw_rx_cons++;
1042
1043 /* set tpa state to start only if we are able to allocate skb
1044 * for this aggregation, otherwise mark as error and aggregation will
1045 * be dropped
1046 */
1047 tpa_info->skb = netdev_alloc_skb(edev->ndev,
1048 le16_to_cpu(cqe->len_on_first_bd));
1049 if (unlikely(!tpa_info->skb)) {
Manish Chopraf86af2d2016-04-20 03:03:27 -04001050 DP_NOTICE(edev, "Failed to allocate SKB for gro\n");
Manish Chopra55482ed2016-03-04 12:35:06 -05001051 tpa_info->agg_state = QEDE_AGG_STATE_ERROR;
Manish Chopraf86af2d2016-04-20 03:03:27 -04001052 goto cons_buf;
Manish Chopra55482ed2016-03-04 12:35:06 -05001053 }
1054
1055 skb_put(tpa_info->skb, le16_to_cpu(cqe->len_on_first_bd));
1056 memcpy(&tpa_info->start_cqe, cqe, sizeof(tpa_info->start_cqe));
1057
1058 /* Start filling in the aggregation info */
1059 tpa_info->frag_id = 0;
1060 tpa_info->agg_state = QEDE_AGG_STATE_START;
1061
1062 rxhash = qede_get_rxhash(edev, cqe->bitfields,
1063 cqe->rss_hash, &rxhash_type);
1064 skb_set_hash(tpa_info->skb, rxhash, rxhash_type);
1065 if ((le16_to_cpu(cqe->pars_flags.flags) >>
1066 PARSING_AND_ERR_FLAGS_TAG8021QEXIST_SHIFT) &
1067 PARSING_AND_ERR_FLAGS_TAG8021QEXIST_MASK)
1068 tpa_info->vlan_tag = le16_to_cpu(cqe->vlan_tag);
1069 else
1070 tpa_info->vlan_tag = 0;
1071
1072 /* This is needed in order to enable forwarding support */
1073 qede_set_gro_params(edev, tpa_info->skb, cqe);
1074
Manish Chopraf86af2d2016-04-20 03:03:27 -04001075cons_buf: /* We still need to handle bd_len_list to consume buffers */
Manish Chopra55482ed2016-03-04 12:35:06 -05001076 if (likely(cqe->ext_bd_len_list[0]))
1077 qede_fill_frag_skb(edev, rxq, cqe->tpa_agg_index,
1078 le16_to_cpu(cqe->ext_bd_len_list[0]));
1079
1080 if (unlikely(cqe->ext_bd_len_list[1])) {
1081 DP_ERR(edev,
1082 "Unlikely - got a TPA aggregation with more than one ext_bd_len_list entry in the TPA start\n");
1083 tpa_info->agg_state = QEDE_AGG_STATE_ERROR;
1084 }
1085}
1086
Manish Chopra88f09bd2016-03-08 04:09:44 -05001087#ifdef CONFIG_INET
Manish Chopra55482ed2016-03-04 12:35:06 -05001088static void qede_gro_ip_csum(struct sk_buff *skb)
1089{
1090 const struct iphdr *iph = ip_hdr(skb);
1091 struct tcphdr *th;
1092
Manish Chopra55482ed2016-03-04 12:35:06 -05001093 skb_set_transport_header(skb, sizeof(struct iphdr));
1094 th = tcp_hdr(skb);
1095
1096 th->check = ~tcp_v4_check(skb->len - skb_transport_offset(skb),
1097 iph->saddr, iph->daddr, 0);
1098
1099 tcp_gro_complete(skb);
1100}
1101
1102static void qede_gro_ipv6_csum(struct sk_buff *skb)
1103{
1104 struct ipv6hdr *iph = ipv6_hdr(skb);
1105 struct tcphdr *th;
1106
Manish Chopra55482ed2016-03-04 12:35:06 -05001107 skb_set_transport_header(skb, sizeof(struct ipv6hdr));
1108 th = tcp_hdr(skb);
1109
1110 th->check = ~tcp_v6_check(skb->len - skb_transport_offset(skb),
1111 &iph->saddr, &iph->daddr, 0);
1112 tcp_gro_complete(skb);
1113}
Manish Chopra88f09bd2016-03-08 04:09:44 -05001114#endif
Manish Chopra55482ed2016-03-04 12:35:06 -05001115
1116static void qede_gro_receive(struct qede_dev *edev,
1117 struct qede_fastpath *fp,
1118 struct sk_buff *skb,
1119 u16 vlan_tag)
1120{
Manish Chopraee2fa8e2016-04-20 03:03:29 -04001121 /* FW can send a single MTU sized packet from gro flow
1122 * due to aggregation timeout/last segment etc. which
1123 * is not expected to be a gro packet. If a skb has zero
1124 * frags then simply push it in the stack as non gso skb.
1125 */
1126 if (unlikely(!skb->data_len)) {
1127 skb_shinfo(skb)->gso_type = 0;
1128 skb_shinfo(skb)->gso_size = 0;
1129 goto send_skb;
1130 }
1131
Manish Chopra88f09bd2016-03-08 04:09:44 -05001132#ifdef CONFIG_INET
Manish Chopra55482ed2016-03-04 12:35:06 -05001133 if (skb_shinfo(skb)->gso_size) {
Manish Chopraaad94c02016-04-20 03:03:28 -04001134 skb_set_network_header(skb, 0);
1135
Manish Chopra55482ed2016-03-04 12:35:06 -05001136 switch (skb->protocol) {
1137 case htons(ETH_P_IP):
1138 qede_gro_ip_csum(skb);
1139 break;
1140 case htons(ETH_P_IPV6):
1141 qede_gro_ipv6_csum(skb);
1142 break;
1143 default:
1144 DP_ERR(edev,
1145 "Error: FW GRO supports only IPv4/IPv6, not 0x%04x\n",
1146 ntohs(skb->protocol));
1147 }
1148 }
Manish Chopra88f09bd2016-03-08 04:09:44 -05001149#endif
Manish Chopraee2fa8e2016-04-20 03:03:29 -04001150
1151send_skb:
Manish Chopra55482ed2016-03-04 12:35:06 -05001152 skb_record_rx_queue(skb, fp->rss_id);
1153 qede_skb_receive(edev, fp, skb, vlan_tag);
1154}
1155
1156static inline void qede_tpa_cont(struct qede_dev *edev,
1157 struct qede_rx_queue *rxq,
1158 struct eth_fast_path_rx_tpa_cont_cqe *cqe)
1159{
1160 int i;
1161
1162 for (i = 0; cqe->len_list[i]; i++)
1163 qede_fill_frag_skb(edev, rxq, cqe->tpa_agg_index,
1164 le16_to_cpu(cqe->len_list[i]));
1165
1166 if (unlikely(i > 1))
1167 DP_ERR(edev,
1168 "Strange - TPA cont with more than a single len_list entry\n");
1169}
1170
1171static void qede_tpa_end(struct qede_dev *edev,
1172 struct qede_fastpath *fp,
1173 struct eth_fast_path_rx_tpa_end_cqe *cqe)
1174{
1175 struct qede_rx_queue *rxq = fp->rxq;
1176 struct qede_agg_info *tpa_info;
1177 struct sk_buff *skb;
1178 int i;
1179
1180 tpa_info = &rxq->tpa_info[cqe->tpa_agg_index];
1181 skb = tpa_info->skb;
1182
1183 for (i = 0; cqe->len_list[i]; i++)
1184 qede_fill_frag_skb(edev, rxq, cqe->tpa_agg_index,
1185 le16_to_cpu(cqe->len_list[i]));
1186 if (unlikely(i > 1))
1187 DP_ERR(edev,
1188 "Strange - TPA emd with more than a single len_list entry\n");
1189
1190 if (unlikely(tpa_info->agg_state != QEDE_AGG_STATE_START))
1191 goto err;
1192
1193 /* Sanity */
1194 if (unlikely(cqe->num_of_bds != tpa_info->frag_id + 1))
1195 DP_ERR(edev,
1196 "Strange - TPA had %02x BDs, but SKB has only %d frags\n",
1197 cqe->num_of_bds, tpa_info->frag_id);
1198 if (unlikely(skb->len != le16_to_cpu(cqe->total_packet_len)))
1199 DP_ERR(edev,
1200 "Strange - total packet len [cqe] is %4x but SKB has len %04x\n",
1201 le16_to_cpu(cqe->total_packet_len), skb->len);
1202
1203 memcpy(skb->data,
1204 page_address(tpa_info->start_buf.data) +
1205 tpa_info->start_cqe.placement_offset +
1206 tpa_info->start_buf.page_offset,
1207 le16_to_cpu(tpa_info->start_cqe.len_on_first_bd));
1208
1209 /* Recycle [mapped] start buffer for the next replacement */
1210 tpa_info->replace_buf = tpa_info->start_buf;
1211 tpa_info->replace_buf_mapping = tpa_info->start_buf_mapping;
1212
1213 /* Finalize the SKB */
1214 skb->protocol = eth_type_trans(skb, edev->ndev);
1215 skb->ip_summed = CHECKSUM_UNNECESSARY;
1216
1217 /* tcp_gro_complete() will copy NAPI_GRO_CB(skb)->count
1218 * to skb_shinfo(skb)->gso_segs
1219 */
1220 NAPI_GRO_CB(skb)->count = le16_to_cpu(cqe->num_of_coalesced_segs);
1221
1222 qede_gro_receive(edev, fp, skb, tpa_info->vlan_tag);
1223
1224 tpa_info->agg_state = QEDE_AGG_STATE_NONE;
1225
1226 return;
1227err:
1228 /* The BD starting the aggregation is still mapped; Re-use it for
1229 * future aggregations [as replacement buffer]
1230 */
1231 memcpy(&tpa_info->replace_buf, &tpa_info->start_buf,
1232 sizeof(struct sw_rx_data));
1233 tpa_info->replace_buf_mapping = tpa_info->start_buf_mapping;
1234 tpa_info->start_buf.data = NULL;
1235 tpa_info->agg_state = QEDE_AGG_STATE_NONE;
1236 dev_kfree_skb_any(tpa_info->skb);
1237 tpa_info->skb = NULL;
1238}
1239
Manish Chopra14db81d2016-04-14 01:38:33 -04001240static bool qede_tunn_exist(u16 flag)
1241{
1242 return !!(flag & (PARSING_AND_ERR_FLAGS_TUNNELEXIST_MASK <<
1243 PARSING_AND_ERR_FLAGS_TUNNELEXIST_SHIFT));
1244}
1245
1246static u8 qede_check_tunn_csum(u16 flag)
1247{
1248 u16 csum_flag = 0;
1249 u8 tcsum = 0;
1250
1251 if (flag & (PARSING_AND_ERR_FLAGS_TUNNELL4CHKSMWASCALCULATED_MASK <<
1252 PARSING_AND_ERR_FLAGS_TUNNELL4CHKSMWASCALCULATED_SHIFT))
1253 csum_flag |= PARSING_AND_ERR_FLAGS_TUNNELL4CHKSMERROR_MASK <<
1254 PARSING_AND_ERR_FLAGS_TUNNELL4CHKSMERROR_SHIFT;
1255
1256 if (flag & (PARSING_AND_ERR_FLAGS_L4CHKSMWASCALCULATED_MASK <<
1257 PARSING_AND_ERR_FLAGS_L4CHKSMWASCALCULATED_SHIFT)) {
1258 csum_flag |= PARSING_AND_ERR_FLAGS_L4CHKSMERROR_MASK <<
1259 PARSING_AND_ERR_FLAGS_L4CHKSMERROR_SHIFT;
1260 tcsum = QEDE_TUNN_CSUM_UNNECESSARY;
1261 }
1262
1263 csum_flag |= PARSING_AND_ERR_FLAGS_TUNNELIPHDRERROR_MASK <<
1264 PARSING_AND_ERR_FLAGS_TUNNELIPHDRERROR_SHIFT |
1265 PARSING_AND_ERR_FLAGS_IPHDRERROR_MASK <<
1266 PARSING_AND_ERR_FLAGS_IPHDRERROR_SHIFT;
1267
1268 if (csum_flag & flag)
1269 return QEDE_CSUM_ERROR;
1270
1271 return QEDE_CSUM_UNNECESSARY | tcsum;
1272}
1273
1274static u8 qede_check_notunn_csum(u16 flag)
Yuval Mintz29502192015-10-26 11:02:29 +02001275{
1276 u16 csum_flag = 0;
1277 u8 csum = 0;
1278
Manish Chopra14db81d2016-04-14 01:38:33 -04001279 if (flag & (PARSING_AND_ERR_FLAGS_L4CHKSMWASCALCULATED_MASK <<
1280 PARSING_AND_ERR_FLAGS_L4CHKSMWASCALCULATED_SHIFT)) {
Yuval Mintz29502192015-10-26 11:02:29 +02001281 csum_flag |= PARSING_AND_ERR_FLAGS_L4CHKSMERROR_MASK <<
1282 PARSING_AND_ERR_FLAGS_L4CHKSMERROR_SHIFT;
1283 csum = QEDE_CSUM_UNNECESSARY;
1284 }
1285
1286 csum_flag |= PARSING_AND_ERR_FLAGS_IPHDRERROR_MASK <<
1287 PARSING_AND_ERR_FLAGS_IPHDRERROR_SHIFT;
1288
1289 if (csum_flag & flag)
1290 return QEDE_CSUM_ERROR;
1291
1292 return csum;
1293}
1294
Manish Chopra14db81d2016-04-14 01:38:33 -04001295static u8 qede_check_csum(u16 flag)
1296{
1297 if (!qede_tunn_exist(flag))
1298 return qede_check_notunn_csum(flag);
1299 else
1300 return qede_check_tunn_csum(flag);
1301}
1302
Yuval Mintz29502192015-10-26 11:02:29 +02001303static int qede_rx_int(struct qede_fastpath *fp, int budget)
1304{
1305 struct qede_dev *edev = fp->edev;
1306 struct qede_rx_queue *rxq = fp->rxq;
1307
1308 u16 hw_comp_cons, sw_comp_cons, sw_rx_index, parse_flag;
1309 int rx_pkt = 0;
1310 u8 csum_flag;
1311
1312 hw_comp_cons = le16_to_cpu(*rxq->hw_cons_ptr);
1313 sw_comp_cons = qed_chain_get_cons_idx(&rxq->rx_comp_ring);
1314
1315 /* Memory barrier to prevent the CPU from doing speculative reads of CQE
1316 * / BD in the while-loop before reading hw_comp_cons. If the CQE is
1317 * read before it is written by FW, then FW writes CQE and SB, and then
1318 * the CPU reads the hw_comp_cons, it will use an old CQE.
1319 */
1320 rmb();
1321
1322 /* Loop to complete all indicated BDs */
1323 while (sw_comp_cons != hw_comp_cons) {
1324 struct eth_fast_path_rx_reg_cqe *fp_cqe;
1325 enum pkt_hash_types rxhash_type;
1326 enum eth_rx_cqe_type cqe_type;
1327 struct sw_rx_data *sw_rx_data;
1328 union eth_rx_cqe *cqe;
1329 struct sk_buff *skb;
Yuval Mintzfc48b7a2016-02-15 13:22:35 -05001330 struct page *data;
1331 __le16 flags;
Yuval Mintz29502192015-10-26 11:02:29 +02001332 u16 len, pad;
1333 u32 rx_hash;
Yuval Mintz29502192015-10-26 11:02:29 +02001334
1335 /* Get the CQE from the completion ring */
1336 cqe = (union eth_rx_cqe *)
1337 qed_chain_consume(&rxq->rx_comp_ring);
1338 cqe_type = cqe->fast_path_regular.type;
1339
1340 if (unlikely(cqe_type == ETH_RX_CQE_TYPE_SLOW_PATH)) {
1341 edev->ops->eth_cqe_completion(
1342 edev->cdev, fp->rss_id,
1343 (struct eth_slow_path_rx_cqe *)cqe);
1344 goto next_cqe;
1345 }
1346
Manish Chopra55482ed2016-03-04 12:35:06 -05001347 if (cqe_type != ETH_RX_CQE_TYPE_REGULAR) {
1348 switch (cqe_type) {
1349 case ETH_RX_CQE_TYPE_TPA_START:
1350 qede_tpa_start(edev, rxq,
1351 &cqe->fast_path_tpa_start);
1352 goto next_cqe;
1353 case ETH_RX_CQE_TYPE_TPA_CONT:
1354 qede_tpa_cont(edev, rxq,
1355 &cqe->fast_path_tpa_cont);
1356 goto next_cqe;
1357 case ETH_RX_CQE_TYPE_TPA_END:
1358 qede_tpa_end(edev, fp,
1359 &cqe->fast_path_tpa_end);
1360 goto next_rx_only;
1361 default:
1362 break;
1363 }
1364 }
1365
Yuval Mintz29502192015-10-26 11:02:29 +02001366 /* Get the data from the SW ring */
1367 sw_rx_index = rxq->sw_rx_cons & NUM_RX_BDS_MAX;
1368 sw_rx_data = &rxq->sw_rx_ring[sw_rx_index];
1369 data = sw_rx_data->data;
1370
1371 fp_cqe = &cqe->fast_path_regular;
Yuval Mintzfc48b7a2016-02-15 13:22:35 -05001372 len = le16_to_cpu(fp_cqe->len_on_first_bd);
Yuval Mintz29502192015-10-26 11:02:29 +02001373 pad = fp_cqe->placement_offset;
Yuval Mintzfc48b7a2016-02-15 13:22:35 -05001374 flags = cqe->fast_path_regular.pars_flags.flags;
Yuval Mintz29502192015-10-26 11:02:29 +02001375
Yuval Mintzfc48b7a2016-02-15 13:22:35 -05001376 /* If this is an error packet then drop it */
1377 parse_flag = le16_to_cpu(flags);
Yuval Mintz29502192015-10-26 11:02:29 +02001378
Yuval Mintzfc48b7a2016-02-15 13:22:35 -05001379 csum_flag = qede_check_csum(parse_flag);
1380 if (unlikely(csum_flag == QEDE_CSUM_ERROR)) {
Yuval Mintz29502192015-10-26 11:02:29 +02001381 DP_NOTICE(edev,
Yuval Mintzfc48b7a2016-02-15 13:22:35 -05001382 "CQE in CONS = %u has error, flags = %x, dropping incoming packet\n",
1383 sw_comp_cons, parse_flag);
1384 rxq->rx_hw_errors++;
Manish Chopraf86af2d2016-04-20 03:03:27 -04001385 qede_recycle_rx_bd_ring(rxq, edev, fp_cqe->bd_num);
1386 goto next_cqe;
Yuval Mintz29502192015-10-26 11:02:29 +02001387 }
1388
Yuval Mintzfc48b7a2016-02-15 13:22:35 -05001389 skb = netdev_alloc_skb(edev->ndev, QEDE_RX_HDR_SIZE);
1390 if (unlikely(!skb)) {
1391 DP_NOTICE(edev,
1392 "Build_skb failed, dropping incoming packet\n");
Manish Chopraf86af2d2016-04-20 03:03:27 -04001393 qede_recycle_rx_bd_ring(rxq, edev, fp_cqe->bd_num);
Yuval Mintzfc48b7a2016-02-15 13:22:35 -05001394 rxq->rx_alloc_errors++;
Manish Chopraf86af2d2016-04-20 03:03:27 -04001395 goto next_cqe;
Yuval Mintzfc48b7a2016-02-15 13:22:35 -05001396 }
Yuval Mintz29502192015-10-26 11:02:29 +02001397
Yuval Mintzfc48b7a2016-02-15 13:22:35 -05001398 /* Copy data into SKB */
1399 if (len + pad <= QEDE_RX_HDR_SIZE) {
1400 memcpy(skb_put(skb, len),
1401 page_address(data) + pad +
1402 sw_rx_data->page_offset, len);
1403 qede_reuse_page(edev, rxq, sw_rx_data);
1404 } else {
1405 struct skb_frag_struct *frag;
1406 unsigned int pull_len;
1407 unsigned char *va;
1408
1409 frag = &skb_shinfo(skb)->frags[0];
1410
1411 skb_add_rx_frag(skb, skb_shinfo(skb)->nr_frags, data,
1412 pad + sw_rx_data->page_offset,
1413 len, rxq->rx_buf_seg_size);
1414
1415 va = skb_frag_address(frag);
1416 pull_len = eth_get_headlen(va, QEDE_RX_HDR_SIZE);
1417
1418 /* Align the pull_len to optimize memcpy */
1419 memcpy(skb->data, va, ALIGN(pull_len, sizeof(long)));
1420
1421 skb_frag_size_sub(frag, pull_len);
1422 frag->page_offset += pull_len;
1423 skb->data_len -= pull_len;
1424 skb->tail += pull_len;
1425
1426 if (unlikely(qede_realloc_rx_buffer(edev, rxq,
1427 sw_rx_data))) {
1428 DP_ERR(edev, "Failed to allocate rx buffer\n");
Manish Chopraf86af2d2016-04-20 03:03:27 -04001429 /* Incr page ref count to reuse on allocation
1430 * failure so that it doesn't get freed while
1431 * freeing SKB.
1432 */
1433
1434 atomic_inc(&sw_rx_data->data->_count);
Yuval Mintzfc48b7a2016-02-15 13:22:35 -05001435 rxq->rx_alloc_errors++;
Manish Chopraf86af2d2016-04-20 03:03:27 -04001436 qede_recycle_rx_bd_ring(rxq, edev,
1437 fp_cqe->bd_num);
1438 dev_kfree_skb_any(skb);
Yuval Mintzfc48b7a2016-02-15 13:22:35 -05001439 goto next_cqe;
1440 }
1441 }
1442
Manish Chopraf86af2d2016-04-20 03:03:27 -04001443 qede_rx_bd_ring_consume(rxq);
1444
Yuval Mintzfc48b7a2016-02-15 13:22:35 -05001445 if (fp_cqe->bd_num != 1) {
1446 u16 pkt_len = le16_to_cpu(fp_cqe->pkt_len);
1447 u8 num_frags;
1448
1449 pkt_len -= len;
1450
1451 for (num_frags = fp_cqe->bd_num - 1; num_frags > 0;
1452 num_frags--) {
1453 u16 cur_size = pkt_len > rxq->rx_buf_size ?
1454 rxq->rx_buf_size : pkt_len;
Manish Chopraf86af2d2016-04-20 03:03:27 -04001455 if (unlikely(!cur_size)) {
1456 DP_ERR(edev,
1457 "Still got %d BDs for mapping jumbo, but length became 0\n",
1458 num_frags);
1459 qede_recycle_rx_bd_ring(rxq, edev,
1460 num_frags);
1461 dev_kfree_skb_any(skb);
Yuval Mintzfc48b7a2016-02-15 13:22:35 -05001462 goto next_cqe;
Manish Chopraf86af2d2016-04-20 03:03:27 -04001463 }
Yuval Mintzfc48b7a2016-02-15 13:22:35 -05001464
Manish Chopraf86af2d2016-04-20 03:03:27 -04001465 if (unlikely(qede_alloc_rx_buffer(edev, rxq))) {
1466 qede_recycle_rx_bd_ring(rxq, edev,
1467 num_frags);
1468 dev_kfree_skb_any(skb);
1469 goto next_cqe;
1470 }
1471
Yuval Mintzfc48b7a2016-02-15 13:22:35 -05001472 sw_rx_index = rxq->sw_rx_cons & NUM_RX_BDS_MAX;
1473 sw_rx_data = &rxq->sw_rx_ring[sw_rx_index];
Manish Chopraf86af2d2016-04-20 03:03:27 -04001474 qede_rx_bd_ring_consume(rxq);
1475
Yuval Mintzfc48b7a2016-02-15 13:22:35 -05001476 dma_unmap_page(&edev->pdev->dev,
1477 sw_rx_data->mapping,
1478 PAGE_SIZE, DMA_FROM_DEVICE);
1479
1480 skb_fill_page_desc(skb,
1481 skb_shinfo(skb)->nr_frags++,
1482 sw_rx_data->data, 0,
1483 cur_size);
1484
1485 skb->truesize += PAGE_SIZE;
1486 skb->data_len += cur_size;
1487 skb->len += cur_size;
1488 pkt_len -= cur_size;
1489 }
1490
Manish Chopraf86af2d2016-04-20 03:03:27 -04001491 if (unlikely(pkt_len))
Yuval Mintzfc48b7a2016-02-15 13:22:35 -05001492 DP_ERR(edev,
1493 "Mapped all BDs of jumbo, but still have %d bytes\n",
1494 pkt_len);
1495 }
Yuval Mintz29502192015-10-26 11:02:29 +02001496
1497 skb->protocol = eth_type_trans(skb, edev->ndev);
1498
1499 rx_hash = qede_get_rxhash(edev, fp_cqe->bitfields,
1500 fp_cqe->rss_hash,
1501 &rxhash_type);
1502
1503 skb_set_hash(skb, rx_hash, rxhash_type);
1504
1505 qede_set_skb_csum(skb, csum_flag);
1506
1507 skb_record_rx_queue(skb, fp->rss_id);
1508
1509 qede_skb_receive(edev, fp, skb, le16_to_cpu(fp_cqe->vlan_tag));
Manish Chopra55482ed2016-03-04 12:35:06 -05001510next_rx_only:
Yuval Mintz29502192015-10-26 11:02:29 +02001511 rx_pkt++;
1512
1513next_cqe: /* don't consume bd rx buffer */
1514 qed_chain_recycle_consumed(&rxq->rx_comp_ring);
1515 sw_comp_cons = qed_chain_get_cons_idx(&rxq->rx_comp_ring);
1516 /* CR TPA - revisit how to handle budget in TPA perhaps
1517 * increase on "end"
1518 */
1519 if (rx_pkt == budget)
1520 break;
1521 } /* repeat while sw_comp_cons != hw_comp_cons... */
1522
1523 /* Update producers */
1524 qede_update_rx_prod(edev, rxq);
1525
1526 return rx_pkt;
1527}
1528
1529static int qede_poll(struct napi_struct *napi, int budget)
1530{
1531 int work_done = 0;
1532 struct qede_fastpath *fp = container_of(napi, struct qede_fastpath,
1533 napi);
1534 struct qede_dev *edev = fp->edev;
1535
1536 while (1) {
1537 u8 tc;
1538
1539 for (tc = 0; tc < edev->num_tc; tc++)
1540 if (qede_txq_has_work(&fp->txqs[tc]))
1541 qede_tx_int(edev, &fp->txqs[tc]);
1542
1543 if (qede_has_rx_work(fp->rxq)) {
1544 work_done += qede_rx_int(fp, budget - work_done);
1545
1546 /* must not complete if we consumed full budget */
1547 if (work_done >= budget)
1548 break;
1549 }
1550
1551 /* Fall out from the NAPI loop if needed */
1552 if (!(qede_has_rx_work(fp->rxq) || qede_has_tx_work(fp))) {
1553 qed_sb_update_sb_idx(fp->sb_info);
1554 /* *_has_*_work() reads the status block,
1555 * thus we need to ensure that status block indices
1556 * have been actually read (qed_sb_update_sb_idx)
1557 * prior to this check (*_has_*_work) so that
1558 * we won't write the "newer" value of the status block
1559 * to HW (if there was a DMA right after
1560 * qede_has_rx_work and if there is no rmb, the memory
1561 * reading (qed_sb_update_sb_idx) may be postponed
1562 * to right before *_ack_sb). In this case there
1563 * will never be another interrupt until there is
1564 * another update of the status block, while there
1565 * is still unhandled work.
1566 */
1567 rmb();
1568
1569 if (!(qede_has_rx_work(fp->rxq) ||
1570 qede_has_tx_work(fp))) {
1571 napi_complete(napi);
1572 /* Update and reenable interrupts */
1573 qed_sb_ack(fp->sb_info, IGU_INT_ENABLE,
1574 1 /*update*/);
1575 break;
1576 }
1577 }
1578 }
1579
1580 return work_done;
1581}
1582
1583static irqreturn_t qede_msix_fp_int(int irq, void *fp_cookie)
1584{
1585 struct qede_fastpath *fp = fp_cookie;
1586
1587 qed_sb_ack(fp->sb_info, IGU_INT_DISABLE, 0 /*do not update*/);
1588
1589 napi_schedule_irqoff(&fp->napi);
1590 return IRQ_HANDLED;
1591}
1592
1593/* -------------------------------------------------------------------------
1594 * END OF FAST-PATH
1595 * -------------------------------------------------------------------------
1596 */
1597
1598static int qede_open(struct net_device *ndev);
1599static int qede_close(struct net_device *ndev);
Sudarsana Kalluru0d8e0aa2015-10-26 11:02:30 +02001600static int qede_set_mac_addr(struct net_device *ndev, void *p);
1601static void qede_set_rx_mode(struct net_device *ndev);
1602static void qede_config_rx_mode(struct net_device *ndev);
1603
1604static int qede_set_ucast_rx_mac(struct qede_dev *edev,
1605 enum qed_filter_xcast_params_type opcode,
1606 unsigned char mac[ETH_ALEN])
1607{
1608 struct qed_filter_params filter_cmd;
1609
1610 memset(&filter_cmd, 0, sizeof(filter_cmd));
1611 filter_cmd.type = QED_FILTER_TYPE_UCAST;
1612 filter_cmd.filter.ucast.type = opcode;
1613 filter_cmd.filter.ucast.mac_valid = 1;
1614 ether_addr_copy(filter_cmd.filter.ucast.mac, mac);
1615
1616 return edev->ops->filter_config(edev->cdev, &filter_cmd);
1617}
1618
Sudarsana Reddy Kalluru7c1bfca2016-02-18 17:00:40 +02001619static int qede_set_ucast_rx_vlan(struct qede_dev *edev,
1620 enum qed_filter_xcast_params_type opcode,
1621 u16 vid)
1622{
1623 struct qed_filter_params filter_cmd;
1624
1625 memset(&filter_cmd, 0, sizeof(filter_cmd));
1626 filter_cmd.type = QED_FILTER_TYPE_UCAST;
1627 filter_cmd.filter.ucast.type = opcode;
1628 filter_cmd.filter.ucast.vlan_valid = 1;
1629 filter_cmd.filter.ucast.vlan = vid;
1630
1631 return edev->ops->filter_config(edev->cdev, &filter_cmd);
1632}
1633
Sudarsana Kalluru133fac02015-10-26 11:02:34 +02001634void qede_fill_by_demand_stats(struct qede_dev *edev)
1635{
1636 struct qed_eth_stats stats;
1637
1638 edev->ops->get_vport_stats(edev->cdev, &stats);
1639 edev->stats.no_buff_discards = stats.no_buff_discards;
1640 edev->stats.rx_ucast_bytes = stats.rx_ucast_bytes;
1641 edev->stats.rx_mcast_bytes = stats.rx_mcast_bytes;
1642 edev->stats.rx_bcast_bytes = stats.rx_bcast_bytes;
1643 edev->stats.rx_ucast_pkts = stats.rx_ucast_pkts;
1644 edev->stats.rx_mcast_pkts = stats.rx_mcast_pkts;
1645 edev->stats.rx_bcast_pkts = stats.rx_bcast_pkts;
1646 edev->stats.mftag_filter_discards = stats.mftag_filter_discards;
1647 edev->stats.mac_filter_discards = stats.mac_filter_discards;
1648
1649 edev->stats.tx_ucast_bytes = stats.tx_ucast_bytes;
1650 edev->stats.tx_mcast_bytes = stats.tx_mcast_bytes;
1651 edev->stats.tx_bcast_bytes = stats.tx_bcast_bytes;
1652 edev->stats.tx_ucast_pkts = stats.tx_ucast_pkts;
1653 edev->stats.tx_mcast_pkts = stats.tx_mcast_pkts;
1654 edev->stats.tx_bcast_pkts = stats.tx_bcast_pkts;
1655 edev->stats.tx_err_drop_pkts = stats.tx_err_drop_pkts;
1656 edev->stats.coalesced_pkts = stats.tpa_coalesced_pkts;
1657 edev->stats.coalesced_events = stats.tpa_coalesced_events;
1658 edev->stats.coalesced_aborts_num = stats.tpa_aborts_num;
1659 edev->stats.non_coalesced_pkts = stats.tpa_not_coalesced_pkts;
1660 edev->stats.coalesced_bytes = stats.tpa_coalesced_bytes;
1661
1662 edev->stats.rx_64_byte_packets = stats.rx_64_byte_packets;
Yuval Mintzd4967cf2016-04-22 08:41:01 +03001663 edev->stats.rx_65_to_127_byte_packets = stats.rx_65_to_127_byte_packets;
1664 edev->stats.rx_128_to_255_byte_packets =
1665 stats.rx_128_to_255_byte_packets;
1666 edev->stats.rx_256_to_511_byte_packets =
1667 stats.rx_256_to_511_byte_packets;
1668 edev->stats.rx_512_to_1023_byte_packets =
1669 stats.rx_512_to_1023_byte_packets;
1670 edev->stats.rx_1024_to_1518_byte_packets =
1671 stats.rx_1024_to_1518_byte_packets;
1672 edev->stats.rx_1519_to_1522_byte_packets =
1673 stats.rx_1519_to_1522_byte_packets;
1674 edev->stats.rx_1519_to_2047_byte_packets =
1675 stats.rx_1519_to_2047_byte_packets;
1676 edev->stats.rx_2048_to_4095_byte_packets =
1677 stats.rx_2048_to_4095_byte_packets;
1678 edev->stats.rx_4096_to_9216_byte_packets =
1679 stats.rx_4096_to_9216_byte_packets;
1680 edev->stats.rx_9217_to_16383_byte_packets =
1681 stats.rx_9217_to_16383_byte_packets;
Sudarsana Kalluru133fac02015-10-26 11:02:34 +02001682 edev->stats.rx_crc_errors = stats.rx_crc_errors;
1683 edev->stats.rx_mac_crtl_frames = stats.rx_mac_crtl_frames;
1684 edev->stats.rx_pause_frames = stats.rx_pause_frames;
1685 edev->stats.rx_pfc_frames = stats.rx_pfc_frames;
1686 edev->stats.rx_align_errors = stats.rx_align_errors;
1687 edev->stats.rx_carrier_errors = stats.rx_carrier_errors;
1688 edev->stats.rx_oversize_packets = stats.rx_oversize_packets;
1689 edev->stats.rx_jabbers = stats.rx_jabbers;
1690 edev->stats.rx_undersize_packets = stats.rx_undersize_packets;
1691 edev->stats.rx_fragments = stats.rx_fragments;
1692 edev->stats.tx_64_byte_packets = stats.tx_64_byte_packets;
1693 edev->stats.tx_65_to_127_byte_packets = stats.tx_65_to_127_byte_packets;
1694 edev->stats.tx_128_to_255_byte_packets =
1695 stats.tx_128_to_255_byte_packets;
1696 edev->stats.tx_256_to_511_byte_packets =
1697 stats.tx_256_to_511_byte_packets;
1698 edev->stats.tx_512_to_1023_byte_packets =
1699 stats.tx_512_to_1023_byte_packets;
1700 edev->stats.tx_1024_to_1518_byte_packets =
1701 stats.tx_1024_to_1518_byte_packets;
1702 edev->stats.tx_1519_to_2047_byte_packets =
1703 stats.tx_1519_to_2047_byte_packets;
1704 edev->stats.tx_2048_to_4095_byte_packets =
1705 stats.tx_2048_to_4095_byte_packets;
1706 edev->stats.tx_4096_to_9216_byte_packets =
1707 stats.tx_4096_to_9216_byte_packets;
1708 edev->stats.tx_9217_to_16383_byte_packets =
1709 stats.tx_9217_to_16383_byte_packets;
1710 edev->stats.tx_pause_frames = stats.tx_pause_frames;
1711 edev->stats.tx_pfc_frames = stats.tx_pfc_frames;
1712 edev->stats.tx_lpi_entry_count = stats.tx_lpi_entry_count;
1713 edev->stats.tx_total_collisions = stats.tx_total_collisions;
1714 edev->stats.brb_truncates = stats.brb_truncates;
1715 edev->stats.brb_discards = stats.brb_discards;
1716 edev->stats.tx_mac_ctrl_frames = stats.tx_mac_ctrl_frames;
1717}
1718
1719static struct rtnl_link_stats64 *qede_get_stats64(
1720 struct net_device *dev,
1721 struct rtnl_link_stats64 *stats)
1722{
1723 struct qede_dev *edev = netdev_priv(dev);
1724
1725 qede_fill_by_demand_stats(edev);
1726
1727 stats->rx_packets = edev->stats.rx_ucast_pkts +
1728 edev->stats.rx_mcast_pkts +
1729 edev->stats.rx_bcast_pkts;
1730 stats->tx_packets = edev->stats.tx_ucast_pkts +
1731 edev->stats.tx_mcast_pkts +
1732 edev->stats.tx_bcast_pkts;
1733
1734 stats->rx_bytes = edev->stats.rx_ucast_bytes +
1735 edev->stats.rx_mcast_bytes +
1736 edev->stats.rx_bcast_bytes;
1737
1738 stats->tx_bytes = edev->stats.tx_ucast_bytes +
1739 edev->stats.tx_mcast_bytes +
1740 edev->stats.tx_bcast_bytes;
1741
1742 stats->tx_errors = edev->stats.tx_err_drop_pkts;
1743 stats->multicast = edev->stats.rx_mcast_pkts +
1744 edev->stats.rx_bcast_pkts;
1745
1746 stats->rx_fifo_errors = edev->stats.no_buff_discards;
1747
1748 stats->collisions = edev->stats.tx_total_collisions;
1749 stats->rx_crc_errors = edev->stats.rx_crc_errors;
1750 stats->rx_frame_errors = edev->stats.rx_align_errors;
1751
1752 return stats;
1753}
1754
Sudarsana Reddy Kalluru7c1bfca2016-02-18 17:00:40 +02001755static void qede_config_accept_any_vlan(struct qede_dev *edev, bool action)
1756{
1757 struct qed_update_vport_params params;
1758 int rc;
1759
1760 /* Proceed only if action actually needs to be performed */
1761 if (edev->accept_any_vlan == action)
1762 return;
1763
1764 memset(&params, 0, sizeof(params));
1765
1766 params.vport_id = 0;
1767 params.accept_any_vlan = action;
1768 params.update_accept_any_vlan_flg = 1;
1769
1770 rc = edev->ops->vport_update(edev->cdev, &params);
1771 if (rc) {
1772 DP_ERR(edev, "Failed to %s accept-any-vlan\n",
1773 action ? "enable" : "disable");
1774 } else {
1775 DP_INFO(edev, "%s accept-any-vlan\n",
1776 action ? "enabled" : "disabled");
1777 edev->accept_any_vlan = action;
1778 }
1779}
1780
1781static int qede_vlan_rx_add_vid(struct net_device *dev, __be16 proto, u16 vid)
1782{
1783 struct qede_dev *edev = netdev_priv(dev);
1784 struct qede_vlan *vlan, *tmp;
1785 int rc;
1786
1787 DP_VERBOSE(edev, NETIF_MSG_IFUP, "Adding vlan 0x%04x\n", vid);
1788
1789 vlan = kzalloc(sizeof(*vlan), GFP_KERNEL);
1790 if (!vlan) {
1791 DP_INFO(edev, "Failed to allocate struct for vlan\n");
1792 return -ENOMEM;
1793 }
1794 INIT_LIST_HEAD(&vlan->list);
1795 vlan->vid = vid;
1796 vlan->configured = false;
1797
1798 /* Verify vlan isn't already configured */
1799 list_for_each_entry(tmp, &edev->vlan_list, list) {
1800 if (tmp->vid == vlan->vid) {
1801 DP_VERBOSE(edev, (NETIF_MSG_IFUP | NETIF_MSG_IFDOWN),
1802 "vlan already configured\n");
1803 kfree(vlan);
1804 return -EEXIST;
1805 }
1806 }
1807
1808 /* If interface is down, cache this VLAN ID and return */
1809 if (edev->state != QEDE_STATE_OPEN) {
1810 DP_VERBOSE(edev, NETIF_MSG_IFDOWN,
1811 "Interface is down, VLAN %d will be configured when interface is up\n",
1812 vid);
1813 if (vid != 0)
1814 edev->non_configured_vlans++;
1815 list_add(&vlan->list, &edev->vlan_list);
1816
1817 return 0;
1818 }
1819
1820 /* Check for the filter limit.
1821 * Note - vlan0 has a reserved filter and can be added without
1822 * worrying about quota
1823 */
1824 if ((edev->configured_vlans < edev->dev_info.num_vlan_filters) ||
1825 (vlan->vid == 0)) {
1826 rc = qede_set_ucast_rx_vlan(edev,
1827 QED_FILTER_XCAST_TYPE_ADD,
1828 vlan->vid);
1829 if (rc) {
1830 DP_ERR(edev, "Failed to configure VLAN %d\n",
1831 vlan->vid);
1832 kfree(vlan);
1833 return -EINVAL;
1834 }
1835 vlan->configured = true;
1836
1837 /* vlan0 filter isn't consuming out of our quota */
1838 if (vlan->vid != 0)
1839 edev->configured_vlans++;
1840 } else {
1841 /* Out of quota; Activate accept-any-VLAN mode */
1842 if (!edev->non_configured_vlans)
1843 qede_config_accept_any_vlan(edev, true);
1844
1845 edev->non_configured_vlans++;
1846 }
1847
1848 list_add(&vlan->list, &edev->vlan_list);
1849
1850 return 0;
1851}
1852
1853static void qede_del_vlan_from_list(struct qede_dev *edev,
1854 struct qede_vlan *vlan)
1855{
1856 /* vlan0 filter isn't consuming out of our quota */
1857 if (vlan->vid != 0) {
1858 if (vlan->configured)
1859 edev->configured_vlans--;
1860 else
1861 edev->non_configured_vlans--;
1862 }
1863
1864 list_del(&vlan->list);
1865 kfree(vlan);
1866}
1867
1868static int qede_configure_vlan_filters(struct qede_dev *edev)
1869{
1870 int rc = 0, real_rc = 0, accept_any_vlan = 0;
1871 struct qed_dev_eth_info *dev_info;
1872 struct qede_vlan *vlan = NULL;
1873
1874 if (list_empty(&edev->vlan_list))
1875 return 0;
1876
1877 dev_info = &edev->dev_info;
1878
1879 /* Configure non-configured vlans */
1880 list_for_each_entry(vlan, &edev->vlan_list, list) {
1881 if (vlan->configured)
1882 continue;
1883
1884 /* We have used all our credits, now enable accept_any_vlan */
1885 if ((vlan->vid != 0) &&
1886 (edev->configured_vlans == dev_info->num_vlan_filters)) {
1887 accept_any_vlan = 1;
1888 continue;
1889 }
1890
1891 DP_VERBOSE(edev, NETIF_MSG_IFUP, "Adding vlan %d\n", vlan->vid);
1892
1893 rc = qede_set_ucast_rx_vlan(edev, QED_FILTER_XCAST_TYPE_ADD,
1894 vlan->vid);
1895 if (rc) {
1896 DP_ERR(edev, "Failed to configure VLAN %u\n",
1897 vlan->vid);
1898 real_rc = rc;
1899 continue;
1900 }
1901
1902 vlan->configured = true;
1903 /* vlan0 filter doesn't consume our VLAN filter's quota */
1904 if (vlan->vid != 0) {
1905 edev->non_configured_vlans--;
1906 edev->configured_vlans++;
1907 }
1908 }
1909
1910 /* enable accept_any_vlan mode if we have more VLANs than credits,
1911 * or remove accept_any_vlan mode if we've actually removed
1912 * a non-configured vlan, and all remaining vlans are truly configured.
1913 */
1914
1915 if (accept_any_vlan)
1916 qede_config_accept_any_vlan(edev, true);
1917 else if (!edev->non_configured_vlans)
1918 qede_config_accept_any_vlan(edev, false);
1919
1920 return real_rc;
1921}
1922
1923static int qede_vlan_rx_kill_vid(struct net_device *dev, __be16 proto, u16 vid)
1924{
1925 struct qede_dev *edev = netdev_priv(dev);
1926 struct qede_vlan *vlan = NULL;
1927 int rc;
1928
1929 DP_VERBOSE(edev, NETIF_MSG_IFDOWN, "Removing vlan 0x%04x\n", vid);
1930
1931 /* Find whether entry exists */
1932 list_for_each_entry(vlan, &edev->vlan_list, list)
1933 if (vlan->vid == vid)
1934 break;
1935
1936 if (!vlan || (vlan->vid != vid)) {
1937 DP_VERBOSE(edev, (NETIF_MSG_IFUP | NETIF_MSG_IFDOWN),
1938 "Vlan isn't configured\n");
1939 return 0;
1940 }
1941
1942 if (edev->state != QEDE_STATE_OPEN) {
1943 /* As interface is already down, we don't have a VPORT
1944 * instance to remove vlan filter. So just update vlan list
1945 */
1946 DP_VERBOSE(edev, NETIF_MSG_IFDOWN,
1947 "Interface is down, removing VLAN from list only\n");
1948 qede_del_vlan_from_list(edev, vlan);
1949 return 0;
1950 }
1951
1952 /* Remove vlan */
1953 rc = qede_set_ucast_rx_vlan(edev, QED_FILTER_XCAST_TYPE_DEL, vid);
1954 if (rc) {
1955 DP_ERR(edev, "Failed to remove VLAN %d\n", vid);
1956 return -EINVAL;
1957 }
1958
1959 qede_del_vlan_from_list(edev, vlan);
1960
1961 /* We have removed a VLAN - try to see if we can
1962 * configure non-configured VLAN from the list.
1963 */
1964 rc = qede_configure_vlan_filters(edev);
1965
1966 return rc;
1967}
1968
1969static void qede_vlan_mark_nonconfigured(struct qede_dev *edev)
1970{
1971 struct qede_vlan *vlan = NULL;
1972
1973 if (list_empty(&edev->vlan_list))
1974 return;
1975
1976 list_for_each_entry(vlan, &edev->vlan_list, list) {
1977 if (!vlan->configured)
1978 continue;
1979
1980 vlan->configured = false;
1981
1982 /* vlan0 filter isn't consuming out of our quota */
1983 if (vlan->vid != 0) {
1984 edev->non_configured_vlans++;
1985 edev->configured_vlans--;
1986 }
1987
1988 DP_VERBOSE(edev, NETIF_MSG_IFDOWN,
1989 "marked vlan %d as non-configured\n",
1990 vlan->vid);
1991 }
1992
1993 edev->accept_any_vlan = false;
1994}
1995
Manish Choprab18e1702016-04-14 01:38:30 -04001996#ifdef CONFIG_QEDE_VXLAN
1997static void qede_add_vxlan_port(struct net_device *dev,
1998 sa_family_t sa_family, __be16 port)
1999{
2000 struct qede_dev *edev = netdev_priv(dev);
2001 u16 t_port = ntohs(port);
2002
2003 if (edev->vxlan_dst_port)
2004 return;
2005
2006 edev->vxlan_dst_port = t_port;
2007
2008 DP_VERBOSE(edev, QED_MSG_DEBUG, "Added vxlan port=%d", t_port);
2009
2010 set_bit(QEDE_SP_VXLAN_PORT_CONFIG, &edev->sp_flags);
2011 schedule_delayed_work(&edev->sp_task, 0);
2012}
2013
2014static void qede_del_vxlan_port(struct net_device *dev,
2015 sa_family_t sa_family, __be16 port)
2016{
2017 struct qede_dev *edev = netdev_priv(dev);
2018 u16 t_port = ntohs(port);
2019
2020 if (t_port != edev->vxlan_dst_port)
2021 return;
2022
2023 edev->vxlan_dst_port = 0;
2024
2025 DP_VERBOSE(edev, QED_MSG_DEBUG, "Deleted vxlan port=%d", t_port);
2026
2027 set_bit(QEDE_SP_VXLAN_PORT_CONFIG, &edev->sp_flags);
2028 schedule_delayed_work(&edev->sp_task, 0);
2029}
2030#endif
2031
Manish Chopra9a109dd2016-04-14 01:38:31 -04002032#ifdef CONFIG_QEDE_GENEVE
2033static void qede_add_geneve_port(struct net_device *dev,
2034 sa_family_t sa_family, __be16 port)
2035{
2036 struct qede_dev *edev = netdev_priv(dev);
2037 u16 t_port = ntohs(port);
2038
2039 if (edev->geneve_dst_port)
2040 return;
2041
2042 edev->geneve_dst_port = t_port;
2043
2044 DP_VERBOSE(edev, QED_MSG_DEBUG, "Added geneve port=%d", t_port);
2045 set_bit(QEDE_SP_GENEVE_PORT_CONFIG, &edev->sp_flags);
2046 schedule_delayed_work(&edev->sp_task, 0);
2047}
2048
2049static void qede_del_geneve_port(struct net_device *dev,
2050 sa_family_t sa_family, __be16 port)
2051{
2052 struct qede_dev *edev = netdev_priv(dev);
2053 u16 t_port = ntohs(port);
2054
2055 if (t_port != edev->geneve_dst_port)
2056 return;
2057
2058 edev->geneve_dst_port = 0;
2059
2060 DP_VERBOSE(edev, QED_MSG_DEBUG, "Deleted geneve port=%d", t_port);
2061 set_bit(QEDE_SP_GENEVE_PORT_CONFIG, &edev->sp_flags);
2062 schedule_delayed_work(&edev->sp_task, 0);
2063}
2064#endif
2065
Yuval Mintz29502192015-10-26 11:02:29 +02002066static const struct net_device_ops qede_netdev_ops = {
2067 .ndo_open = qede_open,
2068 .ndo_stop = qede_close,
2069 .ndo_start_xmit = qede_start_xmit,
Sudarsana Kalluru0d8e0aa2015-10-26 11:02:30 +02002070 .ndo_set_rx_mode = qede_set_rx_mode,
2071 .ndo_set_mac_address = qede_set_mac_addr,
Yuval Mintz29502192015-10-26 11:02:29 +02002072 .ndo_validate_addr = eth_validate_addr,
Sudarsana Kalluru133fac02015-10-26 11:02:34 +02002073 .ndo_change_mtu = qede_change_mtu,
Sudarsana Reddy Kalluru7c1bfca2016-02-18 17:00:40 +02002074 .ndo_vlan_rx_add_vid = qede_vlan_rx_add_vid,
2075 .ndo_vlan_rx_kill_vid = qede_vlan_rx_kill_vid,
Sudarsana Kalluru133fac02015-10-26 11:02:34 +02002076 .ndo_get_stats64 = qede_get_stats64,
Manish Choprab18e1702016-04-14 01:38:30 -04002077#ifdef CONFIG_QEDE_VXLAN
2078 .ndo_add_vxlan_port = qede_add_vxlan_port,
2079 .ndo_del_vxlan_port = qede_del_vxlan_port,
2080#endif
Manish Chopra9a109dd2016-04-14 01:38:31 -04002081#ifdef CONFIG_QEDE_GENEVE
2082 .ndo_add_geneve_port = qede_add_geneve_port,
2083 .ndo_del_geneve_port = qede_del_geneve_port,
2084#endif
Yuval Mintz29502192015-10-26 11:02:29 +02002085};
2086
2087/* -------------------------------------------------------------------------
Yuval Mintze712d522015-10-26 11:02:27 +02002088 * START OF PROBE / REMOVE
2089 * -------------------------------------------------------------------------
2090 */
2091
2092static struct qede_dev *qede_alloc_etherdev(struct qed_dev *cdev,
2093 struct pci_dev *pdev,
2094 struct qed_dev_eth_info *info,
2095 u32 dp_module,
2096 u8 dp_level)
2097{
2098 struct net_device *ndev;
2099 struct qede_dev *edev;
2100
2101 ndev = alloc_etherdev_mqs(sizeof(*edev),
2102 info->num_queues,
2103 info->num_queues);
2104 if (!ndev) {
2105 pr_err("etherdev allocation failed\n");
2106 return NULL;
2107 }
2108
2109 edev = netdev_priv(ndev);
2110 edev->ndev = ndev;
2111 edev->cdev = cdev;
2112 edev->pdev = pdev;
2113 edev->dp_module = dp_module;
2114 edev->dp_level = dp_level;
2115 edev->ops = qed_ops;
Yuval Mintz29502192015-10-26 11:02:29 +02002116 edev->q_num_rx_buffers = NUM_RX_BDS_DEF;
2117 edev->q_num_tx_buffers = NUM_TX_BDS_DEF;
Yuval Mintze712d522015-10-26 11:02:27 +02002118
Yuval Mintze712d522015-10-26 11:02:27 +02002119 SET_NETDEV_DEV(ndev, &pdev->dev);
2120
Sudarsana Kalluru133fac02015-10-26 11:02:34 +02002121 memset(&edev->stats, 0, sizeof(edev->stats));
Yuval Mintze712d522015-10-26 11:02:27 +02002122 memcpy(&edev->dev_info, info, sizeof(*info));
2123
2124 edev->num_tc = edev->dev_info.num_tc;
2125
Sudarsana Reddy Kalluru7c1bfca2016-02-18 17:00:40 +02002126 INIT_LIST_HEAD(&edev->vlan_list);
2127
Yuval Mintze712d522015-10-26 11:02:27 +02002128 return edev;
2129}
2130
2131static void qede_init_ndev(struct qede_dev *edev)
2132{
2133 struct net_device *ndev = edev->ndev;
2134 struct pci_dev *pdev = edev->pdev;
2135 u32 hw_features;
2136
2137 pci_set_drvdata(pdev, ndev);
2138
2139 ndev->mem_start = edev->dev_info.common.pci_mem_start;
2140 ndev->base_addr = ndev->mem_start;
2141 ndev->mem_end = edev->dev_info.common.pci_mem_end;
2142 ndev->irq = edev->dev_info.common.pci_irq;
2143
2144 ndev->watchdog_timeo = TX_TIMEOUT;
2145
Yuval Mintz29502192015-10-26 11:02:29 +02002146 ndev->netdev_ops = &qede_netdev_ops;
2147
Sudarsana Kalluru133fac02015-10-26 11:02:34 +02002148 qede_set_ethtool_ops(ndev);
2149
Yuval Mintze712d522015-10-26 11:02:27 +02002150 /* user-changeble features */
2151 hw_features = NETIF_F_GRO | NETIF_F_SG |
2152 NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM |
2153 NETIF_F_TSO | NETIF_F_TSO6;
2154
Manish Chopra14db81d2016-04-14 01:38:33 -04002155 /* Encap features*/
2156 hw_features |= NETIF_F_GSO_GRE | NETIF_F_GSO_UDP_TUNNEL |
2157 NETIF_F_TSO_ECN;
2158 ndev->hw_enc_features = NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM |
2159 NETIF_F_SG | NETIF_F_TSO | NETIF_F_TSO_ECN |
2160 NETIF_F_TSO6 | NETIF_F_GSO_GRE |
2161 NETIF_F_GSO_UDP_TUNNEL | NETIF_F_RXCSUM;
2162
Yuval Mintze712d522015-10-26 11:02:27 +02002163 ndev->vlan_features = hw_features | NETIF_F_RXHASH | NETIF_F_RXCSUM |
2164 NETIF_F_HIGHDMA;
2165 ndev->features = hw_features | NETIF_F_RXHASH | NETIF_F_RXCSUM |
2166 NETIF_F_HW_VLAN_CTAG_RX | NETIF_F_HIGHDMA |
Sudarsana Reddy Kalluru7c1bfca2016-02-18 17:00:40 +02002167 NETIF_F_HW_VLAN_CTAG_FILTER | NETIF_F_HW_VLAN_CTAG_TX;
Yuval Mintze712d522015-10-26 11:02:27 +02002168
2169 ndev->hw_features = hw_features;
2170
2171 /* Set network device HW mac */
2172 ether_addr_copy(edev->ndev->dev_addr, edev->dev_info.common.hw_mac);
2173}
2174
2175/* This function converts from 32b param to two params of level and module
2176 * Input 32b decoding:
2177 * b31 - enable all NOTICE prints. NOTICE prints are for deviation from the
2178 * 'happy' flow, e.g. memory allocation failed.
2179 * b30 - enable all INFO prints. INFO prints are for major steps in the flow
2180 * and provide important parameters.
2181 * b29-b0 - per-module bitmap, where each bit enables VERBOSE prints of that
2182 * module. VERBOSE prints are for tracking the specific flow in low level.
2183 *
2184 * Notice that the level should be that of the lowest required logs.
2185 */
Sudarsana Kalluru133fac02015-10-26 11:02:34 +02002186void qede_config_debug(uint debug, u32 *p_dp_module, u8 *p_dp_level)
Yuval Mintze712d522015-10-26 11:02:27 +02002187{
2188 *p_dp_level = QED_LEVEL_NOTICE;
2189 *p_dp_module = 0;
2190
2191 if (debug & QED_LOG_VERBOSE_MASK) {
2192 *p_dp_level = QED_LEVEL_VERBOSE;
2193 *p_dp_module = (debug & 0x3FFFFFFF);
2194 } else if (debug & QED_LOG_INFO_MASK) {
2195 *p_dp_level = QED_LEVEL_INFO;
2196 } else if (debug & QED_LOG_NOTICE_MASK) {
2197 *p_dp_level = QED_LEVEL_NOTICE;
2198 }
2199}
2200
Yuval Mintz29502192015-10-26 11:02:29 +02002201static void qede_free_fp_array(struct qede_dev *edev)
2202{
2203 if (edev->fp_array) {
2204 struct qede_fastpath *fp;
2205 int i;
2206
2207 for_each_rss(i) {
2208 fp = &edev->fp_array[i];
2209
2210 kfree(fp->sb_info);
2211 kfree(fp->rxq);
2212 kfree(fp->txqs);
2213 }
2214 kfree(edev->fp_array);
2215 }
2216 edev->num_rss = 0;
2217}
2218
2219static int qede_alloc_fp_array(struct qede_dev *edev)
2220{
2221 struct qede_fastpath *fp;
2222 int i;
2223
2224 edev->fp_array = kcalloc(QEDE_RSS_CNT(edev),
2225 sizeof(*edev->fp_array), GFP_KERNEL);
2226 if (!edev->fp_array) {
2227 DP_NOTICE(edev, "fp array allocation failed\n");
2228 goto err;
2229 }
2230
2231 for_each_rss(i) {
2232 fp = &edev->fp_array[i];
2233
2234 fp->sb_info = kcalloc(1, sizeof(*fp->sb_info), GFP_KERNEL);
2235 if (!fp->sb_info) {
2236 DP_NOTICE(edev, "sb info struct allocation failed\n");
2237 goto err;
2238 }
2239
2240 fp->rxq = kcalloc(1, sizeof(*fp->rxq), GFP_KERNEL);
2241 if (!fp->rxq) {
2242 DP_NOTICE(edev, "RXQ struct allocation failed\n");
2243 goto err;
2244 }
2245
2246 fp->txqs = kcalloc(edev->num_tc, sizeof(*fp->txqs), GFP_KERNEL);
2247 if (!fp->txqs) {
2248 DP_NOTICE(edev, "TXQ array allocation failed\n");
2249 goto err;
2250 }
2251 }
2252
2253 return 0;
2254err:
2255 qede_free_fp_array(edev);
2256 return -ENOMEM;
2257}
2258
Sudarsana Kalluru0d8e0aa2015-10-26 11:02:30 +02002259static void qede_sp_task(struct work_struct *work)
2260{
2261 struct qede_dev *edev = container_of(work, struct qede_dev,
2262 sp_task.work);
Manish Choprab18e1702016-04-14 01:38:30 -04002263 struct qed_dev *cdev = edev->cdev;
2264
Sudarsana Kalluru0d8e0aa2015-10-26 11:02:30 +02002265 mutex_lock(&edev->qede_lock);
2266
2267 if (edev->state == QEDE_STATE_OPEN) {
2268 if (test_and_clear_bit(QEDE_SP_RX_MODE, &edev->sp_flags))
2269 qede_config_rx_mode(edev->ndev);
2270 }
2271
Manish Choprab18e1702016-04-14 01:38:30 -04002272 if (test_and_clear_bit(QEDE_SP_VXLAN_PORT_CONFIG, &edev->sp_flags)) {
2273 struct qed_tunn_params tunn_params;
2274
2275 memset(&tunn_params, 0, sizeof(tunn_params));
2276 tunn_params.update_vxlan_port = 1;
2277 tunn_params.vxlan_port = edev->vxlan_dst_port;
2278 qed_ops->tunn_config(cdev, &tunn_params);
2279 }
2280
Manish Chopra9a109dd2016-04-14 01:38:31 -04002281 if (test_and_clear_bit(QEDE_SP_GENEVE_PORT_CONFIG, &edev->sp_flags)) {
2282 struct qed_tunn_params tunn_params;
2283
2284 memset(&tunn_params, 0, sizeof(tunn_params));
2285 tunn_params.update_geneve_port = 1;
2286 tunn_params.geneve_port = edev->geneve_dst_port;
2287 qed_ops->tunn_config(cdev, &tunn_params);
2288 }
2289
Sudarsana Kalluru0d8e0aa2015-10-26 11:02:30 +02002290 mutex_unlock(&edev->qede_lock);
2291}
2292
Yuval Mintze712d522015-10-26 11:02:27 +02002293static void qede_update_pf_params(struct qed_dev *cdev)
2294{
2295 struct qed_pf_params pf_params;
2296
Sudarsana Reddy Kalluru8e0ddc02016-05-05 00:35:16 -04002297 /* 64 rx + 64 tx */
Yuval Mintze712d522015-10-26 11:02:27 +02002298 memset(&pf_params, 0, sizeof(struct qed_pf_params));
Sudarsana Reddy Kalluru8e0ddc02016-05-05 00:35:16 -04002299 pf_params.eth_pf_params.num_cons = 128;
Yuval Mintze712d522015-10-26 11:02:27 +02002300 qed_ops->common->update_pf_params(cdev, &pf_params);
2301}
2302
2303enum qede_probe_mode {
2304 QEDE_PROBE_NORMAL,
2305};
2306
2307static int __qede_probe(struct pci_dev *pdev, u32 dp_module, u8 dp_level,
Yuval Mintz1408cc1f2016-05-11 16:36:14 +03002308 bool is_vf, enum qede_probe_mode mode)
Yuval Mintze712d522015-10-26 11:02:27 +02002309{
Yuval Mintz1408cc1f2016-05-11 16:36:14 +03002310 struct qed_probe_params probe_params;
Yuval Mintze712d522015-10-26 11:02:27 +02002311 struct qed_slowpath_params params;
2312 struct qed_dev_eth_info dev_info;
2313 struct qede_dev *edev;
2314 struct qed_dev *cdev;
2315 int rc;
2316
2317 if (unlikely(dp_level & QED_LEVEL_INFO))
2318 pr_notice("Starting qede probe\n");
2319
Yuval Mintz1408cc1f2016-05-11 16:36:14 +03002320 memset(&probe_params, 0, sizeof(probe_params));
2321 probe_params.protocol = QED_PROTOCOL_ETH;
2322 probe_params.dp_module = dp_module;
2323 probe_params.dp_level = dp_level;
2324 probe_params.is_vf = is_vf;
2325 cdev = qed_ops->common->probe(pdev, &probe_params);
Yuval Mintze712d522015-10-26 11:02:27 +02002326 if (!cdev) {
2327 rc = -ENODEV;
2328 goto err0;
2329 }
2330
2331 qede_update_pf_params(cdev);
2332
2333 /* Start the Slowpath-process */
2334 memset(&params, 0, sizeof(struct qed_slowpath_params));
2335 params.int_mode = QED_INT_MODE_MSIX;
2336 params.drv_major = QEDE_MAJOR_VERSION;
2337 params.drv_minor = QEDE_MINOR_VERSION;
2338 params.drv_rev = QEDE_REVISION_VERSION;
2339 params.drv_eng = QEDE_ENGINEERING_VERSION;
2340 strlcpy(params.name, "qede LAN", QED_DRV_VER_STR_SIZE);
2341 rc = qed_ops->common->slowpath_start(cdev, &params);
2342 if (rc) {
2343 pr_notice("Cannot start slowpath\n");
2344 goto err1;
2345 }
2346
2347 /* Learn information crucial for qede to progress */
2348 rc = qed_ops->fill_dev_info(cdev, &dev_info);
2349 if (rc)
2350 goto err2;
2351
2352 edev = qede_alloc_etherdev(cdev, pdev, &dev_info, dp_module,
2353 dp_level);
2354 if (!edev) {
2355 rc = -ENOMEM;
2356 goto err2;
2357 }
2358
Yuval Mintzfefb0202016-05-11 16:36:19 +03002359 if (is_vf)
2360 edev->flags |= QEDE_FLAG_IS_VF;
2361
Yuval Mintze712d522015-10-26 11:02:27 +02002362 qede_init_ndev(edev);
2363
Yuval Mintz29502192015-10-26 11:02:29 +02002364 rc = register_netdev(edev->ndev);
2365 if (rc) {
2366 DP_NOTICE(edev, "Cannot register net-device\n");
2367 goto err3;
2368 }
2369
Yuval Mintze712d522015-10-26 11:02:27 +02002370 edev->ops->common->set_id(cdev, edev->ndev->name, DRV_MODULE_VERSION);
2371
Sudarsana Kallurua2ec6172015-10-26 11:02:32 +02002372 edev->ops->register_ops(cdev, &qede_ll_ops, edev);
2373
Sudarsana Kalluru0d8e0aa2015-10-26 11:02:30 +02002374 INIT_DELAYED_WORK(&edev->sp_task, qede_sp_task);
2375 mutex_init(&edev->qede_lock);
2376
Yuval Mintze712d522015-10-26 11:02:27 +02002377 DP_INFO(edev, "Ending successfully qede probe\n");
2378
2379 return 0;
2380
Yuval Mintz29502192015-10-26 11:02:29 +02002381err3:
2382 free_netdev(edev->ndev);
Yuval Mintze712d522015-10-26 11:02:27 +02002383err2:
2384 qed_ops->common->slowpath_stop(cdev);
2385err1:
2386 qed_ops->common->remove(cdev);
2387err0:
2388 return rc;
2389}
2390
2391static int qede_probe(struct pci_dev *pdev, const struct pci_device_id *id)
2392{
Yuval Mintzfefb0202016-05-11 16:36:19 +03002393 bool is_vf = false;
Yuval Mintze712d522015-10-26 11:02:27 +02002394 u32 dp_module = 0;
2395 u8 dp_level = 0;
2396
Yuval Mintzfefb0202016-05-11 16:36:19 +03002397 switch ((enum qede_pci_private)id->driver_data) {
2398 case QEDE_PRIVATE_VF:
2399 if (debug & QED_LOG_VERBOSE_MASK)
2400 dev_err(&pdev->dev, "Probing a VF\n");
2401 is_vf = true;
2402 break;
2403 default:
2404 if (debug & QED_LOG_VERBOSE_MASK)
2405 dev_err(&pdev->dev, "Probing a PF\n");
2406 }
2407
Yuval Mintze712d522015-10-26 11:02:27 +02002408 qede_config_debug(debug, &dp_module, &dp_level);
2409
Yuval Mintzfefb0202016-05-11 16:36:19 +03002410 return __qede_probe(pdev, dp_module, dp_level, is_vf,
Yuval Mintze712d522015-10-26 11:02:27 +02002411 QEDE_PROBE_NORMAL);
2412}
2413
2414enum qede_remove_mode {
2415 QEDE_REMOVE_NORMAL,
2416};
2417
2418static void __qede_remove(struct pci_dev *pdev, enum qede_remove_mode mode)
2419{
2420 struct net_device *ndev = pci_get_drvdata(pdev);
2421 struct qede_dev *edev = netdev_priv(ndev);
2422 struct qed_dev *cdev = edev->cdev;
2423
2424 DP_INFO(edev, "Starting qede_remove\n");
2425
Sudarsana Kalluru0d8e0aa2015-10-26 11:02:30 +02002426 cancel_delayed_work_sync(&edev->sp_task);
Yuval Mintz29502192015-10-26 11:02:29 +02002427 unregister_netdev(ndev);
2428
Yuval Mintze712d522015-10-26 11:02:27 +02002429 edev->ops->common->set_power_state(cdev, PCI_D0);
2430
2431 pci_set_drvdata(pdev, NULL);
2432
2433 free_netdev(ndev);
2434
2435 /* Use global ops since we've freed edev */
2436 qed_ops->common->slowpath_stop(cdev);
2437 qed_ops->common->remove(cdev);
2438
2439 pr_notice("Ending successfully qede_remove\n");
2440}
2441
2442static void qede_remove(struct pci_dev *pdev)
2443{
2444 __qede_remove(pdev, QEDE_REMOVE_NORMAL);
2445}
Yuval Mintz29502192015-10-26 11:02:29 +02002446
2447/* -------------------------------------------------------------------------
2448 * START OF LOAD / UNLOAD
2449 * -------------------------------------------------------------------------
2450 */
2451
2452static int qede_set_num_queues(struct qede_dev *edev)
2453{
2454 int rc;
2455 u16 rss_num;
2456
2457 /* Setup queues according to possible resources*/
Sudarsana Kalluru8edf0492015-11-30 12:25:01 +02002458 if (edev->req_rss)
2459 rss_num = edev->req_rss;
2460 else
2461 rss_num = netif_get_num_default_rss_queues() *
2462 edev->dev_info.common.num_hwfns;
Yuval Mintz29502192015-10-26 11:02:29 +02002463
2464 rss_num = min_t(u16, QEDE_MAX_RSS_CNT(edev), rss_num);
2465
2466 rc = edev->ops->common->set_fp_int(edev->cdev, rss_num);
2467 if (rc > 0) {
2468 /* Managed to request interrupts for our queues */
2469 edev->num_rss = rc;
2470 DP_INFO(edev, "Managed %d [of %d] RSS queues\n",
2471 QEDE_RSS_CNT(edev), rss_num);
2472 rc = 0;
2473 }
2474 return rc;
2475}
2476
2477static void qede_free_mem_sb(struct qede_dev *edev,
2478 struct qed_sb_info *sb_info)
2479{
2480 if (sb_info->sb_virt)
2481 dma_free_coherent(&edev->pdev->dev, sizeof(*sb_info->sb_virt),
2482 (void *)sb_info->sb_virt, sb_info->sb_phys);
2483}
2484
2485/* This function allocates fast-path status block memory */
2486static int qede_alloc_mem_sb(struct qede_dev *edev,
2487 struct qed_sb_info *sb_info,
2488 u16 sb_id)
2489{
2490 struct status_block *sb_virt;
2491 dma_addr_t sb_phys;
2492 int rc;
2493
2494 sb_virt = dma_alloc_coherent(&edev->pdev->dev,
2495 sizeof(*sb_virt),
2496 &sb_phys, GFP_KERNEL);
2497 if (!sb_virt) {
2498 DP_ERR(edev, "Status block allocation failed\n");
2499 return -ENOMEM;
2500 }
2501
2502 rc = edev->ops->common->sb_init(edev->cdev, sb_info,
2503 sb_virt, sb_phys, sb_id,
2504 QED_SB_TYPE_L2_QUEUE);
2505 if (rc) {
2506 DP_ERR(edev, "Status block initialization failed\n");
2507 dma_free_coherent(&edev->pdev->dev, sizeof(*sb_virt),
2508 sb_virt, sb_phys);
2509 return rc;
2510 }
2511
2512 return 0;
2513}
2514
2515static void qede_free_rx_buffers(struct qede_dev *edev,
2516 struct qede_rx_queue *rxq)
2517{
2518 u16 i;
2519
2520 for (i = rxq->sw_rx_cons; i != rxq->sw_rx_prod; i++) {
2521 struct sw_rx_data *rx_buf;
Yuval Mintzfc48b7a2016-02-15 13:22:35 -05002522 struct page *data;
Yuval Mintz29502192015-10-26 11:02:29 +02002523
2524 rx_buf = &rxq->sw_rx_ring[i & NUM_RX_BDS_MAX];
2525 data = rx_buf->data;
2526
Yuval Mintzfc48b7a2016-02-15 13:22:35 -05002527 dma_unmap_page(&edev->pdev->dev,
2528 rx_buf->mapping,
2529 PAGE_SIZE, DMA_FROM_DEVICE);
Yuval Mintz29502192015-10-26 11:02:29 +02002530
2531 rx_buf->data = NULL;
Yuval Mintzfc48b7a2016-02-15 13:22:35 -05002532 __free_page(data);
Yuval Mintz29502192015-10-26 11:02:29 +02002533 }
2534}
2535
Manish Chopra55482ed2016-03-04 12:35:06 -05002536static void qede_free_sge_mem(struct qede_dev *edev,
2537 struct qede_rx_queue *rxq) {
2538 int i;
2539
2540 if (edev->gro_disable)
2541 return;
2542
2543 for (i = 0; i < ETH_TPA_MAX_AGGS_NUM; i++) {
2544 struct qede_agg_info *tpa_info = &rxq->tpa_info[i];
2545 struct sw_rx_data *replace_buf = &tpa_info->replace_buf;
2546
Manish Chopraf86af2d2016-04-20 03:03:27 -04002547 if (replace_buf->data) {
Manish Chopra55482ed2016-03-04 12:35:06 -05002548 dma_unmap_page(&edev->pdev->dev,
2549 dma_unmap_addr(replace_buf, mapping),
2550 PAGE_SIZE, DMA_FROM_DEVICE);
2551 __free_page(replace_buf->data);
2552 }
2553 }
2554}
2555
Yuval Mintz29502192015-10-26 11:02:29 +02002556static void qede_free_mem_rxq(struct qede_dev *edev,
2557 struct qede_rx_queue *rxq)
2558{
Manish Chopra55482ed2016-03-04 12:35:06 -05002559 qede_free_sge_mem(edev, rxq);
2560
Yuval Mintz29502192015-10-26 11:02:29 +02002561 /* Free rx buffers */
2562 qede_free_rx_buffers(edev, rxq);
2563
2564 /* Free the parallel SW ring */
2565 kfree(rxq->sw_rx_ring);
2566
2567 /* Free the real RQ ring used by FW */
2568 edev->ops->common->chain_free(edev->cdev, &rxq->rx_bd_ring);
2569 edev->ops->common->chain_free(edev->cdev, &rxq->rx_comp_ring);
2570}
2571
2572static int qede_alloc_rx_buffer(struct qede_dev *edev,
2573 struct qede_rx_queue *rxq)
2574{
2575 struct sw_rx_data *sw_rx_data;
2576 struct eth_rx_bd *rx_bd;
2577 dma_addr_t mapping;
Yuval Mintzfc48b7a2016-02-15 13:22:35 -05002578 struct page *data;
Yuval Mintz29502192015-10-26 11:02:29 +02002579 u16 rx_buf_size;
Yuval Mintz29502192015-10-26 11:02:29 +02002580
2581 rx_buf_size = rxq->rx_buf_size;
2582
Yuval Mintzfc48b7a2016-02-15 13:22:35 -05002583 data = alloc_pages(GFP_ATOMIC, 0);
Yuval Mintz29502192015-10-26 11:02:29 +02002584 if (unlikely(!data)) {
Yuval Mintzfc48b7a2016-02-15 13:22:35 -05002585 DP_NOTICE(edev, "Failed to allocate Rx data [page]\n");
Yuval Mintz29502192015-10-26 11:02:29 +02002586 return -ENOMEM;
2587 }
2588
Yuval Mintzfc48b7a2016-02-15 13:22:35 -05002589 /* Map the entire page as it would be used
2590 * for multiple RX buffer segment size mapping.
2591 */
2592 mapping = dma_map_page(&edev->pdev->dev, data, 0,
2593 PAGE_SIZE, DMA_FROM_DEVICE);
Yuval Mintz29502192015-10-26 11:02:29 +02002594 if (unlikely(dma_mapping_error(&edev->pdev->dev, mapping))) {
Yuval Mintzfc48b7a2016-02-15 13:22:35 -05002595 __free_page(data);
Yuval Mintz29502192015-10-26 11:02:29 +02002596 DP_NOTICE(edev, "Failed to map Rx buffer\n");
2597 return -ENOMEM;
2598 }
2599
2600 sw_rx_data = &rxq->sw_rx_ring[rxq->sw_rx_prod & NUM_RX_BDS_MAX];
Yuval Mintzfc48b7a2016-02-15 13:22:35 -05002601 sw_rx_data->page_offset = 0;
Yuval Mintz29502192015-10-26 11:02:29 +02002602 sw_rx_data->data = data;
Yuval Mintzfc48b7a2016-02-15 13:22:35 -05002603 sw_rx_data->mapping = mapping;
Yuval Mintz29502192015-10-26 11:02:29 +02002604
2605 /* Advance PROD and get BD pointer */
2606 rx_bd = (struct eth_rx_bd *)qed_chain_produce(&rxq->rx_bd_ring);
2607 WARN_ON(!rx_bd);
2608 rx_bd->addr.hi = cpu_to_le32(upper_32_bits(mapping));
2609 rx_bd->addr.lo = cpu_to_le32(lower_32_bits(mapping));
2610
2611 rxq->sw_rx_prod++;
2612
2613 return 0;
2614}
2615
Manish Chopra55482ed2016-03-04 12:35:06 -05002616static int qede_alloc_sge_mem(struct qede_dev *edev,
2617 struct qede_rx_queue *rxq)
2618{
2619 dma_addr_t mapping;
2620 int i;
2621
2622 if (edev->gro_disable)
2623 return 0;
2624
2625 if (edev->ndev->mtu > PAGE_SIZE) {
2626 edev->gro_disable = 1;
2627 return 0;
2628 }
2629
2630 for (i = 0; i < ETH_TPA_MAX_AGGS_NUM; i++) {
2631 struct qede_agg_info *tpa_info = &rxq->tpa_info[i];
2632 struct sw_rx_data *replace_buf = &tpa_info->replace_buf;
2633
2634 replace_buf->data = alloc_pages(GFP_ATOMIC, 0);
2635 if (unlikely(!replace_buf->data)) {
2636 DP_NOTICE(edev,
2637 "Failed to allocate TPA skb pool [replacement buffer]\n");
2638 goto err;
2639 }
2640
2641 mapping = dma_map_page(&edev->pdev->dev, replace_buf->data, 0,
2642 rxq->rx_buf_size, DMA_FROM_DEVICE);
2643 if (unlikely(dma_mapping_error(&edev->pdev->dev, mapping))) {
2644 DP_NOTICE(edev,
2645 "Failed to map TPA replacement buffer\n");
2646 goto err;
2647 }
2648
2649 dma_unmap_addr_set(replace_buf, mapping, mapping);
2650 tpa_info->replace_buf.page_offset = 0;
2651
2652 tpa_info->replace_buf_mapping = mapping;
2653 tpa_info->agg_state = QEDE_AGG_STATE_NONE;
2654 }
2655
2656 return 0;
2657err:
2658 qede_free_sge_mem(edev, rxq);
2659 edev->gro_disable = 1;
2660 return -ENOMEM;
2661}
2662
Yuval Mintz29502192015-10-26 11:02:29 +02002663/* This function allocates all memory needed per Rx queue */
2664static int qede_alloc_mem_rxq(struct qede_dev *edev,
2665 struct qede_rx_queue *rxq)
2666{
Manish Chopraf86af2d2016-04-20 03:03:27 -04002667 int i, rc, size;
Yuval Mintz29502192015-10-26 11:02:29 +02002668
2669 rxq->num_rx_buffers = edev->q_num_rx_buffers;
2670
Yuval Mintzfc48b7a2016-02-15 13:22:35 -05002671 rxq->rx_buf_size = NET_IP_ALIGN + ETH_OVERHEAD +
2672 edev->ndev->mtu;
2673 if (rxq->rx_buf_size > PAGE_SIZE)
2674 rxq->rx_buf_size = PAGE_SIZE;
2675
2676 /* Segment size to spilt a page in multiple equal parts */
2677 rxq->rx_buf_seg_size = roundup_pow_of_two(rxq->rx_buf_size);
Yuval Mintz29502192015-10-26 11:02:29 +02002678
2679 /* Allocate the parallel driver ring for Rx buffers */
Yuval Mintzfc48b7a2016-02-15 13:22:35 -05002680 size = sizeof(*rxq->sw_rx_ring) * RX_RING_SIZE;
Yuval Mintz29502192015-10-26 11:02:29 +02002681 rxq->sw_rx_ring = kzalloc(size, GFP_KERNEL);
2682 if (!rxq->sw_rx_ring) {
2683 DP_ERR(edev, "Rx buffers ring allocation failed\n");
Manish Chopraf86af2d2016-04-20 03:03:27 -04002684 rc = -ENOMEM;
Yuval Mintz29502192015-10-26 11:02:29 +02002685 goto err;
2686 }
2687
2688 /* Allocate FW Rx ring */
2689 rc = edev->ops->common->chain_alloc(edev->cdev,
2690 QED_CHAIN_USE_TO_CONSUME_PRODUCE,
2691 QED_CHAIN_MODE_NEXT_PTR,
Yuval Mintzfc48b7a2016-02-15 13:22:35 -05002692 RX_RING_SIZE,
Yuval Mintz29502192015-10-26 11:02:29 +02002693 sizeof(struct eth_rx_bd),
2694 &rxq->rx_bd_ring);
2695
2696 if (rc)
2697 goto err;
2698
2699 /* Allocate FW completion ring */
2700 rc = edev->ops->common->chain_alloc(edev->cdev,
2701 QED_CHAIN_USE_TO_CONSUME,
2702 QED_CHAIN_MODE_PBL,
Yuval Mintzfc48b7a2016-02-15 13:22:35 -05002703 RX_RING_SIZE,
Yuval Mintz29502192015-10-26 11:02:29 +02002704 sizeof(union eth_rx_cqe),
2705 &rxq->rx_comp_ring);
2706 if (rc)
2707 goto err;
2708
2709 /* Allocate buffers for the Rx ring */
2710 for (i = 0; i < rxq->num_rx_buffers; i++) {
2711 rc = qede_alloc_rx_buffer(edev, rxq);
Manish Chopraf86af2d2016-04-20 03:03:27 -04002712 if (rc) {
2713 DP_ERR(edev,
2714 "Rx buffers allocation failed at index %d\n", i);
2715 goto err;
2716 }
Yuval Mintz29502192015-10-26 11:02:29 +02002717 }
2718
Manish Chopraf86af2d2016-04-20 03:03:27 -04002719 rc = qede_alloc_sge_mem(edev, rxq);
Yuval Mintz29502192015-10-26 11:02:29 +02002720err:
Manish Chopraf86af2d2016-04-20 03:03:27 -04002721 return rc;
Yuval Mintz29502192015-10-26 11:02:29 +02002722}
2723
2724static void qede_free_mem_txq(struct qede_dev *edev,
2725 struct qede_tx_queue *txq)
2726{
2727 /* Free the parallel SW ring */
2728 kfree(txq->sw_tx_ring);
2729
2730 /* Free the real RQ ring used by FW */
2731 edev->ops->common->chain_free(edev->cdev, &txq->tx_pbl);
2732}
2733
2734/* This function allocates all memory needed per Tx queue */
2735static int qede_alloc_mem_txq(struct qede_dev *edev,
2736 struct qede_tx_queue *txq)
2737{
2738 int size, rc;
2739 union eth_tx_bd_types *p_virt;
2740
2741 txq->num_tx_buffers = edev->q_num_tx_buffers;
2742
2743 /* Allocate the parallel driver ring for Tx buffers */
2744 size = sizeof(*txq->sw_tx_ring) * NUM_TX_BDS_MAX;
2745 txq->sw_tx_ring = kzalloc(size, GFP_KERNEL);
2746 if (!txq->sw_tx_ring) {
2747 DP_NOTICE(edev, "Tx buffers ring allocation failed\n");
2748 goto err;
2749 }
2750
2751 rc = edev->ops->common->chain_alloc(edev->cdev,
2752 QED_CHAIN_USE_TO_CONSUME_PRODUCE,
2753 QED_CHAIN_MODE_PBL,
2754 NUM_TX_BDS_MAX,
2755 sizeof(*p_virt),
2756 &txq->tx_pbl);
2757 if (rc)
2758 goto err;
2759
2760 return 0;
2761
2762err:
2763 qede_free_mem_txq(edev, txq);
2764 return -ENOMEM;
2765}
2766
2767/* This function frees all memory of a single fp */
2768static void qede_free_mem_fp(struct qede_dev *edev,
2769 struct qede_fastpath *fp)
2770{
2771 int tc;
2772
2773 qede_free_mem_sb(edev, fp->sb_info);
2774
2775 qede_free_mem_rxq(edev, fp->rxq);
2776
2777 for (tc = 0; tc < edev->num_tc; tc++)
2778 qede_free_mem_txq(edev, &fp->txqs[tc]);
2779}
2780
2781/* This function allocates all memory needed for a single fp (i.e. an entity
2782 * which contains status block, one rx queue and multiple per-TC tx queues.
2783 */
2784static int qede_alloc_mem_fp(struct qede_dev *edev,
2785 struct qede_fastpath *fp)
2786{
2787 int rc, tc;
2788
2789 rc = qede_alloc_mem_sb(edev, fp->sb_info, fp->rss_id);
2790 if (rc)
2791 goto err;
2792
2793 rc = qede_alloc_mem_rxq(edev, fp->rxq);
2794 if (rc)
2795 goto err;
2796
2797 for (tc = 0; tc < edev->num_tc; tc++) {
2798 rc = qede_alloc_mem_txq(edev, &fp->txqs[tc]);
2799 if (rc)
2800 goto err;
2801 }
2802
2803 return 0;
Yuval Mintz29502192015-10-26 11:02:29 +02002804err:
Manish Chopraf86af2d2016-04-20 03:03:27 -04002805 return rc;
Yuval Mintz29502192015-10-26 11:02:29 +02002806}
2807
2808static void qede_free_mem_load(struct qede_dev *edev)
2809{
2810 int i;
2811
2812 for_each_rss(i) {
2813 struct qede_fastpath *fp = &edev->fp_array[i];
2814
2815 qede_free_mem_fp(edev, fp);
2816 }
2817}
2818
2819/* This function allocates all qede memory at NIC load. */
2820static int qede_alloc_mem_load(struct qede_dev *edev)
2821{
2822 int rc = 0, rss_id;
2823
2824 for (rss_id = 0; rss_id < QEDE_RSS_CNT(edev); rss_id++) {
2825 struct qede_fastpath *fp = &edev->fp_array[rss_id];
2826
2827 rc = qede_alloc_mem_fp(edev, fp);
Manish Chopraf86af2d2016-04-20 03:03:27 -04002828 if (rc) {
Yuval Mintz29502192015-10-26 11:02:29 +02002829 DP_ERR(edev,
Manish Chopraf86af2d2016-04-20 03:03:27 -04002830 "Failed to allocate memory for fastpath - rss id = %d\n",
2831 rss_id);
2832 qede_free_mem_load(edev);
2833 return rc;
Yuval Mintz29502192015-10-26 11:02:29 +02002834 }
Yuval Mintz29502192015-10-26 11:02:29 +02002835 }
2836
2837 return 0;
2838}
2839
2840/* This function inits fp content and resets the SB, RXQ and TXQ structures */
2841static void qede_init_fp(struct qede_dev *edev)
2842{
2843 int rss_id, txq_index, tc;
2844 struct qede_fastpath *fp;
2845
2846 for_each_rss(rss_id) {
2847 fp = &edev->fp_array[rss_id];
2848
2849 fp->edev = edev;
2850 fp->rss_id = rss_id;
2851
2852 memset((void *)&fp->napi, 0, sizeof(fp->napi));
2853
2854 memset((void *)fp->sb_info, 0, sizeof(*fp->sb_info));
2855
2856 memset((void *)fp->rxq, 0, sizeof(*fp->rxq));
2857 fp->rxq->rxq_id = rss_id;
2858
2859 memset((void *)fp->txqs, 0, (edev->num_tc * sizeof(*fp->txqs)));
2860 for (tc = 0; tc < edev->num_tc; tc++) {
2861 txq_index = tc * QEDE_RSS_CNT(edev) + rss_id;
2862 fp->txqs[tc].index = txq_index;
2863 }
2864
2865 snprintf(fp->name, sizeof(fp->name), "%s-fp-%d",
2866 edev->ndev->name, rss_id);
2867 }
Manish Chopra55482ed2016-03-04 12:35:06 -05002868
2869 edev->gro_disable = !(edev->ndev->features & NETIF_F_GRO);
Yuval Mintz29502192015-10-26 11:02:29 +02002870}
2871
2872static int qede_set_real_num_queues(struct qede_dev *edev)
2873{
2874 int rc = 0;
2875
2876 rc = netif_set_real_num_tx_queues(edev->ndev, QEDE_TSS_CNT(edev));
2877 if (rc) {
2878 DP_NOTICE(edev, "Failed to set real number of Tx queues\n");
2879 return rc;
2880 }
2881 rc = netif_set_real_num_rx_queues(edev->ndev, QEDE_RSS_CNT(edev));
2882 if (rc) {
2883 DP_NOTICE(edev, "Failed to set real number of Rx queues\n");
2884 return rc;
2885 }
2886
2887 return 0;
2888}
2889
2890static void qede_napi_disable_remove(struct qede_dev *edev)
2891{
2892 int i;
2893
2894 for_each_rss(i) {
2895 napi_disable(&edev->fp_array[i].napi);
2896
2897 netif_napi_del(&edev->fp_array[i].napi);
2898 }
2899}
2900
2901static void qede_napi_add_enable(struct qede_dev *edev)
2902{
2903 int i;
2904
2905 /* Add NAPI objects */
2906 for_each_rss(i) {
2907 netif_napi_add(edev->ndev, &edev->fp_array[i].napi,
2908 qede_poll, NAPI_POLL_WEIGHT);
2909 napi_enable(&edev->fp_array[i].napi);
2910 }
2911}
2912
2913static void qede_sync_free_irqs(struct qede_dev *edev)
2914{
2915 int i;
2916
2917 for (i = 0; i < edev->int_info.used_cnt; i++) {
2918 if (edev->int_info.msix_cnt) {
2919 synchronize_irq(edev->int_info.msix[i].vector);
2920 free_irq(edev->int_info.msix[i].vector,
2921 &edev->fp_array[i]);
2922 } else {
2923 edev->ops->common->simd_handler_clean(edev->cdev, i);
2924 }
2925 }
2926
2927 edev->int_info.used_cnt = 0;
2928}
2929
2930static int qede_req_msix_irqs(struct qede_dev *edev)
2931{
2932 int i, rc;
2933
2934 /* Sanitize number of interrupts == number of prepared RSS queues */
2935 if (QEDE_RSS_CNT(edev) > edev->int_info.msix_cnt) {
2936 DP_ERR(edev,
2937 "Interrupt mismatch: %d RSS queues > %d MSI-x vectors\n",
2938 QEDE_RSS_CNT(edev), edev->int_info.msix_cnt);
2939 return -EINVAL;
2940 }
2941
2942 for (i = 0; i < QEDE_RSS_CNT(edev); i++) {
2943 rc = request_irq(edev->int_info.msix[i].vector,
2944 qede_msix_fp_int, 0, edev->fp_array[i].name,
2945 &edev->fp_array[i]);
2946 if (rc) {
2947 DP_ERR(edev, "Request fp %d irq failed\n", i);
2948 qede_sync_free_irqs(edev);
2949 return rc;
2950 }
2951 DP_VERBOSE(edev, NETIF_MSG_INTR,
2952 "Requested fp irq for %s [entry %d]. Cookie is at %p\n",
2953 edev->fp_array[i].name, i,
2954 &edev->fp_array[i]);
2955 edev->int_info.used_cnt++;
2956 }
2957
2958 return 0;
2959}
2960
2961static void qede_simd_fp_handler(void *cookie)
2962{
2963 struct qede_fastpath *fp = (struct qede_fastpath *)cookie;
2964
2965 napi_schedule_irqoff(&fp->napi);
2966}
2967
2968static int qede_setup_irqs(struct qede_dev *edev)
2969{
2970 int i, rc = 0;
2971
2972 /* Learn Interrupt configuration */
2973 rc = edev->ops->common->get_fp_int(edev->cdev, &edev->int_info);
2974 if (rc)
2975 return rc;
2976
2977 if (edev->int_info.msix_cnt) {
2978 rc = qede_req_msix_irqs(edev);
2979 if (rc)
2980 return rc;
2981 edev->ndev->irq = edev->int_info.msix[0].vector;
2982 } else {
2983 const struct qed_common_ops *ops;
2984
2985 /* qed should learn receive the RSS ids and callbacks */
2986 ops = edev->ops->common;
2987 for (i = 0; i < QEDE_RSS_CNT(edev); i++)
2988 ops->simd_handler_config(edev->cdev,
2989 &edev->fp_array[i], i,
2990 qede_simd_fp_handler);
2991 edev->int_info.used_cnt = QEDE_RSS_CNT(edev);
2992 }
2993 return 0;
2994}
2995
2996static int qede_drain_txq(struct qede_dev *edev,
2997 struct qede_tx_queue *txq,
2998 bool allow_drain)
2999{
3000 int rc, cnt = 1000;
3001
3002 while (txq->sw_tx_cons != txq->sw_tx_prod) {
3003 if (!cnt) {
3004 if (allow_drain) {
3005 DP_NOTICE(edev,
3006 "Tx queue[%d] is stuck, requesting MCP to drain\n",
3007 txq->index);
3008 rc = edev->ops->common->drain(edev->cdev);
3009 if (rc)
3010 return rc;
3011 return qede_drain_txq(edev, txq, false);
3012 }
3013 DP_NOTICE(edev,
3014 "Timeout waiting for tx queue[%d]: PROD=%d, CONS=%d\n",
3015 txq->index, txq->sw_tx_prod,
3016 txq->sw_tx_cons);
3017 return -ENODEV;
3018 }
3019 cnt--;
3020 usleep_range(1000, 2000);
3021 barrier();
3022 }
3023
3024 /* FW finished processing, wait for HW to transmit all tx packets */
3025 usleep_range(1000, 2000);
3026
3027 return 0;
3028}
3029
3030static int qede_stop_queues(struct qede_dev *edev)
3031{
3032 struct qed_update_vport_params vport_update_params;
3033 struct qed_dev *cdev = edev->cdev;
3034 int rc, tc, i;
3035
3036 /* Disable the vport */
3037 memset(&vport_update_params, 0, sizeof(vport_update_params));
3038 vport_update_params.vport_id = 0;
3039 vport_update_params.update_vport_active_flg = 1;
3040 vport_update_params.vport_active_flg = 0;
3041 vport_update_params.update_rss_flg = 0;
3042
3043 rc = edev->ops->vport_update(cdev, &vport_update_params);
3044 if (rc) {
3045 DP_ERR(edev, "Failed to update vport\n");
3046 return rc;
3047 }
3048
3049 /* Flush Tx queues. If needed, request drain from MCP */
3050 for_each_rss(i) {
3051 struct qede_fastpath *fp = &edev->fp_array[i];
3052
3053 for (tc = 0; tc < edev->num_tc; tc++) {
3054 struct qede_tx_queue *txq = &fp->txqs[tc];
3055
3056 rc = qede_drain_txq(edev, txq, true);
3057 if (rc)
3058 return rc;
3059 }
3060 }
3061
3062 /* Stop all Queues in reverse order*/
3063 for (i = QEDE_RSS_CNT(edev) - 1; i >= 0; i--) {
3064 struct qed_stop_rxq_params rx_params;
3065
3066 /* Stop the Tx Queue(s)*/
3067 for (tc = 0; tc < edev->num_tc; tc++) {
3068 struct qed_stop_txq_params tx_params;
3069
3070 tx_params.rss_id = i;
3071 tx_params.tx_queue_id = tc * QEDE_RSS_CNT(edev) + i;
3072 rc = edev->ops->q_tx_stop(cdev, &tx_params);
3073 if (rc) {
3074 DP_ERR(edev, "Failed to stop TXQ #%d\n",
3075 tx_params.tx_queue_id);
3076 return rc;
3077 }
3078 }
3079
3080 /* Stop the Rx Queue*/
3081 memset(&rx_params, 0, sizeof(rx_params));
3082 rx_params.rss_id = i;
3083 rx_params.rx_queue_id = i;
3084
3085 rc = edev->ops->q_rx_stop(cdev, &rx_params);
3086 if (rc) {
3087 DP_ERR(edev, "Failed to stop RXQ #%d\n", i);
3088 return rc;
3089 }
3090 }
3091
3092 /* Stop the vport */
3093 rc = edev->ops->vport_stop(cdev, 0);
3094 if (rc)
3095 DP_ERR(edev, "Failed to stop VPORT\n");
3096
3097 return rc;
3098}
3099
3100static int qede_start_queues(struct qede_dev *edev)
3101{
3102 int rc, tc, i;
Manish Chopra088c8612016-03-04 12:35:05 -05003103 int vlan_removal_en = 1;
Yuval Mintz29502192015-10-26 11:02:29 +02003104 struct qed_dev *cdev = edev->cdev;
Yuval Mintz29502192015-10-26 11:02:29 +02003105 struct qed_update_vport_params vport_update_params;
3106 struct qed_queue_start_common_params q_params;
Yuval Mintzfefb0202016-05-11 16:36:19 +03003107 struct qed_dev_info *qed_info = &edev->dev_info.common;
Manish Chopra088c8612016-03-04 12:35:05 -05003108 struct qed_start_vport_params start = {0};
Sudarsana Reddy Kalluru961acde2016-04-10 12:43:01 +03003109 bool reset_rss_indir = false;
Yuval Mintz29502192015-10-26 11:02:29 +02003110
3111 if (!edev->num_rss) {
3112 DP_ERR(edev,
3113 "Cannot update V-VPORT as active as there are no Rx queues\n");
3114 return -EINVAL;
3115 }
3116
Manish Chopra55482ed2016-03-04 12:35:06 -05003117 start.gro_enable = !edev->gro_disable;
Manish Chopra088c8612016-03-04 12:35:05 -05003118 start.mtu = edev->ndev->mtu;
3119 start.vport_id = 0;
3120 start.drop_ttl0 = true;
3121 start.remove_inner_vlan = vlan_removal_en;
3122
3123 rc = edev->ops->vport_start(cdev, &start);
Yuval Mintz29502192015-10-26 11:02:29 +02003124
3125 if (rc) {
3126 DP_ERR(edev, "Start V-PORT failed %d\n", rc);
3127 return rc;
3128 }
3129
3130 DP_VERBOSE(edev, NETIF_MSG_IFUP,
3131 "Start vport ramrod passed, vport_id = %d, MTU = %d, vlan_removal_en = %d\n",
Manish Chopra088c8612016-03-04 12:35:05 -05003132 start.vport_id, edev->ndev->mtu + 0xe, vlan_removal_en);
Yuval Mintz29502192015-10-26 11:02:29 +02003133
3134 for_each_rss(i) {
3135 struct qede_fastpath *fp = &edev->fp_array[i];
3136 dma_addr_t phys_table = fp->rxq->rx_comp_ring.pbl.p_phys_table;
3137
3138 memset(&q_params, 0, sizeof(q_params));
3139 q_params.rss_id = i;
3140 q_params.queue_id = i;
3141 q_params.vport_id = 0;
3142 q_params.sb = fp->sb_info->igu_sb_id;
3143 q_params.sb_idx = RX_PI;
3144
3145 rc = edev->ops->q_rx_start(cdev, &q_params,
3146 fp->rxq->rx_buf_size,
3147 fp->rxq->rx_bd_ring.p_phys_addr,
3148 phys_table,
3149 fp->rxq->rx_comp_ring.page_cnt,
3150 &fp->rxq->hw_rxq_prod_addr);
3151 if (rc) {
3152 DP_ERR(edev, "Start RXQ #%d failed %d\n", i, rc);
3153 return rc;
3154 }
3155
3156 fp->rxq->hw_cons_ptr = &fp->sb_info->sb_virt->pi_array[RX_PI];
3157
3158 qede_update_rx_prod(edev, fp->rxq);
3159
3160 for (tc = 0; tc < edev->num_tc; tc++) {
3161 struct qede_tx_queue *txq = &fp->txqs[tc];
3162 int txq_index = tc * QEDE_RSS_CNT(edev) + i;
3163
3164 memset(&q_params, 0, sizeof(q_params));
3165 q_params.rss_id = i;
3166 q_params.queue_id = txq_index;
3167 q_params.vport_id = 0;
3168 q_params.sb = fp->sb_info->igu_sb_id;
3169 q_params.sb_idx = TX_PI(tc);
3170
3171 rc = edev->ops->q_tx_start(cdev, &q_params,
3172 txq->tx_pbl.pbl.p_phys_table,
3173 txq->tx_pbl.page_cnt,
3174 &txq->doorbell_addr);
3175 if (rc) {
3176 DP_ERR(edev, "Start TXQ #%d failed %d\n",
3177 txq_index, rc);
3178 return rc;
3179 }
3180
3181 txq->hw_cons_ptr =
3182 &fp->sb_info->sb_virt->pi_array[TX_PI(tc)];
3183 SET_FIELD(txq->tx_db.data.params,
3184 ETH_DB_DATA_DEST, DB_DEST_XCM);
3185 SET_FIELD(txq->tx_db.data.params, ETH_DB_DATA_AGG_CMD,
3186 DB_AGG_CMD_SET);
3187 SET_FIELD(txq->tx_db.data.params,
3188 ETH_DB_DATA_AGG_VAL_SEL,
3189 DQ_XCM_ETH_TX_BD_PROD_CMD);
3190
3191 txq->tx_db.data.agg_flags = DQ_XCM_ETH_DQ_CF_CMD;
3192 }
3193 }
3194
3195 /* Prepare and send the vport enable */
3196 memset(&vport_update_params, 0, sizeof(vport_update_params));
Manish Chopra088c8612016-03-04 12:35:05 -05003197 vport_update_params.vport_id = start.vport_id;
Yuval Mintz29502192015-10-26 11:02:29 +02003198 vport_update_params.update_vport_active_flg = 1;
3199 vport_update_params.vport_active_flg = 1;
3200
3201 /* Fill struct with RSS params */
3202 if (QEDE_RSS_CNT(edev) > 1) {
3203 vport_update_params.update_rss_flg = 1;
Sudarsana Reddy Kalluru961acde2016-04-10 12:43:01 +03003204
3205 /* Need to validate current RSS config uses valid entries */
3206 for (i = 0; i < QED_RSS_IND_TABLE_SIZE; i++) {
3207 if (edev->rss_params.rss_ind_table[i] >=
3208 edev->num_rss) {
3209 reset_rss_indir = true;
3210 break;
3211 }
3212 }
3213
3214 if (!(edev->rss_params_inited & QEDE_RSS_INDIR_INITED) ||
3215 reset_rss_indir) {
3216 u16 val;
3217
3218 for (i = 0; i < QED_RSS_IND_TABLE_SIZE; i++) {
3219 u16 indir_val;
3220
3221 val = QEDE_RSS_CNT(edev);
3222 indir_val = ethtool_rxfh_indir_default(i, val);
3223 edev->rss_params.rss_ind_table[i] = indir_val;
3224 }
3225 edev->rss_params_inited |= QEDE_RSS_INDIR_INITED;
3226 }
3227
3228 if (!(edev->rss_params_inited & QEDE_RSS_KEY_INITED)) {
3229 netdev_rss_key_fill(edev->rss_params.rss_key,
3230 sizeof(edev->rss_params.rss_key));
3231 edev->rss_params_inited |= QEDE_RSS_KEY_INITED;
3232 }
3233
3234 if (!(edev->rss_params_inited & QEDE_RSS_CAPS_INITED)) {
3235 edev->rss_params.rss_caps = QED_RSS_IPV4 |
3236 QED_RSS_IPV6 |
3237 QED_RSS_IPV4_TCP |
3238 QED_RSS_IPV6_TCP;
3239 edev->rss_params_inited |= QEDE_RSS_CAPS_INITED;
3240 }
3241
3242 memcpy(&vport_update_params.rss_params, &edev->rss_params,
3243 sizeof(vport_update_params.rss_params));
Yuval Mintz29502192015-10-26 11:02:29 +02003244 } else {
Sudarsana Reddy Kalluru961acde2016-04-10 12:43:01 +03003245 memset(&vport_update_params.rss_params, 0,
3246 sizeof(vport_update_params.rss_params));
Yuval Mintz29502192015-10-26 11:02:29 +02003247 }
Yuval Mintz29502192015-10-26 11:02:29 +02003248
3249 rc = edev->ops->vport_update(cdev, &vport_update_params);
3250 if (rc) {
3251 DP_ERR(edev, "Update V-PORT failed %d\n", rc);
3252 return rc;
3253 }
3254
3255 return 0;
3256}
3257
Sudarsana Kalluru0d8e0aa2015-10-26 11:02:30 +02003258static int qede_set_mcast_rx_mac(struct qede_dev *edev,
3259 enum qed_filter_xcast_params_type opcode,
3260 unsigned char *mac, int num_macs)
3261{
3262 struct qed_filter_params filter_cmd;
3263 int i;
3264
3265 memset(&filter_cmd, 0, sizeof(filter_cmd));
3266 filter_cmd.type = QED_FILTER_TYPE_MCAST;
3267 filter_cmd.filter.mcast.type = opcode;
3268 filter_cmd.filter.mcast.num = num_macs;
3269
3270 for (i = 0; i < num_macs; i++, mac += ETH_ALEN)
3271 ether_addr_copy(filter_cmd.filter.mcast.mac[i], mac);
3272
3273 return edev->ops->filter_config(edev->cdev, &filter_cmd);
3274}
3275
Yuval Mintz29502192015-10-26 11:02:29 +02003276enum qede_unload_mode {
3277 QEDE_UNLOAD_NORMAL,
3278};
3279
3280static void qede_unload(struct qede_dev *edev, enum qede_unload_mode mode)
3281{
Sudarsana Kallurua2ec6172015-10-26 11:02:32 +02003282 struct qed_link_params link_params;
Yuval Mintz29502192015-10-26 11:02:29 +02003283 int rc;
3284
3285 DP_INFO(edev, "Starting qede unload\n");
3286
Sudarsana Kalluru0d8e0aa2015-10-26 11:02:30 +02003287 mutex_lock(&edev->qede_lock);
3288 edev->state = QEDE_STATE_CLOSED;
3289
Yuval Mintz29502192015-10-26 11:02:29 +02003290 /* Close OS Tx */
3291 netif_tx_disable(edev->ndev);
3292 netif_carrier_off(edev->ndev);
3293
Sudarsana Kallurua2ec6172015-10-26 11:02:32 +02003294 /* Reset the link */
3295 memset(&link_params, 0, sizeof(link_params));
3296 link_params.link_up = false;
3297 edev->ops->common->set_link(edev->cdev, &link_params);
Yuval Mintz29502192015-10-26 11:02:29 +02003298 rc = qede_stop_queues(edev);
3299 if (rc) {
3300 qede_sync_free_irqs(edev);
3301 goto out;
3302 }
3303
3304 DP_INFO(edev, "Stopped Queues\n");
3305
Sudarsana Reddy Kalluru7c1bfca2016-02-18 17:00:40 +02003306 qede_vlan_mark_nonconfigured(edev);
Yuval Mintz29502192015-10-26 11:02:29 +02003307 edev->ops->fastpath_stop(edev->cdev);
3308
3309 /* Release the interrupts */
3310 qede_sync_free_irqs(edev);
3311 edev->ops->common->set_fp_int(edev->cdev, 0);
3312
3313 qede_napi_disable_remove(edev);
3314
3315 qede_free_mem_load(edev);
3316 qede_free_fp_array(edev);
3317
3318out:
3319 mutex_unlock(&edev->qede_lock);
3320 DP_INFO(edev, "Ending qede unload\n");
3321}
3322
3323enum qede_load_mode {
3324 QEDE_LOAD_NORMAL,
3325};
3326
3327static int qede_load(struct qede_dev *edev, enum qede_load_mode mode)
3328{
Sudarsana Kallurua2ec6172015-10-26 11:02:32 +02003329 struct qed_link_params link_params;
3330 struct qed_link_output link_output;
Yuval Mintz29502192015-10-26 11:02:29 +02003331 int rc;
3332
3333 DP_INFO(edev, "Starting qede load\n");
3334
3335 rc = qede_set_num_queues(edev);
3336 if (rc)
3337 goto err0;
3338
3339 rc = qede_alloc_fp_array(edev);
3340 if (rc)
3341 goto err0;
3342
3343 qede_init_fp(edev);
3344
3345 rc = qede_alloc_mem_load(edev);
3346 if (rc)
3347 goto err1;
3348 DP_INFO(edev, "Allocated %d RSS queues on %d TC/s\n",
3349 QEDE_RSS_CNT(edev), edev->num_tc);
3350
3351 rc = qede_set_real_num_queues(edev);
3352 if (rc)
3353 goto err2;
3354
3355 qede_napi_add_enable(edev);
3356 DP_INFO(edev, "Napi added and enabled\n");
3357
3358 rc = qede_setup_irqs(edev);
3359 if (rc)
3360 goto err3;
3361 DP_INFO(edev, "Setup IRQs succeeded\n");
3362
3363 rc = qede_start_queues(edev);
3364 if (rc)
3365 goto err4;
3366 DP_INFO(edev, "Start VPORT, RXQ and TXQ succeeded\n");
3367
3368 /* Add primary mac and set Rx filters */
3369 ether_addr_copy(edev->primary_mac, edev->ndev->dev_addr);
3370
Sudarsana Kalluru0d8e0aa2015-10-26 11:02:30 +02003371 mutex_lock(&edev->qede_lock);
3372 edev->state = QEDE_STATE_OPEN;
3373 mutex_unlock(&edev->qede_lock);
Sudarsana Kallurua2ec6172015-10-26 11:02:32 +02003374
Sudarsana Reddy Kalluru7c1bfca2016-02-18 17:00:40 +02003375 /* Program un-configured VLANs */
3376 qede_configure_vlan_filters(edev);
3377
Sudarsana Kallurua2ec6172015-10-26 11:02:32 +02003378 /* Ask for link-up using current configuration */
3379 memset(&link_params, 0, sizeof(link_params));
3380 link_params.link_up = true;
3381 edev->ops->common->set_link(edev->cdev, &link_params);
3382
3383 /* Query whether link is already-up */
3384 memset(&link_output, 0, sizeof(link_output));
3385 edev->ops->common->get_link(edev->cdev, &link_output);
3386 qede_link_update(edev, &link_output);
3387
Yuval Mintz29502192015-10-26 11:02:29 +02003388 DP_INFO(edev, "Ending successfully qede load\n");
3389
3390 return 0;
3391
3392err4:
3393 qede_sync_free_irqs(edev);
3394 memset(&edev->int_info.msix_cnt, 0, sizeof(struct qed_int_info));
3395err3:
3396 qede_napi_disable_remove(edev);
3397err2:
3398 qede_free_mem_load(edev);
3399err1:
3400 edev->ops->common->set_fp_int(edev->cdev, 0);
3401 qede_free_fp_array(edev);
3402 edev->num_rss = 0;
3403err0:
3404 return rc;
3405}
3406
Sudarsana Kalluru133fac02015-10-26 11:02:34 +02003407void qede_reload(struct qede_dev *edev,
3408 void (*func)(struct qede_dev *, union qede_reload_args *),
3409 union qede_reload_args *args)
3410{
3411 qede_unload(edev, QEDE_UNLOAD_NORMAL);
3412 /* Call function handler to update parameters
3413 * needed for function load.
3414 */
3415 if (func)
3416 func(edev, args);
3417
3418 qede_load(edev, QEDE_LOAD_NORMAL);
3419
3420 mutex_lock(&edev->qede_lock);
3421 qede_config_rx_mode(edev->ndev);
3422 mutex_unlock(&edev->qede_lock);
3423}
3424
Yuval Mintz29502192015-10-26 11:02:29 +02003425/* called with rtnl_lock */
3426static int qede_open(struct net_device *ndev)
3427{
3428 struct qede_dev *edev = netdev_priv(ndev);
Manish Choprab18e1702016-04-14 01:38:30 -04003429 int rc;
Yuval Mintz29502192015-10-26 11:02:29 +02003430
3431 netif_carrier_off(ndev);
3432
3433 edev->ops->common->set_power_state(edev->cdev, PCI_D0);
3434
Manish Choprab18e1702016-04-14 01:38:30 -04003435 rc = qede_load(edev, QEDE_LOAD_NORMAL);
3436
3437 if (rc)
3438 return rc;
3439
3440#ifdef CONFIG_QEDE_VXLAN
3441 vxlan_get_rx_port(ndev);
3442#endif
Manish Chopra9a109dd2016-04-14 01:38:31 -04003443#ifdef CONFIG_QEDE_GENEVE
3444 geneve_get_rx_port(ndev);
3445#endif
Manish Choprab18e1702016-04-14 01:38:30 -04003446 return 0;
Yuval Mintz29502192015-10-26 11:02:29 +02003447}
3448
3449static int qede_close(struct net_device *ndev)
3450{
3451 struct qede_dev *edev = netdev_priv(ndev);
3452
3453 qede_unload(edev, QEDE_UNLOAD_NORMAL);
3454
3455 return 0;
3456}
Sudarsana Kalluru0d8e0aa2015-10-26 11:02:30 +02003457
Sudarsana Kallurua2ec6172015-10-26 11:02:32 +02003458static void qede_link_update(void *dev, struct qed_link_output *link)
3459{
3460 struct qede_dev *edev = dev;
3461
3462 if (!netif_running(edev->ndev)) {
3463 DP_VERBOSE(edev, NETIF_MSG_LINK, "Interface is not running\n");
3464 return;
3465 }
3466
3467 if (link->link_up) {
Yuval Mintz8e025ae2016-02-24 16:52:47 +02003468 if (!netif_carrier_ok(edev->ndev)) {
3469 DP_NOTICE(edev, "Link is up\n");
3470 netif_tx_start_all_queues(edev->ndev);
3471 netif_carrier_on(edev->ndev);
3472 }
Sudarsana Kallurua2ec6172015-10-26 11:02:32 +02003473 } else {
Yuval Mintz8e025ae2016-02-24 16:52:47 +02003474 if (netif_carrier_ok(edev->ndev)) {
3475 DP_NOTICE(edev, "Link is down\n");
3476 netif_tx_disable(edev->ndev);
3477 netif_carrier_off(edev->ndev);
3478 }
Sudarsana Kallurua2ec6172015-10-26 11:02:32 +02003479 }
3480}
3481
Sudarsana Kalluru0d8e0aa2015-10-26 11:02:30 +02003482static int qede_set_mac_addr(struct net_device *ndev, void *p)
3483{
3484 struct qede_dev *edev = netdev_priv(ndev);
3485 struct sockaddr *addr = p;
3486 int rc;
3487
3488 ASSERT_RTNL(); /* @@@TBD To be removed */
3489
3490 DP_INFO(edev, "Set_mac_addr called\n");
3491
3492 if (!is_valid_ether_addr(addr->sa_data)) {
3493 DP_NOTICE(edev, "The MAC address is not valid\n");
3494 return -EFAULT;
3495 }
3496
3497 ether_addr_copy(ndev->dev_addr, addr->sa_data);
3498
3499 if (!netif_running(ndev)) {
3500 DP_NOTICE(edev, "The device is currently down\n");
3501 return 0;
3502 }
3503
3504 /* Remove the previous primary mac */
3505 rc = qede_set_ucast_rx_mac(edev, QED_FILTER_XCAST_TYPE_DEL,
3506 edev->primary_mac);
3507 if (rc)
3508 return rc;
3509
3510 /* Add MAC filter according to the new unicast HW MAC address */
3511 ether_addr_copy(edev->primary_mac, ndev->dev_addr);
3512 return qede_set_ucast_rx_mac(edev, QED_FILTER_XCAST_TYPE_ADD,
3513 edev->primary_mac);
3514}
3515
3516static int
3517qede_configure_mcast_filtering(struct net_device *ndev,
3518 enum qed_filter_rx_mode_type *accept_flags)
3519{
3520 struct qede_dev *edev = netdev_priv(ndev);
3521 unsigned char *mc_macs, *temp;
3522 struct netdev_hw_addr *ha;
3523 int rc = 0, mc_count;
3524 size_t size;
3525
3526 size = 64 * ETH_ALEN;
3527
3528 mc_macs = kzalloc(size, GFP_KERNEL);
3529 if (!mc_macs) {
3530 DP_NOTICE(edev,
3531 "Failed to allocate memory for multicast MACs\n");
3532 rc = -ENOMEM;
3533 goto exit;
3534 }
3535
3536 temp = mc_macs;
3537
3538 /* Remove all previously configured MAC filters */
3539 rc = qede_set_mcast_rx_mac(edev, QED_FILTER_XCAST_TYPE_DEL,
3540 mc_macs, 1);
3541 if (rc)
3542 goto exit;
3543
3544 netif_addr_lock_bh(ndev);
3545
3546 mc_count = netdev_mc_count(ndev);
3547 if (mc_count < 64) {
3548 netdev_for_each_mc_addr(ha, ndev) {
3549 ether_addr_copy(temp, ha->addr);
3550 temp += ETH_ALEN;
3551 }
3552 }
3553
3554 netif_addr_unlock_bh(ndev);
3555
3556 /* Check for all multicast @@@TBD resource allocation */
3557 if ((ndev->flags & IFF_ALLMULTI) ||
3558 (mc_count > 64)) {
3559 if (*accept_flags == QED_FILTER_RX_MODE_TYPE_REGULAR)
3560 *accept_flags = QED_FILTER_RX_MODE_TYPE_MULTI_PROMISC;
3561 } else {
3562 /* Add all multicast MAC filters */
3563 rc = qede_set_mcast_rx_mac(edev, QED_FILTER_XCAST_TYPE_ADD,
3564 mc_macs, mc_count);
3565 }
3566
3567exit:
3568 kfree(mc_macs);
3569 return rc;
3570}
3571
3572static void qede_set_rx_mode(struct net_device *ndev)
3573{
3574 struct qede_dev *edev = netdev_priv(ndev);
3575
3576 DP_INFO(edev, "qede_set_rx_mode called\n");
3577
3578 if (edev->state != QEDE_STATE_OPEN) {
3579 DP_INFO(edev,
3580 "qede_set_rx_mode called while interface is down\n");
3581 } else {
3582 set_bit(QEDE_SP_RX_MODE, &edev->sp_flags);
3583 schedule_delayed_work(&edev->sp_task, 0);
3584 }
3585}
3586
3587/* Must be called with qede_lock held */
3588static void qede_config_rx_mode(struct net_device *ndev)
3589{
3590 enum qed_filter_rx_mode_type accept_flags = QED_FILTER_TYPE_UCAST;
3591 struct qede_dev *edev = netdev_priv(ndev);
3592 struct qed_filter_params rx_mode;
3593 unsigned char *uc_macs, *temp;
3594 struct netdev_hw_addr *ha;
3595 int rc, uc_count;
3596 size_t size;
3597
3598 netif_addr_lock_bh(ndev);
3599
3600 uc_count = netdev_uc_count(ndev);
3601 size = uc_count * ETH_ALEN;
3602
3603 uc_macs = kzalloc(size, GFP_ATOMIC);
3604 if (!uc_macs) {
3605 DP_NOTICE(edev, "Failed to allocate memory for unicast MACs\n");
3606 netif_addr_unlock_bh(ndev);
3607 return;
3608 }
3609
3610 temp = uc_macs;
3611 netdev_for_each_uc_addr(ha, ndev) {
3612 ether_addr_copy(temp, ha->addr);
3613 temp += ETH_ALEN;
3614 }
3615
3616 netif_addr_unlock_bh(ndev);
3617
3618 /* Configure the struct for the Rx mode */
3619 memset(&rx_mode, 0, sizeof(struct qed_filter_params));
3620 rx_mode.type = QED_FILTER_TYPE_RX_MODE;
3621
3622 /* Remove all previous unicast secondary macs and multicast macs
3623 * (configrue / leave the primary mac)
3624 */
3625 rc = qede_set_ucast_rx_mac(edev, QED_FILTER_XCAST_TYPE_REPLACE,
3626 edev->primary_mac);
3627 if (rc)
3628 goto out;
3629
3630 /* Check for promiscuous */
3631 if ((ndev->flags & IFF_PROMISC) ||
3632 (uc_count > 15)) { /* @@@TBD resource allocation - 1 */
3633 accept_flags = QED_FILTER_RX_MODE_TYPE_PROMISC;
3634 } else {
3635 /* Add MAC filters according to the unicast secondary macs */
3636 int i;
3637
3638 temp = uc_macs;
3639 for (i = 0; i < uc_count; i++) {
3640 rc = qede_set_ucast_rx_mac(edev,
3641 QED_FILTER_XCAST_TYPE_ADD,
3642 temp);
3643 if (rc)
3644 goto out;
3645
3646 temp += ETH_ALEN;
3647 }
3648
3649 rc = qede_configure_mcast_filtering(ndev, &accept_flags);
3650 if (rc)
3651 goto out;
3652 }
3653
Sudarsana Reddy Kalluru7c1bfca2016-02-18 17:00:40 +02003654 /* take care of VLAN mode */
3655 if (ndev->flags & IFF_PROMISC) {
3656 qede_config_accept_any_vlan(edev, true);
3657 } else if (!edev->non_configured_vlans) {
3658 /* It's possible that accept_any_vlan mode is set due to a
3659 * previous setting of IFF_PROMISC. If vlan credits are
3660 * sufficient, disable accept_any_vlan.
3661 */
3662 qede_config_accept_any_vlan(edev, false);
3663 }
3664
Sudarsana Kalluru0d8e0aa2015-10-26 11:02:30 +02003665 rx_mode.filter.accept_flags = accept_flags;
3666 edev->ops->filter_config(edev->cdev, &rx_mode);
3667out:
3668 kfree(uc_macs);
3669}