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Graeme Gregory518fb722011-05-02 16:20:08 -05001/*
2 * tps65910.c -- TI tps65910
3 *
4 * Copyright 2010 Texas Instruments Inc.
5 *
6 * Author: Graeme Gregory <gg@slimlogic.co.uk>
7 * Author: Jorge Eduardo Candelaria <jedu@slimlogic.co.uk>
8 *
9 * This program is free software; you can redistribute it and/or modify it
10 * under the terms of the GNU General Public License as published by the
11 * Free Software Foundation; either version 2 of the License, or (at your
12 * option) any later version.
13 *
14 */
15
16#include <linux/kernel.h>
17#include <linux/module.h>
18#include <linux/init.h>
19#include <linux/err.h>
20#include <linux/platform_device.h>
21#include <linux/regulator/driver.h>
22#include <linux/regulator/machine.h>
23#include <linux/delay.h>
24#include <linux/slab.h>
25#include <linux/gpio.h>
26#include <linux/mfd/tps65910.h>
27
Graeme Gregory518fb722011-05-02 16:20:08 -050028#define TPS65910_SUPPLY_STATE_ENABLED 0x1
Laxman Dewangan1e0c66f2012-01-28 15:07:57 +053029#define EXT_SLEEP_CONTROL (TPS65910_SLEEP_CONTROL_EXT_INPUT_EN1 | \
30 TPS65910_SLEEP_CONTROL_EXT_INPUT_EN2 | \
Laxman Dewanganf30b0712012-03-07 18:21:49 +053031 TPS65910_SLEEP_CONTROL_EXT_INPUT_EN3 | \
32 TPS65911_SLEEP_CONTROL_EXT_INPUT_SLEEP)
Graeme Gregory518fb722011-05-02 16:20:08 -050033
34/* supported VIO voltages in milivolts */
35static const u16 VIO_VSEL_table[] = {
36 1500, 1800, 2500, 3300,
37};
38
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -050039/* VSEL tables for TPS65910 specific LDOs and dcdc's */
40
41/* supported VDD3 voltages in milivolts */
Graeme Gregory518fb722011-05-02 16:20:08 -050042static const u16 VDD3_VSEL_table[] = {
43 5000,
44};
45
46/* supported VDIG1 voltages in milivolts */
47static const u16 VDIG1_VSEL_table[] = {
48 1200, 1500, 1800, 2700,
49};
50
51/* supported VDIG2 voltages in milivolts */
52static const u16 VDIG2_VSEL_table[] = {
53 1000, 1100, 1200, 1800,
54};
55
56/* supported VPLL voltages in milivolts */
57static const u16 VPLL_VSEL_table[] = {
58 1000, 1100, 1800, 2500,
59};
60
61/* supported VDAC voltages in milivolts */
62static const u16 VDAC_VSEL_table[] = {
63 1800, 2600, 2800, 2850,
64};
65
66/* supported VAUX1 voltages in milivolts */
67static const u16 VAUX1_VSEL_table[] = {
68 1800, 2500, 2800, 2850,
69};
70
71/* supported VAUX2 voltages in milivolts */
72static const u16 VAUX2_VSEL_table[] = {
73 1800, 2800, 2900, 3300,
74};
75
76/* supported VAUX33 voltages in milivolts */
77static const u16 VAUX33_VSEL_table[] = {
78 1800, 2000, 2800, 3300,
79};
80
81/* supported VMMC voltages in milivolts */
82static const u16 VMMC_VSEL_table[] = {
83 1800, 2800, 3000, 3300,
84};
85
86struct tps_info {
87 const char *name;
88 unsigned min_uV;
89 unsigned max_uV;
Laxman Dewangan7d38a3c2012-01-20 16:36:22 +053090 u8 n_voltages;
91 const u16 *voltage_table;
Laxman Dewangan0651eed2012-03-13 11:35:20 +053092 int enable_time_us;
Graeme Gregory518fb722011-05-02 16:20:08 -050093};
94
95static struct tps_info tps65910_regs[] = {
96 {
97 .name = "VRTC",
Laxman Dewangan0651eed2012-03-13 11:35:20 +053098 .enable_time_us = 2200,
Graeme Gregory518fb722011-05-02 16:20:08 -050099 },
100 {
101 .name = "VIO",
102 .min_uV = 1500000,
103 .max_uV = 3300000,
Laxman Dewangan7d38a3c2012-01-20 16:36:22 +0530104 .n_voltages = ARRAY_SIZE(VIO_VSEL_table),
105 .voltage_table = VIO_VSEL_table,
Laxman Dewangan0651eed2012-03-13 11:35:20 +0530106 .enable_time_us = 350,
Graeme Gregory518fb722011-05-02 16:20:08 -0500107 },
108 {
109 .name = "VDD1",
110 .min_uV = 600000,
111 .max_uV = 4500000,
Laxman Dewangan0651eed2012-03-13 11:35:20 +0530112 .enable_time_us = 350,
Graeme Gregory518fb722011-05-02 16:20:08 -0500113 },
114 {
115 .name = "VDD2",
116 .min_uV = 600000,
117 .max_uV = 4500000,
Laxman Dewangan0651eed2012-03-13 11:35:20 +0530118 .enable_time_us = 350,
Graeme Gregory518fb722011-05-02 16:20:08 -0500119 },
120 {
121 .name = "VDD3",
122 .min_uV = 5000000,
123 .max_uV = 5000000,
Laxman Dewangan7d38a3c2012-01-20 16:36:22 +0530124 .n_voltages = ARRAY_SIZE(VDD3_VSEL_table),
125 .voltage_table = VDD3_VSEL_table,
Laxman Dewangan0651eed2012-03-13 11:35:20 +0530126 .enable_time_us = 200,
Graeme Gregory518fb722011-05-02 16:20:08 -0500127 },
128 {
129 .name = "VDIG1",
130 .min_uV = 1200000,
131 .max_uV = 2700000,
Laxman Dewangan7d38a3c2012-01-20 16:36:22 +0530132 .n_voltages = ARRAY_SIZE(VDIG1_VSEL_table),
133 .voltage_table = VDIG1_VSEL_table,
Laxman Dewangan0651eed2012-03-13 11:35:20 +0530134 .enable_time_us = 100,
Graeme Gregory518fb722011-05-02 16:20:08 -0500135 },
136 {
137 .name = "VDIG2",
138 .min_uV = 1000000,
139 .max_uV = 1800000,
Laxman Dewangan7d38a3c2012-01-20 16:36:22 +0530140 .n_voltages = ARRAY_SIZE(VDIG2_VSEL_table),
141 .voltage_table = VDIG2_VSEL_table,
Laxman Dewangan0651eed2012-03-13 11:35:20 +0530142 .enable_time_us = 100,
Graeme Gregory518fb722011-05-02 16:20:08 -0500143 },
144 {
145 .name = "VPLL",
146 .min_uV = 1000000,
147 .max_uV = 2500000,
Laxman Dewangan7d38a3c2012-01-20 16:36:22 +0530148 .n_voltages = ARRAY_SIZE(VPLL_VSEL_table),
149 .voltage_table = VPLL_VSEL_table,
Laxman Dewangan0651eed2012-03-13 11:35:20 +0530150 .enable_time_us = 100,
Graeme Gregory518fb722011-05-02 16:20:08 -0500151 },
152 {
153 .name = "VDAC",
154 .min_uV = 1800000,
155 .max_uV = 2850000,
Laxman Dewangan7d38a3c2012-01-20 16:36:22 +0530156 .n_voltages = ARRAY_SIZE(VDAC_VSEL_table),
157 .voltage_table = VDAC_VSEL_table,
Laxman Dewangan0651eed2012-03-13 11:35:20 +0530158 .enable_time_us = 100,
Graeme Gregory518fb722011-05-02 16:20:08 -0500159 },
160 {
161 .name = "VAUX1",
162 .min_uV = 1800000,
163 .max_uV = 2850000,
Laxman Dewangan7d38a3c2012-01-20 16:36:22 +0530164 .n_voltages = ARRAY_SIZE(VAUX1_VSEL_table),
165 .voltage_table = VAUX1_VSEL_table,
Laxman Dewangan0651eed2012-03-13 11:35:20 +0530166 .enable_time_us = 100,
Graeme Gregory518fb722011-05-02 16:20:08 -0500167 },
168 {
169 .name = "VAUX2",
170 .min_uV = 1800000,
171 .max_uV = 3300000,
Laxman Dewangan7d38a3c2012-01-20 16:36:22 +0530172 .n_voltages = ARRAY_SIZE(VAUX2_VSEL_table),
173 .voltage_table = VAUX2_VSEL_table,
Laxman Dewangan0651eed2012-03-13 11:35:20 +0530174 .enable_time_us = 100,
Graeme Gregory518fb722011-05-02 16:20:08 -0500175 },
176 {
177 .name = "VAUX33",
178 .min_uV = 1800000,
179 .max_uV = 3300000,
Laxman Dewangan7d38a3c2012-01-20 16:36:22 +0530180 .n_voltages = ARRAY_SIZE(VAUX33_VSEL_table),
181 .voltage_table = VAUX33_VSEL_table,
Laxman Dewangan0651eed2012-03-13 11:35:20 +0530182 .enable_time_us = 100,
Graeme Gregory518fb722011-05-02 16:20:08 -0500183 },
184 {
185 .name = "VMMC",
186 .min_uV = 1800000,
187 .max_uV = 3300000,
Laxman Dewangan7d38a3c2012-01-20 16:36:22 +0530188 .n_voltages = ARRAY_SIZE(VMMC_VSEL_table),
189 .voltage_table = VMMC_VSEL_table,
Laxman Dewangan0651eed2012-03-13 11:35:20 +0530190 .enable_time_us = 100,
Graeme Gregory518fb722011-05-02 16:20:08 -0500191 },
192};
193
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500194static struct tps_info tps65911_regs[] = {
195 {
Laxman Dewanganc2f8efd2012-01-18 20:46:56 +0530196 .name = "VRTC",
Laxman Dewangan0651eed2012-03-13 11:35:20 +0530197 .enable_time_us = 2200,
Laxman Dewanganc2f8efd2012-01-18 20:46:56 +0530198 },
199 {
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500200 .name = "VIO",
201 .min_uV = 1500000,
202 .max_uV = 3300000,
Laxman Dewangan7d38a3c2012-01-20 16:36:22 +0530203 .n_voltages = ARRAY_SIZE(VIO_VSEL_table),
204 .voltage_table = VIO_VSEL_table,
Laxman Dewangan0651eed2012-03-13 11:35:20 +0530205 .enable_time_us = 350,
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500206 },
207 {
208 .name = "VDD1",
209 .min_uV = 600000,
210 .max_uV = 4500000,
Laxman Dewangan7d38a3c2012-01-20 16:36:22 +0530211 .n_voltages = 73,
Laxman Dewangan0651eed2012-03-13 11:35:20 +0530212 .enable_time_us = 350,
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500213 },
214 {
215 .name = "VDD2",
216 .min_uV = 600000,
217 .max_uV = 4500000,
Laxman Dewangan7d38a3c2012-01-20 16:36:22 +0530218 .n_voltages = 73,
Laxman Dewangan0651eed2012-03-13 11:35:20 +0530219 .enable_time_us = 350,
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500220 },
221 {
222 .name = "VDDCTRL",
223 .min_uV = 600000,
224 .max_uV = 1400000,
Laxman Dewangan7d38a3c2012-01-20 16:36:22 +0530225 .n_voltages = 65,
Laxman Dewangan0651eed2012-03-13 11:35:20 +0530226 .enable_time_us = 900,
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500227 },
228 {
229 .name = "LDO1",
230 .min_uV = 1000000,
231 .max_uV = 3300000,
Laxman Dewangan7d38a3c2012-01-20 16:36:22 +0530232 .n_voltages = 47,
Laxman Dewangan0651eed2012-03-13 11:35:20 +0530233 .enable_time_us = 420,
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500234 },
235 {
236 .name = "LDO2",
237 .min_uV = 1000000,
238 .max_uV = 3300000,
Laxman Dewangan7d38a3c2012-01-20 16:36:22 +0530239 .n_voltages = 47,
Laxman Dewangan0651eed2012-03-13 11:35:20 +0530240 .enable_time_us = 420,
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500241 },
242 {
243 .name = "LDO3",
244 .min_uV = 1000000,
245 .max_uV = 3300000,
Laxman Dewangan7d38a3c2012-01-20 16:36:22 +0530246 .n_voltages = 24,
Laxman Dewangan0651eed2012-03-13 11:35:20 +0530247 .enable_time_us = 230,
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500248 },
249 {
250 .name = "LDO4",
251 .min_uV = 1000000,
252 .max_uV = 3300000,
Laxman Dewangan7d38a3c2012-01-20 16:36:22 +0530253 .n_voltages = 47,
Laxman Dewangan0651eed2012-03-13 11:35:20 +0530254 .enable_time_us = 230,
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500255 },
256 {
257 .name = "LDO5",
258 .min_uV = 1000000,
259 .max_uV = 3300000,
Laxman Dewangan7d38a3c2012-01-20 16:36:22 +0530260 .n_voltages = 24,
Laxman Dewangan0651eed2012-03-13 11:35:20 +0530261 .enable_time_us = 230,
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500262 },
263 {
264 .name = "LDO6",
265 .min_uV = 1000000,
266 .max_uV = 3300000,
Laxman Dewangan7d38a3c2012-01-20 16:36:22 +0530267 .n_voltages = 24,
Laxman Dewangan0651eed2012-03-13 11:35:20 +0530268 .enable_time_us = 230,
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500269 },
270 {
271 .name = "LDO7",
272 .min_uV = 1000000,
273 .max_uV = 3300000,
Laxman Dewangan7d38a3c2012-01-20 16:36:22 +0530274 .n_voltages = 24,
Laxman Dewangan0651eed2012-03-13 11:35:20 +0530275 .enable_time_us = 230,
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500276 },
277 {
278 .name = "LDO8",
279 .min_uV = 1000000,
280 .max_uV = 3300000,
Laxman Dewangan7d38a3c2012-01-20 16:36:22 +0530281 .n_voltages = 24,
Laxman Dewangan0651eed2012-03-13 11:35:20 +0530282 .enable_time_us = 230,
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500283 },
284};
285
Laxman Dewangan1e0c66f2012-01-28 15:07:57 +0530286#define EXT_CONTROL_REG_BITS(id, regs_offs, bits) (((regs_offs) << 8) | (bits))
287static unsigned int tps65910_ext_sleep_control[] = {
288 0,
289 EXT_CONTROL_REG_BITS(VIO, 1, 0),
290 EXT_CONTROL_REG_BITS(VDD1, 1, 1),
291 EXT_CONTROL_REG_BITS(VDD2, 1, 2),
292 EXT_CONTROL_REG_BITS(VDD3, 1, 3),
293 EXT_CONTROL_REG_BITS(VDIG1, 0, 1),
294 EXT_CONTROL_REG_BITS(VDIG2, 0, 2),
295 EXT_CONTROL_REG_BITS(VPLL, 0, 6),
296 EXT_CONTROL_REG_BITS(VDAC, 0, 7),
297 EXT_CONTROL_REG_BITS(VAUX1, 0, 3),
298 EXT_CONTROL_REG_BITS(VAUX2, 0, 4),
299 EXT_CONTROL_REG_BITS(VAUX33, 0, 5),
300 EXT_CONTROL_REG_BITS(VMMC, 0, 0),
301};
302
303static unsigned int tps65911_ext_sleep_control[] = {
304 0,
305 EXT_CONTROL_REG_BITS(VIO, 1, 0),
306 EXT_CONTROL_REG_BITS(VDD1, 1, 1),
307 EXT_CONTROL_REG_BITS(VDD2, 1, 2),
308 EXT_CONTROL_REG_BITS(VDDCTRL, 1, 3),
309 EXT_CONTROL_REG_BITS(LDO1, 0, 1),
310 EXT_CONTROL_REG_BITS(LDO2, 0, 2),
311 EXT_CONTROL_REG_BITS(LDO3, 0, 7),
312 EXT_CONTROL_REG_BITS(LDO4, 0, 6),
313 EXT_CONTROL_REG_BITS(LDO5, 0, 3),
314 EXT_CONTROL_REG_BITS(LDO6, 0, 0),
315 EXT_CONTROL_REG_BITS(LDO7, 0, 5),
316 EXT_CONTROL_REG_BITS(LDO8, 0, 4),
317};
318
Graeme Gregory518fb722011-05-02 16:20:08 -0500319struct tps65910_reg {
Axel Lin39aa9b62011-07-11 09:57:43 +0800320 struct regulator_desc *desc;
Graeme Gregory518fb722011-05-02 16:20:08 -0500321 struct tps65910 *mfd;
Axel Lin39aa9b62011-07-11 09:57:43 +0800322 struct regulator_dev **rdev;
323 struct tps_info **info;
Graeme Gregory518fb722011-05-02 16:20:08 -0500324 struct mutex mutex;
Axel Lin39aa9b62011-07-11 09:57:43 +0800325 int num_regulators;
Graeme Gregory518fb722011-05-02 16:20:08 -0500326 int mode;
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500327 int (*get_ctrl_reg)(int);
Laxman Dewangan1e0c66f2012-01-28 15:07:57 +0530328 unsigned int *ext_sleep_control;
329 unsigned int board_ext_control[TPS65910_NUM_REGS];
Graeme Gregory518fb722011-05-02 16:20:08 -0500330};
331
332static inline int tps65910_read(struct tps65910_reg *pmic, u8 reg)
333{
334 u8 val;
335 int err;
336
337 err = pmic->mfd->read(pmic->mfd, reg, 1, &val);
338 if (err)
339 return err;
340
341 return val;
342}
343
344static inline int tps65910_write(struct tps65910_reg *pmic, u8 reg, u8 val)
345{
346 return pmic->mfd->write(pmic->mfd, reg, 1, &val);
347}
348
349static int tps65910_modify_bits(struct tps65910_reg *pmic, u8 reg,
350 u8 set_mask, u8 clear_mask)
351{
352 int err, data;
353
354 mutex_lock(&pmic->mutex);
355
356 data = tps65910_read(pmic, reg);
357 if (data < 0) {
358 dev_err(pmic->mfd->dev, "Read from reg 0x%x failed\n", reg);
359 err = data;
360 goto out;
361 }
362
363 data &= ~clear_mask;
364 data |= set_mask;
365 err = tps65910_write(pmic, reg, data);
366 if (err)
367 dev_err(pmic->mfd->dev, "Write for reg 0x%x failed\n", reg);
368
369out:
370 mutex_unlock(&pmic->mutex);
371 return err;
372}
373
374static int tps65910_reg_read(struct tps65910_reg *pmic, u8 reg)
375{
376 int data;
377
378 mutex_lock(&pmic->mutex);
379
380 data = tps65910_read(pmic, reg);
381 if (data < 0)
382 dev_err(pmic->mfd->dev, "Read from reg 0x%x failed\n", reg);
383
384 mutex_unlock(&pmic->mutex);
385 return data;
386}
387
388static int tps65910_reg_write(struct tps65910_reg *pmic, u8 reg, u8 val)
389{
390 int err;
391
392 mutex_lock(&pmic->mutex);
393
394 err = tps65910_write(pmic, reg, val);
395 if (err < 0)
396 dev_err(pmic->mfd->dev, "Write for reg 0x%x failed\n", reg);
397
398 mutex_unlock(&pmic->mutex);
399 return err;
400}
401
402static int tps65910_get_ctrl_register(int id)
403{
404 switch (id) {
405 case TPS65910_REG_VRTC:
406 return TPS65910_VRTC;
407 case TPS65910_REG_VIO:
408 return TPS65910_VIO;
409 case TPS65910_REG_VDD1:
410 return TPS65910_VDD1;
411 case TPS65910_REG_VDD2:
412 return TPS65910_VDD2;
413 case TPS65910_REG_VDD3:
414 return TPS65910_VDD3;
415 case TPS65910_REG_VDIG1:
416 return TPS65910_VDIG1;
417 case TPS65910_REG_VDIG2:
418 return TPS65910_VDIG2;
419 case TPS65910_REG_VPLL:
420 return TPS65910_VPLL;
421 case TPS65910_REG_VDAC:
422 return TPS65910_VDAC;
423 case TPS65910_REG_VAUX1:
424 return TPS65910_VAUX1;
425 case TPS65910_REG_VAUX2:
426 return TPS65910_VAUX2;
427 case TPS65910_REG_VAUX33:
428 return TPS65910_VAUX33;
429 case TPS65910_REG_VMMC:
430 return TPS65910_VMMC;
431 default:
432 return -EINVAL;
433 }
434}
435
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500436static int tps65911_get_ctrl_register(int id)
437{
438 switch (id) {
439 case TPS65910_REG_VRTC:
440 return TPS65910_VRTC;
441 case TPS65910_REG_VIO:
442 return TPS65910_VIO;
443 case TPS65910_REG_VDD1:
444 return TPS65910_VDD1;
445 case TPS65910_REG_VDD2:
446 return TPS65910_VDD2;
447 case TPS65911_REG_VDDCTRL:
448 return TPS65911_VDDCTRL;
449 case TPS65911_REG_LDO1:
450 return TPS65911_LDO1;
451 case TPS65911_REG_LDO2:
452 return TPS65911_LDO2;
453 case TPS65911_REG_LDO3:
454 return TPS65911_LDO3;
455 case TPS65911_REG_LDO4:
456 return TPS65911_LDO4;
457 case TPS65911_REG_LDO5:
458 return TPS65911_LDO5;
459 case TPS65911_REG_LDO6:
460 return TPS65911_LDO6;
461 case TPS65911_REG_LDO7:
462 return TPS65911_LDO7;
463 case TPS65911_REG_LDO8:
464 return TPS65911_LDO8;
465 default:
466 return -EINVAL;
467 }
468}
469
Graeme Gregory518fb722011-05-02 16:20:08 -0500470static int tps65910_is_enabled(struct regulator_dev *dev)
471{
472 struct tps65910_reg *pmic = rdev_get_drvdata(dev);
473 int reg, value, id = rdev_get_id(dev);
474
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500475 reg = pmic->get_ctrl_reg(id);
Graeme Gregory518fb722011-05-02 16:20:08 -0500476 if (reg < 0)
477 return reg;
478
479 value = tps65910_reg_read(pmic, reg);
480 if (value < 0)
481 return value;
482
483 return value & TPS65910_SUPPLY_STATE_ENABLED;
484}
485
486static int tps65910_enable(struct regulator_dev *dev)
487{
488 struct tps65910_reg *pmic = rdev_get_drvdata(dev);
489 struct tps65910 *mfd = pmic->mfd;
490 int reg, id = rdev_get_id(dev);
491
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500492 reg = pmic->get_ctrl_reg(id);
Graeme Gregory518fb722011-05-02 16:20:08 -0500493 if (reg < 0)
494 return reg;
495
496 return tps65910_set_bits(mfd, reg, TPS65910_SUPPLY_STATE_ENABLED);
497}
498
499static int tps65910_disable(struct regulator_dev *dev)
500{
501 struct tps65910_reg *pmic = rdev_get_drvdata(dev);
502 struct tps65910 *mfd = pmic->mfd;
503 int reg, id = rdev_get_id(dev);
504
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500505 reg = pmic->get_ctrl_reg(id);
Graeme Gregory518fb722011-05-02 16:20:08 -0500506 if (reg < 0)
507 return reg;
508
509 return tps65910_clear_bits(mfd, reg, TPS65910_SUPPLY_STATE_ENABLED);
510}
511
Laxman Dewangan0651eed2012-03-13 11:35:20 +0530512static int tps65910_enable_time(struct regulator_dev *dev)
513{
514 struct tps65910_reg *pmic = rdev_get_drvdata(dev);
515 int id = rdev_get_id(dev);
516 return pmic->info[id]->enable_time_us;
517}
Graeme Gregory518fb722011-05-02 16:20:08 -0500518
519static int tps65910_set_mode(struct regulator_dev *dev, unsigned int mode)
520{
521 struct tps65910_reg *pmic = rdev_get_drvdata(dev);
522 struct tps65910 *mfd = pmic->mfd;
523 int reg, value, id = rdev_get_id(dev);
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500524
525 reg = pmic->get_ctrl_reg(id);
Graeme Gregory518fb722011-05-02 16:20:08 -0500526 if (reg < 0)
527 return reg;
528
529 switch (mode) {
530 case REGULATOR_MODE_NORMAL:
531 return tps65910_modify_bits(pmic, reg, LDO_ST_ON_BIT,
532 LDO_ST_MODE_BIT);
533 case REGULATOR_MODE_IDLE:
534 value = LDO_ST_ON_BIT | LDO_ST_MODE_BIT;
535 return tps65910_set_bits(mfd, reg, value);
536 case REGULATOR_MODE_STANDBY:
537 return tps65910_clear_bits(mfd, reg, LDO_ST_ON_BIT);
538 }
539
540 return -EINVAL;
541}
542
543static unsigned int tps65910_get_mode(struct regulator_dev *dev)
544{
545 struct tps65910_reg *pmic = rdev_get_drvdata(dev);
546 int reg, value, id = rdev_get_id(dev);
547
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500548 reg = pmic->get_ctrl_reg(id);
Graeme Gregory518fb722011-05-02 16:20:08 -0500549 if (reg < 0)
550 return reg;
551
552 value = tps65910_reg_read(pmic, reg);
553 if (value < 0)
554 return value;
555
Axel Lin58599392012-03-13 07:15:27 +0800556 if (!(value & LDO_ST_ON_BIT))
Graeme Gregory518fb722011-05-02 16:20:08 -0500557 return REGULATOR_MODE_STANDBY;
558 else if (value & LDO_ST_MODE_BIT)
559 return REGULATOR_MODE_IDLE;
560 else
561 return REGULATOR_MODE_NORMAL;
562}
563
564static int tps65910_get_voltage_dcdc(struct regulator_dev *dev)
565{
566 struct tps65910_reg *pmic = rdev_get_drvdata(dev);
567 int id = rdev_get_id(dev), voltage = 0;
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500568 int opvsel = 0, srvsel = 0, vselmax = 0, mult = 0, sr = 0;
Graeme Gregory518fb722011-05-02 16:20:08 -0500569
570 switch (id) {
571 case TPS65910_REG_VDD1:
572 opvsel = tps65910_reg_read(pmic, TPS65910_VDD1_OP);
573 mult = tps65910_reg_read(pmic, TPS65910_VDD1);
574 mult = (mult & VDD1_VGAIN_SEL_MASK) >> VDD1_VGAIN_SEL_SHIFT;
575 srvsel = tps65910_reg_read(pmic, TPS65910_VDD1_SR);
576 sr = opvsel & VDD1_OP_CMD_MASK;
577 opvsel &= VDD1_OP_SEL_MASK;
578 srvsel &= VDD1_SR_SEL_MASK;
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500579 vselmax = 75;
Graeme Gregory518fb722011-05-02 16:20:08 -0500580 break;
581 case TPS65910_REG_VDD2:
582 opvsel = tps65910_reg_read(pmic, TPS65910_VDD2_OP);
583 mult = tps65910_reg_read(pmic, TPS65910_VDD2);
584 mult = (mult & VDD2_VGAIN_SEL_MASK) >> VDD2_VGAIN_SEL_SHIFT;
585 srvsel = tps65910_reg_read(pmic, TPS65910_VDD2_SR);
586 sr = opvsel & VDD2_OP_CMD_MASK;
587 opvsel &= VDD2_OP_SEL_MASK;
588 srvsel &= VDD2_SR_SEL_MASK;
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500589 vselmax = 75;
590 break;
591 case TPS65911_REG_VDDCTRL:
592 opvsel = tps65910_reg_read(pmic, TPS65911_VDDCTRL_OP);
593 srvsel = tps65910_reg_read(pmic, TPS65911_VDDCTRL_SR);
594 sr = opvsel & VDDCTRL_OP_CMD_MASK;
595 opvsel &= VDDCTRL_OP_SEL_MASK;
596 srvsel &= VDDCTRL_SR_SEL_MASK;
597 vselmax = 64;
Graeme Gregory518fb722011-05-02 16:20:08 -0500598 break;
599 }
600
601 /* multiplier 0 == 1 but 2,3 normal */
602 if (!mult)
603 mult=1;
604
605 if (sr) {
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500606 /* normalise to valid range */
607 if (srvsel < 3)
608 srvsel = 3;
609 if (srvsel > vselmax)
610 srvsel = vselmax;
Graeme Gregory518fb722011-05-02 16:20:08 -0500611 srvsel -= 3;
612
613 voltage = (srvsel * VDD1_2_OFFSET + VDD1_2_MIN_VOLT) * 100;
614 } else {
615
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500616 /* normalise to valid range*/
617 if (opvsel < 3)
618 opvsel = 3;
619 if (opvsel > vselmax)
620 opvsel = vselmax;
Graeme Gregory518fb722011-05-02 16:20:08 -0500621 opvsel -= 3;
622
623 voltage = (opvsel * VDD1_2_OFFSET + VDD1_2_MIN_VOLT) * 100;
624 }
625
626 voltage *= mult;
627
628 return voltage;
629}
630
631static int tps65910_get_voltage(struct regulator_dev *dev)
632{
633 struct tps65910_reg *pmic = rdev_get_drvdata(dev);
634 int reg, value, id = rdev_get_id(dev), voltage = 0;
635
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500636 reg = pmic->get_ctrl_reg(id);
Graeme Gregory518fb722011-05-02 16:20:08 -0500637 if (reg < 0)
638 return reg;
639
640 value = tps65910_reg_read(pmic, reg);
641 if (value < 0)
642 return value;
643
644 switch (id) {
645 case TPS65910_REG_VIO:
646 case TPS65910_REG_VDIG1:
647 case TPS65910_REG_VDIG2:
648 case TPS65910_REG_VPLL:
649 case TPS65910_REG_VDAC:
650 case TPS65910_REG_VAUX1:
651 case TPS65910_REG_VAUX2:
652 case TPS65910_REG_VAUX33:
653 case TPS65910_REG_VMMC:
654 value &= LDO_SEL_MASK;
655 value >>= LDO_SEL_SHIFT;
656 break;
657 default:
658 return -EINVAL;
659 }
660
Laxman Dewangan7d38a3c2012-01-20 16:36:22 +0530661 voltage = pmic->info[id]->voltage_table[value] * 1000;
Graeme Gregory518fb722011-05-02 16:20:08 -0500662
663 return voltage;
664}
665
666static int tps65910_get_voltage_vdd3(struct regulator_dev *dev)
667{
668 return 5 * 1000 * 1000;
669}
670
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500671static int tps65911_get_voltage(struct regulator_dev *dev)
672{
673 struct tps65910_reg *pmic = rdev_get_drvdata(dev);
674 int step_mv, id = rdev_get_id(dev);
675 u8 value, reg;
676
677 reg = pmic->get_ctrl_reg(id);
678
679 value = tps65910_reg_read(pmic, reg);
680
681 switch (id) {
682 case TPS65911_REG_LDO1:
683 case TPS65911_REG_LDO2:
684 case TPS65911_REG_LDO4:
685 value &= LDO1_SEL_MASK;
686 value >>= LDO_SEL_SHIFT;
687 /* The first 5 values of the selector correspond to 1V */
688 if (value < 5)
689 value = 0;
690 else
691 value -= 4;
692
693 step_mv = 50;
694 break;
695 case TPS65911_REG_LDO3:
696 case TPS65911_REG_LDO5:
697 case TPS65911_REG_LDO6:
698 case TPS65911_REG_LDO7:
699 case TPS65911_REG_LDO8:
700 value &= LDO3_SEL_MASK;
701 value >>= LDO_SEL_SHIFT;
702 /* The first 3 values of the selector correspond to 1V */
703 if (value < 3)
704 value = 0;
705 else
706 value -= 2;
707
708 step_mv = 100;
709 break;
710 case TPS65910_REG_VIO:
Laxman Dewangane882eae2012-02-17 18:56:11 +0530711 value &= LDO_SEL_MASK;
712 value >>= LDO_SEL_SHIFT;
Laxman Dewangan7d38a3c2012-01-20 16:36:22 +0530713 return pmic->info[id]->voltage_table[value] * 1000;
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500714 default:
715 return -EINVAL;
716 }
717
718 return (LDO_MIN_VOLT + value * step_mv) * 1000;
719}
720
Axel Lin94732b92012-03-09 10:22:20 +0800721static int tps65910_set_voltage_dcdc_sel(struct regulator_dev *dev,
722 unsigned selector)
Graeme Gregory518fb722011-05-02 16:20:08 -0500723{
724 struct tps65910_reg *pmic = rdev_get_drvdata(dev);
725 int id = rdev_get_id(dev), vsel;
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500726 int dcdc_mult = 0;
Graeme Gregory518fb722011-05-02 16:20:08 -0500727
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500728 switch (id) {
729 case TPS65910_REG_VDD1:
Afzal Mohammed780dc9b2011-11-08 18:54:10 +0530730 dcdc_mult = (selector / VDD1_2_NUM_VOLT_FINE) + 1;
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500731 if (dcdc_mult == 1)
732 dcdc_mult--;
Afzal Mohammed780dc9b2011-11-08 18:54:10 +0530733 vsel = (selector % VDD1_2_NUM_VOLT_FINE) + 3;
Graeme Gregory518fb722011-05-02 16:20:08 -0500734
Graeme Gregory518fb722011-05-02 16:20:08 -0500735 tps65910_modify_bits(pmic, TPS65910_VDD1,
736 (dcdc_mult << VDD1_VGAIN_SEL_SHIFT),
737 VDD1_VGAIN_SEL_MASK);
738 tps65910_reg_write(pmic, TPS65910_VDD1_OP, vsel);
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500739 break;
740 case TPS65910_REG_VDD2:
Afzal Mohammed780dc9b2011-11-08 18:54:10 +0530741 dcdc_mult = (selector / VDD1_2_NUM_VOLT_FINE) + 1;
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500742 if (dcdc_mult == 1)
743 dcdc_mult--;
Afzal Mohammed780dc9b2011-11-08 18:54:10 +0530744 vsel = (selector % VDD1_2_NUM_VOLT_FINE) + 3;
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500745
Graeme Gregory518fb722011-05-02 16:20:08 -0500746 tps65910_modify_bits(pmic, TPS65910_VDD2,
747 (dcdc_mult << VDD2_VGAIN_SEL_SHIFT),
748 VDD1_VGAIN_SEL_MASK);
749 tps65910_reg_write(pmic, TPS65910_VDD2_OP, vsel);
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500750 break;
751 case TPS65911_REG_VDDCTRL:
752 vsel = selector;
753 tps65910_reg_write(pmic, TPS65911_VDDCTRL_OP, vsel);
Graeme Gregory518fb722011-05-02 16:20:08 -0500754 }
755
756 return 0;
757}
758
Axel Lin94732b92012-03-09 10:22:20 +0800759static int tps65910_set_voltage_sel(struct regulator_dev *dev,
760 unsigned selector)
Graeme Gregory518fb722011-05-02 16:20:08 -0500761{
762 struct tps65910_reg *pmic = rdev_get_drvdata(dev);
763 int reg, id = rdev_get_id(dev);
764
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500765 reg = pmic->get_ctrl_reg(id);
Graeme Gregory518fb722011-05-02 16:20:08 -0500766 if (reg < 0)
767 return reg;
768
769 switch (id) {
770 case TPS65910_REG_VIO:
771 case TPS65910_REG_VDIG1:
772 case TPS65910_REG_VDIG2:
773 case TPS65910_REG_VPLL:
774 case TPS65910_REG_VDAC:
775 case TPS65910_REG_VAUX1:
776 case TPS65910_REG_VAUX2:
777 case TPS65910_REG_VAUX33:
778 case TPS65910_REG_VMMC:
779 return tps65910_modify_bits(pmic, reg,
780 (selector << LDO_SEL_SHIFT), LDO_SEL_MASK);
781 }
782
783 return -EINVAL;
784}
785
Axel Lin94732b92012-03-09 10:22:20 +0800786static int tps65911_set_voltage_sel(struct regulator_dev *dev,
787 unsigned selector)
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500788{
789 struct tps65910_reg *pmic = rdev_get_drvdata(dev);
790 int reg, id = rdev_get_id(dev);
791
792 reg = pmic->get_ctrl_reg(id);
793 if (reg < 0)
794 return reg;
795
796 switch (id) {
797 case TPS65911_REG_LDO1:
798 case TPS65911_REG_LDO2:
799 case TPS65911_REG_LDO4:
800 return tps65910_modify_bits(pmic, reg,
801 (selector << LDO_SEL_SHIFT), LDO1_SEL_MASK);
802 case TPS65911_REG_LDO3:
803 case TPS65911_REG_LDO5:
804 case TPS65911_REG_LDO6:
805 case TPS65911_REG_LDO7:
806 case TPS65911_REG_LDO8:
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500807 return tps65910_modify_bits(pmic, reg,
808 (selector << LDO_SEL_SHIFT), LDO3_SEL_MASK);
Laxman Dewangane882eae2012-02-17 18:56:11 +0530809 case TPS65910_REG_VIO:
810 return tps65910_modify_bits(pmic, reg,
811 (selector << LDO_SEL_SHIFT), LDO_SEL_MASK);
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500812 }
813
814 return -EINVAL;
815}
816
817
Graeme Gregory518fb722011-05-02 16:20:08 -0500818static int tps65910_list_voltage_dcdc(struct regulator_dev *dev,
819 unsigned selector)
820{
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500821 int volt, mult = 1, id = rdev_get_id(dev);
Graeme Gregory518fb722011-05-02 16:20:08 -0500822
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500823 switch (id) {
824 case TPS65910_REG_VDD1:
825 case TPS65910_REG_VDD2:
Afzal Mohammed780dc9b2011-11-08 18:54:10 +0530826 mult = (selector / VDD1_2_NUM_VOLT_FINE) + 1;
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500827 volt = VDD1_2_MIN_VOLT +
Afzal Mohammed780dc9b2011-11-08 18:54:10 +0530828 (selector % VDD1_2_NUM_VOLT_FINE) * VDD1_2_OFFSET;
Axel Lind04156b2011-07-10 21:44:09 +0800829 break;
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500830 case TPS65911_REG_VDDCTRL:
831 volt = VDDCTRL_MIN_VOLT + (selector * VDDCTRL_OFFSET);
Axel Lind04156b2011-07-10 21:44:09 +0800832 break;
833 default:
834 BUG();
835 return -EINVAL;
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500836 }
Graeme Gregory518fb722011-05-02 16:20:08 -0500837
838 return volt * 100 * mult;
839}
840
841static int tps65910_list_voltage(struct regulator_dev *dev,
842 unsigned selector)
843{
844 struct tps65910_reg *pmic = rdev_get_drvdata(dev);
845 int id = rdev_get_id(dev), voltage;
846
847 if (id < TPS65910_REG_VIO || id > TPS65910_REG_VMMC)
848 return -EINVAL;
849
Laxman Dewangan7d38a3c2012-01-20 16:36:22 +0530850 if (selector >= pmic->info[id]->n_voltages)
Graeme Gregory518fb722011-05-02 16:20:08 -0500851 return -EINVAL;
852 else
Laxman Dewangan7d38a3c2012-01-20 16:36:22 +0530853 voltage = pmic->info[id]->voltage_table[selector] * 1000;
Graeme Gregory518fb722011-05-02 16:20:08 -0500854
855 return voltage;
856}
857
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500858static int tps65911_list_voltage(struct regulator_dev *dev, unsigned selector)
859{
860 struct tps65910_reg *pmic = rdev_get_drvdata(dev);
861 int step_mv = 0, id = rdev_get_id(dev);
862
863 switch(id) {
864 case TPS65911_REG_LDO1:
865 case TPS65911_REG_LDO2:
866 case TPS65911_REG_LDO4:
867 /* The first 5 values of the selector correspond to 1V */
868 if (selector < 5)
869 selector = 0;
870 else
871 selector -= 4;
872
873 step_mv = 50;
874 break;
875 case TPS65911_REG_LDO3:
876 case TPS65911_REG_LDO5:
877 case TPS65911_REG_LDO6:
878 case TPS65911_REG_LDO7:
879 case TPS65911_REG_LDO8:
880 /* The first 3 values of the selector correspond to 1V */
881 if (selector < 3)
882 selector = 0;
883 else
884 selector -= 2;
885
886 step_mv = 100;
887 break;
888 case TPS65910_REG_VIO:
Laxman Dewangan7d38a3c2012-01-20 16:36:22 +0530889 return pmic->info[id]->voltage_table[selector] * 1000;
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500890 default:
891 return -EINVAL;
892 }
893
894 return (LDO_MIN_VOLT + selector * step_mv) * 1000;
895}
896
Graeme Gregory518fb722011-05-02 16:20:08 -0500897/* Regulator ops (except VRTC) */
898static struct regulator_ops tps65910_ops_dcdc = {
899 .is_enabled = tps65910_is_enabled,
900 .enable = tps65910_enable,
901 .disable = tps65910_disable,
Laxman Dewangan0651eed2012-03-13 11:35:20 +0530902 .enable_time = tps65910_enable_time,
Graeme Gregory518fb722011-05-02 16:20:08 -0500903 .set_mode = tps65910_set_mode,
904 .get_mode = tps65910_get_mode,
905 .get_voltage = tps65910_get_voltage_dcdc,
Axel Lin94732b92012-03-09 10:22:20 +0800906 .set_voltage_sel = tps65910_set_voltage_dcdc_sel,
Graeme Gregory518fb722011-05-02 16:20:08 -0500907 .list_voltage = tps65910_list_voltage_dcdc,
908};
909
910static struct regulator_ops tps65910_ops_vdd3 = {
911 .is_enabled = tps65910_is_enabled,
912 .enable = tps65910_enable,
913 .disable = tps65910_disable,
Laxman Dewangan0651eed2012-03-13 11:35:20 +0530914 .enable_time = tps65910_enable_time,
Graeme Gregory518fb722011-05-02 16:20:08 -0500915 .set_mode = tps65910_set_mode,
916 .get_mode = tps65910_get_mode,
917 .get_voltage = tps65910_get_voltage_vdd3,
918 .list_voltage = tps65910_list_voltage,
919};
920
921static struct regulator_ops tps65910_ops = {
922 .is_enabled = tps65910_is_enabled,
923 .enable = tps65910_enable,
924 .disable = tps65910_disable,
Laxman Dewangan0651eed2012-03-13 11:35:20 +0530925 .enable_time = tps65910_enable_time,
Graeme Gregory518fb722011-05-02 16:20:08 -0500926 .set_mode = tps65910_set_mode,
927 .get_mode = tps65910_get_mode,
928 .get_voltage = tps65910_get_voltage,
Axel Lin94732b92012-03-09 10:22:20 +0800929 .set_voltage_sel = tps65910_set_voltage_sel,
Graeme Gregory518fb722011-05-02 16:20:08 -0500930 .list_voltage = tps65910_list_voltage,
931};
932
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500933static struct regulator_ops tps65911_ops = {
934 .is_enabled = tps65910_is_enabled,
935 .enable = tps65910_enable,
936 .disable = tps65910_disable,
Laxman Dewangan0651eed2012-03-13 11:35:20 +0530937 .enable_time = tps65910_enable_time,
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500938 .set_mode = tps65910_set_mode,
939 .get_mode = tps65910_get_mode,
940 .get_voltage = tps65911_get_voltage,
Axel Lin94732b92012-03-09 10:22:20 +0800941 .set_voltage_sel = tps65911_set_voltage_sel,
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500942 .list_voltage = tps65911_list_voltage,
943};
944
Laxman Dewangan1e0c66f2012-01-28 15:07:57 +0530945static int tps65910_set_ext_sleep_config(struct tps65910_reg *pmic,
946 int id, int ext_sleep_config)
947{
948 struct tps65910 *mfd = pmic->mfd;
949 u8 regoffs = (pmic->ext_sleep_control[id] >> 8) & 0xFF;
950 u8 bit_pos = (1 << pmic->ext_sleep_control[id] & 0xFF);
951 int ret;
952
953 /*
954 * Regulator can not be control from multiple external input EN1, EN2
955 * and EN3 together.
956 */
957 if (ext_sleep_config & EXT_SLEEP_CONTROL) {
958 int en_count;
959 en_count = ((ext_sleep_config &
960 TPS65910_SLEEP_CONTROL_EXT_INPUT_EN1) != 0);
961 en_count += ((ext_sleep_config &
962 TPS65910_SLEEP_CONTROL_EXT_INPUT_EN2) != 0);
963 en_count += ((ext_sleep_config &
964 TPS65910_SLEEP_CONTROL_EXT_INPUT_EN3) != 0);
Laxman Dewanganf30b0712012-03-07 18:21:49 +0530965 en_count += ((ext_sleep_config &
966 TPS65911_SLEEP_CONTROL_EXT_INPUT_SLEEP) != 0);
Laxman Dewangan1e0c66f2012-01-28 15:07:57 +0530967 if (en_count > 1) {
968 dev_err(mfd->dev,
969 "External sleep control flag is not proper\n");
970 return -EINVAL;
971 }
972 }
973
974 pmic->board_ext_control[id] = ext_sleep_config;
975
976 /* External EN1 control */
977 if (ext_sleep_config & TPS65910_SLEEP_CONTROL_EXT_INPUT_EN1)
978 ret = tps65910_set_bits(mfd,
979 TPS65910_EN1_LDO_ASS + regoffs, bit_pos);
980 else
981 ret = tps65910_clear_bits(mfd,
982 TPS65910_EN1_LDO_ASS + regoffs, bit_pos);
983 if (ret < 0) {
984 dev_err(mfd->dev,
985 "Error in configuring external control EN1\n");
986 return ret;
987 }
988
989 /* External EN2 control */
990 if (ext_sleep_config & TPS65910_SLEEP_CONTROL_EXT_INPUT_EN2)
991 ret = tps65910_set_bits(mfd,
992 TPS65910_EN2_LDO_ASS + regoffs, bit_pos);
993 else
994 ret = tps65910_clear_bits(mfd,
995 TPS65910_EN2_LDO_ASS + regoffs, bit_pos);
996 if (ret < 0) {
997 dev_err(mfd->dev,
998 "Error in configuring external control EN2\n");
999 return ret;
1000 }
1001
1002 /* External EN3 control for TPS65910 LDO only */
1003 if ((tps65910_chip_id(mfd) == TPS65910) &&
1004 (id >= TPS65910_REG_VDIG1)) {
1005 if (ext_sleep_config & TPS65910_SLEEP_CONTROL_EXT_INPUT_EN3)
1006 ret = tps65910_set_bits(mfd,
1007 TPS65910_EN3_LDO_ASS + regoffs, bit_pos);
1008 else
1009 ret = tps65910_clear_bits(mfd,
1010 TPS65910_EN3_LDO_ASS + regoffs, bit_pos);
1011 if (ret < 0) {
1012 dev_err(mfd->dev,
1013 "Error in configuring external control EN3\n");
1014 return ret;
1015 }
1016 }
1017
1018 /* Return if no external control is selected */
1019 if (!(ext_sleep_config & EXT_SLEEP_CONTROL)) {
1020 /* Clear all sleep controls */
1021 ret = tps65910_clear_bits(mfd,
1022 TPS65910_SLEEP_KEEP_LDO_ON + regoffs, bit_pos);
1023 if (!ret)
1024 ret = tps65910_clear_bits(mfd,
1025 TPS65910_SLEEP_SET_LDO_OFF + regoffs, bit_pos);
1026 if (ret < 0)
1027 dev_err(mfd->dev,
1028 "Error in configuring SLEEP register\n");
1029 return ret;
1030 }
1031
1032 /*
1033 * For regulator that has separate operational and sleep register make
1034 * sure that operational is used and clear sleep register to turn
1035 * regulator off when external control is inactive
1036 */
1037 if ((id == TPS65910_REG_VDD1) ||
1038 (id == TPS65910_REG_VDD2) ||
1039 ((id == TPS65911_REG_VDDCTRL) &&
1040 (tps65910_chip_id(mfd) == TPS65911))) {
1041 int op_reg_add = pmic->get_ctrl_reg(id) + 1;
1042 int sr_reg_add = pmic->get_ctrl_reg(id) + 2;
1043 int opvsel = tps65910_reg_read(pmic, op_reg_add);
1044 int srvsel = tps65910_reg_read(pmic, sr_reg_add);
1045 if (opvsel & VDD1_OP_CMD_MASK) {
1046 u8 reg_val = srvsel & VDD1_OP_SEL_MASK;
1047 ret = tps65910_reg_write(pmic, op_reg_add, reg_val);
1048 if (ret < 0) {
1049 dev_err(mfd->dev,
1050 "Error in configuring op register\n");
1051 return ret;
1052 }
1053 }
1054 ret = tps65910_reg_write(pmic, sr_reg_add, 0);
1055 if (ret < 0) {
1056 dev_err(mfd->dev, "Error in settting sr register\n");
1057 return ret;
1058 }
1059 }
1060
1061 ret = tps65910_clear_bits(mfd,
1062 TPS65910_SLEEP_KEEP_LDO_ON + regoffs, bit_pos);
Laxman Dewanganf30b0712012-03-07 18:21:49 +05301063 if (!ret) {
1064 if (ext_sleep_config & TPS65911_SLEEP_CONTROL_EXT_INPUT_SLEEP)
1065 ret = tps65910_set_bits(mfd,
1066 TPS65910_SLEEP_SET_LDO_OFF + regoffs, bit_pos);
1067 else
1068 ret = tps65910_clear_bits(mfd,
1069 TPS65910_SLEEP_SET_LDO_OFF + regoffs, bit_pos);
1070 }
Laxman Dewangan1e0c66f2012-01-28 15:07:57 +05301071 if (ret < 0)
1072 dev_err(mfd->dev,
1073 "Error in configuring SLEEP register\n");
Laxman Dewanganf30b0712012-03-07 18:21:49 +05301074
Laxman Dewangan1e0c66f2012-01-28 15:07:57 +05301075 return ret;
1076}
1077
Graeme Gregory518fb722011-05-02 16:20:08 -05001078static __devinit int tps65910_probe(struct platform_device *pdev)
1079{
1080 struct tps65910 *tps65910 = dev_get_drvdata(pdev->dev.parent);
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -05001081 struct tps_info *info;
Graeme Gregory518fb722011-05-02 16:20:08 -05001082 struct regulator_init_data *reg_data;
1083 struct regulator_dev *rdev;
1084 struct tps65910_reg *pmic;
1085 struct tps65910_board *pmic_plat_data;
Graeme Gregory518fb722011-05-02 16:20:08 -05001086 int i, err;
1087
1088 pmic_plat_data = dev_get_platdata(tps65910->dev);
1089 if (!pmic_plat_data)
1090 return -EINVAL;
1091
Graeme Gregory518fb722011-05-02 16:20:08 -05001092 pmic = kzalloc(sizeof(*pmic), GFP_KERNEL);
1093 if (!pmic)
1094 return -ENOMEM;
1095
1096 mutex_init(&pmic->mutex);
1097 pmic->mfd = tps65910;
1098 platform_set_drvdata(pdev, pmic);
1099
1100 /* Give control of all register to control port */
1101 tps65910_set_bits(pmic->mfd, TPS65910_DEVCTRL,
1102 DEVCTRL_SR_CTL_I2C_SEL_MASK);
1103
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -05001104 switch(tps65910_chip_id(tps65910)) {
1105 case TPS65910:
1106 pmic->get_ctrl_reg = &tps65910_get_ctrl_register;
Axel Lin39aa9b62011-07-11 09:57:43 +08001107 pmic->num_regulators = ARRAY_SIZE(tps65910_regs);
Laxman Dewangan1e0c66f2012-01-28 15:07:57 +05301108 pmic->ext_sleep_control = tps65910_ext_sleep_control;
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -05001109 info = tps65910_regs;
Axel Lind04156b2011-07-10 21:44:09 +08001110 break;
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -05001111 case TPS65911:
1112 pmic->get_ctrl_reg = &tps65911_get_ctrl_register;
Axel Lin39aa9b62011-07-11 09:57:43 +08001113 pmic->num_regulators = ARRAY_SIZE(tps65911_regs);
Laxman Dewangan1e0c66f2012-01-28 15:07:57 +05301114 pmic->ext_sleep_control = tps65911_ext_sleep_control;
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -05001115 info = tps65911_regs;
Axel Lind04156b2011-07-10 21:44:09 +08001116 break;
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -05001117 default:
1118 pr_err("Invalid tps chip version\n");
Axel Lina3ee13e2011-07-10 18:52:07 +08001119 kfree(pmic);
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -05001120 return -ENODEV;
1121 }
1122
Axel Lin39aa9b62011-07-11 09:57:43 +08001123 pmic->desc = kcalloc(pmic->num_regulators,
1124 sizeof(struct regulator_desc), GFP_KERNEL);
1125 if (!pmic->desc) {
1126 err = -ENOMEM;
1127 goto err_free_pmic;
1128 }
1129
1130 pmic->info = kcalloc(pmic->num_regulators,
1131 sizeof(struct tps_info *), GFP_KERNEL);
1132 if (!pmic->info) {
1133 err = -ENOMEM;
1134 goto err_free_desc;
1135 }
1136
1137 pmic->rdev = kcalloc(pmic->num_regulators,
1138 sizeof(struct regulator_dev *), GFP_KERNEL);
1139 if (!pmic->rdev) {
1140 err = -ENOMEM;
1141 goto err_free_info;
1142 }
1143
Kyle Mannac1fc1482011-11-03 12:08:06 -05001144 for (i = 0; i < pmic->num_regulators && i < TPS65910_NUM_REGS;
1145 i++, info++) {
1146
1147 reg_data = pmic_plat_data->tps65910_pmic_init_data[i];
1148
1149 /* Regulator API handles empty constraints but not NULL
1150 * constraints */
1151 if (!reg_data)
1152 continue;
1153
Graeme Gregory518fb722011-05-02 16:20:08 -05001154 /* Register the regulators */
1155 pmic->info[i] = info;
1156
1157 pmic->desc[i].name = info->name;
Axel Lin77fa44d2011-05-12 13:47:50 +08001158 pmic->desc[i].id = i;
Laxman Dewangan7d38a3c2012-01-20 16:36:22 +05301159 pmic->desc[i].n_voltages = info->n_voltages;
Graeme Gregory518fb722011-05-02 16:20:08 -05001160
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -05001161 if (i == TPS65910_REG_VDD1 || i == TPS65910_REG_VDD2) {
Graeme Gregory518fb722011-05-02 16:20:08 -05001162 pmic->desc[i].ops = &tps65910_ops_dcdc;
Afzal Mohammed780dc9b2011-11-08 18:54:10 +05301163 pmic->desc[i].n_voltages = VDD1_2_NUM_VOLT_FINE *
1164 VDD1_2_NUM_VOLT_COARSE;
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -05001165 } else if (i == TPS65910_REG_VDD3) {
1166 if (tps65910_chip_id(tps65910) == TPS65910)
1167 pmic->desc[i].ops = &tps65910_ops_vdd3;
1168 else
1169 pmic->desc[i].ops = &tps65910_ops_dcdc;
1170 } else {
1171 if (tps65910_chip_id(tps65910) == TPS65910)
1172 pmic->desc[i].ops = &tps65910_ops;
1173 else
1174 pmic->desc[i].ops = &tps65911_ops;
1175 }
Graeme Gregory518fb722011-05-02 16:20:08 -05001176
Laxman Dewangan1e0c66f2012-01-28 15:07:57 +05301177 err = tps65910_set_ext_sleep_config(pmic, i,
1178 pmic_plat_data->regulator_ext_sleep_control[i]);
1179 /*
1180 * Failing on regulator for configuring externally control
1181 * is not a serious issue, just throw warning.
1182 */
1183 if (err < 0)
1184 dev_warn(tps65910->dev,
1185 "Failed to initialise ext control config\n");
1186
Graeme Gregory518fb722011-05-02 16:20:08 -05001187 pmic->desc[i].type = REGULATOR_VOLTAGE;
1188 pmic->desc[i].owner = THIS_MODULE;
1189
1190 rdev = regulator_register(&pmic->desc[i],
Rajendra Nayak2c043bc2011-11-18 16:47:19 +05301191 tps65910->dev, reg_data, pmic, NULL);
Graeme Gregory518fb722011-05-02 16:20:08 -05001192 if (IS_ERR(rdev)) {
1193 dev_err(tps65910->dev,
1194 "failed to register %s regulator\n",
1195 pdev->name);
1196 err = PTR_ERR(rdev);
Axel Lin39aa9b62011-07-11 09:57:43 +08001197 goto err_unregister_regulator;
Graeme Gregory518fb722011-05-02 16:20:08 -05001198 }
1199
1200 /* Save regulator for cleanup */
1201 pmic->rdev[i] = rdev;
1202 }
1203 return 0;
1204
Axel Lin39aa9b62011-07-11 09:57:43 +08001205err_unregister_regulator:
Graeme Gregory518fb722011-05-02 16:20:08 -05001206 while (--i >= 0)
1207 regulator_unregister(pmic->rdev[i]);
Axel Lin39aa9b62011-07-11 09:57:43 +08001208 kfree(pmic->rdev);
1209err_free_info:
1210 kfree(pmic->info);
1211err_free_desc:
1212 kfree(pmic->desc);
1213err_free_pmic:
Graeme Gregory518fb722011-05-02 16:20:08 -05001214 kfree(pmic);
1215 return err;
1216}
1217
1218static int __devexit tps65910_remove(struct platform_device *pdev)
1219{
Axel Lin39aa9b62011-07-11 09:57:43 +08001220 struct tps65910_reg *pmic = platform_get_drvdata(pdev);
Graeme Gregory518fb722011-05-02 16:20:08 -05001221 int i;
1222
Axel Lin39aa9b62011-07-11 09:57:43 +08001223 for (i = 0; i < pmic->num_regulators; i++)
1224 regulator_unregister(pmic->rdev[i]);
Graeme Gregory518fb722011-05-02 16:20:08 -05001225
Axel Lin39aa9b62011-07-11 09:57:43 +08001226 kfree(pmic->rdev);
1227 kfree(pmic->info);
1228 kfree(pmic->desc);
1229 kfree(pmic);
Graeme Gregory518fb722011-05-02 16:20:08 -05001230 return 0;
1231}
1232
Laxman Dewangan1e0c66f2012-01-28 15:07:57 +05301233static void tps65910_shutdown(struct platform_device *pdev)
1234{
1235 struct tps65910_reg *pmic = platform_get_drvdata(pdev);
1236 int i;
1237
1238 /*
1239 * Before bootloader jumps to kernel, it makes sure that required
1240 * external control signals are in desired state so that given rails
1241 * can be configure accordingly.
1242 * If rails are configured to be controlled from external control
1243 * then before shutting down/rebooting the system, the external
1244 * control configuration need to be remove from the rails so that
1245 * its output will be available as per register programming even
1246 * if external controls are removed. This is require when the POR
1247 * value of the control signals are not in active state and before
1248 * bootloader initializes it, the system requires the rail output
1249 * to be active for booting.
1250 */
1251 for (i = 0; i < pmic->num_regulators; i++) {
1252 int err;
1253 if (!pmic->rdev[i])
1254 continue;
1255
1256 err = tps65910_set_ext_sleep_config(pmic, i, 0);
1257 if (err < 0)
1258 dev_err(&pdev->dev,
1259 "Error in clearing external control\n");
1260 }
1261}
1262
Graeme Gregory518fb722011-05-02 16:20:08 -05001263static struct platform_driver tps65910_driver = {
1264 .driver = {
1265 .name = "tps65910-pmic",
1266 .owner = THIS_MODULE,
1267 },
1268 .probe = tps65910_probe,
1269 .remove = __devexit_p(tps65910_remove),
Laxman Dewangan1e0c66f2012-01-28 15:07:57 +05301270 .shutdown = tps65910_shutdown,
Graeme Gregory518fb722011-05-02 16:20:08 -05001271};
1272
1273static int __init tps65910_init(void)
1274{
1275 return platform_driver_register(&tps65910_driver);
1276}
1277subsys_initcall(tps65910_init);
1278
1279static void __exit tps65910_cleanup(void)
1280{
1281 platform_driver_unregister(&tps65910_driver);
1282}
1283module_exit(tps65910_cleanup);
1284
1285MODULE_AUTHOR("Graeme Gregory <gg@slimlogic.co.uk>");
Axel Linae0e6542012-02-21 10:14:55 +08001286MODULE_DESCRIPTION("TPS65910/TPS65911 voltage regulator driver");
Graeme Gregory518fb722011-05-02 16:20:08 -05001287MODULE_LICENSE("GPL v2");
1288MODULE_ALIAS("platform:tps65910-pmic");