Rajeshwar Kurapaty | c155c35 | 2011-12-17 06:35:32 +0530 | [diff] [blame] | 1 | /* Copyright (c) 2011-2012, Code Aurora Forum. All rights reserved. |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 2 | * |
| 3 | * This program is free software; you can redistribute it and/or modify |
| 4 | * it under the terms of the GNU General Public License version 2 and |
| 5 | * only version 2 as published by the Free Software Foundation. |
| 6 | * |
| 7 | * This program is distributed in the hope that it will be useful, |
| 8 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 9 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 10 | * GNU General Public License for more details. |
| 11 | * |
| 12 | */ |
| 13 | |
| 14 | #include <linux/kernel.h> |
| 15 | #include <linux/list.h> |
| 16 | #include <linux/platform_device.h> |
| 17 | #include <linux/msm_rotator.h> |
Deepak Kotur | 12301a7 | 2011-11-09 18:30:29 -0800 | [diff] [blame] | 18 | #include <linux/ion.h> |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 19 | #include <linux/gpio.h> |
Pratik Patel | 1746b8f | 2012-06-02 21:11:41 -0700 | [diff] [blame] | 20 | #include <linux/coresight.h> |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 21 | #include <asm/clkdev.h> |
Jordan Crouse | 914de9b | 2012-07-09 13:49:46 -0600 | [diff] [blame] | 22 | #include <mach/kgsl.h> |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 23 | #include <linux/android_pmem.h> |
| 24 | #include <mach/irqs-8960.h> |
Mayank Rana | 9f51f58 | 2011-08-04 18:35:59 +0530 | [diff] [blame] | 25 | #include <mach/dma.h> |
| 26 | #include <linux/dma-mapping.h> |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 27 | #include <mach/board.h> |
| 28 | #include <mach/msm_iomap.h> |
| 29 | #include <mach/msm_hsusb.h> |
| 30 | #include <mach/msm_sps.h> |
| 31 | #include <mach/rpm.h> |
| 32 | #include <mach/msm_bus_board.h> |
| 33 | #include <mach/msm_memtypes.h> |
Eric Holmberg | 023d25c | 2012-03-01 12:27:55 -0700 | [diff] [blame] | 34 | #include <mach/msm_smd.h> |
Lucille Sylvester | 6e36241 | 2011-12-09 16:21:42 -0700 | [diff] [blame] | 35 | #include <mach/msm_dcvs.h> |
Laura Abbott | 532b2df | 2012-04-12 10:53:48 -0700 | [diff] [blame] | 36 | #include <mach/msm_rtb.h> |
Laura Abbott | 2ae8f36 | 2012-04-12 11:03:04 -0700 | [diff] [blame] | 37 | #include <mach/msm_cache_dump.h> |
Bhalchandra Gajare | 0e795c4 | 2011-08-15 18:10:30 -0700 | [diff] [blame] | 38 | #include <sound/msm-dai-q6.h> |
| 39 | #include <sound/apr_audio.h> |
Joel Nider | a126194 | 2011-09-12 16:30:09 +0300 | [diff] [blame] | 40 | #include <mach/msm_tsif.h> |
Stepan Moskovchenko | 2b4b1cd | 2012-03-29 18:21:04 -0700 | [diff] [blame] | 41 | #include <mach/msm_serial_hs_lite.h> |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 42 | #include "clock.h" |
| 43 | #include "devices.h" |
| 44 | #include "devices-msm8x60.h" |
| 45 | #include "footswitch.h" |
Jeff Ohlstein | 7e66855 | 2011-10-06 16:17:25 -0700 | [diff] [blame] | 46 | #include "msm_watchdog.h" |
Praveen Chidambaram | 7849901 | 2011-11-01 17:15:17 -0600 | [diff] [blame] | 47 | #include "rpm_log.h" |
Praveen Chidambaram | 7a71223 | 2011-10-28 13:39:45 -0600 | [diff] [blame] | 48 | #include "rpm_stats.h" |
Stephen Boyd | eb81988 | 2011-08-29 14:46:30 -0700 | [diff] [blame] | 49 | #include "pil-q6v4.h" |
| 50 | #include "scm-pas.h" |
Praveen Chidambaram | 5c8adf2 | 2012-02-23 18:44:37 -0700 | [diff] [blame] | 51 | #include <mach/msm_dcvs.h> |
Laura Abbott | 0577d7b | 2012-04-17 11:14:30 -0700 | [diff] [blame] | 52 | #include <mach/iommu_domains.h> |
Arun Menon | 697e91b | 2012-08-20 15:25:50 -0700 | [diff] [blame] | 53 | #include <mach/socinfo.h> |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 54 | |
| 55 | #ifdef CONFIG_MSM_MPM |
Subhash Jadavani | 909e04f | 2012-04-12 10:52:50 +0530 | [diff] [blame] | 56 | #include <mach/mpm.h> |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 57 | #endif |
| 58 | #ifdef CONFIG_MSM_DSPS |
| 59 | #include <mach/msm_dsps.h> |
| 60 | #endif |
| 61 | |
| 62 | |
| 63 | /* Address of GSBI blocks */ |
| 64 | #define MSM_GSBI1_PHYS 0x16000000 |
| 65 | #define MSM_GSBI2_PHYS 0x16100000 |
| 66 | #define MSM_GSBI3_PHYS 0x16200000 |
| 67 | #define MSM_GSBI4_PHYS 0x16300000 |
| 68 | #define MSM_GSBI5_PHYS 0x16400000 |
| 69 | #define MSM_GSBI6_PHYS 0x16500000 |
| 70 | #define MSM_GSBI7_PHYS 0x16600000 |
| 71 | #define MSM_GSBI8_PHYS 0x1A000000 |
| 72 | #define MSM_GSBI9_PHYS 0x1A100000 |
| 73 | #define MSM_GSBI10_PHYS 0x1A200000 |
| 74 | #define MSM_GSBI11_PHYS 0x12440000 |
| 75 | #define MSM_GSBI12_PHYS 0x12480000 |
| 76 | |
| 77 | #define MSM_UART2DM_PHYS (MSM_GSBI2_PHYS + 0x40000) |
| 78 | #define MSM_UART5DM_PHYS (MSM_GSBI5_PHYS + 0x40000) |
Mayank Rana | 9f51f58 | 2011-08-04 18:35:59 +0530 | [diff] [blame] | 79 | #define MSM_UART6DM_PHYS (MSM_GSBI6_PHYS + 0x40000) |
Stepan Moskovchenko | 2b4b1cd | 2012-03-29 18:21:04 -0700 | [diff] [blame] | 80 | #define MSM_UART8DM_PHYS (MSM_GSBI8_PHYS + 0x40000) |
Mayank Rana | e009c92 | 2012-03-22 03:02:06 +0530 | [diff] [blame] | 81 | #define MSM_UART9DM_PHYS (MSM_GSBI9_PHYS + 0x40000) |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 82 | |
| 83 | /* GSBI QUP devices */ |
| 84 | #define MSM_GSBI1_QUP_PHYS (MSM_GSBI1_PHYS + 0x80000) |
| 85 | #define MSM_GSBI2_QUP_PHYS (MSM_GSBI2_PHYS + 0x80000) |
| 86 | #define MSM_GSBI3_QUP_PHYS (MSM_GSBI3_PHYS + 0x80000) |
| 87 | #define MSM_GSBI4_QUP_PHYS (MSM_GSBI4_PHYS + 0x80000) |
| 88 | #define MSM_GSBI5_QUP_PHYS (MSM_GSBI5_PHYS + 0x80000) |
| 89 | #define MSM_GSBI6_QUP_PHYS (MSM_GSBI6_PHYS + 0x80000) |
| 90 | #define MSM_GSBI7_QUP_PHYS (MSM_GSBI7_PHYS + 0x80000) |
| 91 | #define MSM_GSBI8_QUP_PHYS (MSM_GSBI8_PHYS + 0x80000) |
| 92 | #define MSM_GSBI9_QUP_PHYS (MSM_GSBI9_PHYS + 0x80000) |
| 93 | #define MSM_GSBI10_QUP_PHYS (MSM_GSBI10_PHYS + 0x80000) |
| 94 | #define MSM_GSBI11_QUP_PHYS (MSM_GSBI11_PHYS + 0x20000) |
| 95 | #define MSM_GSBI12_QUP_PHYS (MSM_GSBI12_PHYS + 0x20000) |
| 96 | #define MSM_QUP_SIZE SZ_4K |
| 97 | |
| 98 | #define MSM_PMIC1_SSBI_CMD_PHYS 0x00500000 |
| 99 | #define MSM_PMIC2_SSBI_CMD_PHYS 0x00C00000 |
| 100 | #define MSM_PMIC_SSBI_SIZE SZ_4K |
| 101 | |
Stepan Moskovchenko | be5b45a | 2011-10-17 19:33:34 -0700 | [diff] [blame] | 102 | #define MSM8960_HSUSB_PHYS 0x12500000 |
| 103 | #define MSM8960_HSUSB_SIZE SZ_4K |
| 104 | |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 105 | static struct resource resources_otg[] = { |
| 106 | { |
| 107 | .start = MSM8960_HSUSB_PHYS, |
| 108 | .end = MSM8960_HSUSB_PHYS + MSM8960_HSUSB_SIZE, |
| 109 | .flags = IORESOURCE_MEM, |
| 110 | }, |
| 111 | { |
| 112 | .start = USB1_HS_IRQ, |
| 113 | .end = USB1_HS_IRQ, |
| 114 | .flags = IORESOURCE_IRQ, |
| 115 | }, |
| 116 | }; |
| 117 | |
Stepan Moskovchenko | 14aa649 | 2011-08-08 15:15:01 -0700 | [diff] [blame] | 118 | struct platform_device msm8960_device_otg = { |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 119 | .name = "msm_otg", |
| 120 | .id = -1, |
| 121 | .num_resources = ARRAY_SIZE(resources_otg), |
| 122 | .resource = resources_otg, |
| 123 | .dev = { |
| 124 | .coherent_dma_mask = 0xffffffff, |
| 125 | }, |
| 126 | }; |
| 127 | |
| 128 | static struct resource resources_hsusb[] = { |
| 129 | { |
| 130 | .start = MSM8960_HSUSB_PHYS, |
| 131 | .end = MSM8960_HSUSB_PHYS + MSM8960_HSUSB_SIZE, |
| 132 | .flags = IORESOURCE_MEM, |
| 133 | }, |
| 134 | { |
| 135 | .start = USB1_HS_IRQ, |
| 136 | .end = USB1_HS_IRQ, |
| 137 | .flags = IORESOURCE_IRQ, |
| 138 | }, |
| 139 | }; |
| 140 | |
Stepan Moskovchenko | 14aa649 | 2011-08-08 15:15:01 -0700 | [diff] [blame] | 141 | struct platform_device msm8960_device_gadget_peripheral = { |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 142 | .name = "msm_hsusb", |
| 143 | .id = -1, |
| 144 | .num_resources = ARRAY_SIZE(resources_hsusb), |
| 145 | .resource = resources_hsusb, |
| 146 | .dev = { |
| 147 | .coherent_dma_mask = 0xffffffff, |
| 148 | }, |
| 149 | }; |
| 150 | |
| 151 | static struct resource resources_hsusb_host[] = { |
| 152 | { |
| 153 | .start = MSM8960_HSUSB_PHYS, |
| 154 | .end = MSM8960_HSUSB_PHYS + MSM8960_HSUSB_SIZE - 1, |
| 155 | .flags = IORESOURCE_MEM, |
| 156 | }, |
| 157 | { |
| 158 | .start = USB1_HS_IRQ, |
| 159 | .end = USB1_HS_IRQ, |
| 160 | .flags = IORESOURCE_IRQ, |
| 161 | }, |
| 162 | }; |
| 163 | |
Vijayavardhan Vennapusa | eb56648 | 2011-09-18 07:48:37 +0530 | [diff] [blame] | 164 | static u64 dma_mask = DMA_BIT_MASK(32); |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 165 | struct platform_device msm_device_hsusb_host = { |
| 166 | .name = "msm_hsusb_host", |
| 167 | .id = -1, |
| 168 | .num_resources = ARRAY_SIZE(resources_hsusb_host), |
| 169 | .resource = resources_hsusb_host, |
| 170 | .dev = { |
| 171 | .dma_mask = &dma_mask, |
| 172 | .coherent_dma_mask = 0xffffffff, |
| 173 | }, |
| 174 | }; |
| 175 | |
Vijayavardhan Vennapusa | eb56648 | 2011-09-18 07:48:37 +0530 | [diff] [blame] | 176 | static struct resource resources_hsic_host[] = { |
| 177 | { |
Stepan Moskovchenko | 8e06ae6 | 2011-10-17 18:01:29 -0700 | [diff] [blame] | 178 | .start = 0x12520000, |
| 179 | .end = 0x12520000 + SZ_4K - 1, |
Vijayavardhan Vennapusa | eb56648 | 2011-09-18 07:48:37 +0530 | [diff] [blame] | 180 | .flags = IORESOURCE_MEM, |
| 181 | }, |
| 182 | { |
| 183 | .start = USB_HSIC_IRQ, |
| 184 | .end = USB_HSIC_IRQ, |
| 185 | .flags = IORESOURCE_IRQ, |
| 186 | }, |
Vamsi Krishna | 34f0158 | 2011-12-14 19:54:42 -0800 | [diff] [blame] | 187 | { |
| 188 | .start = MSM_GPIO_TO_INT(69), |
| 189 | .end = MSM_GPIO_TO_INT(69), |
| 190 | .name = "peripheral_status_irq", |
| 191 | .flags = IORESOURCE_IRQ, |
| 192 | }, |
Vijayavardhan Vennapusa | eb56648 | 2011-09-18 07:48:37 +0530 | [diff] [blame] | 193 | }; |
| 194 | |
| 195 | struct platform_device msm_device_hsic_host = { |
| 196 | .name = "msm_hsic_host", |
| 197 | .id = -1, |
| 198 | .num_resources = ARRAY_SIZE(resources_hsic_host), |
| 199 | .resource = resources_hsic_host, |
| 200 | .dev = { |
| 201 | .dma_mask = &dma_mask, |
| 202 | .coherent_dma_mask = DMA_BIT_MASK(32), |
| 203 | }, |
| 204 | }; |
| 205 | |
Matt Wagantall | bf430eb | 2012-03-22 11:45:49 -0700 | [diff] [blame] | 206 | struct platform_device msm8960_device_acpuclk = { |
| 207 | .name = "acpuclk-8960", |
| 208 | .id = -1, |
| 209 | }; |
| 210 | |
Patrick Daly | 6578e0c | 2012-07-19 18:50:02 -0700 | [diff] [blame] | 211 | struct platform_device msm8960ab_device_acpuclk = { |
| 212 | .name = "acpuclk-8960ab", |
| 213 | .id = -1, |
| 214 | }; |
| 215 | |
Mona Hossain | 11c03ac | 2011-10-26 12:42:10 -0700 | [diff] [blame] | 216 | #define SHARED_IMEM_TZ_BASE 0x2a03f720 |
| 217 | static struct resource tzlog_resources[] = { |
| 218 | { |
| 219 | .start = SHARED_IMEM_TZ_BASE, |
| 220 | .end = SHARED_IMEM_TZ_BASE + SZ_4K - 1, |
| 221 | .flags = IORESOURCE_MEM, |
| 222 | }, |
| 223 | }; |
| 224 | |
| 225 | struct platform_device msm_device_tz_log = { |
| 226 | .name = "tz_log", |
| 227 | .id = 0, |
| 228 | .num_resources = ARRAY_SIZE(tzlog_resources), |
| 229 | .resource = tzlog_resources, |
| 230 | }; |
| 231 | |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 232 | static struct resource resources_uart_gsbi2[] = { |
| 233 | { |
| 234 | .start = MSM8960_GSBI2_UARTDM_IRQ, |
| 235 | .end = MSM8960_GSBI2_UARTDM_IRQ, |
| 236 | .flags = IORESOURCE_IRQ, |
| 237 | }, |
| 238 | { |
| 239 | .start = MSM_UART2DM_PHYS, |
| 240 | .end = MSM_UART2DM_PHYS + PAGE_SIZE - 1, |
| 241 | .name = "uartdm_resource", |
| 242 | .flags = IORESOURCE_MEM, |
| 243 | }, |
| 244 | { |
| 245 | .start = MSM_GSBI2_PHYS, |
| 246 | .end = MSM_GSBI2_PHYS + PAGE_SIZE - 1, |
| 247 | .name = "gsbi_resource", |
| 248 | .flags = IORESOURCE_MEM, |
| 249 | }, |
| 250 | }; |
| 251 | |
| 252 | struct platform_device msm8960_device_uart_gsbi2 = { |
| 253 | .name = "msm_serial_hsl", |
| 254 | .id = 0, |
| 255 | .num_resources = ARRAY_SIZE(resources_uart_gsbi2), |
| 256 | .resource = resources_uart_gsbi2, |
| 257 | }; |
Mayank Rana | 9f51f58 | 2011-08-04 18:35:59 +0530 | [diff] [blame] | 258 | /* GSBI 6 used into UARTDM Mode */ |
| 259 | static struct resource msm_uart_dm6_resources[] = { |
| 260 | { |
| 261 | .start = MSM_UART6DM_PHYS, |
| 262 | .end = MSM_UART6DM_PHYS + PAGE_SIZE - 1, |
| 263 | .name = "uartdm_resource", |
| 264 | .flags = IORESOURCE_MEM, |
| 265 | }, |
| 266 | { |
| 267 | .start = GSBI6_UARTDM_IRQ, |
| 268 | .end = GSBI6_UARTDM_IRQ, |
| 269 | .flags = IORESOURCE_IRQ, |
| 270 | }, |
| 271 | { |
| 272 | .start = MSM_GSBI6_PHYS, |
| 273 | .end = MSM_GSBI6_PHYS + 4 - 1, |
| 274 | .name = "gsbi_resource", |
| 275 | .flags = IORESOURCE_MEM, |
| 276 | }, |
| 277 | { |
| 278 | .start = DMOV_HSUART_GSBI6_TX_CHAN, |
| 279 | .end = DMOV_HSUART_GSBI6_RX_CHAN, |
| 280 | .name = "uartdm_channels", |
| 281 | .flags = IORESOURCE_DMA, |
| 282 | }, |
| 283 | { |
| 284 | .start = DMOV_HSUART_GSBI6_TX_CRCI, |
| 285 | .end = DMOV_HSUART_GSBI6_RX_CRCI, |
| 286 | .name = "uartdm_crci", |
| 287 | .flags = IORESOURCE_DMA, |
| 288 | }, |
| 289 | }; |
| 290 | static u64 msm_uart_dm6_dma_mask = DMA_BIT_MASK(32); |
| 291 | struct platform_device msm_device_uart_dm6 = { |
| 292 | .name = "msm_serial_hs", |
| 293 | .id = 0, |
| 294 | .num_resources = ARRAY_SIZE(msm_uart_dm6_resources), |
| 295 | .resource = msm_uart_dm6_resources, |
| 296 | .dev = { |
| 297 | .dma_mask = &msm_uart_dm6_dma_mask, |
| 298 | .coherent_dma_mask = DMA_BIT_MASK(32), |
| 299 | }, |
| 300 | }; |
Mayank Rana | 1f02d95 | 2012-07-04 19:11:20 +0530 | [diff] [blame] | 301 | |
| 302 | /* GSBI 8 used into UARTDM Mode */ |
| 303 | static struct resource msm_uart_dm8_resources[] = { |
| 304 | { |
| 305 | .start = MSM_UART8DM_PHYS, |
| 306 | .end = MSM_UART8DM_PHYS + PAGE_SIZE - 1, |
| 307 | .name = "uartdm_resource", |
| 308 | .flags = IORESOURCE_MEM, |
| 309 | }, |
| 310 | { |
| 311 | .start = GSBI8_UARTDM_IRQ, |
| 312 | .end = GSBI8_UARTDM_IRQ, |
| 313 | .flags = IORESOURCE_IRQ, |
| 314 | }, |
| 315 | { |
| 316 | .start = MSM_GSBI8_PHYS, |
| 317 | .end = MSM_GSBI8_PHYS + 4 - 1, |
| 318 | .name = "gsbi_resource", |
| 319 | .flags = IORESOURCE_MEM, |
| 320 | }, |
| 321 | { |
| 322 | .start = DMOV_HSUART_GSBI8_TX_CHAN, |
| 323 | .end = DMOV_HSUART_GSBI8_RX_CHAN, |
| 324 | .name = "uartdm_channels", |
| 325 | .flags = IORESOURCE_DMA, |
| 326 | }, |
| 327 | { |
| 328 | .start = DMOV_HSUART_GSBI8_TX_CRCI, |
| 329 | .end = DMOV_HSUART_GSBI8_RX_CRCI, |
| 330 | .name = "uartdm_crci", |
| 331 | .flags = IORESOURCE_DMA, |
| 332 | }, |
| 333 | }; |
| 334 | |
| 335 | static u64 msm_uart_dm8_dma_mask = DMA_BIT_MASK(32); |
| 336 | struct platform_device msm_device_uart_dm8 = { |
| 337 | .name = "msm_serial_hs", |
| 338 | .id = 2, |
| 339 | .num_resources = ARRAY_SIZE(msm_uart_dm8_resources), |
| 340 | .resource = msm_uart_dm8_resources, |
| 341 | .dev = { |
| 342 | .dma_mask = &msm_uart_dm8_dma_mask, |
| 343 | .coherent_dma_mask = DMA_BIT_MASK(32), |
| 344 | }, |
| 345 | }; |
| 346 | |
Mayank Rana | e009c92 | 2012-03-22 03:02:06 +0530 | [diff] [blame] | 347 | /* |
| 348 | * GSBI 9 used into UARTDM Mode |
| 349 | * For 8960 Fusion 2.2 Primary IPC |
| 350 | */ |
| 351 | static struct resource msm_uart_dm9_resources[] = { |
| 352 | { |
| 353 | .start = MSM_UART9DM_PHYS, |
| 354 | .end = MSM_UART9DM_PHYS + PAGE_SIZE - 1, |
| 355 | .name = "uartdm_resource", |
| 356 | .flags = IORESOURCE_MEM, |
| 357 | }, |
| 358 | { |
| 359 | .start = GSBI9_UARTDM_IRQ, |
| 360 | .end = GSBI9_UARTDM_IRQ, |
| 361 | .flags = IORESOURCE_IRQ, |
| 362 | }, |
| 363 | { |
| 364 | .start = MSM_GSBI9_PHYS, |
| 365 | .end = MSM_GSBI9_PHYS + 4 - 1, |
| 366 | .name = "gsbi_resource", |
| 367 | .flags = IORESOURCE_MEM, |
| 368 | }, |
| 369 | { |
| 370 | .start = DMOV_HSUART_GSBI9_TX_CHAN, |
| 371 | .end = DMOV_HSUART_GSBI9_RX_CHAN, |
| 372 | .name = "uartdm_channels", |
| 373 | .flags = IORESOURCE_DMA, |
| 374 | }, |
| 375 | { |
| 376 | .start = DMOV_HSUART_GSBI9_TX_CRCI, |
| 377 | .end = DMOV_HSUART_GSBI9_RX_CRCI, |
| 378 | .name = "uartdm_crci", |
| 379 | .flags = IORESOURCE_DMA, |
| 380 | }, |
| 381 | }; |
| 382 | static u64 msm_uart_dm9_dma_mask = DMA_BIT_MASK(32); |
| 383 | struct platform_device msm_device_uart_dm9 = { |
| 384 | .name = "msm_serial_hs", |
| 385 | .id = 1, |
| 386 | .num_resources = ARRAY_SIZE(msm_uart_dm9_resources), |
| 387 | .resource = msm_uart_dm9_resources, |
| 388 | .dev = { |
| 389 | .dma_mask = &msm_uart_dm9_dma_mask, |
| 390 | .coherent_dma_mask = DMA_BIT_MASK(32), |
| 391 | }, |
| 392 | }; |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 393 | |
| 394 | static struct resource resources_uart_gsbi5[] = { |
| 395 | { |
| 396 | .start = GSBI5_UARTDM_IRQ, |
| 397 | .end = GSBI5_UARTDM_IRQ, |
| 398 | .flags = IORESOURCE_IRQ, |
| 399 | }, |
| 400 | { |
| 401 | .start = MSM_UART5DM_PHYS, |
| 402 | .end = MSM_UART5DM_PHYS + PAGE_SIZE - 1, |
| 403 | .name = "uartdm_resource", |
| 404 | .flags = IORESOURCE_MEM, |
| 405 | }, |
| 406 | { |
| 407 | .start = MSM_GSBI5_PHYS, |
| 408 | .end = MSM_GSBI5_PHYS + PAGE_SIZE - 1, |
| 409 | .name = "gsbi_resource", |
| 410 | .flags = IORESOURCE_MEM, |
| 411 | }, |
| 412 | }; |
| 413 | |
| 414 | struct platform_device msm8960_device_uart_gsbi5 = { |
| 415 | .name = "msm_serial_hsl", |
| 416 | .id = 0, |
| 417 | .num_resources = ARRAY_SIZE(resources_uart_gsbi5), |
| 418 | .resource = resources_uart_gsbi5, |
| 419 | }; |
Stepan Moskovchenko | 2b4b1cd | 2012-03-29 18:21:04 -0700 | [diff] [blame] | 420 | |
| 421 | static struct msm_serial_hslite_platform_data uart_gsbi8_pdata = { |
| 422 | .line = 0, |
| 423 | }; |
| 424 | |
| 425 | static struct resource resources_uart_gsbi8[] = { |
| 426 | { |
| 427 | .start = GSBI8_UARTDM_IRQ, |
| 428 | .end = GSBI8_UARTDM_IRQ, |
| 429 | .flags = IORESOURCE_IRQ, |
| 430 | }, |
| 431 | { |
| 432 | .start = MSM_UART8DM_PHYS, |
| 433 | .end = MSM_UART8DM_PHYS + PAGE_SIZE - 1, |
| 434 | .name = "uartdm_resource", |
| 435 | .flags = IORESOURCE_MEM, |
| 436 | }, |
| 437 | { |
| 438 | .start = MSM_GSBI8_PHYS, |
| 439 | .end = MSM_GSBI8_PHYS + PAGE_SIZE - 1, |
| 440 | .name = "gsbi_resource", |
| 441 | .flags = IORESOURCE_MEM, |
| 442 | }, |
| 443 | }; |
| 444 | |
| 445 | struct platform_device msm8960_device_uart_gsbi8 = { |
| 446 | .name = "msm_serial_hsl", |
| 447 | .id = 1, |
| 448 | .num_resources = ARRAY_SIZE(resources_uart_gsbi8), |
| 449 | .resource = resources_uart_gsbi8, |
| 450 | .dev.platform_data = &uart_gsbi8_pdata, |
| 451 | }; |
| 452 | |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 453 | /* MSM Video core device */ |
| 454 | #ifdef CONFIG_MSM_BUS_SCALING |
| 455 | static struct msm_bus_vectors vidc_init_vectors[] = { |
| 456 | { |
| 457 | .src = MSM_BUS_MASTER_HD_CODEC_PORT0, |
| 458 | .dst = MSM_BUS_SLAVE_EBI_CH0, |
| 459 | .ab = 0, |
| 460 | .ib = 0, |
| 461 | }, |
| 462 | { |
| 463 | .src = MSM_BUS_MASTER_HD_CODEC_PORT1, |
| 464 | .dst = MSM_BUS_SLAVE_EBI_CH0, |
| 465 | .ab = 0, |
| 466 | .ib = 0, |
| 467 | }, |
| 468 | { |
| 469 | .src = MSM_BUS_MASTER_AMPSS_M0, |
| 470 | .dst = MSM_BUS_SLAVE_EBI_CH0, |
| 471 | .ab = 0, |
| 472 | .ib = 0, |
| 473 | }, |
| 474 | { |
| 475 | .src = MSM_BUS_MASTER_AMPSS_M0, |
| 476 | .dst = MSM_BUS_SLAVE_EBI_CH0, |
| 477 | .ab = 0, |
| 478 | .ib = 0, |
| 479 | }, |
| 480 | }; |
| 481 | static struct msm_bus_vectors vidc_venc_vga_vectors[] = { |
| 482 | { |
| 483 | .src = MSM_BUS_MASTER_HD_CODEC_PORT0, |
| 484 | .dst = MSM_BUS_SLAVE_EBI_CH0, |
| 485 | .ab = 54525952, |
| 486 | .ib = 436207616, |
| 487 | }, |
| 488 | { |
| 489 | .src = MSM_BUS_MASTER_HD_CODEC_PORT1, |
| 490 | .dst = MSM_BUS_SLAVE_EBI_CH0, |
| 491 | .ab = 72351744, |
| 492 | .ib = 289406976, |
| 493 | }, |
| 494 | { |
| 495 | .src = MSM_BUS_MASTER_AMPSS_M0, |
| 496 | .dst = MSM_BUS_SLAVE_EBI_CH0, |
| 497 | .ab = 500000, |
| 498 | .ib = 1000000, |
| 499 | }, |
| 500 | { |
| 501 | .src = MSM_BUS_MASTER_AMPSS_M0, |
| 502 | .dst = MSM_BUS_SLAVE_EBI_CH0, |
| 503 | .ab = 500000, |
| 504 | .ib = 1000000, |
| 505 | }, |
| 506 | }; |
| 507 | static struct msm_bus_vectors vidc_vdec_vga_vectors[] = { |
| 508 | { |
| 509 | .src = MSM_BUS_MASTER_HD_CODEC_PORT0, |
| 510 | .dst = MSM_BUS_SLAVE_EBI_CH0, |
| 511 | .ab = 40894464, |
| 512 | .ib = 327155712, |
| 513 | }, |
| 514 | { |
| 515 | .src = MSM_BUS_MASTER_HD_CODEC_PORT1, |
| 516 | .dst = MSM_BUS_SLAVE_EBI_CH0, |
| 517 | .ab = 48234496, |
| 518 | .ib = 192937984, |
| 519 | }, |
| 520 | { |
| 521 | .src = MSM_BUS_MASTER_AMPSS_M0, |
| 522 | .dst = MSM_BUS_SLAVE_EBI_CH0, |
| 523 | .ab = 500000, |
| 524 | .ib = 2000000, |
| 525 | }, |
| 526 | { |
| 527 | .src = MSM_BUS_MASTER_AMPSS_M0, |
| 528 | .dst = MSM_BUS_SLAVE_EBI_CH0, |
| 529 | .ab = 500000, |
| 530 | .ib = 2000000, |
| 531 | }, |
| 532 | }; |
| 533 | static struct msm_bus_vectors vidc_venc_720p_vectors[] = { |
| 534 | { |
| 535 | .src = MSM_BUS_MASTER_HD_CODEC_PORT0, |
| 536 | .dst = MSM_BUS_SLAVE_EBI_CH0, |
| 537 | .ab = 163577856, |
| 538 | .ib = 1308622848, |
| 539 | }, |
| 540 | { |
| 541 | .src = MSM_BUS_MASTER_HD_CODEC_PORT1, |
| 542 | .dst = MSM_BUS_SLAVE_EBI_CH0, |
| 543 | .ab = 219152384, |
| 544 | .ib = 876609536, |
| 545 | }, |
| 546 | { |
| 547 | .src = MSM_BUS_MASTER_AMPSS_M0, |
| 548 | .dst = MSM_BUS_SLAVE_EBI_CH0, |
| 549 | .ab = 1750000, |
| 550 | .ib = 3500000, |
| 551 | }, |
| 552 | { |
| 553 | .src = MSM_BUS_MASTER_AMPSS_M0, |
| 554 | .dst = MSM_BUS_SLAVE_EBI_CH0, |
| 555 | .ab = 1750000, |
| 556 | .ib = 3500000, |
| 557 | }, |
| 558 | }; |
| 559 | static struct msm_bus_vectors vidc_vdec_720p_vectors[] = { |
| 560 | { |
| 561 | .src = MSM_BUS_MASTER_HD_CODEC_PORT0, |
| 562 | .dst = MSM_BUS_SLAVE_EBI_CH0, |
| 563 | .ab = 121634816, |
| 564 | .ib = 973078528, |
| 565 | }, |
| 566 | { |
| 567 | .src = MSM_BUS_MASTER_HD_CODEC_PORT1, |
| 568 | .dst = MSM_BUS_SLAVE_EBI_CH0, |
| 569 | .ab = 155189248, |
| 570 | .ib = 620756992, |
| 571 | }, |
| 572 | { |
| 573 | .src = MSM_BUS_MASTER_AMPSS_M0, |
| 574 | .dst = MSM_BUS_SLAVE_EBI_CH0, |
| 575 | .ab = 1750000, |
| 576 | .ib = 7000000, |
| 577 | }, |
| 578 | { |
| 579 | .src = MSM_BUS_MASTER_AMPSS_M0, |
| 580 | .dst = MSM_BUS_SLAVE_EBI_CH0, |
| 581 | .ab = 1750000, |
| 582 | .ib = 7000000, |
| 583 | }, |
| 584 | }; |
| 585 | static struct msm_bus_vectors vidc_venc_1080p_vectors[] = { |
| 586 | { |
| 587 | .src = MSM_BUS_MASTER_HD_CODEC_PORT0, |
| 588 | .dst = MSM_BUS_SLAVE_EBI_CH0, |
| 589 | .ab = 372244480, |
Gopikrishnaiah Anandan | 3e6bdda | 2011-11-04 16:05:04 -0700 | [diff] [blame] | 590 | .ib = 2560000000U, |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 591 | }, |
| 592 | { |
| 593 | .src = MSM_BUS_MASTER_HD_CODEC_PORT1, |
| 594 | .dst = MSM_BUS_SLAVE_EBI_CH0, |
| 595 | .ab = 501219328, |
Gopikrishnaiah Anandan | 3e6bdda | 2011-11-04 16:05:04 -0700 | [diff] [blame] | 596 | .ib = 2560000000U, |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 597 | }, |
| 598 | { |
| 599 | .src = MSM_BUS_MASTER_AMPSS_M0, |
| 600 | .dst = MSM_BUS_SLAVE_EBI_CH0, |
| 601 | .ab = 2500000, |
| 602 | .ib = 5000000, |
| 603 | }, |
| 604 | { |
| 605 | .src = MSM_BUS_MASTER_AMPSS_M0, |
| 606 | .dst = MSM_BUS_SLAVE_EBI_CH0, |
| 607 | .ab = 2500000, |
| 608 | .ib = 5000000, |
| 609 | }, |
| 610 | }; |
| 611 | static struct msm_bus_vectors vidc_vdec_1080p_vectors[] = { |
| 612 | { |
| 613 | .src = MSM_BUS_MASTER_HD_CODEC_PORT0, |
| 614 | .dst = MSM_BUS_SLAVE_EBI_CH0, |
| 615 | .ab = 222298112, |
Gopikrishnaiah Anandan | 3e6bdda | 2011-11-04 16:05:04 -0700 | [diff] [blame] | 616 | .ib = 2560000000U, |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 617 | }, |
| 618 | { |
| 619 | .src = MSM_BUS_MASTER_HD_CODEC_PORT1, |
| 620 | .dst = MSM_BUS_SLAVE_EBI_CH0, |
| 621 | .ab = 330301440, |
Gopikrishnaiah Anandan | 3e6bdda | 2011-11-04 16:05:04 -0700 | [diff] [blame] | 622 | .ib = 2560000000U, |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 623 | }, |
| 624 | { |
| 625 | .src = MSM_BUS_MASTER_AMPSS_M0, |
| 626 | .dst = MSM_BUS_SLAVE_EBI_CH0, |
| 627 | .ab = 2500000, |
| 628 | .ib = 700000000, |
| 629 | }, |
| 630 | { |
| 631 | .src = MSM_BUS_MASTER_AMPSS_M0, |
| 632 | .dst = MSM_BUS_SLAVE_EBI_CH0, |
| 633 | .ab = 2500000, |
| 634 | .ib = 10000000, |
| 635 | }, |
| 636 | }; |
Deva Ramasubramanian | 837ae36 | 2012-05-12 23:26:53 -0700 | [diff] [blame] | 637 | static struct msm_bus_vectors vidc_venc_1080p_turbo_vectors[] = { |
| 638 | { |
| 639 | .src = MSM_BUS_MASTER_HD_CODEC_PORT0, |
| 640 | .dst = MSM_BUS_SLAVE_EBI_CH0, |
| 641 | .ab = 222298112, |
| 642 | .ib = 3522000000U, |
| 643 | }, |
| 644 | { |
| 645 | .src = MSM_BUS_MASTER_HD_CODEC_PORT1, |
| 646 | .dst = MSM_BUS_SLAVE_EBI_CH0, |
| 647 | .ab = 330301440, |
| 648 | .ib = 3522000000U, |
| 649 | }, |
| 650 | { |
| 651 | .src = MSM_BUS_MASTER_AMPSS_M0, |
| 652 | .dst = MSM_BUS_SLAVE_EBI_CH0, |
| 653 | .ab = 2500000, |
| 654 | .ib = 700000000, |
| 655 | }, |
| 656 | { |
| 657 | .src = MSM_BUS_MASTER_AMPSS_M0, |
| 658 | .dst = MSM_BUS_SLAVE_EBI_CH0, |
| 659 | .ab = 2500000, |
| 660 | .ib = 10000000, |
| 661 | }, |
| 662 | }; |
| 663 | static struct msm_bus_vectors vidc_vdec_1080p_turbo_vectors[] = { |
| 664 | { |
| 665 | .src = MSM_BUS_MASTER_HD_CODEC_PORT0, |
| 666 | .dst = MSM_BUS_SLAVE_EBI_CH0, |
| 667 | .ab = 222298112, |
| 668 | .ib = 3522000000U, |
| 669 | }, |
| 670 | { |
| 671 | .src = MSM_BUS_MASTER_HD_CODEC_PORT1, |
| 672 | .dst = MSM_BUS_SLAVE_EBI_CH0, |
| 673 | .ab = 330301440, |
| 674 | .ib = 3522000000U, |
| 675 | }, |
| 676 | { |
| 677 | .src = MSM_BUS_MASTER_AMPSS_M0, |
| 678 | .dst = MSM_BUS_SLAVE_EBI_CH0, |
| 679 | .ab = 2500000, |
| 680 | .ib = 700000000, |
| 681 | }, |
| 682 | { |
| 683 | .src = MSM_BUS_MASTER_AMPSS_M0, |
| 684 | .dst = MSM_BUS_SLAVE_EBI_CH0, |
| 685 | .ab = 2500000, |
| 686 | .ib = 10000000, |
| 687 | }, |
| 688 | }; |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 689 | |
| 690 | static struct msm_bus_paths vidc_bus_client_config[] = { |
| 691 | { |
| 692 | ARRAY_SIZE(vidc_init_vectors), |
| 693 | vidc_init_vectors, |
| 694 | }, |
| 695 | { |
| 696 | ARRAY_SIZE(vidc_venc_vga_vectors), |
| 697 | vidc_venc_vga_vectors, |
| 698 | }, |
| 699 | { |
| 700 | ARRAY_SIZE(vidc_vdec_vga_vectors), |
| 701 | vidc_vdec_vga_vectors, |
| 702 | }, |
| 703 | { |
| 704 | ARRAY_SIZE(vidc_venc_720p_vectors), |
| 705 | vidc_venc_720p_vectors, |
| 706 | }, |
| 707 | { |
| 708 | ARRAY_SIZE(vidc_vdec_720p_vectors), |
| 709 | vidc_vdec_720p_vectors, |
| 710 | }, |
| 711 | { |
| 712 | ARRAY_SIZE(vidc_venc_1080p_vectors), |
| 713 | vidc_venc_1080p_vectors, |
| 714 | }, |
| 715 | { |
| 716 | ARRAY_SIZE(vidc_vdec_1080p_vectors), |
| 717 | vidc_vdec_1080p_vectors, |
| 718 | }, |
Deva Ramasubramanian | 837ae36 | 2012-05-12 23:26:53 -0700 | [diff] [blame] | 719 | { |
| 720 | ARRAY_SIZE(vidc_venc_1080p_turbo_vectors), |
Arun Menon | 697e91b | 2012-08-20 15:25:50 -0700 | [diff] [blame] | 721 | vidc_venc_1080p_turbo_vectors, |
Deva Ramasubramanian | 837ae36 | 2012-05-12 23:26:53 -0700 | [diff] [blame] | 722 | }, |
| 723 | { |
| 724 | ARRAY_SIZE(vidc_vdec_1080p_turbo_vectors), |
| 725 | vidc_vdec_1080p_turbo_vectors, |
| 726 | }, |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 727 | }; |
| 728 | |
| 729 | static struct msm_bus_scale_pdata vidc_bus_client_data = { |
| 730 | vidc_bus_client_config, |
| 731 | ARRAY_SIZE(vidc_bus_client_config), |
| 732 | .name = "vidc", |
| 733 | }; |
Arun Menon | 697e91b | 2012-08-20 15:25:50 -0700 | [diff] [blame] | 734 | |
| 735 | static struct msm_bus_vectors vidc_pro_init_vectors[] = { |
| 736 | { |
| 737 | .src = MSM_BUS_MASTER_VIDEO_ENC, |
| 738 | .dst = MSM_BUS_SLAVE_EBI_CH0, |
| 739 | .ab = 0, |
| 740 | .ib = 0, |
| 741 | }, |
| 742 | { |
| 743 | .src = MSM_BUS_MASTER_VIDEO_DEC, |
| 744 | .dst = MSM_BUS_SLAVE_EBI_CH0, |
| 745 | .ab = 0, |
| 746 | .ib = 0, |
| 747 | }, |
| 748 | { |
| 749 | .src = MSM_BUS_MASTER_AMPSS_M0, |
| 750 | .dst = MSM_BUS_SLAVE_EBI_CH0, |
| 751 | .ab = 0, |
| 752 | .ib = 0, |
| 753 | }, |
| 754 | { |
| 755 | .src = MSM_BUS_MASTER_AMPSS_M0, |
| 756 | .dst = MSM_BUS_SLAVE_EBI_CH0, |
| 757 | .ab = 0, |
| 758 | .ib = 0, |
| 759 | }, |
| 760 | }; |
| 761 | static struct msm_bus_vectors vidc_pro_venc_vga_vectors[] = { |
| 762 | { |
| 763 | .src = MSM_BUS_MASTER_VIDEO_ENC, |
| 764 | .dst = MSM_BUS_SLAVE_EBI_CH0, |
| 765 | .ab = 54525952, |
| 766 | .ib = 436207616, |
| 767 | }, |
| 768 | { |
| 769 | .src = MSM_BUS_MASTER_VIDEO_DEC, |
| 770 | .dst = MSM_BUS_SLAVE_EBI_CH0, |
| 771 | .ab = 72351744, |
| 772 | .ib = 289406976, |
| 773 | }, |
| 774 | { |
| 775 | .src = MSM_BUS_MASTER_AMPSS_M0, |
| 776 | .dst = MSM_BUS_SLAVE_EBI_CH0, |
| 777 | .ab = 500000, |
| 778 | .ib = 1000000, |
| 779 | }, |
| 780 | { |
| 781 | .src = MSM_BUS_MASTER_AMPSS_M0, |
| 782 | .dst = MSM_BUS_SLAVE_EBI_CH0, |
| 783 | .ab = 500000, |
| 784 | .ib = 1000000, |
| 785 | }, |
| 786 | }; |
| 787 | static struct msm_bus_vectors vidc_pro_vdec_vga_vectors[] = { |
| 788 | { |
| 789 | .src = MSM_BUS_MASTER_VIDEO_ENC, |
| 790 | .dst = MSM_BUS_SLAVE_EBI_CH0, |
| 791 | .ab = 40894464, |
| 792 | .ib = 327155712, |
| 793 | }, |
| 794 | { |
| 795 | .src = MSM_BUS_MASTER_VIDEO_DEC, |
| 796 | .dst = MSM_BUS_SLAVE_EBI_CH0, |
| 797 | .ab = 48234496, |
| 798 | .ib = 192937984, |
| 799 | }, |
| 800 | { |
| 801 | .src = MSM_BUS_MASTER_AMPSS_M0, |
| 802 | .dst = MSM_BUS_SLAVE_EBI_CH0, |
| 803 | .ab = 500000, |
| 804 | .ib = 2000000, |
| 805 | }, |
| 806 | { |
| 807 | .src = MSM_BUS_MASTER_AMPSS_M0, |
| 808 | .dst = MSM_BUS_SLAVE_EBI_CH0, |
| 809 | .ab = 500000, |
| 810 | .ib = 2000000, |
| 811 | }, |
| 812 | }; |
| 813 | static struct msm_bus_vectors vidc_pro_venc_720p_vectors[] = { |
| 814 | { |
| 815 | .src = MSM_BUS_MASTER_VIDEO_ENC, |
| 816 | .dst = MSM_BUS_SLAVE_EBI_CH0, |
| 817 | .ab = 163577856, |
| 818 | .ib = 1308622848, |
| 819 | }, |
| 820 | { |
| 821 | .src = MSM_BUS_MASTER_VIDEO_DEC, |
| 822 | .dst = MSM_BUS_SLAVE_EBI_CH0, |
| 823 | .ab = 219152384, |
| 824 | .ib = 876609536, |
| 825 | }, |
| 826 | { |
| 827 | .src = MSM_BUS_MASTER_AMPSS_M0, |
| 828 | .dst = MSM_BUS_SLAVE_EBI_CH0, |
| 829 | .ab = 1750000, |
| 830 | .ib = 3500000, |
| 831 | }, |
| 832 | { |
| 833 | .src = MSM_BUS_MASTER_AMPSS_M0, |
| 834 | .dst = MSM_BUS_SLAVE_EBI_CH0, |
| 835 | .ab = 1750000, |
| 836 | .ib = 3500000, |
| 837 | }, |
| 838 | }; |
| 839 | static struct msm_bus_vectors vidc_pro_vdec_720p_vectors[] = { |
| 840 | { |
| 841 | .src = MSM_BUS_MASTER_VIDEO_ENC, |
| 842 | .dst = MSM_BUS_SLAVE_EBI_CH0, |
| 843 | .ab = 121634816, |
| 844 | .ib = 973078528, |
| 845 | }, |
| 846 | { |
| 847 | .src = MSM_BUS_MASTER_VIDEO_DEC, |
| 848 | .dst = MSM_BUS_SLAVE_EBI_CH0, |
| 849 | .ab = 155189248, |
| 850 | .ib = 620756992, |
| 851 | }, |
| 852 | { |
| 853 | .src = MSM_BUS_MASTER_AMPSS_M0, |
| 854 | .dst = MSM_BUS_SLAVE_EBI_CH0, |
| 855 | .ab = 1750000, |
| 856 | .ib = 7000000, |
| 857 | }, |
| 858 | { |
| 859 | .src = MSM_BUS_MASTER_AMPSS_M0, |
| 860 | .dst = MSM_BUS_SLAVE_EBI_CH0, |
| 861 | .ab = 1750000, |
| 862 | .ib = 7000000, |
| 863 | }, |
| 864 | }; |
| 865 | static struct msm_bus_vectors vidc_pro_venc_1080p_vectors[] = { |
| 866 | { |
| 867 | .src = MSM_BUS_MASTER_VIDEO_ENC, |
| 868 | .dst = MSM_BUS_SLAVE_EBI_CH0, |
| 869 | .ab = 372244480, |
| 870 | .ib = 2560000000U, |
| 871 | }, |
| 872 | { |
| 873 | .src = MSM_BUS_MASTER_VIDEO_DEC, |
| 874 | .dst = MSM_BUS_SLAVE_EBI_CH0, |
| 875 | .ab = 501219328, |
| 876 | .ib = 2560000000U, |
| 877 | }, |
| 878 | { |
| 879 | .src = MSM_BUS_MASTER_AMPSS_M0, |
| 880 | .dst = MSM_BUS_SLAVE_EBI_CH0, |
| 881 | .ab = 2500000, |
| 882 | .ib = 5000000, |
| 883 | }, |
| 884 | { |
| 885 | .src = MSM_BUS_MASTER_AMPSS_M0, |
| 886 | .dst = MSM_BUS_SLAVE_EBI_CH0, |
| 887 | .ab = 2500000, |
| 888 | .ib = 5000000, |
| 889 | }, |
| 890 | }; |
| 891 | static struct msm_bus_vectors vidc_pro_vdec_1080p_vectors[] = { |
| 892 | { |
| 893 | .src = MSM_BUS_MASTER_VIDEO_ENC, |
| 894 | .dst = MSM_BUS_SLAVE_EBI_CH0, |
| 895 | .ab = 222298112, |
| 896 | .ib = 2560000000U, |
| 897 | }, |
| 898 | { |
| 899 | .src = MSM_BUS_MASTER_VIDEO_DEC, |
| 900 | .dst = MSM_BUS_SLAVE_EBI_CH0, |
| 901 | .ab = 330301440, |
| 902 | .ib = 2560000000U, |
| 903 | }, |
| 904 | { |
| 905 | .src = MSM_BUS_MASTER_AMPSS_M0, |
| 906 | .dst = MSM_BUS_SLAVE_EBI_CH0, |
| 907 | .ab = 2500000, |
| 908 | .ib = 700000000, |
| 909 | }, |
| 910 | { |
| 911 | .src = MSM_BUS_MASTER_AMPSS_M0, |
| 912 | .dst = MSM_BUS_SLAVE_EBI_CH0, |
| 913 | .ab = 2500000, |
| 914 | .ib = 10000000, |
| 915 | }, |
| 916 | }; |
| 917 | static struct msm_bus_vectors vidc_pro_venc_1080p_turbo_vectors[] = { |
| 918 | { |
| 919 | .src = MSM_BUS_MASTER_VIDEO_ENC, |
| 920 | .dst = MSM_BUS_SLAVE_EBI_CH0, |
| 921 | .ab = 222298112, |
| 922 | .ib = 3522000000U, |
| 923 | }, |
| 924 | { |
| 925 | .src = MSM_BUS_MASTER_VIDEO_DEC, |
| 926 | .dst = MSM_BUS_SLAVE_EBI_CH0, |
| 927 | .ab = 330301440, |
| 928 | .ib = 3522000000U, |
| 929 | }, |
| 930 | { |
| 931 | .src = MSM_BUS_MASTER_AMPSS_M0, |
| 932 | .dst = MSM_BUS_SLAVE_EBI_CH0, |
| 933 | .ab = 2500000, |
| 934 | .ib = 700000000, |
| 935 | }, |
| 936 | { |
| 937 | .src = MSM_BUS_MASTER_AMPSS_M0, |
| 938 | .dst = MSM_BUS_SLAVE_EBI_CH0, |
| 939 | .ab = 2500000, |
| 940 | .ib = 10000000, |
| 941 | }, |
| 942 | }; |
| 943 | static struct msm_bus_vectors vidc_pro_vdec_1080p_turbo_vectors[] = { |
| 944 | { |
| 945 | .src = MSM_BUS_MASTER_VIDEO_ENC, |
| 946 | .dst = MSM_BUS_SLAVE_EBI_CH0, |
| 947 | .ab = 222298112, |
| 948 | .ib = 3522000000U, |
| 949 | }, |
| 950 | { |
| 951 | .src = MSM_BUS_MASTER_VIDEO_DEC, |
| 952 | .dst = MSM_BUS_SLAVE_EBI_CH0, |
| 953 | .ab = 330301440, |
| 954 | .ib = 3522000000U, |
| 955 | }, |
| 956 | { |
| 957 | .src = MSM_BUS_MASTER_AMPSS_M0, |
| 958 | .dst = MSM_BUS_SLAVE_EBI_CH0, |
| 959 | .ab = 2500000, |
| 960 | .ib = 700000000, |
| 961 | }, |
| 962 | { |
| 963 | .src = MSM_BUS_MASTER_AMPSS_M0, |
| 964 | .dst = MSM_BUS_SLAVE_EBI_CH0, |
| 965 | .ab = 2500000, |
| 966 | .ib = 10000000, |
| 967 | }, |
| 968 | }; |
| 969 | |
| 970 | static struct msm_bus_paths vidc_pro_bus_client_config[] = { |
| 971 | { |
| 972 | ARRAY_SIZE(vidc_pro_init_vectors), |
| 973 | vidc_pro_init_vectors, |
| 974 | }, |
| 975 | { |
| 976 | ARRAY_SIZE(vidc_pro_venc_vga_vectors), |
| 977 | vidc_pro_venc_vga_vectors, |
| 978 | }, |
| 979 | { |
| 980 | ARRAY_SIZE(vidc_pro_vdec_vga_vectors), |
| 981 | vidc_pro_vdec_vga_vectors, |
| 982 | }, |
| 983 | { |
| 984 | ARRAY_SIZE(vidc_pro_venc_720p_vectors), |
| 985 | vidc_pro_venc_720p_vectors, |
| 986 | }, |
| 987 | { |
| 988 | ARRAY_SIZE(vidc_pro_vdec_720p_vectors), |
| 989 | vidc_pro_vdec_720p_vectors, |
| 990 | }, |
| 991 | { |
| 992 | ARRAY_SIZE(vidc_pro_venc_1080p_vectors), |
| 993 | vidc_pro_venc_1080p_vectors, |
| 994 | }, |
| 995 | { |
| 996 | ARRAY_SIZE(vidc_pro_vdec_1080p_vectors), |
| 997 | vidc_pro_vdec_1080p_vectors, |
| 998 | }, |
| 999 | { |
| 1000 | ARRAY_SIZE(vidc_pro_venc_1080p_turbo_vectors), |
| 1001 | vidc_pro_venc_1080p_turbo_vectors, |
| 1002 | }, |
| 1003 | { |
| 1004 | ARRAY_SIZE(vidc_vdec_1080p_turbo_vectors), |
| 1005 | vidc_pro_vdec_1080p_turbo_vectors, |
| 1006 | }, |
| 1007 | }; |
| 1008 | |
| 1009 | static struct msm_bus_scale_pdata vidc_pro_bus_client_data = { |
| 1010 | vidc_pro_bus_client_config, |
| 1011 | ARRAY_SIZE(vidc_bus_client_config), |
| 1012 | .name = "vidc", |
| 1013 | }; |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 1014 | #endif |
| 1015 | |
Mona Hossain | 9c430e3 | 2011-07-27 11:04:47 -0700 | [diff] [blame] | 1016 | #ifdef CONFIG_HW_RANDOM_MSM |
| 1017 | /* PRNG device */ |
| 1018 | #define MSM_PRNG_PHYS 0x1A500000 |
| 1019 | static struct resource rng_resources = { |
| 1020 | .flags = IORESOURCE_MEM, |
| 1021 | .start = MSM_PRNG_PHYS, |
| 1022 | .end = MSM_PRNG_PHYS + SZ_512 - 1, |
| 1023 | }; |
| 1024 | |
| 1025 | struct platform_device msm_device_rng = { |
| 1026 | .name = "msm_rng", |
| 1027 | .id = 0, |
| 1028 | .num_resources = 1, |
| 1029 | .resource = &rng_resources, |
| 1030 | }; |
| 1031 | #endif |
| 1032 | |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 1033 | #define MSM_VIDC_BASE_PHYS 0x04400000 |
| 1034 | #define MSM_VIDC_BASE_SIZE 0x00100000 |
| 1035 | |
| 1036 | static struct resource msm_device_vidc_resources[] = { |
| 1037 | { |
| 1038 | .start = MSM_VIDC_BASE_PHYS, |
| 1039 | .end = MSM_VIDC_BASE_PHYS + MSM_VIDC_BASE_SIZE - 1, |
| 1040 | .flags = IORESOURCE_MEM, |
| 1041 | }, |
| 1042 | { |
| 1043 | .start = VCODEC_IRQ, |
| 1044 | .end = VCODEC_IRQ, |
| 1045 | .flags = IORESOURCE_IRQ, |
| 1046 | }, |
| 1047 | }; |
| 1048 | |
| 1049 | struct msm_vidc_platform_data vidc_platform_data = { |
| 1050 | #ifdef CONFIG_MSM_BUS_SCALING |
| 1051 | .vidc_bus_client_pdata = &vidc_bus_client_data, |
| 1052 | #endif |
Deepak Kotur | cb4f672 | 2011-10-31 14:06:57 -0700 | [diff] [blame] | 1053 | #ifdef CONFIG_MSM_MULTIMEDIA_USE_ION |
Olav Haugan | b5be799 | 2011-11-18 14:29:02 -0800 | [diff] [blame] | 1054 | .memtype = ION_CP_MM_HEAP_ID, |
Deepak Kotur | cb4f672 | 2011-10-31 14:06:57 -0700 | [diff] [blame] | 1055 | .enable_ion = 1, |
Deepak kotur | 5f10b27 | 2012-03-15 22:01:39 -0700 | [diff] [blame] | 1056 | .cp_enabled = 1, |
Deepak Kotur | cb4f672 | 2011-10-31 14:06:57 -0700 | [diff] [blame] | 1057 | #else |
Deepak Kotur | 12301a7 | 2011-11-09 18:30:29 -0800 | [diff] [blame] | 1058 | .memtype = MEMTYPE_EBI1, |
Deepak Kotur | cb4f672 | 2011-10-31 14:06:57 -0700 | [diff] [blame] | 1059 | .enable_ion = 0, |
| 1060 | #endif |
Deepika Pepakayala | bebc762 | 2011-12-01 15:13:43 -0800 | [diff] [blame] | 1061 | .disable_dmx = 0, |
Rajeshwar Kurapaty | c155c35 | 2011-12-17 06:35:32 +0530 | [diff] [blame] | 1062 | .disable_fullhd = 0, |
Mohan Kumar Gubbihalli Lachma Naik | ed9dc91 | 2012-03-01 19:11:14 -0800 | [diff] [blame] | 1063 | .cont_mode_dpb_count = 18, |
Riaz Rahaman | 84f8c68 | 2012-05-30 13:32:10 +0530 | [diff] [blame] | 1064 | .fw_addr = 0x9fe00000, |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 1065 | }; |
| 1066 | |
| 1067 | struct platform_device msm_device_vidc = { |
| 1068 | .name = "msm_vidc", |
| 1069 | .id = 0, |
| 1070 | .num_resources = ARRAY_SIZE(msm_device_vidc_resources), |
| 1071 | .resource = msm_device_vidc_resources, |
| 1072 | .dev = { |
| 1073 | .platform_data = &vidc_platform_data, |
| 1074 | }, |
| 1075 | }; |
| 1076 | |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 1077 | #define MSM_SDC1_BASE 0x12400000 |
| 1078 | #define MSM_SDC1_DML_BASE (MSM_SDC1_BASE + 0x800) |
| 1079 | #define MSM_SDC1_BAM_BASE (MSM_SDC1_BASE + 0x2000) |
| 1080 | #define MSM_SDC2_BASE 0x12140000 |
| 1081 | #define MSM_SDC2_DML_BASE (MSM_SDC2_BASE + 0x800) |
| 1082 | #define MSM_SDC2_BAM_BASE (MSM_SDC2_BASE + 0x2000) |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 1083 | #define MSM_SDC3_BASE 0x12180000 |
| 1084 | #define MSM_SDC3_DML_BASE (MSM_SDC3_BASE + 0x800) |
| 1085 | #define MSM_SDC3_BAM_BASE (MSM_SDC3_BASE + 0x2000) |
| 1086 | #define MSM_SDC4_BASE 0x121C0000 |
| 1087 | #define MSM_SDC4_DML_BASE (MSM_SDC4_BASE + 0x800) |
| 1088 | #define MSM_SDC4_BAM_BASE (MSM_SDC4_BASE + 0x2000) |
| 1089 | #define MSM_SDC5_BASE 0x12200000 |
| 1090 | #define MSM_SDC5_DML_BASE (MSM_SDC5_BASE + 0x800) |
| 1091 | #define MSM_SDC5_BAM_BASE (MSM_SDC5_BASE + 0x2000) |
| 1092 | |
| 1093 | static struct resource resources_sdc1[] = { |
| 1094 | { |
| 1095 | .name = "core_mem", |
| 1096 | .flags = IORESOURCE_MEM, |
| 1097 | .start = MSM_SDC1_BASE, |
| 1098 | .end = MSM_SDC1_DML_BASE - 1, |
| 1099 | }, |
| 1100 | { |
| 1101 | .name = "core_irq", |
| 1102 | .flags = IORESOURCE_IRQ, |
| 1103 | .start = SDC1_IRQ_0, |
| 1104 | .end = SDC1_IRQ_0 |
| 1105 | }, |
| 1106 | #ifdef CONFIG_MMC_MSM_SPS_SUPPORT |
| 1107 | { |
Sujit Reddy Thumma | 1dfac2c | 2012-07-30 10:15:39 +0530 | [diff] [blame] | 1108 | .name = "dml_mem", |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 1109 | .start = MSM_SDC1_DML_BASE, |
| 1110 | .end = MSM_SDC1_BAM_BASE - 1, |
| 1111 | .flags = IORESOURCE_MEM, |
| 1112 | }, |
| 1113 | { |
Sujit Reddy Thumma | 1dfac2c | 2012-07-30 10:15:39 +0530 | [diff] [blame] | 1114 | .name = "bam_mem", |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 1115 | .start = MSM_SDC1_BAM_BASE, |
| 1116 | .end = MSM_SDC1_BAM_BASE + (2 * SZ_4K) - 1, |
| 1117 | .flags = IORESOURCE_MEM, |
| 1118 | }, |
| 1119 | { |
Sujit Reddy Thumma | 1dfac2c | 2012-07-30 10:15:39 +0530 | [diff] [blame] | 1120 | .name = "bam_irq", |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 1121 | .start = SDC1_BAM_IRQ, |
| 1122 | .end = SDC1_BAM_IRQ, |
| 1123 | .flags = IORESOURCE_IRQ, |
| 1124 | }, |
| 1125 | #endif |
| 1126 | }; |
| 1127 | |
| 1128 | static struct resource resources_sdc2[] = { |
| 1129 | { |
| 1130 | .name = "core_mem", |
| 1131 | .flags = IORESOURCE_MEM, |
| 1132 | .start = MSM_SDC2_BASE, |
| 1133 | .end = MSM_SDC2_DML_BASE - 1, |
| 1134 | }, |
| 1135 | { |
| 1136 | .name = "core_irq", |
| 1137 | .flags = IORESOURCE_IRQ, |
| 1138 | .start = SDC2_IRQ_0, |
| 1139 | .end = SDC2_IRQ_0 |
| 1140 | }, |
| 1141 | #ifdef CONFIG_MMC_MSM_SPS_SUPPORT |
| 1142 | { |
Sujit Reddy Thumma | 1dfac2c | 2012-07-30 10:15:39 +0530 | [diff] [blame] | 1143 | .name = "dml_mem", |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 1144 | .start = MSM_SDC2_DML_BASE, |
| 1145 | .end = MSM_SDC2_BAM_BASE - 1, |
| 1146 | .flags = IORESOURCE_MEM, |
| 1147 | }, |
| 1148 | { |
Sujit Reddy Thumma | 1dfac2c | 2012-07-30 10:15:39 +0530 | [diff] [blame] | 1149 | .name = "bam_mem", |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 1150 | .start = MSM_SDC2_BAM_BASE, |
| 1151 | .end = MSM_SDC2_BAM_BASE + (2 * SZ_4K) - 1, |
| 1152 | .flags = IORESOURCE_MEM, |
| 1153 | }, |
| 1154 | { |
Sujit Reddy Thumma | 1dfac2c | 2012-07-30 10:15:39 +0530 | [diff] [blame] | 1155 | .name = "bam_irq", |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 1156 | .start = SDC2_BAM_IRQ, |
| 1157 | .end = SDC2_BAM_IRQ, |
| 1158 | .flags = IORESOURCE_IRQ, |
| 1159 | }, |
| 1160 | #endif |
| 1161 | }; |
| 1162 | |
| 1163 | static struct resource resources_sdc3[] = { |
| 1164 | { |
| 1165 | .name = "core_mem", |
| 1166 | .flags = IORESOURCE_MEM, |
| 1167 | .start = MSM_SDC3_BASE, |
| 1168 | .end = MSM_SDC3_DML_BASE - 1, |
| 1169 | }, |
| 1170 | { |
| 1171 | .name = "core_irq", |
| 1172 | .flags = IORESOURCE_IRQ, |
| 1173 | .start = SDC3_IRQ_0, |
| 1174 | .end = SDC3_IRQ_0 |
| 1175 | }, |
| 1176 | #ifdef CONFIG_MMC_MSM_SPS_SUPPORT |
| 1177 | { |
Sujit Reddy Thumma | 1dfac2c | 2012-07-30 10:15:39 +0530 | [diff] [blame] | 1178 | .name = "dml_mem", |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 1179 | .start = MSM_SDC3_DML_BASE, |
| 1180 | .end = MSM_SDC3_BAM_BASE - 1, |
| 1181 | .flags = IORESOURCE_MEM, |
| 1182 | }, |
| 1183 | { |
Sujit Reddy Thumma | 1dfac2c | 2012-07-30 10:15:39 +0530 | [diff] [blame] | 1184 | .name = "bam_mem", |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 1185 | .start = MSM_SDC3_BAM_BASE, |
| 1186 | .end = MSM_SDC3_BAM_BASE + (2 * SZ_4K) - 1, |
| 1187 | .flags = IORESOURCE_MEM, |
| 1188 | }, |
| 1189 | { |
Sujit Reddy Thumma | 1dfac2c | 2012-07-30 10:15:39 +0530 | [diff] [blame] | 1190 | .name = "bam_irq", |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 1191 | .start = SDC3_BAM_IRQ, |
| 1192 | .end = SDC3_BAM_IRQ, |
| 1193 | .flags = IORESOURCE_IRQ, |
| 1194 | }, |
| 1195 | #endif |
| 1196 | }; |
| 1197 | |
| 1198 | static struct resource resources_sdc4[] = { |
| 1199 | { |
| 1200 | .name = "core_mem", |
| 1201 | .flags = IORESOURCE_MEM, |
| 1202 | .start = MSM_SDC4_BASE, |
| 1203 | .end = MSM_SDC4_DML_BASE - 1, |
| 1204 | }, |
| 1205 | { |
| 1206 | .name = "core_irq", |
| 1207 | .flags = IORESOURCE_IRQ, |
| 1208 | .start = SDC4_IRQ_0, |
| 1209 | .end = SDC4_IRQ_0 |
| 1210 | }, |
| 1211 | #ifdef CONFIG_MMC_MSM_SPS_SUPPORT |
| 1212 | { |
Sujit Reddy Thumma | 1dfac2c | 2012-07-30 10:15:39 +0530 | [diff] [blame] | 1213 | .name = "dml_mem", |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 1214 | .start = MSM_SDC4_DML_BASE, |
| 1215 | .end = MSM_SDC4_BAM_BASE - 1, |
| 1216 | .flags = IORESOURCE_MEM, |
| 1217 | }, |
| 1218 | { |
Sujit Reddy Thumma | 1dfac2c | 2012-07-30 10:15:39 +0530 | [diff] [blame] | 1219 | .name = "bam_mem", |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 1220 | .start = MSM_SDC4_BAM_BASE, |
| 1221 | .end = MSM_SDC4_BAM_BASE + (2 * SZ_4K) - 1, |
| 1222 | .flags = IORESOURCE_MEM, |
| 1223 | }, |
| 1224 | { |
Sujit Reddy Thumma | 1dfac2c | 2012-07-30 10:15:39 +0530 | [diff] [blame] | 1225 | .name = "bam_irq", |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 1226 | .start = SDC4_BAM_IRQ, |
| 1227 | .end = SDC4_BAM_IRQ, |
| 1228 | .flags = IORESOURCE_IRQ, |
| 1229 | }, |
| 1230 | #endif |
| 1231 | }; |
| 1232 | |
| 1233 | static struct resource resources_sdc5[] = { |
| 1234 | { |
| 1235 | .name = "core_mem", |
| 1236 | .flags = IORESOURCE_MEM, |
| 1237 | .start = MSM_SDC5_BASE, |
| 1238 | .end = MSM_SDC5_DML_BASE - 1, |
| 1239 | }, |
| 1240 | { |
| 1241 | .name = "core_irq", |
| 1242 | .flags = IORESOURCE_IRQ, |
| 1243 | .start = SDC5_IRQ_0, |
| 1244 | .end = SDC5_IRQ_0 |
| 1245 | }, |
| 1246 | #ifdef CONFIG_MMC_MSM_SPS_SUPPORT |
| 1247 | { |
Sujit Reddy Thumma | 1dfac2c | 2012-07-30 10:15:39 +0530 | [diff] [blame] | 1248 | .name = "dml_mem", |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 1249 | .start = MSM_SDC5_DML_BASE, |
| 1250 | .end = MSM_SDC5_BAM_BASE - 1, |
| 1251 | .flags = IORESOURCE_MEM, |
| 1252 | }, |
| 1253 | { |
Sujit Reddy Thumma | 1dfac2c | 2012-07-30 10:15:39 +0530 | [diff] [blame] | 1254 | .name = "bam_mem", |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 1255 | .start = MSM_SDC5_BAM_BASE, |
| 1256 | .end = MSM_SDC5_BAM_BASE + (2 * SZ_4K) - 1, |
| 1257 | .flags = IORESOURCE_MEM, |
| 1258 | }, |
| 1259 | { |
Sujit Reddy Thumma | 1dfac2c | 2012-07-30 10:15:39 +0530 | [diff] [blame] | 1260 | .name = "bam_irq", |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 1261 | .start = SDC5_BAM_IRQ, |
| 1262 | .end = SDC5_BAM_IRQ, |
| 1263 | .flags = IORESOURCE_IRQ, |
| 1264 | }, |
| 1265 | #endif |
| 1266 | }; |
| 1267 | |
| 1268 | struct platform_device msm_device_sdc1 = { |
| 1269 | .name = "msm_sdcc", |
| 1270 | .id = 1, |
| 1271 | .num_resources = ARRAY_SIZE(resources_sdc1), |
| 1272 | .resource = resources_sdc1, |
| 1273 | .dev = { |
| 1274 | .coherent_dma_mask = 0xffffffff, |
| 1275 | }, |
| 1276 | }; |
| 1277 | |
| 1278 | struct platform_device msm_device_sdc2 = { |
| 1279 | .name = "msm_sdcc", |
| 1280 | .id = 2, |
| 1281 | .num_resources = ARRAY_SIZE(resources_sdc2), |
| 1282 | .resource = resources_sdc2, |
| 1283 | .dev = { |
| 1284 | .coherent_dma_mask = 0xffffffff, |
| 1285 | }, |
| 1286 | }; |
| 1287 | |
| 1288 | struct platform_device msm_device_sdc3 = { |
| 1289 | .name = "msm_sdcc", |
| 1290 | .id = 3, |
| 1291 | .num_resources = ARRAY_SIZE(resources_sdc3), |
| 1292 | .resource = resources_sdc3, |
| 1293 | .dev = { |
| 1294 | .coherent_dma_mask = 0xffffffff, |
| 1295 | }, |
| 1296 | }; |
| 1297 | |
| 1298 | struct platform_device msm_device_sdc4 = { |
| 1299 | .name = "msm_sdcc", |
| 1300 | .id = 4, |
| 1301 | .num_resources = ARRAY_SIZE(resources_sdc4), |
| 1302 | .resource = resources_sdc4, |
| 1303 | .dev = { |
| 1304 | .coherent_dma_mask = 0xffffffff, |
| 1305 | }, |
| 1306 | }; |
| 1307 | |
| 1308 | struct platform_device msm_device_sdc5 = { |
| 1309 | .name = "msm_sdcc", |
| 1310 | .id = 5, |
| 1311 | .num_resources = ARRAY_SIZE(resources_sdc5), |
| 1312 | .resource = resources_sdc5, |
| 1313 | .dev = { |
| 1314 | .coherent_dma_mask = 0xffffffff, |
| 1315 | }, |
| 1316 | }; |
| 1317 | |
Stephen Boyd | eb81988 | 2011-08-29 14:46:30 -0700 | [diff] [blame] | 1318 | #define MSM_LPASS_QDSP6SS_PHYS 0x28800000 |
| 1319 | #define SFAB_LPASS_Q6_ACLK_CTL (MSM_CLK_CTL_BASE + 0x23A0) |
| 1320 | |
| 1321 | static struct resource msm_8960_q6_lpass_resources[] = { |
| 1322 | { |
| 1323 | .start = MSM_LPASS_QDSP6SS_PHYS, |
| 1324 | .end = MSM_LPASS_QDSP6SS_PHYS + SZ_256 - 1, |
| 1325 | .flags = IORESOURCE_MEM, |
| 1326 | }, |
| 1327 | }; |
| 1328 | |
| 1329 | static struct pil_q6v4_pdata msm_8960_q6_lpass_data = { |
| 1330 | .strap_tcm_base = 0x01460000, |
| 1331 | .strap_ahb_upper = 0x00290000, |
| 1332 | .strap_ahb_lower = 0x00000280, |
| 1333 | .aclk_reg = SFAB_LPASS_Q6_ACLK_CTL, |
| 1334 | .name = "q6", |
| 1335 | .pas_id = PAS_Q6, |
Matt Wagantall | 6e4aafb | 2011-09-09 17:53:54 -0700 | [diff] [blame] | 1336 | .bus_port = MSM_BUS_MASTER_LPASS_PROC, |
Stephen Boyd | eb81988 | 2011-08-29 14:46:30 -0700 | [diff] [blame] | 1337 | }; |
| 1338 | |
| 1339 | struct platform_device msm_8960_q6_lpass = { |
| 1340 | .name = "pil_qdsp6v4", |
| 1341 | .id = 0, |
| 1342 | .num_resources = ARRAY_SIZE(msm_8960_q6_lpass_resources), |
| 1343 | .resource = msm_8960_q6_lpass_resources, |
| 1344 | .dev.platform_data = &msm_8960_q6_lpass_data, |
| 1345 | }; |
| 1346 | |
| 1347 | #define MSM_MSS_ENABLE_PHYS 0x08B00000 |
| 1348 | #define MSM_FW_QDSP6SS_PHYS 0x08800000 |
| 1349 | #define MSS_Q6FW_JTAG_CLK_CTL (MSM_CLK_CTL_BASE + 0x2C6C) |
| 1350 | #define SFAB_MSS_Q6_FW_ACLK_CTL (MSM_CLK_CTL_BASE + 0x2044) |
| 1351 | |
| 1352 | static struct resource msm_8960_q6_mss_fw_resources[] = { |
| 1353 | { |
| 1354 | .start = MSM_FW_QDSP6SS_PHYS, |
| 1355 | .end = MSM_FW_QDSP6SS_PHYS + SZ_256 - 1, |
| 1356 | .flags = IORESOURCE_MEM, |
| 1357 | }, |
| 1358 | { |
| 1359 | .start = MSM_MSS_ENABLE_PHYS, |
| 1360 | .end = MSM_MSS_ENABLE_PHYS + 4 - 1, |
| 1361 | .flags = IORESOURCE_MEM, |
| 1362 | }, |
| 1363 | }; |
| 1364 | |
| 1365 | static struct pil_q6v4_pdata msm_8960_q6_mss_fw_data = { |
| 1366 | .strap_tcm_base = 0x00400000, |
| 1367 | .strap_ahb_upper = 0x00090000, |
| 1368 | .strap_ahb_lower = 0x00000080, |
| 1369 | .aclk_reg = SFAB_MSS_Q6_FW_ACLK_CTL, |
| 1370 | .jtag_clk_reg = MSS_Q6FW_JTAG_CLK_CTL, |
| 1371 | .name = "modem_fw", |
| 1372 | .depends = "q6", |
| 1373 | .pas_id = PAS_MODEM_FW, |
Matt Wagantall | 6e4aafb | 2011-09-09 17:53:54 -0700 | [diff] [blame] | 1374 | .bus_port = MSM_BUS_MASTER_MSS_FW_PROC, |
Stephen Boyd | eb81988 | 2011-08-29 14:46:30 -0700 | [diff] [blame] | 1375 | }; |
| 1376 | |
| 1377 | struct platform_device msm_8960_q6_mss_fw = { |
| 1378 | .name = "pil_qdsp6v4", |
| 1379 | .id = 1, |
| 1380 | .num_resources = ARRAY_SIZE(msm_8960_q6_mss_fw_resources), |
| 1381 | .resource = msm_8960_q6_mss_fw_resources, |
| 1382 | .dev.platform_data = &msm_8960_q6_mss_fw_data, |
| 1383 | }; |
| 1384 | |
| 1385 | #define MSM_SW_QDSP6SS_PHYS 0x08900000 |
| 1386 | #define SFAB_MSS_Q6_SW_ACLK_CTL (MSM_CLK_CTL_BASE + 0x2040) |
| 1387 | #define MSS_Q6SW_JTAG_CLK_CTL (MSM_CLK_CTL_BASE + 0x2C68) |
| 1388 | |
| 1389 | static struct resource msm_8960_q6_mss_sw_resources[] = { |
| 1390 | { |
| 1391 | .start = MSM_SW_QDSP6SS_PHYS, |
| 1392 | .end = MSM_SW_QDSP6SS_PHYS + SZ_256 - 1, |
| 1393 | .flags = IORESOURCE_MEM, |
| 1394 | }, |
| 1395 | { |
| 1396 | .start = MSM_MSS_ENABLE_PHYS, |
| 1397 | .end = MSM_MSS_ENABLE_PHYS + 4 - 1, |
| 1398 | .flags = IORESOURCE_MEM, |
| 1399 | }, |
| 1400 | }; |
| 1401 | |
| 1402 | static struct pil_q6v4_pdata msm_8960_q6_mss_sw_data = { |
| 1403 | .strap_tcm_base = 0x00420000, |
| 1404 | .strap_ahb_upper = 0x00090000, |
| 1405 | .strap_ahb_lower = 0x00000080, |
| 1406 | .aclk_reg = SFAB_MSS_Q6_SW_ACLK_CTL, |
| 1407 | .jtag_clk_reg = MSS_Q6SW_JTAG_CLK_CTL, |
| 1408 | .name = "modem", |
| 1409 | .depends = "modem_fw", |
| 1410 | .pas_id = PAS_MODEM_SW, |
Matt Wagantall | 6e4aafb | 2011-09-09 17:53:54 -0700 | [diff] [blame] | 1411 | .bus_port = MSM_BUS_MASTER_MSS_SW_PROC, |
Stephen Boyd | eb81988 | 2011-08-29 14:46:30 -0700 | [diff] [blame] | 1412 | }; |
| 1413 | |
| 1414 | struct platform_device msm_8960_q6_mss_sw = { |
| 1415 | .name = "pil_qdsp6v4", |
| 1416 | .id = 2, |
| 1417 | .num_resources = ARRAY_SIZE(msm_8960_q6_mss_sw_resources), |
| 1418 | .resource = msm_8960_q6_mss_sw_resources, |
| 1419 | .dev.platform_data = &msm_8960_q6_mss_sw_data, |
| 1420 | }; |
| 1421 | |
Stephen Boyd | 322a992 | 2011-09-20 01:05:54 -0700 | [diff] [blame] | 1422 | static struct resource msm_8960_riva_resources[] = { |
| 1423 | { |
| 1424 | .start = 0x03204000, |
| 1425 | .end = 0x03204000 + SZ_256 - 1, |
| 1426 | .flags = IORESOURCE_MEM, |
| 1427 | }, |
| 1428 | }; |
| 1429 | |
| 1430 | struct platform_device msm_8960_riva = { |
| 1431 | .name = "pil_riva", |
| 1432 | .id = -1, |
| 1433 | .num_resources = ARRAY_SIZE(msm_8960_riva_resources), |
| 1434 | .resource = msm_8960_riva_resources, |
| 1435 | }; |
| 1436 | |
Stephen Boyd | d89eebe | 2011-09-28 23:28:11 -0700 | [diff] [blame] | 1437 | struct platform_device msm_pil_tzapps = { |
| 1438 | .name = "pil_tzapps", |
| 1439 | .id = -1, |
| 1440 | }; |
| 1441 | |
Stephen Boyd | 25c4a0b | 2011-09-20 00:12:36 -0700 | [diff] [blame] | 1442 | struct platform_device msm_pil_dsps = { |
| 1443 | .name = "pil_dsps", |
| 1444 | .id = -1, |
| 1445 | .dev.platform_data = "dsps", |
| 1446 | }; |
| 1447 | |
Stephen Boyd | 7b973de | 2012-03-09 12:26:16 -0800 | [diff] [blame] | 1448 | struct platform_device msm_pil_vidc = { |
| 1449 | .name = "pil_vidc", |
| 1450 | .id = -1, |
| 1451 | }; |
| 1452 | |
Eric Holmberg | 023d25c | 2012-03-01 12:27:55 -0700 | [diff] [blame] | 1453 | static struct resource smd_resource[] = { |
| 1454 | { |
| 1455 | .name = "a9_m2a_0", |
| 1456 | .start = INT_A9_M2A_0, |
| 1457 | .flags = IORESOURCE_IRQ, |
| 1458 | }, |
| 1459 | { |
| 1460 | .name = "a9_m2a_5", |
| 1461 | .start = INT_A9_M2A_5, |
| 1462 | .flags = IORESOURCE_IRQ, |
| 1463 | }, |
| 1464 | { |
| 1465 | .name = "adsp_a11", |
| 1466 | .start = INT_ADSP_A11, |
| 1467 | .flags = IORESOURCE_IRQ, |
| 1468 | }, |
| 1469 | { |
| 1470 | .name = "adsp_a11_smsm", |
| 1471 | .start = INT_ADSP_A11_SMSM, |
| 1472 | .flags = IORESOURCE_IRQ, |
| 1473 | }, |
| 1474 | { |
| 1475 | .name = "dsps_a11", |
| 1476 | .start = INT_DSPS_A11, |
| 1477 | .flags = IORESOURCE_IRQ, |
| 1478 | }, |
| 1479 | { |
| 1480 | .name = "dsps_a11_smsm", |
| 1481 | .start = INT_DSPS_A11_SMSM, |
| 1482 | .flags = IORESOURCE_IRQ, |
| 1483 | }, |
| 1484 | { |
| 1485 | .name = "wcnss_a11", |
| 1486 | .start = INT_WCNSS_A11, |
| 1487 | .flags = IORESOURCE_IRQ, |
| 1488 | }, |
| 1489 | { |
| 1490 | .name = "wcnss_a11_smsm", |
| 1491 | .start = INT_WCNSS_A11_SMSM, |
| 1492 | .flags = IORESOURCE_IRQ, |
| 1493 | }, |
| 1494 | }; |
| 1495 | |
| 1496 | static struct smd_subsystem_config smd_config_list[] = { |
| 1497 | { |
| 1498 | .irq_config_id = SMD_MODEM, |
| 1499 | .subsys_name = "modem", |
| 1500 | .edge = SMD_APPS_MODEM, |
| 1501 | |
| 1502 | .smd_int.irq_name = "a9_m2a_0", |
| 1503 | .smd_int.flags = IRQF_TRIGGER_RISING, |
| 1504 | .smd_int.irq_id = -1, |
| 1505 | .smd_int.device_name = "smd_dev", |
| 1506 | .smd_int.dev_id = 0, |
| 1507 | .smd_int.out_bit_pos = 1 << 3, |
| 1508 | .smd_int.out_base = (void __iomem *)MSM_APCS_GCC_BASE, |
| 1509 | .smd_int.out_offset = 0x8, |
| 1510 | |
| 1511 | .smsm_int.irq_name = "a9_m2a_5", |
| 1512 | .smsm_int.flags = IRQF_TRIGGER_RISING, |
| 1513 | .smsm_int.irq_id = -1, |
| 1514 | .smsm_int.device_name = "smd_smsm", |
| 1515 | .smsm_int.dev_id = 0, |
| 1516 | .smsm_int.out_bit_pos = 1 << 4, |
| 1517 | .smsm_int.out_base = (void __iomem *)MSM_APCS_GCC_BASE, |
| 1518 | .smsm_int.out_offset = 0x8, |
| 1519 | }, |
| 1520 | { |
| 1521 | .irq_config_id = SMD_Q6, |
| 1522 | .subsys_name = "q6", |
| 1523 | .edge = SMD_APPS_QDSP, |
| 1524 | |
| 1525 | .smd_int.irq_name = "adsp_a11", |
| 1526 | .smd_int.flags = IRQF_TRIGGER_RISING, |
| 1527 | .smd_int.irq_id = -1, |
| 1528 | .smd_int.device_name = "smd_dev", |
| 1529 | .smd_int.dev_id = 0, |
| 1530 | .smd_int.out_bit_pos = 1 << 15, |
| 1531 | .smd_int.out_base = (void __iomem *)MSM_APCS_GCC_BASE, |
| 1532 | .smd_int.out_offset = 0x8, |
| 1533 | |
| 1534 | .smsm_int.irq_name = "adsp_a11_smsm", |
| 1535 | .smsm_int.flags = IRQF_TRIGGER_RISING, |
| 1536 | .smsm_int.irq_id = -1, |
| 1537 | .smsm_int.device_name = "smd_smsm", |
| 1538 | .smsm_int.dev_id = 0, |
| 1539 | .smsm_int.out_bit_pos = 1 << 14, |
| 1540 | .smsm_int.out_base = (void __iomem *)MSM_APCS_GCC_BASE, |
| 1541 | .smsm_int.out_offset = 0x8, |
| 1542 | }, |
| 1543 | { |
| 1544 | .irq_config_id = SMD_DSPS, |
| 1545 | .subsys_name = "dsps", |
| 1546 | .edge = SMD_APPS_DSPS, |
| 1547 | |
| 1548 | .smd_int.irq_name = "dsps_a11", |
| 1549 | .smd_int.flags = IRQF_TRIGGER_RISING, |
| 1550 | .smd_int.irq_id = -1, |
| 1551 | .smd_int.device_name = "smd_dev", |
| 1552 | .smd_int.dev_id = 0, |
| 1553 | .smd_int.out_bit_pos = 1, |
| 1554 | .smd_int.out_base = (void __iomem *)MSM_SIC_NON_SECURE_BASE, |
| 1555 | .smd_int.out_offset = 0x4080, |
| 1556 | |
| 1557 | .smsm_int.irq_name = "dsps_a11_smsm", |
| 1558 | .smsm_int.flags = IRQF_TRIGGER_RISING, |
| 1559 | .smsm_int.irq_id = -1, |
| 1560 | .smsm_int.device_name = "smd_smsm", |
| 1561 | .smsm_int.dev_id = 0, |
| 1562 | .smsm_int.out_bit_pos = 1, |
| 1563 | .smsm_int.out_base = (void __iomem *)MSM_SIC_NON_SECURE_BASE, |
| 1564 | .smsm_int.out_offset = 0x4094, |
| 1565 | }, |
| 1566 | { |
| 1567 | .irq_config_id = SMD_WCNSS, |
| 1568 | .subsys_name = "wcnss", |
| 1569 | .edge = SMD_APPS_WCNSS, |
| 1570 | |
| 1571 | .smd_int.irq_name = "wcnss_a11", |
| 1572 | .smd_int.flags = IRQF_TRIGGER_RISING, |
| 1573 | .smd_int.irq_id = -1, |
| 1574 | .smd_int.device_name = "smd_dev", |
| 1575 | .smd_int.dev_id = 0, |
| 1576 | .smd_int.out_bit_pos = 1 << 25, |
| 1577 | .smd_int.out_base = (void __iomem *)MSM_APCS_GCC_BASE, |
| 1578 | .smd_int.out_offset = 0x8, |
| 1579 | |
| 1580 | .smsm_int.irq_name = "wcnss_a11_smsm", |
| 1581 | .smsm_int.flags = IRQF_TRIGGER_RISING, |
| 1582 | .smsm_int.irq_id = -1, |
| 1583 | .smsm_int.device_name = "smd_smsm", |
| 1584 | .smsm_int.dev_id = 0, |
| 1585 | .smsm_int.out_bit_pos = 1 << 23, |
| 1586 | .smsm_int.out_base = (void __iomem *)MSM_APCS_GCC_BASE, |
| 1587 | .smsm_int.out_offset = 0x8, |
| 1588 | }, |
| 1589 | }; |
| 1590 | |
Eric Holmberg | 2bb6ccd | 2012-03-13 13:05:14 -0600 | [diff] [blame] | 1591 | static struct smd_subsystem_restart_config smd_ssr_config = { |
| 1592 | .disable_smsm_reset_handshake = 1, |
| 1593 | }; |
| 1594 | |
Eric Holmberg | 023d25c | 2012-03-01 12:27:55 -0700 | [diff] [blame] | 1595 | static struct smd_platform smd_platform_data = { |
| 1596 | .num_ss_configs = ARRAY_SIZE(smd_config_list), |
| 1597 | .smd_ss_configs = smd_config_list, |
Eric Holmberg | 2bb6ccd | 2012-03-13 13:05:14 -0600 | [diff] [blame] | 1598 | .smd_ssr_config = &smd_ssr_config, |
Eric Holmberg | 023d25c | 2012-03-01 12:27:55 -0700 | [diff] [blame] | 1599 | }; |
| 1600 | |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 1601 | struct platform_device msm_device_smd = { |
| 1602 | .name = "msm_smd", |
| 1603 | .id = -1, |
Eric Holmberg | 023d25c | 2012-03-01 12:27:55 -0700 | [diff] [blame] | 1604 | .resource = smd_resource, |
| 1605 | .num_resources = ARRAY_SIZE(smd_resource), |
| 1606 | .dev = { |
| 1607 | .platform_data = &smd_platform_data, |
| 1608 | }, |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 1609 | }; |
| 1610 | |
| 1611 | struct platform_device msm_device_bam_dmux = { |
| 1612 | .name = "BAM_RMNT", |
| 1613 | .id = -1, |
| 1614 | }; |
| 1615 | |
Jeff Ohlstein | 7e66855 | 2011-10-06 16:17:25 -0700 | [diff] [blame] | 1616 | static struct msm_watchdog_pdata msm_watchdog_pdata = { |
| 1617 | .pet_time = 10000, |
| 1618 | .bark_time = 11000, |
| 1619 | .has_secure = true, |
Rohit Vaswani | c77e4a6 | 2012-08-09 18:10:28 -0700 | [diff] [blame] | 1620 | .base = MSM_TMR0_BASE + WDT0_OFFSET, |
| 1621 | }; |
| 1622 | |
| 1623 | static struct resource msm_watchdog_resources[] = { |
| 1624 | { |
| 1625 | .start = WDT0_ACCSCSSNBARK_INT, |
| 1626 | .end = WDT0_ACCSCSSNBARK_INT, |
| 1627 | .flags = IORESOURCE_IRQ, |
| 1628 | }, |
Jeff Ohlstein | 7e66855 | 2011-10-06 16:17:25 -0700 | [diff] [blame] | 1629 | }; |
| 1630 | |
| 1631 | struct platform_device msm8960_device_watchdog = { |
| 1632 | .name = "msm_watchdog", |
| 1633 | .id = -1, |
| 1634 | .dev = { |
| 1635 | .platform_data = &msm_watchdog_pdata, |
| 1636 | }, |
Rohit Vaswani | c77e4a6 | 2012-08-09 18:10:28 -0700 | [diff] [blame] | 1637 | .num_resources = ARRAY_SIZE(msm_watchdog_resources), |
| 1638 | .resource = msm_watchdog_resources, |
Jeff Ohlstein | 7e66855 | 2011-10-06 16:17:25 -0700 | [diff] [blame] | 1639 | }; |
| 1640 | |
Stepan Moskovchenko | df13d34 | 2011-08-03 19:01:25 -0700 | [diff] [blame] | 1641 | static struct resource msm_dmov_resource[] = { |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 1642 | { |
| 1643 | .start = ADM_0_SCSS_1_IRQ, |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 1644 | .flags = IORESOURCE_IRQ, |
| 1645 | }, |
Jeff Ohlstein | 905f1ce | 2011-09-07 18:50:18 -0700 | [diff] [blame] | 1646 | { |
| 1647 | .start = 0x18320000, |
| 1648 | .end = 0x18320000 + SZ_1M - 1, |
| 1649 | .flags = IORESOURCE_MEM, |
| 1650 | }, |
| 1651 | }; |
| 1652 | |
| 1653 | static struct msm_dmov_pdata msm_dmov_pdata = { |
| 1654 | .sd = 1, |
| 1655 | .sd_size = 0x800, |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 1656 | }; |
| 1657 | |
Stepan Moskovchenko | df13d34 | 2011-08-03 19:01:25 -0700 | [diff] [blame] | 1658 | struct platform_device msm8960_device_dmov = { |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 1659 | .name = "msm_dmov", |
| 1660 | .id = -1, |
| 1661 | .resource = msm_dmov_resource, |
| 1662 | .num_resources = ARRAY_SIZE(msm_dmov_resource), |
Jeff Ohlstein | 905f1ce | 2011-09-07 18:50:18 -0700 | [diff] [blame] | 1663 | .dev = { |
| 1664 | .platform_data = &msm_dmov_pdata, |
| 1665 | }, |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 1666 | }; |
| 1667 | |
| 1668 | static struct platform_device *msm_sdcc_devices[] __initdata = { |
| 1669 | &msm_device_sdc1, |
| 1670 | &msm_device_sdc2, |
| 1671 | &msm_device_sdc3, |
| 1672 | &msm_device_sdc4, |
| 1673 | &msm_device_sdc5, |
| 1674 | }; |
| 1675 | |
| 1676 | int __init msm_add_sdcc(unsigned int controller, struct mmc_platform_data *plat) |
| 1677 | { |
| 1678 | struct platform_device *pdev; |
| 1679 | |
| 1680 | if (controller < 1 || controller > 5) |
| 1681 | return -EINVAL; |
| 1682 | |
| 1683 | pdev = msm_sdcc_devices[controller-1]; |
| 1684 | pdev->dev.platform_data = plat; |
| 1685 | return platform_device_register(pdev); |
| 1686 | } |
| 1687 | |
| 1688 | static struct resource resources_qup_i2c_gsbi4[] = { |
| 1689 | { |
| 1690 | .name = "gsbi_qup_i2c_addr", |
| 1691 | .start = MSM_GSBI4_PHYS, |
Harini Jayaraman | d7614a7 | 2011-09-15 14:16:02 -0600 | [diff] [blame] | 1692 | .end = MSM_GSBI4_PHYS + 4 - 1, |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 1693 | .flags = IORESOURCE_MEM, |
| 1694 | }, |
| 1695 | { |
| 1696 | .name = "qup_phys_addr", |
| 1697 | .start = MSM_GSBI4_QUP_PHYS, |
Harini Jayaraman | d7614a7 | 2011-09-15 14:16:02 -0600 | [diff] [blame] | 1698 | .end = MSM_GSBI4_QUP_PHYS + MSM_QUP_SIZE - 1, |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 1699 | .flags = IORESOURCE_MEM, |
| 1700 | }, |
| 1701 | { |
| 1702 | .name = "qup_err_intr", |
| 1703 | .start = GSBI4_QUP_IRQ, |
| 1704 | .end = GSBI4_QUP_IRQ, |
| 1705 | .flags = IORESOURCE_IRQ, |
| 1706 | }, |
| 1707 | }; |
| 1708 | |
| 1709 | struct platform_device msm8960_device_qup_i2c_gsbi4 = { |
| 1710 | .name = "qup_i2c", |
| 1711 | .id = 4, |
| 1712 | .num_resources = ARRAY_SIZE(resources_qup_i2c_gsbi4), |
| 1713 | .resource = resources_qup_i2c_gsbi4, |
| 1714 | }; |
| 1715 | |
| 1716 | static struct resource resources_qup_i2c_gsbi3[] = { |
| 1717 | { |
| 1718 | .name = "gsbi_qup_i2c_addr", |
| 1719 | .start = MSM_GSBI3_PHYS, |
Harini Jayaraman | d7614a7 | 2011-09-15 14:16:02 -0600 | [diff] [blame] | 1720 | .end = MSM_GSBI3_PHYS + 4 - 1, |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 1721 | .flags = IORESOURCE_MEM, |
| 1722 | }, |
| 1723 | { |
| 1724 | .name = "qup_phys_addr", |
| 1725 | .start = MSM_GSBI3_QUP_PHYS, |
Harini Jayaraman | d7614a7 | 2011-09-15 14:16:02 -0600 | [diff] [blame] | 1726 | .end = MSM_GSBI3_QUP_PHYS + MSM_QUP_SIZE - 1, |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 1727 | .flags = IORESOURCE_MEM, |
| 1728 | }, |
| 1729 | { |
| 1730 | .name = "qup_err_intr", |
| 1731 | .start = GSBI3_QUP_IRQ, |
| 1732 | .end = GSBI3_QUP_IRQ, |
| 1733 | .flags = IORESOURCE_IRQ, |
| 1734 | }, |
| 1735 | }; |
| 1736 | |
| 1737 | struct platform_device msm8960_device_qup_i2c_gsbi3 = { |
| 1738 | .name = "qup_i2c", |
| 1739 | .id = 3, |
| 1740 | .num_resources = ARRAY_SIZE(resources_qup_i2c_gsbi3), |
| 1741 | .resource = resources_qup_i2c_gsbi3, |
| 1742 | }; |
| 1743 | |
Harini Jayaraman | fe6ff416 | 2012-03-14 11:25:40 -0600 | [diff] [blame] | 1744 | static struct resource resources_qup_i2c_gsbi9[] = { |
| 1745 | { |
| 1746 | .name = "gsbi_qup_i2c_addr", |
| 1747 | .start = MSM_GSBI9_PHYS, |
| 1748 | .end = MSM_GSBI9_PHYS + 4 - 1, |
| 1749 | .flags = IORESOURCE_MEM, |
| 1750 | }, |
| 1751 | { |
| 1752 | .name = "qup_phys_addr", |
| 1753 | .start = MSM_GSBI9_QUP_PHYS, |
| 1754 | .end = MSM_GSBI9_QUP_PHYS + MSM_QUP_SIZE - 1, |
| 1755 | .flags = IORESOURCE_MEM, |
| 1756 | }, |
| 1757 | { |
| 1758 | .name = "qup_err_intr", |
| 1759 | .start = GSBI9_QUP_IRQ, |
| 1760 | .end = GSBI9_QUP_IRQ, |
| 1761 | .flags = IORESOURCE_IRQ, |
| 1762 | }, |
| 1763 | }; |
| 1764 | |
| 1765 | struct platform_device msm8960_device_qup_i2c_gsbi9 = { |
| 1766 | .name = "qup_i2c", |
| 1767 | .id = 0, |
| 1768 | .num_resources = ARRAY_SIZE(resources_qup_i2c_gsbi9), |
| 1769 | .resource = resources_qup_i2c_gsbi9, |
| 1770 | }; |
| 1771 | |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 1772 | static struct resource resources_qup_i2c_gsbi10[] = { |
| 1773 | { |
| 1774 | .name = "gsbi_qup_i2c_addr", |
| 1775 | .start = MSM_GSBI10_PHYS, |
Harini Jayaraman | d7614a7 | 2011-09-15 14:16:02 -0600 | [diff] [blame] | 1776 | .end = MSM_GSBI10_PHYS + 4 - 1, |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 1777 | .flags = IORESOURCE_MEM, |
| 1778 | }, |
| 1779 | { |
| 1780 | .name = "qup_phys_addr", |
| 1781 | .start = MSM_GSBI10_QUP_PHYS, |
Harini Jayaraman | d7614a7 | 2011-09-15 14:16:02 -0600 | [diff] [blame] | 1782 | .end = MSM_GSBI10_QUP_PHYS + MSM_QUP_SIZE - 1, |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 1783 | .flags = IORESOURCE_MEM, |
| 1784 | }, |
| 1785 | { |
| 1786 | .name = "qup_err_intr", |
| 1787 | .start = GSBI10_QUP_IRQ, |
| 1788 | .end = GSBI10_QUP_IRQ, |
| 1789 | .flags = IORESOURCE_IRQ, |
| 1790 | }, |
| 1791 | }; |
| 1792 | |
| 1793 | struct platform_device msm8960_device_qup_i2c_gsbi10 = { |
| 1794 | .name = "qup_i2c", |
| 1795 | .id = 10, |
| 1796 | .num_resources = ARRAY_SIZE(resources_qup_i2c_gsbi10), |
| 1797 | .resource = resources_qup_i2c_gsbi10, |
| 1798 | }; |
| 1799 | |
| 1800 | static struct resource resources_qup_i2c_gsbi12[] = { |
| 1801 | { |
| 1802 | .name = "gsbi_qup_i2c_addr", |
| 1803 | .start = MSM_GSBI12_PHYS, |
Harini Jayaraman | d7614a7 | 2011-09-15 14:16:02 -0600 | [diff] [blame] | 1804 | .end = MSM_GSBI12_PHYS + 4 - 1, |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 1805 | .flags = IORESOURCE_MEM, |
| 1806 | }, |
| 1807 | { |
| 1808 | .name = "qup_phys_addr", |
| 1809 | .start = MSM_GSBI12_QUP_PHYS, |
Harini Jayaraman | d7614a7 | 2011-09-15 14:16:02 -0600 | [diff] [blame] | 1810 | .end = MSM_GSBI12_QUP_PHYS + MSM_QUP_SIZE - 1, |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 1811 | .flags = IORESOURCE_MEM, |
| 1812 | }, |
| 1813 | { |
| 1814 | .name = "qup_err_intr", |
| 1815 | .start = GSBI12_QUP_IRQ, |
| 1816 | .end = GSBI12_QUP_IRQ, |
| 1817 | .flags = IORESOURCE_IRQ, |
| 1818 | }, |
| 1819 | }; |
| 1820 | |
| 1821 | struct platform_device msm8960_device_qup_i2c_gsbi12 = { |
| 1822 | .name = "qup_i2c", |
| 1823 | .id = 12, |
| 1824 | .num_resources = ARRAY_SIZE(resources_qup_i2c_gsbi12), |
| 1825 | .resource = resources_qup_i2c_gsbi12, |
| 1826 | }; |
| 1827 | |
| 1828 | #ifdef CONFIG_MSM_CAMERA |
Kevin Chan | bb8ef86 | 2012-02-14 13:03:04 -0800 | [diff] [blame] | 1829 | static struct resource msm_cam_gsbi4_i2c_mux_resources[] = { |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 1830 | { |
Kevin Chan | bb8ef86 | 2012-02-14 13:03:04 -0800 | [diff] [blame] | 1831 | .name = "i2c_mux_rw", |
Nishant Pandit | 24153d8 | 2011-08-27 16:05:13 +0530 | [diff] [blame] | 1832 | .start = 0x008003E0, |
Kevin Chan | bb8ef86 | 2012-02-14 13:03:04 -0800 | [diff] [blame] | 1833 | .end = 0x008003E0 + SZ_8 - 1, |
Nishant Pandit | 24153d8 | 2011-08-27 16:05:13 +0530 | [diff] [blame] | 1834 | .flags = IORESOURCE_MEM, |
| 1835 | }, |
| 1836 | { |
Kevin Chan | bb8ef86 | 2012-02-14 13:03:04 -0800 | [diff] [blame] | 1837 | .name = "i2c_mux_ctl", |
Nishant Pandit | 24153d8 | 2011-08-27 16:05:13 +0530 | [diff] [blame] | 1838 | .start = 0x008020B8, |
Kevin Chan | bb8ef86 | 2012-02-14 13:03:04 -0800 | [diff] [blame] | 1839 | .end = 0x008020B8 + SZ_4 - 1, |
Nishant Pandit | 24153d8 | 2011-08-27 16:05:13 +0530 | [diff] [blame] | 1840 | .flags = IORESOURCE_MEM, |
| 1841 | }, |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 1842 | }; |
| 1843 | |
Kevin Chan | bb8ef86 | 2012-02-14 13:03:04 -0800 | [diff] [blame] | 1844 | struct platform_device msm8960_device_i2c_mux_gsbi4 = { |
| 1845 | .name = "msm_cam_i2c_mux", |
| 1846 | .id = 0, |
| 1847 | .resource = msm_cam_gsbi4_i2c_mux_resources, |
| 1848 | .num_resources = ARRAY_SIZE(msm_cam_gsbi4_i2c_mux_resources), |
| 1849 | }; |
Kevin Chan | f6216f2 | 2011-10-25 18:40:11 -0700 | [diff] [blame] | 1850 | |
| 1851 | static struct resource msm_csiphy0_resources[] = { |
| 1852 | { |
| 1853 | .name = "csiphy", |
| 1854 | .start = 0x04800C00, |
| 1855 | .end = 0x04800C00 + SZ_1K - 1, |
| 1856 | .flags = IORESOURCE_MEM, |
| 1857 | }, |
| 1858 | { |
| 1859 | .name = "csiphy", |
| 1860 | .start = CSIPHY_4LN_IRQ, |
| 1861 | .end = CSIPHY_4LN_IRQ, |
| 1862 | .flags = IORESOURCE_IRQ, |
| 1863 | }, |
| 1864 | }; |
| 1865 | |
| 1866 | static struct resource msm_csiphy1_resources[] = { |
| 1867 | { |
| 1868 | .name = "csiphy", |
| 1869 | .start = 0x04801000, |
| 1870 | .end = 0x04801000 + SZ_1K - 1, |
| 1871 | .flags = IORESOURCE_MEM, |
| 1872 | }, |
| 1873 | { |
| 1874 | .name = "csiphy", |
| 1875 | .start = MSM8960_CSIPHY_2LN_IRQ, |
| 1876 | .end = MSM8960_CSIPHY_2LN_IRQ, |
| 1877 | .flags = IORESOURCE_IRQ, |
| 1878 | }, |
| 1879 | }; |
| 1880 | |
Sreesudhan Ramakrish Ramkumar | b1edcd0 | 2012-01-17 11:33:05 -0800 | [diff] [blame] | 1881 | static struct resource msm_csiphy2_resources[] = { |
| 1882 | { |
| 1883 | .name = "csiphy", |
| 1884 | .start = 0x04801400, |
| 1885 | .end = 0x04801400 + SZ_1K - 1, |
| 1886 | .flags = IORESOURCE_MEM, |
| 1887 | }, |
| 1888 | { |
| 1889 | .name = "csiphy", |
| 1890 | .start = MSM8960_CSIPHY_2_2LN_IRQ, |
| 1891 | .end = MSM8960_CSIPHY_2_2LN_IRQ, |
| 1892 | .flags = IORESOURCE_IRQ, |
| 1893 | }, |
| 1894 | }; |
| 1895 | |
Kevin Chan | f6216f2 | 2011-10-25 18:40:11 -0700 | [diff] [blame] | 1896 | struct platform_device msm8960_device_csiphy0 = { |
| 1897 | .name = "msm_csiphy", |
| 1898 | .id = 0, |
| 1899 | .resource = msm_csiphy0_resources, |
| 1900 | .num_resources = ARRAY_SIZE(msm_csiphy0_resources), |
| 1901 | }; |
| 1902 | |
| 1903 | struct platform_device msm8960_device_csiphy1 = { |
| 1904 | .name = "msm_csiphy", |
| 1905 | .id = 1, |
| 1906 | .resource = msm_csiphy1_resources, |
| 1907 | .num_resources = ARRAY_SIZE(msm_csiphy1_resources), |
| 1908 | }; |
Kevin Chan | c8b52e8 | 2011-10-25 23:20:21 -0700 | [diff] [blame] | 1909 | |
Sreesudhan Ramakrish Ramkumar | b1edcd0 | 2012-01-17 11:33:05 -0800 | [diff] [blame] | 1910 | struct platform_device msm8960_device_csiphy2 = { |
| 1911 | .name = "msm_csiphy", |
| 1912 | .id = 2, |
| 1913 | .resource = msm_csiphy2_resources, |
| 1914 | .num_resources = ARRAY_SIZE(msm_csiphy2_resources), |
| 1915 | }; |
| 1916 | |
Kevin Chan | c8b52e8 | 2011-10-25 23:20:21 -0700 | [diff] [blame] | 1917 | static struct resource msm_csid0_resources[] = { |
| 1918 | { |
| 1919 | .name = "csid", |
| 1920 | .start = 0x04800000, |
| 1921 | .end = 0x04800000 + SZ_1K - 1, |
| 1922 | .flags = IORESOURCE_MEM, |
| 1923 | }, |
| 1924 | { |
| 1925 | .name = "csid", |
| 1926 | .start = CSI_0_IRQ, |
| 1927 | .end = CSI_0_IRQ, |
| 1928 | .flags = IORESOURCE_IRQ, |
| 1929 | }, |
| 1930 | }; |
| 1931 | |
| 1932 | static struct resource msm_csid1_resources[] = { |
| 1933 | { |
| 1934 | .name = "csid", |
| 1935 | .start = 0x04800400, |
| 1936 | .end = 0x04800400 + SZ_1K - 1, |
| 1937 | .flags = IORESOURCE_MEM, |
| 1938 | }, |
| 1939 | { |
| 1940 | .name = "csid", |
| 1941 | .start = CSI_1_IRQ, |
| 1942 | .end = CSI_1_IRQ, |
| 1943 | .flags = IORESOURCE_IRQ, |
| 1944 | }, |
| 1945 | }; |
| 1946 | |
Sreesudhan Ramakrish Ramkumar | b1edcd0 | 2012-01-17 11:33:05 -0800 | [diff] [blame] | 1947 | static struct resource msm_csid2_resources[] = { |
| 1948 | { |
| 1949 | .name = "csid", |
| 1950 | .start = 0x04801800, |
| 1951 | .end = 0x04801800 + SZ_1K - 1, |
| 1952 | .flags = IORESOURCE_MEM, |
| 1953 | }, |
| 1954 | { |
| 1955 | .name = "csid", |
| 1956 | .start = CSI_2_IRQ, |
| 1957 | .end = CSI_2_IRQ, |
| 1958 | .flags = IORESOURCE_IRQ, |
| 1959 | }, |
| 1960 | }; |
| 1961 | |
Kevin Chan | c8b52e8 | 2011-10-25 23:20:21 -0700 | [diff] [blame] | 1962 | struct platform_device msm8960_device_csid0 = { |
| 1963 | .name = "msm_csid", |
| 1964 | .id = 0, |
| 1965 | .resource = msm_csid0_resources, |
| 1966 | .num_resources = ARRAY_SIZE(msm_csid0_resources), |
| 1967 | }; |
| 1968 | |
| 1969 | struct platform_device msm8960_device_csid1 = { |
| 1970 | .name = "msm_csid", |
| 1971 | .id = 1, |
| 1972 | .resource = msm_csid1_resources, |
| 1973 | .num_resources = ARRAY_SIZE(msm_csid1_resources), |
| 1974 | }; |
Kevin Chan | e12c667 | 2011-10-26 11:55:26 -0700 | [diff] [blame] | 1975 | |
Sreesudhan Ramakrish Ramkumar | b1edcd0 | 2012-01-17 11:33:05 -0800 | [diff] [blame] | 1976 | struct platform_device msm8960_device_csid2 = { |
| 1977 | .name = "msm_csid", |
| 1978 | .id = 2, |
| 1979 | .resource = msm_csid2_resources, |
| 1980 | .num_resources = ARRAY_SIZE(msm_csid2_resources), |
| 1981 | }; |
| 1982 | |
Kevin Chan | e12c667 | 2011-10-26 11:55:26 -0700 | [diff] [blame] | 1983 | struct resource msm_ispif_resources[] = { |
| 1984 | { |
| 1985 | .name = "ispif", |
| 1986 | .start = 0x04800800, |
| 1987 | .end = 0x04800800 + SZ_1K - 1, |
| 1988 | .flags = IORESOURCE_MEM, |
| 1989 | }, |
| 1990 | { |
| 1991 | .name = "ispif", |
| 1992 | .start = ISPIF_IRQ, |
| 1993 | .end = ISPIF_IRQ, |
| 1994 | .flags = IORESOURCE_IRQ, |
| 1995 | }, |
| 1996 | }; |
| 1997 | |
| 1998 | struct platform_device msm8960_device_ispif = { |
| 1999 | .name = "msm_ispif", |
| 2000 | .id = 0, |
| 2001 | .resource = msm_ispif_resources, |
| 2002 | .num_resources = ARRAY_SIZE(msm_ispif_resources), |
| 2003 | }; |
Kevin Chan | 5827c55 | 2011-10-28 18:36:32 -0700 | [diff] [blame] | 2004 | |
| 2005 | static struct resource msm_vfe_resources[] = { |
| 2006 | { |
| 2007 | .name = "vfe32", |
| 2008 | .start = 0x04500000, |
| 2009 | .end = 0x04500000 + SZ_1M - 1, |
| 2010 | .flags = IORESOURCE_MEM, |
| 2011 | }, |
| 2012 | { |
| 2013 | .name = "vfe32", |
| 2014 | .start = VFE_IRQ, |
| 2015 | .end = VFE_IRQ, |
| 2016 | .flags = IORESOURCE_IRQ, |
| 2017 | }, |
| 2018 | }; |
| 2019 | |
| 2020 | struct platform_device msm8960_device_vfe = { |
| 2021 | .name = "msm_vfe", |
| 2022 | .id = 0, |
| 2023 | .resource = msm_vfe_resources, |
| 2024 | .num_resources = ARRAY_SIZE(msm_vfe_resources), |
| 2025 | }; |
Kevin Chan | a085312 | 2011-11-07 19:48:44 -0800 | [diff] [blame] | 2026 | |
| 2027 | static struct resource msm_vpe_resources[] = { |
| 2028 | { |
| 2029 | .name = "vpe", |
| 2030 | .start = 0x05300000, |
| 2031 | .end = 0x05300000 + SZ_1M - 1, |
| 2032 | .flags = IORESOURCE_MEM, |
| 2033 | }, |
| 2034 | { |
| 2035 | .name = "vpe", |
| 2036 | .start = VPE_IRQ, |
| 2037 | .end = VPE_IRQ, |
| 2038 | .flags = IORESOURCE_IRQ, |
| 2039 | }, |
| 2040 | }; |
| 2041 | |
| 2042 | struct platform_device msm8960_device_vpe = { |
| 2043 | .name = "msm_vpe", |
| 2044 | .id = 0, |
| 2045 | .resource = msm_vpe_resources, |
| 2046 | .num_resources = ARRAY_SIZE(msm_vpe_resources), |
| 2047 | }; |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 2048 | #endif |
| 2049 | |
Joel Nider | a126194 | 2011-09-12 16:30:09 +0300 | [diff] [blame] | 2050 | #define MSM_TSIF0_PHYS (0x18200000) |
| 2051 | #define MSM_TSIF1_PHYS (0x18201000) |
| 2052 | #define MSM_TSIF_SIZE (0x200) |
| 2053 | |
| 2054 | #define TSIF_0_CLK GPIO_CFG(75, 1, GPIO_CFG_INPUT, \ |
| 2055 | GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA) |
| 2056 | #define TSIF_0_EN GPIO_CFG(76, 1, GPIO_CFG_INPUT, \ |
| 2057 | GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA) |
| 2058 | #define TSIF_0_DATA GPIO_CFG(77, 1, GPIO_CFG_INPUT, \ |
| 2059 | GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA) |
| 2060 | #define TSIF_0_SYNC GPIO_CFG(82, 1, GPIO_CFG_INPUT, \ |
| 2061 | GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA) |
| 2062 | #define TSIF_1_CLK GPIO_CFG(79, 1, GPIO_CFG_INPUT, \ |
| 2063 | GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA) |
| 2064 | #define TSIF_1_EN GPIO_CFG(80, 1, GPIO_CFG_INPUT, \ |
| 2065 | GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA) |
| 2066 | #define TSIF_1_DATA GPIO_CFG(81, 1, GPIO_CFG_INPUT, \ |
| 2067 | GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA) |
| 2068 | #define TSIF_1_SYNC GPIO_CFG(78, 1, GPIO_CFG_INPUT, \ |
| 2069 | GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA) |
| 2070 | |
| 2071 | static const struct msm_gpio tsif0_gpios[] = { |
| 2072 | { .gpio_cfg = TSIF_0_CLK, .label = "tsif_clk", }, |
| 2073 | { .gpio_cfg = TSIF_0_EN, .label = "tsif_en", }, |
| 2074 | { .gpio_cfg = TSIF_0_DATA, .label = "tsif_data", }, |
| 2075 | { .gpio_cfg = TSIF_0_SYNC, .label = "tsif_sync", }, |
| 2076 | }; |
| 2077 | |
| 2078 | static const struct msm_gpio tsif1_gpios[] = { |
| 2079 | { .gpio_cfg = TSIF_1_CLK, .label = "tsif_clk", }, |
| 2080 | { .gpio_cfg = TSIF_1_EN, .label = "tsif_en", }, |
| 2081 | { .gpio_cfg = TSIF_1_DATA, .label = "tsif_data", }, |
| 2082 | { .gpio_cfg = TSIF_1_SYNC, .label = "tsif_sync", }, |
| 2083 | }; |
| 2084 | |
| 2085 | struct msm_tsif_platform_data tsif1_platform_data = { |
| 2086 | .num_gpios = ARRAY_SIZE(tsif1_gpios), |
| 2087 | .gpios = tsif1_gpios, |
Joel Nider | dfb793b | 2012-06-27 12:00:22 +0300 | [diff] [blame] | 2088 | .tsif_pclk = "iface_clk", |
| 2089 | .tsif_ref_clk = "ref_clk", |
Joel Nider | a126194 | 2011-09-12 16:30:09 +0300 | [diff] [blame] | 2090 | }; |
| 2091 | |
| 2092 | struct resource tsif1_resources[] = { |
| 2093 | [0] = { |
| 2094 | .flags = IORESOURCE_IRQ, |
| 2095 | .start = TSIF2_IRQ, |
| 2096 | .end = TSIF2_IRQ, |
| 2097 | }, |
| 2098 | [1] = { |
| 2099 | .flags = IORESOURCE_MEM, |
| 2100 | .start = MSM_TSIF1_PHYS, |
| 2101 | .end = MSM_TSIF1_PHYS + MSM_TSIF_SIZE - 1, |
| 2102 | }, |
| 2103 | [2] = { |
| 2104 | .flags = IORESOURCE_DMA, |
| 2105 | .start = DMOV_TSIF_CHAN, |
| 2106 | .end = DMOV_TSIF_CRCI, |
| 2107 | }, |
| 2108 | }; |
| 2109 | |
| 2110 | struct msm_tsif_platform_data tsif0_platform_data = { |
| 2111 | .num_gpios = ARRAY_SIZE(tsif0_gpios), |
| 2112 | .gpios = tsif0_gpios, |
Joel Nider | dfb793b | 2012-06-27 12:00:22 +0300 | [diff] [blame] | 2113 | .tsif_pclk = "iface_clk", |
| 2114 | .tsif_ref_clk = "ref_clk", |
Joel Nider | a126194 | 2011-09-12 16:30:09 +0300 | [diff] [blame] | 2115 | }; |
| 2116 | struct resource tsif0_resources[] = { |
| 2117 | [0] = { |
| 2118 | .flags = IORESOURCE_IRQ, |
| 2119 | .start = TSIF1_IRQ, |
| 2120 | .end = TSIF1_IRQ, |
| 2121 | }, |
| 2122 | [1] = { |
| 2123 | .flags = IORESOURCE_MEM, |
| 2124 | .start = MSM_TSIF0_PHYS, |
| 2125 | .end = MSM_TSIF0_PHYS + MSM_TSIF_SIZE - 1, |
| 2126 | }, |
| 2127 | [2] = { |
| 2128 | .flags = IORESOURCE_DMA, |
| 2129 | .start = DMOV_TSIF_CHAN, |
| 2130 | .end = DMOV_TSIF_CRCI, |
| 2131 | }, |
| 2132 | }; |
| 2133 | |
| 2134 | struct platform_device msm_device_tsif[2] = { |
| 2135 | { |
| 2136 | .name = "msm_tsif", |
| 2137 | .id = 0, |
| 2138 | .num_resources = ARRAY_SIZE(tsif0_resources), |
| 2139 | .resource = tsif0_resources, |
| 2140 | .dev = { |
| 2141 | .platform_data = &tsif0_platform_data |
| 2142 | }, |
| 2143 | }, |
| 2144 | { |
| 2145 | .name = "msm_tsif", |
| 2146 | .id = 1, |
| 2147 | .num_resources = ARRAY_SIZE(tsif1_resources), |
| 2148 | .resource = tsif1_resources, |
| 2149 | .dev = { |
| 2150 | .platform_data = &tsif1_platform_data |
| 2151 | }, |
| 2152 | } |
| 2153 | }; |
| 2154 | |
Jay Chokshi | 33c044a | 2011-12-07 13:05:40 -0800 | [diff] [blame] | 2155 | static struct resource resources_ssbi_pmic[] = { |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 2156 | { |
| 2157 | .start = MSM_PMIC1_SSBI_CMD_PHYS, |
| 2158 | .end = MSM_PMIC1_SSBI_CMD_PHYS + MSM_PMIC_SSBI_SIZE - 1, |
| 2159 | .flags = IORESOURCE_MEM, |
| 2160 | }, |
| 2161 | }; |
| 2162 | |
Jay Chokshi | 33c044a | 2011-12-07 13:05:40 -0800 | [diff] [blame] | 2163 | struct platform_device msm8960_device_ssbi_pmic = { |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 2164 | .name = "msm_ssbi", |
| 2165 | .id = 0, |
Jay Chokshi | 33c044a | 2011-12-07 13:05:40 -0800 | [diff] [blame] | 2166 | .resource = resources_ssbi_pmic, |
| 2167 | .num_resources = ARRAY_SIZE(resources_ssbi_pmic), |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 2168 | }; |
| 2169 | |
| 2170 | static struct resource resources_qup_spi_gsbi1[] = { |
| 2171 | { |
| 2172 | .name = "spi_base", |
| 2173 | .start = MSM_GSBI1_QUP_PHYS, |
| 2174 | .end = MSM_GSBI1_QUP_PHYS + SZ_4K - 1, |
| 2175 | .flags = IORESOURCE_MEM, |
| 2176 | }, |
| 2177 | { |
| 2178 | .name = "gsbi_base", |
| 2179 | .start = MSM_GSBI1_PHYS, |
| 2180 | .end = MSM_GSBI1_PHYS + 4 - 1, |
| 2181 | .flags = IORESOURCE_MEM, |
| 2182 | }, |
| 2183 | { |
| 2184 | .name = "spi_irq_in", |
| 2185 | .start = MSM8960_GSBI1_QUP_IRQ, |
| 2186 | .end = MSM8960_GSBI1_QUP_IRQ, |
| 2187 | .flags = IORESOURCE_IRQ, |
| 2188 | }, |
Harini Jayaraman | aac8e34 | 2011-08-09 19:25:23 -0600 | [diff] [blame] | 2189 | { |
| 2190 | .name = "spi_clk", |
| 2191 | .start = 9, |
| 2192 | .end = 9, |
| 2193 | .flags = IORESOURCE_IO, |
| 2194 | }, |
| 2195 | { |
Harini Jayaraman | aac8e34 | 2011-08-09 19:25:23 -0600 | [diff] [blame] | 2196 | .name = "spi_miso", |
| 2197 | .start = 7, |
| 2198 | .end = 7, |
| 2199 | .flags = IORESOURCE_IO, |
| 2200 | }, |
| 2201 | { |
| 2202 | .name = "spi_mosi", |
| 2203 | .start = 6, |
| 2204 | .end = 6, |
| 2205 | .flags = IORESOURCE_IO, |
| 2206 | }, |
Harini Jayaraman | 8392e43 | 2011-11-29 18:26:17 -0700 | [diff] [blame] | 2207 | { |
| 2208 | .name = "spi_cs", |
| 2209 | .start = 8, |
| 2210 | .end = 8, |
| 2211 | .flags = IORESOURCE_IO, |
| 2212 | }, |
| 2213 | { |
| 2214 | .name = "spi_cs1", |
| 2215 | .start = 14, |
| 2216 | .end = 14, |
| 2217 | .flags = IORESOURCE_IO, |
| 2218 | }, |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 2219 | }; |
| 2220 | |
| 2221 | struct platform_device msm8960_device_qup_spi_gsbi1 = { |
| 2222 | .name = "spi_qsd", |
| 2223 | .id = 0, |
| 2224 | .num_resources = ARRAY_SIZE(resources_qup_spi_gsbi1), |
| 2225 | .resource = resources_qup_spi_gsbi1, |
| 2226 | }; |
| 2227 | |
| 2228 | struct platform_device msm_pcm = { |
| 2229 | .name = "msm-pcm-dsp", |
| 2230 | .id = -1, |
| 2231 | }; |
| 2232 | |
Kiran Kandi | 5e809b0 | 2012-01-31 00:24:33 -0800 | [diff] [blame] | 2233 | struct platform_device msm_multi_ch_pcm = { |
| 2234 | .name = "msm-multi-ch-pcm-dsp", |
| 2235 | .id = -1, |
| 2236 | }; |
| 2237 | |
Jayasena Sangaraboina | 99bf09c | 2012-07-17 12:03:08 -0700 | [diff] [blame] | 2238 | struct platform_device msm_lowlatency_pcm = { |
| 2239 | .name = "msm-lowlatency-pcm-dsp", |
| 2240 | .id = -1, |
| 2241 | }; |
| 2242 | |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 2243 | struct platform_device msm_pcm_routing = { |
| 2244 | .name = "msm-pcm-routing", |
| 2245 | .id = -1, |
| 2246 | }; |
| 2247 | |
| 2248 | struct platform_device msm_cpudai0 = { |
| 2249 | .name = "msm-dai-q6", |
| 2250 | .id = 0x4000, |
| 2251 | }; |
| 2252 | |
| 2253 | struct platform_device msm_cpudai1 = { |
| 2254 | .name = "msm-dai-q6", |
| 2255 | .id = 0x4001, |
| 2256 | }; |
| 2257 | |
Kiran Kandi | 97fe19d | 2012-05-20 22:34:04 -0700 | [diff] [blame] | 2258 | struct platform_device msm8960_cpudai_slimbus_2_rx = { |
| 2259 | .name = "msm-dai-q6", |
| 2260 | .id = 0x4004, |
| 2261 | }; |
| 2262 | |
Kiran Kandi | 1e6371d | 2012-03-29 11:48:57 -0700 | [diff] [blame] | 2263 | struct platform_device msm8960_cpudai_slimbus_2_tx = { |
| 2264 | .name = "msm-dai-q6", |
| 2265 | .id = 0x4005, |
| 2266 | }; |
| 2267 | |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 2268 | struct platform_device msm_cpudai_hdmi_rx = { |
Kiran Kandi | 5e809b0 | 2012-01-31 00:24:33 -0800 | [diff] [blame] | 2269 | .name = "msm-dai-q6-hdmi", |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 2270 | .id = 8, |
| 2271 | }; |
| 2272 | |
| 2273 | struct platform_device msm_cpudai_bt_rx = { |
| 2274 | .name = "msm-dai-q6", |
| 2275 | .id = 0x3000, |
| 2276 | }; |
| 2277 | |
| 2278 | struct platform_device msm_cpudai_bt_tx = { |
| 2279 | .name = "msm-dai-q6", |
| 2280 | .id = 0x3001, |
| 2281 | }; |
| 2282 | |
| 2283 | struct platform_device msm_cpudai_fm_rx = { |
| 2284 | .name = "msm-dai-q6", |
| 2285 | .id = 0x3004, |
| 2286 | }; |
| 2287 | |
| 2288 | struct platform_device msm_cpudai_fm_tx = { |
| 2289 | .name = "msm-dai-q6", |
| 2290 | .id = 0x3005, |
| 2291 | }; |
| 2292 | |
Helen Zeng | 0705a5f | 2011-10-14 15:29:52 -0700 | [diff] [blame] | 2293 | struct platform_device msm_cpudai_incall_music_rx = { |
| 2294 | .name = "msm-dai-q6", |
| 2295 | .id = 0x8005, |
| 2296 | }; |
| 2297 | |
Helen Zeng | e3d716a | 2011-10-14 16:32:16 -0700 | [diff] [blame] | 2298 | struct platform_device msm_cpudai_incall_record_rx = { |
| 2299 | .name = "msm-dai-q6", |
| 2300 | .id = 0x8004, |
| 2301 | }; |
| 2302 | |
| 2303 | struct platform_device msm_cpudai_incall_record_tx = { |
| 2304 | .name = "msm-dai-q6", |
| 2305 | .id = 0x8003, |
| 2306 | }; |
| 2307 | |
Bhalchandra Gajare | 0e795c4 | 2011-08-15 18:10:30 -0700 | [diff] [blame] | 2308 | /* |
| 2309 | * Machine specific data for AUX PCM Interface |
| 2310 | * which the driver will be unware of. |
| 2311 | */ |
Kiran Kandi | 5f4ab69 | 2012-02-23 11:23:56 -0800 | [diff] [blame] | 2312 | struct msm_dai_auxpcm_pdata auxpcm_pdata = { |
Bhalchandra Gajare | 0e795c4 | 2011-08-15 18:10:30 -0700 | [diff] [blame] | 2313 | .clk = "pcm_clk", |
Kuirong Wang | 547a998 | 2012-05-04 18:29:11 -0700 | [diff] [blame] | 2314 | .mode_8k = { |
| 2315 | .mode = AFE_PCM_CFG_MODE_PCM, |
| 2316 | .sync = AFE_PCM_CFG_SYNC_INT, |
Damir Didjusto | 08d2aa5 | 2012-08-17 00:16:07 -0700 | [diff] [blame^] | 2317 | .frame = AFE_PCM_CFG_FRM_32BPF, |
Kuirong Wang | 547a998 | 2012-05-04 18:29:11 -0700 | [diff] [blame] | 2318 | .quant = AFE_PCM_CFG_QUANT_LINEAR_NOPAD, |
| 2319 | .slot = 0, |
| 2320 | .data = AFE_PCM_CFG_CDATAOE_MASTER, |
Damir Didjusto | 08d2aa5 | 2012-08-17 00:16:07 -0700 | [diff] [blame^] | 2321 | .pcm_clk_rate = 256000, |
Kuirong Wang | 547a998 | 2012-05-04 18:29:11 -0700 | [diff] [blame] | 2322 | }, |
| 2323 | .mode_16k = { |
| 2324 | .mode = AFE_PCM_CFG_MODE_PCM, |
| 2325 | .sync = AFE_PCM_CFG_SYNC_INT, |
Damir Didjusto | 08d2aa5 | 2012-08-17 00:16:07 -0700 | [diff] [blame^] | 2326 | .frame = AFE_PCM_CFG_FRM_32BPF, |
Kuirong Wang | 547a998 | 2012-05-04 18:29:11 -0700 | [diff] [blame] | 2327 | .quant = AFE_PCM_CFG_QUANT_LINEAR_NOPAD, |
| 2328 | .slot = 0, |
| 2329 | .data = AFE_PCM_CFG_CDATAOE_MASTER, |
Damir Didjusto | 08d2aa5 | 2012-08-17 00:16:07 -0700 | [diff] [blame^] | 2330 | .pcm_clk_rate = 512000, |
Kuirong Wang | 547a998 | 2012-05-04 18:29:11 -0700 | [diff] [blame] | 2331 | } |
Bhalchandra Gajare | 0e795c4 | 2011-08-15 18:10:30 -0700 | [diff] [blame] | 2332 | }; |
| 2333 | |
| 2334 | struct platform_device msm_cpudai_auxpcm_rx = { |
| 2335 | .name = "msm-dai-q6", |
| 2336 | .id = 2, |
| 2337 | .dev = { |
Kiran Kandi | 5f4ab69 | 2012-02-23 11:23:56 -0800 | [diff] [blame] | 2338 | .platform_data = &auxpcm_pdata, |
Bhalchandra Gajare | 0e795c4 | 2011-08-15 18:10:30 -0700 | [diff] [blame] | 2339 | }, |
| 2340 | }; |
| 2341 | |
| 2342 | struct platform_device msm_cpudai_auxpcm_tx = { |
| 2343 | .name = "msm-dai-q6", |
| 2344 | .id = 3, |
Kiran Kandi | 5f4ab69 | 2012-02-23 11:23:56 -0800 | [diff] [blame] | 2345 | .dev = { |
| 2346 | .platform_data = &auxpcm_pdata, |
| 2347 | }, |
Bhalchandra Gajare | 0e795c4 | 2011-08-15 18:10:30 -0700 | [diff] [blame] | 2348 | }; |
| 2349 | |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 2350 | struct platform_device msm_cpu_fe = { |
| 2351 | .name = "msm-dai-fe", |
| 2352 | .id = -1, |
| 2353 | }; |
| 2354 | |
| 2355 | struct platform_device msm_stub_codec = { |
| 2356 | .name = "msm-stub-codec", |
| 2357 | .id = 1, |
| 2358 | }; |
| 2359 | |
| 2360 | struct platform_device msm_voice = { |
| 2361 | .name = "msm-pcm-voice", |
| 2362 | .id = -1, |
| 2363 | }; |
| 2364 | |
| 2365 | struct platform_device msm_voip = { |
| 2366 | .name = "msm-voip-dsp", |
| 2367 | .id = -1, |
| 2368 | }; |
| 2369 | |
| 2370 | struct platform_device msm_lpa_pcm = { |
| 2371 | .name = "msm-pcm-lpa", |
| 2372 | .id = -1, |
| 2373 | }; |
| 2374 | |
Asish Bhattacharya | 96bb6f4 | 2011-11-01 20:36:09 +0530 | [diff] [blame] | 2375 | struct platform_device msm_compr_dsp = { |
| 2376 | .name = "msm-compr-dsp", |
| 2377 | .id = -1, |
| 2378 | }; |
| 2379 | |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 2380 | struct platform_device msm_pcm_hostless = { |
| 2381 | .name = "msm-pcm-hostless", |
| 2382 | .id = -1, |
| 2383 | }; |
| 2384 | |
Laxminath Kasam | cee1d60 | 2011-08-01 19:26:57 +0530 | [diff] [blame] | 2385 | struct platform_device msm_cpudai_afe_01_rx = { |
| 2386 | .name = "msm-dai-q6", |
| 2387 | .id = 0xE0, |
| 2388 | }; |
| 2389 | |
| 2390 | struct platform_device msm_cpudai_afe_01_tx = { |
| 2391 | .name = "msm-dai-q6", |
| 2392 | .id = 0xF0, |
| 2393 | }; |
| 2394 | |
| 2395 | struct platform_device msm_cpudai_afe_02_rx = { |
| 2396 | .name = "msm-dai-q6", |
| 2397 | .id = 0xF1, |
| 2398 | }; |
| 2399 | |
| 2400 | struct platform_device msm_cpudai_afe_02_tx = { |
| 2401 | .name = "msm-dai-q6", |
| 2402 | .id = 0xE1, |
| 2403 | }; |
| 2404 | |
| 2405 | struct platform_device msm_pcm_afe = { |
| 2406 | .name = "msm-pcm-afe", |
| 2407 | .id = -1, |
| 2408 | }; |
| 2409 | |
Matt Wagantall | 1f65d9d | 2012-04-25 14:24:20 -0700 | [diff] [blame] | 2410 | static struct fs_driver_data gfx2d0_fs_data = { |
| 2411 | .clks = (struct fs_clk_data[]){ |
| 2412 | { .name = "core_clk" }, |
| 2413 | { .name = "iface_clk" }, |
| 2414 | { 0 } |
| 2415 | }, |
| 2416 | .bus_port0 = MSM_BUS_MASTER_GRAPHICS_2D_CORE0, |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 2417 | }; |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 2418 | |
Matt Wagantall | 1f65d9d | 2012-04-25 14:24:20 -0700 | [diff] [blame] | 2419 | static struct fs_driver_data gfx2d1_fs_data = { |
| 2420 | .clks = (struct fs_clk_data[]){ |
| 2421 | { .name = "core_clk" }, |
| 2422 | { .name = "iface_clk" }, |
| 2423 | { 0 } |
| 2424 | }, |
| 2425 | .bus_port0 = MSM_BUS_MASTER_GRAPHICS_2D_CORE1, |
| 2426 | }; |
| 2427 | |
| 2428 | static struct fs_driver_data gfx3d_fs_data = { |
| 2429 | .clks = (struct fs_clk_data[]){ |
| 2430 | { .name = "core_clk", .reset_rate = 27000000 }, |
| 2431 | { .name = "iface_clk" }, |
| 2432 | { 0 } |
| 2433 | }, |
| 2434 | .bus_port0 = MSM_BUS_MASTER_GRAPHICS_3D, |
| 2435 | }; |
| 2436 | |
| 2437 | static struct fs_driver_data ijpeg_fs_data = { |
| 2438 | .clks = (struct fs_clk_data[]){ |
| 2439 | { .name = "core_clk" }, |
| 2440 | { .name = "iface_clk" }, |
| 2441 | { .name = "bus_clk" }, |
| 2442 | { 0 } |
| 2443 | }, |
| 2444 | .bus_port0 = MSM_BUS_MASTER_JPEG_ENC, |
| 2445 | }; |
| 2446 | |
| 2447 | static struct fs_driver_data mdp_fs_data = { |
| 2448 | .clks = (struct fs_clk_data[]){ |
| 2449 | { .name = "core_clk" }, |
| 2450 | { .name = "iface_clk" }, |
| 2451 | { .name = "bus_clk" }, |
| 2452 | { .name = "vsync_clk" }, |
| 2453 | { .name = "lut_clk" }, |
| 2454 | { .name = "tv_src_clk" }, |
| 2455 | { .name = "tv_clk" }, |
Matt Wagantall | c33c1ed | 2012-07-23 17:19:08 -0700 | [diff] [blame] | 2456 | { .name = "reset1_clk" }, |
| 2457 | { .name = "reset2_clk" }, |
Matt Wagantall | 1f65d9d | 2012-04-25 14:24:20 -0700 | [diff] [blame] | 2458 | { 0 } |
| 2459 | }, |
| 2460 | .bus_port0 = MSM_BUS_MASTER_MDP_PORT0, |
| 2461 | .bus_port1 = MSM_BUS_MASTER_MDP_PORT1, |
| 2462 | }; |
| 2463 | |
| 2464 | static struct fs_driver_data rot_fs_data = { |
| 2465 | .clks = (struct fs_clk_data[]){ |
| 2466 | { .name = "core_clk" }, |
| 2467 | { .name = "iface_clk" }, |
| 2468 | { .name = "bus_clk" }, |
| 2469 | { 0 } |
| 2470 | }, |
| 2471 | .bus_port0 = MSM_BUS_MASTER_ROTATOR, |
| 2472 | }; |
| 2473 | |
| 2474 | static struct fs_driver_data ved_fs_data = { |
| 2475 | .clks = (struct fs_clk_data[]){ |
| 2476 | { .name = "core_clk" }, |
| 2477 | { .name = "iface_clk" }, |
| 2478 | { .name = "bus_clk" }, |
| 2479 | { 0 } |
| 2480 | }, |
| 2481 | .bus_port0 = MSM_BUS_MASTER_HD_CODEC_PORT0, |
| 2482 | .bus_port1 = MSM_BUS_MASTER_HD_CODEC_PORT1, |
| 2483 | }; |
| 2484 | |
| 2485 | static struct fs_driver_data vfe_fs_data = { |
| 2486 | .clks = (struct fs_clk_data[]){ |
| 2487 | { .name = "core_clk" }, |
| 2488 | { .name = "iface_clk" }, |
| 2489 | { .name = "bus_clk" }, |
| 2490 | { 0 } |
| 2491 | }, |
| 2492 | .bus_port0 = MSM_BUS_MASTER_VFE, |
| 2493 | }; |
| 2494 | |
| 2495 | static struct fs_driver_data vpe_fs_data = { |
| 2496 | .clks = (struct fs_clk_data[]){ |
| 2497 | { .name = "core_clk" }, |
| 2498 | { .name = "iface_clk" }, |
| 2499 | { .name = "bus_clk" }, |
| 2500 | { 0 } |
| 2501 | }, |
| 2502 | .bus_port0 = MSM_BUS_MASTER_VPE, |
| 2503 | }; |
| 2504 | |
| 2505 | struct platform_device *msm8960_footswitch[] __initdata = { |
Matt Wagantall | d4aab1e | 2012-05-03 20:26:56 -0700 | [diff] [blame] | 2506 | FS_8X60(FS_MDP, "vdd", "mdp.0", &mdp_fs_data), |
Matt Wagantall | 316f2fc | 2012-05-03 20:41:42 -0700 | [diff] [blame] | 2507 | FS_8X60(FS_ROT, "vdd", "msm_rotator.0", &rot_fs_data), |
Matt Wagantall | e4454b8 | 2012-05-03 20:48:01 -0700 | [diff] [blame] | 2508 | FS_8X60(FS_IJPEG, "vdd", "msm_gemini.0", &ijpeg_fs_data), |
Kiran Kumar H N | fa18a03 | 2012-06-25 14:34:18 -0700 | [diff] [blame] | 2509 | FS_8X60(FS_VFE, "vdd", "msm_vfe.0", &vfe_fs_data), |
| 2510 | FS_8X60(FS_VPE, "vdd", "msm_vpe.0", &vpe_fs_data), |
Matt Wagantall | d6fbf23 | 2012-05-03 20:09:28 -0700 | [diff] [blame] | 2511 | FS_8X60(FS_GFX3D, "vdd", "kgsl-3d0.0", &gfx3d_fs_data), |
| 2512 | FS_8X60(FS_GFX2D0, "vdd", "kgsl-2d0.0", &gfx2d0_fs_data), |
| 2513 | FS_8X60(FS_GFX2D1, "vdd", "kgsl-2d1.1", &gfx2d1_fs_data), |
Matt Wagantall | 5e46aac | 2012-05-03 20:20:18 -0700 | [diff] [blame] | 2514 | FS_8X60(FS_VED, "vdd", "msm_vidc.0", &ved_fs_data), |
Matt Wagantall | 1f65d9d | 2012-04-25 14:24:20 -0700 | [diff] [blame] | 2515 | }; |
| 2516 | unsigned msm8960_num_footswitch __initdata = ARRAY_SIZE(msm8960_footswitch); |
Ravishangar Kalyanam | 319a83c | 2012-03-21 18:38:05 -0700 | [diff] [blame] | 2517 | |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 2518 | #ifdef CONFIG_MSM_ROTATOR |
Ravishangar Kalyanam | 319a83c | 2012-03-21 18:38:05 -0700 | [diff] [blame] | 2519 | static struct msm_bus_vectors rotator_init_vectors[] = { |
| 2520 | { |
| 2521 | .src = MSM_BUS_MASTER_ROTATOR, |
| 2522 | .dst = MSM_BUS_SLAVE_EBI_CH0, |
| 2523 | .ab = 0, |
| 2524 | .ib = 0, |
| 2525 | }, |
| 2526 | }; |
| 2527 | |
| 2528 | static struct msm_bus_vectors rotator_ui_vectors[] = { |
| 2529 | { |
| 2530 | .src = MSM_BUS_MASTER_ROTATOR, |
| 2531 | .dst = MSM_BUS_SLAVE_EBI_CH0, |
| 2532 | .ab = (1024 * 600 * 4 * 2 * 60), |
| 2533 | .ib = (1024 * 600 * 4 * 2 * 60 * 1.5), |
| 2534 | }, |
| 2535 | }; |
| 2536 | |
| 2537 | static struct msm_bus_vectors rotator_vga_vectors[] = { |
| 2538 | { |
| 2539 | .src = MSM_BUS_MASTER_ROTATOR, |
| 2540 | .dst = MSM_BUS_SLAVE_EBI_CH0, |
| 2541 | .ab = (640 * 480 * 2 * 2 * 30), |
| 2542 | .ib = (640 * 480 * 2 * 2 * 30 * 1.5), |
| 2543 | }, |
| 2544 | }; |
| 2545 | static struct msm_bus_vectors rotator_720p_vectors[] = { |
| 2546 | { |
| 2547 | .src = MSM_BUS_MASTER_ROTATOR, |
| 2548 | .dst = MSM_BUS_SLAVE_EBI_CH0, |
| 2549 | .ab = (1280 * 736 * 2 * 2 * 30), |
| 2550 | .ib = (1280 * 736 * 2 * 2 * 30 * 1.5), |
| 2551 | }, |
| 2552 | }; |
| 2553 | |
| 2554 | static struct msm_bus_vectors rotator_1080p_vectors[] = { |
| 2555 | { |
| 2556 | .src = MSM_BUS_MASTER_ROTATOR, |
| 2557 | .dst = MSM_BUS_SLAVE_EBI_CH0, |
| 2558 | .ab = (1920 * 1088 * 2 * 2 * 30), |
| 2559 | .ib = (1920 * 1088 * 2 * 2 * 30 * 1.5), |
| 2560 | }, |
| 2561 | }; |
| 2562 | |
| 2563 | static struct msm_bus_paths rotator_bus_scale_usecases[] = { |
| 2564 | { |
| 2565 | ARRAY_SIZE(rotator_init_vectors), |
| 2566 | rotator_init_vectors, |
| 2567 | }, |
| 2568 | { |
| 2569 | ARRAY_SIZE(rotator_ui_vectors), |
| 2570 | rotator_ui_vectors, |
| 2571 | }, |
| 2572 | { |
| 2573 | ARRAY_SIZE(rotator_vga_vectors), |
| 2574 | rotator_vga_vectors, |
| 2575 | }, |
| 2576 | { |
| 2577 | ARRAY_SIZE(rotator_720p_vectors), |
| 2578 | rotator_720p_vectors, |
| 2579 | }, |
| 2580 | { |
| 2581 | ARRAY_SIZE(rotator_1080p_vectors), |
| 2582 | rotator_1080p_vectors, |
| 2583 | }, |
| 2584 | }; |
| 2585 | |
| 2586 | struct msm_bus_scale_pdata rotator_bus_scale_pdata = { |
| 2587 | rotator_bus_scale_usecases, |
| 2588 | ARRAY_SIZE(rotator_bus_scale_usecases), |
| 2589 | .name = "rotator", |
| 2590 | }; |
| 2591 | |
| 2592 | void __init msm_rotator_update_bus_vectors(unsigned int xres, |
| 2593 | unsigned int yres) |
| 2594 | { |
| 2595 | rotator_ui_vectors[0].ab = xres * yres * 4 * 2 * 60; |
| 2596 | rotator_ui_vectors[0].ib = xres * yres * 4 * 2 * 60 * 3 / 2; |
| 2597 | } |
| 2598 | |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 2599 | #define ROTATOR_HW_BASE 0x04E00000 |
| 2600 | static struct resource resources_msm_rotator[] = { |
| 2601 | { |
| 2602 | .start = ROTATOR_HW_BASE, |
| 2603 | .end = ROTATOR_HW_BASE + 0x100000 - 1, |
| 2604 | .flags = IORESOURCE_MEM, |
| 2605 | }, |
| 2606 | { |
| 2607 | .start = ROT_IRQ, |
| 2608 | .end = ROT_IRQ, |
| 2609 | .flags = IORESOURCE_IRQ, |
| 2610 | }, |
| 2611 | }; |
| 2612 | |
| 2613 | static struct msm_rot_clocks rotator_clocks[] = { |
| 2614 | { |
Matt Wagantall | bb90da9 | 2011-10-25 15:07:52 -0700 | [diff] [blame] | 2615 | .clk_name = "core_clk", |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 2616 | .clk_type = ROTATOR_CORE_CLK, |
Nagamalleswararao Ganji | 0bb10734 | 2011-10-10 20:55:32 -0700 | [diff] [blame] | 2617 | .clk_rate = 200 * 1000 * 1000, |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 2618 | }, |
| 2619 | { |
Matt Wagantall | bb90da9 | 2011-10-25 15:07:52 -0700 | [diff] [blame] | 2620 | .clk_name = "iface_clk", |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 2621 | .clk_type = ROTATOR_PCLK, |
| 2622 | .clk_rate = 0, |
| 2623 | }, |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 2624 | }; |
| 2625 | |
| 2626 | static struct msm_rotator_platform_data rotator_pdata = { |
| 2627 | .number_of_clocks = ARRAY_SIZE(rotator_clocks), |
| 2628 | .hardware_version_number = 0x01020309, |
| 2629 | .rotator_clks = rotator_clocks, |
Nagamalleswararao Ganji | 5fabbd6 | 2011-11-06 23:10:43 -0800 | [diff] [blame] | 2630 | #ifdef CONFIG_MSM_BUS_SCALING |
| 2631 | .bus_scale_table = &rotator_bus_scale_pdata, |
| 2632 | #endif |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 2633 | }; |
| 2634 | |
| 2635 | struct platform_device msm_rotator_device = { |
| 2636 | .name = "msm_rotator", |
| 2637 | .id = 0, |
| 2638 | .num_resources = ARRAY_SIZE(resources_msm_rotator), |
| 2639 | .resource = resources_msm_rotator, |
| 2640 | .dev = { |
| 2641 | .platform_data = &rotator_pdata, |
| 2642 | }, |
| 2643 | }; |
Olav Haugan | ef95ae3 | 2012-05-15 09:50:30 -0700 | [diff] [blame] | 2644 | |
| 2645 | void __init msm_rotator_set_split_iommu_domain(void) |
| 2646 | { |
| 2647 | rotator_pdata.rot_iommu_split_domain = 1; |
| 2648 | } |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 2649 | #endif |
| 2650 | |
| 2651 | #define MIPI_DSI_HW_BASE 0x04700000 |
| 2652 | #define MDP_HW_BASE 0x05100000 |
| 2653 | |
| 2654 | static struct resource msm_mipi_dsi1_resources[] = { |
| 2655 | { |
| 2656 | .name = "mipi_dsi", |
| 2657 | .start = MIPI_DSI_HW_BASE, |
kuogee hsieh | f12acf5 | 2011-09-06 10:49:43 -0700 | [diff] [blame] | 2658 | .end = MIPI_DSI_HW_BASE + 0x000F0000 - 1, |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 2659 | .flags = IORESOURCE_MEM, |
| 2660 | }, |
| 2661 | { |
| 2662 | .start = DSI1_IRQ, |
| 2663 | .end = DSI1_IRQ, |
| 2664 | .flags = IORESOURCE_IRQ, |
| 2665 | }, |
| 2666 | }; |
| 2667 | |
| 2668 | struct platform_device msm_mipi_dsi1_device = { |
| 2669 | .name = "mipi_dsi", |
| 2670 | .id = 1, |
| 2671 | .num_resources = ARRAY_SIZE(msm_mipi_dsi1_resources), |
| 2672 | .resource = msm_mipi_dsi1_resources, |
| 2673 | }; |
| 2674 | |
| 2675 | static struct resource msm_mdp_resources[] = { |
| 2676 | { |
| 2677 | .name = "mdp", |
| 2678 | .start = MDP_HW_BASE, |
kuogee hsieh | f12acf5 | 2011-09-06 10:49:43 -0700 | [diff] [blame] | 2679 | .end = MDP_HW_BASE + 0x000F0000 - 1, |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 2680 | .flags = IORESOURCE_MEM, |
| 2681 | }, |
| 2682 | { |
| 2683 | .start = MDP_IRQ, |
| 2684 | .end = MDP_IRQ, |
| 2685 | .flags = IORESOURCE_IRQ, |
| 2686 | }, |
| 2687 | }; |
| 2688 | |
| 2689 | static struct platform_device msm_mdp_device = { |
| 2690 | .name = "mdp", |
| 2691 | .id = 0, |
| 2692 | .num_resources = ARRAY_SIZE(msm_mdp_resources), |
| 2693 | .resource = msm_mdp_resources, |
| 2694 | }; |
| 2695 | |
| 2696 | static void __init msm_register_device(struct platform_device *pdev, void *data) |
| 2697 | { |
| 2698 | int ret; |
| 2699 | |
| 2700 | pdev->dev.platform_data = data; |
| 2701 | ret = platform_device_register(pdev); |
| 2702 | if (ret) |
| 2703 | dev_err(&pdev->dev, |
| 2704 | "%s: platform_device_register() failed = %d\n", |
| 2705 | __func__, ret); |
| 2706 | } |
| 2707 | |
Ravishangar Kalyanam | 882930f | 2011-07-08 17:51:52 -0700 | [diff] [blame] | 2708 | #ifdef CONFIG_MSM_BUS_SCALING |
| 2709 | static struct platform_device msm_dtv_device = { |
| 2710 | .name = "dtv", |
| 2711 | .id = 0, |
| 2712 | }; |
| 2713 | #endif |
| 2714 | |
Ravishangar Kalyanam | c2fee31 | 2012-02-09 19:11:22 -0800 | [diff] [blame] | 2715 | struct platform_device msm_lvds_device = { |
Huaibin Yang | 4a084e3 | 2011-12-15 15:25:52 -0800 | [diff] [blame] | 2716 | .name = "lvds", |
| 2717 | .id = 0, |
| 2718 | }; |
| 2719 | |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 2720 | void __init msm_fb_register_device(char *name, void *data) |
| 2721 | { |
| 2722 | if (!strncmp(name, "mdp", 3)) |
| 2723 | msm_register_device(&msm_mdp_device, data); |
| 2724 | else if (!strncmp(name, "mipi_dsi", 8)) |
| 2725 | msm_register_device(&msm_mipi_dsi1_device, data); |
Huaibin Yang | 4a084e3 | 2011-12-15 15:25:52 -0800 | [diff] [blame] | 2726 | else if (!strncmp(name, "lvds", 4)) |
| 2727 | msm_register_device(&msm_lvds_device, data); |
Ravishangar Kalyanam | 882930f | 2011-07-08 17:51:52 -0700 | [diff] [blame] | 2728 | #ifdef CONFIG_MSM_BUS_SCALING |
| 2729 | else if (!strncmp(name, "dtv", 3)) |
| 2730 | msm_register_device(&msm_dtv_device, data); |
| 2731 | #endif |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 2732 | else |
| 2733 | printk(KERN_ERR "%s: unknown device! %s\n", __func__, name); |
| 2734 | } |
| 2735 | |
| 2736 | static struct resource resources_sps[] = { |
| 2737 | { |
| 2738 | .name = "pipe_mem", |
| 2739 | .start = 0x12800000, |
| 2740 | .end = 0x12800000 + 0x4000 - 1, |
| 2741 | .flags = IORESOURCE_MEM, |
| 2742 | }, |
| 2743 | { |
| 2744 | .name = "bamdma_dma", |
| 2745 | .start = 0x12240000, |
| 2746 | .end = 0x12240000 + 0x1000 - 1, |
| 2747 | .flags = IORESOURCE_MEM, |
| 2748 | }, |
| 2749 | { |
| 2750 | .name = "bamdma_bam", |
| 2751 | .start = 0x12244000, |
| 2752 | .end = 0x12244000 + 0x4000 - 1, |
| 2753 | .flags = IORESOURCE_MEM, |
| 2754 | }, |
| 2755 | { |
| 2756 | .name = "bamdma_irq", |
| 2757 | .start = SPS_BAM_DMA_IRQ, |
| 2758 | .end = SPS_BAM_DMA_IRQ, |
| 2759 | .flags = IORESOURCE_IRQ, |
| 2760 | }, |
| 2761 | }; |
| 2762 | |
| 2763 | struct msm_sps_platform_data msm_sps_pdata = { |
| 2764 | .bamdma_restricted_pipes = 0x06, |
| 2765 | }; |
| 2766 | |
| 2767 | struct platform_device msm_device_sps = { |
| 2768 | .name = "msm_sps", |
| 2769 | .id = -1, |
| 2770 | .num_resources = ARRAY_SIZE(resources_sps), |
| 2771 | .resource = resources_sps, |
| 2772 | .dev.platform_data = &msm_sps_pdata, |
| 2773 | }; |
| 2774 | |
| 2775 | #ifdef CONFIG_MSM_MPM |
Praveen Chidambaram | 7849901 | 2011-11-01 17:15:17 -0600 | [diff] [blame] | 2776 | static uint16_t msm_mpm_irqs_m2a[MSM_MPM_NR_MPM_IRQS] __initdata = { |
Praveen Chidambaram | b3d857c | 2011-05-31 16:28:07 -0600 | [diff] [blame] | 2777 | [1] = MSM_GPIO_TO_INT(46), |
| 2778 | [2] = MSM_GPIO_TO_INT(150), |
| 2779 | [4] = MSM_GPIO_TO_INT(103), |
| 2780 | [5] = MSM_GPIO_TO_INT(104), |
| 2781 | [6] = MSM_GPIO_TO_INT(105), |
| 2782 | [7] = MSM_GPIO_TO_INT(106), |
| 2783 | [8] = MSM_GPIO_TO_INT(107), |
| 2784 | [9] = MSM_GPIO_TO_INT(7), |
| 2785 | [10] = MSM_GPIO_TO_INT(11), |
| 2786 | [11] = MSM_GPIO_TO_INT(15), |
| 2787 | [12] = MSM_GPIO_TO_INT(19), |
| 2788 | [13] = MSM_GPIO_TO_INT(23), |
| 2789 | [14] = MSM_GPIO_TO_INT(27), |
| 2790 | [15] = MSM_GPIO_TO_INT(31), |
| 2791 | [16] = MSM_GPIO_TO_INT(35), |
| 2792 | [19] = MSM_GPIO_TO_INT(90), |
| 2793 | [20] = MSM_GPIO_TO_INT(92), |
| 2794 | [23] = MSM_GPIO_TO_INT(85), |
| 2795 | [24] = MSM_GPIO_TO_INT(83), |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 2796 | [25] = USB1_HS_IRQ, |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 2797 | [27] = HDMI_IRQ, |
Praveen Chidambaram | b3d857c | 2011-05-31 16:28:07 -0600 | [diff] [blame] | 2798 | [29] = MSM_GPIO_TO_INT(10), |
| 2799 | [30] = MSM_GPIO_TO_INT(102), |
| 2800 | [31] = MSM_GPIO_TO_INT(81), |
| 2801 | [32] = MSM_GPIO_TO_INT(78), |
| 2802 | [33] = MSM_GPIO_TO_INT(94), |
| 2803 | [34] = MSM_GPIO_TO_INT(72), |
| 2804 | [35] = MSM_GPIO_TO_INT(39), |
| 2805 | [36] = MSM_GPIO_TO_INT(43), |
| 2806 | [37] = MSM_GPIO_TO_INT(61), |
| 2807 | [38] = MSM_GPIO_TO_INT(50), |
| 2808 | [39] = MSM_GPIO_TO_INT(42), |
| 2809 | [41] = MSM_GPIO_TO_INT(62), |
| 2810 | [42] = MSM_GPIO_TO_INT(76), |
| 2811 | [43] = MSM_GPIO_TO_INT(75), |
| 2812 | [44] = MSM_GPIO_TO_INT(70), |
| 2813 | [45] = MSM_GPIO_TO_INT(69), |
| 2814 | [46] = MSM_GPIO_TO_INT(67), |
| 2815 | [47] = MSM_GPIO_TO_INT(65), |
| 2816 | [48] = MSM_GPIO_TO_INT(58), |
| 2817 | [49] = MSM_GPIO_TO_INT(54), |
| 2818 | [50] = MSM_GPIO_TO_INT(52), |
| 2819 | [51] = MSM_GPIO_TO_INT(49), |
| 2820 | [52] = MSM_GPIO_TO_INT(40), |
| 2821 | [53] = MSM_GPIO_TO_INT(37), |
| 2822 | [54] = MSM_GPIO_TO_INT(24), |
| 2823 | [55] = MSM_GPIO_TO_INT(14), |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 2824 | }; |
| 2825 | |
Praveen Chidambaram | 7849901 | 2011-11-01 17:15:17 -0600 | [diff] [blame] | 2826 | static uint16_t msm_mpm_bypassed_apps_irqs[] __initdata = { |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 2827 | TLMM_MSM_SUMMARY_IRQ, |
| 2828 | RPM_APCC_CPU0_GP_HIGH_IRQ, |
| 2829 | RPM_APCC_CPU0_GP_MEDIUM_IRQ, |
| 2830 | RPM_APCC_CPU0_GP_LOW_IRQ, |
| 2831 | RPM_APCC_CPU0_WAKE_UP_IRQ, |
| 2832 | RPM_APCC_CPU1_GP_HIGH_IRQ, |
| 2833 | RPM_APCC_CPU1_GP_MEDIUM_IRQ, |
| 2834 | RPM_APCC_CPU1_GP_LOW_IRQ, |
| 2835 | RPM_APCC_CPU1_WAKE_UP_IRQ, |
| 2836 | MSS_TO_APPS_IRQ_0, |
| 2837 | MSS_TO_APPS_IRQ_1, |
| 2838 | MSS_TO_APPS_IRQ_2, |
| 2839 | MSS_TO_APPS_IRQ_3, |
| 2840 | MSS_TO_APPS_IRQ_4, |
| 2841 | MSS_TO_APPS_IRQ_5, |
| 2842 | MSS_TO_APPS_IRQ_6, |
| 2843 | MSS_TO_APPS_IRQ_7, |
| 2844 | MSS_TO_APPS_IRQ_8, |
| 2845 | MSS_TO_APPS_IRQ_9, |
| 2846 | LPASS_SCSS_GP_LOW_IRQ, |
| 2847 | LPASS_SCSS_GP_MEDIUM_IRQ, |
| 2848 | LPASS_SCSS_GP_HIGH_IRQ, |
David Collins | 5e2b2fd | 2011-09-08 15:23:30 -0700 | [diff] [blame] | 2849 | SPS_MTI_30, |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 2850 | SPS_MTI_31, |
David Collins | 5e2b2fd | 2011-09-08 15:23:30 -0700 | [diff] [blame] | 2851 | RIVA_APSS_SPARE_IRQ, |
David Collins | 84ecd0a | 2011-09-27 21:11:11 -0700 | [diff] [blame] | 2852 | RIVA_APPS_WLAN_SMSM_IRQ, |
| 2853 | RIVA_APPS_WLAN_RX_DATA_AVAIL_IRQ, |
| 2854 | RIVA_APPS_WLAN_DATA_XFER_DONE_IRQ, |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 2855 | }; |
| 2856 | |
Praveen Chidambaram | 7849901 | 2011-11-01 17:15:17 -0600 | [diff] [blame] | 2857 | struct msm_mpm_device_data msm8960_mpm_dev_data __initdata = { |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 2858 | .irqs_m2a = msm_mpm_irqs_m2a, |
| 2859 | .irqs_m2a_size = ARRAY_SIZE(msm_mpm_irqs_m2a), |
| 2860 | .bypassed_apps_irqs = msm_mpm_bypassed_apps_irqs, |
| 2861 | .bypassed_apps_irqs_size = ARRAY_SIZE(msm_mpm_bypassed_apps_irqs), |
| 2862 | .mpm_request_reg_base = MSM_RPM_BASE + 0x9d8, |
| 2863 | .mpm_status_reg_base = MSM_RPM_BASE + 0xdf8, |
| 2864 | .mpm_apps_ipc_reg = MSM_APCS_GCC_BASE + 0x008, |
| 2865 | .mpm_apps_ipc_val = BIT(1), |
| 2866 | .mpm_ipc_irq = RPM_APCC_CPU0_GP_MEDIUM_IRQ, |
| 2867 | |
| 2868 | }; |
| 2869 | #endif |
| 2870 | |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 2871 | #define LPASS_SLIMBUS_PHYS 0x28080000 |
| 2872 | #define LPASS_SLIMBUS_BAM_PHYS 0x28084000 |
Sagar Dharia | cc96945 | 2011-09-19 10:34:30 -0600 | [diff] [blame] | 2873 | #define LPASS_SLIMBUS_SLEW (MSM8960_TLMM_PHYS + 0x207C) |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 2874 | /* Board info for the slimbus slave device */ |
| 2875 | static struct resource slimbus_res[] = { |
| 2876 | { |
| 2877 | .start = LPASS_SLIMBUS_PHYS, |
| 2878 | .end = LPASS_SLIMBUS_PHYS + 8191, |
| 2879 | .flags = IORESOURCE_MEM, |
| 2880 | .name = "slimbus_physical", |
| 2881 | }, |
| 2882 | { |
| 2883 | .start = LPASS_SLIMBUS_BAM_PHYS, |
| 2884 | .end = LPASS_SLIMBUS_BAM_PHYS + 8191, |
| 2885 | .flags = IORESOURCE_MEM, |
| 2886 | .name = "slimbus_bam_physical", |
| 2887 | }, |
| 2888 | { |
Sagar Dharia | cc96945 | 2011-09-19 10:34:30 -0600 | [diff] [blame] | 2889 | .start = LPASS_SLIMBUS_SLEW, |
| 2890 | .end = LPASS_SLIMBUS_SLEW + 4 - 1, |
| 2891 | .flags = IORESOURCE_MEM, |
| 2892 | .name = "slimbus_slew_reg", |
| 2893 | }, |
| 2894 | { |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 2895 | .start = SLIMBUS0_CORE_EE1_IRQ, |
| 2896 | .end = SLIMBUS0_CORE_EE1_IRQ, |
| 2897 | .flags = IORESOURCE_IRQ, |
| 2898 | .name = "slimbus_irq", |
| 2899 | }, |
| 2900 | { |
| 2901 | .start = SLIMBUS0_BAM_EE1_IRQ, |
| 2902 | .end = SLIMBUS0_BAM_EE1_IRQ, |
| 2903 | .flags = IORESOURCE_IRQ, |
| 2904 | .name = "slimbus_bam_irq", |
| 2905 | }, |
| 2906 | }; |
| 2907 | |
| 2908 | struct platform_device msm_slim_ctrl = { |
| 2909 | .name = "msm_slim_ctrl", |
| 2910 | .id = 1, |
| 2911 | .num_resources = ARRAY_SIZE(slimbus_res), |
| 2912 | .resource = slimbus_res, |
| 2913 | .dev = { |
| 2914 | .coherent_dma_mask = 0xffffffffULL, |
| 2915 | }, |
| 2916 | }; |
| 2917 | |
Lucille Sylvester | 6e36241 | 2011-12-09 16:21:42 -0700 | [diff] [blame] | 2918 | static struct msm_dcvs_freq_entry grp3d_freq[] = { |
| 2919 | {0, 0, 333932}, |
| 2920 | {0, 0, 497532}, |
| 2921 | {0, 0, 707610}, |
| 2922 | {0, 0, 844545}, |
| 2923 | }; |
| 2924 | |
| 2925 | static struct msm_dcvs_freq_entry grp2d_freq[] = { |
| 2926 | {0, 0, 86000}, |
| 2927 | {0, 0, 200000}, |
| 2928 | }; |
| 2929 | |
| 2930 | static struct msm_dcvs_core_info grp3d_core_info = { |
| 2931 | .freq_tbl = &grp3d_freq[0], |
| 2932 | .core_param = { |
| 2933 | .max_time_us = 100000, |
| 2934 | .num_freq = ARRAY_SIZE(grp3d_freq), |
| 2935 | }, |
| 2936 | .algo_param = { |
| 2937 | .slack_time_us = 39000, |
| 2938 | .disable_pc_threshold = 86000, |
| 2939 | .ss_window_size = 1000000, |
| 2940 | .ss_util_pct = 95, |
| 2941 | .em_max_util_pct = 97, |
| 2942 | .ss_iobusy_conv = 100, |
| 2943 | }, |
| 2944 | }; |
| 2945 | |
| 2946 | static struct msm_dcvs_core_info grp2d_core_info = { |
| 2947 | .freq_tbl = &grp2d_freq[0], |
| 2948 | .core_param = { |
| 2949 | .max_time_us = 100000, |
| 2950 | .num_freq = ARRAY_SIZE(grp2d_freq), |
| 2951 | }, |
| 2952 | .algo_param = { |
| 2953 | .slack_time_us = 39000, |
| 2954 | .disable_pc_threshold = 90000, |
| 2955 | .ss_window_size = 1000000, |
| 2956 | .ss_util_pct = 90, |
| 2957 | .em_max_util_pct = 95, |
| 2958 | }, |
| 2959 | }; |
| 2960 | |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 2961 | #ifdef CONFIG_MSM_BUS_SCALING |
| 2962 | static struct msm_bus_vectors grp3d_init_vectors[] = { |
| 2963 | { |
| 2964 | .src = MSM_BUS_MASTER_GRAPHICS_3D, |
| 2965 | .dst = MSM_BUS_SLAVE_EBI_CH0, |
| 2966 | .ab = 0, |
| 2967 | .ib = 0, |
| 2968 | }, |
| 2969 | }; |
| 2970 | |
Lucille Sylvester | 34ec369 | 2011-08-16 16:28:04 -0600 | [diff] [blame] | 2971 | static struct msm_bus_vectors grp3d_low_vectors[] = { |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 2972 | { |
| 2973 | .src = MSM_BUS_MASTER_GRAPHICS_3D, |
| 2974 | .dst = MSM_BUS_SLAVE_EBI_CH0, |
| 2975 | .ab = 0, |
Lucille Sylvester | 3efebb5 | 2012-01-17 12:58:38 -0700 | [diff] [blame] | 2976 | .ib = KGSL_CONVERT_TO_MBPS(1000), |
Lucille Sylvester | 34ec369 | 2011-08-16 16:28:04 -0600 | [diff] [blame] | 2977 | }, |
| 2978 | }; |
| 2979 | |
| 2980 | static struct msm_bus_vectors grp3d_nominal_low_vectors[] = { |
| 2981 | { |
| 2982 | .src = MSM_BUS_MASTER_GRAPHICS_3D, |
| 2983 | .dst = MSM_BUS_SLAVE_EBI_CH0, |
| 2984 | .ab = 0, |
Suman Tatiraju | 0123d18 | 2011-09-30 14:59:06 -0700 | [diff] [blame] | 2985 | .ib = KGSL_CONVERT_TO_MBPS(2048), |
Lucille Sylvester | 34ec369 | 2011-08-16 16:28:04 -0600 | [diff] [blame] | 2986 | }, |
| 2987 | }; |
| 2988 | |
| 2989 | static struct msm_bus_vectors grp3d_nominal_high_vectors[] = { |
| 2990 | { |
| 2991 | .src = MSM_BUS_MASTER_GRAPHICS_3D, |
| 2992 | .dst = MSM_BUS_SLAVE_EBI_CH0, |
| 2993 | .ab = 0, |
Suman Tatiraju | 0123d18 | 2011-09-30 14:59:06 -0700 | [diff] [blame] | 2994 | .ib = KGSL_CONVERT_TO_MBPS(2656), |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 2995 | }, |
| 2996 | }; |
| 2997 | |
| 2998 | static struct msm_bus_vectors grp3d_max_vectors[] = { |
| 2999 | { |
| 3000 | .src = MSM_BUS_MASTER_GRAPHICS_3D, |
| 3001 | .dst = MSM_BUS_SLAVE_EBI_CH0, |
| 3002 | .ab = 0, |
Suman Tatiraju | 0123d18 | 2011-09-30 14:59:06 -0700 | [diff] [blame] | 3003 | .ib = KGSL_CONVERT_TO_MBPS(3968), |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 3004 | }, |
| 3005 | }; |
| 3006 | |
| 3007 | static struct msm_bus_paths grp3d_bus_scale_usecases[] = { |
| 3008 | { |
| 3009 | ARRAY_SIZE(grp3d_init_vectors), |
| 3010 | grp3d_init_vectors, |
| 3011 | }, |
| 3012 | { |
Lucille Sylvester | 34ec369 | 2011-08-16 16:28:04 -0600 | [diff] [blame] | 3013 | ARRAY_SIZE(grp3d_low_vectors), |
| 3014 | grp3d_low_vectors, |
| 3015 | }, |
| 3016 | { |
| 3017 | ARRAY_SIZE(grp3d_nominal_low_vectors), |
| 3018 | grp3d_nominal_low_vectors, |
| 3019 | }, |
| 3020 | { |
| 3021 | ARRAY_SIZE(grp3d_nominal_high_vectors), |
| 3022 | grp3d_nominal_high_vectors, |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 3023 | }, |
| 3024 | { |
| 3025 | ARRAY_SIZE(grp3d_max_vectors), |
| 3026 | grp3d_max_vectors, |
| 3027 | }, |
| 3028 | }; |
| 3029 | |
| 3030 | static struct msm_bus_scale_pdata grp3d_bus_scale_pdata = { |
| 3031 | grp3d_bus_scale_usecases, |
| 3032 | ARRAY_SIZE(grp3d_bus_scale_usecases), |
| 3033 | .name = "grp3d", |
| 3034 | }; |
| 3035 | |
| 3036 | static struct msm_bus_vectors grp2d0_init_vectors[] = { |
| 3037 | { |
| 3038 | .src = MSM_BUS_MASTER_GRAPHICS_2D_CORE0, |
| 3039 | .dst = MSM_BUS_SLAVE_EBI_CH0, |
| 3040 | .ab = 0, |
| 3041 | .ib = 0, |
| 3042 | }, |
| 3043 | }; |
| 3044 | |
Lucille Sylvester | 808eca2 | 2011-11-03 10:26:29 -0700 | [diff] [blame] | 3045 | static struct msm_bus_vectors grp2d0_nominal_vectors[] = { |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 3046 | { |
| 3047 | .src = MSM_BUS_MASTER_GRAPHICS_2D_CORE0, |
| 3048 | .dst = MSM_BUS_SLAVE_EBI_CH0, |
| 3049 | .ab = 0, |
Lucille Sylvester | 3efebb5 | 2012-01-17 12:58:38 -0700 | [diff] [blame] | 3050 | .ib = KGSL_CONVERT_TO_MBPS(1000), |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 3051 | }, |
| 3052 | }; |
| 3053 | |
Lucille Sylvester | 808eca2 | 2011-11-03 10:26:29 -0700 | [diff] [blame] | 3054 | static struct msm_bus_vectors grp2d0_max_vectors[] = { |
| 3055 | { |
| 3056 | .src = MSM_BUS_MASTER_GRAPHICS_2D_CORE0, |
| 3057 | .dst = MSM_BUS_SLAVE_EBI_CH0, |
| 3058 | .ab = 0, |
| 3059 | .ib = KGSL_CONVERT_TO_MBPS(2048), |
| 3060 | }, |
| 3061 | }; |
| 3062 | |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 3063 | static struct msm_bus_paths grp2d0_bus_scale_usecases[] = { |
| 3064 | { |
| 3065 | ARRAY_SIZE(grp2d0_init_vectors), |
| 3066 | grp2d0_init_vectors, |
| 3067 | }, |
| 3068 | { |
Lucille Sylvester | 808eca2 | 2011-11-03 10:26:29 -0700 | [diff] [blame] | 3069 | ARRAY_SIZE(grp2d0_nominal_vectors), |
| 3070 | grp2d0_nominal_vectors, |
| 3071 | }, |
| 3072 | { |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 3073 | ARRAY_SIZE(grp2d0_max_vectors), |
| 3074 | grp2d0_max_vectors, |
| 3075 | }, |
| 3076 | }; |
| 3077 | |
| 3078 | struct msm_bus_scale_pdata grp2d0_bus_scale_pdata = { |
| 3079 | grp2d0_bus_scale_usecases, |
| 3080 | ARRAY_SIZE(grp2d0_bus_scale_usecases), |
| 3081 | .name = "grp2d0", |
| 3082 | }; |
| 3083 | |
| 3084 | static struct msm_bus_vectors grp2d1_init_vectors[] = { |
| 3085 | { |
| 3086 | .src = MSM_BUS_MASTER_GRAPHICS_2D_CORE1, |
| 3087 | .dst = MSM_BUS_SLAVE_EBI_CH0, |
| 3088 | .ab = 0, |
| 3089 | .ib = 0, |
| 3090 | }, |
| 3091 | }; |
| 3092 | |
Lucille Sylvester | 808eca2 | 2011-11-03 10:26:29 -0700 | [diff] [blame] | 3093 | static struct msm_bus_vectors grp2d1_nominal_vectors[] = { |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 3094 | { |
| 3095 | .src = MSM_BUS_MASTER_GRAPHICS_2D_CORE1, |
| 3096 | .dst = MSM_BUS_SLAVE_EBI_CH0, |
| 3097 | .ab = 0, |
Lucille Sylvester | 3efebb5 | 2012-01-17 12:58:38 -0700 | [diff] [blame] | 3098 | .ib = KGSL_CONVERT_TO_MBPS(1000), |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 3099 | }, |
| 3100 | }; |
| 3101 | |
Lucille Sylvester | 808eca2 | 2011-11-03 10:26:29 -0700 | [diff] [blame] | 3102 | static struct msm_bus_vectors grp2d1_max_vectors[] = { |
| 3103 | { |
| 3104 | .src = MSM_BUS_MASTER_GRAPHICS_2D_CORE1, |
| 3105 | .dst = MSM_BUS_SLAVE_EBI_CH0, |
| 3106 | .ab = 0, |
| 3107 | .ib = KGSL_CONVERT_TO_MBPS(2048), |
| 3108 | }, |
| 3109 | }; |
| 3110 | |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 3111 | static struct msm_bus_paths grp2d1_bus_scale_usecases[] = { |
| 3112 | { |
| 3113 | ARRAY_SIZE(grp2d1_init_vectors), |
| 3114 | grp2d1_init_vectors, |
| 3115 | }, |
| 3116 | { |
Lucille Sylvester | 808eca2 | 2011-11-03 10:26:29 -0700 | [diff] [blame] | 3117 | ARRAY_SIZE(grp2d1_nominal_vectors), |
| 3118 | grp2d1_nominal_vectors, |
| 3119 | }, |
| 3120 | { |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 3121 | ARRAY_SIZE(grp2d1_max_vectors), |
| 3122 | grp2d1_max_vectors, |
| 3123 | }, |
| 3124 | }; |
| 3125 | |
| 3126 | struct msm_bus_scale_pdata grp2d1_bus_scale_pdata = { |
| 3127 | grp2d1_bus_scale_usecases, |
| 3128 | ARRAY_SIZE(grp2d1_bus_scale_usecases), |
| 3129 | .name = "grp2d1", |
| 3130 | }; |
| 3131 | #endif |
| 3132 | |
| 3133 | static struct resource kgsl_3d0_resources[] = { |
| 3134 | { |
| 3135 | .name = KGSL_3D0_REG_MEMORY, |
| 3136 | .start = 0x04300000, /* GFX3D address */ |
| 3137 | .end = 0x0431ffff, |
| 3138 | .flags = IORESOURCE_MEM, |
| 3139 | }, |
| 3140 | { |
| 3141 | .name = KGSL_3D0_IRQ, |
| 3142 | .start = GFX3D_IRQ, |
| 3143 | .end = GFX3D_IRQ, |
| 3144 | .flags = IORESOURCE_IRQ, |
| 3145 | }, |
| 3146 | }; |
| 3147 | |
Shubhraprakash Das | eb6df1d | 2012-05-01 00:55:35 -0600 | [diff] [blame] | 3148 | static const struct kgsl_iommu_ctx kgsl_3d0_iommu_ctxs[] = { |
| 3149 | { "gfx3d_user", 0 }, |
| 3150 | { "gfx3d_priv", 1 }, |
Jordan Crouse | 46cf4bb | 2012-02-21 08:54:52 -0700 | [diff] [blame] | 3151 | }; |
| 3152 | |
| 3153 | static struct kgsl_device_iommu_data kgsl_3d0_iommu_data[] = { |
| 3154 | { |
Shubhraprakash Das | eb6df1d | 2012-05-01 00:55:35 -0600 | [diff] [blame] | 3155 | .iommu_ctxs = kgsl_3d0_iommu_ctxs, |
| 3156 | .iommu_ctx_count = ARRAY_SIZE(kgsl_3d0_iommu_ctxs), |
Jordan Crouse | 46cf4bb | 2012-02-21 08:54:52 -0700 | [diff] [blame] | 3157 | .physstart = 0x07C00000, |
| 3158 | .physend = 0x07C00000 + SZ_1M - 1, |
| 3159 | }, |
| 3160 | }; |
| 3161 | |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 3162 | static struct kgsl_device_platform_data kgsl_3d0_pdata = { |
Lucille Sylvester | dce84cd | 2011-10-12 14:15:37 -0600 | [diff] [blame] | 3163 | .pwrlevel = { |
| 3164 | { |
| 3165 | .gpu_freq = 400000000, |
| 3166 | .bus_freq = 4, |
| 3167 | .io_fraction = 0, |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 3168 | }, |
Lucille Sylvester | dce84cd | 2011-10-12 14:15:37 -0600 | [diff] [blame] | 3169 | { |
| 3170 | .gpu_freq = 300000000, |
| 3171 | .bus_freq = 3, |
| 3172 | .io_fraction = 33, |
| 3173 | }, |
| 3174 | { |
| 3175 | .gpu_freq = 200000000, |
| 3176 | .bus_freq = 2, |
| 3177 | .io_fraction = 100, |
| 3178 | }, |
| 3179 | { |
| 3180 | .gpu_freq = 128000000, |
| 3181 | .bus_freq = 1, |
| 3182 | .io_fraction = 100, |
| 3183 | }, |
| 3184 | { |
| 3185 | .gpu_freq = 27000000, |
| 3186 | .bus_freq = 0, |
| 3187 | }, |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 3188 | }, |
Lucille Sylvester | 67b4c53 | 2012-02-08 11:24:31 -0800 | [diff] [blame] | 3189 | .init_level = 1, |
Lucille Sylvester | 6e36241 | 2011-12-09 16:21:42 -0700 | [diff] [blame] | 3190 | .num_levels = ARRAY_SIZE(grp3d_freq) + 1, |
Lucille Sylvester | dce84cd | 2011-10-12 14:15:37 -0600 | [diff] [blame] | 3191 | .set_grp_async = NULL, |
Lucille Sylvester | 5dc6751 | 2012-03-27 15:07:58 -0600 | [diff] [blame] | 3192 | .idle_timeout = HZ/12, |
Lucille Sylvester | dce84cd | 2011-10-12 14:15:37 -0600 | [diff] [blame] | 3193 | .nap_allowed = true, |
| 3194 | .clk_map = KGSL_CLK_CORE | KGSL_CLK_IFACE | KGSL_CLK_MEM_IFACE, |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 3195 | #ifdef CONFIG_MSM_BUS_SCALING |
Lucille Sylvester | dce84cd | 2011-10-12 14:15:37 -0600 | [diff] [blame] | 3196 | .bus_scale_table = &grp3d_bus_scale_pdata, |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 3197 | #endif |
Jordan Crouse | 46cf4bb | 2012-02-21 08:54:52 -0700 | [diff] [blame] | 3198 | .iommu_data = kgsl_3d0_iommu_data, |
| 3199 | .iommu_count = ARRAY_SIZE(kgsl_3d0_iommu_data), |
Lucille Sylvester | 6e36241 | 2011-12-09 16:21:42 -0700 | [diff] [blame] | 3200 | .core_info = &grp3d_core_info, |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 3201 | }; |
| 3202 | |
| 3203 | struct platform_device msm_kgsl_3d0 = { |
| 3204 | .name = "kgsl-3d0", |
| 3205 | .id = 0, |
| 3206 | .num_resources = ARRAY_SIZE(kgsl_3d0_resources), |
| 3207 | .resource = kgsl_3d0_resources, |
| 3208 | .dev = { |
| 3209 | .platform_data = &kgsl_3d0_pdata, |
| 3210 | }, |
| 3211 | }; |
| 3212 | |
| 3213 | static struct resource kgsl_2d0_resources[] = { |
| 3214 | { |
| 3215 | .name = KGSL_2D0_REG_MEMORY, |
| 3216 | .start = 0x04100000, /* Z180 base address */ |
| 3217 | .end = 0x04100FFF, |
| 3218 | .flags = IORESOURCE_MEM, |
| 3219 | }, |
| 3220 | { |
| 3221 | .name = KGSL_2D0_IRQ, |
| 3222 | .start = GFX2D0_IRQ, |
| 3223 | .end = GFX2D0_IRQ, |
| 3224 | .flags = IORESOURCE_IRQ, |
| 3225 | }, |
| 3226 | }; |
| 3227 | |
Shubhraprakash Das | eb6df1d | 2012-05-01 00:55:35 -0600 | [diff] [blame] | 3228 | static const struct kgsl_iommu_ctx kgsl_2d0_iommu_ctxs[] = { |
| 3229 | { "gfx2d0_2d0", 0 }, |
Jordan Crouse | 46cf4bb | 2012-02-21 08:54:52 -0700 | [diff] [blame] | 3230 | }; |
| 3231 | |
| 3232 | static struct kgsl_device_iommu_data kgsl_2d0_iommu_data[] = { |
| 3233 | { |
Shubhraprakash Das | eb6df1d | 2012-05-01 00:55:35 -0600 | [diff] [blame] | 3234 | .iommu_ctxs = kgsl_2d0_iommu_ctxs, |
| 3235 | .iommu_ctx_count = ARRAY_SIZE(kgsl_2d0_iommu_ctxs), |
Jordan Crouse | 46cf4bb | 2012-02-21 08:54:52 -0700 | [diff] [blame] | 3236 | .physstart = 0x07D00000, |
| 3237 | .physend = 0x07D00000 + SZ_1M - 1, |
| 3238 | }, |
| 3239 | }; |
| 3240 | |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 3241 | static struct kgsl_device_platform_data kgsl_2d0_pdata = { |
Lucille Sylvester | dce84cd | 2011-10-12 14:15:37 -0600 | [diff] [blame] | 3242 | .pwrlevel = { |
| 3243 | { |
| 3244 | .gpu_freq = 200000000, |
Lucille Sylvester | 808eca2 | 2011-11-03 10:26:29 -0700 | [diff] [blame] | 3245 | .bus_freq = 2, |
| 3246 | }, |
| 3247 | { |
| 3248 | .gpu_freq = 96000000, |
Lucille Sylvester | dce84cd | 2011-10-12 14:15:37 -0600 | [diff] [blame] | 3249 | .bus_freq = 1, |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 3250 | }, |
Lucille Sylvester | dce84cd | 2011-10-12 14:15:37 -0600 | [diff] [blame] | 3251 | { |
Lucille Sylvester | 808eca2 | 2011-11-03 10:26:29 -0700 | [diff] [blame] | 3252 | .gpu_freq = 27000000, |
Lucille Sylvester | dce84cd | 2011-10-12 14:15:37 -0600 | [diff] [blame] | 3253 | .bus_freq = 0, |
| 3254 | }, |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 3255 | }, |
Lucille Sylvester | dce84cd | 2011-10-12 14:15:37 -0600 | [diff] [blame] | 3256 | .init_level = 0, |
Lucille Sylvester | 6e36241 | 2011-12-09 16:21:42 -0700 | [diff] [blame] | 3257 | .num_levels = ARRAY_SIZE(grp2d_freq) + 1, |
Lucille Sylvester | dce84cd | 2011-10-12 14:15:37 -0600 | [diff] [blame] | 3258 | .set_grp_async = NULL, |
Lucille Sylvester | 808eca2 | 2011-11-03 10:26:29 -0700 | [diff] [blame] | 3259 | .idle_timeout = HZ/5, |
Lucille Sylvester | dce84cd | 2011-10-12 14:15:37 -0600 | [diff] [blame] | 3260 | .nap_allowed = true, |
| 3261 | .clk_map = KGSL_CLK_CORE | KGSL_CLK_IFACE, |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 3262 | #ifdef CONFIG_MSM_BUS_SCALING |
Lucille Sylvester | dce84cd | 2011-10-12 14:15:37 -0600 | [diff] [blame] | 3263 | .bus_scale_table = &grp2d0_bus_scale_pdata, |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 3264 | #endif |
Jordan Crouse | 46cf4bb | 2012-02-21 08:54:52 -0700 | [diff] [blame] | 3265 | .iommu_data = kgsl_2d0_iommu_data, |
| 3266 | .iommu_count = ARRAY_SIZE(kgsl_2d0_iommu_data), |
Lucille Sylvester | 6e36241 | 2011-12-09 16:21:42 -0700 | [diff] [blame] | 3267 | .core_info = &grp2d_core_info, |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 3268 | }; |
| 3269 | |
| 3270 | struct platform_device msm_kgsl_2d0 = { |
| 3271 | .name = "kgsl-2d0", |
| 3272 | .id = 0, |
| 3273 | .num_resources = ARRAY_SIZE(kgsl_2d0_resources), |
| 3274 | .resource = kgsl_2d0_resources, |
| 3275 | .dev = { |
| 3276 | .platform_data = &kgsl_2d0_pdata, |
| 3277 | }, |
| 3278 | }; |
| 3279 | |
Shubhraprakash Das | eb6df1d | 2012-05-01 00:55:35 -0600 | [diff] [blame] | 3280 | static const struct kgsl_iommu_ctx kgsl_2d1_iommu_ctxs[] = { |
| 3281 | { "gfx2d1_2d1", 0 }, |
Jordan Crouse | 46cf4bb | 2012-02-21 08:54:52 -0700 | [diff] [blame] | 3282 | }; |
| 3283 | |
| 3284 | static struct kgsl_device_iommu_data kgsl_2d1_iommu_data[] = { |
| 3285 | { |
Shubhraprakash Das | eb6df1d | 2012-05-01 00:55:35 -0600 | [diff] [blame] | 3286 | .iommu_ctxs = kgsl_2d1_iommu_ctxs, |
| 3287 | .iommu_ctx_count = ARRAY_SIZE(kgsl_2d1_iommu_ctxs), |
Jordan Crouse | 46cf4bb | 2012-02-21 08:54:52 -0700 | [diff] [blame] | 3288 | .physstart = 0x07E00000, |
| 3289 | .physend = 0x07E00000 + SZ_1M - 1, |
| 3290 | }, |
| 3291 | }; |
| 3292 | |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 3293 | static struct resource kgsl_2d1_resources[] = { |
| 3294 | { |
| 3295 | .name = KGSL_2D1_REG_MEMORY, |
| 3296 | .start = 0x04200000, /* Z180 device 1 base address */ |
| 3297 | .end = 0x04200FFF, |
| 3298 | .flags = IORESOURCE_MEM, |
| 3299 | }, |
| 3300 | { |
| 3301 | .name = KGSL_2D1_IRQ, |
| 3302 | .start = GFX2D1_IRQ, |
| 3303 | .end = GFX2D1_IRQ, |
| 3304 | .flags = IORESOURCE_IRQ, |
| 3305 | }, |
| 3306 | }; |
| 3307 | |
| 3308 | static struct kgsl_device_platform_data kgsl_2d1_pdata = { |
Lucille Sylvester | dce84cd | 2011-10-12 14:15:37 -0600 | [diff] [blame] | 3309 | .pwrlevel = { |
| 3310 | { |
| 3311 | .gpu_freq = 200000000, |
Lucille Sylvester | 808eca2 | 2011-11-03 10:26:29 -0700 | [diff] [blame] | 3312 | .bus_freq = 2, |
| 3313 | }, |
| 3314 | { |
| 3315 | .gpu_freq = 96000000, |
Lucille Sylvester | dce84cd | 2011-10-12 14:15:37 -0600 | [diff] [blame] | 3316 | .bus_freq = 1, |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 3317 | }, |
Lucille Sylvester | dce84cd | 2011-10-12 14:15:37 -0600 | [diff] [blame] | 3318 | { |
Lucille Sylvester | 808eca2 | 2011-11-03 10:26:29 -0700 | [diff] [blame] | 3319 | .gpu_freq = 27000000, |
Lucille Sylvester | dce84cd | 2011-10-12 14:15:37 -0600 | [diff] [blame] | 3320 | .bus_freq = 0, |
| 3321 | }, |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 3322 | }, |
Lucille Sylvester | dce84cd | 2011-10-12 14:15:37 -0600 | [diff] [blame] | 3323 | .init_level = 0, |
Lucille Sylvester | 6e36241 | 2011-12-09 16:21:42 -0700 | [diff] [blame] | 3324 | .num_levels = ARRAY_SIZE(grp2d_freq) + 1, |
Lucille Sylvester | dce84cd | 2011-10-12 14:15:37 -0600 | [diff] [blame] | 3325 | .set_grp_async = NULL, |
Lucille Sylvester | 808eca2 | 2011-11-03 10:26:29 -0700 | [diff] [blame] | 3326 | .idle_timeout = HZ/5, |
Lucille Sylvester | dce84cd | 2011-10-12 14:15:37 -0600 | [diff] [blame] | 3327 | .nap_allowed = true, |
| 3328 | .clk_map = KGSL_CLK_CORE | KGSL_CLK_IFACE, |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 3329 | #ifdef CONFIG_MSM_BUS_SCALING |
Lucille Sylvester | dce84cd | 2011-10-12 14:15:37 -0600 | [diff] [blame] | 3330 | .bus_scale_table = &grp2d1_bus_scale_pdata, |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 3331 | #endif |
Jordan Crouse | 46cf4bb | 2012-02-21 08:54:52 -0700 | [diff] [blame] | 3332 | .iommu_data = kgsl_2d1_iommu_data, |
| 3333 | .iommu_count = ARRAY_SIZE(kgsl_2d1_iommu_data), |
Lucille Sylvester | 6e36241 | 2011-12-09 16:21:42 -0700 | [diff] [blame] | 3334 | .core_info = &grp2d_core_info, |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 3335 | }; |
| 3336 | |
| 3337 | struct platform_device msm_kgsl_2d1 = { |
| 3338 | .name = "kgsl-2d1", |
| 3339 | .id = 1, |
| 3340 | .num_resources = ARRAY_SIZE(kgsl_2d1_resources), |
| 3341 | .resource = kgsl_2d1_resources, |
| 3342 | .dev = { |
| 3343 | .platform_data = &kgsl_2d1_pdata, |
| 3344 | }, |
| 3345 | }; |
| 3346 | |
| 3347 | #ifdef CONFIG_MSM_GEMINI |
| 3348 | static struct resource msm_gemini_resources[] = { |
| 3349 | { |
| 3350 | .start = 0x04600000, |
| 3351 | .end = 0x04600000 + SZ_1M - 1, |
| 3352 | .flags = IORESOURCE_MEM, |
| 3353 | }, |
| 3354 | { |
| 3355 | .start = JPEG_IRQ, |
| 3356 | .end = JPEG_IRQ, |
| 3357 | .flags = IORESOURCE_IRQ, |
| 3358 | }, |
| 3359 | }; |
| 3360 | |
| 3361 | struct platform_device msm8960_gemini_device = { |
| 3362 | .name = "msm_gemini", |
| 3363 | .resource = msm_gemini_resources, |
| 3364 | .num_resources = ARRAY_SIZE(msm_gemini_resources), |
| 3365 | }; |
| 3366 | #endif |
| 3367 | |
Kalyani Oruganti | 465d1e1 | 2012-05-15 10:23:05 -0700 | [diff] [blame] | 3368 | #ifdef CONFIG_MSM_MERCURY |
| 3369 | static struct resource msm_mercury_resources[] = { |
| 3370 | { |
| 3371 | .start = 0x05000000, |
| 3372 | .end = 0x05000000 + SZ_1M - 1, |
| 3373 | .name = "mercury_resource_base", |
| 3374 | .flags = IORESOURCE_MEM, |
| 3375 | }, |
| 3376 | { |
| 3377 | .start = JPEGD_IRQ, |
| 3378 | .end = JPEGD_IRQ, |
| 3379 | .flags = IORESOURCE_IRQ, |
| 3380 | }, |
| 3381 | }; |
| 3382 | struct platform_device msm8960_mercury_device = { |
| 3383 | .name = "msm_mercury", |
| 3384 | .resource = msm_mercury_resources, |
| 3385 | .num_resources = ARRAY_SIZE(msm_mercury_resources), |
| 3386 | }; |
| 3387 | #endif |
| 3388 | |
Praveen Chidambaram | 7849901 | 2011-11-01 17:15:17 -0600 | [diff] [blame] | 3389 | struct msm_rpm_platform_data msm8960_rpm_data __initdata = { |
| 3390 | .reg_base_addrs = { |
| 3391 | [MSM_RPM_PAGE_STATUS] = MSM_RPM_BASE, |
| 3392 | [MSM_RPM_PAGE_CTRL] = MSM_RPM_BASE + 0x400, |
| 3393 | [MSM_RPM_PAGE_REQ] = MSM_RPM_BASE + 0x600, |
| 3394 | [MSM_RPM_PAGE_ACK] = MSM_RPM_BASE + 0xa00, |
| 3395 | }, |
| 3396 | .irq_ack = RPM_APCC_CPU0_GP_HIGH_IRQ, |
Stephen Boyd | f61255e | 2012-02-24 14:31:09 -0800 | [diff] [blame] | 3397 | .irq_err = RPM_APCC_CPU0_GP_LOW_IRQ, |
Praveen Chidambaram | e396ce6 | 2012-03-30 11:15:57 -0600 | [diff] [blame] | 3398 | .irq_wakeup = RPM_APCC_CPU0_WAKE_UP_IRQ, |
Praveen Chidambaram | 7849901 | 2011-11-01 17:15:17 -0600 | [diff] [blame] | 3399 | .ipc_rpm_reg = MSM_APCS_GCC_BASE + 0x008, |
| 3400 | .ipc_rpm_val = 4, |
| 3401 | .target_id = { |
| 3402 | MSM_RPM_MAP(8960, NOTIFICATION_CONFIGURED_0, NOTIFICATION, 4), |
| 3403 | MSM_RPM_MAP(8960, NOTIFICATION_REGISTERED_0, NOTIFICATION, 4), |
| 3404 | MSM_RPM_MAP(8960, INVALIDATE_0, INVALIDATE, 8), |
| 3405 | MSM_RPM_MAP(8960, TRIGGER_TIMED_TO, TRIGGER_TIMED, 1), |
| 3406 | MSM_RPM_MAP(8960, TRIGGER_TIMED_SCLK_COUNT, TRIGGER_TIMED, 1), |
| 3407 | MSM_RPM_MAP(8960, RPM_CTL, RPM_CTL, 1), |
| 3408 | MSM_RPM_MAP(8960, CXO_CLK, CXO_CLK, 1), |
| 3409 | MSM_RPM_MAP(8960, PXO_CLK, PXO_CLK, 1), |
| 3410 | MSM_RPM_MAP(8960, APPS_FABRIC_CLK, APPS_FABRIC_CLK, 1), |
| 3411 | MSM_RPM_MAP(8960, SYSTEM_FABRIC_CLK, SYSTEM_FABRIC_CLK, 1), |
| 3412 | MSM_RPM_MAP(8960, MM_FABRIC_CLK, MM_FABRIC_CLK, 1), |
| 3413 | MSM_RPM_MAP(8960, DAYTONA_FABRIC_CLK, DAYTONA_FABRIC_CLK, 1), |
| 3414 | MSM_RPM_MAP(8960, SFPB_CLK, SFPB_CLK, 1), |
| 3415 | MSM_RPM_MAP(8960, CFPB_CLK, CFPB_CLK, 1), |
| 3416 | MSM_RPM_MAP(8960, MMFPB_CLK, MMFPB_CLK, 1), |
| 3417 | MSM_RPM_MAP(8960, EBI1_CLK, EBI1_CLK, 1), |
| 3418 | MSM_RPM_MAP(8960, APPS_FABRIC_CFG_HALT_0, |
| 3419 | APPS_FABRIC_CFG_HALT, 2), |
| 3420 | MSM_RPM_MAP(8960, APPS_FABRIC_CFG_CLKMOD_0, |
| 3421 | APPS_FABRIC_CFG_CLKMOD, 3), |
| 3422 | MSM_RPM_MAP(8960, APPS_FABRIC_CFG_IOCTL, |
| 3423 | APPS_FABRIC_CFG_IOCTL, 1), |
| 3424 | MSM_RPM_MAP(8960, APPS_FABRIC_ARB_0, APPS_FABRIC_ARB, 12), |
| 3425 | MSM_RPM_MAP(8960, SYS_FABRIC_CFG_HALT_0, |
| 3426 | SYS_FABRIC_CFG_HALT, 2), |
| 3427 | MSM_RPM_MAP(8960, SYS_FABRIC_CFG_CLKMOD_0, |
| 3428 | SYS_FABRIC_CFG_CLKMOD, 3), |
| 3429 | MSM_RPM_MAP(8960, SYS_FABRIC_CFG_IOCTL, |
| 3430 | SYS_FABRIC_CFG_IOCTL, 1), |
| 3431 | MSM_RPM_MAP(8960, SYSTEM_FABRIC_ARB_0, |
| 3432 | SYSTEM_FABRIC_ARB, 29), |
| 3433 | MSM_RPM_MAP(8960, MMSS_FABRIC_CFG_HALT_0, |
| 3434 | MMSS_FABRIC_CFG_HALT, 2), |
| 3435 | MSM_RPM_MAP(8960, MMSS_FABRIC_CFG_CLKMOD_0, |
| 3436 | MMSS_FABRIC_CFG_CLKMOD, 3), |
| 3437 | MSM_RPM_MAP(8960, MMSS_FABRIC_CFG_IOCTL, |
| 3438 | MMSS_FABRIC_CFG_IOCTL, 1), |
| 3439 | MSM_RPM_MAP(8960, MM_FABRIC_ARB_0, MM_FABRIC_ARB, 23), |
| 3440 | MSM_RPM_MAP(8960, PM8921_S1_0, PM8921_S1, 2), |
| 3441 | MSM_RPM_MAP(8960, PM8921_S2_0, PM8921_S2, 2), |
| 3442 | MSM_RPM_MAP(8960, PM8921_S3_0, PM8921_S3, 2), |
| 3443 | MSM_RPM_MAP(8960, PM8921_S4_0, PM8921_S4, 2), |
| 3444 | MSM_RPM_MAP(8960, PM8921_S5_0, PM8921_S5, 2), |
| 3445 | MSM_RPM_MAP(8960, PM8921_S6_0, PM8921_S6, 2), |
| 3446 | MSM_RPM_MAP(8960, PM8921_S7_0, PM8921_S7, 2), |
| 3447 | MSM_RPM_MAP(8960, PM8921_S8_0, PM8921_S8, 2), |
| 3448 | MSM_RPM_MAP(8960, PM8921_L1_0, PM8921_L1, 2), |
| 3449 | MSM_RPM_MAP(8960, PM8921_L2_0, PM8921_L2, 2), |
| 3450 | MSM_RPM_MAP(8960, PM8921_L3_0, PM8921_L3, 2), |
| 3451 | MSM_RPM_MAP(8960, PM8921_L4_0, PM8921_L4, 2), |
| 3452 | MSM_RPM_MAP(8960, PM8921_L5_0, PM8921_L5, 2), |
| 3453 | MSM_RPM_MAP(8960, PM8921_L6_0, PM8921_L6, 2), |
| 3454 | MSM_RPM_MAP(8960, PM8921_L7_0, PM8921_L7, 2), |
| 3455 | MSM_RPM_MAP(8960, PM8921_L8_0, PM8921_L8, 2), |
| 3456 | MSM_RPM_MAP(8960, PM8921_L9_0, PM8921_L9, 2), |
| 3457 | MSM_RPM_MAP(8960, PM8921_L10_0, PM8921_L10, 2), |
| 3458 | MSM_RPM_MAP(8960, PM8921_L11_0, PM8921_L11, 2), |
| 3459 | MSM_RPM_MAP(8960, PM8921_L12_0, PM8921_L12, 2), |
| 3460 | MSM_RPM_MAP(8960, PM8921_L13_0, PM8921_L13, 2), |
| 3461 | MSM_RPM_MAP(8960, PM8921_L14_0, PM8921_L14, 2), |
| 3462 | MSM_RPM_MAP(8960, PM8921_L15_0, PM8921_L15, 2), |
| 3463 | MSM_RPM_MAP(8960, PM8921_L16_0, PM8921_L16, 2), |
| 3464 | MSM_RPM_MAP(8960, PM8921_L17_0, PM8921_L17, 2), |
| 3465 | MSM_RPM_MAP(8960, PM8921_L18_0, PM8921_L18, 2), |
| 3466 | MSM_RPM_MAP(8960, PM8921_L19_0, PM8921_L19, 2), |
| 3467 | MSM_RPM_MAP(8960, PM8921_L20_0, PM8921_L20, 2), |
| 3468 | MSM_RPM_MAP(8960, PM8921_L21_0, PM8921_L21, 2), |
| 3469 | MSM_RPM_MAP(8960, PM8921_L22_0, PM8921_L22, 2), |
| 3470 | MSM_RPM_MAP(8960, PM8921_L23_0, PM8921_L23, 2), |
| 3471 | MSM_RPM_MAP(8960, PM8921_L24_0, PM8921_L24, 2), |
| 3472 | MSM_RPM_MAP(8960, PM8921_L25_0, PM8921_L25, 2), |
| 3473 | MSM_RPM_MAP(8960, PM8921_L26_0, PM8921_L26, 2), |
| 3474 | MSM_RPM_MAP(8960, PM8921_L27_0, PM8921_L27, 2), |
| 3475 | MSM_RPM_MAP(8960, PM8921_L28_0, PM8921_L28, 2), |
| 3476 | MSM_RPM_MAP(8960, PM8921_L29_0, PM8921_L29, 2), |
| 3477 | MSM_RPM_MAP(8960, PM8921_CLK1_0, PM8921_CLK1, 2), |
| 3478 | MSM_RPM_MAP(8960, PM8921_CLK2_0, PM8921_CLK2, 2), |
| 3479 | MSM_RPM_MAP(8960, PM8921_LVS1, PM8921_LVS1, 1), |
| 3480 | MSM_RPM_MAP(8960, PM8921_LVS2, PM8921_LVS2, 1), |
| 3481 | MSM_RPM_MAP(8960, PM8921_LVS3, PM8921_LVS3, 1), |
| 3482 | MSM_RPM_MAP(8960, PM8921_LVS4, PM8921_LVS4, 1), |
| 3483 | MSM_RPM_MAP(8960, PM8921_LVS5, PM8921_LVS5, 1), |
| 3484 | MSM_RPM_MAP(8960, PM8921_LVS6, PM8921_LVS6, 1), |
| 3485 | MSM_RPM_MAP(8960, PM8921_LVS7, PM8921_LVS7, 1), |
| 3486 | MSM_RPM_MAP(8960, NCP_0, NCP, 2), |
| 3487 | MSM_RPM_MAP(8960, CXO_BUFFERS, CXO_BUFFERS, 1), |
| 3488 | MSM_RPM_MAP(8960, USB_OTG_SWITCH, USB_OTG_SWITCH, 1), |
| 3489 | MSM_RPM_MAP(8960, HDMI_SWITCH, HDMI_SWITCH, 1), |
| 3490 | MSM_RPM_MAP(8960, DDR_DMM_0, DDR_DMM, 2), |
| 3491 | MSM_RPM_MAP(8960, QDSS_CLK, QDSS_CLK, 1), |
| 3492 | }, |
| 3493 | .target_status = { |
| 3494 | MSM_RPM_STATUS_ID_MAP(8960, VERSION_MAJOR), |
| 3495 | MSM_RPM_STATUS_ID_MAP(8960, VERSION_MINOR), |
| 3496 | MSM_RPM_STATUS_ID_MAP(8960, VERSION_BUILD), |
| 3497 | MSM_RPM_STATUS_ID_MAP(8960, SUPPORTED_RESOURCES_0), |
| 3498 | MSM_RPM_STATUS_ID_MAP(8960, SUPPORTED_RESOURCES_1), |
| 3499 | MSM_RPM_STATUS_ID_MAP(8960, SUPPORTED_RESOURCES_2), |
| 3500 | MSM_RPM_STATUS_ID_MAP(8960, RESERVED_SUPPORTED_RESOURCES_0), |
| 3501 | MSM_RPM_STATUS_ID_MAP(8960, SEQUENCE), |
| 3502 | MSM_RPM_STATUS_ID_MAP(8960, RPM_CTL), |
| 3503 | MSM_RPM_STATUS_ID_MAP(8960, CXO_CLK), |
| 3504 | MSM_RPM_STATUS_ID_MAP(8960, PXO_CLK), |
| 3505 | MSM_RPM_STATUS_ID_MAP(8960, APPS_FABRIC_CLK), |
| 3506 | MSM_RPM_STATUS_ID_MAP(8960, SYSTEM_FABRIC_CLK), |
| 3507 | MSM_RPM_STATUS_ID_MAP(8960, MM_FABRIC_CLK), |
| 3508 | MSM_RPM_STATUS_ID_MAP(8960, DAYTONA_FABRIC_CLK), |
| 3509 | MSM_RPM_STATUS_ID_MAP(8960, SFPB_CLK), |
| 3510 | MSM_RPM_STATUS_ID_MAP(8960, CFPB_CLK), |
| 3511 | MSM_RPM_STATUS_ID_MAP(8960, MMFPB_CLK), |
| 3512 | MSM_RPM_STATUS_ID_MAP(8960, EBI1_CLK), |
| 3513 | MSM_RPM_STATUS_ID_MAP(8960, APPS_FABRIC_CFG_HALT), |
| 3514 | MSM_RPM_STATUS_ID_MAP(8960, APPS_FABRIC_CFG_CLKMOD), |
| 3515 | MSM_RPM_STATUS_ID_MAP(8960, APPS_FABRIC_CFG_IOCTL), |
| 3516 | MSM_RPM_STATUS_ID_MAP(8960, APPS_FABRIC_ARB), |
| 3517 | MSM_RPM_STATUS_ID_MAP(8960, SYS_FABRIC_CFG_HALT), |
| 3518 | MSM_RPM_STATUS_ID_MAP(8960, SYS_FABRIC_CFG_CLKMOD), |
| 3519 | MSM_RPM_STATUS_ID_MAP(8960, SYS_FABRIC_CFG_IOCTL), |
| 3520 | MSM_RPM_STATUS_ID_MAP(8960, SYSTEM_FABRIC_ARB), |
| 3521 | MSM_RPM_STATUS_ID_MAP(8960, MMSS_FABRIC_CFG_HALT), |
| 3522 | MSM_RPM_STATUS_ID_MAP(8960, MMSS_FABRIC_CFG_CLKMOD), |
| 3523 | MSM_RPM_STATUS_ID_MAP(8960, MMSS_FABRIC_CFG_IOCTL), |
| 3524 | MSM_RPM_STATUS_ID_MAP(8960, MM_FABRIC_ARB), |
| 3525 | MSM_RPM_STATUS_ID_MAP(8960, PM8921_S1_0), |
| 3526 | MSM_RPM_STATUS_ID_MAP(8960, PM8921_S1_1), |
| 3527 | MSM_RPM_STATUS_ID_MAP(8960, PM8921_S2_0), |
| 3528 | MSM_RPM_STATUS_ID_MAP(8960, PM8921_S2_1), |
| 3529 | MSM_RPM_STATUS_ID_MAP(8960, PM8921_S3_0), |
| 3530 | MSM_RPM_STATUS_ID_MAP(8960, PM8921_S3_1), |
| 3531 | MSM_RPM_STATUS_ID_MAP(8960, PM8921_S4_0), |
| 3532 | MSM_RPM_STATUS_ID_MAP(8960, PM8921_S4_1), |
| 3533 | MSM_RPM_STATUS_ID_MAP(8960, PM8921_S5_0), |
| 3534 | MSM_RPM_STATUS_ID_MAP(8960, PM8921_S5_1), |
| 3535 | MSM_RPM_STATUS_ID_MAP(8960, PM8921_S6_0), |
| 3536 | MSM_RPM_STATUS_ID_MAP(8960, PM8921_S6_1), |
| 3537 | MSM_RPM_STATUS_ID_MAP(8960, PM8921_S7_0), |
| 3538 | MSM_RPM_STATUS_ID_MAP(8960, PM8921_S7_1), |
| 3539 | MSM_RPM_STATUS_ID_MAP(8960, PM8921_S8_0), |
| 3540 | MSM_RPM_STATUS_ID_MAP(8960, PM8921_S8_1), |
| 3541 | MSM_RPM_STATUS_ID_MAP(8960, PM8921_L1_0), |
| 3542 | MSM_RPM_STATUS_ID_MAP(8960, PM8921_L1_1), |
| 3543 | MSM_RPM_STATUS_ID_MAP(8960, PM8921_L2_0), |
| 3544 | MSM_RPM_STATUS_ID_MAP(8960, PM8921_L2_1), |
| 3545 | MSM_RPM_STATUS_ID_MAP(8960, PM8921_L3_0), |
| 3546 | MSM_RPM_STATUS_ID_MAP(8960, PM8921_L3_1), |
| 3547 | MSM_RPM_STATUS_ID_MAP(8960, PM8921_L4_0), |
| 3548 | MSM_RPM_STATUS_ID_MAP(8960, PM8921_L4_1), |
| 3549 | MSM_RPM_STATUS_ID_MAP(8960, PM8921_L5_0), |
| 3550 | MSM_RPM_STATUS_ID_MAP(8960, PM8921_L5_1), |
| 3551 | MSM_RPM_STATUS_ID_MAP(8960, PM8921_L6_0), |
| 3552 | MSM_RPM_STATUS_ID_MAP(8960, PM8921_L6_1), |
| 3553 | MSM_RPM_STATUS_ID_MAP(8960, PM8921_L7_0), |
| 3554 | MSM_RPM_STATUS_ID_MAP(8960, PM8921_L7_1), |
| 3555 | MSM_RPM_STATUS_ID_MAP(8960, PM8921_L8_0), |
| 3556 | MSM_RPM_STATUS_ID_MAP(8960, PM8921_L8_1), |
| 3557 | MSM_RPM_STATUS_ID_MAP(8960, PM8921_L9_0), |
| 3558 | MSM_RPM_STATUS_ID_MAP(8960, PM8921_L9_1), |
| 3559 | MSM_RPM_STATUS_ID_MAP(8960, PM8921_L10_0), |
| 3560 | MSM_RPM_STATUS_ID_MAP(8960, PM8921_L10_1), |
| 3561 | MSM_RPM_STATUS_ID_MAP(8960, PM8921_L11_0), |
| 3562 | MSM_RPM_STATUS_ID_MAP(8960, PM8921_L11_1), |
| 3563 | MSM_RPM_STATUS_ID_MAP(8960, PM8921_L12_0), |
| 3564 | MSM_RPM_STATUS_ID_MAP(8960, PM8921_L12_1), |
| 3565 | MSM_RPM_STATUS_ID_MAP(8960, PM8921_L13_0), |
| 3566 | MSM_RPM_STATUS_ID_MAP(8960, PM8921_L13_1), |
| 3567 | MSM_RPM_STATUS_ID_MAP(8960, PM8921_L14_0), |
| 3568 | MSM_RPM_STATUS_ID_MAP(8960, PM8921_L14_1), |
| 3569 | MSM_RPM_STATUS_ID_MAP(8960, PM8921_L15_0), |
| 3570 | MSM_RPM_STATUS_ID_MAP(8960, PM8921_L15_1), |
| 3571 | MSM_RPM_STATUS_ID_MAP(8960, PM8921_L16_0), |
| 3572 | MSM_RPM_STATUS_ID_MAP(8960, PM8921_L16_1), |
| 3573 | MSM_RPM_STATUS_ID_MAP(8960, PM8921_L17_0), |
| 3574 | MSM_RPM_STATUS_ID_MAP(8960, PM8921_L17_1), |
| 3575 | MSM_RPM_STATUS_ID_MAP(8960, PM8921_L18_0), |
| 3576 | MSM_RPM_STATUS_ID_MAP(8960, PM8921_L18_1), |
| 3577 | MSM_RPM_STATUS_ID_MAP(8960, PM8921_L19_0), |
| 3578 | MSM_RPM_STATUS_ID_MAP(8960, PM8921_L19_1), |
| 3579 | MSM_RPM_STATUS_ID_MAP(8960, PM8921_L20_0), |
| 3580 | MSM_RPM_STATUS_ID_MAP(8960, PM8921_L20_1), |
| 3581 | MSM_RPM_STATUS_ID_MAP(8960, PM8921_L21_0), |
| 3582 | MSM_RPM_STATUS_ID_MAP(8960, PM8921_L21_1), |
| 3583 | MSM_RPM_STATUS_ID_MAP(8960, PM8921_L22_0), |
| 3584 | MSM_RPM_STATUS_ID_MAP(8960, PM8921_L22_1), |
| 3585 | MSM_RPM_STATUS_ID_MAP(8960, PM8921_L23_0), |
| 3586 | MSM_RPM_STATUS_ID_MAP(8960, PM8921_L23_1), |
| 3587 | MSM_RPM_STATUS_ID_MAP(8960, PM8921_L24_0), |
| 3588 | MSM_RPM_STATUS_ID_MAP(8960, PM8921_L24_1), |
| 3589 | MSM_RPM_STATUS_ID_MAP(8960, PM8921_L25_0), |
| 3590 | MSM_RPM_STATUS_ID_MAP(8960, PM8921_L25_1), |
| 3591 | MSM_RPM_STATUS_ID_MAP(8960, PM8921_L26_0), |
| 3592 | MSM_RPM_STATUS_ID_MAP(8960, PM8921_L26_1), |
| 3593 | MSM_RPM_STATUS_ID_MAP(8960, PM8921_L27_0), |
| 3594 | MSM_RPM_STATUS_ID_MAP(8960, PM8921_L27_1), |
| 3595 | MSM_RPM_STATUS_ID_MAP(8960, PM8921_L28_0), |
| 3596 | MSM_RPM_STATUS_ID_MAP(8960, PM8921_L28_1), |
| 3597 | MSM_RPM_STATUS_ID_MAP(8960, PM8921_L29_0), |
| 3598 | MSM_RPM_STATUS_ID_MAP(8960, PM8921_L29_1), |
| 3599 | MSM_RPM_STATUS_ID_MAP(8960, PM8921_CLK1_0), |
| 3600 | MSM_RPM_STATUS_ID_MAP(8960, PM8921_CLK1_1), |
| 3601 | MSM_RPM_STATUS_ID_MAP(8960, PM8921_CLK2_0), |
| 3602 | MSM_RPM_STATUS_ID_MAP(8960, PM8921_CLK2_1), |
| 3603 | MSM_RPM_STATUS_ID_MAP(8960, PM8921_LVS1), |
| 3604 | MSM_RPM_STATUS_ID_MAP(8960, PM8921_LVS2), |
| 3605 | MSM_RPM_STATUS_ID_MAP(8960, PM8921_LVS3), |
| 3606 | MSM_RPM_STATUS_ID_MAP(8960, PM8921_LVS4), |
| 3607 | MSM_RPM_STATUS_ID_MAP(8960, PM8921_LVS5), |
| 3608 | MSM_RPM_STATUS_ID_MAP(8960, PM8921_LVS6), |
| 3609 | MSM_RPM_STATUS_ID_MAP(8960, PM8921_LVS7), |
| 3610 | MSM_RPM_STATUS_ID_MAP(8960, NCP_0), |
| 3611 | MSM_RPM_STATUS_ID_MAP(8960, NCP_1), |
| 3612 | MSM_RPM_STATUS_ID_MAP(8960, CXO_BUFFERS), |
| 3613 | MSM_RPM_STATUS_ID_MAP(8960, USB_OTG_SWITCH), |
| 3614 | MSM_RPM_STATUS_ID_MAP(8960, HDMI_SWITCH), |
| 3615 | MSM_RPM_STATUS_ID_MAP(8960, DDR_DMM_0), |
| 3616 | MSM_RPM_STATUS_ID_MAP(8960, DDR_DMM_1), |
| 3617 | MSM_RPM_STATUS_ID_MAP(8960, EBI1_CH0_RANGE), |
| 3618 | MSM_RPM_STATUS_ID_MAP(8960, EBI1_CH1_RANGE), |
| 3619 | }, |
| 3620 | .target_ctrl_id = { |
| 3621 | MSM_RPM_CTRL_MAP(8960, VERSION_MAJOR), |
| 3622 | MSM_RPM_CTRL_MAP(8960, VERSION_MINOR), |
| 3623 | MSM_RPM_CTRL_MAP(8960, VERSION_BUILD), |
| 3624 | MSM_RPM_CTRL_MAP(8960, REQ_CTX_0), |
| 3625 | MSM_RPM_CTRL_MAP(8960, REQ_SEL_0), |
| 3626 | MSM_RPM_CTRL_MAP(8960, ACK_CTX_0), |
| 3627 | MSM_RPM_CTRL_MAP(8960, ACK_SEL_0), |
| 3628 | }, |
| 3629 | .sel_invalidate = MSM_RPM_8960_SEL_INVALIDATE, |
| 3630 | .sel_notification = MSM_RPM_8960_SEL_NOTIFICATION, |
| 3631 | .sel_last = MSM_RPM_8960_SEL_LAST, |
| 3632 | .ver = {3, 0, 0}, |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 3633 | }; |
Praveen Chidambaram | 8985b01 | 2011-12-16 13:38:59 -0700 | [diff] [blame] | 3634 | |
Praveen Chidambaram | 7849901 | 2011-11-01 17:15:17 -0600 | [diff] [blame] | 3635 | struct platform_device msm8960_rpm_device = { |
Maheshkumar Sivasubramanian | 9c8cdc9 | 2011-09-12 14:11:30 -0600 | [diff] [blame] | 3636 | .name = "msm_rpm", |
| 3637 | .id = -1, |
| 3638 | }; |
| 3639 | |
Praveen Chidambaram | 7849901 | 2011-11-01 17:15:17 -0600 | [diff] [blame] | 3640 | static struct msm_rpm_log_platform_data msm_rpm_log_pdata = { |
| 3641 | .phys_addr_base = 0x0010C000, |
| 3642 | .reg_offsets = { |
| 3643 | [MSM_RPM_LOG_PAGE_INDICES] = 0x00000080, |
| 3644 | [MSM_RPM_LOG_PAGE_BUFFER] = 0x000000A0, |
| 3645 | }, |
| 3646 | .phys_size = SZ_8K, |
| 3647 | .log_len = 4096, /* log's buffer length in bytes */ |
| 3648 | .log_len_mask = (4096 >> 2) - 1, /* length mask in units of u32 */ |
| 3649 | }; |
| 3650 | |
| 3651 | struct platform_device msm8960_rpm_log_device = { |
| 3652 | .name = "msm_rpm_log", |
| 3653 | .id = -1, |
| 3654 | .dev = { |
| 3655 | .platform_data = &msm_rpm_log_pdata, |
| 3656 | }, |
| 3657 | }; |
| 3658 | |
Praveen Chidambaram | 7a71223 | 2011-10-28 13:39:45 -0600 | [diff] [blame] | 3659 | static struct msm_rpmstats_platform_data msm_rpm_stat_pdata = { |
| 3660 | .phys_addr_base = 0x0010D204, |
| 3661 | .phys_size = SZ_8K, |
| 3662 | }; |
| 3663 | |
Praveen Chidambaram | 7849901 | 2011-11-01 17:15:17 -0600 | [diff] [blame] | 3664 | struct platform_device msm8960_rpm_stat_device = { |
Praveen Chidambaram | 7a71223 | 2011-10-28 13:39:45 -0600 | [diff] [blame] | 3665 | .name = "msm_rpm_stat", |
| 3666 | .id = -1, |
| 3667 | .dev = { |
| 3668 | .platform_data = &msm_rpm_stat_pdata, |
| 3669 | }, |
| 3670 | }; |
Maheshkumar Sivasubramanian | 9c8cdc9 | 2011-09-12 14:11:30 -0600 | [diff] [blame] | 3671 | |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 3672 | struct platform_device msm_bus_sys_fabric = { |
| 3673 | .name = "msm_bus_fabric", |
| 3674 | .id = MSM_BUS_FAB_SYSTEM, |
| 3675 | }; |
| 3676 | struct platform_device msm_bus_apps_fabric = { |
| 3677 | .name = "msm_bus_fabric", |
| 3678 | .id = MSM_BUS_FAB_APPSS, |
| 3679 | }; |
| 3680 | struct platform_device msm_bus_mm_fabric = { |
| 3681 | .name = "msm_bus_fabric", |
| 3682 | .id = MSM_BUS_FAB_MMSS, |
| 3683 | }; |
| 3684 | struct platform_device msm_bus_sys_fpb = { |
| 3685 | .name = "msm_bus_fabric", |
| 3686 | .id = MSM_BUS_FAB_SYSTEM_FPB, |
| 3687 | }; |
| 3688 | struct platform_device msm_bus_cpss_fpb = { |
| 3689 | .name = "msm_bus_fabric", |
| 3690 | .id = MSM_BUS_FAB_CPSS_FPB, |
| 3691 | }; |
| 3692 | |
| 3693 | /* Sensors DSPS platform data */ |
| 3694 | #ifdef CONFIG_MSM_DSPS |
| 3695 | |
karthik karuppasamy | 1a1c6b0 | 2012-05-29 15:16:32 -0700 | [diff] [blame] | 3696 | #define PPSS_DSPS_TCM_CODE_BASE 0x12000000 |
| 3697 | #define PPSS_DSPS_TCM_CODE_SIZE 0x28000 |
| 3698 | #define PPSS_DSPS_TCM_BUF_BASE 0x12040000 |
| 3699 | #define PPSS_DSPS_TCM_BUF_SIZE 0x4000 |
| 3700 | #define PPSS_DSPS_PIPE_BASE 0x12800000 |
| 3701 | #define PPSS_DSPS_PIPE_SIZE 0x4000 |
| 3702 | #define PPSS_DSPS_DDR_BASE 0x8fe00000 |
| 3703 | #define PPSS_DSPS_DDR_SIZE 0x100000 |
| 3704 | #define PPSS_SMEM_BASE 0x80000000 |
| 3705 | #define PPSS_SMEM_SIZE 0x200000 |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 3706 | #define PPSS_REG_PHYS_BASE 0x12080000 |
| 3707 | |
| 3708 | static struct dsps_clk_info dsps_clks[] = {}; |
| 3709 | static struct dsps_regulator_info dsps_regs[] = {}; |
| 3710 | |
| 3711 | /* |
| 3712 | * Note: GPIOs field is intialized in run-time at the function |
| 3713 | * msm8960_init_dsps(). |
| 3714 | */ |
| 3715 | |
| 3716 | struct msm_dsps_platform_data msm_dsps_pdata = { |
| 3717 | .clks = dsps_clks, |
| 3718 | .clks_num = ARRAY_SIZE(dsps_clks), |
| 3719 | .gpios = NULL, |
| 3720 | .gpios_num = 0, |
| 3721 | .regs = dsps_regs, |
| 3722 | .regs_num = ARRAY_SIZE(dsps_regs), |
| 3723 | .dsps_pwr_ctl_en = 1, |
karthik karuppasamy | 1a1c6b0 | 2012-05-29 15:16:32 -0700 | [diff] [blame] | 3724 | .tcm_code_start = PPSS_DSPS_TCM_CODE_BASE, |
| 3725 | .tcm_code_size = PPSS_DSPS_TCM_CODE_SIZE, |
| 3726 | .tcm_buf_start = PPSS_DSPS_TCM_BUF_BASE, |
| 3727 | .tcm_buf_size = PPSS_DSPS_TCM_BUF_SIZE, |
| 3728 | .pipe_start = PPSS_DSPS_PIPE_BASE, |
| 3729 | .pipe_size = PPSS_DSPS_PIPE_SIZE, |
| 3730 | .ddr_start = PPSS_DSPS_DDR_BASE, |
| 3731 | .ddr_size = PPSS_DSPS_DDR_SIZE, |
| 3732 | .smem_start = PPSS_SMEM_BASE, |
| 3733 | .smem_size = PPSS_SMEM_SIZE, |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 3734 | .signature = DSPS_SIGNATURE, |
| 3735 | }; |
| 3736 | |
| 3737 | static struct resource msm_dsps_resources[] = { |
| 3738 | { |
| 3739 | .start = PPSS_REG_PHYS_BASE, |
| 3740 | .end = PPSS_REG_PHYS_BASE + SZ_8K - 1, |
| 3741 | .name = "ppss_reg", |
| 3742 | .flags = IORESOURCE_MEM, |
| 3743 | }, |
Wentao Xu | a55500b | 2011-08-16 18:15:04 -0400 | [diff] [blame] | 3744 | { |
| 3745 | .start = PPSS_WDOG_TIMER_IRQ, |
| 3746 | .end = PPSS_WDOG_TIMER_IRQ, |
| 3747 | .name = "ppss_wdog", |
| 3748 | .flags = IORESOURCE_IRQ, |
| 3749 | }, |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 3750 | }; |
| 3751 | |
| 3752 | struct platform_device msm_dsps_device = { |
| 3753 | .name = "msm_dsps", |
| 3754 | .id = 0, |
| 3755 | .num_resources = ARRAY_SIZE(msm_dsps_resources), |
| 3756 | .resource = msm_dsps_resources, |
| 3757 | .dev.platform_data = &msm_dsps_pdata, |
| 3758 | }; |
| 3759 | |
| 3760 | #endif /* CONFIG_MSM_DSPS */ |
Pratik Patel | 7831c08 | 2011-06-08 21:44:37 -0700 | [diff] [blame] | 3761 | |
Pratik Patel | 3b0ca88 | 2012-06-01 16:54:14 -0700 | [diff] [blame] | 3762 | #define CORESIGHT_PHYS_BASE 0x01A00000 |
| 3763 | #define CORESIGHT_TPIU_PHYS_BASE (CORESIGHT_PHYS_BASE + 0x3000) |
| 3764 | #define CORESIGHT_ETB_PHYS_BASE (CORESIGHT_PHYS_BASE + 0x1000) |
| 3765 | #define CORESIGHT_FUNNEL_PHYS_BASE (CORESIGHT_PHYS_BASE + 0x4000) |
| 3766 | #define CORESIGHT_STM_PHYS_BASE (CORESIGHT_PHYS_BASE + 0x6000) |
| 3767 | #define CORESIGHT_ETM0_PHYS_BASE (CORESIGHT_PHYS_BASE + 0x1C000) |
| 3768 | #define CORESIGHT_ETM1_PHYS_BASE (CORESIGHT_PHYS_BASE + 0x1D000) |
Pratik Patel | 7831c08 | 2011-06-08 21:44:37 -0700 | [diff] [blame] | 3769 | |
Pratik Patel | 3b0ca88 | 2012-06-01 16:54:14 -0700 | [diff] [blame] | 3770 | #define CORESIGHT_STM_CHANNEL_PHYS_BASE (0x14000000 + 0x280000) |
Pratik Patel | 7831c08 | 2011-06-08 21:44:37 -0700 | [diff] [blame] | 3771 | |
Pratik Patel | 3b0ca88 | 2012-06-01 16:54:14 -0700 | [diff] [blame] | 3772 | static struct resource coresight_tpiu_resources[] = { |
Pratik Patel | 7831c08 | 2011-06-08 21:44:37 -0700 | [diff] [blame] | 3773 | { |
Pratik Patel | 3b0ca88 | 2012-06-01 16:54:14 -0700 | [diff] [blame] | 3774 | .start = CORESIGHT_TPIU_PHYS_BASE, |
| 3775 | .end = CORESIGHT_TPIU_PHYS_BASE + SZ_4K - 1, |
Pratik Patel | 7831c08 | 2011-06-08 21:44:37 -0700 | [diff] [blame] | 3776 | .flags = IORESOURCE_MEM, |
| 3777 | }, |
| 3778 | }; |
| 3779 | |
Pratik Patel | 3b0ca88 | 2012-06-01 16:54:14 -0700 | [diff] [blame] | 3780 | static struct coresight_platform_data coresight_tpiu_pdata = { |
| 3781 | .id = 0, |
| 3782 | .name = "coresight-tpiu", |
| 3783 | .nr_inports = 1, |
| 3784 | .nr_outports = 0, |
Pratik Patel | 7831c08 | 2011-06-08 21:44:37 -0700 | [diff] [blame] | 3785 | }; |
| 3786 | |
Pratik Patel | 3b0ca88 | 2012-06-01 16:54:14 -0700 | [diff] [blame] | 3787 | struct platform_device coresight_tpiu_device = { |
| 3788 | .name = "coresight-tpiu", |
| 3789 | .id = 0, |
| 3790 | .num_resources = ARRAY_SIZE(coresight_tpiu_resources), |
| 3791 | .resource = coresight_tpiu_resources, |
| 3792 | .dev = { |
| 3793 | .platform_data = &coresight_tpiu_pdata, |
| 3794 | }, |
| 3795 | }; |
| 3796 | |
| 3797 | static struct resource coresight_etb_resources[] = { |
Pratik Patel | 7831c08 | 2011-06-08 21:44:37 -0700 | [diff] [blame] | 3798 | { |
Pratik Patel | 3b0ca88 | 2012-06-01 16:54:14 -0700 | [diff] [blame] | 3799 | .start = CORESIGHT_ETB_PHYS_BASE, |
| 3800 | .end = CORESIGHT_ETB_PHYS_BASE + SZ_4K - 1, |
Pratik Patel | 7831c08 | 2011-06-08 21:44:37 -0700 | [diff] [blame] | 3801 | .flags = IORESOURCE_MEM, |
| 3802 | }, |
| 3803 | }; |
| 3804 | |
Pratik Patel | 3b0ca88 | 2012-06-01 16:54:14 -0700 | [diff] [blame] | 3805 | static struct coresight_platform_data coresight_etb_pdata = { |
| 3806 | .id = 1, |
| 3807 | .name = "coresight-etb", |
| 3808 | .nr_inports = 1, |
| 3809 | .nr_outports = 0, |
| 3810 | .default_sink = true, |
Pratik Patel | 7831c08 | 2011-06-08 21:44:37 -0700 | [diff] [blame] | 3811 | }; |
| 3812 | |
Pratik Patel | 3b0ca88 | 2012-06-01 16:54:14 -0700 | [diff] [blame] | 3813 | struct platform_device coresight_etb_device = { |
| 3814 | .name = "coresight-etb", |
| 3815 | .id = 0, |
| 3816 | .num_resources = ARRAY_SIZE(coresight_etb_resources), |
| 3817 | .resource = coresight_etb_resources, |
| 3818 | .dev = { |
| 3819 | .platform_data = &coresight_etb_pdata, |
| 3820 | }, |
| 3821 | }; |
| 3822 | |
| 3823 | static struct resource coresight_funnel_resources[] = { |
Pratik Patel | 7831c08 | 2011-06-08 21:44:37 -0700 | [diff] [blame] | 3824 | { |
Pratik Patel | 3b0ca88 | 2012-06-01 16:54:14 -0700 | [diff] [blame] | 3825 | .start = CORESIGHT_FUNNEL_PHYS_BASE, |
| 3826 | .end = CORESIGHT_FUNNEL_PHYS_BASE + SZ_4K - 1, |
Pratik Patel | 7831c08 | 2011-06-08 21:44:37 -0700 | [diff] [blame] | 3827 | .flags = IORESOURCE_MEM, |
| 3828 | }, |
| 3829 | }; |
| 3830 | |
Pratik Patel | 3b0ca88 | 2012-06-01 16:54:14 -0700 | [diff] [blame] | 3831 | static const int coresight_funnel_outports[] = { 0, 1 }; |
| 3832 | static const int coresight_funnel_child_ids[] = { 0, 1 }; |
| 3833 | static const int coresight_funnel_child_ports[] = { 0, 0 }; |
| 3834 | |
| 3835 | static struct coresight_platform_data coresight_funnel_pdata = { |
| 3836 | .id = 2, |
| 3837 | .name = "coresight-funnel", |
| 3838 | .nr_inports = 4, |
| 3839 | .outports = coresight_funnel_outports, |
| 3840 | .child_ids = coresight_funnel_child_ids, |
| 3841 | .child_ports = coresight_funnel_child_ports, |
| 3842 | .nr_outports = ARRAY_SIZE(coresight_funnel_outports), |
Pratik Patel | 7831c08 | 2011-06-08 21:44:37 -0700 | [diff] [blame] | 3843 | }; |
| 3844 | |
Pratik Patel | 3b0ca88 | 2012-06-01 16:54:14 -0700 | [diff] [blame] | 3845 | struct platform_device coresight_funnel_device = { |
| 3846 | .name = "coresight-funnel", |
| 3847 | .id = 0, |
| 3848 | .num_resources = ARRAY_SIZE(coresight_funnel_resources), |
| 3849 | .resource = coresight_funnel_resources, |
| 3850 | .dev = { |
| 3851 | .platform_data = &coresight_funnel_pdata, |
| 3852 | }, |
| 3853 | }; |
| 3854 | |
| 3855 | static struct resource coresight_stm_resources[] = { |
Pratik Patel | 7831c08 | 2011-06-08 21:44:37 -0700 | [diff] [blame] | 3856 | { |
Pratik Patel | 3b0ca88 | 2012-06-01 16:54:14 -0700 | [diff] [blame] | 3857 | .start = CORESIGHT_STM_PHYS_BASE, |
| 3858 | .end = CORESIGHT_STM_PHYS_BASE + SZ_4K - 1, |
| 3859 | .flags = IORESOURCE_MEM, |
| 3860 | }, |
| 3861 | { |
| 3862 | .start = CORESIGHT_STM_CHANNEL_PHYS_BASE, |
| 3863 | .end = CORESIGHT_STM_CHANNEL_PHYS_BASE + SZ_1M + SZ_512K - 1, |
Pratik Patel | 7831c08 | 2011-06-08 21:44:37 -0700 | [diff] [blame] | 3864 | .flags = IORESOURCE_MEM, |
| 3865 | }, |
| 3866 | }; |
| 3867 | |
Pratik Patel | 3b0ca88 | 2012-06-01 16:54:14 -0700 | [diff] [blame] | 3868 | static const int coresight_stm_outports[] = { 0 }; |
| 3869 | static const int coresight_stm_child_ids[] = { 2 }; |
| 3870 | static const int coresight_stm_child_ports[] = { 2 }; |
| 3871 | |
| 3872 | static struct coresight_platform_data coresight_stm_pdata = { |
| 3873 | .id = 3, |
| 3874 | .name = "coresight-stm", |
| 3875 | .nr_inports = 0, |
| 3876 | .outports = coresight_stm_outports, |
| 3877 | .child_ids = coresight_stm_child_ids, |
| 3878 | .child_ports = coresight_stm_child_ports, |
| 3879 | .nr_outports = ARRAY_SIZE(coresight_stm_outports), |
Pratik Patel | 7831c08 | 2011-06-08 21:44:37 -0700 | [diff] [blame] | 3880 | }; |
| 3881 | |
Pratik Patel | 3b0ca88 | 2012-06-01 16:54:14 -0700 | [diff] [blame] | 3882 | struct platform_device coresight_stm_device = { |
| 3883 | .name = "coresight-stm", |
| 3884 | .id = 0, |
| 3885 | .num_resources = ARRAY_SIZE(coresight_stm_resources), |
| 3886 | .resource = coresight_stm_resources, |
| 3887 | .dev = { |
| 3888 | .platform_data = &coresight_stm_pdata, |
| 3889 | }, |
| 3890 | }; |
| 3891 | |
| 3892 | static struct resource coresight_etm0_resources[] = { |
| 3893 | { |
| 3894 | .start = CORESIGHT_ETM0_PHYS_BASE, |
| 3895 | .end = CORESIGHT_ETM0_PHYS_BASE + SZ_4K - 1, |
| 3896 | .flags = IORESOURCE_MEM, |
| 3897 | }, |
| 3898 | }; |
| 3899 | |
| 3900 | static const int coresight_etm0_outports[] = { 0 }; |
| 3901 | static const int coresight_etm0_child_ids[] = { 2 }; |
| 3902 | static const int coresight_etm0_child_ports[] = { 0 }; |
| 3903 | |
| 3904 | static struct coresight_platform_data coresight_etm0_pdata = { |
| 3905 | .id = 4, |
| 3906 | .name = "coresight-etm0", |
| 3907 | .nr_inports = 0, |
| 3908 | .outports = coresight_etm0_outports, |
| 3909 | .child_ids = coresight_etm0_child_ids, |
| 3910 | .child_ports = coresight_etm0_child_ports, |
| 3911 | .nr_outports = ARRAY_SIZE(coresight_etm0_outports), |
| 3912 | }; |
| 3913 | |
| 3914 | struct platform_device coresight_etm0_device = { |
| 3915 | .name = "coresight-etm", |
| 3916 | .id = 0, |
| 3917 | .num_resources = ARRAY_SIZE(coresight_etm0_resources), |
| 3918 | .resource = coresight_etm0_resources, |
| 3919 | .dev = { |
| 3920 | .platform_data = &coresight_etm0_pdata, |
| 3921 | }, |
| 3922 | }; |
| 3923 | |
| 3924 | static struct resource coresight_etm1_resources[] = { |
| 3925 | { |
| 3926 | .start = CORESIGHT_ETM1_PHYS_BASE, |
| 3927 | .end = CORESIGHT_ETM1_PHYS_BASE + SZ_4K - 1, |
| 3928 | .flags = IORESOURCE_MEM, |
| 3929 | }, |
| 3930 | }; |
| 3931 | |
| 3932 | static const int coresight_etm1_outports[] = { 0 }; |
| 3933 | static const int coresight_etm1_child_ids[] = { 2 }; |
| 3934 | static const int coresight_etm1_child_ports[] = { 1 }; |
| 3935 | |
| 3936 | static struct coresight_platform_data coresight_etm1_pdata = { |
| 3937 | .id = 5, |
| 3938 | .name = "coresight-etm1", |
| 3939 | .nr_inports = 0, |
| 3940 | .outports = coresight_etm1_outports, |
| 3941 | .child_ids = coresight_etm1_child_ids, |
| 3942 | .child_ports = coresight_etm1_child_ports, |
| 3943 | .nr_outports = ARRAY_SIZE(coresight_etm1_outports), |
| 3944 | }; |
| 3945 | |
| 3946 | struct platform_device coresight_etm1_device = { |
| 3947 | .name = "coresight-etm", |
| 3948 | .id = 1, |
| 3949 | .num_resources = ARRAY_SIZE(coresight_etm1_resources), |
| 3950 | .resource = coresight_etm1_resources, |
| 3951 | .dev = { |
| 3952 | .platform_data = &coresight_etm1_pdata, |
| 3953 | }, |
| 3954 | }; |
Praveen Chidambaram | 8ea3dcd | 2011-12-07 14:46:31 -0700 | [diff] [blame] | 3955 | |
Stepan Moskovchenko | c055725 | 2012-06-07 17:39:14 -0700 | [diff] [blame] | 3956 | static struct resource msm_ebi1_ch0_erp_resources[] = { |
| 3957 | { |
| 3958 | .start = HSDDRX_EBI1CH0_IRQ, |
| 3959 | .flags = IORESOURCE_IRQ, |
| 3960 | }, |
| 3961 | { |
| 3962 | .start = 0x00A40000, |
| 3963 | .end = 0x00A40000 + SZ_4K - 1, |
| 3964 | .flags = IORESOURCE_MEM, |
| 3965 | }, |
| 3966 | }; |
| 3967 | |
| 3968 | struct platform_device msm8960_device_ebi1_ch0_erp = { |
| 3969 | .name = "msm_ebi_erp", |
| 3970 | .id = 0, |
| 3971 | .num_resources = ARRAY_SIZE(msm_ebi1_ch0_erp_resources), |
| 3972 | .resource = msm_ebi1_ch0_erp_resources, |
| 3973 | }; |
| 3974 | |
| 3975 | static struct resource msm_ebi1_ch1_erp_resources[] = { |
| 3976 | { |
| 3977 | .start = HSDDRX_EBI1CH1_IRQ, |
| 3978 | .flags = IORESOURCE_IRQ, |
| 3979 | }, |
| 3980 | { |
| 3981 | .start = 0x00D40000, |
| 3982 | .end = 0x00D40000 + SZ_4K - 1, |
| 3983 | .flags = IORESOURCE_MEM, |
| 3984 | }, |
| 3985 | }; |
| 3986 | |
| 3987 | struct platform_device msm8960_device_ebi1_ch1_erp = { |
| 3988 | .name = "msm_ebi_erp", |
| 3989 | .id = 1, |
| 3990 | .num_resources = ARRAY_SIZE(msm_ebi1_ch1_erp_resources), |
| 3991 | .resource = msm_ebi1_ch1_erp_resources, |
| 3992 | }; |
| 3993 | |
Praveen Chidambaram | 8ea3dcd | 2011-12-07 14:46:31 -0700 | [diff] [blame] | 3994 | static int msm8960_LPM_latency = 1000; /* >100 usec for WFI */ |
| 3995 | |
| 3996 | struct platform_device msm8960_cpu_idle_device = { |
| 3997 | .name = "msm_cpu_idle", |
| 3998 | .id = -1, |
| 3999 | .dev = { |
| 4000 | .platform_data = &msm8960_LPM_latency, |
| 4001 | }, |
| 4002 | }; |
Praveen Chidambaram | 5c8adf2 | 2012-02-23 18:44:37 -0700 | [diff] [blame] | 4003 | |
| 4004 | static struct msm_dcvs_freq_entry msm8960_freq[] = { |
| 4005 | { 384000, 166981, 345600}, |
| 4006 | { 702000, 213049, 632502}, |
| 4007 | {1026000, 285712, 925613}, |
| 4008 | {1242000, 383945, 1176550}, |
| 4009 | {1458000, 419729, 1465478}, |
| 4010 | {1512000, 434116, 1546674}, |
| 4011 | |
| 4012 | }; |
| 4013 | |
| 4014 | static struct msm_dcvs_core_info msm8960_core_info = { |
| 4015 | .freq_tbl = &msm8960_freq[0], |
| 4016 | .core_param = { |
| 4017 | .max_time_us = 100000, |
| 4018 | .num_freq = ARRAY_SIZE(msm8960_freq), |
| 4019 | }, |
| 4020 | .algo_param = { |
| 4021 | .slack_time_us = 58000, |
| 4022 | .scale_slack_time = 0, |
| 4023 | .scale_slack_time_pct = 0, |
| 4024 | .disable_pc_threshold = 1458000, |
| 4025 | .em_window_size = 100000, |
| 4026 | .em_max_util_pct = 97, |
| 4027 | .ss_window_size = 1000000, |
| 4028 | .ss_util_pct = 95, |
| 4029 | .ss_iobusy_conv = 100, |
| 4030 | }, |
| 4031 | }; |
| 4032 | |
| 4033 | struct platform_device msm8960_msm_gov_device = { |
| 4034 | .name = "msm_dcvs_gov", |
| 4035 | .id = -1, |
| 4036 | .dev = { |
| 4037 | .platform_data = &msm8960_core_info, |
| 4038 | }, |
| 4039 | }; |
Stepan Moskovchenko | 28662c5 | 2012-03-01 12:48:45 -0800 | [diff] [blame] | 4040 | |
| 4041 | static struct resource msm_cache_erp_resources[] = { |
| 4042 | { |
| 4043 | .name = "l1_irq", |
| 4044 | .start = SC_SICCPUXEXTFAULTIRPTREQ, |
| 4045 | .flags = IORESOURCE_IRQ, |
| 4046 | }, |
| 4047 | { |
| 4048 | .name = "l2_irq", |
| 4049 | .start = APCC_QGICL2IRPTREQ, |
| 4050 | .flags = IORESOURCE_IRQ, |
| 4051 | } |
| 4052 | }; |
| 4053 | |
| 4054 | struct platform_device msm8960_device_cache_erp = { |
| 4055 | .name = "msm_cache_erp", |
| 4056 | .id = -1, |
| 4057 | .num_resources = ARRAY_SIZE(msm_cache_erp_resources), |
| 4058 | .resource = msm_cache_erp_resources, |
| 4059 | }; |
Laura Abbott | 0577d7b | 2012-04-17 11:14:30 -0700 | [diff] [blame] | 4060 | |
| 4061 | struct msm_iommu_domain_name msm8960_iommu_ctx_names[] = { |
| 4062 | /* Camera */ |
| 4063 | { |
| 4064 | .name = "vpe_src", |
| 4065 | .domain = CAMERA_DOMAIN, |
| 4066 | }, |
| 4067 | /* Camera */ |
| 4068 | { |
| 4069 | .name = "vpe_dst", |
| 4070 | .domain = CAMERA_DOMAIN, |
| 4071 | }, |
| 4072 | /* Camera */ |
| 4073 | { |
| 4074 | .name = "vfe_imgwr", |
| 4075 | .domain = CAMERA_DOMAIN, |
| 4076 | }, |
| 4077 | /* Camera */ |
| 4078 | { |
| 4079 | .name = "vfe_misc", |
| 4080 | .domain = CAMERA_DOMAIN, |
| 4081 | }, |
| 4082 | /* Camera */ |
| 4083 | { |
| 4084 | .name = "ijpeg_src", |
| 4085 | .domain = CAMERA_DOMAIN, |
| 4086 | }, |
| 4087 | /* Camera */ |
| 4088 | { |
| 4089 | .name = "ijpeg_dst", |
| 4090 | .domain = CAMERA_DOMAIN, |
| 4091 | }, |
| 4092 | /* Camera */ |
| 4093 | { |
| 4094 | .name = "jpegd_src", |
| 4095 | .domain = CAMERA_DOMAIN, |
| 4096 | }, |
| 4097 | /* Camera */ |
| 4098 | { |
| 4099 | .name = "jpegd_dst", |
| 4100 | .domain = CAMERA_DOMAIN, |
| 4101 | }, |
Mayank Chopra | 9c4743f | 2012-06-27 15:31:43 +0530 | [diff] [blame] | 4102 | /* Rotator */ |
Laura Abbott | 0577d7b | 2012-04-17 11:14:30 -0700 | [diff] [blame] | 4103 | { |
| 4104 | .name = "rot_src", |
Olav Haugan | ef95ae3 | 2012-05-15 09:50:30 -0700 | [diff] [blame] | 4105 | .domain = ROTATOR_SRC_DOMAIN, |
Laura Abbott | 0577d7b | 2012-04-17 11:14:30 -0700 | [diff] [blame] | 4106 | }, |
Mayank Chopra | 9c4743f | 2012-06-27 15:31:43 +0530 | [diff] [blame] | 4107 | /* Rotator */ |
Laura Abbott | 0577d7b | 2012-04-17 11:14:30 -0700 | [diff] [blame] | 4108 | { |
| 4109 | .name = "rot_dst", |
Olav Haugan | ef95ae3 | 2012-05-15 09:50:30 -0700 | [diff] [blame] | 4110 | .domain = ROTATOR_SRC_DOMAIN, |
Laura Abbott | 0577d7b | 2012-04-17 11:14:30 -0700 | [diff] [blame] | 4111 | }, |
| 4112 | /* Video */ |
| 4113 | { |
| 4114 | .name = "vcodec_a_mm1", |
| 4115 | .domain = VIDEO_DOMAIN, |
| 4116 | }, |
| 4117 | /* Video */ |
| 4118 | { |
| 4119 | .name = "vcodec_b_mm2", |
| 4120 | .domain = VIDEO_DOMAIN, |
| 4121 | }, |
| 4122 | /* Video */ |
| 4123 | { |
| 4124 | .name = "vcodec_a_stream", |
| 4125 | .domain = VIDEO_DOMAIN, |
| 4126 | }, |
| 4127 | }; |
| 4128 | |
| 4129 | static struct mem_pool msm8960_video_pools[] = { |
| 4130 | /* |
| 4131 | * Video hardware has the following requirements: |
| 4132 | * 1. All video addresses used by the video hardware must be at a higher |
| 4133 | * address than video firmware address. |
| 4134 | * 2. Video hardware can only access a range of 256MB from the base of |
| 4135 | * the video firmware. |
| 4136 | */ |
| 4137 | [VIDEO_FIRMWARE_POOL] = |
| 4138 | /* Low addresses, intended for video firmware */ |
| 4139 | { |
| 4140 | .paddr = SZ_128K, |
| 4141 | .size = SZ_16M - SZ_128K, |
| 4142 | }, |
| 4143 | [VIDEO_MAIN_POOL] = |
| 4144 | /* Main video pool */ |
| 4145 | { |
| 4146 | .paddr = SZ_16M, |
| 4147 | .size = SZ_256M - SZ_16M, |
| 4148 | }, |
| 4149 | [GEN_POOL] = |
| 4150 | /* Remaining address space up to 2G */ |
| 4151 | { |
| 4152 | .paddr = SZ_256M, |
| 4153 | .size = SZ_2G - SZ_256M, |
| 4154 | }, |
| 4155 | }; |
| 4156 | |
| 4157 | static struct mem_pool msm8960_camera_pools[] = { |
| 4158 | [GEN_POOL] = |
| 4159 | /* One address space for camera */ |
| 4160 | { |
| 4161 | .paddr = SZ_128K, |
| 4162 | .size = SZ_2G - SZ_128K, |
| 4163 | }, |
| 4164 | }; |
| 4165 | |
Olav Haugan | ef95ae3 | 2012-05-15 09:50:30 -0700 | [diff] [blame] | 4166 | static struct mem_pool msm8960_display_read_pools[] = { |
Laura Abbott | 0577d7b | 2012-04-17 11:14:30 -0700 | [diff] [blame] | 4167 | [GEN_POOL] = |
Olav Haugan | ef95ae3 | 2012-05-15 09:50:30 -0700 | [diff] [blame] | 4168 | /* One address space for display reads */ |
Laura Abbott | 0577d7b | 2012-04-17 11:14:30 -0700 | [diff] [blame] | 4169 | { |
| 4170 | .paddr = SZ_128K, |
| 4171 | .size = SZ_2G - SZ_128K, |
| 4172 | }, |
| 4173 | }; |
| 4174 | |
Olav Haugan | ef95ae3 | 2012-05-15 09:50:30 -0700 | [diff] [blame] | 4175 | static struct mem_pool msm8960_rotator_src_pools[] = { |
Laura Abbott | 0577d7b | 2012-04-17 11:14:30 -0700 | [diff] [blame] | 4176 | [GEN_POOL] = |
Olav Haugan | ef95ae3 | 2012-05-15 09:50:30 -0700 | [diff] [blame] | 4177 | /* One address space for rotator src */ |
Laura Abbott | 0577d7b | 2012-04-17 11:14:30 -0700 | [diff] [blame] | 4178 | { |
| 4179 | .paddr = SZ_128K, |
| 4180 | .size = SZ_2G - SZ_128K, |
| 4181 | }, |
| 4182 | }; |
| 4183 | |
| 4184 | static struct msm_iommu_domain msm8960_iommu_domains[] = { |
| 4185 | [VIDEO_DOMAIN] = { |
| 4186 | .iova_pools = msm8960_video_pools, |
| 4187 | .npools = ARRAY_SIZE(msm8960_video_pools), |
| 4188 | }, |
| 4189 | [CAMERA_DOMAIN] = { |
| 4190 | .iova_pools = msm8960_camera_pools, |
| 4191 | .npools = ARRAY_SIZE(msm8960_camera_pools), |
| 4192 | }, |
Olav Haugan | ef95ae3 | 2012-05-15 09:50:30 -0700 | [diff] [blame] | 4193 | [DISPLAY_READ_DOMAIN] = { |
| 4194 | .iova_pools = msm8960_display_read_pools, |
| 4195 | .npools = ARRAY_SIZE(msm8960_display_read_pools), |
Laura Abbott | 0577d7b | 2012-04-17 11:14:30 -0700 | [diff] [blame] | 4196 | }, |
Olav Haugan | ef95ae3 | 2012-05-15 09:50:30 -0700 | [diff] [blame] | 4197 | [ROTATOR_SRC_DOMAIN] = { |
| 4198 | .iova_pools = msm8960_rotator_src_pools, |
| 4199 | .npools = ARRAY_SIZE(msm8960_rotator_src_pools), |
Laura Abbott | 0577d7b | 2012-04-17 11:14:30 -0700 | [diff] [blame] | 4200 | }, |
| 4201 | }; |
| 4202 | |
| 4203 | struct iommu_domains_pdata msm8960_iommu_domain_pdata = { |
| 4204 | .domains = msm8960_iommu_domains, |
| 4205 | .ndomains = ARRAY_SIZE(msm8960_iommu_domains), |
| 4206 | .domain_names = msm8960_iommu_ctx_names, |
| 4207 | .nnames = ARRAY_SIZE(msm8960_iommu_ctx_names), |
| 4208 | .domain_alloc_flags = 0, |
| 4209 | }; |
| 4210 | |
| 4211 | struct platform_device msm8960_iommu_domain_device = { |
| 4212 | .name = "iommu_domains", |
| 4213 | .id = -1, |
| 4214 | .dev = { |
| 4215 | .platform_data = &msm8960_iommu_domain_pdata, |
Laura Abbott | 532b2df | 2012-04-12 10:53:48 -0700 | [diff] [blame] | 4216 | } |
| 4217 | }; |
| 4218 | |
| 4219 | struct msm_rtb_platform_data msm8960_rtb_pdata = { |
| 4220 | .size = SZ_1M, |
| 4221 | }; |
| 4222 | |
| 4223 | static int __init msm_rtb_set_buffer_size(char *p) |
| 4224 | { |
| 4225 | int s; |
| 4226 | |
| 4227 | s = memparse(p, NULL); |
| 4228 | msm8960_rtb_pdata.size = ALIGN(s, SZ_4K); |
| 4229 | return 0; |
| 4230 | } |
| 4231 | early_param("msm_rtb_size", msm_rtb_set_buffer_size); |
| 4232 | |
| 4233 | |
| 4234 | struct platform_device msm8960_rtb_device = { |
| 4235 | .name = "msm_rtb", |
| 4236 | .id = -1, |
| 4237 | .dev = { |
| 4238 | .platform_data = &msm8960_rtb_pdata, |
Laura Abbott | 0577d7b | 2012-04-17 11:14:30 -0700 | [diff] [blame] | 4239 | }, |
| 4240 | }; |
Laura Abbott | 2ae8f36 | 2012-04-12 11:03:04 -0700 | [diff] [blame] | 4241 | |
Laura Abbott | 0a103cf | 2012-05-25 09:00:23 -0700 | [diff] [blame] | 4242 | #define MSM_8960_L1_SIZE SZ_1M |
| 4243 | /* |
| 4244 | * The actual L2 size is smaller but we need a larger buffer |
| 4245 | * size to store other dump information |
| 4246 | */ |
| 4247 | #define MSM_8960_L2_SIZE SZ_4M |
| 4248 | |
Laura Abbott | 2ae8f36 | 2012-04-12 11:03:04 -0700 | [diff] [blame] | 4249 | struct msm_cache_dump_platform_data msm8960_cache_dump_pdata = { |
Laura Abbott | 0a103cf | 2012-05-25 09:00:23 -0700 | [diff] [blame] | 4250 | .l2_size = MSM_8960_L2_SIZE, |
| 4251 | .l1_size = MSM_8960_L1_SIZE, |
Laura Abbott | 2ae8f36 | 2012-04-12 11:03:04 -0700 | [diff] [blame] | 4252 | }; |
| 4253 | |
| 4254 | struct platform_device msm8960_cache_dump_device = { |
| 4255 | .name = "msm_cache_dump", |
| 4256 | .id = -1, |
| 4257 | .dev = { |
| 4258 | .platform_data = &msm8960_cache_dump_pdata, |
| 4259 | }, |
| 4260 | }; |
Joel King | 0cbf5d8 | 2012-05-24 15:21:38 -0700 | [diff] [blame] | 4261 | |
| 4262 | #define MDM2AP_ERRFATAL 40 |
| 4263 | #define AP2MDM_ERRFATAL 80 |
| 4264 | #define MDM2AP_STATUS 24 |
| 4265 | #define AP2MDM_STATUS 77 |
| 4266 | #define AP2MDM_PMIC_PWR_EN 22 |
| 4267 | #define AP2MDM_KPDPWR_N 79 |
| 4268 | #define AP2MDM_SOFT_RESET 78 |
Ameya Thakur | 43248fd | 2012-07-10 18:50:52 -0700 | [diff] [blame] | 4269 | #define USB_SW 25 |
Joel King | 0cbf5d8 | 2012-05-24 15:21:38 -0700 | [diff] [blame] | 4270 | |
| 4271 | static struct resource sglte_resources[] = { |
| 4272 | { |
| 4273 | .start = MDM2AP_ERRFATAL, |
| 4274 | .end = MDM2AP_ERRFATAL, |
| 4275 | .name = "MDM2AP_ERRFATAL", |
| 4276 | .flags = IORESOURCE_IO, |
| 4277 | }, |
| 4278 | { |
| 4279 | .start = AP2MDM_ERRFATAL, |
| 4280 | .end = AP2MDM_ERRFATAL, |
| 4281 | .name = "AP2MDM_ERRFATAL", |
| 4282 | .flags = IORESOURCE_IO, |
| 4283 | }, |
| 4284 | { |
| 4285 | .start = MDM2AP_STATUS, |
| 4286 | .end = MDM2AP_STATUS, |
| 4287 | .name = "MDM2AP_STATUS", |
| 4288 | .flags = IORESOURCE_IO, |
| 4289 | }, |
| 4290 | { |
| 4291 | .start = AP2MDM_STATUS, |
| 4292 | .end = AP2MDM_STATUS, |
| 4293 | .name = "AP2MDM_STATUS", |
| 4294 | .flags = IORESOURCE_IO, |
| 4295 | }, |
| 4296 | { |
| 4297 | .start = AP2MDM_PMIC_PWR_EN, |
| 4298 | .end = AP2MDM_PMIC_PWR_EN, |
| 4299 | .name = "AP2MDM_PMIC_PWR_EN", |
| 4300 | .flags = IORESOURCE_IO, |
| 4301 | }, |
| 4302 | { |
| 4303 | .start = AP2MDM_KPDPWR_N, |
| 4304 | .end = AP2MDM_KPDPWR_N, |
| 4305 | .name = "AP2MDM_KPDPWR_N", |
| 4306 | .flags = IORESOURCE_IO, |
| 4307 | }, |
| 4308 | { |
| 4309 | .start = AP2MDM_SOFT_RESET, |
| 4310 | .end = AP2MDM_SOFT_RESET, |
| 4311 | .name = "AP2MDM_SOFT_RESET", |
| 4312 | .flags = IORESOURCE_IO, |
| 4313 | }, |
Ameya Thakur | 43248fd | 2012-07-10 18:50:52 -0700 | [diff] [blame] | 4314 | { |
| 4315 | .start = USB_SW, |
| 4316 | .end = USB_SW, |
| 4317 | .name = "USB_SW", |
| 4318 | .flags = IORESOURCE_IO, |
| 4319 | }, |
Joel King | 0cbf5d8 | 2012-05-24 15:21:38 -0700 | [diff] [blame] | 4320 | }; |
| 4321 | |
Rohit Vaswani | b1cc493 | 2012-07-23 21:30:11 -0700 | [diff] [blame] | 4322 | struct platform_device msm_gpio_device = { |
| 4323 | .name = "msmgpio", |
| 4324 | .id = -1, |
| 4325 | }; |
| 4326 | |
Joel King | 0cbf5d8 | 2012-05-24 15:21:38 -0700 | [diff] [blame] | 4327 | struct platform_device mdm_sglte_device = { |
| 4328 | .name = "mdm2_modem", |
| 4329 | .id = -1, |
| 4330 | .num_resources = ARRAY_SIZE(sglte_resources), |
| 4331 | .resource = sglte_resources, |
| 4332 | }; |
Arun Menon | 697e91b | 2012-08-20 15:25:50 -0700 | [diff] [blame] | 4333 | |
| 4334 | struct platform_device *msm8960_vidc_device[] __initdata = { |
| 4335 | &msm_device_vidc |
| 4336 | }; |
| 4337 | |
| 4338 | void __init msm8960_add_vidc_device(void) |
| 4339 | { |
| 4340 | if (cpu_is_msm8960ab()) { |
| 4341 | struct msm_vidc_platform_data *pdata; |
| 4342 | pdata = (struct msm_vidc_platform_data *) |
| 4343 | msm_device_vidc.dev.platform_data; |
| 4344 | pdata->vidc_bus_client_pdata = &vidc_pro_bus_client_data; |
| 4345 | } |
| 4346 | platform_add_devices(msm8960_vidc_device, |
| 4347 | ARRAY_SIZE(msm8960_vidc_device)); |
| 4348 | } |