Ralf Baechle | 832348f | 2007-10-18 01:10:12 +0100 | [diff] [blame] | 1 | /* |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2 | * This program is free software; you can redistribute it and/or modify it |
| 3 | * under the terms of the GNU General Public License as published by the |
| 4 | * Free Software Foundation; either version 2 of the License, or (at your |
| 5 | * option) any later version. |
| 6 | * |
| 7 | * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED |
| 8 | * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF |
| 9 | * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN |
| 10 | * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
| 11 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
| 12 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF |
| 13 | * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON |
| 14 | * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
| 15 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
| 16 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
| 17 | * |
| 18 | * You should have received a copy of the GNU General Public License along |
| 19 | * with this program; if not, write to the Free Software Foundation, Inc., |
| 20 | * 675 Mass Ave, Cambridge, MA 02139, USA. |
| 21 | * |
Ralf Baechle | 832348f | 2007-10-18 01:10:12 +0100 | [diff] [blame] | 22 | * Copyright 2001 MontaVista Software Inc. |
| 23 | * Author: MontaVista Software, Inc. |
| 24 | * ahennessy@mvista.com |
| 25 | * |
| 26 | * Copyright (C) 2000-2001 Toshiba Corporation |
| 27 | * Copyright (C) 2007 Ralf Baechle (ralf@linux-mips.org) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 28 | */ |
| 29 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 30 | #include <linux/init.h> |
| 31 | #include <linux/kernel.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 32 | #include <linux/types.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 33 | #include <linux/pci.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 34 | #include <linux/ioport.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 35 | #include <linux/delay.h> |
Ralf Baechle | fcdb27a | 2006-01-18 17:37:07 +0000 | [diff] [blame] | 36 | #include <linux/pm.h> |
Atsushi Nemoto | a0574e0 | 2007-03-01 00:40:21 +0900 | [diff] [blame] | 37 | #include <linux/platform_device.h> |
Atsushi Nemoto | 2064ba2 | 2007-11-24 01:20:27 +0900 | [diff] [blame] | 38 | #include <linux/clk.h> |
Atsushi Nemoto | 1bd0962 | 2008-04-05 00:56:27 +0900 | [diff] [blame^] | 39 | #include <linux/gpio.h> |
Ralf Baechle | 5eaf7a2 | 2005-03-04 17:24:32 +0000 | [diff] [blame] | 40 | #ifdef CONFIG_SERIAL_TXX9 |
Ralf Baechle | 5eaf7a2 | 2005-03-04 17:24:32 +0000 | [diff] [blame] | 41 | #include <linux/serial_core.h> |
| 42 | #endif |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 43 | |
Atsushi Nemoto | 229f773 | 2007-10-25 01:34:09 +0900 | [diff] [blame] | 44 | #include <asm/txx9tmr.h> |
Atsushi Nemoto | 1bd0962 | 2008-04-05 00:56:27 +0900 | [diff] [blame^] | 45 | #include <asm/txx9pio.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 46 | #include <asm/reboot.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 47 | #include <asm/jmr3927/jmr3927.h> |
| 48 | #include <asm/mipsregs.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 49 | |
Atsushi Nemoto | 2127435 | 2007-03-15 00:58:28 +0900 | [diff] [blame] | 50 | extern void puts(const char *cp); |
Ralf Baechle | 380b925 | 2005-11-19 21:51:56 +0000 | [diff] [blame] | 51 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 52 | /* don't enable - see errata */ |
Atsushi Nemoto | 2127435 | 2007-03-15 00:58:28 +0900 | [diff] [blame] | 53 | static int jmr3927_ccfg_toeon; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 54 | |
| 55 | static inline void do_reset(void) |
| 56 | { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 57 | #if 1 /* Resetting PCI bus */ |
| 58 | jmr3927_ioc_reg_out(0, JMR3927_IOC_RESET_ADDR); |
| 59 | jmr3927_ioc_reg_out(JMR3927_IOC_RESET_PCI, JMR3927_IOC_RESET_ADDR); |
| 60 | (void)jmr3927_ioc_reg_in(JMR3927_IOC_RESET_ADDR); /* flush WB */ |
| 61 | mdelay(1); |
| 62 | jmr3927_ioc_reg_out(0, JMR3927_IOC_RESET_ADDR); |
| 63 | #endif |
| 64 | jmr3927_ioc_reg_out(JMR3927_IOC_RESET_CPU, JMR3927_IOC_RESET_ADDR); |
| 65 | } |
| 66 | |
| 67 | static void jmr3927_machine_restart(char *command) |
| 68 | { |
| 69 | local_irq_disable(); |
| 70 | puts("Rebooting..."); |
| 71 | do_reset(); |
| 72 | } |
| 73 | |
| 74 | static void jmr3927_machine_halt(void) |
| 75 | { |
| 76 | puts("JMR-TX3927 halted.\n"); |
| 77 | while (1); |
| 78 | } |
| 79 | |
| 80 | static void jmr3927_machine_power_off(void) |
| 81 | { |
| 82 | puts("JMR-TX3927 halted. Please turn off the power.\n"); |
| 83 | while (1); |
| 84 | } |
| 85 | |
Ralf Baechle | 4b55048 | 2007-10-11 23:46:08 +0100 | [diff] [blame] | 86 | void __init plat_time_init(void) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 87 | { |
Atsushi Nemoto | 229f773 | 2007-10-25 01:34:09 +0900 | [diff] [blame] | 88 | txx9_clockevent_init(TX3927_TMR_REG(0), |
| 89 | TXX9_IRQ_BASE + JMR3927_IRQ_IRC_TMR(0), |
| 90 | JMR3927_IMCLK); |
| 91 | txx9_clocksource_init(TX3927_TMR_REG(1), JMR3927_IMCLK); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 92 | } |
| 93 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 94 | #define DO_WRITE_THROUGH |
| 95 | #define DO_ENABLE_CACHE |
| 96 | |
| 97 | extern char * __init prom_getcmdline(void); |
| 98 | static void jmr3927_board_init(void); |
| 99 | extern struct resource pci_io_resource; |
| 100 | extern struct resource pci_mem_resource; |
| 101 | |
Ralf Baechle | 2925aba | 2006-06-18 01:32:22 +0100 | [diff] [blame] | 102 | void __init plat_mem_setup(void) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 103 | { |
| 104 | char *argptr; |
| 105 | |
| 106 | set_io_port_base(JMR3927_PORT_BASE + JMR3927_PCIIO); |
| 107 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 108 | _machine_restart = jmr3927_machine_restart; |
| 109 | _machine_halt = jmr3927_machine_halt; |
Ralf Baechle | fcdb27a | 2006-01-18 17:37:07 +0000 | [diff] [blame] | 110 | pm_power_off = jmr3927_machine_power_off; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 111 | |
| 112 | /* |
| 113 | * IO/MEM resources. |
| 114 | */ |
| 115 | ioport_resource.start = pci_io_resource.start; |
| 116 | ioport_resource.end = pci_io_resource.end; |
Ralf Baechle | 5eaf7a2 | 2005-03-04 17:24:32 +0000 | [diff] [blame] | 117 | iomem_resource.start = 0; |
| 118 | iomem_resource.end = 0xffffffff; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 119 | |
| 120 | /* Reboot on panic */ |
| 121 | panic_timeout = 180; |
| 122 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 123 | /* cache setup */ |
| 124 | { |
| 125 | unsigned int conf; |
| 126 | #ifdef DO_ENABLE_CACHE |
| 127 | int mips_ic_disable = 0, mips_dc_disable = 0; |
| 128 | #else |
| 129 | int mips_ic_disable = 1, mips_dc_disable = 1; |
| 130 | #endif |
| 131 | #ifdef DO_WRITE_THROUGH |
| 132 | int mips_config_cwfon = 0; |
| 133 | int mips_config_wbon = 0; |
| 134 | #else |
| 135 | int mips_config_cwfon = 1; |
| 136 | int mips_config_wbon = 1; |
| 137 | #endif |
| 138 | |
| 139 | conf = read_c0_conf(); |
| 140 | conf &= ~(TX39_CONF_ICE | TX39_CONF_DCE | TX39_CONF_WBON | TX39_CONF_CWFON); |
| 141 | conf |= mips_ic_disable ? 0 : TX39_CONF_ICE; |
| 142 | conf |= mips_dc_disable ? 0 : TX39_CONF_DCE; |
| 143 | conf |= mips_config_wbon ? TX39_CONF_WBON : 0; |
| 144 | conf |= mips_config_cwfon ? TX39_CONF_CWFON : 0; |
| 145 | |
| 146 | write_c0_conf(conf); |
| 147 | write_c0_cache(0); |
| 148 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 149 | |
| 150 | /* initialize board */ |
| 151 | jmr3927_board_init(); |
| 152 | |
| 153 | argptr = prom_getcmdline(); |
| 154 | |
Atsushi Nemoto | 2127435 | 2007-03-15 00:58:28 +0900 | [diff] [blame] | 155 | if ((argptr = strstr(argptr, "toeon")) != NULL) |
| 156 | jmr3927_ccfg_toeon = 1; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 157 | argptr = prom_getcmdline(); |
| 158 | if ((argptr = strstr(argptr, "ip=")) == NULL) { |
| 159 | argptr = prom_getcmdline(); |
| 160 | strcat(argptr, " ip=bootp"); |
| 161 | } |
| 162 | |
Ralf Baechle | 5eaf7a2 | 2005-03-04 17:24:32 +0000 | [diff] [blame] | 163 | #ifdef CONFIG_SERIAL_TXX9 |
| 164 | { |
| 165 | extern int early_serial_txx9_setup(struct uart_port *port); |
| 166 | int i; |
| 167 | struct uart_port req; |
| 168 | for(i = 0; i < 2; i++) { |
| 169 | memset(&req, 0, sizeof(req)); |
| 170 | req.line = i; |
| 171 | req.iotype = UPIO_MEM; |
Atsushi Nemoto | 2127435 | 2007-03-15 00:58:28 +0900 | [diff] [blame] | 172 | req.membase = (unsigned char __iomem *)TX3927_SIO_REG(i); |
Ralf Baechle | 5eaf7a2 | 2005-03-04 17:24:32 +0000 | [diff] [blame] | 173 | req.mapbase = TX3927_SIO_REG(i); |
| 174 | req.irq = i == 0 ? |
| 175 | JMR3927_IRQ_IRC_SIO0 : JMR3927_IRQ_IRC_SIO1; |
| 176 | if (i == 0) |
| 177 | req.flags |= UPF_BUGGY_UART /*HAVE_CTS_LINE*/; |
| 178 | req.uartclk = JMR3927_IMCLK; |
| 179 | early_serial_txx9_setup(&req); |
| 180 | } |
| 181 | } |
| 182 | #ifdef CONFIG_SERIAL_TXX9_CONSOLE |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 183 | argptr = prom_getcmdline(); |
| 184 | if ((argptr = strstr(argptr, "console=")) == NULL) { |
| 185 | argptr = prom_getcmdline(); |
| 186 | strcat(argptr, " console=ttyS1,115200"); |
| 187 | } |
| 188 | #endif |
Ralf Baechle | 5eaf7a2 | 2005-03-04 17:24:32 +0000 | [diff] [blame] | 189 | #endif |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 190 | } |
| 191 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 192 | static void tx3927_setup(void); |
| 193 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 194 | static void __init jmr3927_board_init(void) |
| 195 | { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 196 | tx3927_setup(); |
| 197 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 198 | /* SIO0 DTR on */ |
| 199 | jmr3927_ioc_reg_out(0, JMR3927_IOC_DTR_ADDR); |
| 200 | |
| 201 | jmr3927_led_set(0); |
| 202 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 203 | printk("JMR-TX3927 (Rev %d) --- IOC(Rev %d) DIPSW:%d,%d,%d,%d\n", |
| 204 | jmr3927_ioc_reg_in(JMR3927_IOC_BREV_ADDR) & JMR3927_REV_MASK, |
| 205 | jmr3927_ioc_reg_in(JMR3927_IOC_REV_ADDR) & JMR3927_REV_MASK, |
| 206 | jmr3927_dipsw1(), jmr3927_dipsw2(), |
| 207 | jmr3927_dipsw3(), jmr3927_dipsw4()); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 208 | } |
| 209 | |
Atsushi Nemoto | 2127435 | 2007-03-15 00:58:28 +0900 | [diff] [blame] | 210 | static void __init tx3927_setup(void) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 211 | { |
| 212 | int i; |
Atsushi Nemoto | 2127435 | 2007-03-15 00:58:28 +0900 | [diff] [blame] | 213 | #ifdef CONFIG_PCI |
| 214 | unsigned long mips_pci_io_base = JMR3927_PCIIO; |
| 215 | unsigned long mips_pci_io_size = JMR3927_PCIIO_SIZE; |
| 216 | unsigned long mips_pci_mem_base = JMR3927_PCIMEM; |
| 217 | unsigned long mips_pci_mem_size = JMR3927_PCIMEM_SIZE; |
| 218 | /* for legacy I/O, PCI I/O PCI Bus address must be 0 */ |
| 219 | unsigned long mips_pci_io_pciaddr = 0; |
| 220 | #endif |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 221 | |
| 222 | /* SDRAMC are configured by PROM */ |
| 223 | |
| 224 | /* ROMC */ |
| 225 | tx3927_romcptr->cr[1] = JMR3927_ROMCE1 | 0x00030048; |
| 226 | tx3927_romcptr->cr[2] = JMR3927_ROMCE2 | 0x000064c8; |
| 227 | tx3927_romcptr->cr[3] = JMR3927_ROMCE3 | 0x0003f698; |
| 228 | tx3927_romcptr->cr[5] = JMR3927_ROMCE5 | 0x0000f218; |
| 229 | |
| 230 | /* CCFG */ |
| 231 | /* enable Timeout BusError */ |
| 232 | if (jmr3927_ccfg_toeon) |
| 233 | tx3927_ccfgptr->ccfg |= TX3927_CCFG_TOE; |
| 234 | |
| 235 | /* clear BusErrorOnWrite flag */ |
| 236 | tx3927_ccfgptr->ccfg &= ~TX3927_CCFG_BEOW; |
| 237 | /* Disable PCI snoop */ |
| 238 | tx3927_ccfgptr->ccfg &= ~TX3927_CCFG_PSNP; |
Atsushi Nemoto | 2064ba2 | 2007-11-24 01:20:27 +0900 | [diff] [blame] | 239 | /* do reset on watchdog */ |
| 240 | tx3927_ccfgptr->ccfg |= TX3927_CCFG_WR; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 241 | |
| 242 | #ifdef DO_WRITE_THROUGH |
| 243 | /* Enable PCI SNOOP - with write through only */ |
| 244 | tx3927_ccfgptr->ccfg |= TX3927_CCFG_PSNP; |
| 245 | #endif |
| 246 | |
| 247 | /* Pin selection */ |
| 248 | tx3927_ccfgptr->pcfg &= ~TX3927_PCFG_SELALL; |
| 249 | tx3927_ccfgptr->pcfg |= |
| 250 | TX3927_PCFG_SELSIOC(0) | TX3927_PCFG_SELSIO_ALL | |
| 251 | (TX3927_PCFG_SELDMA_ALL & ~TX3927_PCFG_SELDMA(1)); |
| 252 | |
| 253 | printk("TX3927 -- CRIR:%08lx CCFG:%08lx PCFG:%08lx\n", |
| 254 | tx3927_ccfgptr->crir, |
| 255 | tx3927_ccfgptr->ccfg, tx3927_ccfgptr->pcfg); |
| 256 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 257 | /* TMR */ |
Atsushi Nemoto | 229f773 | 2007-10-25 01:34:09 +0900 | [diff] [blame] | 258 | for (i = 0; i < TX3927_NR_TMR; i++) |
| 259 | txx9_tmr_init(TX3927_TMR_REG(i)); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 260 | |
| 261 | /* DMA */ |
| 262 | tx3927_dmaptr->mcr = 0; |
Ahmed S. Darwish | 25b8ac3 | 2007-02-05 04:42:11 +0200 | [diff] [blame] | 263 | for (i = 0; i < ARRAY_SIZE(tx3927_dmaptr->ch); i++) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 264 | /* reset channel */ |
| 265 | tx3927_dmaptr->ch[i].ccr = TX3927_DMA_CCR_CHRST; |
| 266 | tx3927_dmaptr->ch[i].ccr = 0; |
| 267 | } |
| 268 | /* enable DMA */ |
| 269 | #ifdef __BIG_ENDIAN |
| 270 | tx3927_dmaptr->mcr = TX3927_DMA_MCR_MSTEN; |
| 271 | #else |
| 272 | tx3927_dmaptr->mcr = TX3927_DMA_MCR_MSTEN | TX3927_DMA_MCR_LE; |
| 273 | #endif |
| 274 | |
| 275 | #ifdef CONFIG_PCI |
| 276 | /* PCIC */ |
| 277 | printk("TX3927 PCIC -- DID:%04x VID:%04x RID:%02x Arbiter:", |
| 278 | tx3927_pcicptr->did, tx3927_pcicptr->vid, |
| 279 | tx3927_pcicptr->rid); |
| 280 | if (!(tx3927_ccfgptr->ccfg & TX3927_CCFG_PCIXARB)) { |
| 281 | printk("External\n"); |
| 282 | /* XXX */ |
| 283 | } else { |
| 284 | printk("Internal\n"); |
| 285 | |
| 286 | /* Reset PCI Bus */ |
| 287 | jmr3927_ioc_reg_out(0, JMR3927_IOC_RESET_ADDR); |
| 288 | udelay(100); |
| 289 | jmr3927_ioc_reg_out(JMR3927_IOC_RESET_PCI, |
| 290 | JMR3927_IOC_RESET_ADDR); |
| 291 | udelay(100); |
| 292 | jmr3927_ioc_reg_out(0, JMR3927_IOC_RESET_ADDR); |
| 293 | |
| 294 | |
| 295 | /* Disable External PCI Config. Access */ |
| 296 | tx3927_pcicptr->lbc = TX3927_PCIC_LBC_EPCAD; |
| 297 | #ifdef __BIG_ENDIAN |
| 298 | tx3927_pcicptr->lbc |= TX3927_PCIC_LBC_IBSE | |
| 299 | TX3927_PCIC_LBC_TIBSE | |
| 300 | TX3927_PCIC_LBC_TMFBSE | TX3927_PCIC_LBC_MSDSE; |
| 301 | #endif |
| 302 | /* LB->PCI mappings */ |
| 303 | tx3927_pcicptr->iomas = ~(mips_pci_io_size - 1); |
| 304 | tx3927_pcicptr->ilbioma = mips_pci_io_base; |
| 305 | tx3927_pcicptr->ipbioma = mips_pci_io_pciaddr; |
| 306 | tx3927_pcicptr->mmas = ~(mips_pci_mem_size - 1); |
| 307 | tx3927_pcicptr->ilbmma = mips_pci_mem_base; |
| 308 | tx3927_pcicptr->ipbmma = mips_pci_mem_base; |
| 309 | /* PCI->LB mappings */ |
| 310 | tx3927_pcicptr->iobas = 0xffffffff; |
| 311 | tx3927_pcicptr->ioba = 0; |
| 312 | tx3927_pcicptr->tlbioma = 0; |
| 313 | tx3927_pcicptr->mbas = ~(mips_pci_mem_size - 1); |
| 314 | tx3927_pcicptr->mba = 0; |
| 315 | tx3927_pcicptr->tlbmma = 0; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 316 | /* Enable Direct mapping Address Space Decoder */ |
| 317 | tx3927_pcicptr->lbc |= TX3927_PCIC_LBC_ILMDE | TX3927_PCIC_LBC_ILIDE; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 318 | |
| 319 | /* Clear All Local Bus Status */ |
| 320 | tx3927_pcicptr->lbstat = TX3927_PCIC_LBIM_ALL; |
| 321 | /* Enable All Local Bus Interrupts */ |
| 322 | tx3927_pcicptr->lbim = TX3927_PCIC_LBIM_ALL; |
| 323 | /* Clear All PCI Status Error */ |
| 324 | tx3927_pcicptr->pcistat = TX3927_PCIC_PCISTATIM_ALL; |
| 325 | /* Enable All PCI Status Error Interrupts */ |
| 326 | tx3927_pcicptr->pcistatim = TX3927_PCIC_PCISTATIM_ALL; |
| 327 | |
| 328 | /* PCIC Int => IRC IRQ10 */ |
| 329 | tx3927_pcicptr->il = TX3927_IR_PCI; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 330 | /* Target Control (per errata) */ |
| 331 | tx3927_pcicptr->tc = TX3927_PCIC_TC_OF8E | TX3927_PCIC_TC_IF8E; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 332 | |
| 333 | /* Enable Bus Arbiter */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 334 | tx3927_pcicptr->pbapmc = TX3927_PCIC_PBAPMC_PBAEN; |
| 335 | |
| 336 | tx3927_pcicptr->pcicmd = PCI_COMMAND_MASTER | |
| 337 | PCI_COMMAND_MEMORY | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 338 | PCI_COMMAND_IO | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 339 | PCI_COMMAND_PARITY | PCI_COMMAND_SERR; |
| 340 | } |
| 341 | #endif /* CONFIG_PCI */ |
| 342 | |
| 343 | /* PIO */ |
| 344 | /* PIO[15:12] connected to LEDs */ |
Atsushi Nemoto | 1bd0962 | 2008-04-05 00:56:27 +0900 | [diff] [blame^] | 345 | __raw_writel(0x0000f000, &tx3927_pioptr->dir); |
| 346 | __raw_writel(0, &tx3927_pioptr->maskcpu); |
| 347 | __raw_writel(0, &tx3927_pioptr->maskext); |
| 348 | txx9_gpio_init(TX3927_PIO_REG, 0, 16); |
| 349 | gpio_request(11, "dipsw1"); |
| 350 | gpio_request(10, "dipsw2"); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 351 | { |
| 352 | unsigned int conf; |
| 353 | |
| 354 | conf = read_c0_conf(); |
| 355 | if (!(conf & TX39_CONF_ICE)) |
| 356 | printk("TX3927 I-Cache disabled.\n"); |
| 357 | if (!(conf & TX39_CONF_DCE)) |
| 358 | printk("TX3927 D-Cache disabled.\n"); |
| 359 | else if (!(conf & TX39_CONF_WBON)) |
| 360 | printk("TX3927 D-Cache WriteThrough.\n"); |
| 361 | else if (!(conf & TX39_CONF_CWFON)) |
| 362 | printk("TX3927 D-Cache WriteBack.\n"); |
| 363 | else |
| 364 | printk("TX3927 D-Cache WriteBack (CWF) .\n"); |
| 365 | } |
| 366 | } |
Atsushi Nemoto | a0574e0 | 2007-03-01 00:40:21 +0900 | [diff] [blame] | 367 | |
| 368 | /* This trick makes rtc-ds1742 driver usable as is. */ |
| 369 | unsigned long __swizzle_addr_b(unsigned long port) |
| 370 | { |
| 371 | if ((port & 0xffff0000) != JMR3927_IOC_NVRAMB_ADDR) |
| 372 | return port; |
| 373 | port = (port & 0xffff0000) | (port & 0x7fff << 1); |
| 374 | #ifdef __BIG_ENDIAN |
| 375 | return port; |
| 376 | #else |
| 377 | return port | 1; |
| 378 | #endif |
| 379 | } |
| 380 | EXPORT_SYMBOL(__swizzle_addr_b); |
| 381 | |
| 382 | static int __init jmr3927_rtc_init(void) |
| 383 | { |
Atsushi Nemoto | 4614c32 | 2007-05-01 01:49:20 +0900 | [diff] [blame] | 384 | static struct resource __initdata res = { |
Atsushi Nemoto | a0574e0 | 2007-03-01 00:40:21 +0900 | [diff] [blame] | 385 | .start = JMR3927_IOC_NVRAMB_ADDR - IO_BASE, |
| 386 | .end = JMR3927_IOC_NVRAMB_ADDR - IO_BASE + 0x800 - 1, |
| 387 | .flags = IORESOURCE_MEM, |
| 388 | }; |
| 389 | struct platform_device *dev; |
Atsushi Nemoto | a95e23a | 2007-10-16 01:28:18 -0700 | [diff] [blame] | 390 | dev = platform_device_register_simple("rtc-ds1742", -1, &res, 1); |
Atsushi Nemoto | a0574e0 | 2007-03-01 00:40:21 +0900 | [diff] [blame] | 391 | return IS_ERR(dev) ? PTR_ERR(dev) : 0; |
| 392 | } |
| 393 | device_initcall(jmr3927_rtc_init); |
Atsushi Nemoto | 2064ba2 | 2007-11-24 01:20:27 +0900 | [diff] [blame] | 394 | |
| 395 | /* Watchdog support */ |
| 396 | |
| 397 | static int __init txx9_wdt_init(unsigned long base) |
| 398 | { |
| 399 | struct resource res = { |
| 400 | .start = base, |
| 401 | .end = base + 0x100 - 1, |
| 402 | .flags = IORESOURCE_MEM, |
| 403 | }; |
| 404 | struct platform_device *dev = |
| 405 | platform_device_register_simple("txx9wdt", -1, &res, 1); |
| 406 | return IS_ERR(dev) ? PTR_ERR(dev) : 0; |
| 407 | } |
| 408 | |
| 409 | static int __init jmr3927_wdt_init(void) |
| 410 | { |
| 411 | return txx9_wdt_init(TX3927_TMR_REG(2)); |
| 412 | } |
| 413 | device_initcall(jmr3927_wdt_init); |
| 414 | |
| 415 | /* Minimum CLK support */ |
| 416 | |
| 417 | struct clk *clk_get(struct device *dev, const char *id) |
| 418 | { |
| 419 | if (!strcmp(id, "imbus_clk")) |
| 420 | return (struct clk *)JMR3927_IMCLK; |
| 421 | return ERR_PTR(-ENOENT); |
| 422 | } |
| 423 | EXPORT_SYMBOL(clk_get); |
| 424 | |
| 425 | int clk_enable(struct clk *clk) |
| 426 | { |
| 427 | return 0; |
| 428 | } |
| 429 | EXPORT_SYMBOL(clk_enable); |
| 430 | |
| 431 | void clk_disable(struct clk *clk) |
| 432 | { |
| 433 | } |
| 434 | EXPORT_SYMBOL(clk_disable); |
| 435 | |
| 436 | unsigned long clk_get_rate(struct clk *clk) |
| 437 | { |
| 438 | return (unsigned long)clk; |
| 439 | } |
| 440 | EXPORT_SYMBOL(clk_get_rate); |
| 441 | |
| 442 | void clk_put(struct clk *clk) |
| 443 | { |
| 444 | } |
| 445 | EXPORT_SYMBOL(clk_put); |