Russell King | 5e742ad | 2005-08-18 10:08:15 +0100 | [diff] [blame] | 1 | /* |
| 2 | * linux/drivers/mfd/mcp-sa11x0.c |
| 3 | * |
| 4 | * Copyright (C) 2001-2005 Russell King |
| 5 | * |
| 6 | * This program is free software; you can redistribute it and/or modify |
| 7 | * it under the terms of the GNU General Public License as published by |
| 8 | * the Free Software Foundation; either version 2 of the License. |
| 9 | * |
| 10 | * SA11x0 MCP (Multimedia Communications Port) driver. |
| 11 | * |
| 12 | * MCP read/write timeouts from Jordi Colomer, rehacked by rmk. |
| 13 | */ |
| 14 | #include <linux/module.h> |
| 15 | #include <linux/init.h> |
Russell King | 45c7f75 | 2012-01-20 23:09:42 +0000 | [diff] [blame] | 16 | #include <linux/io.h> |
Russell King | 5e742ad | 2005-08-18 10:08:15 +0100 | [diff] [blame] | 17 | #include <linux/errno.h> |
| 18 | #include <linux/kernel.h> |
| 19 | #include <linux/delay.h> |
| 20 | #include <linux/spinlock.h> |
Russell King | d052d1b | 2005-10-29 19:07:23 +0100 | [diff] [blame] | 21 | #include <linux/platform_device.h> |
Russell King | 2796e39 | 2012-01-21 09:34:30 +0000 | [diff] [blame^] | 22 | #include <linux/pm.h> |
Thomas Kunze | c8602ed | 2009-02-10 14:54:57 +0100 | [diff] [blame] | 23 | #include <linux/mfd/mcp.h> |
Russell King | 5e742ad | 2005-08-18 10:08:15 +0100 | [diff] [blame] | 24 | |
Russell King | a09e64f | 2008-08-05 16:14:15 +0100 | [diff] [blame] | 25 | #include <mach/hardware.h> |
Russell King | 5e742ad | 2005-08-18 10:08:15 +0100 | [diff] [blame] | 26 | #include <asm/mach-types.h> |
| 27 | #include <asm/system.h> |
Russell King | a09e64f | 2008-08-05 16:14:15 +0100 | [diff] [blame] | 28 | #include <mach/mcp.h> |
Russell King | 5e742ad | 2005-08-18 10:08:15 +0100 | [diff] [blame] | 29 | |
Russell King | 216f63c | 2012-01-20 17:37:21 +0000 | [diff] [blame] | 30 | #include <mach/assabet.h> |
| 31 | |
Russell King | c4592ce | 2012-01-20 22:30:15 +0000 | [diff] [blame] | 32 | #define DRIVER_NAME "sa11x0-mcp" |
Russell King | 5e742ad | 2005-08-18 10:08:15 +0100 | [diff] [blame] | 33 | |
| 34 | struct mcp_sa11x0 { |
Russell King | 45c7f75 | 2012-01-20 23:09:42 +0000 | [diff] [blame] | 35 | void __iomem *base0; |
| 36 | void __iomem *base1; |
| 37 | u32 mccr0; |
| 38 | u32 mccr1; |
Russell King | 5e742ad | 2005-08-18 10:08:15 +0100 | [diff] [blame] | 39 | }; |
| 40 | |
Russell King | 45c7f75 | 2012-01-20 23:09:42 +0000 | [diff] [blame] | 41 | /* Register offsets */ |
| 42 | #define MCCR0(m) ((m)->base0 + 0x00) |
| 43 | #define MCDR0(m) ((m)->base0 + 0x08) |
| 44 | #define MCDR1(m) ((m)->base0 + 0x0c) |
| 45 | #define MCDR2(m) ((m)->base0 + 0x10) |
| 46 | #define MCSR(m) ((m)->base0 + 0x18) |
| 47 | #define MCCR1(m) ((m)->base1 + 0x00) |
| 48 | |
Russell King | 5e742ad | 2005-08-18 10:08:15 +0100 | [diff] [blame] | 49 | #define priv(mcp) ((struct mcp_sa11x0 *)mcp_priv(mcp)) |
| 50 | |
| 51 | static void |
| 52 | mcp_sa11x0_set_telecom_divisor(struct mcp *mcp, unsigned int divisor) |
| 53 | { |
Russell King | 45c7f75 | 2012-01-20 23:09:42 +0000 | [diff] [blame] | 54 | struct mcp_sa11x0 *m = priv(mcp); |
Russell King | 5e742ad | 2005-08-18 10:08:15 +0100 | [diff] [blame] | 55 | |
| 56 | divisor /= 32; |
| 57 | |
Russell King | 45c7f75 | 2012-01-20 23:09:42 +0000 | [diff] [blame] | 58 | m->mccr0 &= ~0x00007f00; |
| 59 | m->mccr0 |= divisor << 8; |
| 60 | writel_relaxed(m->mccr0, MCCR0(m)); |
Russell King | 5e742ad | 2005-08-18 10:08:15 +0100 | [diff] [blame] | 61 | } |
| 62 | |
| 63 | static void |
| 64 | mcp_sa11x0_set_audio_divisor(struct mcp *mcp, unsigned int divisor) |
| 65 | { |
Russell King | 45c7f75 | 2012-01-20 23:09:42 +0000 | [diff] [blame] | 66 | struct mcp_sa11x0 *m = priv(mcp); |
Russell King | 5e742ad | 2005-08-18 10:08:15 +0100 | [diff] [blame] | 67 | |
| 68 | divisor /= 32; |
| 69 | |
Russell King | 45c7f75 | 2012-01-20 23:09:42 +0000 | [diff] [blame] | 70 | m->mccr0 &= ~0x0000007f; |
| 71 | m->mccr0 |= divisor; |
| 72 | writel_relaxed(m->mccr0, MCCR0(m)); |
Russell King | 5e742ad | 2005-08-18 10:08:15 +0100 | [diff] [blame] | 73 | } |
| 74 | |
| 75 | /* |
| 76 | * Write data to the device. The bit should be set after 3 subframe |
| 77 | * times (each frame is 64 clocks). We wait a maximum of 6 subframes. |
| 78 | * We really should try doing something more productive while we |
| 79 | * wait. |
| 80 | */ |
| 81 | static void |
| 82 | mcp_sa11x0_write(struct mcp *mcp, unsigned int reg, unsigned int val) |
| 83 | { |
Russell King | 45c7f75 | 2012-01-20 23:09:42 +0000 | [diff] [blame] | 84 | struct mcp_sa11x0 *m = priv(mcp); |
Russell King | 5e742ad | 2005-08-18 10:08:15 +0100 | [diff] [blame] | 85 | int ret = -ETIME; |
| 86 | int i; |
| 87 | |
Russell King | 45c7f75 | 2012-01-20 23:09:42 +0000 | [diff] [blame] | 88 | writel_relaxed(reg << 17 | MCDR2_Wr | (val & 0xffff), MCDR2(m)); |
Russell King | 5e742ad | 2005-08-18 10:08:15 +0100 | [diff] [blame] | 89 | |
| 90 | for (i = 0; i < 2; i++) { |
| 91 | udelay(mcp->rw_timeout); |
Russell King | 45c7f75 | 2012-01-20 23:09:42 +0000 | [diff] [blame] | 92 | if (readl_relaxed(MCSR(m)) & MCSR_CWC) { |
Russell King | 5e742ad | 2005-08-18 10:08:15 +0100 | [diff] [blame] | 93 | ret = 0; |
| 94 | break; |
| 95 | } |
| 96 | } |
| 97 | |
| 98 | if (ret < 0) |
| 99 | printk(KERN_WARNING "mcp: write timed out\n"); |
| 100 | } |
| 101 | |
| 102 | /* |
| 103 | * Read data from the device. The bit should be set after 3 subframe |
| 104 | * times (each frame is 64 clocks). We wait a maximum of 6 subframes. |
| 105 | * We really should try doing something more productive while we |
| 106 | * wait. |
| 107 | */ |
| 108 | static unsigned int |
| 109 | mcp_sa11x0_read(struct mcp *mcp, unsigned int reg) |
| 110 | { |
Russell King | 45c7f75 | 2012-01-20 23:09:42 +0000 | [diff] [blame] | 111 | struct mcp_sa11x0 *m = priv(mcp); |
Russell King | 5e742ad | 2005-08-18 10:08:15 +0100 | [diff] [blame] | 112 | int ret = -ETIME; |
| 113 | int i; |
| 114 | |
Russell King | 45c7f75 | 2012-01-20 23:09:42 +0000 | [diff] [blame] | 115 | writel_relaxed(reg << 17 | MCDR2_Rd, MCDR2(m)); |
Russell King | 5e742ad | 2005-08-18 10:08:15 +0100 | [diff] [blame] | 116 | |
| 117 | for (i = 0; i < 2; i++) { |
| 118 | udelay(mcp->rw_timeout); |
Russell King | 45c7f75 | 2012-01-20 23:09:42 +0000 | [diff] [blame] | 119 | if (readl_relaxed(MCSR(m)) & MCSR_CRC) { |
| 120 | ret = readl_relaxed(MCDR2(m)) & 0xffff; |
Russell King | 5e742ad | 2005-08-18 10:08:15 +0100 | [diff] [blame] | 121 | break; |
| 122 | } |
| 123 | } |
| 124 | |
| 125 | if (ret < 0) |
| 126 | printk(KERN_WARNING "mcp: read timed out\n"); |
| 127 | |
| 128 | return ret; |
| 129 | } |
| 130 | |
| 131 | static void mcp_sa11x0_enable(struct mcp *mcp) |
| 132 | { |
Russell King | 45c7f75 | 2012-01-20 23:09:42 +0000 | [diff] [blame] | 133 | struct mcp_sa11x0 *m = priv(mcp); |
| 134 | |
| 135 | writel(-1, MCSR(m)); |
| 136 | m->mccr0 |= MCCR0_MCE; |
| 137 | writel_relaxed(m->mccr0, MCCR0(m)); |
Russell King | 5e742ad | 2005-08-18 10:08:15 +0100 | [diff] [blame] | 138 | } |
| 139 | |
| 140 | static void mcp_sa11x0_disable(struct mcp *mcp) |
| 141 | { |
Russell King | 45c7f75 | 2012-01-20 23:09:42 +0000 | [diff] [blame] | 142 | struct mcp_sa11x0 *m = priv(mcp); |
| 143 | |
| 144 | m->mccr0 &= ~MCCR0_MCE; |
| 145 | writel_relaxed(m->mccr0, MCCR0(m)); |
Russell King | 5e742ad | 2005-08-18 10:08:15 +0100 | [diff] [blame] | 146 | } |
| 147 | |
| 148 | /* |
| 149 | * Our methods. |
| 150 | */ |
| 151 | static struct mcp_ops mcp_sa11x0 = { |
| 152 | .set_telecom_divisor = mcp_sa11x0_set_telecom_divisor, |
| 153 | .set_audio_divisor = mcp_sa11x0_set_audio_divisor, |
| 154 | .reg_write = mcp_sa11x0_write, |
| 155 | .reg_read = mcp_sa11x0_read, |
| 156 | .enable = mcp_sa11x0_enable, |
| 157 | .disable = mcp_sa11x0_disable, |
| 158 | }; |
| 159 | |
Russell King | 45c7f75 | 2012-01-20 23:09:42 +0000 | [diff] [blame] | 160 | static int mcp_sa11x0_probe(struct platform_device *dev) |
Russell King | 5e742ad | 2005-08-18 10:08:15 +0100 | [diff] [blame] | 161 | { |
Russell King | 45c7f75 | 2012-01-20 23:09:42 +0000 | [diff] [blame] | 162 | struct mcp_plat_data *data = dev->dev.platform_data; |
| 163 | struct resource *mem0, *mem1; |
| 164 | struct mcp_sa11x0 *m; |
Russell King | 5e742ad | 2005-08-18 10:08:15 +0100 | [diff] [blame] | 165 | struct mcp *mcp; |
| 166 | int ret; |
| 167 | |
Russell King | 323cdfc | 2005-08-18 10:10:46 +0100 | [diff] [blame] | 168 | if (!data) |
Russell King | 5e742ad | 2005-08-18 10:08:15 +0100 | [diff] [blame] | 169 | return -ENODEV; |
| 170 | |
Russell King | 45c7f75 | 2012-01-20 23:09:42 +0000 | [diff] [blame] | 171 | mem0 = platform_get_resource(dev, IORESOURCE_MEM, 0); |
| 172 | mem1 = platform_get_resource(dev, IORESOURCE_MEM, 1); |
| 173 | if (!mem0 || !mem1) |
| 174 | return -ENXIO; |
Russell King | 5e742ad | 2005-08-18 10:08:15 +0100 | [diff] [blame] | 175 | |
Russell King | 45c7f75 | 2012-01-20 23:09:42 +0000 | [diff] [blame] | 176 | if (!request_mem_region(mem0->start, resource_size(mem0), |
| 177 | DRIVER_NAME)) { |
| 178 | ret = -EBUSY; |
| 179 | goto err_mem0; |
| 180 | } |
| 181 | |
| 182 | if (!request_mem_region(mem1->start, resource_size(mem1), |
| 183 | DRIVER_NAME)) { |
| 184 | ret = -EBUSY; |
| 185 | goto err_mem1; |
| 186 | } |
| 187 | |
| 188 | mcp = mcp_host_alloc(&dev->dev, sizeof(struct mcp_sa11x0)); |
Russell King | 5e742ad | 2005-08-18 10:08:15 +0100 | [diff] [blame] | 189 | if (!mcp) { |
| 190 | ret = -ENOMEM; |
Russell King | 45c7f75 | 2012-01-20 23:09:42 +0000 | [diff] [blame] | 191 | goto err_alloc; |
Russell King | 5e742ad | 2005-08-18 10:08:15 +0100 | [diff] [blame] | 192 | } |
| 193 | |
| 194 | mcp->owner = THIS_MODULE; |
| 195 | mcp->ops = &mcp_sa11x0; |
Russell King | 323cdfc | 2005-08-18 10:10:46 +0100 | [diff] [blame] | 196 | mcp->sclk_rate = data->sclk_rate; |
Russell King | 65f2e75 | 2012-01-20 17:38:58 +0000 | [diff] [blame] | 197 | mcp->gpio_base = data->gpio_base; |
Russell King | 5e742ad | 2005-08-18 10:08:15 +0100 | [diff] [blame] | 198 | |
Russell King | 45c7f75 | 2012-01-20 23:09:42 +0000 | [diff] [blame] | 199 | m = priv(mcp); |
| 200 | m->mccr0 = data->mccr0 | 0x7f7f; |
| 201 | m->mccr1 = data->mccr1; |
| 202 | |
| 203 | m->base0 = ioremap(mem0->start, resource_size(mem0)); |
| 204 | m->base1 = ioremap(mem1->start, resource_size(mem1)); |
| 205 | if (!m->base0 || !m->base1) { |
| 206 | ret = -ENOMEM; |
| 207 | goto err_ioremap; |
| 208 | } |
| 209 | |
| 210 | platform_set_drvdata(dev, mcp); |
Russell King | 5e742ad | 2005-08-18 10:08:15 +0100 | [diff] [blame] | 211 | |
Russell King | 216f63c | 2012-01-20 17:37:21 +0000 | [diff] [blame] | 212 | if (machine_is_assabet()) { |
| 213 | ASSABET_BCR_set(ASSABET_BCR_CODEC_RST); |
| 214 | } |
| 215 | |
| 216 | /* |
Russell King | 323cdfc | 2005-08-18 10:10:46 +0100 | [diff] [blame] | 217 | * Initialise device. Note that we initially |
| 218 | * set the sampling rate to minimum. |
| 219 | */ |
Russell King | 45c7f75 | 2012-01-20 23:09:42 +0000 | [diff] [blame] | 220 | writel_relaxed(-1, MCSR(m)); |
| 221 | writel_relaxed(m->mccr1, MCCR1(m)); |
| 222 | writel_relaxed(m->mccr0, MCCR0(m)); |
Russell King | 5e742ad | 2005-08-18 10:08:15 +0100 | [diff] [blame] | 223 | |
| 224 | /* |
| 225 | * Calculate the read/write timeout (us) from the bit clock |
| 226 | * rate. This is the period for 3 64-bit frames. Always |
| 227 | * round this time up. |
| 228 | */ |
| 229 | mcp->rw_timeout = (64 * 3 * 1000000 + mcp->sclk_rate - 1) / |
| 230 | mcp->sclk_rate; |
| 231 | |
Russell King | 30816ac | 2012-01-20 22:51:07 +0000 | [diff] [blame] | 232 | ret = mcp_host_add(mcp); |
Russell King | 5e742ad | 2005-08-18 10:08:15 +0100 | [diff] [blame] | 233 | if (ret == 0) |
Russell King | 45c7f75 | 2012-01-20 23:09:42 +0000 | [diff] [blame] | 234 | return 0; |
Russell King | 5e742ad | 2005-08-18 10:08:15 +0100 | [diff] [blame] | 235 | |
Russell King | 45c7f75 | 2012-01-20 23:09:42 +0000 | [diff] [blame] | 236 | platform_set_drvdata(dev, NULL); |
| 237 | |
| 238 | err_ioremap: |
| 239 | iounmap(m->base1); |
| 240 | iounmap(m->base0); |
Russell King | 30816ac | 2012-01-20 22:51:07 +0000 | [diff] [blame] | 241 | mcp_host_free(mcp); |
Russell King | 45c7f75 | 2012-01-20 23:09:42 +0000 | [diff] [blame] | 242 | err_alloc: |
| 243 | release_mem_region(mem1->start, resource_size(mem1)); |
| 244 | err_mem1: |
| 245 | release_mem_region(mem0->start, resource_size(mem0)); |
| 246 | err_mem0: |
Russell King | 5e742ad | 2005-08-18 10:08:15 +0100 | [diff] [blame] | 247 | return ret; |
| 248 | } |
| 249 | |
Russell King | 216f63c | 2012-01-20 17:37:21 +0000 | [diff] [blame] | 250 | static int mcp_sa11x0_remove(struct platform_device *dev) |
Russell King | 5e742ad | 2005-08-18 10:08:15 +0100 | [diff] [blame] | 251 | { |
Russell King | 216f63c | 2012-01-20 17:37:21 +0000 | [diff] [blame] | 252 | struct mcp *mcp = platform_get_drvdata(dev); |
Russell King | 45c7f75 | 2012-01-20 23:09:42 +0000 | [diff] [blame] | 253 | struct mcp_sa11x0 *m = priv(mcp); |
| 254 | struct resource *mem0, *mem1; |
| 255 | |
| 256 | mem0 = platform_get_resource(dev, IORESOURCE_MEM, 0); |
| 257 | mem1 = platform_get_resource(dev, IORESOURCE_MEM, 1); |
Russell King | 5e742ad | 2005-08-18 10:08:15 +0100 | [diff] [blame] | 258 | |
Russell King | 216f63c | 2012-01-20 17:37:21 +0000 | [diff] [blame] | 259 | platform_set_drvdata(dev, NULL); |
Russell King | 30816ac | 2012-01-20 22:51:07 +0000 | [diff] [blame] | 260 | mcp_host_del(mcp); |
Russell King | 45c7f75 | 2012-01-20 23:09:42 +0000 | [diff] [blame] | 261 | iounmap(m->base1); |
| 262 | iounmap(m->base0); |
Russell King | 30816ac | 2012-01-20 22:51:07 +0000 | [diff] [blame] | 263 | mcp_host_free(mcp); |
Russell King | 45c7f75 | 2012-01-20 23:09:42 +0000 | [diff] [blame] | 264 | release_mem_region(mem1->start, resource_size(mem1)); |
| 265 | release_mem_region(mem0->start, resource_size(mem0)); |
Russell King | 5e742ad | 2005-08-18 10:08:15 +0100 | [diff] [blame] | 266 | |
| 267 | return 0; |
| 268 | } |
| 269 | |
Russell King | 2796e39 | 2012-01-21 09:34:30 +0000 | [diff] [blame^] | 270 | #ifdef CONFIG_PM_SLEEP |
| 271 | static int mcp_sa11x0_suspend(struct device *dev) |
Russell King | 5e742ad | 2005-08-18 10:08:15 +0100 | [diff] [blame] | 272 | { |
Russell King | 2796e39 | 2012-01-21 09:34:30 +0000 | [diff] [blame^] | 273 | struct mcp_sa11x0 *m = priv(dev_get_drvdata(dev)); |
Russell King | 5e742ad | 2005-08-18 10:08:15 +0100 | [diff] [blame] | 274 | |
Russell King | 45c7f75 | 2012-01-20 23:09:42 +0000 | [diff] [blame] | 275 | writel(m->mccr0 & ~MCCR0_MCE, MCCR0(m)); |
Russell King | 9480e30 | 2005-10-28 09:52:56 -0700 | [diff] [blame] | 276 | |
Russell King | 5e742ad | 2005-08-18 10:08:15 +0100 | [diff] [blame] | 277 | return 0; |
| 278 | } |
| 279 | |
Russell King | 2796e39 | 2012-01-21 09:34:30 +0000 | [diff] [blame^] | 280 | static int mcp_sa11x0_resume(struct device *dev) |
Russell King | 5e742ad | 2005-08-18 10:08:15 +0100 | [diff] [blame] | 281 | { |
Russell King | 2796e39 | 2012-01-21 09:34:30 +0000 | [diff] [blame^] | 282 | struct mcp_sa11x0 *m = priv(dev_get_drvdata(dev)); |
Russell King | 5e742ad | 2005-08-18 10:08:15 +0100 | [diff] [blame] | 283 | |
Russell King | 45c7f75 | 2012-01-20 23:09:42 +0000 | [diff] [blame] | 284 | writel_relaxed(m->mccr1, MCCR1(m)); |
| 285 | writel_relaxed(m->mccr0, MCCR0(m)); |
Russell King | 9480e30 | 2005-10-28 09:52:56 -0700 | [diff] [blame] | 286 | |
Russell King | 5e742ad | 2005-08-18 10:08:15 +0100 | [diff] [blame] | 287 | return 0; |
| 288 | } |
Russell King | 2796e39 | 2012-01-21 09:34:30 +0000 | [diff] [blame^] | 289 | #endif |
| 290 | |
| 291 | static const struct dev_pm_ops mcp_sa11x0_pm_ops = { |
| 292 | SET_SYSTEM_SLEEP_PM_OPS(mcp_sa11x0_suspend, mcp_sa11x0_resume) |
| 293 | }; |
Russell King | 5e742ad | 2005-08-18 10:08:15 +0100 | [diff] [blame] | 294 | |
Russell King | 3ae5eae | 2005-11-09 22:32:44 +0000 | [diff] [blame] | 295 | static struct platform_driver mcp_sa11x0_driver = { |
Russell King | 5e742ad | 2005-08-18 10:08:15 +0100 | [diff] [blame] | 296 | .probe = mcp_sa11x0_probe, |
| 297 | .remove = mcp_sa11x0_remove, |
Russell King | 3ae5eae | 2005-11-09 22:32:44 +0000 | [diff] [blame] | 298 | .driver = { |
Russell King | c4592ce | 2012-01-20 22:30:15 +0000 | [diff] [blame] | 299 | .name = DRIVER_NAME, |
| 300 | .owner = THIS_MODULE, |
Russell King | 2796e39 | 2012-01-21 09:34:30 +0000 | [diff] [blame^] | 301 | .pm = &mcp_sa11x0_pm_ops, |
Russell King | 3ae5eae | 2005-11-09 22:32:44 +0000 | [diff] [blame] | 302 | }, |
Russell King | 5e742ad | 2005-08-18 10:08:15 +0100 | [diff] [blame] | 303 | }; |
| 304 | |
| 305 | /* |
| 306 | * This needs re-working |
| 307 | */ |
Mark Brown | 65349d6 | 2011-11-23 22:58:34 +0000 | [diff] [blame] | 308 | module_platform_driver(mcp_sa11x0_driver); |
Russell King | 5e742ad | 2005-08-18 10:08:15 +0100 | [diff] [blame] | 309 | |
Russell King | c4592ce | 2012-01-20 22:30:15 +0000 | [diff] [blame] | 310 | MODULE_ALIAS("platform:" DRIVER_NAME); |
Russell King | 5e742ad | 2005-08-18 10:08:15 +0100 | [diff] [blame] | 311 | MODULE_AUTHOR("Russell King <rmk@arm.linux.org.uk>"); |
| 312 | MODULE_DESCRIPTION("SA11x0 multimedia communications port driver"); |
| 313 | MODULE_LICENSE("GPL"); |