blob: 7defa0ae2014b1f0ea8b1598c0b0f135bd24b0f7 [file] [log] [blame]
Linus Torvalds1da177e2005-04-16 15:20:36 -07001/*
Jeremy Higdon0271fc22006-02-02 00:00:46 -08002 * Copyright (c) 2003-2006 Silicon Graphics, Inc. All Rights Reserved.
Sergei Shtylylovaa95f0e2008-10-13 21:39:29 +02003 * Copyright (C) 2008 MontaVista Software, Inc.
Linus Torvalds1da177e2005-04-16 15:20:36 -07004 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of version 2 of the GNU General Public License
7 * as published by the Free Software Foundation.
8 *
9 * This program is distributed in the hope that it would be useful, but
10 * WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
12 *
13 * You should have received a copy of the GNU General Public
14 * License along with this program; if not, write the Free Software
15 * Foundation, Inc., 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
16 *
Linus Torvalds1da177e2005-04-16 15:20:36 -070017 * For further information regarding this notice, see:
18 *
19 * http://oss.sgi.com/projects/GenInfo/NoticeExplan
20 */
21
22#include <linux/module.h>
23#include <linux/types.h>
24#include <linux/pci.h>
25#include <linux/delay.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070026#include <linux/init.h>
27#include <linux/kernel.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070028#include <linux/ioport.h>
29#include <linux/blkdev.h>
Jens Axboe55c16a72007-07-25 08:13:56 +020030#include <linux/scatterlist.h>
Brent Casavant22329b52005-06-21 17:15:59 -070031#include <linux/ioc4.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070032#include <asm/io.h>
33
34#include <linux/ide.h>
35
Bartlomiej Zolnierkiewiczca1997c2007-10-11 23:54:00 +020036#define DRV_NAME "SGIIOC4"
37
Linus Torvalds1da177e2005-04-16 15:20:36 -070038/* IOC4 Specific Definitions */
39#define IOC4_CMD_OFFSET 0x100
40#define IOC4_CTRL_OFFSET 0x120
41#define IOC4_DMA_OFFSET 0x140
42#define IOC4_INTR_OFFSET 0x0
43
44#define IOC4_TIMING 0x00
45#define IOC4_DMA_PTR_L 0x01
46#define IOC4_DMA_PTR_H 0x02
47#define IOC4_DMA_ADDR_L 0x03
48#define IOC4_DMA_ADDR_H 0x04
49#define IOC4_BC_DEV 0x05
50#define IOC4_BC_MEM 0x06
51#define IOC4_DMA_CTRL 0x07
52#define IOC4_DMA_END_ADDR 0x08
53
54/* Bits in the IOC4 Control/Status Register */
55#define IOC4_S_DMA_START 0x01
56#define IOC4_S_DMA_STOP 0x02
57#define IOC4_S_DMA_DIR 0x04
58#define IOC4_S_DMA_ACTIVE 0x08
59#define IOC4_S_DMA_ERROR 0x10
60#define IOC4_ATA_MEMERR 0x02
61
62/* Read/Write Directions */
63#define IOC4_DMA_WRITE 0x04
64#define IOC4_DMA_READ 0x00
65
66/* Interrupt Register Offsets */
67#define IOC4_INTR_REG 0x03
68#define IOC4_INTR_SET 0x05
69#define IOC4_INTR_CLEAR 0x07
70
71#define IOC4_IDE_CACHELINE_SIZE 128
72#define IOC4_CMD_CTL_BLK_SIZE 0x20
73#define IOC4_SUPPORTED_FIRMWARE_REV 46
74
75typedef struct {
76 u32 timing_reg0;
77 u32 timing_reg1;
78 u32 low_mem_ptr;
79 u32 high_mem_ptr;
80 u32 low_mem_addr;
81 u32 high_mem_addr;
82 u32 dev_byte_count;
83 u32 mem_byte_count;
84 u32 status;
85} ioc4_dma_regs_t;
86
87/* Each Physical Region Descriptor Entry size is 16 bytes (2 * 64 bits) */
88/* IOC4 has only 1 IDE channel */
89#define IOC4_PRD_BYTES 16
90#define IOC4_PRD_ENTRIES (PAGE_SIZE /(4*IOC4_PRD_BYTES))
91
92
93static void
94sgiioc4_init_hwif_ports(hw_regs_t * hw, unsigned long data_port,
95 unsigned long ctrl_port, unsigned long irq_port)
96{
97 unsigned long reg = data_port;
98 int i;
99
100 /* Registers are word (32 bit) aligned */
Bartlomiej Zolnierkiewicz4c3032d2008-04-27 15:38:32 +0200101 for (i = 0; i <= 7; i++)
102 hw->io_ports_array[i] = reg + i * 4;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700103
Sergei Shtylyov8108b882008-10-17 18:09:16 +0200104 hw->io_ports.ctl_addr = ctrl_port;
105 hw->io_ports.irq_addr = irq_port;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700106}
107
Linus Torvalds1da177e2005-04-16 15:20:36 -0700108static int
109sgiioc4_checkirq(ide_hwif_t * hwif)
110{
Bartlomiej Zolnierkiewicz0ecdca22007-02-17 02:40:25 +0100111 unsigned long intr_addr =
Bartlomiej Zolnierkiewicz4c3032d2008-04-27 15:38:32 +0200112 hwif->io_ports.irq_addr + IOC4_INTR_REG * 4;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700113
Bartlomiej Zolnierkiewicz0ecdca22007-02-17 02:40:25 +0100114 if ((u8)readl((void __iomem *)intr_addr) & 0x03)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700115 return 1;
116
117 return 0;
118}
119
Bartlomiej Zolnierkiewiczb73c7ee2008-07-23 19:55:52 +0200120static u8 sgiioc4_read_status(ide_hwif_t *);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700121
122static int
123sgiioc4_clearirq(ide_drive_t * drive)
124{
125 u32 intr_reg;
126 ide_hwif_t *hwif = HWIF(drive);
Bartlomiej Zolnierkiewicz4c3032d2008-04-27 15:38:32 +0200127 struct ide_io_ports *io_ports = &hwif->io_ports;
128 unsigned long other_ir = io_ports->irq_addr + (IOC4_INTR_REG << 2);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700129
130 /* Code to check for PCI error conditions */
Bartlomiej Zolnierkiewicz0ecdca22007-02-17 02:40:25 +0100131 intr_reg = readl((void __iomem *)other_ir);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700132 if (intr_reg & 0x03) { /* Valid IOC4-IDE interrupt */
133 /*
Bartlomiej Zolnierkiewiczb73c7ee2008-07-23 19:55:52 +0200134 * Using sgiioc4_read_status to read the Status register has a
135 * side effect of clearing the interrupt. The first read should
Bartlomiej Zolnierkiewicz23579a22008-04-18 00:46:26 +0200136 * clear it if it is set. The second read should return
137 * a "clear" status if it got cleared. If not, then spin
138 * for a bit trying to clear it.
Linus Torvalds1da177e2005-04-16 15:20:36 -0700139 */
Bartlomiej Zolnierkiewiczb73c7ee2008-07-23 19:55:52 +0200140 u8 stat = sgiioc4_read_status(hwif);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700141 int count = 0;
Bartlomiej Zolnierkiewiczb73c7ee2008-07-23 19:55:52 +0200142
143 stat = sgiioc4_read_status(hwif);
Sergei Shtylylovaa95f0e2008-10-13 21:39:29 +0200144 while ((stat & ATA_BUSY) && (count++ < 100)) {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700145 udelay(1);
Bartlomiej Zolnierkiewiczb73c7ee2008-07-23 19:55:52 +0200146 stat = sgiioc4_read_status(hwif);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700147 }
148
149 if (intr_reg & 0x02) {
Bartlomiej Zolnierkiewicz36501652008-02-01 23:09:31 +0100150 struct pci_dev *dev = to_pci_dev(hwif->dev);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700151 /* Error when transferring DMA data on PCI bus */
152 u32 pci_err_addr_low, pci_err_addr_high,
153 pci_stat_cmd_reg;
154
155 pci_err_addr_low =
Bartlomiej Zolnierkiewicz4c3032d2008-04-27 15:38:32 +0200156 readl((void __iomem *)io_ports->irq_addr);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700157 pci_err_addr_high =
Bartlomiej Zolnierkiewicz4c3032d2008-04-27 15:38:32 +0200158 readl((void __iomem *)(io_ports->irq_addr + 4));
Bartlomiej Zolnierkiewicz36501652008-02-01 23:09:31 +0100159 pci_read_config_dword(dev, PCI_COMMAND,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700160 &pci_stat_cmd_reg);
161 printk(KERN_ERR
162 "%s(%s) : PCI Bus Error when doing DMA:"
163 " status-cmd reg is 0x%x\n",
Harvey Harrisoneb639632008-04-26 22:25:20 +0200164 __func__, drive->name, pci_stat_cmd_reg);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700165 printk(KERN_ERR
166 "%s(%s) : PCI Error Address is 0x%x%x\n",
Harvey Harrisoneb639632008-04-26 22:25:20 +0200167 __func__, drive->name,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700168 pci_err_addr_high, pci_err_addr_low);
169 /* Clear the PCI Error indicator */
Bartlomiej Zolnierkiewicz36501652008-02-01 23:09:31 +0100170 pci_write_config_dword(dev, PCI_COMMAND, 0x00000146);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700171 }
172
173 /* Clear the Interrupt, Error bits on the IOC4 */
Bartlomiej Zolnierkiewicz0ecdca22007-02-17 02:40:25 +0100174 writel(0x03, (void __iomem *)other_ir);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700175
Bartlomiej Zolnierkiewicz0ecdca22007-02-17 02:40:25 +0100176 intr_reg = readl((void __iomem *)other_ir);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700177 }
178
179 return intr_reg & 3;
180}
181
Bartlomiej Zolnierkiewicz5e37bdc2008-04-26 22:25:24 +0200182static void sgiioc4_dma_start(ide_drive_t *drive)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700183{
184 ide_hwif_t *hwif = HWIF(drive);
Bartlomiej Zolnierkiewicz0ecdca22007-02-17 02:40:25 +0100185 unsigned long ioc4_dma_addr = hwif->dma_base + IOC4_DMA_CTRL * 4;
186 unsigned int reg = readl((void __iomem *)ioc4_dma_addr);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700187 unsigned int temp_reg = reg | IOC4_S_DMA_START;
188
Bartlomiej Zolnierkiewicz0ecdca22007-02-17 02:40:25 +0100189 writel(temp_reg, (void __iomem *)ioc4_dma_addr);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700190}
191
192static u32
193sgiioc4_ide_dma_stop(ide_hwif_t *hwif, u64 dma_base)
194{
Bartlomiej Zolnierkiewicz0ecdca22007-02-17 02:40:25 +0100195 unsigned long ioc4_dma_addr = dma_base + IOC4_DMA_CTRL * 4;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700196 u32 ioc4_dma;
197 int count;
198
199 count = 0;
Bartlomiej Zolnierkiewicz0ecdca22007-02-17 02:40:25 +0100200 ioc4_dma = readl((void __iomem *)ioc4_dma_addr);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700201 while ((ioc4_dma & IOC4_S_DMA_STOP) && (count++ < 200)) {
202 udelay(1);
Bartlomiej Zolnierkiewicz0ecdca22007-02-17 02:40:25 +0100203 ioc4_dma = readl((void __iomem *)ioc4_dma_addr);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700204 }
205 return ioc4_dma;
206}
207
208/* Stops the IOC4 DMA Engine */
Bartlomiej Zolnierkiewicz5e37bdc2008-04-26 22:25:24 +0200209static int sgiioc4_dma_end(ide_drive_t *drive)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700210{
211 u32 ioc4_dma, bc_dev, bc_mem, num, valid = 0, cnt = 0;
212 ide_hwif_t *hwif = HWIF(drive);
Bartlomiej Zolnierkiewicz0ecdca22007-02-17 02:40:25 +0100213 unsigned long dma_base = hwif->dma_base;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700214 int dma_stat = 0;
Sergei Shtylyov3f63c5e2006-10-03 01:14:25 -0700215 unsigned long *ending_dma = ide_get_hwifdata(hwif);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700216
Bartlomiej Zolnierkiewicz0ecdca22007-02-17 02:40:25 +0100217 writel(IOC4_S_DMA_STOP, (void __iomem *)(dma_base + IOC4_DMA_CTRL * 4));
Linus Torvalds1da177e2005-04-16 15:20:36 -0700218
219 ioc4_dma = sgiioc4_ide_dma_stop(hwif, dma_base);
220
221 if (ioc4_dma & IOC4_S_DMA_STOP) {
222 printk(KERN_ERR
223 "%s(%s): IOC4 DMA STOP bit is still 1 :"
224 "ioc4_dma_reg 0x%x\n",
Harvey Harrisoneb639632008-04-26 22:25:20 +0200225 __func__, drive->name, ioc4_dma);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700226 dma_stat = 1;
227 }
228
229 /*
230 * The IOC4 will DMA 1's to the ending dma area to indicate that
231 * previous data DMA is complete. This is necessary because of relaxed
232 * ordering between register reads and DMA writes on the Altix.
233 */
234 while ((cnt++ < 200) && (!valid)) {
235 for (num = 0; num < 16; num++) {
236 if (ending_dma[num]) {
237 valid = 1;
238 break;
239 }
240 }
241 udelay(1);
242 }
243 if (!valid) {
Harvey Harrisoneb639632008-04-26 22:25:20 +0200244 printk(KERN_ERR "%s(%s) : DMA incomplete\n", __func__,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700245 drive->name);
246 dma_stat = 1;
247 }
248
Bartlomiej Zolnierkiewicz0ecdca22007-02-17 02:40:25 +0100249 bc_dev = readl((void __iomem *)(dma_base + IOC4_BC_DEV * 4));
250 bc_mem = readl((void __iomem *)(dma_base + IOC4_BC_MEM * 4));
Linus Torvalds1da177e2005-04-16 15:20:36 -0700251
252 if ((bc_dev & 0x01FF) || (bc_mem & 0x1FF)) {
253 if (bc_dev > bc_mem + 8) {
254 printk(KERN_ERR
255 "%s(%s): WARNING!! byte_count_dev %d "
256 "!= byte_count_mem %d\n",
Harvey Harrisoneb639632008-04-26 22:25:20 +0200257 __func__, drive->name, bc_dev, bc_mem);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700258 }
259 }
260
261 drive->waiting_for_dma = 0;
262 ide_destroy_dmatable(drive);
263
264 return dma_stat;
265}
266
Bartlomiej Zolnierkiewicz88b2b322007-10-13 17:47:51 +0200267static void sgiioc4_set_dma_mode(ide_drive_t *drive, const u8 speed)
Bartlomiej Zolnierkiewiczca1997c2007-10-11 23:54:00 +0200268{
Bartlomiej Zolnierkiewiczca1997c2007-10-11 23:54:00 +0200269}
270
Linus Torvalds1da177e2005-04-16 15:20:36 -0700271/* returns 1 if dma irq issued, 0 otherwise */
Bartlomiej Zolnierkiewicz5e37bdc2008-04-26 22:25:24 +0200272static int sgiioc4_dma_test_irq(ide_drive_t *drive)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700273{
274 return sgiioc4_checkirq(HWIF(drive));
275}
276
Bartlomiej Zolnierkiewicz15ce9262008-01-26 20:13:03 +0100277static void sgiioc4_dma_host_set(ide_drive_t *drive, int on)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700278{
Bartlomiej Zolnierkiewicz15ce9262008-01-26 20:13:03 +0100279 if (!on)
280 sgiioc4_clearirq(drive);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700281}
282
Linus Torvalds1da177e2005-04-16 15:20:36 -0700283static void
284sgiioc4_resetproc(ide_drive_t * drive)
285{
Bartlomiej Zolnierkiewicz5e37bdc2008-04-26 22:25:24 +0200286 sgiioc4_dma_end(drive);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700287 sgiioc4_clearirq(drive);
288}
289
Sergei Shtylyov841d2a92007-07-09 23:17:54 +0200290static void
291sgiioc4_dma_lost_irq(ide_drive_t * drive)
292{
293 sgiioc4_resetproc(drive);
294
295 ide_dma_lost_irq(drive);
296}
297
Bartlomiej Zolnierkiewiczb73c7ee2008-07-23 19:55:52 +0200298static u8 sgiioc4_read_status(ide_hwif_t *hwif)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700299{
Bartlomiej Zolnierkiewiczb73c7ee2008-07-23 19:55:52 +0200300 unsigned long port = hwif->io_ports.status_addr;
Jeremy Higdona835fa72006-05-30 21:27:07 -0700301 u8 reg = (u8) readb((void __iomem *) port);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700302
Sergei Shtylyov8108b882008-10-17 18:09:16 +0200303 if (!(reg & ATA_BUSY)) { /* Not busy... check for interrupt */
304 unsigned long other_ir = port - 0x110;
305 unsigned int intr_reg = (u32) readl((void __iomem *) other_ir);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700306
Sergei Shtylyov8108b882008-10-17 18:09:16 +0200307 /* Clear the Interrupt, Error bits on the IOC4 */
308 if (intr_reg & 0x03) {
309 writel(0x03, (void __iomem *) other_ir);
310 intr_reg = (u32) readl((void __iomem *) other_ir);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700311 }
312 }
313
314 return reg;
315}
316
317/* Creates a dma map for the scatter-gather list entries */
Bartlomiej Zolnierkiewiczca1997c2007-10-11 23:54:00 +0200318static int __devinit
Bartlomiej Zolnierkiewicz04216fa2008-04-26 22:25:23 +0200319ide_dma_sgiioc4(ide_hwif_t *hwif, const struct ide_port_info *d)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700320{
Bartlomiej Zolnierkiewicz36501652008-02-01 23:09:31 +0100321 struct pci_dev *dev = to_pci_dev(hwif->dev);
Bartlomiej Zolnierkiewicz04216fa2008-04-26 22:25:23 +0200322 unsigned long dma_base = pci_resource_start(dev, 0) + IOC4_DMA_OFFSET;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700323 int num_ports = sizeof (ioc4_dma_regs_t);
Sergei Shtylyov3f63c5e2006-10-03 01:14:25 -0700324 void *pad;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700325
Sergei Shtylylov9b5a18e2008-10-13 21:39:30 +0200326 printk(KERN_INFO " %s: MMIO-DMA\n", hwif->name);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700327
Sergei Shtylylov9b5a18e2008-10-13 21:39:30 +0200328 if (request_mem_region(dma_base, num_ports, hwif->name) == NULL) {
329 printk(KERN_ERR "%s(%s) -- ERROR: addresses 0x%08lx to 0x%08lx "
330 "already in use\n", __func__, hwif->name,
331 dma_base, dma_base + num_ports - 1);
Bartlomiej Zolnierkiewiczca1997c2007-10-11 23:54:00 +0200332 return -1;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700333 }
334
Sergei Shtylyov107111d2008-10-17 18:09:17 +0200335 hwif->dma_base = (unsigned long)hwif->io_ports.irq_addr +
336 IOC4_DMA_OFFSET;
John Keller1678df32006-08-31 21:27:51 -0700337
Linus Torvalds1da177e2005-04-16 15:20:36 -0700338 hwif->sg_max_nents = IOC4_PRD_ENTRIES;
339
Bartlomiej Zolnierkiewicz2bbd57c2008-10-13 21:39:47 +0200340 hwif->prd_max_nents = IOC4_PRD_ENTRIES;
341 hwif->prd_ent_size = IOC4_PRD_BYTES;
342
343 if (ide_allocate_dma_engine(hwif))
344 goto dma_pci_alloc_failure;
345
Bartlomiej Zolnierkiewicz36501652008-02-01 23:09:31 +0100346 pad = pci_alloc_consistent(dev, IOC4_IDE_CACHELINE_SIZE,
Bartlomiej Zolnierkiewicz912ef6d2008-07-15 21:21:47 +0200347 (dma_addr_t *)&hwif->extra_base);
Sergei Shtylyov3f63c5e2006-10-03 01:14:25 -0700348 if (pad) {
349 ide_set_hwifdata(hwif, pad);
Bartlomiej Zolnierkiewiczca1997c2007-10-11 23:54:00 +0200350 return 0;
Sergei Shtylyov3f63c5e2006-10-03 01:14:25 -0700351 }
Linus Torvalds1da177e2005-04-16 15:20:36 -0700352
Bartlomiej Zolnierkiewicz2bbd57c2008-10-13 21:39:47 +0200353 ide_release_dma_engine(hwif);
354
Sergei Shtylylov9b5a18e2008-10-13 21:39:30 +0200355 printk(KERN_ERR "%s(%s) -- ERROR: Unable to allocate DMA maps\n",
Harvey Harrisoneb639632008-04-26 22:25:20 +0200356 __func__, hwif->name);
Sergei Shtylylov9b5a18e2008-10-13 21:39:30 +0200357 printk(KERN_INFO "%s: changing from DMA to PIO mode", hwif->name);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700358
John Keller1678df32006-08-31 21:27:51 -0700359dma_pci_alloc_failure:
John Keller1678df32006-08-31 21:27:51 -0700360 release_mem_region(dma_base, num_ports);
361
Bartlomiej Zolnierkiewiczca1997c2007-10-11 23:54:00 +0200362 return -1;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700363}
364
365/* Initializes the IOC4 DMA Engine */
366static void
367sgiioc4_configure_for_dma(int dma_direction, ide_drive_t * drive)
368{
369 u32 ioc4_dma;
370 ide_hwif_t *hwif = HWIF(drive);
Bartlomiej Zolnierkiewicz0ecdca22007-02-17 02:40:25 +0100371 unsigned long dma_base = hwif->dma_base;
372 unsigned long ioc4_dma_addr = dma_base + IOC4_DMA_CTRL * 4;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700373 u32 dma_addr, ending_dma_addr;
374
Bartlomiej Zolnierkiewicz0ecdca22007-02-17 02:40:25 +0100375 ioc4_dma = readl((void __iomem *)ioc4_dma_addr);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700376
377 if (ioc4_dma & IOC4_S_DMA_ACTIVE) {
378 printk(KERN_WARNING
379 "%s(%s):Warning!! DMA from previous transfer was still active\n",
Harvey Harrisoneb639632008-04-26 22:25:20 +0200380 __func__, drive->name);
Bartlomiej Zolnierkiewicz0ecdca22007-02-17 02:40:25 +0100381 writel(IOC4_S_DMA_STOP, (void __iomem *)ioc4_dma_addr);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700382 ioc4_dma = sgiioc4_ide_dma_stop(hwif, dma_base);
383
384 if (ioc4_dma & IOC4_S_DMA_STOP)
385 printk(KERN_ERR
386 "%s(%s) : IOC4 Dma STOP bit is still 1\n",
Harvey Harrisoneb639632008-04-26 22:25:20 +0200387 __func__, drive->name);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700388 }
389
Bartlomiej Zolnierkiewicz0ecdca22007-02-17 02:40:25 +0100390 ioc4_dma = readl((void __iomem *)ioc4_dma_addr);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700391 if (ioc4_dma & IOC4_S_DMA_ERROR) {
392 printk(KERN_WARNING
393 "%s(%s) : Warning!! - DMA Error during Previous"
394 " transfer | status 0x%x\n",
Harvey Harrisoneb639632008-04-26 22:25:20 +0200395 __func__, drive->name, ioc4_dma);
Bartlomiej Zolnierkiewicz0ecdca22007-02-17 02:40:25 +0100396 writel(IOC4_S_DMA_STOP, (void __iomem *)ioc4_dma_addr);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700397 ioc4_dma = sgiioc4_ide_dma_stop(hwif, dma_base);
398
399 if (ioc4_dma & IOC4_S_DMA_STOP)
400 printk(KERN_ERR
401 "%s(%s) : IOC4 DMA STOP bit is still 1\n",
Harvey Harrisoneb639632008-04-26 22:25:20 +0200402 __func__, drive->name);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700403 }
404
405 /* Address of the Scatter Gather List */
406 dma_addr = cpu_to_le32(hwif->dmatable_dma);
Bartlomiej Zolnierkiewicz0ecdca22007-02-17 02:40:25 +0100407 writel(dma_addr, (void __iomem *)(dma_base + IOC4_DMA_PTR_L * 4));
Linus Torvalds1da177e2005-04-16 15:20:36 -0700408
409 /* Address of the Ending DMA */
Sergei Shtylyov3f63c5e2006-10-03 01:14:25 -0700410 memset(ide_get_hwifdata(hwif), 0, IOC4_IDE_CACHELINE_SIZE);
Bartlomiej Zolnierkiewicz912ef6d2008-07-15 21:21:47 +0200411 ending_dma_addr = cpu_to_le32(hwif->extra_base);
Bartlomiej Zolnierkiewicz0ecdca22007-02-17 02:40:25 +0100412 writel(ending_dma_addr, (void __iomem *)(dma_base + IOC4_DMA_END_ADDR * 4));
Linus Torvalds1da177e2005-04-16 15:20:36 -0700413
Bartlomiej Zolnierkiewicz0ecdca22007-02-17 02:40:25 +0100414 writel(dma_direction, (void __iomem *)ioc4_dma_addr);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700415 drive->waiting_for_dma = 1;
416}
417
418/* IOC4 Scatter Gather list Format */
419/* 128 Bit entries to support 64 bit addresses in the future */
420/* The Scatter Gather list Entry should be in the BIG-ENDIAN Format */
421/* --------------------------------------------------------------------- */
422/* | Upper 32 bits - Zero | Lower 32 bits- address | */
423/* --------------------------------------------------------------------- */
424/* | Upper 32 bits - Zero |EOL| 15 unused | 16 Bit Length| */
425/* --------------------------------------------------------------------- */
426/* Creates the scatter gather list, DMA Table */
427static unsigned int
428sgiioc4_build_dma_table(ide_drive_t * drive, struct request *rq, int ddir)
429{
430 ide_hwif_t *hwif = HWIF(drive);
431 unsigned int *table = hwif->dmatable_cpu;
432 unsigned int count = 0, i = 1;
433 struct scatterlist *sg;
434
435 hwif->sg_nents = i = ide_build_sglist(drive, rq);
436
437 if (!i)
438 return 0; /* sglist of length Zero */
439
440 sg = hwif->sg_table;
441 while (i && sg_dma_len(sg)) {
442 dma_addr_t cur_addr;
443 int cur_len;
444 cur_addr = sg_dma_address(sg);
445 cur_len = sg_dma_len(sg);
446
447 while (cur_len) {
448 if (count++ >= IOC4_PRD_ENTRIES) {
449 printk(KERN_WARNING
450 "%s: DMA table too small\n",
451 drive->name);
452 goto use_pio_instead;
453 } else {
Jeremy Higdon0271fc22006-02-02 00:00:46 -0800454 u32 bcount =
Linus Torvalds1da177e2005-04-16 15:20:36 -0700455 0x10000 - (cur_addr & 0xffff);
456
457 if (bcount > cur_len)
458 bcount = cur_len;
459
460 /* put the addr, length in
461 * the IOC4 dma-table format */
462 *table = 0x0;
463 table++;
464 *table = cpu_to_be32(cur_addr);
465 table++;
466 *table = 0x0;
467 table++;
468
Jeremy Higdon0271fc22006-02-02 00:00:46 -0800469 *table = cpu_to_be32(bcount);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700470 table++;
471
472 cur_addr += bcount;
473 cur_len -= bcount;
474 }
475 }
476
Jens Axboe55c16a72007-07-25 08:13:56 +0200477 sg = sg_next(sg);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700478 i--;
479 }
480
481 if (count) {
482 table--;
483 *table |= cpu_to_be32(0x80000000);
484 return count;
485 }
486
487use_pio_instead:
Bartlomiej Zolnierkiewiczf6fb7862008-02-01 23:09:31 +0100488 ide_destroy_dmatable(drive);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700489
490 return 0; /* revert to PIO for this request */
491}
492
Bartlomiej Zolnierkiewicz5e37bdc2008-04-26 22:25:24 +0200493static int sgiioc4_dma_setup(ide_drive_t *drive)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700494{
495 struct request *rq = HWGROUP(drive)->rq;
496 unsigned int count = 0;
497 int ddir;
498
499 if (rq_data_dir(rq))
500 ddir = PCI_DMA_TODEVICE;
501 else
502 ddir = PCI_DMA_FROMDEVICE;
503
504 if (!(count = sgiioc4_build_dma_table(drive, rq, ddir))) {
505 /* try PIO instead of DMA */
506 ide_map_sg(drive, rq);
507 return 1;
508 }
509
510 if (rq_data_dir(rq))
511 /* Writes TO the IOC4 FROM Main Memory */
512 ddir = IOC4_DMA_READ;
513 else
514 /* Writes FROM the IOC4 TO Main Memory */
515 ddir = IOC4_DMA_WRITE;
516
517 sgiioc4_configure_for_dma(ddir, drive);
518
519 return 0;
520}
521
Bartlomiej Zolnierkiewicz374e0422008-07-23 19:55:56 +0200522static const struct ide_tp_ops sgiioc4_tp_ops = {
523 .exec_command = ide_exec_command,
524 .read_status = sgiioc4_read_status,
525 .read_altstatus = ide_read_altstatus,
526 .read_sff_dma_status = ide_read_sff_dma_status,
527
528 .set_irq = ide_set_irq,
529
530 .tf_load = ide_tf_load,
531 .tf_read = ide_tf_read,
532
533 .input_data = ide_input_data,
534 .output_data = ide_output_data,
535};
536
Bartlomiej Zolnierkiewiczac95bee2008-04-26 22:25:14 +0200537static const struct ide_port_ops sgiioc4_port_ops = {
538 .set_dma_mode = sgiioc4_set_dma_mode,
539 /* reset DMA engine, clear IRQs */
540 .resetproc = sgiioc4_resetproc,
Bartlomiej Zolnierkiewiczac95bee2008-04-26 22:25:14 +0200541};
542
Bartlomiej Zolnierkiewiczf37afda2008-04-26 22:25:24 +0200543static const struct ide_dma_ops sgiioc4_dma_ops = {
Bartlomiej Zolnierkiewicz5e37bdc2008-04-26 22:25:24 +0200544 .dma_host_set = sgiioc4_dma_host_set,
545 .dma_setup = sgiioc4_dma_setup,
546 .dma_start = sgiioc4_dma_start,
547 .dma_end = sgiioc4_dma_end,
548 .dma_test_irq = sgiioc4_dma_test_irq,
549 .dma_lost_irq = sgiioc4_dma_lost_irq,
550 .dma_timeout = ide_dma_timeout,
551};
552
Bartlomiej Zolnierkiewiczc413b9b2008-02-02 19:56:31 +0100553static const struct ide_port_info sgiioc4_port_info __devinitdata = {
Bartlomiej Zolnierkiewiczeb3aff52008-07-16 20:33:42 +0200554 .name = DRV_NAME,
Bartlomiej Zolnierkiewiczc413b9b2008-02-02 19:56:31 +0100555 .chipset = ide_pci,
Bartlomiej Zolnierkiewicz04216fa2008-04-26 22:25:23 +0200556 .init_dma = ide_dma_sgiioc4,
Bartlomiej Zolnierkiewicz374e0422008-07-23 19:55:56 +0200557 .tp_ops = &sgiioc4_tp_ops,
Bartlomiej Zolnierkiewiczac95bee2008-04-26 22:25:14 +0200558 .port_ops = &sgiioc4_port_ops,
Bartlomiej Zolnierkiewicz5e37bdc2008-04-26 22:25:24 +0200559 .dma_ops = &sgiioc4_dma_ops,
Bartlomiej Zolnierkiewiczc5dd43e2008-04-28 23:44:37 +0200560 .host_flags = IDE_HFLAG_MMIO,
Bartlomiej Zolnierkiewiczc413b9b2008-02-02 19:56:31 +0100561 .mwdma_mask = ATA_MWDMA2_ONLY,
562};
563
Linus Torvalds1da177e2005-04-16 15:20:36 -0700564static int __devinit
Bartlomiej Zolnierkiewiczca1997c2007-10-11 23:54:00 +0200565sgiioc4_ide_setup_pci_device(struct pci_dev *dev)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700566{
Bartlomiej Zolnierkiewicz04216fa2008-04-26 22:25:23 +0200567 unsigned long cmd_base, irqport;
John Keller1678df32006-08-31 21:27:51 -0700568 unsigned long bar0, cmd_phys_base, ctl;
569 void __iomem *virt_base;
Bartlomiej Zolnierkiewiczc97c6ac2008-07-23 19:55:50 +0200570 hw_regs_t hw, *hws[] = { &hw, NULL, NULL, NULL };
Bartlomiej Zolnierkiewicz8a695802008-07-23 19:55:59 +0200571 int rc;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700572
Linus Torvalds1da177e2005-04-16 15:20:36 -0700573 /* Get the CmdBlk and CtrlBlk Base Registers */
John Keller1678df32006-08-31 21:27:51 -0700574 bar0 = pci_resource_start(dev, 0);
Arjan van de Ven28343562008-10-23 23:22:07 +0200575 virt_base = pci_ioremap_bar(dev, 0);
John Keller1678df32006-08-31 21:27:51 -0700576 if (virt_base == NULL) {
577 printk(KERN_ERR "%s: Unable to remap BAR 0 address: 0x%lx\n",
Bartlomiej Zolnierkiewiczca1997c2007-10-11 23:54:00 +0200578 DRV_NAME, bar0);
John Keller1678df32006-08-31 21:27:51 -0700579 return -ENOMEM;
580 }
581 cmd_base = (unsigned long) virt_base + IOC4_CMD_OFFSET;
582 ctl = (unsigned long) virt_base + IOC4_CTRL_OFFSET;
583 irqport = (unsigned long) virt_base + IOC4_INTR_OFFSET;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700584
John Keller1678df32006-08-31 21:27:51 -0700585 cmd_phys_base = bar0 + IOC4_CMD_OFFSET;
Sergei Shtylylov9b5a18e2008-10-13 21:39:30 +0200586 if (request_mem_region(cmd_phys_base, IOC4_CMD_CTL_BLK_SIZE,
587 DRV_NAME) == NULL) {
588 printk(KERN_ERR "%s %s -- ERROR: addresses 0x%08lx to 0x%08lx "
589 "already in use\n", DRV_NAME, pci_name(dev),
590 cmd_phys_base, cmd_phys_base + IOC4_CMD_CTL_BLK_SIZE);
Sergei Shtylyov3059ef92008-10-23 23:22:06 +0200591 rc = -EBUSY;
592 goto req_mem_rgn_err;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700593 }
594
Bartlomiej Zolnierkiewicz8f8e8482008-01-26 20:13:05 +0100595 /* Initialize the IO registers */
596 memset(&hw, 0, sizeof(hw));
597 sgiioc4_init_hwif_ports(&hw, cmd_base, ctl, irqport);
Bartlomiej Zolnierkiewicz57c802e2008-01-26 20:13:05 +0100598 hw.irq = dev->irq;
599 hw.chipset = ide_pci;
600 hw.dev = &dev->dev;
Bartlomiej Zolnierkiewiczce30e402008-07-16 20:33:44 +0200601
Linus Torvalds1da177e2005-04-16 15:20:36 -0700602 /* Initializing chipset IRQ Registers */
Bartlomiej Zolnierkiewicz0ecdca22007-02-17 02:40:25 +0100603 writel(0x03, (void __iomem *)(irqport + IOC4_INTR_SET * 4));
Linus Torvalds1da177e2005-04-16 15:20:36 -0700604
Sergei Shtylyov95a84cd2008-10-23 23:22:06 +0200605 rc = ide_host_add(&sgiioc4_port_info, hws, NULL);
606 if (!rc)
607 return 0;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700608
Bartlomiej Zolnierkiewiczce30e402008-07-16 20:33:44 +0200609 release_mem_region(cmd_phys_base, IOC4_CMD_CTL_BLK_SIZE);
Sergei Shtylyov3059ef92008-10-23 23:22:06 +0200610req_mem_rgn_err:
Bartlomiej Zolnierkiewiczce30e402008-07-16 20:33:44 +0200611 iounmap(virt_base);
Bartlomiej Zolnierkiewicz8a695802008-07-23 19:55:59 +0200612 return rc;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700613}
614
615static unsigned int __devinit
Bartlomiej Zolnierkiewiczca1997c2007-10-11 23:54:00 +0200616pci_init_sgiioc4(struct pci_dev *dev)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700617{
Linus Torvalds1da177e2005-04-16 15:20:36 -0700618 int ret;
619
Linus Torvalds1da177e2005-04-16 15:20:36 -0700620 printk(KERN_INFO "%s: IDE controller at PCI slot %s, revision %d\n",
Bartlomiej Zolnierkiewiczfc212bb2007-10-19 00:30:08 +0200621 DRV_NAME, pci_name(dev), dev->revision);
622
623 if (dev->revision < IOC4_SUPPORTED_FIRMWARE_REV) {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700624 printk(KERN_ERR "Skipping %s IDE controller in slot %s: "
Bartlomiej Zolnierkiewiczca1997c2007-10-11 23:54:00 +0200625 "firmware is obsolete - please upgrade to "
626 "revision46 or higher\n",
627 DRV_NAME, pci_name(dev));
Linus Torvalds1da177e2005-04-16 15:20:36 -0700628 ret = -EAGAIN;
629 goto out;
630 }
Bartlomiej Zolnierkiewiczca1997c2007-10-11 23:54:00 +0200631 ret = sgiioc4_ide_setup_pci_device(dev);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700632out:
633 return ret;
634}
635
Linus Torvalds1da177e2005-04-16 15:20:36 -0700636int
Brent Casavant22329b52005-06-21 17:15:59 -0700637ioc4_ide_attach_one(struct ioc4_driver_data *idd)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700638{
Brent Casavantf5befce2006-06-23 02:05:52 -0700639 /* PCI-RT does not bring out IDE connection.
640 * Do not attach to this particular IOC4.
641 */
642 if (idd->idd_variant == IOC4_VARIANT_PCI_RT)
643 return 0;
644
Bartlomiej Zolnierkiewiczca1997c2007-10-11 23:54:00 +0200645 return pci_init_sgiioc4(idd->idd_pdev);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700646}
647
Brent Casavant22329b52005-06-21 17:15:59 -0700648static struct ioc4_submodule ioc4_ide_submodule = {
649 .is_name = "IOC4_ide",
650 .is_owner = THIS_MODULE,
651 .is_probe = ioc4_ide_attach_one,
652/* .is_remove = ioc4_ide_remove_one, */
653};
654
Bartlomiej Zolnierkiewicz82ab1ee2007-01-27 13:46:56 +0100655static int __init ioc4_ide_init(void)
Brent Casavant22329b52005-06-21 17:15:59 -0700656{
657 return ioc4_register_submodule(&ioc4_ide_submodule);
658}
659
Brent Casavant59f14802006-10-17 00:09:25 -0700660late_initcall(ioc4_ide_init); /* Call only after IDE init is done */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700661
Jeremy Higdona835fa72006-05-30 21:27:07 -0700662MODULE_AUTHOR("Aniket Malatpure/Jeremy Higdon");
Linus Torvalds1da177e2005-04-16 15:20:36 -0700663MODULE_DESCRIPTION("IDE PCI driver module for SGI IOC4 Base-IO Card");
664MODULE_LICENSE("GPL");