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Bryan Wu1394f032007-05-06 14:50:22 -07001#
2# For a description of the syntax of this configuration file,
3# see Documentation/kbuild/kconfig-language.txt.
4#
5
6mainmenu "uClinux/Blackfin (w/o MMU) Kernel Configuration"
7
8config MMU
9 bool
10 default n
11
12config FPU
13 bool
14 default n
15
16config RWSEM_GENERIC_SPINLOCK
17 bool
18 default y
19
20config RWSEM_XCHGADD_ALGORITHM
21 bool
22 default n
23
24config BLACKFIN
25 bool
26 default y
27
Aubrey Lie3defff2007-05-21 18:09:11 +080028config ZONE_DMA
29 bool
30 default y
31
Bryan Wu1394f032007-05-06 14:50:22 -070032config BFIN
33 bool
34 default y
35
36config SEMAPHORE_SLEEPERS
37 bool
38 default y
39
40config GENERIC_FIND_NEXT_BIT
41 bool
42 default y
43
44config GENERIC_HWEIGHT
45 bool
46 default y
47
48config GENERIC_HARDIRQS
49 bool
50 default y
51
52config GENERIC_IRQ_PROBE
53 bool
54 default y
55
56config GENERIC_TIME
57 bool
58 default n
59
Michael Hennerichb2d15832007-07-24 15:46:36 +080060config GENERIC_GPIO
Bryan Wu1394f032007-05-06 14:50:22 -070061 bool
62 default y
63
64config FORCE_MAX_ZONEORDER
65 int
66 default "14"
67
68config GENERIC_CALIBRATE_DELAY
69 bool
70 default y
71
72config IRQCHIP_DEMUX_GPIO
73 bool
Michael Hennerich34e0fc82007-07-12 16:17:18 +080074 depends on (BF53x || BF561 || BF54x)
Bryan Wu1394f032007-05-06 14:50:22 -070075 default y
76
77source "init/Kconfig"
78source "kernel/Kconfig.preempt"
79
80menu "Blackfin Processor Options"
81
82comment "Processor and Board Settings"
83
84choice
85 prompt "CPU"
86 default BF533
87
88config BF531
89 bool "BF531"
90 help
91 BF531 Processor Support.
92
93config BF532
94 bool "BF532"
95 help
96 BF532 Processor Support.
97
98config BF533
99 bool "BF533"
100 help
101 BF533 Processor Support.
102
103config BF534
104 bool "BF534"
105 help
106 BF534 Processor Support.
107
108config BF536
109 bool "BF536"
110 help
111 BF536 Processor Support.
112
113config BF537
114 bool "BF537"
115 help
116 BF537 Processor Support.
117
Roy Huang24a07a12007-07-12 22:41:45 +0800118config BF542
119 bool "BF542"
120 help
121 BF542 Processor Support.
122
123config BF544
124 bool "BF544"
125 help
126 BF544 Processor Support.
127
128config BF548
129 bool "BF548"
130 help
131 BF548 Processor Support.
132
133config BF549
134 bool "BF549"
135 help
136 BF549 Processor Support.
137
Bryan Wu1394f032007-05-06 14:50:22 -0700138config BF561
139 bool "BF561"
140 help
141 Not Supported Yet - Work in progress - BF561 Processor Support.
142
143endchoice
144
145choice
146 prompt "Silicon Rev"
147 default BF_REV_0_2 if BF537
148 default BF_REV_0_3 if BF533
Roy Huang24a07a12007-07-12 22:41:45 +0800149 default BF_REV_0_0 if BF549
150
151config BF_REV_0_0
152 bool "0.0"
153 depends on (BF549)
Bryan Wu1394f032007-05-06 14:50:22 -0700154
155config BF_REV_0_2
156 bool "0.2"
157 depends on (BF537 || BF536 || BF534)
158
159config BF_REV_0_3
160 bool "0.3"
161 depends on (BF561 || BF537 || BF536 || BF534 || BF533 || BF532 || BF531)
162
163config BF_REV_0_4
164 bool "0.4"
165 depends on (BF561 || BF533 || BF532 || BF531)
166
167config BF_REV_0_5
168 bool "0.5"
169 depends on (BF561 || BF533 || BF532 || BF531)
170
Jie Zhangde3025f2007-06-25 18:04:12 +0800171config BF_REV_ANY
172 bool "any"
173
174config BF_REV_NONE
175 bool "none"
176
Bryan Wu1394f032007-05-06 14:50:22 -0700177endchoice
178
Roy Huang24a07a12007-07-12 22:41:45 +0800179config BF53x
180 bool
181 depends on (BF531 || BF532 || BF533 || BF534 || BF536 || BF537)
182 default y
183
184config BF54x
185 bool
186 depends on (BF542 || BF544 || BF548 || BF549)
187 default y
188
Bryan Wu1394f032007-05-06 14:50:22 -0700189config BFIN_DUAL_CORE
190 bool
191 depends on (BF561)
192 default y
193
194config BFIN_SINGLE_CORE
195 bool
196 depends on !BFIN_DUAL_CORE
197 default y
198
199choice
200 prompt "System type"
201 default BFIN533_STAMP
202 help
203 Do NOT change the board here. Please use the top level
204 configuration to ensure that all the other settings are
205 correct.
206
207config BFIN533_EZKIT
208 bool "BF533-EZKIT"
209 depends on (BF533 || BF532 || BF531)
210 help
211 BF533-EZKIT-LITE board Support.
212
213config BFIN533_STAMP
214 bool "BF533-STAMP"
215 depends on (BF533 || BF532 || BF531)
216 help
217 BF533-STAMP board Support.
218
219config BFIN537_STAMP
220 bool "BF537-STAMP"
221 depends on (BF537 || BF536 || BF534)
222 help
223 BF537-STAMP board Support.
224
225config BFIN533_BLUETECHNIX_CM
226 bool "Bluetechnix CM-BF533"
227 depends on (BF533)
228 help
229 CM-BF533 support for EVAL- and DEV-Board.
230
231config BFIN537_BLUETECHNIX_CM
232 bool "Bluetechnix CM-BF537"
233 depends on (BF537)
234 help
235 CM-BF537 support for EVAL- and DEV-Board.
236
Roy Huang24a07a12007-07-12 22:41:45 +0800237config BFIN548_EZKIT
238 bool "BF548-EZKIT"
239 depends on (BF548 || BF549)
240 help
241 BFIN548-EZKIT board Support.
242
Bryan Wu1394f032007-05-06 14:50:22 -0700243config BFIN561_BLUETECHNIX_CM
Mike Frysinger0a290592007-05-21 18:09:21 +0800244 bool "Bluetechnix CM-BF561"
Bryan Wu1394f032007-05-06 14:50:22 -0700245 depends on (BF561)
246 help
247 CM-BF561 support for EVAL- and DEV-Board.
248
249config BFIN561_EZKIT
250 bool "BF561-EZKIT"
251 depends on (BF561)
252 help
253 BF561-EZKIT-LITE board Support.
254
Mike Frysinger0a290592007-05-21 18:09:21 +0800255config BFIN561_TEPLA
256 bool "BF561-TEPLA"
257 depends on (BF561)
258 help
259 BF561-TEPLA board Support.
260
Bryan Wu1394f032007-05-06 14:50:22 -0700261config PNAV10
262 bool "PNAV 1.0 board"
263 depends on (BF537)
264 help
265 PNAV 1.0 board Support.
266
267config GENERIC_BOARD
268 bool "Custom"
269 depends on (BF537 || BF536 \
270 || BF534 || BF561 || BF535 || BF533 || BF532 || BF531)
271 help
272 GENERIC or Custom board Support.
273
274endchoice
275
276config MEM_GENERIC_BOARD
277 bool
278 depends on GENERIC_BOARD
279 default y
280
281config MEM_MT48LC64M4A2FB_7E
282 bool
283 depends on (BFIN533_STAMP)
284 default y
285
286config MEM_MT48LC16M16A2TG_75
287 bool
288 depends on (BFIN533_EZKIT || BFIN561_EZKIT \
289 || BFIN533_BLUETECHNIX_CM || BFIN537_BLUETECHNIX_CM)
290 default y
291
292config MEM_MT48LC32M8A2_75
293 bool
294 depends on (BFIN537_STAMP || PNAV10)
295 default y
296
297config MEM_MT48LC8M32B2B5_7
298 bool
299 depends on (BFIN561_BLUETECHNIX_CM)
300 default y
301
302config BFIN_SHARED_FLASH_ENET
303 bool
304 depends on (BFIN533_STAMP)
305 default y
306
307source "arch/blackfin/mach-bf533/Kconfig"
308source "arch/blackfin/mach-bf561/Kconfig"
309source "arch/blackfin/mach-bf537/Kconfig"
Roy Huang24a07a12007-07-12 22:41:45 +0800310source "arch/blackfin/mach-bf548/Kconfig"
Bryan Wu1394f032007-05-06 14:50:22 -0700311
312menu "Board customizations"
313
314config CMDLINE_BOOL
315 bool "Default bootloader kernel arguments"
316
317config CMDLINE
318 string "Initial kernel command string"
319 depends on CMDLINE_BOOL
320 default "console=ttyBF0,57600"
321 help
322 If you don't have a boot loader capable of passing a command line string
323 to the kernel, you may specify one here. As a minimum, you should specify
324 the memory size and the root device (e.g., mem=8M, root=/dev/nfs).
325
Robin Getzf16295e2007-08-03 18:07:17 +0800326comment "Clock/PLL Setup"
Bryan Wu1394f032007-05-06 14:50:22 -0700327
328config CLKIN_HZ
329 int "Crystal Frequency in Hz"
330 default "11059200" if BFIN533_STAMP
331 default "27000000" if BFIN533_EZKIT
332 default "25000000" if BFIN537_STAMP
333 default "30000000" if BFIN561_EZKIT
334 default "24576000" if PNAV10
335 help
336 The frequency of CLKIN crystal oscillator on the board in Hz.
337
Robin Getzf16295e2007-08-03 18:07:17 +0800338config BFIN_KERNEL_CLOCK
339 bool "Re-program Clocks while Kernel boots?"
340 default n
341 help
342 This option decides if kernel clocks are re-programed from the
343 bootloader settings. If the clocks are not set, the SDRAM settings
344 are also not changed, and the Bootloader does 100% of the hardware
345 configuration.
346
347config PLL_BYPASS
348 bool "Bypass PLL"
349 depends on BFIN_KERNEL_CLOCK
350 default n
351
352config CLKIN_HALF
353 bool "Half Clock In"
354 depends on BFIN_KERNEL_CLOCK && (! PLL_BYPASS)
355 default n
356 help
357 If this is set the clock will be divided by 2, before it goes to the PLL.
358
359config VCO_MULT
360 int "VCO Multiplier"
361 depends on BFIN_KERNEL_CLOCK && (! PLL_BYPASS)
362 range 1 64
363 default "22" if BFIN533_EZKIT
364 default "45" if BFIN533_STAMP
365 default "20" if BFIN537_STAMP
366 default "22" if BFIN533_BLUETECHNIX_CM
367 default "20" if BFIN537_BLUETECHNIX_CM
368 default "20" if BFIN561_BLUETECHNIX_CM
369 default "20" if BFIN561_EZKIT
370 help
371 This controls the frequency of the on-chip PLL. This can be between 1 and 64.
372 PLL Frequency = (Crystal Frequency) * (this setting)
373
374choice
375 prompt "Core Clock Divider"
376 depends on BFIN_KERNEL_CLOCK
377 default CCLK_DIV_1
378 help
379 This sets the frequency of the core. It can be 1, 2, 4 or 8
380 Core Frequency = (PLL frequency) / (this setting)
381
382config CCLK_DIV_1
383 bool "1"
384
385config CCLK_DIV_2
386 bool "2"
387
388config CCLK_DIV_4
389 bool "4"
390
391config CCLK_DIV_8
392 bool "8"
393endchoice
394
395config SCLK_DIV
396 int "System Clock Divider"
397 depends on BFIN_KERNEL_CLOCK
398 range 1 15
399 default 5 if BFIN533_EZKIT
400 default 5 if BFIN533_STAMP
401 default 4 if BFIN537_STAMP
402 default 5 if BFIN533_BLUETECHNIX_CM
403 default 4 if BFIN537_BLUETECHNIX_CM
404 default 4 if BFIN561_BLUETECHNIX_CM
405 default 5 if BFIN561_EZKIT
406 help
407 This sets the frequency of the system clock (including SDRAM or DDR).
408 This can be between 1 and 15
409 System Clock = (PLL frequency) / (this setting)
410
411#
412# Max & Min Speeds for various Chips
413#
414config MAX_VCO_HZ
415 int
416 default 600000000 if BF522
417 default 600000000 if BF525
418 default 600000000 if BF527
419 default 400000000 if BF531
420 default 400000000 if BF532
421 default 750000000 if BF533
422 default 500000000 if BF534
423 default 400000000 if BF536
424 default 600000000 if BF537
425 default 533000000 if BF538
426 default 533000000 if BF539
427 default 600000000 if BF542
428 default 533000000 if BF544
429 default 533000000 if BF549
430 default 600000000 if BF561
431
432config MIN_VCO_HZ
433 int
434 default 50000000
435
436config MAX_SCLK_HZ
437 int
438 default 133000000
439
440config MIN_SCLK_HZ
441 int
442 default 27000000
443
444comment "Kernel Timer/Scheduler"
445
446source kernel/Kconfig.hz
447
448comment "Memory Setup"
449
Bryan Wu1394f032007-05-06 14:50:22 -0700450config MEM_SIZE
451 int "SDRAM Memory Size in MBytes"
452 default 32 if BFIN533_EZKIT
453 default 64 if BFIN537_STAMP
454 default 64 if BFIN561_EZKIT
455 default 128 if BFIN533_STAMP
456 default 64 if PNAV10
457
458config MEM_ADD_WIDTH
459 int "SDRAM Memory Address Width"
460 default 9 if BFIN533_EZKIT
461 default 9 if BFIN561_EZKIT
462 default 10 if BFIN537_STAMP
463 default 11 if BFIN533_STAMP
464 default 10 if PNAV10
465
466config ENET_FLASH_PIN
467 int "PF port/pin used for flash and ethernet sharing"
468 depends on (BFIN533_STAMP)
469 default 0
470 help
471 PF port/pin used for flash and ethernet sharing to allow other PF
472 pins to be used on other platforms without having to touch common
473 code.
474 For example: PF0 --> 0,PF1 --> 1,PF2 --> 2, etc.
475
476config BOOT_LOAD
477 hex "Kernel load address for booting"
478 default "0x1000"
Mike Frysinger2d8f1612007-08-05 14:06:16 +0800479 range 0x1000 0x20000000
Bryan Wu1394f032007-05-06 14:50:22 -0700480 help
481 This option allows you to set the load address of the kernel.
482 This can be useful if you are on a board which has a small amount
483 of memory or you wish to reserve some memory at the beginning of
484 the address space.
485
Mike Frysinger2d8f1612007-08-05 14:06:16 +0800486 Note that you need to keep this value above 4k (0x1000) as this
487 memory region is used to capture NULL pointer references as well
488 as some core kernel functions.
Bryan Wu1394f032007-05-06 14:50:22 -0700489
490comment "LED Status Indicators"
491 depends on (BFIN533_STAMP || BFIN533_BLUETECHNIX_CM)
492
493config BFIN_ALIVE_LED
494 bool "Enable Board Alive"
495 depends on (BFIN533_STAMP || BFIN533_BLUETECHNIX_CM)
496 default n
497 help
498 Blink the LEDs you select when the kernel is running. Helps detect
499 a hung kernel.
500
501config BFIN_ALIVE_LED_NUM
502 int "LED"
503 depends on BFIN_ALIVE_LED
504 range 1 3 if BFIN533_STAMP
505 default "3" if BFIN533_STAMP
506 help
507 Select the LED (marked on the board) for you to blink.
508
509config BFIN_IDLE_LED
510 bool "Enable System Load/Idle LED"
511 depends on (BFIN533_STAMP || BFIN533_BLUETECHNIX_CM)
512 default n
513 help
514 Blinks the LED you select when to determine kernel load.
515
516config BFIN_IDLE_LED_NUM
517 int "LED"
518 depends on BFIN_IDLE_LED
519 range 1 3 if BFIN533_STAMP
520 default "2" if BFIN533_STAMP
521 help
522 Select the LED (marked on the board) for you to blink.
523
524#
525# Sorry - but you need to put the hex address here -
526#
527
528# Flag Data register
529config BFIN_ALIVE_LED_PORT
530 hex
531 default 0xFFC00700 if (BFIN533_STAMP)
532
533# Peripheral Flag Direction Register
534config BFIN_ALIVE_LED_DPORT
535 hex
536 default 0xFFC00730 if (BFIN533_STAMP)
537
538config BFIN_ALIVE_LED_PIN
539 hex
540 default 0x04 if (BFIN533_STAMP && BFIN_ALIVE_LED_NUM = 1)
541 default 0x08 if (BFIN533_STAMP && BFIN_ALIVE_LED_NUM = 2)
542 default 0x10 if (BFIN533_STAMP && BFIN_ALIVE_LED_NUM = 3)
543
544config BFIN_IDLE_LED_PORT
545 hex
546 default 0xFFC00700 if (BFIN533_STAMP)
547
548# Peripheral Flag Direction Register
549config BFIN_IDLE_LED_DPORT
550 hex
551 default 0xFFC00730 if (BFIN533_STAMP)
552
553config BFIN_IDLE_LED_PIN
554 hex
555 default 0x04 if (BFIN533_STAMP && BFIN_IDLE_LED_NUM = 1)
556 default 0x08 if (BFIN533_STAMP && BFIN_IDLE_LED_NUM = 2)
557 default 0x10 if (BFIN533_STAMP && BFIN_IDLE_LED_NUM = 3)
558
Bryan Wu1394f032007-05-06 14:50:22 -0700559endmenu
560
561
562menu "Blackfin Kernel Optimizations"
563
Bryan Wu1394f032007-05-06 14:50:22 -0700564comment "Memory Optimizations"
565
566config I_ENTRY_L1
567 bool "Locate interrupt entry code in L1 Memory"
568 default y
569 help
570 If enabled interrupt entry code (STORE/RESTORE CONTEXT) is linked
571 into L1 instruction memory.(less latency)
572
573config EXCPT_IRQ_SYSC_L1
574 bool "Locate entire ASM lowlevel excepetion / interrupt - Syscall and CPLB handler code in L1 Memory"
575 default y
576 help
577 If enabled entire ASM lowlevel exception and interrupt entry code (STORE/RESTORE CONTEXT) is linked
578 into L1 instruction memory.(less latency)
579
580config DO_IRQ_L1
581 bool "Locate frequently called do_irq dispatcher function in L1 Memory"
582 default y
583 help
584 If enabled frequently called do_irq dispatcher function is linked
585 into L1 instruction memory.(less latency)
586
587config CORE_TIMER_IRQ_L1
588 bool "Locate frequently called timer_interrupt() function in L1 Memory"
589 default y
590 help
591 If enabled frequently called timer_interrupt() function is linked
592 into L1 instruction memory.(less latency)
593
594config IDLE_L1
595 bool "Locate frequently idle function in L1 Memory"
596 default y
597 help
598 If enabled frequently called idle function is linked
599 into L1 instruction memory.(less latency)
600
601config SCHEDULE_L1
602 bool "Locate kernel schedule function in L1 Memory"
603 default y
604 help
605 If enabled frequently called kernel schedule is linked
606 into L1 instruction memory.(less latency)
607
608config ARITHMETIC_OPS_L1
609 bool "Locate kernel owned arithmetic functions in L1 Memory"
610 default y
611 help
612 If enabled arithmetic functions are linked
613 into L1 instruction memory.(less latency)
614
615config ACCESS_OK_L1
616 bool "Locate access_ok function in L1 Memory"
617 default y
618 help
619 If enabled access_ok function is linked
620 into L1 instruction memory.(less latency)
621
622config MEMSET_L1
623 bool "Locate memset function in L1 Memory"
624 default y
625 help
626 If enabled memset function is linked
627 into L1 instruction memory.(less latency)
628
629config MEMCPY_L1
630 bool "Locate memcpy function in L1 Memory"
631 default y
632 help
633 If enabled memcpy function is linked
634 into L1 instruction memory.(less latency)
635
636config SYS_BFIN_SPINLOCK_L1
637 bool "Locate sys_bfin_spinlock function in L1 Memory"
638 default y
639 help
640 If enabled sys_bfin_spinlock function is linked
641 into L1 instruction memory.(less latency)
642
643config IP_CHECKSUM_L1
644 bool "Locate IP Checksum function in L1 Memory"
645 default n
646 help
647 If enabled IP Checksum function is linked
648 into L1 instruction memory.(less latency)
649
650config CACHELINE_ALIGNED_L1
651 bool "Locate cacheline_aligned data to L1 Data Memory"
Michael Hennerich157cc5a2007-07-12 16:20:21 +0800652 default y if !BF54x
653 default n if BF54x
Bryan Wu1394f032007-05-06 14:50:22 -0700654 depends on !BF531
655 help
656 If enabled cacheline_anligned data is linked
657 into L1 data memory.(less latency)
658
659config SYSCALL_TAB_L1
660 bool "Locate Syscall Table L1 Data Memory"
661 default n
662 depends on !BF531
663 help
664 If enabled the Syscall LUT is linked
665 into L1 data memory.(less latency)
666
667config CPLB_SWITCH_TAB_L1
668 bool "Locate CPLB Switch Tables L1 Data Memory"
669 default n
670 depends on !BF531
671 help
672 If enabled the CPLB Switch Tables are linked
673 into L1 data memory.(less latency)
674
675endmenu
676
677
678choice
679 prompt "Kernel executes from"
680 help
681 Choose the memory type that the kernel will be running in.
682
683config RAMKERNEL
684 bool "RAM"
685 help
686 The kernel will be resident in RAM when running.
687
688config ROMKERNEL
689 bool "ROM"
690 help
691 The kernel will be resident in FLASH/ROM when running.
692
693endchoice
694
695source "mm/Kconfig"
696
Bryan Wudb0fa202007-07-12 14:55:05 +0800697config LARGE_ALLOCS
698 bool "Allow allocating large blocks (> 1MB) of memory"
699 help
700 Allow the slab memory allocator to keep chains for very large
701 memory sizes - upto 32MB. You may need this if your system has
702 a lot of RAM, and you need to able to allocate very large
703 contiguous chunks. If unsure, say N.
704
Bryan Wu1394f032007-05-06 14:50:22 -0700705config BFIN_DMA_5XX
706 bool "Enable DMA Support"
Roy Huang24a07a12007-07-12 22:41:45 +0800707 depends on (BF533 || BF532 || BF531 || BF537 || BF536 || BF534 || BF561 || BF54x)
Bryan Wu1394f032007-05-06 14:50:22 -0700708 default y
709 help
710 DMA driver for BF5xx.
711
712choice
713 prompt "Uncached SDRAM region"
714 default DMA_UNCACHED_1M
715 depends BFIN_DMA_5XX
716config DMA_UNCACHED_2M
717 bool "Enable 2M DMA region"
718config DMA_UNCACHED_1M
719 bool "Enable 1M DMA region"
720config DMA_UNCACHED_NONE
721 bool "Disable DMA region"
722endchoice
723
724
725comment "Cache Support"
Robin Getz3bebca22007-10-10 23:55:26 +0800726config BFIN_ICACHE
Bryan Wu1394f032007-05-06 14:50:22 -0700727 bool "Enable ICACHE"
Robin Getz3bebca22007-10-10 23:55:26 +0800728config BFIN_DCACHE
Bryan Wu1394f032007-05-06 14:50:22 -0700729 bool "Enable DCACHE"
Robin Getz3bebca22007-10-10 23:55:26 +0800730config BFIN_DCACHE_BANKA
Bryan Wu1394f032007-05-06 14:50:22 -0700731 bool "Enable only 16k BankA DCACHE - BankB is SRAM"
Robin Getz3bebca22007-10-10 23:55:26 +0800732 depends on BFIN_DCACHE && !BF531
Bryan Wu1394f032007-05-06 14:50:22 -0700733 default n
Robin Getz3bebca22007-10-10 23:55:26 +0800734config BFIN_ICACHE_LOCK
735 bool "Enable Instruction Cache Locking"
Bryan Wu1394f032007-05-06 14:50:22 -0700736
737choice
738 prompt "Policy"
Robin Getz3bebca22007-10-10 23:55:26 +0800739 depends on BFIN_DCACHE
740 default BFIN_WB
741config BFIN_WB
Bryan Wu1394f032007-05-06 14:50:22 -0700742 bool "Write back"
743 help
744 Write Back Policy:
745 Cached data will be written back to SDRAM only when needed.
746 This can give a nice increase in performance, but beware of
747 broken drivers that do not properly invalidate/flush their
748 cache.
749
750 Write Through Policy:
751 Cached data will always be written back to SDRAM when the
752 cache is updated. This is a completely safe setting, but
753 performance is worse than Write Back.
754
755 If you are unsure of the options and you want to be safe,
756 then go with Write Through.
757
Robin Getz3bebca22007-10-10 23:55:26 +0800758config BFIN_WT
Bryan Wu1394f032007-05-06 14:50:22 -0700759 bool "Write through"
760 help
761 Write Back Policy:
762 Cached data will be written back to SDRAM only when needed.
763 This can give a nice increase in performance, but beware of
764 broken drivers that do not properly invalidate/flush their
765 cache.
766
767 Write Through Policy:
768 Cached data will always be written back to SDRAM when the
769 cache is updated. This is a completely safe setting, but
770 performance is worse than Write Back.
771
772 If you are unsure of the options and you want to be safe,
773 then go with Write Through.
774
775endchoice
776
777config L1_MAX_PIECE
778 int "Set the max L1 SRAM pieces"
779 default 16
780 help
781 Set the max memory pieces for the L1 SRAM allocation algorithm.
782 Min value is 16. Max value is 1024.
783
Bryan Wu1394f032007-05-06 14:50:22 -0700784comment "Asynchonous Memory Configuration"
785
786menu "EBIU_AMBCTL Global Control"
787config C_AMCKEN
788 bool "Enable CLKOUT"
789 default y
790
791config C_CDPRIO
792 bool "DMA has priority over core for ext. accesses"
Michael Hennerich9be343c2007-07-12 11:58:44 +0800793 depends on !BF54x
Bryan Wu1394f032007-05-06 14:50:22 -0700794 default n
795
796config C_B0PEN
797 depends on BF561
798 bool "Bank 0 16 bit packing enable"
799 default y
800
801config C_B1PEN
802 depends on BF561
803 bool "Bank 1 16 bit packing enable"
804 default y
805
806config C_B2PEN
807 depends on BF561
808 bool "Bank 2 16 bit packing enable"
809 default y
810
811config C_B3PEN
812 depends on BF561
813 bool "Bank 3 16 bit packing enable"
814 default n
815
816choice
817 prompt"Enable Asynchonous Memory Banks"
818 default C_AMBEN_ALL
819
820config C_AMBEN
821 bool "Disable All Banks"
822
823config C_AMBEN_B0
824 bool "Enable Bank 0"
825
826config C_AMBEN_B0_B1
827 bool "Enable Bank 0 & 1"
828
829config C_AMBEN_B0_B1_B2
830 bool "Enable Bank 0 & 1 & 2"
831
832config C_AMBEN_ALL
833 bool "Enable All Banks"
834endchoice
835endmenu
836
837menu "EBIU_AMBCTL Control"
838config BANK_0
839 hex "Bank 0"
840 default 0x7BB0
841
842config BANK_1
843 hex "Bank 1"
844 default 0x7BB0
845
846config BANK_2
847 hex "Bank 2"
848 default 0x7BB0
849
850config BANK_3
851 hex "Bank 3"
852 default 0x99B3
853endmenu
854
855endmenu
856
857#############################################################################
858menu "Bus options (PCI, PCMCIA, EISA, MCA, ISA)"
859
860config PCI
861 bool "PCI support"
862 help
863 Support for PCI bus.
864
865source "drivers/pci/Kconfig"
866
867config HOTPLUG
868 bool "Support for hot-pluggable device"
869 help
870 Say Y here if you want to plug devices into your computer while
871 the system is running, and be able to use them quickly. In many
872 cases, the devices can likewise be unplugged at any time too.
873
874 One well known example of this is PCMCIA- or PC-cards, credit-card
875 size devices such as network cards, modems or hard drives which are
876 plugged into slots found on all modern laptop computers. Another
877 example, used on modern desktops as well as laptops, is USB.
878
879 Enable HOTPLUG and KMOD, and build a modular kernel. Get agent
880 software (at <http://linux-hotplug.sourceforge.net/>) and install it.
881 Then your kernel will automatically call out to a user mode "policy
882 agent" (/sbin/hotplug) to load modules and set up software needed
883 to use devices as you hotplug them.
884
885source "drivers/pcmcia/Kconfig"
886
887source "drivers/pci/hotplug/Kconfig"
888
889endmenu
890
891menu "Executable file formats"
892
893source "fs/Kconfig.binfmt"
894
895endmenu
896
897menu "Power management options"
898source "kernel/power/Kconfig"
899
900choice
901 prompt "Select PM Wakeup Event Source"
902 default PM_WAKEUP_GPIO_BY_SIC_IWR
903 depends on PM
904 help
905 If you have a GPIO already configured as input with the corresponding PORTx_MASK
906 bit set - "Specify Wakeup Event by SIC_IWR value"
907
908config PM_WAKEUP_GPIO_BY_SIC_IWR
909 bool "Specify Wakeup Event by SIC_IWR value"
910config PM_WAKEUP_BY_GPIO
911 bool "Cause Wakeup Event by GPIO"
912config PM_WAKEUP_GPIO_API
913 bool "Configure Wakeup Event by PM GPIO API"
914
915endchoice
916
917config PM_WAKEUP_SIC_IWR
918 hex "Wakeup Events (SIC_IWR)"
919 depends on PM_WAKEUP_GPIO_BY_SIC_IWR
920 default 0x80000000 if (BF537 || BF536 || BF534)
921 default 0x100000 if (BF533 || BF532 || BF531)
922
923config PM_WAKEUP_GPIO_NUMBER
924 int "Wakeup GPIO number"
925 range 0 47
926 depends on PM_WAKEUP_BY_GPIO
927 default 2 if BFIN537_STAMP
928
929choice
930 prompt "GPIO Polarity"
931 depends on PM_WAKEUP_BY_GPIO
932 default PM_WAKEUP_GPIO_POLAR_H
933config PM_WAKEUP_GPIO_POLAR_H
934 bool "Active High"
935config PM_WAKEUP_GPIO_POLAR_L
936 bool "Active Low"
937config PM_WAKEUP_GPIO_POLAR_EDGE_F
938 bool "Falling EDGE"
939config PM_WAKEUP_GPIO_POLAR_EDGE_R
940 bool "Rising EDGE"
941config PM_WAKEUP_GPIO_POLAR_EDGE_B
942 bool "Both EDGE"
943endchoice
944
945endmenu
946
Roy Huang24a07a12007-07-12 22:41:45 +0800947if (BF537 || BF533 || BF54x)
Bryan Wu1394f032007-05-06 14:50:22 -0700948
949menu "CPU Frequency scaling"
950
951source "drivers/cpufreq/Kconfig"
952
953config CPU_FREQ
954 bool
955 default n
956 help
957 If you want to enable this option, you should select the
958 DPMC driver from Character Devices.
959endmenu
960
961endif
962
963source "net/Kconfig"
964
965source "drivers/Kconfig"
966
967source "fs/Kconfig"
968
969source "arch/blackfin/oprofile/Kconfig"
970
971menu "Kernel hacking"
972
973source "lib/Kconfig.debug"
974
975config DEBUG_HWERR
976 bool "Hardware error interrupt debugging"
977 depends on DEBUG_KERNEL
978 help
979 When enabled, the hardware error interrupt is never disabled, and
980 will happen immediately when an error condition occurs. This comes
981 at a slight cost in code size, but is necessary if you are getting
982 hardware error interrupts and need to know where they are coming
983 from.
984
985config DEBUG_ICACHE_CHECK
986 bool "Check Instruction cache coherancy"
987 depends on DEBUG_KERNEL
988 depends on DEBUG_HWERR
989 help
990 Say Y here if you are getting wierd unexplained errors. This will
991 ensure that icache is what SDRAM says it should be, by doing a
992 byte wise comparision between SDRAM and instruction cache. This
993 also relocates the irq_panic() function to L1 memory, (which is
994 un-cached).
995
996config DEBUG_KERNEL_START
997 bool "Debug Kernel Startup"
998 depends on DEBUG_KERNEL
999 help
1000 Say Y here to put in an mini-execption handler before the kernel
1001 replaces the bootloader exception handler. This will stop kernels
1002 from dieing at startup with no visible error messages.
1003
1004config DEBUG_SERIAL_EARLY_INIT
1005 bool "Initialize serial driver early"
1006 default n
1007 depends on SERIAL_BFIN
1008 help
1009 Say Y here if you want to get kernel output early when kernel
1010 crashes before the normal console initialization. If this option
1011 is enable, console output will always go to the ttyBF0, no matter
1012 what kernel boot paramters you set.
1013
1014config DEBUG_HUNT_FOR_ZERO
1015 bool "Catch NULL pointer reads/writes"
1016 default y
1017 help
1018 Say Y here to catch reads/writes to anywhere in the memory range
1019 from 0x0000 - 0x0FFF (the first 4k) of memory. This is useful in
1020 catching common programming errors such as NULL pointer dereferences.
1021
1022 Misbehaving applications will be killed (generate a SEGV) while the
1023 kernel will trigger a panic.
1024
1025 Enabling this option will take up an extra entry in CPLB table.
1026 Otherwise, there is no extra overhead.
1027
Robin Getz518039b2007-07-25 11:03:28 +08001028config DEBUG_BFIN_HWTRACE_ON
1029 bool "Turn on Blackfin's Hardware Trace"
1030 default y
1031 help
1032 All Blackfins include a Trace Unit which stores a history of the last
1033 16 changes in program flow taken by the program sequencer. The history
1034 allows the user to recreate the program sequencer’s recent path. This
1035 can be handy when an application dies - we print out the execution
1036 path of how it got to the offending instruction.
1037
1038 By turning this off, you may save a tiny amount of power.
1039
1040choice
1041 prompt "Omit loop Tracing"
1042 default DEBUG_BFIN_HWTRACE_COMPRESSION_OFF
1043 depends on DEBUG_BFIN_HWTRACE_ON
1044 help
1045 The trace buffer can be configured to omit recording of changes in
1046 program flow that match either the last entry or one of the last
1047 two entries. Omitting one of these entries from the record prevents
1048 the trace buffer from overflowing because of any sort of loop (for, do
1049 while, etc) in the program.
1050
1051 Because zero-overhead Hardware loops are not recorded in the trace buffer,
1052 this feature can be used to prevent trace overflow from loops that
1053 are nested four deep.
1054
1055config DEBUG_BFIN_HWTRACE_COMPRESSION_OFF
1056 bool "Trace all Loops"
1057 help
1058 The trace buffer records all changes of flow
1059
1060config DEBUG_BFIN_HWTRACE_COMPRESSION_ONE
1061 bool "Compress single-level loops"
1062 help
1063 The trace buffer does not record single loops - helpful if trace
1064 is spinning on a while or do loop.
1065
1066config DEBUG_BFIN_HWTRACE_COMPRESSION_TWO
1067 bool "Compress two-level loops"
1068 help
1069 The trace buffer does not record loops two levels deep. Helpful if
1070 the trace is spinning in a nested loop
1071
1072endchoice
1073
1074config DEBUG_BFIN_HWTRACE_COMPRESSION
1075 int
1076 depends on DEBUG_BFIN_HWTRACE_ON
1077 default 0 if DEBUG_BFIN_HWTRACE_COMPRESSION_OFF
1078 default 1 if DEBUG_BFIN_HWTRACE_COMPRESSION_ONE
1079 default 2 if DEBUG_BFIN_HWTRACE_COMPRESSION_TWO
1080
1081
1082config DEBUG_BFIN_HWTRACE_EXPAND
1083 bool "Expand Trace Buffer greater than 16 entries"
1084 depends on DEBUG_BFIN_HWTRACE_ON
1085 default n
1086 help
1087 By selecting this option, every time the 16 hardware entries in
1088 the Blackfin's HW Trace buffer are full, the kernel will move them
1089 into a software buffer, for dumping when there is an issue. This
1090 has a great impact on performance, (an interrupt every 16 change of
1091 flows) and should normally be turned off, except in those nasty
1092 debugging sessions
1093
1094config DEBUG_BFIN_HWTRACE_EXPAND_LEN
1095 int "Size of Trace buffer (in power of 2k)"
1096 range 0 4
1097 depends on DEBUG_BFIN_HWTRACE_EXPAND
1098 default 1
1099 help
1100 This sets the size of the software buffer that the trace information
1101 is kept in.
1102 0 for (2^0) 1k, or 256 entries,
1103 1 for (2^1) 2k, or 512 entries,
1104 2 for (2^2) 4k, or 1024 entries,
1105 3 for (2^3) 8k, or 2048 entries,
1106 4 for (2^4) 16k, or 4096 entries
1107
Bryan Wu1394f032007-05-06 14:50:22 -07001108config DEBUG_BFIN_NO_KERN_HWTRACE
1109 bool "Trace user apps (turn off hwtrace in kernel)"
Robin Getz518039b2007-07-25 11:03:28 +08001110 depends on DEBUG_BFIN_HWTRACE_ON
Bryan Wu1394f032007-05-06 14:50:22 -07001111 default n
1112 help
1113 Some pieces of the kernel contain a lot of flow changes which can
1114 quickly fill up the hardware trace buffer. When debugging crashes,
1115 the hardware trace may indicate that the problem lies in kernel
1116 space when in reality an application is buggy.
1117
1118 Say Y here to disable hardware tracing in some known "jumpy" pieces
1119 of code so that the trace buffer will extend further back.
1120
1121config DUAL_CORE_TEST_MODULE
1122 tristate "Dual Core Test Module"
1123 depends on (BF561)
1124 default n
1125 help
1126 Say Y here to build-in dual core test module for dual core test.
1127
1128config CPLB_INFO
1129 bool "Display the CPLB information"
1130 help
1131 Display the CPLB information.
1132
1133config ACCESS_CHECK
1134 bool "Check the user pointer address"
1135 default y
1136 help
1137 Usually the pointer transfer from user space is checked to see if its
1138 address is in the kernel space.
1139
1140 Say N here to disable that check to improve the performance.
1141
1142endmenu
1143
1144source "security/Kconfig"
1145
1146source "crypto/Kconfig"
1147
1148source "lib/Kconfig"