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Kuninori Morimoto287c1292009-05-26 07:04:52 +00001/*
2 * linux/arch/sh/boards/se/7724/setup.c
3 *
4 * Copyright (C) 2009 Renesas Solutions Corp.
5 *
6 * Kuninori Morimoto <morimoto.kuninori@renesas.com>
7 *
8 * This file is subject to the terms and conditions of the GNU General Public
9 * License. See the file "COPYING" in the main directory of this archive
10 * for more details.
11 */
12
13#include <linux/init.h>
14#include <linux/device.h>
15#include <linux/interrupt.h>
16#include <linux/platform_device.h>
17#include <linux/mtd/physmap.h>
18#include <linux/delay.h>
19#include <linux/smc91x.h>
20#include <linux/gpio.h>
21#include <linux/input.h>
Magnus Damm9731f4a2009-07-03 09:40:03 +000022#include <linux/usb/r8a66597.h>
Kuninori Morimoto287c1292009-05-26 07:04:52 +000023#include <video/sh_mobile_lcdc.h>
24#include <media/sh_mobile_ceu.h>
Kuninori Morimoto3e9ad522009-08-21 01:24:54 +000025#include <sound/sh_fsi.h>
Kuninori Morimoto287c1292009-05-26 07:04:52 +000026#include <asm/io.h>
27#include <asm/heartbeat.h>
Kuninori Morimotoa80cad92009-06-26 07:05:39 +000028#include <asm/sh_eth.h>
29#include <asm/clock.h>
Kuninori Morimoto287c1292009-05-26 07:04:52 +000030#include <asm/sh_keysc.h>
Magnus Damm3b9f2952009-10-29 10:52:23 +000031#include <asm/suspend.h>
Kuninori Morimoto287c1292009-05-26 07:04:52 +000032#include <cpu/sh7724.h>
33#include <mach-se/mach/se7724.h>
34
35/*
36 * SWx 1234 5678
37 * ------------------------------------
38 * SW31 : 1001 1100 : default
39 * SW32 : 0111 1111 : use on board flash
40 *
41 * SW41 : abxx xxxx -> a = 0 : Analog monitor
42 * 1 : Digital monitor
43 * b = 0 : VGA
Kuninori Morimoto4f324312009-08-03 04:52:03 +000044 * 1 : 720p
45 */
46
47/*
48 * about 720p
49 *
50 * When you use 1280 x 720 lcdc output,
51 * you should change OSC6 lcdc clock from 25.175MHz to 74.25MHz,
52 * and change SW41 to use 720p
Kuninori Morimoto287c1292009-05-26 07:04:52 +000053 */
54
55/* Heartbeat */
56static struct heartbeat_data heartbeat_data = {
57 .regsize = 16,
58};
59
60static struct resource heartbeat_resources[] = {
61 [0] = {
62 .start = PA_LED,
63 .end = PA_LED,
64 .flags = IORESOURCE_MEM,
65 },
66};
67
68static struct platform_device heartbeat_device = {
69 .name = "heartbeat",
70 .id = -1,
71 .dev = {
72 .platform_data = &heartbeat_data,
73 },
74 .num_resources = ARRAY_SIZE(heartbeat_resources),
75 .resource = heartbeat_resources,
76};
77
78/* LAN91C111 */
79static struct smc91x_platdata smc91x_info = {
80 .flags = SMC91X_USE_16BIT | SMC91X_NOWAIT,
81};
82
83static struct resource smc91x_eth_resources[] = {
84 [0] = {
85 .name = "SMC91C111" ,
86 .start = 0x1a300300,
87 .end = 0x1a30030f,
88 .flags = IORESOURCE_MEM,
89 },
90 [1] = {
91 .start = IRQ0_SMC,
92 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
93 },
94};
95
96static struct platform_device smc91x_eth_device = {
97 .name = "smc91x",
98 .num_resources = ARRAY_SIZE(smc91x_eth_resources),
99 .resource = smc91x_eth_resources,
100 .dev = {
101 .platform_data = &smc91x_info,
102 },
103};
104
105/* MTD */
106static struct mtd_partition nor_flash_partitions[] = {
107 {
108 .name = "uboot",
109 .offset = 0,
110 .size = (1 * 1024 * 1024),
111 .mask_flags = MTD_WRITEABLE, /* Read-only */
112 }, {
113 .name = "kernel",
114 .offset = MTDPART_OFS_APPEND,
115 .size = (2 * 1024 * 1024),
116 }, {
117 .name = "free-area",
118 .offset = MTDPART_OFS_APPEND,
119 .size = MTDPART_SIZ_FULL,
120 },
121};
122
123static struct physmap_flash_data nor_flash_data = {
124 .width = 2,
125 .parts = nor_flash_partitions,
126 .nr_parts = ARRAY_SIZE(nor_flash_partitions),
127};
128
129static struct resource nor_flash_resources[] = {
130 [0] = {
131 .name = "NOR Flash",
132 .start = 0x00000000,
133 .end = 0x01ffffff,
134 .flags = IORESOURCE_MEM,
135 }
136};
137
138static struct platform_device nor_flash_device = {
139 .name = "physmap-flash",
140 .resource = nor_flash_resources,
141 .num_resources = ARRAY_SIZE(nor_flash_resources),
142 .dev = {
143 .platform_data = &nor_flash_data,
144 },
145};
146
147/* LCDC */
148static struct sh_mobile_lcdc_info lcdc_info = {
149 .clock_source = LCDC_CLK_EXTERNAL,
150 .ch[0] = {
151 .chan = LCDC_CHAN_MAINLCD,
152 .bpp = 16,
153 .clock_divider = 1,
154 .lcd_cfg = {
155 .name = "LB070WV1",
156 .sync = 0, /* hsync and vsync are active low */
157 },
158 .lcd_size_cfg = { /* 7.0 inch */
159 .width = 152,
160 .height = 91,
161 },
162 .board_cfg = {
163 },
164 }
165};
166
167static struct resource lcdc_resources[] = {
168 [0] = {
169 .name = "LCDC",
170 .start = 0xfe940000,
Phil Edworthya6f15ad2009-09-15 12:00:30 +0000171 .end = 0xfe942fff,
Kuninori Morimoto287c1292009-05-26 07:04:52 +0000172 .flags = IORESOURCE_MEM,
173 },
174 [1] = {
175 .start = 106,
176 .flags = IORESOURCE_IRQ,
177 },
178};
179
180static struct platform_device lcdc_device = {
181 .name = "sh_mobile_lcdc_fb",
182 .num_resources = ARRAY_SIZE(lcdc_resources),
183 .resource = lcdc_resources,
184 .dev = {
185 .platform_data = &lcdc_info,
186 },
Magnus Dammdf47cd02009-07-31 07:48:29 +0000187 .archdata = {
188 .hwblk_id = HWBLK_LCDC,
189 },
Kuninori Morimoto287c1292009-05-26 07:04:52 +0000190};
191
192/* CEU0 */
193static struct sh_mobile_ceu_info sh_mobile_ceu0_info = {
194 .flags = SH_CEU_FLAG_USE_8BIT_BUS,
195};
196
197static struct resource ceu0_resources[] = {
198 [0] = {
199 .name = "CEU0",
200 .start = 0xfe910000,
201 .end = 0xfe91009f,
202 .flags = IORESOURCE_MEM,
203 },
204 [1] = {
205 .start = 52,
206 .flags = IORESOURCE_IRQ,
207 },
208 [2] = {
209 /* place holder for contiguous memory */
210 },
211};
212
213static struct platform_device ceu0_device = {
214 .name = "sh_mobile_ceu",
215 .id = 0, /* "ceu0" clock */
216 .num_resources = ARRAY_SIZE(ceu0_resources),
217 .resource = ceu0_resources,
218 .dev = {
219 .platform_data = &sh_mobile_ceu0_info,
220 },
Magnus Dammdf47cd02009-07-31 07:48:29 +0000221 .archdata = {
222 .hwblk_id = HWBLK_CEU0,
223 },
Kuninori Morimoto287c1292009-05-26 07:04:52 +0000224};
225
226/* CEU1 */
227static struct sh_mobile_ceu_info sh_mobile_ceu1_info = {
228 .flags = SH_CEU_FLAG_USE_8BIT_BUS,
229};
230
231static struct resource ceu1_resources[] = {
232 [0] = {
233 .name = "CEU1",
234 .start = 0xfe914000,
235 .end = 0xfe91409f,
236 .flags = IORESOURCE_MEM,
237 },
238 [1] = {
239 .start = 63,
240 .flags = IORESOURCE_IRQ,
241 },
242 [2] = {
243 /* place holder for contiguous memory */
244 },
245};
246
247static struct platform_device ceu1_device = {
248 .name = "sh_mobile_ceu",
249 .id = 1, /* "ceu1" clock */
250 .num_resources = ARRAY_SIZE(ceu1_resources),
251 .resource = ceu1_resources,
252 .dev = {
253 .platform_data = &sh_mobile_ceu1_info,
254 },
Magnus Dammdf47cd02009-07-31 07:48:29 +0000255 .archdata = {
256 .hwblk_id = HWBLK_CEU1,
257 },
Kuninori Morimoto287c1292009-05-26 07:04:52 +0000258};
259
Kuninori Morimoto3e9ad522009-08-21 01:24:54 +0000260/* FSI */
261/*
262 * FSI-A use external clock which came from ak464x.
263 * So, we should change parent of fsi
264 */
265#define FCLKACR 0xa4150008
266static void fsimck_init(struct clk *clk)
267{
268 u32 status = ctrl_inl(clk->enable_reg);
269
270 /* use external clock */
271 status &= ~0x000000ff;
272 status |= 0x00000080;
273 ctrl_outl(status, clk->enable_reg);
274}
275
276static struct clk_ops fsimck_clk_ops = {
277 .init = fsimck_init,
278};
279
280static struct clk fsimcka_clk = {
281 .name = "fsimcka_clk",
282 .id = -1,
283 .ops = &fsimck_clk_ops,
284 .enable_reg = (void __iomem *)FCLKACR,
285 .rate = 0, /* unknown */
286};
287
288struct sh_fsi_platform_info fsi_info = {
289 .porta_flags = SH_FSI_BRS_INV |
290 SH_FSI_OUT_SLAVE_MODE |
291 SH_FSI_IN_SLAVE_MODE |
292 SH_FSI_OFMT(PCM) |
293 SH_FSI_IFMT(PCM),
294};
295
296static struct resource fsi_resources[] = {
297 [0] = {
298 .name = "FSI",
299 .start = 0xFE3C0000,
300 .end = 0xFE3C021d,
301 .flags = IORESOURCE_MEM,
302 },
303 [1] = {
304 .start = 108,
305 .flags = IORESOURCE_IRQ,
306 },
307};
308
309static struct platform_device fsi_device = {
310 .name = "sh_fsi",
311 .id = 0,
312 .num_resources = ARRAY_SIZE(fsi_resources),
313 .resource = fsi_resources,
314 .dev = {
315 .platform_data = &fsi_info,
316 },
317};
318
Magnus Damm9747e78b2009-08-15 02:53:34 +0000319/* KEYSC in SoC (Needs SW33-2 set to ON) */
Kuninori Morimoto287c1292009-05-26 07:04:52 +0000320static struct sh_keysc_info keysc_info = {
321 .mode = SH_KEYSC_MODE_1,
322 .scan_timing = 10,
323 .delay = 50,
324 .keycodes = {
325 KEY_1, KEY_2, KEY_3, KEY_4, KEY_5,
326 KEY_6, KEY_7, KEY_8, KEY_9, KEY_A,
327 KEY_B, KEY_C, KEY_D, KEY_E, KEY_F,
328 KEY_G, KEY_H, KEY_I, KEY_K, KEY_L,
329 KEY_M, KEY_N, KEY_O, KEY_P, KEY_Q,
330 KEY_R, KEY_S, KEY_T, KEY_U, KEY_V,
331 },
332};
333
334static struct resource keysc_resources[] = {
335 [0] = {
Magnus Damm9747e78b2009-08-15 02:53:34 +0000336 .name = "KEYSC",
337 .start = 0x044b0000,
338 .end = 0x044b000f,
Kuninori Morimoto287c1292009-05-26 07:04:52 +0000339 .flags = IORESOURCE_MEM,
340 },
341 [1] = {
Magnus Damm9747e78b2009-08-15 02:53:34 +0000342 .start = 79,
Kuninori Morimoto287c1292009-05-26 07:04:52 +0000343 .flags = IORESOURCE_IRQ,
344 },
345};
346
347static struct platform_device keysc_device = {
348 .name = "sh_keysc",
349 .id = 0, /* "keysc0" clock */
350 .num_resources = ARRAY_SIZE(keysc_resources),
351 .resource = keysc_resources,
352 .dev = {
353 .platform_data = &keysc_info,
354 },
Magnus Dammdf47cd02009-07-31 07:48:29 +0000355 .archdata = {
356 .hwblk_id = HWBLK_KEYSC,
357 },
Kuninori Morimoto287c1292009-05-26 07:04:52 +0000358};
359
Kuninori Morimotoa80cad92009-06-26 07:05:39 +0000360/* SH Eth */
361static struct resource sh_eth_resources[] = {
362 [0] = {
363 .start = SH_ETH_ADDR,
364 .end = SH_ETH_ADDR + 0x1FC,
365 .flags = IORESOURCE_MEM,
366 },
367 [1] = {
368 .start = 91,
369 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
370 },
371};
372
373struct sh_eth_plat_data sh_eth_plat = {
374 .phy = 0x1f, /* SMSC LAN8187 */
375 .edmac_endian = EDMAC_LITTLE_ENDIAN,
376};
377
378static struct platform_device sh_eth_device = {
379 .name = "sh-eth",
380 .id = 0,
381 .dev = {
382 .platform_data = &sh_eth_plat,
383 },
384 .num_resources = ARRAY_SIZE(sh_eth_resources),
385 .resource = sh_eth_resources,
Magnus Dammdf47cd02009-07-31 07:48:29 +0000386 .archdata = {
387 .hwblk_id = HWBLK_ETHER,
388 },
Kuninori Morimotoa80cad92009-06-26 07:05:39 +0000389};
390
Magnus Damm9731f4a2009-07-03 09:40:03 +0000391static struct r8a66597_platdata sh7724_usb0_host_data = {
Magnus Damm719a72b2009-07-17 14:59:55 +0000392 .on_chip = 1,
Magnus Damm9731f4a2009-07-03 09:40:03 +0000393};
394
395static struct resource sh7724_usb0_host_resources[] = {
396 [0] = {
397 .start = 0xa4d80000,
Kuninori Morimoto1bc265d2009-08-19 00:12:15 +0000398 .end = 0xa4d80124 - 1,
Magnus Damm9731f4a2009-07-03 09:40:03 +0000399 .flags = IORESOURCE_MEM,
400 },
401 [1] = {
402 .start = 65,
403 .end = 65,
404 .flags = IORESOURCE_IRQ | IRQF_TRIGGER_LOW,
405 },
406};
407
408static struct platform_device sh7724_usb0_host_device = {
409 .name = "r8a66597_hcd",
410 .id = 0,
411 .dev = {
412 .dma_mask = NULL, /* not use dma */
413 .coherent_dma_mask = 0xffffffff,
414 .platform_data = &sh7724_usb0_host_data,
415 },
416 .num_resources = ARRAY_SIZE(sh7724_usb0_host_resources),
417 .resource = sh7724_usb0_host_resources,
Magnus Dammdf47cd02009-07-31 07:48:29 +0000418 .archdata = {
419 .hwblk_id = HWBLK_USB0,
420 },
Magnus Damm9731f4a2009-07-03 09:40:03 +0000421};
422
Magnus Dammf8f8c072009-08-19 09:52:02 +0000423static struct r8a66597_platdata sh7724_usb1_gadget_data = {
424 .on_chip = 1,
425};
426
427static struct resource sh7724_usb1_gadget_resources[] = {
428 [0] = {
429 .start = 0xa4d90000,
430 .end = 0xa4d90123,
431 .flags = IORESOURCE_MEM,
432 },
433 [1] = {
434 .start = 66,
435 .end = 66,
436 .flags = IORESOURCE_IRQ | IRQF_TRIGGER_LOW,
437 },
438};
439
440static struct platform_device sh7724_usb1_gadget_device = {
441 .name = "r8a66597_udc",
442 .id = 1, /* USB1 */
443 .dev = {
444 .dma_mask = NULL, /* not use dma */
445 .coherent_dma_mask = 0xffffffff,
446 .platform_data = &sh7724_usb1_gadget_data,
447 },
448 .num_resources = ARRAY_SIZE(sh7724_usb1_gadget_resources),
449 .resource = sh7724_usb1_gadget_resources,
450};
451
Magnus Damm0f79af62009-10-02 02:23:07 +0000452static struct resource sdhi0_cn7_resources[] = {
453 [0] = {
454 .name = "SDHI0",
455 .start = 0x04ce0000,
456 .end = 0x04ce01ff,
457 .flags = IORESOURCE_MEM,
458 },
459 [1] = {
460 .start = 101,
461 .flags = IORESOURCE_IRQ,
462 },
463};
464
465static struct platform_device sdhi0_cn7_device = {
466 .name = "sh_mobile_sdhi",
Magnus Damm5b380ec2009-10-27 10:49:55 +0000467 .id = 0,
Magnus Damm0f79af62009-10-02 02:23:07 +0000468 .num_resources = ARRAY_SIZE(sdhi0_cn7_resources),
469 .resource = sdhi0_cn7_resources,
470 .archdata = {
471 .hwblk_id = HWBLK_SDHI0,
472 },
473};
474
Magnus Damm5b380ec2009-10-27 10:49:55 +0000475static struct resource sdhi1_cn8_resources[] = {
476 [0] = {
477 .name = "SDHI1",
478 .start = 0x04cf0000,
479 .end = 0x04cf01ff,
480 .flags = IORESOURCE_MEM,
481 },
482 [1] = {
483 .start = 24,
484 .flags = IORESOURCE_IRQ,
485 },
486};
487
488static struct platform_device sdhi1_cn8_device = {
489 .name = "sh_mobile_sdhi",
490 .id = 1,
491 .num_resources = ARRAY_SIZE(sdhi1_cn8_resources),
492 .resource = sdhi1_cn8_resources,
493 .archdata = {
494 .hwblk_id = HWBLK_SDHI1,
495 },
496};
497
Kuninori Morimoto287c1292009-05-26 07:04:52 +0000498static struct platform_device *ms7724se_devices[] __initdata = {
499 &heartbeat_device,
500 &smc91x_eth_device,
501 &lcdc_device,
502 &nor_flash_device,
503 &ceu0_device,
504 &ceu1_device,
505 &keysc_device,
Kuninori Morimotoa80cad92009-06-26 07:05:39 +0000506 &sh_eth_device,
Magnus Damm9731f4a2009-07-03 09:40:03 +0000507 &sh7724_usb0_host_device,
Magnus Dammf8f8c072009-08-19 09:52:02 +0000508 &sh7724_usb1_gadget_device,
Kuninori Morimoto3e9ad522009-08-21 01:24:54 +0000509 &fsi_device,
Magnus Damm0f79af62009-10-02 02:23:07 +0000510 &sdhi0_cn7_device,
Magnus Damm5b380ec2009-10-27 10:49:55 +0000511 &sdhi1_cn8_device,
Kuninori Morimoto287c1292009-05-26 07:04:52 +0000512};
513
Kuninori Morimotoa80cad92009-06-26 07:05:39 +0000514#define EEPROM_OP 0xBA206000
515#define EEPROM_ADR 0xBA206004
516#define EEPROM_DATA 0xBA20600C
517#define EEPROM_STAT 0xBA206010
518#define EEPROM_STRT 0xBA206014
519static int __init sh_eth_is_eeprom_ready(void)
520{
521 int t = 10000;
522
523 while (t--) {
524 if (!ctrl_inw(EEPROM_STAT))
525 return 1;
526 cpu_relax();
527 }
528
529 printk(KERN_ERR "ms7724se can not access to eeprom\n");
530 return 0;
531}
532
533static void __init sh_eth_init(void)
534{
535 int i;
Magnus Damm8013cc92009-10-27 10:47:34 +0000536 u16 mac;
Kuninori Morimotoa80cad92009-06-26 07:05:39 +0000537
538 /* check EEPROM status */
539 if (!sh_eth_is_eeprom_ready())
540 return;
541
542 /* read MAC addr from EEPROM */
543 for (i = 0 ; i < 3 ; i++) {
544 ctrl_outw(0x0, EEPROM_OP); /* read */
545 ctrl_outw(i*2, EEPROM_ADR);
546 ctrl_outw(0x1, EEPROM_STRT);
547 if (!sh_eth_is_eeprom_ready())
548 return;
549
Magnus Damm8013cc92009-10-27 10:47:34 +0000550 mac = ctrl_inw(EEPROM_DATA);
551 sh_eth_plat.mac_addr[i << 1] = mac & 0xff;
552 sh_eth_plat.mac_addr[(i << 1) + 1] = mac >> 8;
Kuninori Morimotoa80cad92009-06-26 07:05:39 +0000553 }
Kuninori Morimotoa80cad92009-06-26 07:05:39 +0000554}
555
Kuninori Morimoto287c1292009-05-26 07:04:52 +0000556#define SW4140 0xBA201000
557#define FPGA_OUT 0xBA200400
558#define PORT_HIZA 0xA4050158
Magnus Damm9731f4a2009-07-03 09:40:03 +0000559#define PORT_MSELCRB 0xA4050182
Kuninori Morimoto287c1292009-05-26 07:04:52 +0000560
561#define SW41_A 0x0100
562#define SW41_B 0x0200
563#define SW41_C 0x0400
564#define SW41_D 0x0800
565#define SW41_E 0x1000
566#define SW41_F 0x2000
567#define SW41_G 0x4000
568#define SW41_H 0x8000
Magnus Damm9731f4a2009-07-03 09:40:03 +0000569
Magnus Damm3b9f2952009-10-29 10:52:23 +0000570extern char ms7724se_sdram_enter_start;
571extern char ms7724se_sdram_enter_end;
572extern char ms7724se_sdram_leave_start;
573extern char ms7724se_sdram_leave_end;
574
Kuninori Morimoto287c1292009-05-26 07:04:52 +0000575static int __init devices_setup(void)
576{
577 u16 sw = ctrl_inw(SW4140); /* select camera, monitor */
Kuninori Morimoto3e9ad522009-08-21 01:24:54 +0000578 struct clk *fsia_clk;
Kuninori Morimoto287c1292009-05-26 07:04:52 +0000579
Magnus Damm3b9f2952009-10-29 10:52:23 +0000580 /* register board specific self-refresh code */
581 sh_mobile_register_self_refresh(SUSP_SH_STANDBY | SUSP_SH_SF,
582 &ms7724se_sdram_enter_start,
583 &ms7724se_sdram_enter_end,
584 &ms7724se_sdram_leave_start,
585 &ms7724se_sdram_leave_end);
Kuninori Morimoto287c1292009-05-26 07:04:52 +0000586 /* Reset Release */
587 ctrl_outw(ctrl_inw(FPGA_OUT) &
588 ~((1 << 1) | /* LAN */
589 (1 << 6) | /* VIDEO DAC */
Kuninori Morimoto3e9ad522009-08-21 01:24:54 +0000590 (1 << 7) | /* AK4643 */
Kuninori Morimotoa80cad92009-06-26 07:05:39 +0000591 (1 << 12) | /* USB0 */
592 (1 << 14)), /* RMII */
Kuninori Morimoto287c1292009-05-26 07:04:52 +0000593 FPGA_OUT);
594
Magnus Damm9731f4a2009-07-03 09:40:03 +0000595 /* turn on USB clocks, use external clock */
596 ctrl_outw((ctrl_inw(PORT_MSELCRB) & ~0xc000) | 0x8000, PORT_MSELCRB);
597
Magnus Damm7766e162009-08-06 15:03:43 +0000598#ifdef CONFIG_PM
599 /* Let LED9 show STATUS2 */
600 gpio_request(GPIO_FN_STATUS2, NULL);
601
602 /* Lit LED10 show STATUS0 */
603 gpio_request(GPIO_FN_STATUS0, NULL);
604
605 /* Lit LED11 show PDSTATUS */
606 gpio_request(GPIO_FN_PDSTATUS, NULL);
607#else
608 /* Lit LED9 */
609 gpio_request(GPIO_PTJ6, NULL);
610 gpio_direction_output(GPIO_PTJ6, 1);
611 gpio_export(GPIO_PTJ6, 0);
612
613 /* Lit LED10 */
614 gpio_request(GPIO_PTJ5, NULL);
615 gpio_direction_output(GPIO_PTJ5, 1);
616 gpio_export(GPIO_PTJ5, 0);
617
618 /* Lit LED11 */
619 gpio_request(GPIO_PTJ7, NULL);
620 gpio_direction_output(GPIO_PTJ7, 1);
621 gpio_export(GPIO_PTJ7, 0);
622#endif
623
Magnus Damm9731f4a2009-07-03 09:40:03 +0000624 /* enable USB0 port */
625 ctrl_outw(0x0600, 0xa40501d4);
626
Magnus Dammf8f8c072009-08-19 09:52:02 +0000627 /* enable USB1 port */
628 ctrl_outw(0x0600, 0xa4050192);
629
Kuninori Morimoto287c1292009-05-26 07:04:52 +0000630 /* enable IRQ 0,1,2 */
631 gpio_request(GPIO_FN_INTC_IRQ0, NULL);
632 gpio_request(GPIO_FN_INTC_IRQ1, NULL);
633 gpio_request(GPIO_FN_INTC_IRQ2, NULL);
634
635 /* enable SCIFA3 */
636 gpio_request(GPIO_FN_SCIF3_I_SCK, NULL);
637 gpio_request(GPIO_FN_SCIF3_I_RXD, NULL);
638 gpio_request(GPIO_FN_SCIF3_I_TXD, NULL);
639 gpio_request(GPIO_FN_SCIF3_I_CTS, NULL);
640 gpio_request(GPIO_FN_SCIF3_I_RTS, NULL);
641
642 /* enable LCDC */
643 gpio_request(GPIO_FN_LCDD23, NULL);
644 gpio_request(GPIO_FN_LCDD22, NULL);
645 gpio_request(GPIO_FN_LCDD21, NULL);
646 gpio_request(GPIO_FN_LCDD20, NULL);
647 gpio_request(GPIO_FN_LCDD19, NULL);
648 gpio_request(GPIO_FN_LCDD18, NULL);
649 gpio_request(GPIO_FN_LCDD17, NULL);
650 gpio_request(GPIO_FN_LCDD16, NULL);
651 gpio_request(GPIO_FN_LCDD15, NULL);
652 gpio_request(GPIO_FN_LCDD14, NULL);
653 gpio_request(GPIO_FN_LCDD13, NULL);
654 gpio_request(GPIO_FN_LCDD12, NULL);
655 gpio_request(GPIO_FN_LCDD11, NULL);
656 gpio_request(GPIO_FN_LCDD10, NULL);
657 gpio_request(GPIO_FN_LCDD9, NULL);
658 gpio_request(GPIO_FN_LCDD8, NULL);
659 gpio_request(GPIO_FN_LCDD7, NULL);
660 gpio_request(GPIO_FN_LCDD6, NULL);
661 gpio_request(GPIO_FN_LCDD5, NULL);
662 gpio_request(GPIO_FN_LCDD4, NULL);
663 gpio_request(GPIO_FN_LCDD3, NULL);
664 gpio_request(GPIO_FN_LCDD2, NULL);
665 gpio_request(GPIO_FN_LCDD1, NULL);
666 gpio_request(GPIO_FN_LCDD0, NULL);
667 gpio_request(GPIO_FN_LCDDISP, NULL);
668 gpio_request(GPIO_FN_LCDHSYN, NULL);
669 gpio_request(GPIO_FN_LCDDCK, NULL);
670 gpio_request(GPIO_FN_LCDVSYN, NULL);
671 gpio_request(GPIO_FN_LCDDON, NULL);
672 gpio_request(GPIO_FN_LCDVEPWC, NULL);
673 gpio_request(GPIO_FN_LCDVCPWC, NULL);
674 gpio_request(GPIO_FN_LCDRD, NULL);
675 gpio_request(GPIO_FN_LCDLCLK, NULL);
676 ctrl_outw((ctrl_inw(PORT_HIZA) & ~0x0001), PORT_HIZA);
677
678 /* enable CEU0 */
679 gpio_request(GPIO_FN_VIO0_D15, NULL);
680 gpio_request(GPIO_FN_VIO0_D14, NULL);
681 gpio_request(GPIO_FN_VIO0_D13, NULL);
682 gpio_request(GPIO_FN_VIO0_D12, NULL);
683 gpio_request(GPIO_FN_VIO0_D11, NULL);
684 gpio_request(GPIO_FN_VIO0_D10, NULL);
685 gpio_request(GPIO_FN_VIO0_D9, NULL);
686 gpio_request(GPIO_FN_VIO0_D8, NULL);
687 gpio_request(GPIO_FN_VIO0_D7, NULL);
688 gpio_request(GPIO_FN_VIO0_D6, NULL);
689 gpio_request(GPIO_FN_VIO0_D5, NULL);
690 gpio_request(GPIO_FN_VIO0_D4, NULL);
691 gpio_request(GPIO_FN_VIO0_D3, NULL);
692 gpio_request(GPIO_FN_VIO0_D2, NULL);
693 gpio_request(GPIO_FN_VIO0_D1, NULL);
694 gpio_request(GPIO_FN_VIO0_D0, NULL);
695 gpio_request(GPIO_FN_VIO0_VD, NULL);
696 gpio_request(GPIO_FN_VIO0_CLK, NULL);
697 gpio_request(GPIO_FN_VIO0_FLD, NULL);
698 gpio_request(GPIO_FN_VIO0_HD, NULL);
Magnus Damm84f75972009-07-01 04:55:35 +0000699 platform_resource_setup_memory(&ceu0_device, "ceu0", 4 << 20);
Kuninori Morimoto287c1292009-05-26 07:04:52 +0000700
701 /* enable CEU1 */
702 gpio_request(GPIO_FN_VIO1_D7, NULL);
703 gpio_request(GPIO_FN_VIO1_D6, NULL);
704 gpio_request(GPIO_FN_VIO1_D5, NULL);
705 gpio_request(GPIO_FN_VIO1_D4, NULL);
706 gpio_request(GPIO_FN_VIO1_D3, NULL);
707 gpio_request(GPIO_FN_VIO1_D2, NULL);
708 gpio_request(GPIO_FN_VIO1_D1, NULL);
709 gpio_request(GPIO_FN_VIO1_D0, NULL);
710 gpio_request(GPIO_FN_VIO1_FLD, NULL);
711 gpio_request(GPIO_FN_VIO1_HD, NULL);
712 gpio_request(GPIO_FN_VIO1_VD, NULL);
713 gpio_request(GPIO_FN_VIO1_CLK, NULL);
Magnus Damm84f75972009-07-01 04:55:35 +0000714 platform_resource_setup_memory(&ceu1_device, "ceu1", 4 << 20);
Kuninori Morimoto287c1292009-05-26 07:04:52 +0000715
716 /* KEYSC */
717 gpio_request(GPIO_FN_KEYOUT5_IN5, NULL);
718 gpio_request(GPIO_FN_KEYOUT4_IN6, NULL);
719 gpio_request(GPIO_FN_KEYIN4, NULL);
720 gpio_request(GPIO_FN_KEYIN3, NULL);
721 gpio_request(GPIO_FN_KEYIN2, NULL);
722 gpio_request(GPIO_FN_KEYIN1, NULL);
723 gpio_request(GPIO_FN_KEYIN0, NULL);
724 gpio_request(GPIO_FN_KEYOUT3, NULL);
725 gpio_request(GPIO_FN_KEYOUT2, NULL);
726 gpio_request(GPIO_FN_KEYOUT1, NULL);
727 gpio_request(GPIO_FN_KEYOUT0, NULL);
728
Kuninori Morimoto3e9ad522009-08-21 01:24:54 +0000729 /* enable FSI */
730 gpio_request(GPIO_FN_FSIMCKB, NULL);
731 gpio_request(GPIO_FN_FSIMCKA, NULL);
732 gpio_request(GPIO_FN_FSIOASD, NULL);
733 gpio_request(GPIO_FN_FSIIABCK, NULL);
734 gpio_request(GPIO_FN_FSIIALRCK, NULL);
735 gpio_request(GPIO_FN_FSIOABCK, NULL);
736 gpio_request(GPIO_FN_FSIOALRCK, NULL);
737 gpio_request(GPIO_FN_CLKAUDIOAO, NULL);
738 gpio_request(GPIO_FN_FSIIBSD, NULL);
739 gpio_request(GPIO_FN_FSIOBSD, NULL);
740 gpio_request(GPIO_FN_FSIIBBCK, NULL);
741 gpio_request(GPIO_FN_FSIIBLRCK, NULL);
742 gpio_request(GPIO_FN_FSIOBBCK, NULL);
743 gpio_request(GPIO_FN_FSIOBLRCK, NULL);
744 gpio_request(GPIO_FN_CLKAUDIOBO, NULL);
745 gpio_request(GPIO_FN_FSIIASD, NULL);
746
747 /* change parent of FSI A */
748 fsia_clk = clk_get(NULL, "fsia_clk");
749 clk_register(&fsimcka_clk);
750 clk_set_parent(fsia_clk, &fsimcka_clk);
751 clk_set_rate(fsia_clk, 11000);
752 clk_set_rate(&fsimcka_clk, 11000);
753 clk_put(fsia_clk);
754
Magnus Damm0f79af62009-10-02 02:23:07 +0000755 /* SDHI0 connected to cn7 */
756 gpio_request(GPIO_FN_SDHI0CD, NULL);
757 gpio_request(GPIO_FN_SDHI0WP, NULL);
758 gpio_request(GPIO_FN_SDHI0D3, NULL);
759 gpio_request(GPIO_FN_SDHI0D2, NULL);
760 gpio_request(GPIO_FN_SDHI0D1, NULL);
761 gpio_request(GPIO_FN_SDHI0D0, NULL);
762 gpio_request(GPIO_FN_SDHI0CMD, NULL);
763 gpio_request(GPIO_FN_SDHI0CLK, NULL);
764
Magnus Damm5b380ec2009-10-27 10:49:55 +0000765 /* SDHI1 connected to cn8 */
766 gpio_request(GPIO_FN_SDHI1CD, NULL);
767 gpio_request(GPIO_FN_SDHI1WP, NULL);
768 gpio_request(GPIO_FN_SDHI1D3, NULL);
769 gpio_request(GPIO_FN_SDHI1D2, NULL);
770 gpio_request(GPIO_FN_SDHI1D1, NULL);
771 gpio_request(GPIO_FN_SDHI1D0, NULL);
772 gpio_request(GPIO_FN_SDHI1CMD, NULL);
773 gpio_request(GPIO_FN_SDHI1CLK, NULL);
774
Kuninori Morimotoa80cad92009-06-26 07:05:39 +0000775 /*
776 * enable SH-Eth
777 *
778 * please remove J33 pin from your board !!
779 *
780 * ms7724 board should not use GPIO_FN_LNKSTA pin
781 * So, This time PTX5 is set to input pin
782 */
783 gpio_request(GPIO_FN_RMII_RXD0, NULL);
784 gpio_request(GPIO_FN_RMII_RXD1, NULL);
785 gpio_request(GPIO_FN_RMII_TXD0, NULL);
786 gpio_request(GPIO_FN_RMII_TXD1, NULL);
787 gpio_request(GPIO_FN_RMII_REF_CLK, NULL);
788 gpio_request(GPIO_FN_RMII_TX_EN, NULL);
789 gpio_request(GPIO_FN_RMII_RX_ER, NULL);
790 gpio_request(GPIO_FN_RMII_CRS_DV, NULL);
791 gpio_request(GPIO_FN_MDIO, NULL);
792 gpio_request(GPIO_FN_MDC, NULL);
793 gpio_request(GPIO_PTX5, NULL);
794 gpio_direction_input(GPIO_PTX5);
795 sh_eth_init();
796
Kuninori Morimoto287c1292009-05-26 07:04:52 +0000797 if (sw & SW41_B) {
Kuninori Morimoto4f324312009-08-03 04:52:03 +0000798 /* 720p */
799 lcdc_info.ch[0].lcd_cfg.xres = 1280;
800 lcdc_info.ch[0].lcd_cfg.yres = 720;
801 lcdc_info.ch[0].lcd_cfg.left_margin = 220;
802 lcdc_info.ch[0].lcd_cfg.right_margin = 110;
803 lcdc_info.ch[0].lcd_cfg.hsync_len = 40;
804 lcdc_info.ch[0].lcd_cfg.upper_margin = 20;
805 lcdc_info.ch[0].lcd_cfg.lower_margin = 5;
806 lcdc_info.ch[0].lcd_cfg.vsync_len = 5;
Kuninori Morimoto287c1292009-05-26 07:04:52 +0000807 } else {
808 /* VGA */
809 lcdc_info.ch[0].lcd_cfg.xres = 640;
810 lcdc_info.ch[0].lcd_cfg.yres = 480;
811 lcdc_info.ch[0].lcd_cfg.left_margin = 105;
812 lcdc_info.ch[0].lcd_cfg.right_margin = 50;
813 lcdc_info.ch[0].lcd_cfg.hsync_len = 96;
814 lcdc_info.ch[0].lcd_cfg.upper_margin = 33;
815 lcdc_info.ch[0].lcd_cfg.lower_margin = 10;
816 lcdc_info.ch[0].lcd_cfg.vsync_len = 2;
817 }
818
819 if (sw & SW41_A) {
820 /* Digital monitor */
821 lcdc_info.ch[0].interface_type = RGB18;
822 lcdc_info.ch[0].flags = 0;
823 } else {
824 /* Analog monitor */
825 lcdc_info.ch[0].interface_type = RGB24;
826 lcdc_info.ch[0].flags = LCDC_FLAGS_DWPOL;
827 }
828
829 return platform_add_devices(ms7724se_devices,
Kuninori Morimotoa80cad92009-06-26 07:05:39 +0000830 ARRAY_SIZE(ms7724se_devices));
Kuninori Morimoto287c1292009-05-26 07:04:52 +0000831}
832device_initcall(devices_setup);
833
834static struct sh_machine_vector mv_ms7724se __initmv = {
835 .mv_name = "ms7724se",
836 .mv_init_irq = init_se7724_IRQ,
837 .mv_nr_irqs = SE7724_FPGA_IRQ_BASE + SE7724_FPGA_IRQ_NR,
838};