Ben Dooks | f348a2a | 2008-07-03 11:24:25 +0100 | [diff] [blame] | 1 | /* linux/arch/arm/plat-s3c24xx/gpiolib.c |
| 2 | * |
Ben Dooks | 7ced5ea | 2010-05-03 17:19:49 +0900 | [diff] [blame] | 3 | * Copyright (c) 2008-2010 Simtec Electronics |
Ben Dooks | f348a2a | 2008-07-03 11:24:25 +0100 | [diff] [blame] | 4 | * http://armlinux.simtec.co.uk/ |
| 5 | * Ben Dooks <ben@simtec.co.uk> |
| 6 | * |
| 7 | * S3C24XX GPIOlib support |
| 8 | * |
| 9 | * This program is free software; you can redistribute it and/or modify |
| 10 | * it under the terms of the GNU General Public License as published by |
| 11 | * the Free Software Foundation; either version 2 of the License. |
| 12 | */ |
| 13 | |
| 14 | #include <linux/kernel.h> |
| 15 | #include <linux/init.h> |
| 16 | #include <linux/module.h> |
| 17 | #include <linux/interrupt.h> |
Ben Dooks | 86c03c5 | 2009-05-17 22:47:07 +0100 | [diff] [blame] | 18 | #include <linux/sysdev.h> |
Ben Dooks | f348a2a | 2008-07-03 11:24:25 +0100 | [diff] [blame] | 19 | #include <linux/ioport.h> |
| 20 | #include <linux/io.h> |
| 21 | #include <linux/gpio.h> |
| 22 | |
Ben Dooks | e856bb1 | 2010-01-19 17:14:46 +0900 | [diff] [blame] | 23 | #include <plat/gpio-core.h> |
Ben Dooks | 9bbb851 | 2010-04-30 19:30:35 +0900 | [diff] [blame] | 24 | #include <plat/gpio-cfg.h> |
| 25 | #include <plat/gpio-cfg-helpers.h> |
Russell King | a09e64f | 2008-08-05 16:14:15 +0100 | [diff] [blame] | 26 | #include <mach/hardware.h> |
Ben Dooks | f348a2a | 2008-07-03 11:24:25 +0100 | [diff] [blame] | 27 | #include <asm/irq.h> |
Ben Dooks | d87964c | 2008-12-12 00:24:30 +0000 | [diff] [blame] | 28 | #include <plat/pm.h> |
Ben Dooks | f348a2a | 2008-07-03 11:24:25 +0100 | [diff] [blame] | 29 | |
Russell King | a09e64f | 2008-08-05 16:14:15 +0100 | [diff] [blame] | 30 | #include <mach/regs-gpio.h> |
Ben Dooks | f348a2a | 2008-07-03 11:24:25 +0100 | [diff] [blame] | 31 | |
Ben Dooks | f348a2a | 2008-07-03 11:24:25 +0100 | [diff] [blame] | 32 | static int s3c24xx_gpiolib_banka_input(struct gpio_chip *chip, unsigned offset) |
| 33 | { |
| 34 | return -EINVAL; |
| 35 | } |
| 36 | |
| 37 | static int s3c24xx_gpiolib_banka_output(struct gpio_chip *chip, |
| 38 | unsigned offset, int value) |
| 39 | { |
Ben Dooks | 7db6c82 | 2008-10-31 16:14:31 +0000 | [diff] [blame] | 40 | struct s3c_gpio_chip *ourchip = to_s3c_gpio(chip); |
Ben Dooks | f348a2a | 2008-07-03 11:24:25 +0100 | [diff] [blame] | 41 | void __iomem *base = ourchip->base; |
| 42 | unsigned long flags; |
| 43 | unsigned long dat; |
| 44 | unsigned long con; |
| 45 | |
| 46 | local_irq_save(flags); |
| 47 | |
| 48 | con = __raw_readl(base + 0x00); |
| 49 | dat = __raw_readl(base + 0x04); |
| 50 | |
| 51 | dat &= ~(1 << offset); |
| 52 | if (value) |
| 53 | dat |= 1 << offset; |
| 54 | |
| 55 | __raw_writel(dat, base + 0x04); |
| 56 | |
| 57 | con &= ~(1 << offset); |
| 58 | |
| 59 | __raw_writel(con, base + 0x00); |
| 60 | __raw_writel(dat, base + 0x04); |
| 61 | |
| 62 | local_irq_restore(flags); |
| 63 | return 0; |
| 64 | } |
| 65 | |
Ben Dooks | 43ae659 | 2009-01-08 12:40:50 +0000 | [diff] [blame] | 66 | static int s3c24xx_gpiolib_bankf_toirq(struct gpio_chip *chip, unsigned offset) |
| 67 | { |
| 68 | if (offset < 4) |
| 69 | return IRQ_EINT0 + offset; |
| 70 | |
| 71 | if (offset < 8) |
| 72 | return IRQ_EINT4 + offset - 4; |
| 73 | |
| 74 | return -EINVAL; |
| 75 | } |
| 76 | |
Ben Dooks | 9bbb851 | 2010-04-30 19:30:35 +0900 | [diff] [blame] | 77 | static struct s3c_gpio_cfg s3c24xx_gpiocfg_banka = { |
| 78 | .set_config = s3c_gpio_setcfg_s3c24xx_a, |
Ben Dooks | 97a3399 | 2010-05-06 10:27:16 +0900 | [diff] [blame] | 79 | .get_config = s3c_gpio_getcfg_s3c24xx_a, |
Ben Dooks | 9bbb851 | 2010-04-30 19:30:35 +0900 | [diff] [blame] | 80 | }; |
| 81 | |
| 82 | struct s3c_gpio_cfg s3c24xx_gpiocfg_default = { |
| 83 | .set_config = s3c_gpio_setcfg_s3c24xx, |
Ben Dooks | 97a3399 | 2010-05-06 10:27:16 +0900 | [diff] [blame] | 84 | .get_config = s3c_gpio_getcfg_s3c24xx, |
Ben Dooks | 9bbb851 | 2010-04-30 19:30:35 +0900 | [diff] [blame] | 85 | }; |
| 86 | |
Ben Dooks | 21b2366 | 2008-10-31 16:14:34 +0000 | [diff] [blame] | 87 | struct s3c_gpio_chip s3c24xx_gpios[] = { |
Ben Dooks | f348a2a | 2008-07-03 11:24:25 +0100 | [diff] [blame] | 88 | [0] = { |
Ben Dooks | fda7b2b | 2009-05-17 22:18:27 +0100 | [diff] [blame] | 89 | .base = S3C2410_GPACON, |
Ben Dooks | d87964c | 2008-12-12 00:24:30 +0000 | [diff] [blame] | 90 | .pm = __gpio_pm(&s3c_gpio_pm_1bit), |
Ben Dooks | 9bbb851 | 2010-04-30 19:30:35 +0900 | [diff] [blame] | 91 | .config = &s3c24xx_gpiocfg_banka, |
Ben Dooks | f348a2a | 2008-07-03 11:24:25 +0100 | [diff] [blame] | 92 | .chip = { |
Ben Dooks | 070276d | 2009-05-17 22:32:23 +0100 | [diff] [blame] | 93 | .base = S3C2410_GPA(0), |
Ben Dooks | f348a2a | 2008-07-03 11:24:25 +0100 | [diff] [blame] | 94 | .owner = THIS_MODULE, |
| 95 | .label = "GPIOA", |
| 96 | .ngpio = 24, |
| 97 | .direction_input = s3c24xx_gpiolib_banka_input, |
| 98 | .direction_output = s3c24xx_gpiolib_banka_output, |
Ben Dooks | f348a2a | 2008-07-03 11:24:25 +0100 | [diff] [blame] | 99 | }, |
| 100 | }, |
| 101 | [1] = { |
Ben Dooks | fda7b2b | 2009-05-17 22:18:27 +0100 | [diff] [blame] | 102 | .base = S3C2410_GPBCON, |
Ben Dooks | d87964c | 2008-12-12 00:24:30 +0000 | [diff] [blame] | 103 | .pm = __gpio_pm(&s3c_gpio_pm_2bit), |
Ben Dooks | f348a2a | 2008-07-03 11:24:25 +0100 | [diff] [blame] | 104 | .chip = { |
Ben Dooks | 070276d | 2009-05-17 22:32:23 +0100 | [diff] [blame] | 105 | .base = S3C2410_GPB(0), |
Ben Dooks | f348a2a | 2008-07-03 11:24:25 +0100 | [diff] [blame] | 106 | .owner = THIS_MODULE, |
| 107 | .label = "GPIOB", |
| 108 | .ngpio = 16, |
Ben Dooks | f348a2a | 2008-07-03 11:24:25 +0100 | [diff] [blame] | 109 | }, |
| 110 | }, |
| 111 | [2] = { |
Ben Dooks | fda7b2b | 2009-05-17 22:18:27 +0100 | [diff] [blame] | 112 | .base = S3C2410_GPCCON, |
Ben Dooks | d87964c | 2008-12-12 00:24:30 +0000 | [diff] [blame] | 113 | .pm = __gpio_pm(&s3c_gpio_pm_2bit), |
Ben Dooks | f348a2a | 2008-07-03 11:24:25 +0100 | [diff] [blame] | 114 | .chip = { |
Ben Dooks | 070276d | 2009-05-17 22:32:23 +0100 | [diff] [blame] | 115 | .base = S3C2410_GPC(0), |
Ben Dooks | f348a2a | 2008-07-03 11:24:25 +0100 | [diff] [blame] | 116 | .owner = THIS_MODULE, |
| 117 | .label = "GPIOC", |
| 118 | .ngpio = 16, |
Ben Dooks | f348a2a | 2008-07-03 11:24:25 +0100 | [diff] [blame] | 119 | }, |
| 120 | }, |
| 121 | [3] = { |
Ben Dooks | fda7b2b | 2009-05-17 22:18:27 +0100 | [diff] [blame] | 122 | .base = S3C2410_GPDCON, |
Ben Dooks | d87964c | 2008-12-12 00:24:30 +0000 | [diff] [blame] | 123 | .pm = __gpio_pm(&s3c_gpio_pm_2bit), |
Ben Dooks | f348a2a | 2008-07-03 11:24:25 +0100 | [diff] [blame] | 124 | .chip = { |
Ben Dooks | 070276d | 2009-05-17 22:32:23 +0100 | [diff] [blame] | 125 | .base = S3C2410_GPD(0), |
Ben Dooks | f348a2a | 2008-07-03 11:24:25 +0100 | [diff] [blame] | 126 | .owner = THIS_MODULE, |
| 127 | .label = "GPIOD", |
| 128 | .ngpio = 16, |
Ben Dooks | f348a2a | 2008-07-03 11:24:25 +0100 | [diff] [blame] | 129 | }, |
| 130 | }, |
| 131 | [4] = { |
Ben Dooks | fda7b2b | 2009-05-17 22:18:27 +0100 | [diff] [blame] | 132 | .base = S3C2410_GPECON, |
Ben Dooks | d87964c | 2008-12-12 00:24:30 +0000 | [diff] [blame] | 133 | .pm = __gpio_pm(&s3c_gpio_pm_2bit), |
Ben Dooks | f348a2a | 2008-07-03 11:24:25 +0100 | [diff] [blame] | 134 | .chip = { |
Ben Dooks | 070276d | 2009-05-17 22:32:23 +0100 | [diff] [blame] | 135 | .base = S3C2410_GPE(0), |
Ben Dooks | f348a2a | 2008-07-03 11:24:25 +0100 | [diff] [blame] | 136 | .label = "GPIOE", |
| 137 | .owner = THIS_MODULE, |
| 138 | .ngpio = 16, |
Ben Dooks | f348a2a | 2008-07-03 11:24:25 +0100 | [diff] [blame] | 139 | }, |
| 140 | }, |
| 141 | [5] = { |
Ben Dooks | fda7b2b | 2009-05-17 22:18:27 +0100 | [diff] [blame] | 142 | .base = S3C2410_GPFCON, |
Ben Dooks | d87964c | 2008-12-12 00:24:30 +0000 | [diff] [blame] | 143 | .pm = __gpio_pm(&s3c_gpio_pm_2bit), |
Ben Dooks | f348a2a | 2008-07-03 11:24:25 +0100 | [diff] [blame] | 144 | .chip = { |
Ben Dooks | 070276d | 2009-05-17 22:32:23 +0100 | [diff] [blame] | 145 | .base = S3C2410_GPF(0), |
Ben Dooks | f348a2a | 2008-07-03 11:24:25 +0100 | [diff] [blame] | 146 | .owner = THIS_MODULE, |
| 147 | .label = "GPIOF", |
| 148 | .ngpio = 8, |
Ben Dooks | 43ae659 | 2009-01-08 12:40:50 +0000 | [diff] [blame] | 149 | .to_irq = s3c24xx_gpiolib_bankf_toirq, |
Ben Dooks | f348a2a | 2008-07-03 11:24:25 +0100 | [diff] [blame] | 150 | }, |
| 151 | }, |
| 152 | [6] = { |
Ben Dooks | fda7b2b | 2009-05-17 22:18:27 +0100 | [diff] [blame] | 153 | .base = S3C2410_GPGCON, |
Ben Dooks | d87964c | 2008-12-12 00:24:30 +0000 | [diff] [blame] | 154 | .pm = __gpio_pm(&s3c_gpio_pm_2bit), |
Joonyoung Shim | 8ce14a2 | 2010-10-01 11:24:39 +0900 | [diff] [blame] | 155 | .irq_base = IRQ_EINT8, |
Ben Dooks | f348a2a | 2008-07-03 11:24:25 +0100 | [diff] [blame] | 156 | .chip = { |
Ben Dooks | 070276d | 2009-05-17 22:32:23 +0100 | [diff] [blame] | 157 | .base = S3C2410_GPG(0), |
Ben Dooks | f348a2a | 2008-07-03 11:24:25 +0100 | [diff] [blame] | 158 | .owner = THIS_MODULE, |
| 159 | .label = "GPIOG", |
Ben Dooks | 5233c17 | 2009-05-18 20:10:43 +0100 | [diff] [blame] | 160 | .ngpio = 16, |
Joonyoung Shim | 8ce14a2 | 2010-10-01 11:24:39 +0900 | [diff] [blame] | 161 | .to_irq = samsung_gpiolib_to_irq, |
Ben Dooks | f348a2a | 2008-07-03 11:24:25 +0100 | [diff] [blame] | 162 | }, |
Ben Dooks | 5233c17 | 2009-05-18 20:10:43 +0100 | [diff] [blame] | 163 | }, { |
| 164 | .base = S3C2410_GPHCON, |
| 165 | .pm = __gpio_pm(&s3c_gpio_pm_2bit), |
| 166 | .chip = { |
| 167 | .base = S3C2410_GPH(0), |
| 168 | .owner = THIS_MODULE, |
| 169 | .label = "GPIOH", |
| 170 | .ngpio = 11, |
| 171 | }, |
Ben Dooks | f348a2a | 2008-07-03 11:24:25 +0100 | [diff] [blame] | 172 | }, |
Ben Dooks | 7ced5ea | 2010-05-03 17:19:49 +0900 | [diff] [blame] | 173 | /* GPIOS for the S3C2443 and later devices. */ |
| 174 | { |
| 175 | .base = S3C2440_GPJCON, |
| 176 | .pm = __gpio_pm(&s3c_gpio_pm_2bit), |
| 177 | .chip = { |
| 178 | .base = S3C2410_GPJ(0), |
| 179 | .owner = THIS_MODULE, |
| 180 | .label = "GPIOJ", |
| 181 | .ngpio = 16, |
| 182 | }, |
| 183 | }, { |
| 184 | .base = S3C2443_GPKCON, |
| 185 | .pm = __gpio_pm(&s3c_gpio_pm_2bit), |
| 186 | .chip = { |
| 187 | .base = S3C2410_GPK(0), |
| 188 | .owner = THIS_MODULE, |
| 189 | .label = "GPIOK", |
| 190 | .ngpio = 16, |
| 191 | }, |
| 192 | }, { |
| 193 | .base = S3C2443_GPLCON, |
| 194 | .pm = __gpio_pm(&s3c_gpio_pm_2bit), |
| 195 | .chip = { |
| 196 | .base = S3C2410_GPL(0), |
| 197 | .owner = THIS_MODULE, |
| 198 | .label = "GPIOL", |
| 199 | .ngpio = 15, |
| 200 | }, |
| 201 | }, { |
| 202 | .base = S3C2443_GPMCON, |
| 203 | .pm = __gpio_pm(&s3c_gpio_pm_2bit), |
| 204 | .chip = { |
| 205 | .base = S3C2410_GPM(0), |
| 206 | .owner = THIS_MODULE, |
| 207 | .label = "GPIOM", |
| 208 | .ngpio = 2, |
| 209 | }, |
| 210 | }, |
Ben Dooks | f348a2a | 2008-07-03 11:24:25 +0100 | [diff] [blame] | 211 | }; |
| 212 | |
Ben Dooks | 7ced5ea | 2010-05-03 17:19:49 +0900 | [diff] [blame] | 213 | |
Ben Dooks | f348a2a | 2008-07-03 11:24:25 +0100 | [diff] [blame] | 214 | static __init int s3c24xx_gpiolib_init(void) |
| 215 | { |
Ben Dooks | 21b2366 | 2008-10-31 16:14:34 +0000 | [diff] [blame] | 216 | struct s3c_gpio_chip *chip = s3c24xx_gpios; |
Ben Dooks | f348a2a | 2008-07-03 11:24:25 +0100 | [diff] [blame] | 217 | int gpn; |
| 218 | |
Ben Dooks | 9bbb851 | 2010-04-30 19:30:35 +0900 | [diff] [blame] | 219 | for (gpn = 0; gpn < ARRAY_SIZE(s3c24xx_gpios); gpn++, chip++) { |
| 220 | if (!chip->config) |
| 221 | chip->config = &s3c24xx_gpiocfg_default; |
| 222 | |
Ben Dooks | 7db6c82 | 2008-10-31 16:14:31 +0000 | [diff] [blame] | 223 | s3c_gpiolib_add(chip); |
Ben Dooks | 9bbb851 | 2010-04-30 19:30:35 +0900 | [diff] [blame] | 224 | } |
Ben Dooks | f348a2a | 2008-07-03 11:24:25 +0100 | [diff] [blame] | 225 | |
| 226 | return 0; |
| 227 | } |
| 228 | |
Ben Dooks | 9c0ec95 | 2009-05-18 20:03:23 +0100 | [diff] [blame] | 229 | core_initcall(s3c24xx_gpiolib_init); |