Patrick Daly | adeeb47 | 2013-03-06 21:22:32 -0800 | [diff] [blame] | 1 | /* Copyright (c) 2012-2013, The Linux Foundation. All rights reserved. |
Vikram Mulukutla | 8810e34 | 2011-10-20 20:26:53 -0700 | [diff] [blame] | 2 | * |
| 3 | * This program is free software; you can redistribute it and/or modify |
| 4 | * it under the terms of the GNU General Public License version 2 and |
| 5 | * only version 2 as published by the Free Software Foundation. |
| 6 | * |
| 7 | * This program is distributed in the hope that it will be useful, |
| 8 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 9 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 10 | * GNU General Public License for more details. |
| 11 | * |
| 12 | */ |
| 13 | |
| 14 | #ifndef __ARCH_ARM_MACH_MSM_CLOCK_LOCAL_2_H |
| 15 | #define __ARCH_ARM_MACH_MSM_CLOCK_LOCAL_2_H |
| 16 | |
| 17 | #include <linux/spinlock.h> |
Matt Wagantall | 33d01f5 | 2012-02-23 23:27:44 -0800 | [diff] [blame] | 18 | #include <mach/clk-provider.h> |
| 19 | #include <mach/clk.h> |
Vikram Mulukutla | 8810e34 | 2011-10-20 20:26:53 -0700 | [diff] [blame] | 20 | |
| 21 | /* |
| 22 | * Generic frequency-definition structs and macros |
| 23 | */ |
| 24 | |
| 25 | /** |
| 26 | * @freq_hz: output rate |
| 27 | * @src_clk: source clock for freq_hz |
| 28 | * @m_val: M value corresponding to freq_hz |
| 29 | * @n_val: N value corresponding to freq_hz |
| 30 | * @d_val: D value corresponding to freq_hz |
| 31 | * @div_src_val: Pre divider value and source selection mux index for freq_hz |
| 32 | * @sys_vdd: Voltage level required for freq_hz |
| 33 | */ |
| 34 | struct clk_freq_tbl { |
| 35 | unsigned long freq_hz; |
| 36 | struct clk *src_clk; |
| 37 | const u32 m_val; |
| 38 | const u32 n_val; |
| 39 | const u32 d_val; |
Vikram Mulukutla | fe0f5a5 | 2012-08-16 16:51:08 -0700 | [diff] [blame] | 40 | u32 div_src_val; |
Vikram Mulukutla | 8810e34 | 2011-10-20 20:26:53 -0700 | [diff] [blame] | 41 | const unsigned sys_vdd; |
| 42 | }; |
| 43 | |
| 44 | #define FREQ_END (UINT_MAX-1) |
| 45 | #define F_END { .freq_hz = FREQ_END } |
| 46 | |
| 47 | /* |
| 48 | * Generic clock-definition struct and macros |
| 49 | */ |
| 50 | /** |
| 51 | * struct rcg_clk - root clock generator |
| 52 | * @cmd_rcgr_reg: command register |
| 53 | * @set_rate: function to set frequency |
| 54 | * @freq_tbl: frequency table for this RCG |
| 55 | * @current_freq: current RCG frequency |
| 56 | * @c: generic clock data |
| 57 | * @base: pointer to base address of ioremapped registers. |
| 58 | */ |
| 59 | struct rcg_clk { |
| 60 | const u32 cmd_rcgr_reg; |
| 61 | |
| 62 | void (*set_rate)(struct rcg_clk *, struct clk_freq_tbl *); |
| 63 | |
| 64 | struct clk_freq_tbl *freq_tbl; |
| 65 | struct clk_freq_tbl *current_freq; |
| 66 | struct clk c; |
| 67 | |
| 68 | void *const __iomem *base; |
| 69 | }; |
| 70 | |
| 71 | static inline struct rcg_clk *to_rcg_clk(struct clk *clk) |
| 72 | { |
| 73 | return container_of(clk, struct rcg_clk, c); |
| 74 | } |
| 75 | |
| 76 | extern struct clk_freq_tbl rcg_dummy_freq; |
| 77 | |
| 78 | /** |
| 79 | * struct fixed_clk - fixed rate clock (used for crystal oscillators) |
| 80 | * @rate: output rate |
| 81 | * @c: clk |
| 82 | */ |
| 83 | struct fixed_clk { |
| 84 | struct clk c; |
| 85 | }; |
| 86 | |
| 87 | /** |
| 88 | * struct branch_clk - branch clock |
| 89 | * @set_rate: Set the frequency of this branch clock. |
Vikram Mulukutla | 8810e34 | 2011-10-20 20:26:53 -0700 | [diff] [blame] | 90 | * @c: clk |
| 91 | * @cbcr_reg: branch control register |
| 92 | * @bcr_reg: block reset register |
| 93 | * @has_sibling: true if other branches are derived from this branch's source |
| 94 | * @cur_div: current branch divider value |
| 95 | * @max_div: maximum branch divider value (if zero, no divider exists) |
| 96 | * @halt_check: halt checking type |
| 97 | * @base: pointer to base address of ioremapped registers. |
| 98 | */ |
| 99 | struct branch_clk { |
| 100 | void (*set_rate)(struct branch_clk *, struct clk_freq_tbl *); |
Vikram Mulukutla | 8810e34 | 2011-10-20 20:26:53 -0700 | [diff] [blame] | 101 | struct clk c; |
| 102 | const u32 cbcr_reg; |
| 103 | const u32 bcr_reg; |
| 104 | int has_sibling; |
| 105 | u32 cur_div; |
| 106 | const u32 max_div; |
| 107 | const u32 halt_check; |
| 108 | void *const __iomem *base; |
| 109 | }; |
| 110 | |
| 111 | static inline struct branch_clk *to_branch_clk(struct clk *clk) |
| 112 | { |
| 113 | return container_of(clk, struct branch_clk, c); |
| 114 | } |
| 115 | |
| 116 | /** |
| 117 | * struct local_vote_clk - Voteable branch clock |
| 118 | * @c: clk |
| 119 | * @cbcr_reg: branch control register |
| 120 | * @vote_reg: voting register |
| 121 | * @en_mask: enable mask |
| 122 | * @halt_check: halt checking type |
| 123 | * @base: pointer to base address of ioremapped registers. |
| 124 | * An on/off switch with a rate derived from the parent. |
| 125 | */ |
| 126 | struct local_vote_clk { |
| 127 | struct clk c; |
| 128 | const u32 cbcr_reg; |
| 129 | const u32 vote_reg; |
| 130 | const u32 bcr_reg; |
| 131 | const u32 en_mask; |
| 132 | const u32 halt_check; |
| 133 | void *const __iomem *base; |
| 134 | }; |
| 135 | |
| 136 | static inline struct local_vote_clk *to_local_vote_clk(struct clk *clk) |
| 137 | { |
| 138 | return container_of(clk, struct local_vote_clk, c); |
| 139 | } |
| 140 | |
| 141 | /** |
| 142 | * struct measure_clk - for rate measurement debug use |
| 143 | * @sample_ticks: sample period in reference clock ticks |
| 144 | * @multiplier: measurement scale-up factor |
| 145 | * @divider: measurement scale-down factor |
| 146 | * @c: clk |
| 147 | */ |
| 148 | struct measure_clk { |
| 149 | u64 sample_ticks; |
| 150 | u32 multiplier; |
| 151 | u32 divider; |
| 152 | struct clk c; |
| 153 | }; |
| 154 | |
Vikram Mulukutla | 8810e34 | 2011-10-20 20:26:53 -0700 | [diff] [blame] | 155 | static inline struct measure_clk *to_measure_clk(struct clk *clk) |
| 156 | { |
| 157 | return container_of(clk, struct measure_clk, c); |
| 158 | } |
| 159 | |
Vikram Mulukutla | 27859df | 2013-01-17 20:56:15 -0800 | [diff] [blame] | 160 | struct mux_source { |
| 161 | struct clk *const clk; |
| 162 | const u32 select_val; |
| 163 | }; |
| 164 | |
| 165 | /** |
| 166 | * struct mux_clk - branch clock |
| 167 | * @c: clk |
| 168 | * @enable_reg: register that contains the enable bit(s) for the mux |
| 169 | * @select_reg: register that contains the source selection bits for the mux |
| 170 | * @enable_mask: mask that enables the mux |
| 171 | * @select_mask: mask for the source selection bits |
| 172 | * @sources: list of mux sources |
| 173 | * @base: pointer to base address of ioremapped registers. |
| 174 | */ |
| 175 | struct mux_clk { |
| 176 | struct clk c; |
| 177 | const u32 enable_reg; |
| 178 | const u32 select_reg; |
| 179 | const u32 enable_mask; |
| 180 | const u32 select_mask; |
| 181 | |
| 182 | struct mux_source *sources; |
| 183 | |
| 184 | void *const __iomem *base; |
| 185 | }; |
| 186 | |
| 187 | static inline struct mux_clk *to_mux_clk(struct clk *clk) |
| 188 | { |
| 189 | return container_of(clk, struct mux_clk, c); |
| 190 | } |
| 191 | |
Vikram Mulukutla | 8810e34 | 2011-10-20 20:26:53 -0700 | [diff] [blame] | 192 | /* |
| 193 | * Generic set-rate implementations |
| 194 | */ |
| 195 | void set_rate_mnd(struct rcg_clk *clk, struct clk_freq_tbl *nf); |
| 196 | void set_rate_hid(struct rcg_clk *clk, struct clk_freq_tbl *nf); |
| 197 | |
| 198 | /* |
| 199 | * Variables from the clock-local driver |
| 200 | */ |
| 201 | extern spinlock_t local_clock_reg_lock; |
| 202 | |
Vikram Mulukutla | 27859df | 2013-01-17 20:56:15 -0800 | [diff] [blame] | 203 | extern struct clk_ops clk_ops_mux; |
Matt Wagantall | edf2fad | 2012-08-06 16:11:46 -0700 | [diff] [blame] | 204 | extern struct clk_ops clk_ops_empty; |
Vikram Mulukutla | 8810e34 | 2011-10-20 20:26:53 -0700 | [diff] [blame] | 205 | extern struct clk_ops clk_ops_rcg; |
| 206 | extern struct clk_ops clk_ops_rcg_mnd; |
| 207 | extern struct clk_ops clk_ops_branch; |
| 208 | extern struct clk_ops clk_ops_vote; |
Patrick Daly | adeeb47 | 2013-03-06 21:22:32 -0800 | [diff] [blame] | 209 | extern struct clk_ops clk_ops_rcg_hdmi; |
| 210 | extern struct clk_ops clk_ops_byte; |
| 211 | extern struct clk_ops clk_ops_pixel; |
Vikram Mulukutla | 8810e34 | 2011-10-20 20:26:53 -0700 | [diff] [blame] | 212 | |
Matt Wagantall | edf2fad | 2012-08-06 16:11:46 -0700 | [diff] [blame] | 213 | /* |
| 214 | * Clock definition macros |
| 215 | */ |
| 216 | #define DEFINE_CLK_MEASURE(name) \ |
| 217 | struct clk name = { \ |
| 218 | .ops = &clk_ops_empty, \ |
| 219 | .dbg_name = #name, \ |
| 220 | CLK_INIT(name), \ |
| 221 | }; \ |
| 222 | |
Abhimanyu Kapur | 90ced6e | 2012-06-26 17:41:25 -0700 | [diff] [blame] | 223 | #endif /* __ARCH_ARM_MACH_MSM_CLOCK_LOCAL_2_H */ |
Vikram Mulukutla | 8810e34 | 2011-10-20 20:26:53 -0700 | [diff] [blame] | 224 | |