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Sathish Ambley9d69ac32012-03-21 10:28:26 -07001/* Copyright (c) 2012, Code Aurora Forum. All rights reserved.
2 *
3 * This program is free software; you can redistribute it and/or modify
4 * it under the terms of the GNU General Public License version 2 and
5 * only version 2 as published by the Free Software Foundation.
6 *
7 * This program is distributed in the hope that it will be useful,
8 * but WITHOUT ANY WARRANTY; without even the implied warranty of
9 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
10 * GNU General Public License for more details.
11 */
Sathish Ambley4df614c2011-10-07 16:30:46 -070012
13/include/ "skeleton.dtsi"
Praveen Chidambaram716c91be2012-10-03 17:32:03 -060014/include/ "msm8974-pm.dtsi"
Abhimanyu Kapur90ced6e2012-06-26 17:41:25 -070015/include/ "msm8974-iommu.dtsi"
Kevin Chan350b6932012-08-01 02:21:00 -070016/include/ "msm8974-camera.dtsi"
Pratik Patelf20bacb2012-07-21 14:46:36 -070017/include/ "msm8974-coresight.dtsi"
Matt Wagantallfc727212012-01-06 18:18:25 -080018/include/ "msm-gdsc.dtsi"
Olav Haugan49173442012-08-01 13:23:18 -070019/include/ "msm8974-ion.dtsi"
Pu Chen1335e872012-08-01 08:45:25 -060020/include/ "msm8974-gpu.dtsi"
Adrian Salido-Morenoa80c69e2012-07-31 18:11:09 -070021/include/ "msm8974-mdss.dtsi"
Sathish Ambley4df614c2011-10-07 16:30:46 -070022
23/ {
Abhimanyu Kapur90ced6e2012-06-26 17:41:25 -070024 model = "Qualcomm MSM 8974";
25 compatible = "qcom,msm8974";
Sathish Ambley4df614c2011-10-07 16:30:46 -070026 interrupt-parent = <&intc>;
27
28 intc: interrupt-controller@F9000000 {
29 compatible = "qcom,msm-qgic2";
30 interrupt-controller;
Michael Bohanc7224532012-01-06 16:02:52 -080031 #interrupt-cells = <3>;
Sathish Ambley4df614c2011-10-07 16:30:46 -070032 reg = <0xF9000000 0x1000>,
33 <0xF9002000 0x1000>;
34 };
Sathish Ambley3d50c762011-10-25 15:26:00 -070035
Sathish Ambleye046b242012-04-09 12:38:05 -070036 msmgpio: gpio@fd510000 {
Michael Bohan0425f6f2012-01-17 14:36:39 -080037 compatible = "qcom,msm-gpio";
Rohit Vaswanib1cc4932012-07-23 21:30:11 -070038 gpio-controller;
39 #gpio-cells = <2>;
Michael Bohan0425f6f2012-01-17 14:36:39 -080040 interrupt-controller;
41 #interrupt-cells = <2>;
Sathish Ambleye046b242012-04-09 12:38:05 -070042 reg = <0xfd510000 0x4000>;
Michael Bohan0425f6f2012-01-17 14:36:39 -080043 };
44
Joonwoo Park27a61782012-09-18 16:28:50 -070045 wcd9xxx_intc: wcd9xxx-irq {
46 compatible = "qcom,wcd9xxx-irq";
47 interrupt-controller;
48 #interrupt-cells = <1>;
49 interrupt-parent = <&msmgpio>;
50 interrupts = <72 0>;
51 interrupt-names = "cdc-int";
52 };
53
Sathish Ambley098f9bd2011-11-09 16:32:53 -080054 timer {
Sathish Ambley2f27a172012-03-16 10:46:28 -070055 compatible = "qcom,msm-qtimer", "arm,armv7-timer";
Sathish Ambleyddd099e2012-04-25 13:24:47 -070056 interrupts = <1 2 0 1 3 0>;
Sathish Ambley2f27a172012-03-16 10:46:28 -070057 clock-frequency = <19200000>;
Sathish Ambley098f9bd2011-11-09 16:32:53 -080058 };
59
Praneeth Paladugu4b73ec82012-02-08 12:55:59 -080060 qcom,vidc@fdc00000 {
61 compatible = "qcom,msm-vidc";
62 reg = <0xfdc00000 0xff000>;
63 interrupts = <0 44 0>;
Vinay Kalia14c92172012-10-10 20:35:13 -070064 vidc-cp-map = <0x1000000 0x3f000000>;
Vinay Kalia68398a42012-06-22 18:36:12 -070065 vidc-ns-map = <0x40000000 0x40000000>;
Vinay Kalia40680aa2012-07-23 12:45:39 -070066 load-freq-tbl = <979200 410000000>,
Vinay Kalia42d37ea2012-08-27 23:28:46 -070067 <783360 410000000>,
Vinay Kalia435bbd52012-09-10 17:08:33 -070068 <489600 266670000>,
Vinay Kalia42d37ea2012-08-27 23:28:46 -070069 <244800 133330000>;
Praneeth Paladugu4b73ec82012-02-08 12:55:59 -080070 };
71
Deva Ramasubramanianf8ec9d692012-07-12 20:42:12 -070072 qcom,wfd {
73 compatible = "qcom,msm-wfd";
74 };
75
David Brown225abee2012-02-09 22:28:50 -080076 serial@f991f000 {
Sathish Ambley3d50c762011-10-25 15:26:00 -070077 compatible = "qcom,msm-lsuart-v14";
David Brown225abee2012-02-09 22:28:50 -080078 reg = <0xf991f000 0x1000>;
Michael Bohanc7224532012-01-06 16:02:52 -080079 interrupts = <0 109 0>;
Stepan Moskovchenko43f11582012-08-08 17:20:38 -070080 status = "disabled";
Sathish Ambley3d50c762011-10-25 15:26:00 -070081 };
Pavankumar Kondetieaea7fe2011-10-27 14:46:45 +053082
Sathish Ambley9d69ac32012-03-21 10:28:26 -070083 serial@f995e000 {
84 compatible = "qcom,msm-lsuart-v14";
85 reg = <0xf995e000 0x1000>;
86 interrupts = <0 114 0>;
Stepan Moskovchenko43f11582012-08-08 17:20:38 -070087 status = "disabled";
Sathish Ambley9d69ac32012-03-21 10:28:26 -070088 };
89
Stepan Moskovchenko5269b602012-08-08 17:57:09 -070090 serial@f991e000 {
91 compatible = "qcom,msm-lsuart-v14";
92 reg = <0xf991e000 0x1000>;
93 interrupts = <0 108 0>;
94 status = "disabled";
95 };
96
David Keitel7df02732012-08-17 16:33:06 -070097 usb_otg: usb@f9a55000 {
Pavankumar Kondetieaea7fe2011-10-27 14:46:45 +053098 compatible = "qcom,hsusb-otg";
David Brown225abee2012-02-09 22:28:50 -080099 reg = <0xf9a55000 0x400>;
Manu Gautamf8c45642012-08-10 10:20:56 -0700100 interrupts = <0 134 0 0 140 0>;
101 interrupt-names = "core_irq", "async_irq";
Michael Bohane66a3a92012-03-26 12:47:28 -0700102 HSUSB_VDDCX-supply = <&pm8841_s2>;
103 HSUSB_1p8-supply = <&pm8941_l6>;
104 HSUSB_3p3-supply = <&pm8941_l24>;
Pavankumar Kondetieaea7fe2011-10-27 14:46:45 +0530105
106 qcom,hsusb-otg-phy-type = <2>;
Manu Gautam4fea0af2012-09-06 12:52:48 -0700107 qcom,hsusb-otg-phy-init-seq = <0x63 0x81 0xffffffff>;
Pavankumar Kondetieaea7fe2011-10-27 14:46:45 +0530108 qcom,hsusb-otg-mode = <1>;
Sridhar Parasurama418ce22012-09-26 09:35:21 -0700109 qcom,hsusb-otg-otg-control = <1>;
Manu Gautambd53fba2012-07-31 16:13:06 +0530110 qcom,hsusb-otg-disable-reset;
Manu Gautam0ddbd922012-09-21 17:17:38 +0530111 qcom,hsusb-otg-pnoc-errata-fix;
Manu Gautam2e8ac102012-08-31 11:41:16 -0700112
Gagan Macb2372ae2012-08-20 19:24:32 -0600113 qcom,msm-bus,name = "usb2";
114 qcom,msm-bus,num-cases = <2>;
115 qcom,msm-bus,active-only = <0>;
116 qcom,msm-bus,num-paths = <1>;
117 qcom,msm-bus,vectors-KBps =
Manu Gautam2e8ac102012-08-31 11:41:16 -0700118 <87 512 0 0>,
Gagan Macb2372ae2012-08-20 19:24:32 -0600119 <87 512 60000 960000>;
Pavankumar Kondetieaea7fe2011-10-27 14:46:45 +0530120 };
Sujit Reddy Thumma7285c2e2011-11-04 10:18:15 +0530121
Manu Gautam43c61a12012-08-22 17:09:37 -0700122 android_usb@fc42b0c8 {
123 compatible = "qcom,android-usb";
124 reg = <0xfc42b0c8 0xc8>;
125 };
126
Krishna Kondab6da6932012-08-19 12:04:05 -0700127 sdcc1: qcom,sdcc@f9824000 {
Sujit Reddy Thumma38459152012-06-26 00:07:59 +0530128 cell-index = <1>; /* SDC1 eMMC slot */
Sujit Reddy Thumma7285c2e2011-11-04 10:18:15 +0530129 compatible = "qcom,msm-sdcc";
Krishna Konda99783e622012-08-29 10:40:15 -0700130 reg = <0xf9824000 0x800>,
131 <0xf9824800 0x100>,
132 <0xf9804000 0x7000>;
133 reg-names = "core_mem", "dml_mem", "bam_mem";
134 interrupts = <0 123 0>, <0 137 0>;
135 interrupt-names = "core_irq", "bam_irq";
Sujit Reddy Thummab9ff7f02012-05-04 09:57:49 +0530136 vdd-supply = <&pm8941_l20>;
137 vdd-io-supply = <&pm8941_s3>;
138
Krishna Kondabc97c322012-09-10 14:42:07 -0700139 qcom,sdcc-vdd-always_on;
140 qcom,sdcc-vdd-lpm_sup;
Sujit Reddy Thummab9ff7f02012-05-04 09:57:49 +0530141 qcom,sdcc-vdd-voltage_level = <2950000 2950000>;
142 qcom,sdcc-vdd-current_level = <800 500000>;
143
144 qcom,sdcc-vdd-io-always_on;
145 qcom,sdcc-vdd-io-voltage_level = <1800000 1800000>;
146 qcom,sdcc-vdd-io-current_level = <250 154000>;
Sujit Reddy Thumma7285c2e2011-11-04 10:18:15 +0530147
Sujit Reddy Thumma38459152012-06-26 00:07:59 +0530148 qcom,sdcc-pad-pull-on = <0x0 0x3 0x3>; /* no-pull, pull-up, pull-up */
149 qcom,sdcc-pad-pull-off = <0x0 0x3 0x3>; /* no-pull, pull-up, pull-up */
150 qcom,sdcc-pad-drv-on = <0x7 0x4 0x4>; /* 16mA, 10mA, 10mA */
151 qcom,sdcc-pad-drv-off = <0x0 0x0 0x0>; /* 2mA, 2mA, 2mA */
152
Sujit Reddy Thumma85fc52c2012-05-02 12:53:45 +0530153 qcom,sdcc-clk-rates = <400000 25000000 50000000 100000000 200000000>;
154 qcom,sdcc-sup-voltages = <2950 2950>;
Sujit Reddy Thumma7285c2e2011-11-04 10:18:15 +0530155 qcom,sdcc-bus-width = <8>;
156 qcom,sdcc-nonremovable;
Sujit Reddy Thumma824b7522012-05-30 13:04:34 +0530157 qcom,sdcc-bus-speed-mode = "HS200_1p8v", "DDR_1p8v";
Sujit Reddy Thumma7285c2e2011-11-04 10:18:15 +0530158 };
159
Krishna Kondab6da6932012-08-19 12:04:05 -0700160 sdcc2: qcom,sdcc@f98a4000 {
Sujit Reddy Thumma38459152012-06-26 00:07:59 +0530161 cell-index = <2>; /* SDC2 SD card slot */
Sujit Reddy Thumma85fc52c2012-05-02 12:53:45 +0530162 compatible = "qcom,msm-sdcc";
Krishna Konda99783e622012-08-29 10:40:15 -0700163 reg = <0xf98a4000 0x800>,
164 <0xf98a4800 0x100>,
165 <0xf9884000 0x7000>;
166 reg-names = "core_mem", "dml_mem", "bam_mem";
167 interrupts = <0 125 0>, <0 220 0>;
168 interrupt-names = "core_irq", "bam_irq";
Sujit Reddy Thummab9ff7f02012-05-04 09:57:49 +0530169 vdd-supply = <&pm8941_l21>;
170 vdd-io-supply = <&pm8941_l13>;
171
172 qcom,sdcc-vdd-voltage_level = <2950000 2950000>;
173 qcom,sdcc-vdd-current_level = <9000 800000>;
174
175 qcom,sdcc-vdd-io-always_on;
176 qcom,sdcc-vdd-io-lpm_sup;
177 qcom,sdcc-vdd-io-voltage_level = <1800000 2950000>;
178 qcom,sdcc-vdd-io-current_level = <6 22000>;
Sujit Reddy Thumma85fc52c2012-05-02 12:53:45 +0530179
Sujit Reddy Thumma38459152012-06-26 00:07:59 +0530180 qcom,sdcc-pad-pull-on = <0x0 0x3 0x3>; /* no-pull, pull-up, pull-up */
181 qcom,sdcc-pad-pull-off = <0x0 0x3 0x3>; /* no-pull, pull-up, pull-up */
182 qcom,sdcc-pad-drv-on = <0x7 0x4 0x4>; /* 16mA, 10mA, 10mA */
183 qcom,sdcc-pad-drv-off = <0x0 0x0 0x0>; /* 2mA, 2mA, 2mA */
184
Sujit Reddy Thumma85fc52c2012-05-02 12:53:45 +0530185 qcom,sdcc-clk-rates = <400000 25000000 50000000 100000000 200000000>;
186 qcom,sdcc-sup-voltages = <2950 2950>;
187 qcom,sdcc-bus-width = <4>;
Sujit Reddy Thumma824b7522012-05-30 13:04:34 +0530188 qcom,sdcc-xpc;
189 qcom,sdcc-bus-speed-mode = "SDR12", "SDR25", "SDR50", "DDR50", "SDR104";
190 qcom,sdcc-current-limit = <800>;
Sujit Reddy Thumma85fc52c2012-05-02 12:53:45 +0530191 };
192
Krishna Kondab6da6932012-08-19 12:04:05 -0700193 sdcc3: qcom,sdcc@f9864000 {
Sujit Reddy Thumma38459152012-06-26 00:07:59 +0530194 cell-index = <3>; /* SDC3 SDIO slot */
Sujit Reddy Thumma7285c2e2011-11-04 10:18:15 +0530195 compatible = "qcom,msm-sdcc";
Krishna Konda99783e622012-08-29 10:40:15 -0700196 reg = <0xf9864000 0x800>,
197 <0xf9864800 0x100>,
198 <0xf9844000 0x7000>;
199 reg-names = "core_mem", "dml_mem", "bam_mem";
200 interrupts = <0 127 0>, <0 223 0>;
201 interrupt-names = "core_irq", "bam_irq";
Sujit Reddy Thumma7285c2e2011-11-04 10:18:15 +0530202
Sujit Reddy Thumma38459152012-06-26 00:07:59 +0530203 gpios = <&msmgpio 40 0>, /* CLK */
204 <&msmgpio 39 0>, /* CMD */
205 <&msmgpio 38 0>, /* DATA0 */
206 <&msmgpio 37 0>, /* DATA1 */
207 <&msmgpio 36 0>, /* DATA2 */
208 <&msmgpio 35 0>; /* DATA3 */
209 qcom,sdcc-gpio-names = "CLK", "CMD", "DAT0", "DAT1", "DAT2", "DAT3";
210
Sujit Reddy Thumma85fc52c2012-05-02 12:53:45 +0530211 qcom,sdcc-clk-rates = <400000 25000000 50000000 100000000>;
212 qcom,sdcc-sup-voltages = <1800 1800>;
Sujit Reddy Thumma7285c2e2011-11-04 10:18:15 +0530213 qcom,sdcc-bus-width = <4>;
Sujit Reddy Thumma824b7522012-05-30 13:04:34 +0530214 qcom,sdcc-bus-speed-mode = "SDR12", "SDR25", "SDR50", "DDR50";
Sujit Reddy Thumma7138b3e2012-06-04 09:10:11 +0530215 status = "disable";
Sujit Reddy Thumma85fc52c2012-05-02 12:53:45 +0530216 };
217
Krishna Kondab6da6932012-08-19 12:04:05 -0700218 sdcc4: qcom,sdcc@f98e4000 {
Sujit Reddy Thumma38459152012-06-26 00:07:59 +0530219 cell-index = <4>; /* SDC4 SDIO slot */
Sujit Reddy Thumma85fc52c2012-05-02 12:53:45 +0530220 compatible = "qcom,msm-sdcc";
Krishna Konda99783e622012-08-29 10:40:15 -0700221 reg = <0xf98e4000 0x800>,
222 <0xf98e4800 0x100>,
223 <0xf98c4000 0x7000>;
224 reg-names = "core_mem", "dml_mem", "bam_mem";
225 interrupts = <0 129 0>, <0 226 0>;
226 interrupt-names = "core_irq", "bam_irq";
Sujit Reddy Thumma85fc52c2012-05-02 12:53:45 +0530227
Sujit Reddy Thumma38459152012-06-26 00:07:59 +0530228 gpios = <&msmgpio 93 0>, /* CLK */
229 <&msmgpio 91 0>, /* CMD */
230 <&msmgpio 96 0>, /* DATA0 */
231 <&msmgpio 95 0>, /* DATA1 */
232 <&msmgpio 94 0>, /* DATA2 */
233 <&msmgpio 92 0>; /* DATA3 */
234 qcom,sdcc-gpio-names = "CLK", "CMD", "DAT0", "DAT1", "DAT2", "DAT3";
235
Sujit Reddy Thumma85fc52c2012-05-02 12:53:45 +0530236 qcom,sdcc-clk-rates = <400000 25000000 50000000 100000000>;
237 qcom,sdcc-sup-voltages = <1800 1800>;
238 qcom,sdcc-bus-width = <4>;
Sujit Reddy Thumma824b7522012-05-30 13:04:34 +0530239 qcom,sdcc-bus-speed-mode = "SDR12", "SDR25", "SDR50", "DDR50";
Sujit Reddy Thumma7138b3e2012-06-04 09:10:11 +0530240 status = "disable";
Sujit Reddy Thumma7285c2e2011-11-04 10:18:15 +0530241 };
Yan He1466daa2011-11-30 17:25:38 -0800242
David Brown225abee2012-02-09 22:28:50 -0800243 qcom,sps@f9980000 {
Yan He1466daa2011-11-30 17:25:38 -0800244 compatible = "qcom,msm_sps";
David Brown225abee2012-02-09 22:28:50 -0800245 reg = <0xf9984000 0x15000>,
246 <0xf9999000 0xb000>;
Michael Bohanc7224532012-01-06 16:02:52 -0800247 interrupts = <0 94 0>;
Yan He1466daa2011-11-30 17:25:38 -0800248
249 qcom,bam-dma-res-pipes = <6>;
250 };
251
Sagar Dhariae0bb6502012-08-10 20:25:51 -0600252 spi@f9966000 {
253 compatible = "qcom,spi-qup-v2";
254 cell-index = <7>;
255 reg = <0xf9966000 0x1000>;
256 interrupts = <0 104 0>;
257 spi-max-frequency = <19200000>;
258 #address-cells = <1>;
259 #size-cells = <0>;
260 gpios = <&msmgpio 56 0>, /* CLK */
261 <&msmgpio 54 0>, /* MISO */
262 <&msmgpio 53 0>; /* MOSI */
263 cs-gpios = <&msmgpio 55 0>;
Siddartha Mohanadoss81e9f8b2012-09-19 21:49:14 -0700264
265 epm-adc@0 {
266 compatible = "cy,epm-adc-cy8c5568lti-114";
267 reg = <0>;
268 interrupt-parent = <&msmgpio>;
269 spi-max-frequency = <960000>;
270 qcom,channels = <31>;
271 qcom,gain = <100 100 100 50 100 100 1 100 1 50
272 1 100 1 100 50 50 50 50 50 50
273 100 50 100 50 50 50 50 50 50 50
274 50>;
275 qcom,rsense = <2 2 2 200 20 2 1 2 1 30
276 1 10 1 30 50 30 500 30 100 30
277 100 500 20 200 1000 20 1000 1000 70 200
278 50>;
279 qcom,channel-type = <0x2a40>;
280 };
Sagar Dhariae0bb6502012-08-10 20:25:51 -0600281 };
Hariprasad Dhalinarasimhade991f02012-05-31 13:15:51 -0700282
Joonwoo Park6ecc51a2012-10-20 22:32:32 -0700283 slim_msm: slim@fe12f000 {
Sagar Dhariaa316a962012-03-21 16:13:22 -0600284 cell-index = <1>;
285 compatible = "qcom,slim-msm";
286 reg = <0xfe12f000 0x35000>,
287 <0xfe104000 0x20000>;
288 reg-names = "slimbus_physical", "slimbus_bam_physical";
289 interrupts = <0 163 0 0 164 0>;
290 interrupt-names = "slimbus_irq", "slimbus_bam_irq";
291 qcom,min-clk-gear = <10>;
Sagar Dhariac0d6cf52012-07-31 19:17:26 -0600292 qcom,rxreg-access;
Kiran Kandie8bf5d52012-08-06 16:03:16 -0700293
294 taiko_codec {
295 compatible = "qcom,taiko-slim-pgd";
296 elemental-addr = [00 01 A0 00 17 02];
297
Joonwoo Park27a61782012-09-18 16:28:50 -0700298 interrupt-parent = <&wcd9xxx_intc>;
299 interrupts = <0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28>;
300
Kiran Kandie8bf5d52012-08-06 16:03:16 -0700301 qcom,cdc-reset-gpio = <&msmgpio 63 0>;
302
303 cdc-vdd-buck-supply = <&pm8941_s2>;
304 qcom,cdc-vdd-buck-voltage = <2150000 2150000>;
305 qcom,cdc-vdd-buck-current = <650000>;
306
307 cdc-vdd-tx-h-supply = <&pm8941_s3>;
308 qcom,cdc-vdd-tx-h-voltage = <1800000 1800000>;
309 qcom,cdc-vdd-tx-h-current = <25000>;
310
311 cdc-vdd-rx-h-supply = <&pm8941_s3>;
312 qcom,cdc-vdd-rx-h-voltage = <1800000 1800000>;
313 qcom,cdc-vdd-rx-h-current = <25000>;
314
315 cdc-vddpx-1-supply = <&pm8941_s3>;
316 qcom,cdc-vddpx-1-voltage = <1800000 1800000>;
317 qcom,cdc-vddpx-1-current = <10000>;
318
319 cdc-vdd-a-1p2v-supply = <&pm8941_l1>;
320 qcom,cdc-vdd-a-1p2v-voltage = <1225000 1225000>;
321 qcom,cdc-vdd-a-1p2v-current = <10000>;
322
323 cdc-vddcx-1-supply = <&pm8941_l1>;
324 qcom,cdc-vddcx-1-voltage = <1225000 1225000>;
325 qcom,cdc-vddcx-1-current = <10000>;
326
327 cdc-vddcx-2-supply = <&pm8941_l1>;
328 qcom,cdc-vddcx-2-voltage = <1225000 1225000>;
329 qcom,cdc-vddcx-2-current = <10000>;
330
331 qcom,cdc-micbias-ldoh-v = <0x3>;
332 qcom,cdc-micbias-cfilt1-mv = <1800>;
333 qcom,cdc-micbias-cfilt2-mv = <2700>;
334 qcom,cdc-micbias-cfilt3-mv = <1800>;
335 qcom,cdc-micbias1-cfilt-sel = <0x0>;
336 qcom,cdc-micbias2-cfilt-sel = <0x1>;
337 qcom,cdc-micbias3-cfilt-sel = <0x2>;
338 qcom,cdc-micbias4-cfilt-sel = <0x2>;
339
340 qcom,cdc-slim-ifd = "taiko-slim-ifd";
341 qcom,cdc-slim-ifd-elemental-addr = [00 00 A0 00 17 02];
342 };
Sagar Dhariaa316a962012-03-21 16:13:22 -0600343 };
344
Kiran Kandi0121ad12012-08-20 13:01:47 -0700345 sound {
346 compatible = "qcom,msm8974-audio-taiko";
347 qcom,model = "msm8974-taiko-snd-card";
348
349 qcom,audio-routing =
350 "RX_BIAS", "MCLK",
351 "LDO_H", "MCLK",
Kiran Kandi0121ad12012-08-20 13:01:47 -0700352 "Ext Spk Bottom Pos", "LINEOUT1",
353 "Ext Spk Bottom Neg", "LINEOUT3",
354 "Ext Spk Top Pos", "LINEOUT2",
355 "Ext Spk Top Neg", "LINEOUT4",
356 "AMIC1", "MIC BIAS1 Internal1",
357 "MIC BIAS1 Internal1", "Handset Mic",
358 "AMIC2", "MIC BIAS2 External",
359 "MIC BIAS2 External", "Headset Mic",
Kiran Kandi8ad43072012-10-22 13:06:43 -0700360 "AMIC3", "MIC BIAS2 External",
361 "MIC BIAS2 External", "ANCRight Headset Mic",
362 "AMIC4", "MIC BIAS2 External",
363 "MIC BIAS2 External", "ANCLeft Headset Mic",
Kiran Kandi0121ad12012-08-20 13:01:47 -0700364 "DMIC1", "MIC BIAS1 External",
365 "MIC BIAS1 External", "Digital Mic1",
366 "DMIC2", "MIC BIAS1 External",
367 "MIC BIAS1 External", "Digital Mic2",
368 "DMIC3", "MIC BIAS3 External",
369 "MIC BIAS3 External", "Digital Mic3",
370 "DMIC4", "MIC BIAS3 External",
371 "MIC BIAS3 External", "Digital Mic4",
372 "DMIC5", "MIC BIAS4 External",
373 "MIC BIAS4 External", "Digital Mic5",
374 "DMIC6", "MIC BIAS4 External",
375 "MIC BIAS4 External", "Digital Mic6";
Kiran Kandi79db1b02012-08-21 13:48:19 -0700376
377 qcom,cdc-mclk-gpios = <&pm8941_gpios 15 0>;
378 taiko-mclk-clk = <&pm8941_clkdiv1>;
379 qcom,taiko-mclk-clk-freq = <9600000>;
Kiran Kandi0121ad12012-08-20 13:01:47 -0700380 };
381
Varad Deshmukh18057ed2012-07-03 16:34:53 -0700382 spmi_bus: qcom,spmi@fc4c0000 {
Kenneth Heitkef3c829c2012-01-13 17:02:43 -0700383 cell-index = <0>;
384 compatible = "qcom,spmi-pmic-arb";
385 reg = <0xfc4cf000 0x1000>,
386 <0Xfc4cb000 0x1000>;
387 /* 190,ee0_krait_hlos_spmi_periph_irq */
388 /* 187,channel_0_krait_hlos_trans_done_irq */
389 interrupts = <0 190 0 0 187 0>;
390 qcom,pmic-arb-ee = <0>;
391 qcom,pmic-arb-channel = <0>;
Gilad Avidov1d175ba2012-08-06 17:05:22 -0600392 qcom,pmic-arb-ppid-map = <0x40400000>, /* BUS */
393 <0x40500001>, /* INT */
394 <0x40600002>, /* SPMI */
395 <0x40800003>, /* PON */
396 <0x42400004>, /* TEMP_ALARM */
397 <0x47000005>, /* PBS_CORE */
398 <0x47100006>, /* PBS_CLIENT0 */
399 <0x47200007>, /* PBS_CLIENT1 */
400 <0x47300008>, /* PBS_CLIENT2 */
401 <0x47400009>, /* PBS_CLIENT3 */
402 <0x4750000a>, /* PBS_CLIENT4 */
403 <0x4760000b>, /* PBS_CLIENT5 */
404 <0x4770000c>, /* PBS_CLIENT6 */
405 <0x4780000d>, /* PBS_CLIENT7 */
406 <0x4a00000e>, /* MPP1 */
407 <0x4a100021>, /* MPP2 */
408 <0x4a20000f>, /* MPP3 */
409 <0x4a300010>, /* MPP4 */
410 <0x51000011>, /* BCLK_GEN_MAIN */
411 <0x51d00012>, /* S4_CTRL */
412 <0x51e00013>, /* S4_PS */
413 <0x51f00014>, /* S4_FREQ */
414 <0x52000015>, /* S5_CTRL */
415 <0x52100016>, /* S5_PS */
416 <0x52200017>, /* S5_FREQ */
417 <0x52300018>, /* S6_CTRL */
418 <0x52400019>, /* S6_PS */
419 <0x5250001a>, /* S6_FREQ */
420 <0x5260001b>, /* S7_CTRL */
421 <0x5270001c>, /* S7_PS */
422 <0x5280001d>, /* S7_FREQ */
423 <0x5290001e>, /* S8_CTRL */
424 <0x52a0001f>, /* S8_PS */
425 <0x52b00020>, /* S8_FREQ */
426 <0x00400022>, /* BUS */
427 <0x00500023>, /* INT */
428 <0x00600024>, /* SPMI */
429 <0x00800025>, /* PON */
430 <0x00b00027>, /* VREG_TFT */
431 <0x01000028>, /* SMBB_CHGR */
432 <0x01100029>, /* SMBB_BUCK */
433 <0x0120002a>, /* SMBB_BAT_IF */
434 <0x0130002b>, /* SMBB_USB_CHGPTH */
435 <0x0140002c>, /* SMBB_DC_CHGPTH */
436 <0x0150002d>, /* SMBB_BOOST */
437 <0x0160002e>, /* SMBB_MISC */
438 <0x0170002f>, /* SMBB_FREQ */
439 <0x02400030>, /* TEMP_ALARM */
440 <0x02800031>, /* COIN */
441 <0x03100032>, /* VADC1_USR */
442 <0x03300033>, /* VADC1_BMS */
443 <0x03400034>, /* VADC2_BTM */
444 <0x03600035>, /* IADC1_USR */
445 <0x03800036>, /* IADC1_BMS */
446 <0x04000037>, /* BMS1 */
447 <0x05700039>, /* DIFF_CLK1 */
448 <0x05c0003b>, /* DIV_CLK2 */
449 <0x0610003d>, /* RTC_ALARM */
450 <0x0620003e>, /* RTC_TIMER */
451 <0x07100040>, /* PBS_CLIENT0 */
452 <0x07200041>, /* PBS_CLIENT1 */
453 <0x07300042>, /* PBS_CLIENT2 */
454 <0x07400043>, /* PBS_CLIENT3 */
455 <0x07500044>, /* PBS_CLIENT4 */
456 <0x07600045>, /* PBS_CLIENT5 */
457 <0x07700046>, /* PBS_CLIENT6 */
458 <0x07800047>, /* PBS_CLIENT7 */
459 <0x07900048>, /* PBS_CLIENT8 */
460 <0x07a00049>, /* PBS_CLIENT9 */
461 <0x07b0004a>, /* PBS_CLIENT10 */
462 <0x07c0004b>, /* PBS_CLIENT11 */
463 <0x07d0004c>, /* PBS_CLIENT12 */
464 <0x07e0004d>, /* PBS_CLIENT13 */
465 <0x07f0004e>, /* PBS_CLIENT14 */
466 <0x0800004f>, /* PBS_CLIENT15 */
467 <0x0a100050>, /* MPP2 */
468 <0x0a300051>, /* MPP4 */
469 <0x0a400052>, /* MPP5 */
470 <0x0a500053>, /* MPP6 */
471 <0x0a600054>, /* MPP7 */
472 <0x0a700055>, /* MPP8 */
473 <0x0c000056>, /* GPIO1 */
474 <0x0c100057>, /* GPIO2 */
475 <0x0c200058>, /* GPIO3 */
476 <0x0c300059>, /* GPIO4 */
477 <0x0c40005a>, /* GPIO5 */
478 <0x0c50005b>, /* GPIO6 */
479 <0x0c60005c>, /* GPIO7 */
480 <0x0c70005d>, /* GPIO8 */
481 <0x0c80005e>, /* GPIO9 */
482 <0x0c90005f>, /* GPIO10 */
483 <0x0ca00060>, /* GPIO11 */
484 <0x0cb00061>, /* GPIO12 */
485 <0x0cc00062>, /* GPIO13 */
486 <0x0cd00063>, /* GPIO14 */
487 <0x0ce00064>, /* GPIO15 */
488 <0x0cf00065>, /* GPIO16 */
489 <0x0d200066>, /* GPIO19 */
490 <0x0d300067>, /* GPIO20 */
491 <0x0d500068>, /* GPIO22 */
492 <0x0d600069>, /* GPIO23 */
493 <0x0d70006a>, /* GPIO24 */
494 <0x0d80006b>, /* GPIO25 */
495 <0x0d90006c>, /* GPIO26 */
496 <0x0da0006d>, /* GPIO27 */
497 <0x0dc0006e>, /* GPIO29 */
498 <0x0dd0006f>, /* GPIO30 */
499 <0x0df00070>, /* GPIO32 */
500 <0x0e000071>, /* GPIO33 */
501 <0x0e100072>, /* GPIO34 */
502 <0x0e200073>, /* GPIO35 */
503 <0x0e300074>, /* GPIO36 */
504 <0x11000075>, /* BUCK_CMN */
505 <0x1a000076>, /* BOOST */
506 <0x1a100077>, /* BOOST_FREQ */
507 <0x1a800078>, /* KEYPAD1 */
508 <0x1b000079>, /* LPG_LUT */
509 <0x1b10007a>, /* LPG_CHAN1 */
510 <0x1b20007b>, /* LPG_CHAN2 */
511 <0x1b30007c>, /* LPG_CHAN3 */
512 <0x1b40007d>, /* LPG_CHAN4 */
513 <0x1b50007e>, /* LPG_CHAN5 */
514 <0x1b60007f>, /* LPG_CHAN6 */
515 <0x1b700080>, /* LPG_CHAN7 */
516 <0x1b800081>, /* LPG_CHAN8 */
517 <0x1bc00082>, /* PWM_3D */
518 <0x1c000083>, /* VIB1 */
519 <0x1d000084>, /* TRI_LED */
520 <0x1d300085>, /* FLASH1 */
521 <0x1d800086>, /* WLED1 */
522 <0x1e200087>, /* KPDBL_MAIN */
523 <0x1e300088>, /* KPDBL_LUT */
524 <0x1e400089>, /* LPG_CHAN9 */
525 <0x1e50008a>, /* LPG_CHAN10 */
526 <0x1e60008b>, /* LPG_CHAN11 */
527 <0x1e70008c>; /* LPG_CHAN12 */
Amy Maloche02a5eae2012-08-10 21:33:59 -0700528
529 qcom,pm8941@1 {
530 qcom,leds@d800 {
Amy Maloche02a5eae2012-08-10 21:33:59 -0700531 status = "okay";
Amy Malochea5ca5552012-10-23 13:34:46 -0700532 qcom,wled_0 {
533 label = "wled";
534 linux,name = "wled:backlight";
535 linux,default-trigger = "bkl-trigger";
536 qcom,cs-out-en;
537 qcom,op-fdbck;
538 qcom,default-state = "on";
539 qcom,max-current = <25>;
540 qcom,ctrl-delay-us = <0>;
541 qcom,boost-curr-lim = <3>;
542 qcom,cp-sel = <0>;
543 qcom,switch-freq = <2>;
544 qcom,ovp-val = <2>;
545 qcom,num-strings = <1>;
546 qcom,id = <0>;
547 };
Amy Maloche02a5eae2012-08-10 21:33:59 -0700548 };
549
550 qcom,leds@d900 {
551 status = "disabled";
552 };
553
554 qcom,leds@da00 {
555 status = "disabled";
556 };
557
558 qcom,leds@db00 {
559 status = "disabled";
560 };
561
562 qcom,leds@dc00 {
563 status = "disabled";
564 };
565
566 qcom,leds@dd00 {
567 status = "disabled";
568 };
569
570 qcom,leds@de00 {
571 status = "disabled";
572 };
573
574 qcom,leds@df00 {
575 status = "disabled";
576 };
577
578 qcom,leds@e000 {
579 status = "disabled";
580 };
581
582 qcom,leds@e100 {
583 status = "disabled";
584 };
585 };
Kenneth Heitkef3c829c2012-01-13 17:02:43 -0700586 };
Sagar Dharia218edb92012-01-15 18:03:01 -0700587
Amir Samuelovb5266182012-10-23 09:45:41 +0200588 i2c@f9967000 { /* BLSP#11 */
Sagar Dharia218edb92012-01-15 18:03:01 -0700589 cell-index = <0>;
590 compatible = "qcom,i2c-qup";
Sagar Dharia8a73da92012-08-11 16:41:25 -0600591 reg = <0Xf9967000 0x1000>;
Amir Samuelovb5266182012-10-23 09:45:41 +0200592 #address-cells = <1>;
593 #size-cells = <0>;
Sagar Dharia218edb92012-01-15 18:03:01 -0700594 reg-names = "qup_phys_addr";
Sagar Dharia8a73da92012-08-11 16:41:25 -0600595 interrupts = <0 105 0>;
Sagar Dharia218edb92012-01-15 18:03:01 -0700596 interrupt-names = "qup_err_intr";
597 qcom,i2c-bus-freq = <100000>;
598 qcom,i2c-src-freq = <24000000>;
599 };
Matt Wagantalle9b715a2012-01-04 18:16:14 -0800600
Amy Malochebc7e9672012-08-15 10:30:40 -0700601 i2c@f9924000 {
602 cell-index = <2>;
603 compatible = "qcom,i2c-qup";
604 reg = <0xf9924000 0x1000>;
605 #address-cells = <1>;
606 #size-cells = <0>;
607 reg-names = "qup_phys_addr";
608 interrupts = <0 96 0>;
609 interrupt-names = "qup_err_intr";
610 qcom,i2c-bus-freq = <100000>;
611 qcom,i2c-src-freq = <24000000>;
612 };
613
Subbaraman Narayanamurthy3f93ab12012-08-17 19:39:47 -0700614 spi@f9923000 {
615 cell-index = <0>;
616 compatible = "qcom,spi-qup-v2";
617 reg = <0xf9923000 0x1000>;
618 interrupts = <0 95 0>;
619 spi-max-frequency = <19200000>;
620 #address-cells = <1>;
621 #size-cells = <0>;
622 gpios = <&msmgpio 3 0>, /* CLK */
623 <&msmgpio 1 0>, /* MISO */
624 <&msmgpio 0 0>; /* MOSI */
625 cs-gpios = <&msmgpio 9 0>;
626 };
627
Matt Wagantall48523022012-04-23 13:28:42 -0700628 qcom,acpuclk@f9000000 {
Abhimanyu Kapur90ced6e2012-06-26 17:41:25 -0700629 compatible = "qcom,acpuclk-8974";
Matt Wagantallbf9eb2c2012-05-31 09:44:22 -0700630 krait0-supply = <&krait0_vreg>;
631 krait1-supply = <&krait1_vreg>;
632 krait2-supply = <&krait2_vreg>;
633 krait3-supply = <&krait3_vreg>;
David Collins1c91ea72012-05-03 16:17:35 -0700634 krait0_mem-supply = <&pm8841_s1_ao>;
635 krait1_mem-supply = <&pm8841_s1_ao>;
636 krait2_mem-supply = <&pm8841_s1_ao>;
637 krait3_mem-supply = <&pm8841_s1_ao>;
638 krait0_dig-supply = <&pm8841_s2_corner_ao>;
639 krait1_dig-supply = <&pm8841_s2_corner_ao>;
640 krait2_dig-supply = <&pm8841_s2_corner_ao>;
641 krait3_dig-supply = <&pm8841_s2_corner_ao>;
Matt Wagantall337cdb72012-06-29 12:07:27 -0700642 krait0_hfpll_a-supply = <&pm8941_s2_ao>;
643 krait1_hfpll_a-supply = <&pm8941_s2_ao>;
644 krait2_hfpll_a-supply = <&pm8941_s2_ao>;
645 krait3_hfpll_a-supply = <&pm8941_s2_ao>;
646 l2_hfpll_a-supply = <&pm8941_s2_ao>;
647 krait0_hfpll_b-supply = <&pm8941_l12_ao>;
648 krait1_hfpll_b-supply = <&pm8941_l12_ao>;
649 krait2_hfpll_b-supply = <&pm8941_l12_ao>;
650 krait3_hfpll_b-supply = <&pm8941_l12_ao>;
651 l2_hfpll_b-supply = <&pm8941_l12_ao>;
Matt Wagantalle9b715a2012-01-04 18:16:14 -0800652 };
Ido Shayevitzef72ddd2012-03-28 18:55:55 +0200653
Vijayavardhan Vennapusaa3de1cc2012-10-23 11:32:27 +0530654 usb3: qcom,ssusb@f9200000 {
Ido Shayevitzef72ddd2012-03-28 18:55:55 +0200655 compatible = "qcom,dwc-usb3-msm";
Ido Shayevitz7ad8ded2012-08-28 04:30:58 +0300656 reg = <0xf9200000 0xfc000>,
657 <0xfd4ab000 0x4>;
Manu Gautamf2649e82012-10-23 10:06:55 +0530658 interrupts = <0 131 0>, <0 179 0>, <0 133 0>;
659 interrupt-names = "irq", "otg_irq", "hs_phy_irq";
Manu Gautam60e01352012-05-29 09:00:34 +0530660 SSUSB_VDDCX-supply = <&pm8841_s2>;
661 SSUSB_1p8-supply = <&pm8941_l6>;
662 HSUSB_VDDCX-supply = <&pm8841_s2>;
663 HSUSB_1p8-supply = <&pm8941_l6>;
664 HSUSB_3p3-supply = <&pm8941_l24>;
Manu Gautamf1fceddf2012-10-12 14:02:50 +0530665 vbus_dwc3-supply = <&pm8941_mvs1>;
Ido Shayevitzef72ddd2012-03-28 18:55:55 +0200666 qcom,dwc-usb3-msm-dbm-eps = <4>;
Manu Gautam2617deb2012-08-31 17:50:06 -0700667
Gagan Macb2372ae2012-08-20 19:24:32 -0600668 qcom,msm-bus,name = "usb3";
669 qcom,msm-bus,num-cases = <2>;
670 qcom,msm-bus,active-only = <0>;
671 qcom,msm-bus,num-paths = <1>;
672 qcom,msm-bus,vectors-KBps =
Manu Gautam2617deb2012-08-31 17:50:06 -0700673 <61 512 0 0>,
Gagan Macb2372ae2012-08-20 19:24:32 -0600674 <61 512 240000 960000>;
Ido Shayevitzef72ddd2012-03-28 18:55:55 +0200675 };
Matt Wagantallc2bbdc32012-03-21 19:44:50 -0700676
Matt Wagantallfc727212012-01-06 18:18:25 -0800677 gdsc_oxili_gx: qcom,gdsc@fd8c4024 {
678 parent-supply = <&pm8841_s4>;
679 };
680
Matt Wagantallc2bbdc32012-03-21 19:44:50 -0700681 qcom,lpass@fe200000 {
682 compatible = "qcom,pil-q6v5-lpass";
683 reg = <0xfe200000 0x00100>,
Matt Wagantallc2bbdc32012-03-21 19:44:50 -0700684 <0xfd485100 0x00010>;
Matt Wagantall1f168152012-09-25 13:26:47 -0700685 reg-names = "qdsp6_base", "halt_base";
Stephen Boyd1be799e2012-10-17 15:50:42 -0700686 interrupts = <0 162 1>;
Matt Wagantallc2bbdc32012-03-21 19:44:50 -0700687
Matt Wagantall6e6b8cd2012-05-24 12:42:24 -0700688 qcom,firmware-name = "adsp";
Matt Wagantallc2bbdc32012-03-21 19:44:50 -0700689 };
Tianyi Gouc1e049f82011-11-23 14:20:16 -0800690
Joonwoo Park7ecf08d2012-08-17 11:35:12 -0700691 qcom,msm-adsp-loader {
692 compatible = "qcom,adsp-loader";
693 };
694
Phani Kumar Uppalapati87841c82012-06-14 21:28:43 -0700695 qcom,msm-pcm {
696 compatible = "qcom,msm-pcm-dsp";
697 };
Phani Kumar Uppalapatic6651692012-06-14 20:33:09 -0700698
Phani Kumar Uppalapati87841c82012-06-14 21:28:43 -0700699 qcom,msm-pcm-routing {
700 compatible = "qcom,msm-pcm-routing";
701 };
Phani Kumar Uppalapatic6651692012-06-14 20:33:09 -0700702
Phani Kumar Uppalapati87841c82012-06-14 21:28:43 -0700703 qcom,msm-pcm-lpa {
704 compatible = "qcom,msm-pcm-lpa";
705 };
Phani Kumar Uppalapatic6651692012-06-14 20:33:09 -0700706
Harmandeep Singha3453a72012-07-03 12:31:09 -0700707 qcom,msm-compr-dsp {
708 compatible = "qcom,msm-compr-dsp";
709 };
710
Phani Kumar Uppalapati87841c82012-06-14 21:28:43 -0700711 qcom,msm-voip-dsp {
712 compatible = "qcom,msm-voip-dsp";
713 };
Phani Kumar Uppalapatic6651692012-06-14 20:33:09 -0700714
Phani Kumar Uppalapati9fbe9462012-08-24 15:09:36 -0700715 qcom,msm-pcm-voice {
716 compatible = "qcom,msm-pcm-voice";
717 };
718
Phani Kumar Uppalapati87841c82012-06-14 21:28:43 -0700719 qcom,msm-stub-codec {
720 compatible = "qcom,msm-stub-codec";
721 };
Phani Kumar Uppalapatic6651692012-06-14 20:33:09 -0700722
Phani Kumar Uppalapati87841c82012-06-14 21:28:43 -0700723 qcom,msm-dai-fe {
724 compatible = "qcom,msm-dai-fe";
725 };
Phani Kumar Uppalapatic6651692012-06-14 20:33:09 -0700726
Phani Kumar Uppalapati580884a2012-09-24 19:40:27 -0700727 qcom,msm-pcm-afe {
728 compatible = "qcom,msm-pcm-afe";
729 };
730
Harmandeep Singh4be68502012-10-01 18:59:04 -0700731 qcom,msm-dai-q6-hdmi {
732 compatible = "qcom,msm-dai-q6-hdmi";
733 qcom,msm-dai-q6-dev-id = <8>;
734 };
735
Joonwoo Park6572ac52012-07-10 17:17:00 -0700736 qcom,msm-dai-q6 {
737 compatible = "qcom,msm-dai-q6";
738 qcom,msm-dai-q6-sb-0-rx {
739 compatible = "qcom,msm-dai-q6-dev";
740 qcom,msm-dai-q6-dev-id = <16384>;
741 };
742
743 qcom,msm-dai-q6-sb-0-tx {
744 compatible = "qcom,msm-dai-q6-dev";
745 qcom,msm-dai-q6-dev-id = <16385>;
746 };
Phani Kumar Uppalapati1d303092012-09-24 19:55:56 -0700747
748 qcom,msm-dai-q6-bt-sco-rx {
749 compatible = "qcom,msm-dai-q6-dev";
750 qcom,msm-dai-q6-dev-id = <12288>;
751 };
752
753 qcom,msm-dai-q6-bt-sco-tx {
754 compatible = "qcom,msm-dai-q6-dev";
755 qcom,msm-dai-q6-dev-id = <12289>;
756 };
757
Phani Kumar Uppalapatibebe7382012-10-08 19:19:01 -0700758 qcom,msm-dai-q6-int-fm-rx {
759 compatible = "qcom,msm-dai-q6-dev";
760 qcom,msm-dai-q6-dev-id = <12292>;
761 };
762
763 qcom,msm-dai-q6-int-fm-tx {
764 compatible = "qcom,msm-dai-q6-dev";
765 qcom,msm-dai-q6-dev-id = <12293>;
766 };
767
Phani Kumar Uppalapati1d303092012-09-24 19:55:56 -0700768 qcom,msm-dai-q6-be-afe-pcm-rx {
769 compatible = "qcom,msm-dai-q6-dev";
770 qcom,msm-dai-q6-dev-id = <224>;
771 };
772
773 qcom,msm-dai-q6-be-afe-pcm-tx {
774 compatible = "qcom,msm-dai-q6-dev";
775 qcom,msm-dai-q6-dev-id = <225>;
776 };
777
778 qcom,msm-dai-q6-afe-proxy-rx {
779 compatible = "qcom,msm-dai-q6-dev";
780 qcom,msm-dai-q6-dev-id = <241>;
781 };
782
783 qcom,msm-dai-q6-afe-proxy-tx {
784 compatible = "qcom,msm-dai-q6-dev";
785 qcom,msm-dai-q6-dev-id = <240>;
786 };
Joonwoo Park6572ac52012-07-10 17:17:00 -0700787 };
788
Phani Kumar Uppalapati87841c82012-06-14 21:28:43 -0700789 qcom,msm-auxpcm {
790 compatible = "qcom,msm-auxpcm-resource";
791 qcom,msm-cpudai-auxpcm-clk = "pcm_clk";
792 qcom,msm-cpudai-auxpcm-mode = <0>;
793 qcom,msm-cpudai-auxpcm-sync = <1>;
794 qcom,msm-cpudai-auxpcm-frame = <5>;
795 qcom,msm-cpudai-auxpcm-quant = <2>;
796 qcom,msm-cpudai-auxpcm-slot = <1>;
797 qcom,msm-cpudai-auxpcm-data = <0>;
798 qcom,msm-cpudai-auxpcm-pcm-clk-rate = <2048000>;
Phani Kumar Uppalapatic6651692012-06-14 20:33:09 -0700799
Phani Kumar Uppalapati87841c82012-06-14 21:28:43 -0700800 qcom,msm-auxpcm-rx {
801 qcom,msm-auxpcm-dev-id = <4106>;
802 compatible = "qcom,msm-auxpcm-dev";
803 };
Phani Kumar Uppalapatic6651692012-06-14 20:33:09 -0700804
Phani Kumar Uppalapati87841c82012-06-14 21:28:43 -0700805 qcom,msm-auxpcm-tx {
806 qcom,msm-auxpcm-dev-id = <4107>;
807 compatible = "qcom,msm-auxpcm-dev";
808 };
809 };
810
811 qcom,msm-pcm-hostless {
812 compatible = "qcom,msm-pcm-hostless";
813 };
Phani Kumar Uppalapatic6651692012-06-14 20:33:09 -0700814
Phani Kumar Uppalapati8b3a1bb2012-06-26 19:56:58 -0700815 qcom,msm-ocmem-audio {
816 compatible = "qcom,msm-ocmem-audio";
Gagan Macb2372ae2012-08-20 19:24:32 -0600817 qcom,msm-bus,name = "audio-ocmem";
818 qcom,msm-bus,num-cases = <2>;
819 qcom,msm-bus,active-only = <0>;
820 qcom,msm-bus,num-paths = <1>;
821 qcom,msm-bus,vectors-KBps =
Phani Kumar Uppalapati31492952012-09-25 20:25:53 -0700822 <11 604 0 0>,
Gagan Macb2372ae2012-08-20 19:24:32 -0600823 <11 604 32506 32506>;
Phani Kumar Uppalapati8b3a1bb2012-06-26 19:56:58 -0700824 };
825
Matt Wagantall4e2599e2012-03-21 22:31:35 -0700826 qcom,mss@fc880000 {
827 compatible = "qcom,pil-q6v5-mss";
828 reg = <0xfc880000 0x100>,
829 <0xfd485000 0x400>,
830 <0xfc820000 0x020>,
Matt Wagantall16bc5cc2012-08-09 21:33:23 -0700831 <0xfc401680 0x004>,
832 <0xfc980008 0x004>;
Matt Wagantall1f168152012-09-25 13:26:47 -0700833 reg-names = "qdsp6_base", "halt_base", "rmb_base",
834 "restart_reg", "clamp_reg";
835
Matt Wagantall4e2599e2012-03-21 22:31:35 -0700836 vdd_mss-supply = <&pm8841_s3>;
837
838 qcom,firmware-name = "mba";
839 qcom,pil-self-auth = <1>;
840 };
841
Matt Wagantalle6e00d52012-03-08 17:39:07 -0800842 qcom,mba@fc820000 {
843 compatible = "qcom,pil-mba";
844 reg = <0xfc820000 0x0020>,
845 <0x0d1fc000 0x4000>;
Matt Wagantall1f168152012-09-25 13:26:47 -0700846 reg-names = "rmb_base", "metadata_base";
Stephen Boyd1be799e2012-10-17 15:50:42 -0700847 interrupts = <0 24 1>;
Matt Wagantalle6e00d52012-03-08 17:39:07 -0800848
849 qcom,firmware-name = "modem";
850 qcom,depends-on = "mba";
851 };
852
Tianyi Gouc1e049f82011-11-23 14:20:16 -0800853 qcom,pronto@fb21b000 {
854 compatible = "qcom,pil-pronto";
855 reg = <0xfb21b000 0x3000>,
856 <0xfc401700 0x4>,
857 <0xfd485300 0xc>;
Matt Wagantall1f168152012-09-25 13:26:47 -0700858 reg-names = "pmu_base", "clk_base", "halt_base";
Stephen Boyd1be799e2012-10-17 15:50:42 -0700859 interrupts = <0 149 1>;
Tianyi Gouc1e049f82011-11-23 14:20:16 -0800860 vdd_pronto_pll-supply = <&pm8941_l12>;
861
862 qcom,firmware-name = "wcnss";
863 };
Naveen Ramaraj51f5e8b2012-04-09 15:58:40 -0700864
Sameer Thalappil37c27af2012-09-05 13:33:06 -0700865 qcom,wcnss-wlan@fb000000 {
866 compatible = "qcom,wcnss_wlan";
867 reg = <0xfb000000 0x280000>;
868 reg-names = "wcnss_mmio";
869 interrupts = <0 145 0 0 146 0>;
870 interrupt-names = "wcnss_wlantx_irq", "wcnss_wlanrx_irq";
871
872 qcom,pronto-vddmx-supply = <&pm8841_s1>;
873 qcom,pronto-vddcx-supply = <&pm8841_s2>;
874 qcom,pronto-vddpx-supply = <&pm8941_s3>;
875 qcom,iris-vddxo-supply = <&pm8941_l6>;
876 qcom,iris-vddrfa-supply = <&pm8941_l11>;
877 qcom,iris-vddpa-supply = <&pm8941_l19>;
878 qcom,iris-vdddig-supply = <&pm8941_l3>;
879
880 gpios = <&msmgpio 36 0>, <&msmgpio 37 0>, <&msmgpio 38 0>, <&msmgpio 39 0>, <&msmgpio 40 0>;
881 qcom,has_48mhz_xo;
882 qcom,has_pronto_hw;
883 };
884
Naveen Ramaraj51f5e8b2012-04-09 15:58:40 -0700885 qcom,ocmem@fdd00000 {
Naveen Ramaraj94455a42012-07-05 16:01:40 -0700886 compatible = "qcom,msm-ocmem";
887 reg = <0xfdd00000 0x2000>,
888 <0xfdd02000 0x2000>,
889 <0xfe039000 0x400>,
890 <0xfec00000 0x180000>;
891 reg-names = "ocmem_ctrl_physical", "dm_ctrl_physical", "br_ctrl_physical", "ocmem_physical";
892 interrupts = <0 76 0 0 77 0>;
893 interrupt-names = "ocmem_irq", "dm_irq";
894 qcom,ocmem-num-regions = <0x3>;
Naveen Ramarajba3a6262012-08-02 17:14:27 -0700895 qcom,resource-type = <0x706d636f>;
Naveen Ramaraj94455a42012-07-05 16:01:40 -0700896 #address-cells = <1>;
897 #size-cells = <1>;
898 ranges = <0x0 0xfec00000 0x180000>;
899
900 partition@0 {
901 reg = <0x0 0x100000>;
902 qcom,ocmem-part-name = "graphics";
903 qcom,ocmem-part-min = <0x80000>;
904 };
905
906 partition@80000 {
907 reg = <0x80000 0xA0000>;
908 qcom,ocmem-part-name = "lp_audio";
909 qcom,ocmem-part-min = <0xA0000>;
910 };
911
912 partition@E0000 {
913 reg = <0x120000 0x20000>;
Naveen Ramarajcc4ec152012-05-14 09:55:29 -0700914 qcom,ocmem-part-name = "other_os";
Naveen Ramaraj94455a42012-07-05 16:01:40 -0700915 qcom,ocmem-part-min = <0x20000>;
916 };
917
918 partition@100000 {
919 reg = <0x100000 0x80000>;
920 qcom,ocmem-part-name = "video";
921 qcom,ocmem-part-min = <0x55000>;
922 };
923
924 partition@140000 {
925 reg = <0x140000 0x40000>;
926 qcom,ocmem-part-name = "sensors";
927 qcom,ocmem-part-min = <0x40000>;
928 };
Naveen Ramaraj51f5e8b2012-04-09 15:58:40 -0700929 };
Mahesh Sivasubramanian3f0d0c72012-05-04 17:35:55 -0600930
Varad Deshmukh18057ed2012-07-03 16:34:53 -0700931 rpm_bus: qcom,rpm-smd {
Mahesh Sivasubramanian3f0d0c72012-05-04 17:35:55 -0600932 compatible = "qcom,rpm-smd";
933 rpm-channel-name = "rpm_requests";
934 rpm-channel-type = <15>; /* SMD_APPS_RPM */
935 };
Hariprasad Dhalinarasimhade991f02012-05-31 13:15:51 -0700936
937 qcom,msm-rng@f9bff000 {
938 compatible = "qcom,msm-rng";
939 reg = <0xf9bff000 0x200>;
940 };
Ramesh Masavarapufb1f01e2012-06-14 09:40:40 -0700941
942 qcom,qseecom@fe806000 {
943 compatible = "qcom,qseecom";
Gagan Macb2372ae2012-08-20 19:24:32 -0600944 qcom,msm-bus,name = "qseecom-noc";
945 qcom,msm-bus,num-cases = <4>;
946 qcom,msm-bus,active-only = <0>;
947 qcom,msm-bus,num-paths = <1>;
948 qcom,msm-bus,vectors-KBps =
Ramesh Masavarapu4e7b67d2012-09-14 12:12:23 -0700949 <55 512 0 0>,
Gagan Macb2372ae2012-08-20 19:24:32 -0600950 <55 512 3936000 393600>,
951 <55 512 3936000 393600>,
952 <55 512 3936000 393600>;
Ramesh Masavarapufb1f01e2012-06-14 09:40:40 -0700953 };
Adrian Salido-Moreno5ef3ac02012-05-14 18:40:47 -0700954
Hanumant72aec702012-06-25 11:51:07 -0700955 qcom,wdt@f9017000 {
956 compatible = "qcom,msm-watchdog";
957 reg = <0xf9017000 0x1000>;
958 interrupts = <0 3 0 0 4 0>;
959 qcom,bark-time = <11000>;
960 qcom,pet-time = <10000>;
961 qcom,ipi-ping = <1>;
962 };
Hariprasad Dhalinarasimha0fc258f2012-07-05 13:01:29 -0700963
Ramesh Masavarapu00847832012-09-12 13:57:37 -0700964 qcom,tz-log@fc03000 {
Hariprasad Dhalinarasimha0fc258f2012-07-05 13:01:29 -0700965 compatible = "qcom,tz-log";
Ramesh Masavarapu00847832012-09-12 13:57:37 -0700966 reg = <0x0fc03000 0x1000>;
Hariprasad Dhalinarasimha0fc258f2012-07-05 13:01:29 -0700967 };
Tianyi Gou828798d2012-05-02 21:12:38 -0700968
969 qcom,venus@fdce0000 {
970 compatible = "qcom,pil-venus";
971 reg = <0xfdce0000 0x4000>,
972 <0xfdc80208 0x8>;
Matt Wagantall1f168152012-09-25 13:26:47 -0700973 reg-names = "wrapper_base", "vbif_base";
Tianyi Gou828798d2012-05-02 21:12:38 -0700974 vdd-supply = <&gdsc_venus>;
975
976 qcom,firmware-name = "venus";
977 qcom,firmware-min-paddr = <0xF500000>;
978 qcom,firmware-max-paddr = <0xFA00000>;
979 };
Siddartha Mohanadoss05a6e382012-05-14 15:13:37 -0700980
Stepan Moskovchenkoc79a7382012-07-19 17:24:32 -0700981 qcom,cache_erp {
982 compatible = "qcom,cache_erp";
983 interrupts = <1 9 0>, <0 2 0>;
984 interrupt-names = "l1_irq", "l2_irq";
985 };
986
Stepan Moskovchenko81f347d2012-09-12 18:53:21 -0700987 qcom,cache_dump {
988 compatible = "qcom,cache_dump";
989 qcom,l1-dump-size = <0x100000>;
990 qcom,l2-dump-size = <0x500000>;
991 qcom,memory-reservation-type = "EBI1";
992 qcom,memory-reservation-size = <0x600000>; /* 6M EBI1 buffer */
993 };
994
Siddartha Mohanadoss05a6e382012-05-14 15:13:37 -0700995 tsens@fc4a8000 {
996 compatible = "qcom,msm-tsens";
997 reg = <0xfc4a8000 0x2000>,
Siddartha Mohanadoss18c1edd2012-09-11 11:49:21 -0700998 <0xfc4b8000 0x1000>;
Siddartha Mohanadoss05a6e382012-05-14 15:13:37 -0700999 reg-names = "tsens_physical", "tsens_eeprom_physical";
1000 interrupts = <0 184 0>;
Siddartha Mohanadossf105cc02012-10-16 10:40:40 -07001001 qcom,calibration-less-mode;
Siddartha Mohanadoss05a6e382012-05-14 15:13:37 -07001002 qcom,sensors = <11>;
Siddartha Mohanadoss205bce62012-07-27 17:17:18 -07001003 qcom,slope = <3200 3200 3200 3200 3200 3200 3200 3200 3200
1004 3200 3200>;
Siddartha Mohanadoss05a6e382012-05-14 15:13:37 -07001005 };
Laura Abbottf7e44042012-06-22 12:50:32 -07001006
1007 qcom,msm-rtb {
1008 compatible = "qcom,msm-rtb";
1009 qcom,memory-reservation-type = "EBI1";
1010 qcom,memory-reservation-size = <0x100000>; /* 1M EBI1 buffer */
1011 };
Mona Hossainb43e94b2012-05-07 08:52:06 -07001012
1013 qcom,qcedev@fd440000 {
1014 compatible = "qcom,qcedev";
1015 reg = <0xfd440000 0x20000>,
1016 <0xfd444000 0x8000>;
Ramesh Masavarapu97ad00d2012-08-06 16:47:26 -07001017 reg-names = "crypto-base","crypto-bam-base";
Ramesh Masavarapu12759ad2012-09-06 20:11:05 -07001018 interrupts = <0 236 0>;
1019 qcom,bam-pipe-pair = <1>;
Mona Hossainb43e94b2012-05-07 08:52:06 -07001020 };
1021
1022 qcom,qcrypto@fd444000 {
1023 compatible = "qcom,qcrypto";
1024 reg = <0xfd440000 0x20000>,
1025 <0xfd444000 0x8000>;
Ramesh Masavarapu97ad00d2012-08-06 16:47:26 -07001026 reg-names = "crypto-base","crypto-bam-base";
Ramesh Masavarapu12759ad2012-09-06 20:11:05 -07001027 interrupts = <0 236 0>;
1028 qcom,bam-pipe-pair = <2>;
Mona Hossainb43e94b2012-05-07 08:52:06 -07001029 };
Shimrit Malichi57ae1492012-08-06 14:03:45 +03001030
1031 qcom,usbbam@f9304000 {
1032 compatible = "qcom,usb-bam-msm";
Manu Gautam6afd5872012-07-25 09:16:55 +05301033 reg = <0xf9304000 0x5000>,
Manu Gautam4658d892012-08-20 18:24:52 -07001034 <0xf9a44000 0x11000>,
1035 <0xf92f880c 0x4>;
1036 reg-names = "ssusb", "hsusb", "qscratch_ram1_reg";
Manu Gautam6afd5872012-07-25 09:16:55 +05301037 interrupts = <0 132 0 0 135 0>;
1038 interrupt-names = "ssusb", "hsusb";
Shimrit Malichi57ae1492012-08-06 14:03:45 +03001039 qcom,usb-active-bam = <0>;
Manu Gautam6afd5872012-07-25 09:16:55 +05301040 qcom,usb-total-bam-num = <2>;
Shimrit Malichi57ae1492012-08-06 14:03:45 +03001041 qcom,usb-bam-num-pipes = <16>;
1042 qcom,usb-base-address = <0xf9200000>;
Manu Gautamd4fa0022012-08-28 13:16:36 -07001043 qcom,ignore-core-reset-ack;
Shimrit Malichi57ae1492012-08-06 14:03:45 +03001044
1045 qcom,pipe1 {
1046 label = "usb-to-peri-qdss-dwc3";
1047 qcom,usb-bam-type = <0>;
Manu Gautam6afd5872012-07-25 09:16:55 +05301048 qcom,usb-bam-mem-type = <1>;
Shimrit Malichi57ae1492012-08-06 14:03:45 +03001049 qcom,src-bam-physical-address = <0>;
1050 qcom,src-bam-pipe-index = <0>;
1051 qcom,dst-bam-physical-address = <0>;
1052 qcom,dst-bam-pipe-index = <0>;
1053 qcom,data-fifo-offset = <0>;
1054 qcom,data-fifo-size = <0>;
1055 qcom,descriptor-fifo-offset = <0>;
1056 qcom,descriptor-fifo-size = <0>;
1057 };
1058
1059 qcom,pipe2 {
1060 label = "peri-to-usb-qdss-dwc3";
1061 qcom,usb-bam-type = <0>;
Manu Gautam6afd5872012-07-25 09:16:55 +05301062 qcom,usb-bam-mem-type = <1>;
Shimrit Malichi57ae1492012-08-06 14:03:45 +03001063 qcom,src-bam-physical-address = <0xfc37C000>;
1064 qcom,src-bam-pipe-index = <0>;
1065 qcom,dst-bam-physical-address = <0xf9304000>;
1066 qcom,dst-bam-pipe-index = <2>;
1067 qcom,data-fifo-offset = <0xf0000>;
Manu Gautam9c70c892012-10-19 16:34:26 +05301068 qcom,data-fifo-size = <0x1800>;
Shimrit Malichi57ae1492012-08-06 14:03:45 +03001069 qcom,descriptor-fifo-offset = <0xf4000>;
1070 qcom,descriptor-fifo-size = <0x1400>;
1071 };
Manu Gautam6afd5872012-07-25 09:16:55 +05301072
1073 qcom,pipe3 {
1074 label = "usb-to-peri-qdss-hsusb";
1075 qcom,usb-bam-type = <1>;
Manu Gautam4658d892012-08-20 18:24:52 -07001076 qcom,usb-bam-mem-type = <1>;
Manu Gautam6afd5872012-07-25 09:16:55 +05301077 qcom,src-bam-physical-address = <0>;
1078 qcom,src-bam-pipe-index = <0>;
1079 qcom,dst-bam-physical-address = <0>;
1080 qcom,dst-bam-pipe-index = <0>;
1081 qcom,data-fifo-offset = <0>;
1082 qcom,data-fifo-size = <0>;
1083 qcom,descriptor-fifo-offset = <0>;
1084 qcom,descriptor-fifo-size = <0>;
1085 };
1086
1087 qcom,pipe4 {
1088 label = "peri-to-usb-qdss-hsusb";
1089 qcom,usb-bam-type = <1>;
Manu Gautam4658d892012-08-20 18:24:52 -07001090 qcom,usb-bam-mem-type = <1>;
Manu Gautam6afd5872012-07-25 09:16:55 +05301091 qcom,src-bam-physical-address = <0xfc37c000>;
1092 qcom,src-bam-pipe-index = <0>;
1093 qcom,dst-bam-physical-address = <0xf9a44000>;
1094 qcom,dst-bam-pipe-index = <2>;
Manu Gautam4658d892012-08-20 18:24:52 -07001095 qcom,data-fifo-offset = <0xf4000>;
1096 qcom,data-fifo-size = <0x1000>;
1097 qcom,descriptor-fifo-offset = <0xf5000>;
1098 qcom,descriptor-fifo-size = <0x400>;
Manu Gautam6afd5872012-07-25 09:16:55 +05301099 };
Shimrit Malichi57ae1492012-08-06 14:03:45 +03001100 };
Eugene Seahce52ef22012-07-12 12:40:38 -06001101
1102 qcom,msm-thermal {
1103 compatible = "qcom,msm-thermal";
1104 qcom,sensor-id = <0>;
1105 qcom,poll-ms = <250>;
1106 qcom,limit-temp = <60>;
1107 qcom,temp-hysteresis = <10>;
1108 qcom,freq-step = <2>;
1109 };
Anirudh Ghayalb70740f2012-08-01 09:00:49 +05301110
Jeff Hugo110bced2012-08-21 14:10:27 -06001111 qcom,bam_dmux@fc834000 {
1112 compatible = "qcom,bam_dmux";
1113 reg = <0xfc834000 0x7000>;
1114 interrupts = <0 29 1>;
1115 };
Pushkar Joshie54e93a2012-09-27 12:28:20 -07001116
1117 qcom,msm-wdog-debug@fc401000 {
1118 compatible = "qcom,msm-wdog-debug";
1119 reg = <0xfc401000 0x1000>;
1120 };
1121
Sathish Ambley4df614c2011-10-07 16:30:46 -07001122};
Varad Deshmukh18057ed2012-07-03 16:34:53 -07001123
1124/include/ "msm-pm8x41-rpm-regulator.dtsi"
1125/include/ "msm-pm8841.dtsi"
1126/include/ "msm-pm8941.dtsi"
1127/include/ "msm8974-regulator.dtsi"
Michael Bohanee1f8fe2012-08-03 18:32:16 -07001128/include/ "msm8974-clock.dtsi"