blob: 7c2073d1e5f30d40e91a4c7894cefade45fa098a [file] [log] [blame]
Kiran Kandi3426e512011-09-13 22:50:10 -07001/* Copyright (c) 2011-2012, Code Aurora Forum. All rights reserved.
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002 *
3 * This program is free software; you can redistribute it and/or modify
4 * it under the terms of the GNU General Public License version 2 and
5 * only version 2 as published by the Free Software Foundation.
6 *
7 * This program is distributed in the hope that it will be useful,
8 * but WITHOUT ANY WARRANTY; without even the implied warranty of
9 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
10 * GNU General Public License for more details.
11 */
12#include <linux/module.h>
13#include <linux/init.h>
Bradley Rubin229c6a52011-07-12 16:18:48 -070014#include <linux/firmware.h>
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070015#include <linux/slab.h>
16#include <linux/platform_device.h>
Santosh Mardie15e2302011-11-15 10:39:23 +053017#include <linux/device.h>
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070018#include <linux/printk.h>
19#include <linux/ratelimit.h>
Bradley Rubincb3950a2011-08-18 13:07:26 -070020#include <linux/debugfs.h>
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070021#include <linux/mfd/wcd9310/core.h>
22#include <linux/mfd/wcd9310/registers.h>
Patrick Lai3043fba2011-08-01 14:15:57 -070023#include <linux/mfd/wcd9310/pdata.h>
Santosh Mardie15e2302011-11-15 10:39:23 +053024#include <sound/pcm.h>
25#include <sound/pcm_params.h>
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070026#include <sound/soc.h>
27#include <sound/soc-dapm.h>
28#include <sound/tlv.h>
29#include <linux/bitops.h>
30#include <linux/delay.h>
31#include "wcd9310.h"
32
Bhalchandra Gajare9a901fd2011-08-01 10:07:15 -070033#define WCD9310_RATES (SNDRV_PCM_RATE_8000|SNDRV_PCM_RATE_16000|\
34 SNDRV_PCM_RATE_32000|SNDRV_PCM_RATE_48000)
35
36#define NUM_DECIMATORS 10
37#define NUM_INTERPOLATORS 7
38#define BITS_PER_REG 8
39#define TABLA_RX_DAI_ID 1
40#define TABLA_TX_DAI_ID 2
Bhalchandra Gajare19d9c132011-11-18 14:57:08 -080041#define TABLA_CFILT_FAST_MODE 0x00
42#define TABLA_CFILT_SLOW_MODE 0x40
Patrick Lai64b43262011-12-06 17:29:15 -080043#define MBHC_FW_READ_ATTEMPTS 15
44#define MBHC_FW_READ_TIMEOUT 2000000
Bhalchandra Gajare9a901fd2011-08-01 10:07:15 -070045
Patrick Lai49efeac2011-11-03 11:01:12 -070046#define TABLA_JACK_MASK (SND_JACK_HEADSET | SND_JACK_OC_HPHL | SND_JACK_OC_HPHR)
47
Santosh Mardie15e2302011-11-15 10:39:23 +053048#define TABLA_I2S_MASTER_MODE_MASK 0x08
49
Patrick Laic7cae882011-11-18 11:52:49 -080050#define TABLA_OCP_ATTEMPT 1
51
Joonwoo Park0976d012011-12-22 11:48:18 -080052#define TABLA_MCLK_RATE_12288KHZ 12288000
53#define TABLA_MCLK_RATE_9600KHZ 9600000
54
Joonwoo Parkf4267c22012-01-10 13:25:24 -080055#define TABLA_FAKE_INS_THRESHOLD_MS 2500
Joonwoo Park6b9b03f2012-01-23 18:48:54 -080056#define TABLA_FAKE_REMOVAL_MIN_PERIOD_MS 50
Joonwoo Parkf4267c22012-01-10 13:25:24 -080057
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070058static const DECLARE_TLV_DB_SCALE(digital_gain, 0, 1, 0);
59static const DECLARE_TLV_DB_SCALE(line_gain, 0, 7, 1);
60static const DECLARE_TLV_DB_SCALE(analog_gain, 0, 25, 1);
61
62enum tabla_bandgap_type {
63 TABLA_BANDGAP_OFF = 0,
64 TABLA_BANDGAP_AUDIO_MODE,
65 TABLA_BANDGAP_MBHC_MODE,
66};
67
Bhalchandra Gajare02d90cd2011-09-30 16:14:00 -070068struct mbhc_micbias_regs {
69 u16 cfilt_val;
70 u16 cfilt_ctl;
71 u16 mbhc_reg;
72 u16 int_rbias;
73 u16 ctl_reg;
Bhalchandra Gajare19d9c132011-11-18 14:57:08 -080074 u8 cfilt_sel;
Bhalchandra Gajare02d90cd2011-09-30 16:14:00 -070075};
76
Ben Romberger1f045a72011-11-04 10:14:57 -070077/* Codec supports 2 IIR filters */
78enum {
79 IIR1 = 0,
80 IIR2,
81 IIR_MAX,
82};
83/* Codec supports 5 bands */
84enum {
85 BAND1 = 0,
86 BAND2,
87 BAND3,
88 BAND4,
89 BAND5,
90 BAND_MAX,
91};
92
Joonwoo Parka9444452011-12-08 18:48:27 -080093/* Flags to track of PA and DAC state.
94 * PA and DAC should be tracked separately as AUXPGA loopback requires
95 * only PA to be turned on without DAC being on. */
96enum tabla_priv_ack_flags {
97 TABLA_HPHL_PA_OFF_ACK = 0,
98 TABLA_HPHR_PA_OFF_ACK,
99 TABLA_HPHL_DAC_OFF_ACK,
100 TABLA_HPHR_DAC_OFF_ACK
101};
102
Joonwoo Park0976d012011-12-22 11:48:18 -0800103/* Data used by MBHC */
104struct mbhc_internal_cal_data {
105 u16 dce_z;
106 u16 dce_mb;
107 u16 sta_z;
108 u16 sta_mb;
Joonwoo Park433149a2012-01-11 09:53:54 -0800109 u32 t_sta_dce;
Joonwoo Park0976d012011-12-22 11:48:18 -0800110 u32 t_dce;
111 u32 t_sta;
112 u32 micb_mv;
113 u16 v_ins_hu;
114 u16 v_ins_h;
115 u16 v_b1_hu;
116 u16 v_b1_h;
117 u16 v_b1_huc;
118 u16 v_brh;
119 u16 v_brl;
120 u16 v_no_mic;
Joonwoo Park0976d012011-12-22 11:48:18 -0800121 u8 npoll;
122 u8 nbounce_wait;
123};
124
Joonwoo Park6c1ebb62012-01-16 19:08:43 -0800125struct tabla_reg_address {
126 u16 micb_4_ctl;
127 u16 micb_4_int_rbias;
128 u16 micb_4_mbhc;
129};
130
Bradley Rubin229c6a52011-07-12 16:18:48 -0700131struct tabla_priv {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700132 struct snd_soc_codec *codec;
Joonwoo Park6c1ebb62012-01-16 19:08:43 -0800133 struct tabla_reg_address reg_addr;
Joonwoo Park0976d012011-12-22 11:48:18 -0800134 u32 mclk_freq;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700135 u32 adc_count;
Patrick Lai3043fba2011-08-01 14:15:57 -0700136 u32 cfilt1_cnt;
137 u32 cfilt2_cnt;
138 u32 cfilt3_cnt;
Kiran Kandi6fae8bf2011-08-15 10:36:42 -0700139 u32 rx_bias_count;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700140 enum tabla_bandgap_type bandgap_type;
Kiran Kandi6fae8bf2011-08-15 10:36:42 -0700141 bool mclk_enabled;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700142 bool clock_active;
143 bool config_mode_active;
144 bool mbhc_polling_active;
Joonwoo Parkf4267c22012-01-10 13:25:24 -0800145 unsigned long mbhc_fake_ins_start;
Bradley Rubincb1e2732011-06-23 16:49:20 -0700146 int buttons_pressed;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700147
Joonwoo Park0976d012011-12-22 11:48:18 -0800148 enum tabla_micbias_num micbias;
149 /* void* calibration contains:
150 * struct tabla_mbhc_general_cfg generic;
151 * struct tabla_mbhc_plug_detect_cfg plug_det;
152 * struct tabla_mbhc_plug_type_cfg plug_type;
153 * struct tabla_mbhc_btn_detect_cfg btn_det;
154 * struct tabla_mbhc_imped_detect_cfg imped_det;
155 * Note: various size depends on btn_det->num_btn
156 */
157 void *calibration;
158 struct mbhc_internal_cal_data mbhc_data;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700159
Bradley Rubincb1e2732011-06-23 16:49:20 -0700160 struct snd_soc_jack *headset_jack;
161 struct snd_soc_jack *button_jack;
Bradley Rubin229c6a52011-07-12 16:18:48 -0700162
Patrick Lai3043fba2011-08-01 14:15:57 -0700163 struct tabla_pdata *pdata;
Bradley Rubina7096d02011-08-03 18:29:02 -0700164 u32 anc_slot;
Bradley Rubincb3950a2011-08-18 13:07:26 -0700165
166 bool no_mic_headset_override;
Bhalchandra Gajare0a792b12011-09-06 16:36:58 -0700167 /* Delayed work to report long button press */
168 struct delayed_work btn0_dwork;
Bhalchandra Gajare02d90cd2011-09-30 16:14:00 -0700169
170 struct mbhc_micbias_regs mbhc_bias_regs;
Bhalchandra Gajared9ebb6c2011-10-03 19:54:41 -0700171 u8 cfilt_k_value;
172 bool mbhc_micbias_switched;
Patrick Lai49efeac2011-11-03 11:01:12 -0700173
Joonwoo Parka9444452011-12-08 18:48:27 -0800174 /* track PA/DAC state */
175 unsigned long hph_pa_dac_state;
176
Santosh Mardie15e2302011-11-15 10:39:23 +0530177 /*track tabla interface type*/
178 u8 intf_type;
179
Patrick Lai49efeac2011-11-03 11:01:12 -0700180 u32 hph_status; /* track headhpone status */
181 /* define separate work for left and right headphone OCP to avoid
182 * additional checking on which OCP event to report so no locking
183 * to ensure synchronization is required
184 */
185 struct work_struct hphlocp_work; /* reporting left hph ocp off */
186 struct work_struct hphrocp_work; /* reporting right hph ocp off */
Joonwoo Park8b1f0982011-12-08 17:12:45 -0800187
Patrick Laic7cae882011-11-18 11:52:49 -0800188 u8 hphlocp_cnt; /* headphone left ocp retry */
189 u8 hphrocp_cnt; /* headphone right ocp retry */
Joonwoo Park0976d012011-12-22 11:48:18 -0800190
191 /* Callback function to enable MCLK */
192 int (*mclk_cb) (struct snd_soc_codec*, int);
Patrick Lai64b43262011-12-06 17:29:15 -0800193
194 /* Work to perform MBHC Firmware Read */
195 struct delayed_work mbhc_firmware_dwork;
196 const struct firmware *mbhc_fw;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700197};
198
Bradley Rubincb3950a2011-08-18 13:07:26 -0700199#ifdef CONFIG_DEBUG_FS
200struct tabla_priv *debug_tabla_priv;
201#endif
202
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700203static int tabla_codec_enable_charge_pump(struct snd_soc_dapm_widget *w,
204 struct snd_kcontrol *kcontrol, int event)
205{
206 struct snd_soc_codec *codec = w->codec;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700207
208 pr_debug("%s %d\n", __func__, event);
209 switch (event) {
210 case SND_SOC_DAPM_POST_PMU:
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700211 snd_soc_update_bits(codec, TABLA_A_CDC_CLK_OTHR_CTL, 0x01,
212 0x01);
213 snd_soc_update_bits(codec, TABLA_A_CDC_CLSG_CTL, 0x08, 0x08);
214 usleep_range(200, 200);
215 snd_soc_update_bits(codec, TABLA_A_CP_STATIC, 0x10, 0x00);
216 break;
217 case SND_SOC_DAPM_PRE_PMD:
218 snd_soc_update_bits(codec, TABLA_A_CDC_CLK_OTHR_RESET_CTL, 0x10,
219 0x10);
220 usleep_range(20, 20);
221 snd_soc_update_bits(codec, TABLA_A_CP_STATIC, 0x08, 0x08);
222 snd_soc_update_bits(codec, TABLA_A_CP_STATIC, 0x10, 0x10);
223 snd_soc_update_bits(codec, TABLA_A_CDC_CLSG_CTL, 0x08, 0x00);
224 snd_soc_update_bits(codec, TABLA_A_CDC_CLK_OTHR_CTL, 0x01,
225 0x00);
226 snd_soc_update_bits(codec, TABLA_A_CP_STATIC, 0x08, 0x00);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700227 break;
228 }
229 return 0;
230}
231
Bradley Rubina7096d02011-08-03 18:29:02 -0700232static int tabla_get_anc_slot(struct snd_kcontrol *kcontrol,
233 struct snd_ctl_elem_value *ucontrol)
234{
235 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
236 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
237 ucontrol->value.integer.value[0] = tabla->anc_slot;
238 return 0;
239}
240
241static int tabla_put_anc_slot(struct snd_kcontrol *kcontrol,
242 struct snd_ctl_elem_value *ucontrol)
243{
244 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
245 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
246 tabla->anc_slot = ucontrol->value.integer.value[0];
247 return 0;
248}
249
Kiran Kandid2d86b52011-09-09 17:44:28 -0700250static int tabla_pa_gain_get(struct snd_kcontrol *kcontrol,
251 struct snd_ctl_elem_value *ucontrol)
252{
253 u8 ear_pa_gain;
254 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
255
256 ear_pa_gain = snd_soc_read(codec, TABLA_A_RX_EAR_GAIN);
257
258 ear_pa_gain = ear_pa_gain >> 5;
259
260 if (ear_pa_gain == 0x00) {
261 ucontrol->value.integer.value[0] = 0;
262 } else if (ear_pa_gain == 0x04) {
263 ucontrol->value.integer.value[0] = 1;
264 } else {
265 pr_err("%s: ERROR: Unsupported Ear Gain = 0x%x\n",
266 __func__, ear_pa_gain);
267 return -EINVAL;
268 }
269
270 pr_debug("%s: ear_pa_gain = 0x%x\n", __func__, ear_pa_gain);
271
272 return 0;
273}
274
275static int tabla_pa_gain_put(struct snd_kcontrol *kcontrol,
276 struct snd_ctl_elem_value *ucontrol)
277{
278 u8 ear_pa_gain;
279 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
280
281 pr_debug("%s: ucontrol->value.integer.value[0] = %ld\n", __func__,
282 ucontrol->value.integer.value[0]);
283
284 switch (ucontrol->value.integer.value[0]) {
285 case 0:
286 ear_pa_gain = 0x00;
287 break;
288 case 1:
289 ear_pa_gain = 0x80;
290 break;
291 default:
292 return -EINVAL;
293 }
294
295 snd_soc_update_bits(codec, TABLA_A_RX_EAR_GAIN, 0xE0, ear_pa_gain);
296 return 0;
297}
298
Ben Romberger1f045a72011-11-04 10:14:57 -0700299static int tabla_get_iir_enable_audio_mixer(
300 struct snd_kcontrol *kcontrol,
301 struct snd_ctl_elem_value *ucontrol)
302{
303 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
304 int iir_idx = ((struct soc_multi_mixer_control *)
305 kcontrol->private_value)->reg;
306 int band_idx = ((struct soc_multi_mixer_control *)
307 kcontrol->private_value)->shift;
308
309 ucontrol->value.integer.value[0] =
310 snd_soc_read(codec, (TABLA_A_CDC_IIR1_CTL + 16 * iir_idx)) &
311 (1 << band_idx);
312
313 pr_debug("%s: IIR #%d band #%d enable %d\n", __func__,
314 iir_idx, band_idx,
315 (uint32_t)ucontrol->value.integer.value[0]);
316 return 0;
317}
318
319static int tabla_put_iir_enable_audio_mixer(
320 struct snd_kcontrol *kcontrol,
321 struct snd_ctl_elem_value *ucontrol)
322{
323 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
324 int iir_idx = ((struct soc_multi_mixer_control *)
325 kcontrol->private_value)->reg;
326 int band_idx = ((struct soc_multi_mixer_control *)
327 kcontrol->private_value)->shift;
328 int value = ucontrol->value.integer.value[0];
329
330 /* Mask first 5 bits, 6-8 are reserved */
331 snd_soc_update_bits(codec, (TABLA_A_CDC_IIR1_CTL + 16 * iir_idx),
332 (1 << band_idx), (value << band_idx));
333
334 pr_debug("%s: IIR #%d band #%d enable %d\n", __func__,
335 iir_idx, band_idx, value);
336 return 0;
337}
338static uint32_t get_iir_band_coeff(struct snd_soc_codec *codec,
339 int iir_idx, int band_idx,
340 int coeff_idx)
341{
342 /* Address does not automatically update if reading */
343 snd_soc_update_bits(codec,
344 (TABLA_A_CDC_IIR1_COEF_B1_CTL + 16 * iir_idx),
345 0x1F, band_idx * BAND_MAX + coeff_idx);
346
347 /* Mask bits top 2 bits since they are reserved */
348 return ((snd_soc_read(codec,
349 (TABLA_A_CDC_IIR1_COEF_B2_CTL + 16 * iir_idx)) << 24) |
350 (snd_soc_read(codec,
351 (TABLA_A_CDC_IIR1_COEF_B3_CTL + 16 * iir_idx)) << 16) |
352 (snd_soc_read(codec,
353 (TABLA_A_CDC_IIR1_COEF_B4_CTL + 16 * iir_idx)) << 8) |
354 (snd_soc_read(codec,
355 (TABLA_A_CDC_IIR1_COEF_B5_CTL + 16 * iir_idx)))) &
356 0x3FFFFFFF;
357}
358
359static int tabla_get_iir_band_audio_mixer(
360 struct snd_kcontrol *kcontrol,
361 struct snd_ctl_elem_value *ucontrol)
362{
363 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
364 int iir_idx = ((struct soc_multi_mixer_control *)
365 kcontrol->private_value)->reg;
366 int band_idx = ((struct soc_multi_mixer_control *)
367 kcontrol->private_value)->shift;
368
369 ucontrol->value.integer.value[0] =
370 get_iir_band_coeff(codec, iir_idx, band_idx, 0);
371 ucontrol->value.integer.value[1] =
372 get_iir_band_coeff(codec, iir_idx, band_idx, 1);
373 ucontrol->value.integer.value[2] =
374 get_iir_band_coeff(codec, iir_idx, band_idx, 2);
375 ucontrol->value.integer.value[3] =
376 get_iir_band_coeff(codec, iir_idx, band_idx, 3);
377 ucontrol->value.integer.value[4] =
378 get_iir_band_coeff(codec, iir_idx, band_idx, 4);
379
380 pr_debug("%s: IIR #%d band #%d b0 = 0x%x\n"
381 "%s: IIR #%d band #%d b1 = 0x%x\n"
382 "%s: IIR #%d band #%d b2 = 0x%x\n"
383 "%s: IIR #%d band #%d a1 = 0x%x\n"
384 "%s: IIR #%d band #%d a2 = 0x%x\n",
385 __func__, iir_idx, band_idx,
386 (uint32_t)ucontrol->value.integer.value[0],
387 __func__, iir_idx, band_idx,
388 (uint32_t)ucontrol->value.integer.value[1],
389 __func__, iir_idx, band_idx,
390 (uint32_t)ucontrol->value.integer.value[2],
391 __func__, iir_idx, band_idx,
392 (uint32_t)ucontrol->value.integer.value[3],
393 __func__, iir_idx, band_idx,
394 (uint32_t)ucontrol->value.integer.value[4]);
395 return 0;
396}
397
398static void set_iir_band_coeff(struct snd_soc_codec *codec,
399 int iir_idx, int band_idx,
400 int coeff_idx, uint32_t value)
401{
402 /* Mask top 3 bits, 6-8 are reserved */
403 /* Update address manually each time */
404 snd_soc_update_bits(codec,
405 (TABLA_A_CDC_IIR1_COEF_B1_CTL + 16 * iir_idx),
406 0x1F, band_idx * BAND_MAX + coeff_idx);
407
408 /* Mask top 2 bits, 7-8 are reserved */
409 snd_soc_update_bits(codec,
410 (TABLA_A_CDC_IIR1_COEF_B2_CTL + 16 * iir_idx),
411 0x3F, (value >> 24) & 0x3F);
412
413 /* Isolate 8bits at a time */
414 snd_soc_update_bits(codec,
415 (TABLA_A_CDC_IIR1_COEF_B3_CTL + 16 * iir_idx),
416 0xFF, (value >> 16) & 0xFF);
417
418 snd_soc_update_bits(codec,
419 (TABLA_A_CDC_IIR1_COEF_B4_CTL + 16 * iir_idx),
420 0xFF, (value >> 8) & 0xFF);
421
422 snd_soc_update_bits(codec,
423 (TABLA_A_CDC_IIR1_COEF_B5_CTL + 16 * iir_idx),
424 0xFF, value & 0xFF);
425}
426
427static int tabla_put_iir_band_audio_mixer(
428 struct snd_kcontrol *kcontrol,
429 struct snd_ctl_elem_value *ucontrol)
430{
431 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
432 int iir_idx = ((struct soc_multi_mixer_control *)
433 kcontrol->private_value)->reg;
434 int band_idx = ((struct soc_multi_mixer_control *)
435 kcontrol->private_value)->shift;
436
437 set_iir_band_coeff(codec, iir_idx, band_idx, 0,
438 ucontrol->value.integer.value[0]);
439 set_iir_band_coeff(codec, iir_idx, band_idx, 1,
440 ucontrol->value.integer.value[1]);
441 set_iir_band_coeff(codec, iir_idx, band_idx, 2,
442 ucontrol->value.integer.value[2]);
443 set_iir_band_coeff(codec, iir_idx, band_idx, 3,
444 ucontrol->value.integer.value[3]);
445 set_iir_band_coeff(codec, iir_idx, band_idx, 4,
446 ucontrol->value.integer.value[4]);
447
448 pr_debug("%s: IIR #%d band #%d b0 = 0x%x\n"
449 "%s: IIR #%d band #%d b1 = 0x%x\n"
450 "%s: IIR #%d band #%d b2 = 0x%x\n"
451 "%s: IIR #%d band #%d a1 = 0x%x\n"
452 "%s: IIR #%d band #%d a2 = 0x%x\n",
453 __func__, iir_idx, band_idx,
454 get_iir_band_coeff(codec, iir_idx, band_idx, 0),
455 __func__, iir_idx, band_idx,
456 get_iir_band_coeff(codec, iir_idx, band_idx, 1),
457 __func__, iir_idx, band_idx,
458 get_iir_band_coeff(codec, iir_idx, band_idx, 2),
459 __func__, iir_idx, band_idx,
460 get_iir_band_coeff(codec, iir_idx, band_idx, 3),
461 __func__, iir_idx, band_idx,
462 get_iir_band_coeff(codec, iir_idx, band_idx, 4));
463 return 0;
464}
465
Kiran Kandid2d86b52011-09-09 17:44:28 -0700466static const char *tabla_ear_pa_gain_text[] = {"POS_6_DB", "POS_2_DB"};
467static const struct soc_enum tabla_ear_pa_gain_enum[] = {
468 SOC_ENUM_SINGLE_EXT(2, tabla_ear_pa_gain_text),
469};
470
Santosh Mardi024010f2011-10-18 06:27:21 +0530471/*cut of frequency for high pass filter*/
472static const char *cf_text[] = {
473 "MIN_3DB_4Hz", "MIN_3DB_75Hz", "MIN_3DB_150Hz"
474};
475
476static const struct soc_enum cf_dec1_enum =
477 SOC_ENUM_SINGLE(TABLA_A_CDC_TX1_MUX_CTL, 4, 3, cf_text);
478
479static const struct soc_enum cf_dec2_enum =
480 SOC_ENUM_SINGLE(TABLA_A_CDC_TX2_MUX_CTL, 4, 3, cf_text);
481
482static const struct soc_enum cf_dec3_enum =
483 SOC_ENUM_SINGLE(TABLA_A_CDC_TX3_MUX_CTL, 4, 3, cf_text);
484
485static const struct soc_enum cf_dec4_enum =
486 SOC_ENUM_SINGLE(TABLA_A_CDC_TX4_MUX_CTL, 4, 3, cf_text);
487
488static const struct soc_enum cf_dec5_enum =
489 SOC_ENUM_SINGLE(TABLA_A_CDC_TX5_MUX_CTL, 4, 3, cf_text);
490
491static const struct soc_enum cf_dec6_enum =
492 SOC_ENUM_SINGLE(TABLA_A_CDC_TX6_MUX_CTL, 4, 3, cf_text);
493
494static const struct soc_enum cf_dec7_enum =
495 SOC_ENUM_SINGLE(TABLA_A_CDC_TX7_MUX_CTL, 4, 3, cf_text);
496
497static const struct soc_enum cf_dec8_enum =
498 SOC_ENUM_SINGLE(TABLA_A_CDC_TX8_MUX_CTL, 4, 3, cf_text);
499
500static const struct soc_enum cf_dec9_enum =
501 SOC_ENUM_SINGLE(TABLA_A_CDC_TX9_MUX_CTL, 4, 3, cf_text);
502
503static const struct soc_enum cf_dec10_enum =
504 SOC_ENUM_SINGLE(TABLA_A_CDC_TX10_MUX_CTL, 4, 3, cf_text);
505
506static const struct soc_enum cf_rxmix1_enum =
507 SOC_ENUM_SINGLE(TABLA_A_CDC_RX1_B4_CTL, 1, 3, cf_text);
508
509static const struct soc_enum cf_rxmix2_enum =
510 SOC_ENUM_SINGLE(TABLA_A_CDC_RX2_B4_CTL, 1, 3, cf_text);
511
512static const struct soc_enum cf_rxmix3_enum =
513 SOC_ENUM_SINGLE(TABLA_A_CDC_RX3_B4_CTL, 1, 3, cf_text);
514
515static const struct soc_enum cf_rxmix4_enum =
516 SOC_ENUM_SINGLE(TABLA_A_CDC_RX4_B4_CTL, 1, 3, cf_text);
517
518static const struct soc_enum cf_rxmix5_enum =
519 SOC_ENUM_SINGLE(TABLA_A_CDC_RX5_B4_CTL, 1, 3, cf_text)
520;
521static const struct soc_enum cf_rxmix6_enum =
522 SOC_ENUM_SINGLE(TABLA_A_CDC_RX6_B4_CTL, 1, 3, cf_text);
523
524static const struct soc_enum cf_rxmix7_enum =
525 SOC_ENUM_SINGLE(TABLA_A_CDC_RX7_B4_CTL, 1, 3, cf_text);
526
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700527static const struct snd_kcontrol_new tabla_snd_controls[] = {
Kiran Kandid2d86b52011-09-09 17:44:28 -0700528
529 SOC_ENUM_EXT("EAR PA Gain", tabla_ear_pa_gain_enum[0],
530 tabla_pa_gain_get, tabla_pa_gain_put),
531
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700532 SOC_SINGLE_TLV("LINEOUT1 Volume", TABLA_A_RX_LINE_1_GAIN, 0, 12, 1,
533 line_gain),
Bradley Rubin74a9b4a2011-06-13 15:03:43 -0700534 SOC_SINGLE_TLV("LINEOUT2 Volume", TABLA_A_RX_LINE_2_GAIN, 0, 12, 1,
535 line_gain),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700536 SOC_SINGLE_TLV("LINEOUT3 Volume", TABLA_A_RX_LINE_3_GAIN, 0, 12, 1,
537 line_gain),
Bradley Rubin74a9b4a2011-06-13 15:03:43 -0700538 SOC_SINGLE_TLV("LINEOUT4 Volume", TABLA_A_RX_LINE_4_GAIN, 0, 12, 1,
539 line_gain),
Bhalchandra Gajare0a8ad172011-08-12 13:32:22 -0700540 SOC_SINGLE_TLV("LINEOUT5 Volume", TABLA_A_RX_LINE_5_GAIN, 0, 12, 1,
541 line_gain),
Bradley Rubin74a9b4a2011-06-13 15:03:43 -0700542
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700543 SOC_SINGLE_TLV("HPHL Volume", TABLA_A_RX_HPH_L_GAIN, 0, 12, 1,
544 line_gain),
545 SOC_SINGLE_TLV("HPHR Volume", TABLA_A_RX_HPH_R_GAIN, 0, 12, 1,
546 line_gain),
547
Bradley Rubin410383f2011-07-22 13:44:23 -0700548 SOC_SINGLE_S8_TLV("RX1 Digital Volume", TABLA_A_CDC_RX1_VOL_CTL_B2_CTL,
549 -84, 40, digital_gain),
550 SOC_SINGLE_S8_TLV("RX2 Digital Volume", TABLA_A_CDC_RX2_VOL_CTL_B2_CTL,
551 -84, 40, digital_gain),
552 SOC_SINGLE_S8_TLV("RX3 Digital Volume", TABLA_A_CDC_RX3_VOL_CTL_B2_CTL,
553 -84, 40, digital_gain),
554 SOC_SINGLE_S8_TLV("RX4 Digital Volume", TABLA_A_CDC_RX4_VOL_CTL_B2_CTL,
555 -84, 40, digital_gain),
556 SOC_SINGLE_S8_TLV("RX5 Digital Volume", TABLA_A_CDC_RX5_VOL_CTL_B2_CTL,
557 -84, 40, digital_gain),
558 SOC_SINGLE_S8_TLV("RX6 Digital Volume", TABLA_A_CDC_RX6_VOL_CTL_B2_CTL,
559 -84, 40, digital_gain),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700560
Bradley Rubin410383f2011-07-22 13:44:23 -0700561 SOC_SINGLE_S8_TLV("DEC1 Volume", TABLA_A_CDC_TX1_VOL_CTL_GAIN, -84, 40,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700562 digital_gain),
Bradley Rubin410383f2011-07-22 13:44:23 -0700563 SOC_SINGLE_S8_TLV("DEC2 Volume", TABLA_A_CDC_TX2_VOL_CTL_GAIN, -84, 40,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700564 digital_gain),
Bradley Rubin410383f2011-07-22 13:44:23 -0700565 SOC_SINGLE_S8_TLV("DEC3 Volume", TABLA_A_CDC_TX3_VOL_CTL_GAIN, -84, 40,
566 digital_gain),
567 SOC_SINGLE_S8_TLV("DEC4 Volume", TABLA_A_CDC_TX4_VOL_CTL_GAIN, -84, 40,
568 digital_gain),
569 SOC_SINGLE_S8_TLV("DEC5 Volume", TABLA_A_CDC_TX5_VOL_CTL_GAIN, -84, 40,
570 digital_gain),
571 SOC_SINGLE_S8_TLV("DEC6 Volume", TABLA_A_CDC_TX6_VOL_CTL_GAIN, -84, 40,
572 digital_gain),
573 SOC_SINGLE_S8_TLV("DEC7 Volume", TABLA_A_CDC_TX7_VOL_CTL_GAIN, -84, 40,
574 digital_gain),
575 SOC_SINGLE_S8_TLV("DEC8 Volume", TABLA_A_CDC_TX8_VOL_CTL_GAIN, -84, 40,
576 digital_gain),
577 SOC_SINGLE_S8_TLV("DEC9 Volume", TABLA_A_CDC_TX9_VOL_CTL_GAIN, -84, 40,
578 digital_gain),
579 SOC_SINGLE_S8_TLV("DEC10 Volume", TABLA_A_CDC_TX10_VOL_CTL_GAIN, -84,
580 40, digital_gain),
Patrick Lai29006372011-09-28 17:57:42 -0700581 SOC_SINGLE_S8_TLV("IIR1 INP1 Volume", TABLA_A_CDC_IIR1_GAIN_B1_CTL, -84,
582 40, digital_gain),
583 SOC_SINGLE_S8_TLV("IIR1 INP2 Volume", TABLA_A_CDC_IIR1_GAIN_B2_CTL, -84,
584 40, digital_gain),
585 SOC_SINGLE_S8_TLV("IIR1 INP3 Volume", TABLA_A_CDC_IIR1_GAIN_B3_CTL, -84,
586 40, digital_gain),
587 SOC_SINGLE_S8_TLV("IIR1 INP4 Volume", TABLA_A_CDC_IIR1_GAIN_B4_CTL, -84,
588 40, digital_gain),
Bhalchandra Gajare0d77e1b2011-07-08 10:54:14 -0700589 SOC_SINGLE_TLV("ADC1 Volume", TABLA_A_TX_1_2_EN, 5, 3, 0, analog_gain),
590 SOC_SINGLE_TLV("ADC2 Volume", TABLA_A_TX_1_2_EN, 1, 3, 0, analog_gain),
Bhalchandra Gajarecc6ffa02011-07-14 18:35:41 -0700591 SOC_SINGLE_TLV("ADC3 Volume", TABLA_A_TX_3_4_EN, 5, 3, 0, analog_gain),
592 SOC_SINGLE_TLV("ADC4 Volume", TABLA_A_TX_3_4_EN, 1, 3, 0, analog_gain),
Bhalchandra Gajare0d77e1b2011-07-08 10:54:14 -0700593 SOC_SINGLE_TLV("ADC5 Volume", TABLA_A_TX_5_6_EN, 5, 3, 0, analog_gain),
594 SOC_SINGLE_TLV("ADC6 Volume", TABLA_A_TX_5_6_EN, 1, 3, 0, analog_gain),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700595
596 SOC_SINGLE("MICBIAS1 CAPLESS Switch", TABLA_A_MICB_1_CTL, 4, 1, 1),
Santosh Mardi680b41e2011-11-22 16:51:16 -0800597 SOC_SINGLE("MICBIAS2 CAPLESS Switch", TABLA_A_MICB_2_CTL, 4, 1, 1),
Bhalchandra Gajarecc6ffa02011-07-14 18:35:41 -0700598 SOC_SINGLE("MICBIAS3 CAPLESS Switch", TABLA_A_MICB_3_CTL, 4, 1, 1),
Bradley Rubina7096d02011-08-03 18:29:02 -0700599
600 SOC_SINGLE_EXT("ANC Slot", SND_SOC_NOPM, 0, 0, 100, tabla_get_anc_slot,
601 tabla_put_anc_slot),
Santosh Mardi024010f2011-10-18 06:27:21 +0530602 SOC_ENUM("TX1 HPF cut off", cf_dec1_enum),
603 SOC_ENUM("TX2 HPF cut off", cf_dec2_enum),
604 SOC_ENUM("TX3 HPF cut off", cf_dec3_enum),
605 SOC_ENUM("TX4 HPF cut off", cf_dec4_enum),
606 SOC_ENUM("TX5 HPF cut off", cf_dec5_enum),
607 SOC_ENUM("TX6 HPF cut off", cf_dec6_enum),
608 SOC_ENUM("TX7 HPF cut off", cf_dec7_enum),
609 SOC_ENUM("TX8 HPF cut off", cf_dec8_enum),
610 SOC_ENUM("TX9 HPF cut off", cf_dec9_enum),
611 SOC_ENUM("TX10 HPF cut off", cf_dec10_enum),
612
613 SOC_SINGLE("TX1 HPF Switch", TABLA_A_CDC_TX1_MUX_CTL, 3, 1, 0),
614 SOC_SINGLE("TX2 HPF Switch", TABLA_A_CDC_TX2_MUX_CTL, 3, 1, 0),
615 SOC_SINGLE("TX3 HPF Switch", TABLA_A_CDC_TX3_MUX_CTL, 3, 1, 0),
616 SOC_SINGLE("TX4 HPF Switch", TABLA_A_CDC_TX4_MUX_CTL, 3, 1, 0),
617 SOC_SINGLE("TX5 HPF Switch", TABLA_A_CDC_TX5_MUX_CTL, 3, 1, 0),
618 SOC_SINGLE("TX6 HPF Switch", TABLA_A_CDC_TX6_MUX_CTL, 3, 1, 0),
619 SOC_SINGLE("TX7 HPF Switch", TABLA_A_CDC_TX7_MUX_CTL, 3, 1, 0),
620 SOC_SINGLE("TX8 HPF Switch", TABLA_A_CDC_TX8_MUX_CTL, 3, 1, 0),
621 SOC_SINGLE("TX9 HPF Switch", TABLA_A_CDC_TX9_MUX_CTL, 3, 1, 0),
622 SOC_SINGLE("TX10 HPF Switch", TABLA_A_CDC_TX10_MUX_CTL, 3, 1, 0),
623
624 SOC_SINGLE("RX1 HPF Switch", TABLA_A_CDC_RX1_B5_CTL, 2, 1, 0),
625 SOC_SINGLE("RX2 HPF Switch", TABLA_A_CDC_RX2_B5_CTL, 2, 1, 0),
626 SOC_SINGLE("RX3 HPF Switch", TABLA_A_CDC_RX3_B5_CTL, 2, 1, 0),
627 SOC_SINGLE("RX4 HPF Switch", TABLA_A_CDC_RX4_B5_CTL, 2, 1, 0),
628 SOC_SINGLE("RX5 HPF Switch", TABLA_A_CDC_RX5_B5_CTL, 2, 1, 0),
629 SOC_SINGLE("RX6 HPF Switch", TABLA_A_CDC_RX6_B5_CTL, 2, 1, 0),
630 SOC_SINGLE("RX7 HPF Switch", TABLA_A_CDC_RX7_B5_CTL, 2, 1, 0),
631
632 SOC_ENUM("RX1 HPF cut off", cf_rxmix1_enum),
633 SOC_ENUM("RX2 HPF cut off", cf_rxmix2_enum),
634 SOC_ENUM("RX3 HPF cut off", cf_rxmix3_enum),
635 SOC_ENUM("RX4 HPF cut off", cf_rxmix4_enum),
636 SOC_ENUM("RX5 HPF cut off", cf_rxmix5_enum),
637 SOC_ENUM("RX6 HPF cut off", cf_rxmix6_enum),
638 SOC_ENUM("RX7 HPF cut off", cf_rxmix7_enum),
Ben Romberger1f045a72011-11-04 10:14:57 -0700639
640 SOC_SINGLE_EXT("IIR1 Enable Band1", IIR1, BAND1, 1, 0,
641 tabla_get_iir_enable_audio_mixer, tabla_put_iir_enable_audio_mixer),
642 SOC_SINGLE_EXT("IIR1 Enable Band2", IIR1, BAND2, 1, 0,
643 tabla_get_iir_enable_audio_mixer, tabla_put_iir_enable_audio_mixer),
644 SOC_SINGLE_EXT("IIR1 Enable Band3", IIR1, BAND3, 1, 0,
645 tabla_get_iir_enable_audio_mixer, tabla_put_iir_enable_audio_mixer),
646 SOC_SINGLE_EXT("IIR1 Enable Band4", IIR1, BAND4, 1, 0,
647 tabla_get_iir_enable_audio_mixer, tabla_put_iir_enable_audio_mixer),
648 SOC_SINGLE_EXT("IIR1 Enable Band5", IIR1, BAND5, 1, 0,
649 tabla_get_iir_enable_audio_mixer, tabla_put_iir_enable_audio_mixer),
650 SOC_SINGLE_EXT("IIR2 Enable Band1", IIR2, BAND1, 1, 0,
651 tabla_get_iir_enable_audio_mixer, tabla_put_iir_enable_audio_mixer),
652 SOC_SINGLE_EXT("IIR2 Enable Band2", IIR2, BAND2, 1, 0,
653 tabla_get_iir_enable_audio_mixer, tabla_put_iir_enable_audio_mixer),
654 SOC_SINGLE_EXT("IIR2 Enable Band3", IIR2, BAND3, 1, 0,
655 tabla_get_iir_enable_audio_mixer, tabla_put_iir_enable_audio_mixer),
656 SOC_SINGLE_EXT("IIR2 Enable Band4", IIR2, BAND4, 1, 0,
657 tabla_get_iir_enable_audio_mixer, tabla_put_iir_enable_audio_mixer),
658 SOC_SINGLE_EXT("IIR2 Enable Band5", IIR2, BAND5, 1, 0,
659 tabla_get_iir_enable_audio_mixer, tabla_put_iir_enable_audio_mixer),
660
661 SOC_SINGLE_MULTI_EXT("IIR1 Band1", IIR1, BAND1, 255, 0, 5,
662 tabla_get_iir_band_audio_mixer, tabla_put_iir_band_audio_mixer),
663 SOC_SINGLE_MULTI_EXT("IIR1 Band2", IIR1, BAND2, 255, 0, 5,
664 tabla_get_iir_band_audio_mixer, tabla_put_iir_band_audio_mixer),
665 SOC_SINGLE_MULTI_EXT("IIR1 Band3", IIR1, BAND3, 255, 0, 5,
666 tabla_get_iir_band_audio_mixer, tabla_put_iir_band_audio_mixer),
667 SOC_SINGLE_MULTI_EXT("IIR1 Band4", IIR1, BAND4, 255, 0, 5,
668 tabla_get_iir_band_audio_mixer, tabla_put_iir_band_audio_mixer),
669 SOC_SINGLE_MULTI_EXT("IIR1 Band5", IIR1, BAND5, 255, 0, 5,
670 tabla_get_iir_band_audio_mixer, tabla_put_iir_band_audio_mixer),
671 SOC_SINGLE_MULTI_EXT("IIR2 Band1", IIR2, BAND1, 255, 0, 5,
672 tabla_get_iir_band_audio_mixer, tabla_put_iir_band_audio_mixer),
673 SOC_SINGLE_MULTI_EXT("IIR2 Band2", IIR2, BAND2, 255, 0, 5,
674 tabla_get_iir_band_audio_mixer, tabla_put_iir_band_audio_mixer),
675 SOC_SINGLE_MULTI_EXT("IIR2 Band3", IIR2, BAND3, 255, 0, 5,
676 tabla_get_iir_band_audio_mixer, tabla_put_iir_band_audio_mixer),
677 SOC_SINGLE_MULTI_EXT("IIR2 Band4", IIR2, BAND4, 255, 0, 5,
678 tabla_get_iir_band_audio_mixer, tabla_put_iir_band_audio_mixer),
679 SOC_SINGLE_MULTI_EXT("IIR2 Band5", IIR2, BAND5, 255, 0, 5,
680 tabla_get_iir_band_audio_mixer, tabla_put_iir_band_audio_mixer),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700681};
682
Joonwoo Park6c1ebb62012-01-16 19:08:43 -0800683static const struct snd_kcontrol_new tabla_1_x_snd_controls[] = {
684 SOC_SINGLE("MICBIAS4 CAPLESS Switch", TABLA_1_A_MICB_4_CTL, 4, 1, 1),
685};
686
687static const struct snd_kcontrol_new tabla_2_higher_snd_controls[] = {
688 SOC_SINGLE("MICBIAS4 CAPLESS Switch", TABLA_2_A_MICB_4_CTL, 4, 1, 1),
689};
690
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700691static const char *rx_mix1_text[] = {
692 "ZERO", "SRC1", "SRC2", "IIR1", "IIR2", "RX1", "RX2", "RX3", "RX4",
693 "RX5", "RX6", "RX7"
694};
695
Kiran Kandi8b3a8302011-09-27 16:13:28 -0700696static const char *rx_dsm_text[] = {
697 "CIC_OUT", "DSM_INV"
698};
699
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700700static const char *sb_tx1_mux_text[] = {
701 "ZERO", "RMIX1", "RMIX2", "RMIX3", "RMIX4", "RMIX5", "RMIX6", "RMIX7",
702 "DEC1"
703};
704
705static const char *sb_tx5_mux_text[] = {
706 "ZERO", "RMIX1", "RMIX2", "RMIX3", "RMIX4", "RMIX5", "RMIX6", "RMIX7",
707 "DEC5"
708};
709
710static const char *sb_tx6_mux_text[] = {
711 "ZERO", "RMIX1", "RMIX2", "RMIX3", "RMIX4", "RMIX5", "RMIX6", "RMIX7",
712 "DEC6"
713};
714
715static const char const *sb_tx7_to_tx10_mux_text[] = {
716 "ZERO", "RMIX1", "RMIX2", "RMIX3", "RMIX4", "RMIX5", "RMIX6", "RMIX7",
717 "DEC1", "DEC2", "DEC3", "DEC4", "DEC5", "DEC6", "DEC7", "DEC8",
718 "DEC9", "DEC10"
719};
720
721static const char *dec1_mux_text[] = {
722 "ZERO", "DMIC1", "ADC6",
723};
724
Bhalchandra Gajare0d77e1b2011-07-08 10:54:14 -0700725static const char *dec2_mux_text[] = {
726 "ZERO", "DMIC2", "ADC5",
727};
728
Bhalchandra Gajarecc6ffa02011-07-14 18:35:41 -0700729static const char *dec3_mux_text[] = {
730 "ZERO", "DMIC3", "ADC4",
731};
732
733static const char *dec4_mux_text[] = {
734 "ZERO", "DMIC4", "ADC3",
735};
736
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700737static const char *dec5_mux_text[] = {
738 "ZERO", "DMIC5", "ADC2",
739};
740
741static const char *dec6_mux_text[] = {
742 "ZERO", "DMIC6", "ADC1",
743};
744
745static const char const *dec7_mux_text[] = {
746 "ZERO", "DMIC1", "DMIC6", "ADC1", "ADC6", "ANC1_FB", "ANC2_FB",
747};
748
Bhalchandra Gajare0d77e1b2011-07-08 10:54:14 -0700749static const char *dec8_mux_text[] = {
750 "ZERO", "DMIC2", "DMIC5", "ADC2", "ADC5",
751};
752
Bhalchandra Gajarecc6ffa02011-07-14 18:35:41 -0700753static const char *dec9_mux_text[] = {
754 "ZERO", "DMIC4", "DMIC5", "ADC2", "ADC3", "ADCMB", "ANC1_FB", "ANC2_FB",
755};
756
757static const char *dec10_mux_text[] = {
758 "ZERO", "DMIC3", "DMIC6", "ADC1", "ADC4", "ADCMB", "ANC1_FB", "ANC2_FB",
759};
760
Bradley Rubin229c6a52011-07-12 16:18:48 -0700761static const char const *anc_mux_text[] = {
762 "ZERO", "ADC1", "ADC2", "ADC3", "ADC4", "ADC5", "ADC6", "ADC_MB",
763 "RSVD_1", "DMIC1", "DMIC2", "DMIC3", "DMIC4", "DMIC5", "DMIC6"
764};
765
766static const char const *anc1_fb_mux_text[] = {
767 "ZERO", "EAR_HPH_L", "EAR_LINE_1",
768};
769
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700770static const char *iir1_inp1_text[] = {
771 "ZERO", "DEC1", "DEC2", "DEC3", "DEC4", "DEC5", "DEC6", "DEC7", "DEC8",
772 "DEC9", "DEC10", "RX1", "RX2", "RX3", "RX4", "RX5", "RX6", "RX7"
773};
774
775static const struct soc_enum rx_mix1_inp1_chain_enum =
776 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_RX1_B1_CTL, 0, 12, rx_mix1_text);
777
Bradley Rubin229c6a52011-07-12 16:18:48 -0700778static const struct soc_enum rx_mix1_inp2_chain_enum =
779 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_RX1_B1_CTL, 4, 12, rx_mix1_text);
780
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700781static const struct soc_enum rx2_mix1_inp1_chain_enum =
782 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_RX2_B1_CTL, 0, 12, rx_mix1_text);
783
Bradley Rubin229c6a52011-07-12 16:18:48 -0700784static const struct soc_enum rx2_mix1_inp2_chain_enum =
785 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_RX2_B1_CTL, 4, 12, rx_mix1_text);
786
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700787static const struct soc_enum rx3_mix1_inp1_chain_enum =
788 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_RX3_B1_CTL, 0, 12, rx_mix1_text);
789
Bradley Rubin74a9b4a2011-06-13 15:03:43 -0700790static const struct soc_enum rx3_mix1_inp2_chain_enum =
791 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_RX3_B1_CTL, 4, 12, rx_mix1_text);
792
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700793static const struct soc_enum rx4_mix1_inp1_chain_enum =
794 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_RX4_B1_CTL, 0, 12, rx_mix1_text);
795
Bradley Rubin74a9b4a2011-06-13 15:03:43 -0700796static const struct soc_enum rx4_mix1_inp2_chain_enum =
797 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_RX4_B1_CTL, 4, 12, rx_mix1_text);
798
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700799static const struct soc_enum rx5_mix1_inp1_chain_enum =
800 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_RX5_B1_CTL, 0, 12, rx_mix1_text);
801
Bradley Rubin74a9b4a2011-06-13 15:03:43 -0700802static const struct soc_enum rx5_mix1_inp2_chain_enum =
803 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_RX5_B1_CTL, 4, 12, rx_mix1_text);
804
805static const struct soc_enum rx6_mix1_inp1_chain_enum =
806 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_RX6_B1_CTL, 0, 12, rx_mix1_text);
807
808static const struct soc_enum rx6_mix1_inp2_chain_enum =
809 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_RX6_B1_CTL, 4, 12, rx_mix1_text);
810
Bhalchandra Gajare0a8ad172011-08-12 13:32:22 -0700811static const struct soc_enum rx7_mix1_inp1_chain_enum =
812 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_RX7_B1_CTL, 0, 12, rx_mix1_text);
813
814static const struct soc_enum rx7_mix1_inp2_chain_enum =
815 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_RX7_B1_CTL, 4, 12, rx_mix1_text);
816
Kiran Kandi8b3a8302011-09-27 16:13:28 -0700817static const struct soc_enum rx4_dsm_enum =
818 SOC_ENUM_SINGLE(TABLA_A_CDC_RX4_B6_CTL, 4, 2, rx_dsm_text);
819
820static const struct soc_enum rx6_dsm_enum =
821 SOC_ENUM_SINGLE(TABLA_A_CDC_RX6_B6_CTL, 4, 2, rx_dsm_text);
822
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700823static const struct soc_enum sb_tx5_mux_enum =
824 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_TX_SB_B5_CTL, 0, 9, sb_tx5_mux_text);
825
826static const struct soc_enum sb_tx6_mux_enum =
827 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_TX_SB_B6_CTL, 0, 9, sb_tx6_mux_text);
828
829static const struct soc_enum sb_tx7_mux_enum =
830 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_TX_SB_B7_CTL, 0, 18,
831 sb_tx7_to_tx10_mux_text);
832
833static const struct soc_enum sb_tx8_mux_enum =
834 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_TX_SB_B8_CTL, 0, 18,
835 sb_tx7_to_tx10_mux_text);
836
Kiran Kandi3426e512011-09-13 22:50:10 -0700837static const struct soc_enum sb_tx9_mux_enum =
838 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_TX_SB_B9_CTL, 0, 18,
839 sb_tx7_to_tx10_mux_text);
840
841static const struct soc_enum sb_tx10_mux_enum =
842 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_TX_SB_B10_CTL, 0, 18,
843 sb_tx7_to_tx10_mux_text);
844
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700845static const struct soc_enum sb_tx1_mux_enum =
846 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_TX_SB_B1_CTL, 0, 9, sb_tx1_mux_text);
847
848static const struct soc_enum dec1_mux_enum =
849 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_TX_B1_CTL, 0, 3, dec1_mux_text);
850
Bhalchandra Gajare0d77e1b2011-07-08 10:54:14 -0700851static const struct soc_enum dec2_mux_enum =
852 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_TX_B1_CTL, 2, 3, dec2_mux_text);
853
Bhalchandra Gajarecc6ffa02011-07-14 18:35:41 -0700854static const struct soc_enum dec3_mux_enum =
855 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_TX_B1_CTL, 4, 3, dec3_mux_text);
856
857static const struct soc_enum dec4_mux_enum =
858 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_TX_B1_CTL, 6, 3, dec4_mux_text);
859
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700860static const struct soc_enum dec5_mux_enum =
861 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_TX_B2_CTL, 0, 3, dec5_mux_text);
862
863static const struct soc_enum dec6_mux_enum =
864 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_TX_B2_CTL, 2, 3, dec6_mux_text);
865
866static const struct soc_enum dec7_mux_enum =
867 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_TX_B2_CTL, 4, 7, dec7_mux_text);
868
Bhalchandra Gajare0d77e1b2011-07-08 10:54:14 -0700869static const struct soc_enum dec8_mux_enum =
870 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_TX_B3_CTL, 0, 7, dec8_mux_text);
871
Bhalchandra Gajarecc6ffa02011-07-14 18:35:41 -0700872static const struct soc_enum dec9_mux_enum =
873 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_TX_B3_CTL, 3, 8, dec9_mux_text);
874
875static const struct soc_enum dec10_mux_enum =
876 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_TX_B4_CTL, 0, 8, dec10_mux_text);
877
Bradley Rubin229c6a52011-07-12 16:18:48 -0700878static const struct soc_enum anc1_mux_enum =
879 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_ANC_B1_CTL, 0, 16, anc_mux_text);
880
881static const struct soc_enum anc2_mux_enum =
882 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_ANC_B1_CTL, 4, 16, anc_mux_text);
883
884static const struct soc_enum anc1_fb_mux_enum =
885 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_ANC_B2_CTL, 0, 3, anc1_fb_mux_text);
886
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700887static const struct soc_enum iir1_inp1_mux_enum =
888 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_EQ1_B1_CTL, 0, 18, iir1_inp1_text);
889
890static const struct snd_kcontrol_new rx_mix1_inp1_mux =
891 SOC_DAPM_ENUM("RX1 MIX1 INP1 Mux", rx_mix1_inp1_chain_enum);
892
Bradley Rubin229c6a52011-07-12 16:18:48 -0700893static const struct snd_kcontrol_new rx_mix1_inp2_mux =
894 SOC_DAPM_ENUM("RX1 MIX1 INP2 Mux", rx_mix1_inp2_chain_enum);
895
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700896static const struct snd_kcontrol_new rx2_mix1_inp1_mux =
897 SOC_DAPM_ENUM("RX2 MIX1 INP1 Mux", rx2_mix1_inp1_chain_enum);
898
Bradley Rubin229c6a52011-07-12 16:18:48 -0700899static const struct snd_kcontrol_new rx2_mix1_inp2_mux =
900 SOC_DAPM_ENUM("RX2 MIX1 INP2 Mux", rx2_mix1_inp2_chain_enum);
901
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700902static const struct snd_kcontrol_new rx3_mix1_inp1_mux =
903 SOC_DAPM_ENUM("RX3 MIX1 INP1 Mux", rx3_mix1_inp1_chain_enum);
904
Bradley Rubin74a9b4a2011-06-13 15:03:43 -0700905static const struct snd_kcontrol_new rx3_mix1_inp2_mux =
906 SOC_DAPM_ENUM("RX3 MIX1 INP2 Mux", rx3_mix1_inp2_chain_enum);
907
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700908static const struct snd_kcontrol_new rx4_mix1_inp1_mux =
909 SOC_DAPM_ENUM("RX4 MIX1 INP1 Mux", rx4_mix1_inp1_chain_enum);
910
Bradley Rubin74a9b4a2011-06-13 15:03:43 -0700911static const struct snd_kcontrol_new rx4_mix1_inp2_mux =
912 SOC_DAPM_ENUM("RX4 MIX1 INP2 Mux", rx4_mix1_inp2_chain_enum);
913
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700914static const struct snd_kcontrol_new rx5_mix1_inp1_mux =
915 SOC_DAPM_ENUM("RX5 MIX1 INP1 Mux", rx5_mix1_inp1_chain_enum);
916
Bradley Rubin74a9b4a2011-06-13 15:03:43 -0700917static const struct snd_kcontrol_new rx5_mix1_inp2_mux =
918 SOC_DAPM_ENUM("RX5 MIX1 INP2 Mux", rx5_mix1_inp2_chain_enum);
919
920static const struct snd_kcontrol_new rx6_mix1_inp1_mux =
921 SOC_DAPM_ENUM("RX6 MIX1 INP1 Mux", rx6_mix1_inp1_chain_enum);
922
923static const struct snd_kcontrol_new rx6_mix1_inp2_mux =
924 SOC_DAPM_ENUM("RX6 MIX1 INP2 Mux", rx6_mix1_inp2_chain_enum);
925
Bhalchandra Gajare0a8ad172011-08-12 13:32:22 -0700926static const struct snd_kcontrol_new rx7_mix1_inp1_mux =
927 SOC_DAPM_ENUM("RX7 MIX1 INP1 Mux", rx7_mix1_inp1_chain_enum);
928
929static const struct snd_kcontrol_new rx7_mix1_inp2_mux =
930 SOC_DAPM_ENUM("RX7 MIX1 INP2 Mux", rx7_mix1_inp2_chain_enum);
931
Kiran Kandi8b3a8302011-09-27 16:13:28 -0700932static const struct snd_kcontrol_new rx4_dsm_mux =
933 SOC_DAPM_ENUM("RX4 DSM MUX Mux", rx4_dsm_enum);
934
935static const struct snd_kcontrol_new rx6_dsm_mux =
936 SOC_DAPM_ENUM("RX6 DSM MUX Mux", rx6_dsm_enum);
937
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700938static const struct snd_kcontrol_new sb_tx5_mux =
939 SOC_DAPM_ENUM("SLIM TX5 MUX Mux", sb_tx5_mux_enum);
940
941static const struct snd_kcontrol_new sb_tx6_mux =
942 SOC_DAPM_ENUM("SLIM TX6 MUX Mux", sb_tx6_mux_enum);
943
944static const struct snd_kcontrol_new sb_tx7_mux =
945 SOC_DAPM_ENUM("SLIM TX7 MUX Mux", sb_tx7_mux_enum);
946
947static const struct snd_kcontrol_new sb_tx8_mux =
948 SOC_DAPM_ENUM("SLIM TX8 MUX Mux", sb_tx8_mux_enum);
949
Kiran Kandi3426e512011-09-13 22:50:10 -0700950static const struct snd_kcontrol_new sb_tx9_mux =
951 SOC_DAPM_ENUM("SLIM TX9 MUX Mux", sb_tx9_mux_enum);
952
953static const struct snd_kcontrol_new sb_tx10_mux =
954 SOC_DAPM_ENUM("SLIM TX10 MUX Mux", sb_tx10_mux_enum);
955
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700956static const struct snd_kcontrol_new sb_tx1_mux =
957 SOC_DAPM_ENUM("SLIM TX1 MUX Mux", sb_tx1_mux_enum);
958
959static const struct snd_kcontrol_new dec1_mux =
960 SOC_DAPM_ENUM("DEC1 MUX Mux", dec1_mux_enum);
961
Bhalchandra Gajare0d77e1b2011-07-08 10:54:14 -0700962static const struct snd_kcontrol_new dec2_mux =
963 SOC_DAPM_ENUM("DEC2 MUX Mux", dec2_mux_enum);
964
Bhalchandra Gajarecc6ffa02011-07-14 18:35:41 -0700965static const struct snd_kcontrol_new dec3_mux =
966 SOC_DAPM_ENUM("DEC3 MUX Mux", dec3_mux_enum);
967
968static const struct snd_kcontrol_new dec4_mux =
969 SOC_DAPM_ENUM("DEC4 MUX Mux", dec4_mux_enum);
970
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700971static const struct snd_kcontrol_new dec5_mux =
972 SOC_DAPM_ENUM("DEC5 MUX Mux", dec5_mux_enum);
973
974static const struct snd_kcontrol_new dec6_mux =
975 SOC_DAPM_ENUM("DEC6 MUX Mux", dec6_mux_enum);
976
977static const struct snd_kcontrol_new dec7_mux =
978 SOC_DAPM_ENUM("DEC7 MUX Mux", dec7_mux_enum);
979
Bradley Rubin229c6a52011-07-12 16:18:48 -0700980static const struct snd_kcontrol_new anc1_mux =
981 SOC_DAPM_ENUM("ANC1 MUX Mux", anc1_mux_enum);
Bhalchandra Gajare0d77e1b2011-07-08 10:54:14 -0700982static const struct snd_kcontrol_new dec8_mux =
983 SOC_DAPM_ENUM("DEC8 MUX Mux", dec8_mux_enum);
984
Bhalchandra Gajarecc6ffa02011-07-14 18:35:41 -0700985static const struct snd_kcontrol_new dec9_mux =
986 SOC_DAPM_ENUM("DEC9 MUX Mux", dec9_mux_enum);
987
988static const struct snd_kcontrol_new dec10_mux =
989 SOC_DAPM_ENUM("DEC10 MUX Mux", dec10_mux_enum);
990
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700991static const struct snd_kcontrol_new iir1_inp1_mux =
992 SOC_DAPM_ENUM("IIR1 INP1 Mux", iir1_inp1_mux_enum);
993
Bradley Rubin229c6a52011-07-12 16:18:48 -0700994static const struct snd_kcontrol_new anc2_mux =
995 SOC_DAPM_ENUM("ANC2 MUX Mux", anc2_mux_enum);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700996
Bradley Rubin229c6a52011-07-12 16:18:48 -0700997static const struct snd_kcontrol_new anc1_fb_mux =
998 SOC_DAPM_ENUM("ANC1 FB MUX Mux", anc1_fb_mux_enum);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700999
Bradley Rubin229c6a52011-07-12 16:18:48 -07001000static const struct snd_kcontrol_new dac1_switch[] = {
1001 SOC_DAPM_SINGLE("Switch", TABLA_A_RX_EAR_EN, 5, 1, 0)
1002};
1003static const struct snd_kcontrol_new hphl_switch[] = {
1004 SOC_DAPM_SINGLE("Switch", TABLA_A_RX_HPH_L_DAC_CTL, 6, 1, 0)
1005};
Kiran Kandi8b3a8302011-09-27 16:13:28 -07001006
1007static const struct snd_kcontrol_new lineout3_ground_switch =
1008 SOC_DAPM_SINGLE("Switch", TABLA_A_RX_LINE_3_DAC_CTL, 6, 1, 0);
1009
1010static const struct snd_kcontrol_new lineout4_ground_switch =
1011 SOC_DAPM_SINGLE("Switch", TABLA_A_RX_LINE_4_DAC_CTL, 6, 1, 0);
Bradley Rubin74a9b4a2011-06-13 15:03:43 -07001012
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001013static void tabla_codec_enable_adc_block(struct snd_soc_codec *codec,
1014 int enable)
1015{
1016 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
1017
1018 pr_debug("%s %d\n", __func__, enable);
1019
1020 if (enable) {
1021 tabla->adc_count++;
1022 snd_soc_update_bits(codec, TABLA_A_TX_COM_BIAS, 0xE0, 0xE0);
1023 snd_soc_update_bits(codec, TABLA_A_CDC_CLK_OTHR_CTL, 0x2, 0x2);
1024 } else {
1025 tabla->adc_count--;
1026 if (!tabla->adc_count) {
1027 snd_soc_update_bits(codec, TABLA_A_CDC_CLK_OTHR_CTL,
1028 0x2, 0x0);
1029 if (!tabla->mbhc_polling_active)
1030 snd_soc_update_bits(codec, TABLA_A_TX_COM_BIAS,
1031 0xE0, 0x0);
1032 }
1033 }
1034}
1035
1036static int tabla_codec_enable_adc(struct snd_soc_dapm_widget *w,
1037 struct snd_kcontrol *kcontrol, int event)
1038{
1039 struct snd_soc_codec *codec = w->codec;
1040 u16 adc_reg;
Kiran Kandi9a2c62a82011-12-07 13:13:26 -08001041 u8 init_bit_shift;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001042
1043 pr_debug("%s %d\n", __func__, event);
1044
1045 if (w->reg == TABLA_A_TX_1_2_EN)
1046 adc_reg = TABLA_A_TX_1_2_TEST_CTL;
1047 else if (w->reg == TABLA_A_TX_3_4_EN)
1048 adc_reg = TABLA_A_TX_3_4_TEST_CTL;
1049 else if (w->reg == TABLA_A_TX_5_6_EN)
1050 adc_reg = TABLA_A_TX_5_6_TEST_CTL;
1051 else {
1052 pr_err("%s: Error, invalid adc register\n", __func__);
1053 return -EINVAL;
1054 }
1055
Kiran Kandi9a2c62a82011-12-07 13:13:26 -08001056 if (w->shift == 3)
1057 init_bit_shift = 6;
1058 else if (w->shift == 7)
1059 init_bit_shift = 7;
1060 else {
1061 pr_err("%s: Error, invalid init bit postion adc register\n",
1062 __func__);
1063 return -EINVAL;
1064 }
1065
1066
1067
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001068 switch (event) {
1069 case SND_SOC_DAPM_PRE_PMU:
1070 tabla_codec_enable_adc_block(codec, 1);
Kiran Kandi9a2c62a82011-12-07 13:13:26 -08001071 snd_soc_update_bits(codec, adc_reg, 1 << init_bit_shift,
1072 1 << init_bit_shift);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001073 break;
1074 case SND_SOC_DAPM_POST_PMU:
Kiran Kandi9a2c62a82011-12-07 13:13:26 -08001075
1076 snd_soc_update_bits(codec, adc_reg, 1 << init_bit_shift, 0x00);
1077
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001078 break;
1079 case SND_SOC_DAPM_POST_PMD:
1080 tabla_codec_enable_adc_block(codec, 0);
1081 break;
1082 }
1083 return 0;
1084}
1085
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001086static int tabla_codec_enable_lineout(struct snd_soc_dapm_widget *w,
1087 struct snd_kcontrol *kcontrol, int event)
1088{
1089 struct snd_soc_codec *codec = w->codec;
1090 u16 lineout_gain_reg;
1091
Kiran Kandidb0a4b02011-08-23 09:32:09 -07001092 pr_debug("%s %d %s\n", __func__, event, w->name);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001093
1094 switch (w->shift) {
1095 case 0:
1096 lineout_gain_reg = TABLA_A_RX_LINE_1_GAIN;
1097 break;
1098 case 1:
1099 lineout_gain_reg = TABLA_A_RX_LINE_2_GAIN;
1100 break;
1101 case 2:
1102 lineout_gain_reg = TABLA_A_RX_LINE_3_GAIN;
1103 break;
1104 case 3:
1105 lineout_gain_reg = TABLA_A_RX_LINE_4_GAIN;
1106 break;
1107 case 4:
1108 lineout_gain_reg = TABLA_A_RX_LINE_5_GAIN;
1109 break;
1110 default:
1111 pr_err("%s: Error, incorrect lineout register value\n",
1112 __func__);
1113 return -EINVAL;
1114 }
1115
1116 switch (event) {
1117 case SND_SOC_DAPM_PRE_PMU:
1118 snd_soc_update_bits(codec, lineout_gain_reg, 0x40, 0x40);
1119 break;
1120 case SND_SOC_DAPM_POST_PMU:
Krishnankutty Kolathappilly31169f42011-11-17 10:33:11 -08001121 pr_debug("%s: sleeping 16 ms after %s PA turn on\n",
Kiran Kandidb0a4b02011-08-23 09:32:09 -07001122 __func__, w->name);
Krishnankutty Kolathappilly31169f42011-11-17 10:33:11 -08001123 usleep_range(16000, 16000);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001124 break;
1125 case SND_SOC_DAPM_POST_PMD:
1126 snd_soc_update_bits(codec, lineout_gain_reg, 0x40, 0x00);
1127 break;
1128 }
1129 return 0;
1130}
1131
Kiran Kandicf45f6a2011-07-17 21:10:19 -07001132
1133static int tabla_codec_enable_dmic(struct snd_soc_dapm_widget *w,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001134 struct snd_kcontrol *kcontrol, int event)
1135{
1136 struct snd_soc_codec *codec = w->codec;
Kiran Kandicf45f6a2011-07-17 21:10:19 -07001137 u16 tx_mux_ctl_reg, tx_dmic_ctl_reg;
1138 u8 dmic_clk_sel, dmic_clk_en;
Bhalchandra Gajare7cf018e2011-08-11 18:58:32 -07001139 unsigned int dmic;
1140 int ret;
Kiran Kandicf45f6a2011-07-17 21:10:19 -07001141
Bhalchandra Gajare7cf018e2011-08-11 18:58:32 -07001142 ret = kstrtouint(strpbrk(w->name, "123456"), 10, &dmic);
1143 if (ret < 0) {
1144 pr_err("%s: Invalid DMIC line on the codec\n", __func__);
Kiran Kandicf45f6a2011-07-17 21:10:19 -07001145 return -EINVAL;
1146 }
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001147
Bhalchandra Gajare7cf018e2011-08-11 18:58:32 -07001148 switch (dmic) {
1149 case 1:
1150 case 2:
1151 dmic_clk_sel = 0x02;
1152 dmic_clk_en = 0x01;
1153 break;
1154
1155 case 3:
1156 case 4:
1157 dmic_clk_sel = 0x08;
1158 dmic_clk_en = 0x04;
1159 break;
1160
1161 case 5:
1162 case 6:
1163 dmic_clk_sel = 0x20;
1164 dmic_clk_en = 0x10;
1165 break;
1166
1167 default:
1168 pr_err("%s: Invalid DMIC Selection\n", __func__);
1169 return -EINVAL;
1170 }
1171
1172 tx_mux_ctl_reg = TABLA_A_CDC_TX1_MUX_CTL + 8 * (dmic - 1);
1173 tx_dmic_ctl_reg = TABLA_A_CDC_TX1_DMIC_CTL + 8 * (dmic - 1);
1174
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001175 pr_debug("%s %d\n", __func__, event);
Kiran Kandicf45f6a2011-07-17 21:10:19 -07001176
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001177 switch (event) {
1178 case SND_SOC_DAPM_PRE_PMU:
Kiran Kandicf45f6a2011-07-17 21:10:19 -07001179 snd_soc_update_bits(codec, tx_mux_ctl_reg, 0x1, 0x1);
1180
1181 snd_soc_update_bits(codec, TABLA_A_CDC_CLK_DMIC_CTL,
1182 dmic_clk_sel, dmic_clk_sel);
1183
1184 snd_soc_update_bits(codec, tx_dmic_ctl_reg, 0x1, 0x1);
1185
1186 snd_soc_update_bits(codec, TABLA_A_CDC_CLK_DMIC_CTL,
1187 dmic_clk_en, dmic_clk_en);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001188 break;
1189 case SND_SOC_DAPM_POST_PMD:
Kiran Kandicf45f6a2011-07-17 21:10:19 -07001190 snd_soc_update_bits(codec, TABLA_A_CDC_CLK_DMIC_CTL,
1191 dmic_clk_en, 0);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001192 break;
1193 }
1194 return 0;
1195}
1196
Bradley Rubin229c6a52011-07-12 16:18:48 -07001197static int tabla_codec_enable_anc(struct snd_soc_dapm_widget *w,
1198 struct snd_kcontrol *kcontrol, int event)
1199{
1200 struct snd_soc_codec *codec = w->codec;
1201 const char *filename;
1202 const struct firmware *fw;
1203 int i;
1204 int ret;
Bradley Rubina7096d02011-08-03 18:29:02 -07001205 int num_anc_slots;
1206 struct anc_header *anc_head;
Bradley Rubin229c6a52011-07-12 16:18:48 -07001207 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
Bradley Rubina7096d02011-08-03 18:29:02 -07001208 u32 anc_writes_size = 0;
1209 int anc_size_remaining;
1210 u32 *anc_ptr;
Bradley Rubin229c6a52011-07-12 16:18:48 -07001211 u16 reg;
1212 u8 mask, val, old_val;
1213
1214 pr_debug("%s %d\n", __func__, event);
1215 switch (event) {
1216 case SND_SOC_DAPM_PRE_PMU:
1217
Bradley Rubin4283a4c2011-07-29 16:18:54 -07001218 filename = "wcd9310/wcd9310_anc.bin";
Bradley Rubin229c6a52011-07-12 16:18:48 -07001219
1220 ret = request_firmware(&fw, filename, codec->dev);
1221 if (ret != 0) {
1222 dev_err(codec->dev, "Failed to acquire ANC data: %d\n",
1223 ret);
1224 return -ENODEV;
1225 }
1226
Bradley Rubina7096d02011-08-03 18:29:02 -07001227 if (fw->size < sizeof(struct anc_header)) {
Bradley Rubin229c6a52011-07-12 16:18:48 -07001228 dev_err(codec->dev, "Not enough data\n");
1229 release_firmware(fw);
1230 return -ENOMEM;
1231 }
1232
1233 /* First number is the number of register writes */
Bradley Rubina7096d02011-08-03 18:29:02 -07001234 anc_head = (struct anc_header *)(fw->data);
1235 anc_ptr = (u32 *)((u32)fw->data + sizeof(struct anc_header));
1236 anc_size_remaining = fw->size - sizeof(struct anc_header);
1237 num_anc_slots = anc_head->num_anc_slots;
Bradley Rubin229c6a52011-07-12 16:18:48 -07001238
Bradley Rubina7096d02011-08-03 18:29:02 -07001239 if (tabla->anc_slot >= num_anc_slots) {
1240 dev_err(codec->dev, "Invalid ANC slot selected\n");
1241 release_firmware(fw);
1242 return -EINVAL;
1243 }
1244
1245 for (i = 0; i < num_anc_slots; i++) {
1246
1247 if (anc_size_remaining < TABLA_PACKED_REG_SIZE) {
1248 dev_err(codec->dev, "Invalid register format\n");
1249 release_firmware(fw);
1250 return -EINVAL;
1251 }
1252 anc_writes_size = (u32)(*anc_ptr);
1253 anc_size_remaining -= sizeof(u32);
1254 anc_ptr += 1;
1255
1256 if (anc_writes_size * TABLA_PACKED_REG_SIZE
1257 > anc_size_remaining) {
1258 dev_err(codec->dev, "Invalid register format\n");
1259 release_firmware(fw);
1260 return -ENOMEM;
1261 }
1262
1263 if (tabla->anc_slot == i)
1264 break;
1265
1266 anc_size_remaining -= (anc_writes_size *
1267 TABLA_PACKED_REG_SIZE);
Bradley Rubin939ff3f2011-08-26 17:19:34 -07001268 anc_ptr += anc_writes_size;
Bradley Rubina7096d02011-08-03 18:29:02 -07001269 }
1270 if (i == num_anc_slots) {
1271 dev_err(codec->dev, "Selected ANC slot not present\n");
Bradley Rubin229c6a52011-07-12 16:18:48 -07001272 release_firmware(fw);
1273 return -ENOMEM;
1274 }
1275
Bradley Rubina7096d02011-08-03 18:29:02 -07001276 for (i = 0; i < anc_writes_size; i++) {
1277 TABLA_CODEC_UNPACK_ENTRY(anc_ptr[i], reg,
Bradley Rubin229c6a52011-07-12 16:18:48 -07001278 mask, val);
1279 old_val = snd_soc_read(codec, reg);
Bradley Rubin4283a4c2011-07-29 16:18:54 -07001280 snd_soc_write(codec, reg, (old_val & ~mask) |
1281 (val & mask));
Bradley Rubin229c6a52011-07-12 16:18:48 -07001282 }
1283 release_firmware(fw);
Bradley Rubin229c6a52011-07-12 16:18:48 -07001284
1285 break;
1286 case SND_SOC_DAPM_POST_PMD:
1287 snd_soc_write(codec, TABLA_A_CDC_CLK_ANC_RESET_CTL, 0xFF);
1288 snd_soc_write(codec, TABLA_A_CDC_CLK_ANC_CLK_EN_CTL, 0);
1289 break;
1290 }
1291 return 0;
1292}
1293
1294
Bradley Rubincb3950a2011-08-18 13:07:26 -07001295static void tabla_codec_disable_button_presses(struct snd_soc_codec *codec)
1296{
1297 snd_soc_write(codec, TABLA_A_CDC_MBHC_VOLT_B4_CTL, 0x80);
1298 snd_soc_write(codec, TABLA_A_CDC_MBHC_VOLT_B3_CTL, 0x00);
1299}
1300
Bradley Rubin4d09cf42011-08-17 17:59:16 -07001301static void tabla_codec_start_hs_polling(struct snd_soc_codec *codec)
1302{
Bradley Rubincb3950a2011-08-18 13:07:26 -07001303 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
1304
Bradley Rubin4d09cf42011-08-17 17:59:16 -07001305 snd_soc_write(codec, TABLA_A_MBHC_SCALING_MUX_1, 0x84);
Bradley Rubin4d09cf42011-08-17 17:59:16 -07001306 tabla_enable_irq(codec->control_data, TABLA_IRQ_MBHC_REMOVAL);
Bradley Rubincb3950a2011-08-18 13:07:26 -07001307 if (!tabla->no_mic_headset_override) {
1308 tabla_enable_irq(codec->control_data, TABLA_IRQ_MBHC_POTENTIAL);
1309 tabla_enable_irq(codec->control_data, TABLA_IRQ_MBHC_RELEASE);
1310 } else {
1311 tabla_codec_disable_button_presses(codec);
1312 }
Bradley Rubin4d09cf42011-08-17 17:59:16 -07001313 snd_soc_write(codec, TABLA_A_CDC_MBHC_EN_CTL, 0x1);
1314 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_CLK_CTL, 0x8, 0x0);
1315 snd_soc_write(codec, TABLA_A_CDC_MBHC_EN_CTL, 0x1);
1316}
1317
1318static void tabla_codec_pause_hs_polling(struct snd_soc_codec *codec)
1319{
Bradley Rubincb3950a2011-08-18 13:07:26 -07001320 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
1321
Bradley Rubin4d09cf42011-08-17 17:59:16 -07001322 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_CLK_CTL, 0x8, 0x8);
1323 tabla_disable_irq(codec->control_data, TABLA_IRQ_MBHC_REMOVAL);
Bradley Rubincb3950a2011-08-18 13:07:26 -07001324 if (!tabla->no_mic_headset_override) {
1325 tabla_disable_irq(codec->control_data,
1326 TABLA_IRQ_MBHC_POTENTIAL);
1327 tabla_disable_irq(codec->control_data, TABLA_IRQ_MBHC_RELEASE);
1328 }
Bradley Rubin4d09cf42011-08-17 17:59:16 -07001329}
1330
Bhalchandra Gajare19d9c132011-11-18 14:57:08 -08001331static void tabla_codec_switch_cfilt_mode(struct snd_soc_codec *codec,
1332 int mode)
1333{
1334 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
1335 u8 reg_mode_val, cur_mode_val;
1336 bool mbhc_was_polling = false;
1337
1338 if (mode)
1339 reg_mode_val = TABLA_CFILT_FAST_MODE;
1340 else
1341 reg_mode_val = TABLA_CFILT_SLOW_MODE;
1342
1343 cur_mode_val = snd_soc_read(codec,
1344 tabla->mbhc_bias_regs.cfilt_ctl) & 0x40;
1345
1346 if (cur_mode_val != reg_mode_val) {
1347 if (tabla->mbhc_polling_active) {
1348 tabla_codec_pause_hs_polling(codec);
1349 mbhc_was_polling = true;
1350 }
1351 snd_soc_update_bits(codec,
1352 tabla->mbhc_bias_regs.cfilt_ctl, 0x40, reg_mode_val);
1353 if (mbhc_was_polling)
1354 tabla_codec_start_hs_polling(codec);
1355 pr_debug("%s: CFILT mode change (%x to %x)\n", __func__,
1356 cur_mode_val, reg_mode_val);
1357 } else {
1358 pr_debug("%s: CFILT Value is already %x\n",
1359 __func__, cur_mode_val);
1360 }
1361}
1362
1363static void tabla_codec_update_cfilt_usage(struct snd_soc_codec *codec,
1364 u8 cfilt_sel, int inc)
1365{
1366 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
1367 u32 *cfilt_cnt_ptr = NULL;
1368 u16 micb_cfilt_reg;
1369
1370 switch (cfilt_sel) {
1371 case TABLA_CFILT1_SEL:
1372 cfilt_cnt_ptr = &tabla->cfilt1_cnt;
1373 micb_cfilt_reg = TABLA_A_MICB_CFILT_1_CTL;
1374 break;
1375 case TABLA_CFILT2_SEL:
1376 cfilt_cnt_ptr = &tabla->cfilt2_cnt;
1377 micb_cfilt_reg = TABLA_A_MICB_CFILT_2_CTL;
1378 break;
1379 case TABLA_CFILT3_SEL:
1380 cfilt_cnt_ptr = &tabla->cfilt3_cnt;
1381 micb_cfilt_reg = TABLA_A_MICB_CFILT_3_CTL;
1382 break;
1383 default:
1384 return; /* should not happen */
1385 }
1386
1387 if (inc) {
1388 if (!(*cfilt_cnt_ptr)++) {
1389 /* Switch CFILT to slow mode if MBHC CFILT being used */
1390 if (cfilt_sel == tabla->mbhc_bias_regs.cfilt_sel)
1391 tabla_codec_switch_cfilt_mode(codec, 0);
1392
1393 snd_soc_update_bits(codec, micb_cfilt_reg, 0x80, 0x80);
1394 }
1395 } else {
1396 /* check if count not zero, decrement
1397 * then check if zero, go ahead disable cfilter
1398 */
1399 if ((*cfilt_cnt_ptr) && !--(*cfilt_cnt_ptr)) {
1400 snd_soc_update_bits(codec, micb_cfilt_reg, 0x80, 0);
1401
1402 /* Switch CFILT to fast mode if MBHC CFILT being used */
1403 if (cfilt_sel == tabla->mbhc_bias_regs.cfilt_sel)
1404 tabla_codec_switch_cfilt_mode(codec, 1);
1405 }
1406 }
1407}
1408
Bhalchandra Gajared9ebb6c2011-10-03 19:54:41 -07001409static int tabla_find_k_value(unsigned int ldoh_v, unsigned int cfilt_mv)
1410{
1411 int rc = -EINVAL;
1412 unsigned min_mv, max_mv;
1413
1414 switch (ldoh_v) {
1415 case TABLA_LDOH_1P95_V:
1416 min_mv = 160;
1417 max_mv = 1800;
1418 break;
1419 case TABLA_LDOH_2P35_V:
1420 min_mv = 200;
1421 max_mv = 2200;
1422 break;
1423 case TABLA_LDOH_2P75_V:
1424 min_mv = 240;
1425 max_mv = 2600;
1426 break;
1427 case TABLA_LDOH_2P85_V:
1428 min_mv = 250;
1429 max_mv = 2700;
1430 break;
1431 default:
1432 goto done;
1433 }
1434
1435 if (cfilt_mv < min_mv || cfilt_mv > max_mv)
1436 goto done;
1437
1438 for (rc = 4; rc <= 44; rc++) {
1439 min_mv = max_mv * (rc) / 44;
1440 if (min_mv >= cfilt_mv) {
1441 rc -= 4;
1442 break;
1443 }
1444 }
1445done:
1446 return rc;
1447}
1448
1449static bool tabla_is_hph_pa_on(struct snd_soc_codec *codec)
1450{
1451 u8 hph_reg_val = 0;
1452 hph_reg_val = snd_soc_read(codec, TABLA_A_RX_HPH_CNP_EN);
1453
1454 return (hph_reg_val & 0x30) ? true : false;
1455}
1456
Joonwoo Parka9444452011-12-08 18:48:27 -08001457static bool tabla_is_hph_dac_on(struct snd_soc_codec *codec, int left)
1458{
1459 u8 hph_reg_val = 0;
1460 if (left)
1461 hph_reg_val = snd_soc_read(codec,
1462 TABLA_A_RX_HPH_L_DAC_CTL);
1463 else
1464 hph_reg_val = snd_soc_read(codec,
1465 TABLA_A_RX_HPH_R_DAC_CTL);
1466
1467 return (hph_reg_val & 0xC0) ? true : false;
1468}
1469
Bhalchandra Gajared9ebb6c2011-10-03 19:54:41 -07001470static void tabla_codec_switch_micbias(struct snd_soc_codec *codec,
1471 int vddio_switch)
1472{
1473 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
1474 int cfilt_k_val;
Bhalchandra Gajarec1e19c42011-11-18 11:22:56 -08001475 bool mbhc_was_polling = false;
Bhalchandra Gajared9ebb6c2011-10-03 19:54:41 -07001476
1477 switch (vddio_switch) {
1478 case 1:
1479 if (tabla->mbhc_polling_active) {
Bhalchandra Gajarec1e19c42011-11-18 11:22:56 -08001480
1481 tabla_codec_pause_hs_polling(codec);
Joonwoo Park0976d012011-12-22 11:48:18 -08001482 /* VDDIO switch enabled */
Bhalchandra Gajared9ebb6c2011-10-03 19:54:41 -07001483 tabla->cfilt_k_value = snd_soc_read(codec,
1484 tabla->mbhc_bias_regs.cfilt_val);
1485 cfilt_k_val = tabla_find_k_value(
1486 tabla->pdata->micbias.ldoh_v, 1800);
1487 snd_soc_update_bits(codec,
1488 tabla->mbhc_bias_regs.cfilt_val,
1489 0xFC, (cfilt_k_val << 2));
1490
1491 snd_soc_update_bits(codec,
1492 tabla->mbhc_bias_regs.mbhc_reg, 0x80, 0x80);
1493 snd_soc_update_bits(codec,
1494 tabla->mbhc_bias_regs.mbhc_reg, 0x10, 0x00);
Bhalchandra Gajarec1e19c42011-11-18 11:22:56 -08001495 tabla_codec_start_hs_polling(codec);
Bhalchandra Gajared9ebb6c2011-10-03 19:54:41 -07001496
1497 tabla->mbhc_micbias_switched = true;
Joonwoo Park0976d012011-12-22 11:48:18 -08001498 pr_debug("%s: VDDIO switch enabled\n", __func__);
Bhalchandra Gajared9ebb6c2011-10-03 19:54:41 -07001499 }
1500 break;
1501
1502 case 0:
1503 if (tabla->mbhc_micbias_switched) {
Bhalchandra Gajarec1e19c42011-11-18 11:22:56 -08001504 if (tabla->mbhc_polling_active) {
1505 tabla_codec_pause_hs_polling(codec);
1506 mbhc_was_polling = true;
1507 }
Joonwoo Park0976d012011-12-22 11:48:18 -08001508 /* VDDIO switch disabled */
Bhalchandra Gajared9ebb6c2011-10-03 19:54:41 -07001509 if (tabla->cfilt_k_value != 0)
1510 snd_soc_update_bits(codec,
1511 tabla->mbhc_bias_regs.cfilt_val, 0XFC,
1512 tabla->cfilt_k_value);
1513 snd_soc_update_bits(codec,
1514 tabla->mbhc_bias_regs.mbhc_reg, 0x80, 0x00);
1515 snd_soc_update_bits(codec,
1516 tabla->mbhc_bias_regs.mbhc_reg, 0x10, 0x00);
1517
Bhalchandra Gajarec1e19c42011-11-18 11:22:56 -08001518 if (mbhc_was_polling)
1519 tabla_codec_start_hs_polling(codec);
1520
Bhalchandra Gajared9ebb6c2011-10-03 19:54:41 -07001521 tabla->mbhc_micbias_switched = false;
Joonwoo Park0976d012011-12-22 11:48:18 -08001522 pr_debug("%s: VDDIO switch disabled\n", __func__);
Bhalchandra Gajared9ebb6c2011-10-03 19:54:41 -07001523 }
1524 break;
1525 }
1526}
1527
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001528static int tabla_codec_enable_micbias(struct snd_soc_dapm_widget *w,
1529 struct snd_kcontrol *kcontrol, int event)
1530{
1531 struct snd_soc_codec *codec = w->codec;
Patrick Lai3043fba2011-08-01 14:15:57 -07001532 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
1533 u16 micb_int_reg;
Bradley Rubin4d09cf42011-08-17 17:59:16 -07001534 int micb_line;
Bhalchandra Gajarecc6ffa02011-07-14 18:35:41 -07001535 u8 cfilt_sel_val = 0;
Bradley Rubin229c6a52011-07-12 16:18:48 -07001536 char *internal1_text = "Internal1";
1537 char *internal2_text = "Internal2";
1538 char *internal3_text = "Internal3";
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001539
1540 pr_debug("%s %d\n", __func__, event);
1541 switch (w->reg) {
1542 case TABLA_A_MICB_1_CTL:
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001543 micb_int_reg = TABLA_A_MICB_1_INT_RBIAS;
Patrick Lai3043fba2011-08-01 14:15:57 -07001544 cfilt_sel_val = tabla->pdata->micbias.bias1_cfilt_sel;
Bradley Rubin4d09cf42011-08-17 17:59:16 -07001545 micb_line = TABLA_MICBIAS1;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001546 break;
1547 case TABLA_A_MICB_2_CTL:
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001548 micb_int_reg = TABLA_A_MICB_2_INT_RBIAS;
Patrick Lai3043fba2011-08-01 14:15:57 -07001549 cfilt_sel_val = tabla->pdata->micbias.bias2_cfilt_sel;
Bradley Rubin4d09cf42011-08-17 17:59:16 -07001550 micb_line = TABLA_MICBIAS2;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001551 break;
1552 case TABLA_A_MICB_3_CTL:
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001553 micb_int_reg = TABLA_A_MICB_3_INT_RBIAS;
Patrick Lai3043fba2011-08-01 14:15:57 -07001554 cfilt_sel_val = tabla->pdata->micbias.bias3_cfilt_sel;
Bradley Rubin4d09cf42011-08-17 17:59:16 -07001555 micb_line = TABLA_MICBIAS3;
Bhalchandra Gajarecc6ffa02011-07-14 18:35:41 -07001556 break;
Joonwoo Park6c1ebb62012-01-16 19:08:43 -08001557 case TABLA_1_A_MICB_4_CTL:
1558 case TABLA_2_A_MICB_4_CTL:
1559 micb_int_reg = tabla->reg_addr.micb_4_int_rbias;
Patrick Lai3043fba2011-08-01 14:15:57 -07001560 cfilt_sel_val = tabla->pdata->micbias.bias4_cfilt_sel;
Bradley Rubin4d09cf42011-08-17 17:59:16 -07001561 micb_line = TABLA_MICBIAS4;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001562 break;
1563 default:
1564 pr_err("%s: Error, invalid micbias register\n", __func__);
1565 return -EINVAL;
1566 }
1567
1568 switch (event) {
1569 case SND_SOC_DAPM_PRE_PMU:
Bhalchandra Gajared9ebb6c2011-10-03 19:54:41 -07001570 /* Decide whether to switch the micbias for MBHC */
1571 if ((w->reg == tabla->mbhc_bias_regs.ctl_reg)
1572 && tabla->mbhc_micbias_switched)
1573 tabla_codec_switch_micbias(codec, 0);
1574
Bhalchandra Gajarecc6ffa02011-07-14 18:35:41 -07001575 snd_soc_update_bits(codec, w->reg, 0x0E, 0x0A);
Patrick Lai3043fba2011-08-01 14:15:57 -07001576 tabla_codec_update_cfilt_usage(codec, cfilt_sel_val, 1);
Bradley Rubin229c6a52011-07-12 16:18:48 -07001577
1578 if (strnstr(w->name, internal1_text, 30))
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001579 snd_soc_update_bits(codec, micb_int_reg, 0xE0, 0xE0);
Bradley Rubin229c6a52011-07-12 16:18:48 -07001580 else if (strnstr(w->name, internal2_text, 30))
1581 snd_soc_update_bits(codec, micb_int_reg, 0x1C, 0x1C);
1582 else if (strnstr(w->name, internal3_text, 30))
1583 snd_soc_update_bits(codec, micb_int_reg, 0x3, 0x3);
1584
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001585 break;
Bradley Rubin4d09cf42011-08-17 17:59:16 -07001586 case SND_SOC_DAPM_POST_PMU:
1587 if (tabla->mbhc_polling_active &&
Joonwoo Park0976d012011-12-22 11:48:18 -08001588 tabla->micbias == micb_line) {
Bradley Rubin4d09cf42011-08-17 17:59:16 -07001589 tabla_codec_pause_hs_polling(codec);
1590 tabla_codec_start_hs_polling(codec);
1591 }
1592 break;
Bhalchandra Gajared9ebb6c2011-10-03 19:54:41 -07001593
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001594 case SND_SOC_DAPM_POST_PMD:
Bhalchandra Gajared9ebb6c2011-10-03 19:54:41 -07001595
1596 if ((w->reg == tabla->mbhc_bias_regs.ctl_reg)
1597 && tabla_is_hph_pa_on(codec))
1598 tabla_codec_switch_micbias(codec, 1);
1599
Bradley Rubin229c6a52011-07-12 16:18:48 -07001600 if (strnstr(w->name, internal1_text, 30))
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001601 snd_soc_update_bits(codec, micb_int_reg, 0x80, 0x00);
Bradley Rubin229c6a52011-07-12 16:18:48 -07001602 else if (strnstr(w->name, internal2_text, 30))
1603 snd_soc_update_bits(codec, micb_int_reg, 0x10, 0x00);
1604 else if (strnstr(w->name, internal3_text, 30))
1605 snd_soc_update_bits(codec, micb_int_reg, 0x2, 0x0);
1606
Patrick Lai3043fba2011-08-01 14:15:57 -07001607 tabla_codec_update_cfilt_usage(codec, cfilt_sel_val, 0);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001608 break;
1609 }
1610
1611 return 0;
1612}
1613
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001614static int tabla_codec_enable_dec(struct snd_soc_dapm_widget *w,
1615 struct snd_kcontrol *kcontrol, int event)
1616{
1617 struct snd_soc_codec *codec = w->codec;
1618 u16 dec_reset_reg;
1619
1620 pr_debug("%s %d\n", __func__, event);
1621
1622 if (w->reg == TABLA_A_CDC_CLK_TX_CLK_EN_B1_CTL)
1623 dec_reset_reg = TABLA_A_CDC_CLK_TX_RESET_B1_CTL;
1624 else if (w->reg == TABLA_A_CDC_CLK_TX_CLK_EN_B2_CTL)
1625 dec_reset_reg = TABLA_A_CDC_CLK_TX_RESET_B2_CTL;
1626 else {
1627 pr_err("%s: Error, incorrect dec\n", __func__);
1628 return -EINVAL;
1629 }
1630
1631 switch (event) {
1632 case SND_SOC_DAPM_PRE_PMU:
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001633 snd_soc_update_bits(codec, dec_reset_reg, 1 << w->shift,
1634 1 << w->shift);
1635 snd_soc_update_bits(codec, dec_reset_reg, 1 << w->shift, 0x0);
1636 break;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001637 }
1638 return 0;
1639}
1640
Bradley Rubin74a9b4a2011-06-13 15:03:43 -07001641static int tabla_codec_reset_interpolator(struct snd_soc_dapm_widget *w,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001642 struct snd_kcontrol *kcontrol, int event)
1643{
1644 struct snd_soc_codec *codec = w->codec;
1645
Kiran Kandi8b3a8302011-09-27 16:13:28 -07001646 pr_debug("%s %d %s\n", __func__, event, w->name);
1647
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001648 switch (event) {
1649 case SND_SOC_DAPM_PRE_PMU:
Bradley Rubin74a9b4a2011-06-13 15:03:43 -07001650 snd_soc_update_bits(codec, TABLA_A_CDC_CLK_RX_RESET_CTL,
1651 1 << w->shift, 1 << w->shift);
1652 snd_soc_update_bits(codec, TABLA_A_CDC_CLK_RX_RESET_CTL,
1653 1 << w->shift, 0x0);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001654 break;
1655 }
1656 return 0;
1657}
1658
Bradley Rubin229c6a52011-07-12 16:18:48 -07001659static int tabla_codec_enable_ldo_h(struct snd_soc_dapm_widget *w,
1660 struct snd_kcontrol *kcontrol, int event)
1661{
1662 switch (event) {
1663 case SND_SOC_DAPM_POST_PMU:
1664 case SND_SOC_DAPM_POST_PMD:
1665 usleep_range(1000, 1000);
1666 break;
1667 }
1668 return 0;
1669}
1670
Kiran Kandi6fae8bf2011-08-15 10:36:42 -07001671
1672static void tabla_enable_rx_bias(struct snd_soc_codec *codec, u32 enable)
1673{
1674 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
1675
1676 if (enable) {
1677 tabla->rx_bias_count++;
1678 if (tabla->rx_bias_count == 1)
1679 snd_soc_update_bits(codec, TABLA_A_RX_COM_BIAS,
1680 0x80, 0x80);
1681 } else {
1682 tabla->rx_bias_count--;
1683 if (!tabla->rx_bias_count)
1684 snd_soc_update_bits(codec, TABLA_A_RX_COM_BIAS,
1685 0x80, 0x00);
1686 }
1687}
1688
1689static int tabla_codec_enable_rx_bias(struct snd_soc_dapm_widget *w,
1690 struct snd_kcontrol *kcontrol, int event)
1691{
1692 struct snd_soc_codec *codec = w->codec;
1693
1694 pr_debug("%s %d\n", __func__, event);
1695
1696 switch (event) {
1697 case SND_SOC_DAPM_PRE_PMU:
1698 tabla_enable_rx_bias(codec, 1);
1699 break;
1700 case SND_SOC_DAPM_POST_PMD:
1701 tabla_enable_rx_bias(codec, 0);
1702 break;
1703 }
1704 return 0;
1705}
Kiran Kandi8b3a8302011-09-27 16:13:28 -07001706static int tabla_hphr_dac_event(struct snd_soc_dapm_widget *w,
1707 struct snd_kcontrol *kcontrol, int event)
1708{
1709 struct snd_soc_codec *codec = w->codec;
1710
1711 pr_debug("%s %s %d\n", __func__, w->name, event);
1712
1713 switch (event) {
1714 case SND_SOC_DAPM_PRE_PMU:
1715 snd_soc_update_bits(codec, w->reg, 0x40, 0x40);
1716 break;
1717 case SND_SOC_DAPM_POST_PMD:
1718 snd_soc_update_bits(codec, w->reg, 0x40, 0x00);
1719 break;
1720 }
1721 return 0;
1722}
Kiran Kandi6fae8bf2011-08-15 10:36:42 -07001723
Joonwoo Park8b1f0982011-12-08 17:12:45 -08001724static void tabla_snd_soc_jack_report(struct tabla_priv *tabla,
1725 struct snd_soc_jack *jack, int status,
1726 int mask)
1727{
1728 /* XXX: wake_lock_timeout()? */
1729 snd_soc_jack_report(jack, status, mask);
1730}
1731
Patrick Lai49efeac2011-11-03 11:01:12 -07001732static void hphocp_off_report(struct tabla_priv *tabla,
1733 u32 jack_status, int irq)
1734{
1735 struct snd_soc_codec *codec;
1736
1737 if (tabla) {
1738 pr_info("%s: clear ocp status %x\n", __func__, jack_status);
1739 codec = tabla->codec;
1740 tabla->hph_status &= ~jack_status;
1741 if (tabla->headset_jack)
Joonwoo Park8b1f0982011-12-08 17:12:45 -08001742 tabla_snd_soc_jack_report(tabla, tabla->headset_jack,
1743 tabla->hph_status,
1744 TABLA_JACK_MASK);
Joonwoo Park0976d012011-12-22 11:48:18 -08001745 snd_soc_update_bits(codec, TABLA_A_RX_HPH_OCP_CTL, 0x10, 0x00);
1746 snd_soc_update_bits(codec, TABLA_A_RX_HPH_OCP_CTL, 0x10, 0x10);
Patrick Laic7cae882011-11-18 11:52:49 -08001747 /* reset retry counter as PA is turned off signifying
1748 * start of new OCP detection session
1749 */
1750 if (TABLA_IRQ_HPH_PA_OCPL_FAULT)
1751 tabla->hphlocp_cnt = 0;
1752 else
1753 tabla->hphrocp_cnt = 0;
Patrick Lai49efeac2011-11-03 11:01:12 -07001754 tabla_enable_irq(codec->control_data, irq);
1755 } else {
1756 pr_err("%s: Bad tabla private data\n", __func__);
1757 }
1758}
1759
1760static void hphlocp_off_report(struct work_struct *work)
1761{
1762 struct tabla_priv *tabla = container_of(work, struct tabla_priv,
1763 hphlocp_work);
1764 hphocp_off_report(tabla, SND_JACK_OC_HPHL, TABLA_IRQ_HPH_PA_OCPL_FAULT);
1765}
1766
1767static void hphrocp_off_report(struct work_struct *work)
1768{
1769 struct tabla_priv *tabla = container_of(work, struct tabla_priv,
1770 hphrocp_work);
1771 hphocp_off_report(tabla, SND_JACK_OC_HPHR, TABLA_IRQ_HPH_PA_OCPR_FAULT);
1772}
1773
Kiran Kandibf0b1ff2011-09-15 13:55:21 -07001774static int tabla_hph_pa_event(struct snd_soc_dapm_widget *w,
1775 struct snd_kcontrol *kcontrol, int event)
1776{
Bhalchandra Gajared9ebb6c2011-10-03 19:54:41 -07001777 struct snd_soc_codec *codec = w->codec;
1778 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
1779 u8 mbhc_micb_ctl_val;
Kiran Kandibf0b1ff2011-09-15 13:55:21 -07001780 pr_debug("%s: event = %d\n", __func__, event);
1781
1782 switch (event) {
Bhalchandra Gajared9ebb6c2011-10-03 19:54:41 -07001783 case SND_SOC_DAPM_PRE_PMU:
1784 mbhc_micb_ctl_val = snd_soc_read(codec,
1785 tabla->mbhc_bias_regs.ctl_reg);
1786
1787 if (!(mbhc_micb_ctl_val & 0x80)
1788 && !tabla->mbhc_micbias_switched)
1789 tabla_codec_switch_micbias(codec, 1);
1790
1791 break;
1792
Kiran Kandibf0b1ff2011-09-15 13:55:21 -07001793 case SND_SOC_DAPM_POST_PMD:
Patrick Lai49efeac2011-11-03 11:01:12 -07001794 /* schedule work is required because at the time HPH PA DAPM
1795 * event callback is called by DAPM framework, CODEC dapm mutex
1796 * would have been locked while snd_soc_jack_report also
1797 * attempts to acquire same lock.
1798 */
Joonwoo Parka9444452011-12-08 18:48:27 -08001799 if (w->shift == 5) {
1800 clear_bit(TABLA_HPHL_PA_OFF_ACK,
1801 &tabla->hph_pa_dac_state);
1802 clear_bit(TABLA_HPHL_DAC_OFF_ACK,
1803 &tabla->hph_pa_dac_state);
1804 if (tabla->hph_status & SND_JACK_OC_HPHL)
1805 schedule_work(&tabla->hphlocp_work);
1806 } else if (w->shift == 4) {
1807 clear_bit(TABLA_HPHR_PA_OFF_ACK,
1808 &tabla->hph_pa_dac_state);
1809 clear_bit(TABLA_HPHR_DAC_OFF_ACK,
1810 &tabla->hph_pa_dac_state);
1811 if (tabla->hph_status & SND_JACK_OC_HPHR)
1812 schedule_work(&tabla->hphrocp_work);
1813 }
1814
Bhalchandra Gajared9ebb6c2011-10-03 19:54:41 -07001815 if (tabla->mbhc_micbias_switched)
1816 tabla_codec_switch_micbias(codec, 0);
1817
Kiran Kandibf0b1ff2011-09-15 13:55:21 -07001818 pr_debug("%s: sleep 10 ms after %s PA disable.\n", __func__,
1819 w->name);
1820 usleep_range(10000, 10000);
1821
1822 break;
1823 }
1824 return 0;
1825}
1826
Bhalchandra Gajare02d90cd2011-09-30 16:14:00 -07001827static void tabla_get_mbhc_micbias_regs(struct snd_soc_codec *codec,
Joonwoo Park6c1ebb62012-01-16 19:08:43 -08001828 struct mbhc_micbias_regs *micbias_regs)
Bhalchandra Gajare02d90cd2011-09-30 16:14:00 -07001829{
1830 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
Bhalchandra Gajare02d90cd2011-09-30 16:14:00 -07001831 unsigned int cfilt;
1832
Joonwoo Park0976d012011-12-22 11:48:18 -08001833 switch (tabla->micbias) {
Bhalchandra Gajare02d90cd2011-09-30 16:14:00 -07001834 case TABLA_MICBIAS1:
1835 cfilt = tabla->pdata->micbias.bias1_cfilt_sel;
1836 micbias_regs->mbhc_reg = TABLA_A_MICB_1_MBHC;
1837 micbias_regs->int_rbias = TABLA_A_MICB_1_INT_RBIAS;
1838 micbias_regs->ctl_reg = TABLA_A_MICB_1_CTL;
1839 break;
1840 case TABLA_MICBIAS2:
1841 cfilt = tabla->pdata->micbias.bias2_cfilt_sel;
1842 micbias_regs->mbhc_reg = TABLA_A_MICB_2_MBHC;
1843 micbias_regs->int_rbias = TABLA_A_MICB_2_INT_RBIAS;
1844 micbias_regs->ctl_reg = TABLA_A_MICB_2_CTL;
1845 break;
1846 case TABLA_MICBIAS3:
1847 cfilt = tabla->pdata->micbias.bias3_cfilt_sel;
1848 micbias_regs->mbhc_reg = TABLA_A_MICB_3_MBHC;
1849 micbias_regs->int_rbias = TABLA_A_MICB_3_INT_RBIAS;
1850 micbias_regs->ctl_reg = TABLA_A_MICB_3_CTL;
1851 break;
1852 case TABLA_MICBIAS4:
1853 cfilt = tabla->pdata->micbias.bias4_cfilt_sel;
Joonwoo Park6c1ebb62012-01-16 19:08:43 -08001854 micbias_regs->mbhc_reg = tabla->reg_addr.micb_4_mbhc;
1855 micbias_regs->int_rbias = tabla->reg_addr.micb_4_int_rbias;
1856 micbias_regs->ctl_reg = tabla->reg_addr.micb_4_ctl;
Bhalchandra Gajare02d90cd2011-09-30 16:14:00 -07001857 break;
1858 default:
1859 /* Should never reach here */
1860 pr_err("%s: Invalid MIC BIAS for MBHC\n", __func__);
Jordan Crouse239d8412011-11-23 11:47:02 -07001861 return;
Bhalchandra Gajare02d90cd2011-09-30 16:14:00 -07001862 }
1863
Bhalchandra Gajare19d9c132011-11-18 14:57:08 -08001864 micbias_regs->cfilt_sel = cfilt;
1865
Bhalchandra Gajare02d90cd2011-09-30 16:14:00 -07001866 switch (cfilt) {
1867 case TABLA_CFILT1_SEL:
1868 micbias_regs->cfilt_val = TABLA_A_MICB_CFILT_1_VAL;
1869 micbias_regs->cfilt_ctl = TABLA_A_MICB_CFILT_1_CTL;
Joonwoo Park0976d012011-12-22 11:48:18 -08001870 tabla->mbhc_data.micb_mv = tabla->pdata->micbias.cfilt1_mv;
Bhalchandra Gajare02d90cd2011-09-30 16:14:00 -07001871 break;
1872 case TABLA_CFILT2_SEL:
1873 micbias_regs->cfilt_val = TABLA_A_MICB_CFILT_2_VAL;
1874 micbias_regs->cfilt_ctl = TABLA_A_MICB_CFILT_2_CTL;
Joonwoo Park0976d012011-12-22 11:48:18 -08001875 tabla->mbhc_data.micb_mv = tabla->pdata->micbias.cfilt2_mv;
Bhalchandra Gajare02d90cd2011-09-30 16:14:00 -07001876 break;
1877 case TABLA_CFILT3_SEL:
1878 micbias_regs->cfilt_val = TABLA_A_MICB_CFILT_3_VAL;
1879 micbias_regs->cfilt_ctl = TABLA_A_MICB_CFILT_3_CTL;
Joonwoo Park0976d012011-12-22 11:48:18 -08001880 tabla->mbhc_data.micb_mv = tabla->pdata->micbias.cfilt3_mv;
Bhalchandra Gajare02d90cd2011-09-30 16:14:00 -07001881 break;
1882 }
1883}
Santosh Mardie15e2302011-11-15 10:39:23 +05301884static const struct snd_soc_dapm_widget tabla_dapm_i2s_widgets[] = {
1885 SND_SOC_DAPM_SUPPLY("RX_I2S_CLK", TABLA_A_CDC_CLK_RX_I2S_CTL,
1886 4, 0, NULL, 0),
1887 SND_SOC_DAPM_SUPPLY("TX_I2S_CLK", TABLA_A_CDC_CLK_TX_I2S_CTL, 4,
1888 0, NULL, 0),
1889};
Bhalchandra Gajare02d90cd2011-09-30 16:14:00 -07001890
Kiran Kandi8b3a8302011-09-27 16:13:28 -07001891static int tabla_lineout_dac_event(struct snd_soc_dapm_widget *w,
1892 struct snd_kcontrol *kcontrol, int event)
1893{
1894 struct snd_soc_codec *codec = w->codec;
1895
1896 pr_debug("%s %s %d\n", __func__, w->name, event);
1897
1898 switch (event) {
1899 case SND_SOC_DAPM_PRE_PMU:
1900 snd_soc_update_bits(codec, w->reg, 0x40, 0x40);
1901 break;
1902
1903 case SND_SOC_DAPM_POST_PMD:
1904 snd_soc_update_bits(codec, w->reg, 0x40, 0x00);
1905 break;
1906 }
1907 return 0;
1908}
1909
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001910static const struct snd_soc_dapm_widget tabla_dapm_widgets[] = {
1911 /*RX stuff */
1912 SND_SOC_DAPM_OUTPUT("EAR"),
1913
Kiran Kandid2d86b52011-09-09 17:44:28 -07001914 SND_SOC_DAPM_PGA("EAR PA", TABLA_A_RX_EAR_EN, 4, 0, NULL, 0),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001915
Bradley Rubin229c6a52011-07-12 16:18:48 -07001916 SND_SOC_DAPM_MIXER("DAC1", TABLA_A_RX_EAR_EN, 6, 0, dac1_switch,
1917 ARRAY_SIZE(dac1_switch)),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001918
Bradley Rubin229c6a52011-07-12 16:18:48 -07001919 SND_SOC_DAPM_AIF_IN("SLIM RX1", "AIF1 Playback", 0, SND_SOC_NOPM, 0, 0),
1920 SND_SOC_DAPM_AIF_IN("SLIM RX2", "AIF1 Playback", 0, SND_SOC_NOPM, 0, 0),
Santosh Mardie15e2302011-11-15 10:39:23 +05301921 SND_SOC_DAPM_AIF_IN("SLIM RX3", "AIF1 Playback", 0, SND_SOC_NOPM, 0, 0),
1922 SND_SOC_DAPM_AIF_IN("SLIM RX4", "AIF1 Playback", 0, SND_SOC_NOPM, 0, 0),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001923
1924 /* Headphone */
1925 SND_SOC_DAPM_OUTPUT("HEADPHONE"),
Kiran Kandibf0b1ff2011-09-15 13:55:21 -07001926 SND_SOC_DAPM_PGA_E("HPHL", TABLA_A_RX_HPH_CNP_EN, 5, 0, NULL, 0,
Bhalchandra Gajared9ebb6c2011-10-03 19:54:41 -07001927 tabla_hph_pa_event, SND_SOC_DAPM_PRE_PMU |
1928 SND_SOC_DAPM_POST_PMD),
Bradley Rubin229c6a52011-07-12 16:18:48 -07001929 SND_SOC_DAPM_MIXER("HPHL DAC", TABLA_A_RX_HPH_L_DAC_CTL, 7, 0,
1930 hphl_switch, ARRAY_SIZE(hphl_switch)),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001931
Kiran Kandibf0b1ff2011-09-15 13:55:21 -07001932 SND_SOC_DAPM_PGA_E("HPHR", TABLA_A_RX_HPH_CNP_EN, 4, 0, NULL, 0,
Bhalchandra Gajared9ebb6c2011-10-03 19:54:41 -07001933 tabla_hph_pa_event, SND_SOC_DAPM_PRE_PMU |
1934 SND_SOC_DAPM_POST_PMD),
Kiran Kandi8b3a8302011-09-27 16:13:28 -07001935
1936 SND_SOC_DAPM_DAC_E("HPHR DAC", NULL, TABLA_A_RX_HPH_R_DAC_CTL, 7, 0,
1937 tabla_hphr_dac_event,
1938 SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001939
1940 /* Speaker */
Kiran Kandidb0a4b02011-08-23 09:32:09 -07001941 SND_SOC_DAPM_OUTPUT("LINEOUT1"),
1942 SND_SOC_DAPM_OUTPUT("LINEOUT2"),
1943 SND_SOC_DAPM_OUTPUT("LINEOUT3"),
1944 SND_SOC_DAPM_OUTPUT("LINEOUT4"),
1945 SND_SOC_DAPM_OUTPUT("LINEOUT5"),
Bradley Rubin74a9b4a2011-06-13 15:03:43 -07001946
Kiran Kandidb0a4b02011-08-23 09:32:09 -07001947 SND_SOC_DAPM_PGA_E("LINEOUT1 PA", TABLA_A_RX_LINE_CNP_EN, 0, 0, NULL,
1948 0, tabla_codec_enable_lineout, SND_SOC_DAPM_PRE_PMU |
1949 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
1950 SND_SOC_DAPM_PGA_E("LINEOUT2 PA", TABLA_A_RX_LINE_CNP_EN, 1, 0, NULL,
1951 0, tabla_codec_enable_lineout, SND_SOC_DAPM_PRE_PMU |
1952 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
1953 SND_SOC_DAPM_PGA_E("LINEOUT3 PA", TABLA_A_RX_LINE_CNP_EN, 2, 0, NULL,
1954 0, tabla_codec_enable_lineout, SND_SOC_DAPM_PRE_PMU |
1955 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
1956 SND_SOC_DAPM_PGA_E("LINEOUT4 PA", TABLA_A_RX_LINE_CNP_EN, 3, 0, NULL,
1957 0, tabla_codec_enable_lineout, SND_SOC_DAPM_PRE_PMU |
1958 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
1959 SND_SOC_DAPM_PGA_E("LINEOUT5 PA", TABLA_A_RX_LINE_CNP_EN, 4, 0, NULL, 0,
Bhalchandra Gajare0a8ad172011-08-12 13:32:22 -07001960 tabla_codec_enable_lineout, SND_SOC_DAPM_PRE_PMU |
1961 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
Bradley Rubin74a9b4a2011-06-13 15:03:43 -07001962
Kiran Kandi8b3a8302011-09-27 16:13:28 -07001963 SND_SOC_DAPM_DAC_E("LINEOUT1 DAC", NULL, TABLA_A_RX_LINE_1_DAC_CTL, 7, 0
1964 , tabla_lineout_dac_event,
1965 SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
1966 SND_SOC_DAPM_DAC_E("LINEOUT2 DAC", NULL, TABLA_A_RX_LINE_2_DAC_CTL, 7, 0
1967 , tabla_lineout_dac_event,
1968 SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
1969 SND_SOC_DAPM_DAC_E("LINEOUT3 DAC", NULL, TABLA_A_RX_LINE_3_DAC_CTL, 7, 0
1970 , tabla_lineout_dac_event,
1971 SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
1972 SND_SOC_DAPM_SWITCH("LINEOUT3 DAC GROUND", SND_SOC_NOPM, 0, 0,
1973 &lineout3_ground_switch),
1974 SND_SOC_DAPM_DAC_E("LINEOUT4 DAC", NULL, TABLA_A_RX_LINE_4_DAC_CTL, 7, 0
1975 , tabla_lineout_dac_event,
1976 SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
1977 SND_SOC_DAPM_SWITCH("LINEOUT4 DAC GROUND", SND_SOC_NOPM, 0, 0,
1978 &lineout4_ground_switch),
1979 SND_SOC_DAPM_DAC_E("LINEOUT5 DAC", NULL, TABLA_A_RX_LINE_5_DAC_CTL, 7, 0
1980 , tabla_lineout_dac_event,
1981 SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
Bradley Rubin74a9b4a2011-06-13 15:03:43 -07001982
Bradley Rubin229c6a52011-07-12 16:18:48 -07001983 SND_SOC_DAPM_MIXER_E("RX1 MIX1", TABLA_A_CDC_CLK_RX_B1_CTL, 0, 0, NULL,
1984 0, tabla_codec_reset_interpolator, SND_SOC_DAPM_PRE_PMU),
1985 SND_SOC_DAPM_MIXER_E("RX2 MIX1", TABLA_A_CDC_CLK_RX_B1_CTL, 1, 0, NULL,
1986 0, tabla_codec_reset_interpolator, SND_SOC_DAPM_PRE_PMU),
1987 SND_SOC_DAPM_MIXER_E("RX3 MIX1", TABLA_A_CDC_CLK_RX_B1_CTL, 2, 0, NULL,
1988 0, tabla_codec_reset_interpolator, SND_SOC_DAPM_PRE_PMU),
1989 SND_SOC_DAPM_MIXER_E("RX4 MIX1", TABLA_A_CDC_CLK_RX_B1_CTL, 3, 0, NULL,
1990 0, tabla_codec_reset_interpolator, SND_SOC_DAPM_PRE_PMU),
1991 SND_SOC_DAPM_MIXER_E("RX5 MIX1", TABLA_A_CDC_CLK_RX_B1_CTL, 4, 0, NULL,
1992 0, tabla_codec_reset_interpolator, SND_SOC_DAPM_PRE_PMU),
1993 SND_SOC_DAPM_MIXER_E("RX6 MIX1", TABLA_A_CDC_CLK_RX_B1_CTL, 5, 0, NULL,
1994 0, tabla_codec_reset_interpolator, SND_SOC_DAPM_PRE_PMU),
Bhalchandra Gajare0a8ad172011-08-12 13:32:22 -07001995 SND_SOC_DAPM_MIXER_E("RX7 MIX1", TABLA_A_CDC_CLK_RX_B1_CTL, 6, 0, NULL,
1996 0, tabla_codec_reset_interpolator, SND_SOC_DAPM_PRE_PMU),
Bradley Rubin74a9b4a2011-06-13 15:03:43 -07001997
Kiran Kandi8b3a8302011-09-27 16:13:28 -07001998
1999 SND_SOC_DAPM_MUX_E("RX4 DSM MUX", TABLA_A_CDC_CLK_RX_B1_CTL, 3, 0,
2000 &rx4_dsm_mux, tabla_codec_reset_interpolator,
2001 SND_SOC_DAPM_PRE_PMU),
2002
2003 SND_SOC_DAPM_MUX_E("RX6 DSM MUX", TABLA_A_CDC_CLK_RX_B1_CTL, 5, 0,
2004 &rx6_dsm_mux, tabla_codec_reset_interpolator,
2005 SND_SOC_DAPM_PRE_PMU),
2006
Bradley Rubin229c6a52011-07-12 16:18:48 -07002007 SND_SOC_DAPM_MIXER("RX1 CHAIN", TABLA_A_CDC_RX1_B6_CTL, 5, 0, NULL, 0),
2008 SND_SOC_DAPM_MIXER("RX2 CHAIN", TABLA_A_CDC_RX2_B6_CTL, 5, 0, NULL, 0),
2009
2010 SND_SOC_DAPM_MUX("RX1 MIX1 INP1", SND_SOC_NOPM, 0, 0,
2011 &rx_mix1_inp1_mux),
2012 SND_SOC_DAPM_MUX("RX1 MIX1 INP2", SND_SOC_NOPM, 0, 0,
2013 &rx_mix1_inp2_mux),
2014 SND_SOC_DAPM_MUX("RX2 MIX1 INP1", SND_SOC_NOPM, 0, 0,
2015 &rx2_mix1_inp1_mux),
2016 SND_SOC_DAPM_MUX("RX2 MIX1 INP2", SND_SOC_NOPM, 0, 0,
2017 &rx2_mix1_inp2_mux),
Bradley Rubin74a9b4a2011-06-13 15:03:43 -07002018 SND_SOC_DAPM_MUX("RX3 MIX1 INP1", SND_SOC_NOPM, 0, 0,
2019 &rx3_mix1_inp1_mux),
2020 SND_SOC_DAPM_MUX("RX3 MIX1 INP2", SND_SOC_NOPM, 0, 0,
2021 &rx3_mix1_inp2_mux),
2022 SND_SOC_DAPM_MUX("RX4 MIX1 INP1", SND_SOC_NOPM, 0, 0,
2023 &rx4_mix1_inp1_mux),
2024 SND_SOC_DAPM_MUX("RX4 MIX1 INP2", SND_SOC_NOPM, 0, 0,
2025 &rx4_mix1_inp2_mux),
2026 SND_SOC_DAPM_MUX("RX5 MIX1 INP1", SND_SOC_NOPM, 0, 0,
2027 &rx5_mix1_inp1_mux),
2028 SND_SOC_DAPM_MUX("RX5 MIX1 INP2", SND_SOC_NOPM, 0, 0,
2029 &rx5_mix1_inp2_mux),
2030 SND_SOC_DAPM_MUX("RX6 MIX1 INP1", SND_SOC_NOPM, 0, 0,
2031 &rx6_mix1_inp1_mux),
2032 SND_SOC_DAPM_MUX("RX6 MIX1 INP2", SND_SOC_NOPM, 0, 0,
2033 &rx6_mix1_inp2_mux),
Bhalchandra Gajare0a8ad172011-08-12 13:32:22 -07002034 SND_SOC_DAPM_MUX("RX7 MIX1 INP1", SND_SOC_NOPM, 0, 0,
2035 &rx7_mix1_inp1_mux),
2036 SND_SOC_DAPM_MUX("RX7 MIX1 INP2", SND_SOC_NOPM, 0, 0,
2037 &rx7_mix1_inp2_mux),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002038
Bradley Rubin229c6a52011-07-12 16:18:48 -07002039 SND_SOC_DAPM_SUPPLY("CP", TABLA_A_CP_EN, 0, 0,
2040 tabla_codec_enable_charge_pump, SND_SOC_DAPM_POST_PMU |
2041 SND_SOC_DAPM_PRE_PMD),
2042
Kiran Kandi6fae8bf2011-08-15 10:36:42 -07002043 SND_SOC_DAPM_SUPPLY("RX_BIAS", SND_SOC_NOPM, 0, 0,
2044 tabla_codec_enable_rx_bias, SND_SOC_DAPM_PRE_PMU |
2045 SND_SOC_DAPM_POST_PMD),
2046
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002047 /* TX */
Bradley Rubin229c6a52011-07-12 16:18:48 -07002048
Bradley Rubine1d08622011-07-20 18:01:35 -07002049 SND_SOC_DAPM_SUPPLY("CDC_CONN", TABLA_A_CDC_CLK_OTHR_CTL, 2, 0, NULL,
2050 0),
2051
Bradley Rubin229c6a52011-07-12 16:18:48 -07002052 SND_SOC_DAPM_SUPPLY("LDO_H", TABLA_A_LDO_H_MODE_1, 7, 0,
2053 tabla_codec_enable_ldo_h, SND_SOC_DAPM_POST_PMU),
2054
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002055 SND_SOC_DAPM_INPUT("AMIC1"),
2056 SND_SOC_DAPM_MICBIAS_E("MIC BIAS1 External", TABLA_A_MICB_1_CTL, 7, 0,
2057 tabla_codec_enable_micbias, SND_SOC_DAPM_PRE_PMU |
Bradley Rubin4d09cf42011-08-17 17:59:16 -07002058 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
Bradley Rubin229c6a52011-07-12 16:18:48 -07002059 SND_SOC_DAPM_MICBIAS_E("MIC BIAS1 Internal1", TABLA_A_MICB_1_CTL, 7, 0,
2060 tabla_codec_enable_micbias, SND_SOC_DAPM_PRE_PMU |
Bradley Rubin4d09cf42011-08-17 17:59:16 -07002061 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
Bradley Rubin229c6a52011-07-12 16:18:48 -07002062 SND_SOC_DAPM_MICBIAS_E("MIC BIAS1 Internal2", TABLA_A_MICB_1_CTL, 7, 0,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002063 tabla_codec_enable_micbias, SND_SOC_DAPM_PRE_PMU |
Bradley Rubin4d09cf42011-08-17 17:59:16 -07002064 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002065 SND_SOC_DAPM_ADC_E("ADC1", NULL, TABLA_A_TX_1_2_EN, 7, 0,
2066 tabla_codec_enable_adc, SND_SOC_DAPM_PRE_PMU |
2067 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
2068
Bhalchandra Gajarecc6ffa02011-07-14 18:35:41 -07002069 SND_SOC_DAPM_INPUT("AMIC3"),
2070 SND_SOC_DAPM_ADC_E("ADC3", NULL, TABLA_A_TX_3_4_EN, 7, 0,
2071 tabla_codec_enable_adc, SND_SOC_DAPM_PRE_PMU |
2072 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
2073
2074 SND_SOC_DAPM_INPUT("AMIC4"),
2075 SND_SOC_DAPM_ADC_E("ADC4", NULL, TABLA_A_TX_3_4_EN, 3, 0,
2076 tabla_codec_enable_adc, SND_SOC_DAPM_PRE_PMU |
2077 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
2078
Bhalchandra Gajare0d77e1b2011-07-08 10:54:14 -07002079 SND_SOC_DAPM_INPUT("AMIC5"),
2080 SND_SOC_DAPM_ADC_E("ADC5", NULL, TABLA_A_TX_5_6_EN, 7, 0,
2081 tabla_codec_enable_adc, SND_SOC_DAPM_POST_PMU),
2082
2083 SND_SOC_DAPM_INPUT("AMIC6"),
2084 SND_SOC_DAPM_ADC_E("ADC6", NULL, TABLA_A_TX_5_6_EN, 3, 0,
2085 tabla_codec_enable_adc, SND_SOC_DAPM_POST_PMU),
2086
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002087 SND_SOC_DAPM_MUX_E("DEC1 MUX", TABLA_A_CDC_CLK_TX_CLK_EN_B1_CTL, 0, 0,
Bradley Rubine1d08622011-07-20 18:01:35 -07002088 &dec1_mux, tabla_codec_enable_dec, SND_SOC_DAPM_PRE_PMU),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002089
Bhalchandra Gajare0d77e1b2011-07-08 10:54:14 -07002090 SND_SOC_DAPM_MUX_E("DEC2 MUX", TABLA_A_CDC_CLK_TX_CLK_EN_B1_CTL, 1, 0,
Bradley Rubine1d08622011-07-20 18:01:35 -07002091 &dec2_mux, tabla_codec_enable_dec, SND_SOC_DAPM_PRE_PMU),
Bhalchandra Gajare0d77e1b2011-07-08 10:54:14 -07002092
Bhalchandra Gajarecc6ffa02011-07-14 18:35:41 -07002093 SND_SOC_DAPM_MUX_E("DEC3 MUX", TABLA_A_CDC_CLK_TX_CLK_EN_B1_CTL, 2, 0,
Bradley Rubine1d08622011-07-20 18:01:35 -07002094 &dec3_mux, tabla_codec_enable_dec, SND_SOC_DAPM_PRE_PMU),
Bhalchandra Gajarecc6ffa02011-07-14 18:35:41 -07002095
2096 SND_SOC_DAPM_MUX_E("DEC4 MUX", TABLA_A_CDC_CLK_TX_CLK_EN_B1_CTL, 3, 0,
Bradley Rubine1d08622011-07-20 18:01:35 -07002097 &dec4_mux, tabla_codec_enable_dec, SND_SOC_DAPM_PRE_PMU),
Bhalchandra Gajarecc6ffa02011-07-14 18:35:41 -07002098
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002099 SND_SOC_DAPM_MUX_E("DEC5 MUX", TABLA_A_CDC_CLK_TX_CLK_EN_B1_CTL, 4, 0,
Bradley Rubine1d08622011-07-20 18:01:35 -07002100 &dec5_mux, tabla_codec_enable_dec, SND_SOC_DAPM_PRE_PMU),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002101
2102 SND_SOC_DAPM_MUX_E("DEC6 MUX", TABLA_A_CDC_CLK_TX_CLK_EN_B1_CTL, 5, 0,
Bradley Rubine1d08622011-07-20 18:01:35 -07002103 &dec6_mux, tabla_codec_enable_dec, SND_SOC_DAPM_PRE_PMU),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002104
2105 SND_SOC_DAPM_MUX_E("DEC7 MUX", TABLA_A_CDC_CLK_TX_CLK_EN_B1_CTL, 6, 0,
Bradley Rubine1d08622011-07-20 18:01:35 -07002106 &dec7_mux, tabla_codec_enable_dec, SND_SOC_DAPM_PRE_PMU),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002107
Bhalchandra Gajare0d77e1b2011-07-08 10:54:14 -07002108 SND_SOC_DAPM_MUX_E("DEC8 MUX", TABLA_A_CDC_CLK_TX_CLK_EN_B1_CTL, 7, 0,
Bradley Rubine1d08622011-07-20 18:01:35 -07002109 &dec8_mux, tabla_codec_enable_dec, SND_SOC_DAPM_PRE_PMU),
Bhalchandra Gajare0d77e1b2011-07-08 10:54:14 -07002110
Bhalchandra Gajarecc6ffa02011-07-14 18:35:41 -07002111 SND_SOC_DAPM_MUX_E("DEC9 MUX", TABLA_A_CDC_CLK_TX_CLK_EN_B2_CTL, 0, 0,
Bradley Rubine1d08622011-07-20 18:01:35 -07002112 &dec9_mux, tabla_codec_enable_dec, SND_SOC_DAPM_PRE_PMU),
Bhalchandra Gajarecc6ffa02011-07-14 18:35:41 -07002113
2114 SND_SOC_DAPM_MUX_E("DEC10 MUX", TABLA_A_CDC_CLK_TX_CLK_EN_B2_CTL, 1, 0,
Bradley Rubine1d08622011-07-20 18:01:35 -07002115 &dec10_mux, tabla_codec_enable_dec, SND_SOC_DAPM_PRE_PMU),
Bhalchandra Gajarecc6ffa02011-07-14 18:35:41 -07002116
Bradley Rubin229c6a52011-07-12 16:18:48 -07002117 SND_SOC_DAPM_MUX("ANC1 MUX", SND_SOC_NOPM, 0, 0, &anc1_mux),
2118 SND_SOC_DAPM_MUX("ANC2 MUX", SND_SOC_NOPM, 0, 0, &anc2_mux),
2119
2120 SND_SOC_DAPM_MIXER_E("ANC", SND_SOC_NOPM, 0, 0, NULL, 0,
2121 tabla_codec_enable_anc, SND_SOC_DAPM_PRE_PMU |
2122 SND_SOC_DAPM_POST_PMD),
2123
2124 SND_SOC_DAPM_MUX("ANC1 FB MUX", SND_SOC_NOPM, 0, 0, &anc1_fb_mux),
2125
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002126 SND_SOC_DAPM_INPUT("AMIC2"),
2127 SND_SOC_DAPM_MICBIAS_E("MIC BIAS2 External", TABLA_A_MICB_2_CTL, 7, 0,
2128 tabla_codec_enable_micbias, SND_SOC_DAPM_PRE_PMU |
Bradley Rubin4d09cf42011-08-17 17:59:16 -07002129 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
Bradley Rubin229c6a52011-07-12 16:18:48 -07002130 SND_SOC_DAPM_MICBIAS_E("MIC BIAS2 Internal1", TABLA_A_MICB_2_CTL, 7, 0,
2131 tabla_codec_enable_micbias, SND_SOC_DAPM_PRE_PMU |
Bradley Rubin4d09cf42011-08-17 17:59:16 -07002132 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
Bradley Rubin229c6a52011-07-12 16:18:48 -07002133 SND_SOC_DAPM_MICBIAS_E("MIC BIAS2 Internal2", TABLA_A_MICB_2_CTL, 7, 0,
2134 tabla_codec_enable_micbias, SND_SOC_DAPM_PRE_PMU |
Bradley Rubin4d09cf42011-08-17 17:59:16 -07002135 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
Bradley Rubin229c6a52011-07-12 16:18:48 -07002136 SND_SOC_DAPM_MICBIAS_E("MIC BIAS2 Internal3", TABLA_A_MICB_2_CTL, 7, 0,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002137 tabla_codec_enable_micbias, SND_SOC_DAPM_PRE_PMU |
Bradley Rubin4d09cf42011-08-17 17:59:16 -07002138 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002139 SND_SOC_DAPM_MICBIAS_E("MIC BIAS3 External", TABLA_A_MICB_3_CTL, 7, 0,
2140 tabla_codec_enable_micbias, SND_SOC_DAPM_PRE_PMU |
Bradley Rubin4d09cf42011-08-17 17:59:16 -07002141 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
Bradley Rubin229c6a52011-07-12 16:18:48 -07002142 SND_SOC_DAPM_MICBIAS_E("MIC BIAS3 Internal1", TABLA_A_MICB_3_CTL, 7, 0,
2143 tabla_codec_enable_micbias, SND_SOC_DAPM_PRE_PMU |
Bradley Rubin4d09cf42011-08-17 17:59:16 -07002144 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
Bradley Rubin229c6a52011-07-12 16:18:48 -07002145 SND_SOC_DAPM_MICBIAS_E("MIC BIAS3 Internal2", TABLA_A_MICB_3_CTL, 7, 0,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002146 tabla_codec_enable_micbias, SND_SOC_DAPM_PRE_PMU |
Bradley Rubin4d09cf42011-08-17 17:59:16 -07002147 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002148 SND_SOC_DAPM_ADC_E("ADC2", NULL, TABLA_A_TX_1_2_EN, 3, 0,
2149 tabla_codec_enable_adc, SND_SOC_DAPM_PRE_PMU |
2150 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
2151
2152 SND_SOC_DAPM_MUX("SLIM TX1 MUX", SND_SOC_NOPM, 0, 0, &sb_tx1_mux),
2153 SND_SOC_DAPM_AIF_OUT("SLIM TX1", "AIF1 Capture", NULL, SND_SOC_NOPM,
2154 0, 0),
2155
2156 SND_SOC_DAPM_MUX("SLIM TX5 MUX", SND_SOC_NOPM, 0, 0, &sb_tx5_mux),
2157 SND_SOC_DAPM_AIF_OUT("SLIM TX5", "AIF1 Capture", NULL, SND_SOC_NOPM,
2158 4, 0),
2159
2160 SND_SOC_DAPM_MUX("SLIM TX6 MUX", SND_SOC_NOPM, 0, 0, &sb_tx6_mux),
2161 SND_SOC_DAPM_AIF_OUT("SLIM TX6", "AIF1 Capture", NULL, SND_SOC_NOPM,
2162 5, 0),
2163
2164 SND_SOC_DAPM_MUX("SLIM TX7 MUX", SND_SOC_NOPM, 0, 0, &sb_tx7_mux),
2165 SND_SOC_DAPM_AIF_OUT("SLIM TX7", "AIF1 Capture", NULL, SND_SOC_NOPM,
2166 0, 0),
2167
2168 SND_SOC_DAPM_MUX("SLIM TX8 MUX", SND_SOC_NOPM, 0, 0, &sb_tx8_mux),
2169 SND_SOC_DAPM_AIF_OUT("SLIM TX8", "AIF1 Capture", NULL, SND_SOC_NOPM,
2170 0, 0),
2171
Kiran Kandi3426e512011-09-13 22:50:10 -07002172 SND_SOC_DAPM_MUX("SLIM TX9 MUX", SND_SOC_NOPM, 0, 0, &sb_tx9_mux),
2173 SND_SOC_DAPM_AIF_OUT("SLIM TX9", "AIF1 Capture", NULL, SND_SOC_NOPM,
2174 0, 0),
2175
2176 SND_SOC_DAPM_MUX("SLIM TX10 MUX", SND_SOC_NOPM, 0, 0, &sb_tx10_mux),
2177 SND_SOC_DAPM_AIF_OUT("SLIM TX10", "AIF1 Capture", NULL, SND_SOC_NOPM,
2178 0, 0),
2179
Kiran Kandicf45f6a2011-07-17 21:10:19 -07002180 /* Digital Mic Inputs */
Bhalchandra Gajare7cf018e2011-08-11 18:58:32 -07002181 SND_SOC_DAPM_ADC_E("DMIC1", NULL, SND_SOC_NOPM, 0, 0,
2182 tabla_codec_enable_dmic, SND_SOC_DAPM_PRE_PMU |
2183 SND_SOC_DAPM_POST_PMD),
2184
2185 SND_SOC_DAPM_ADC_E("DMIC2", NULL, SND_SOC_NOPM, 0, 0,
2186 tabla_codec_enable_dmic, SND_SOC_DAPM_PRE_PMU |
2187 SND_SOC_DAPM_POST_PMD),
2188
2189 SND_SOC_DAPM_ADC_E("DMIC3", NULL, SND_SOC_NOPM, 0, 0,
2190 tabla_codec_enable_dmic, SND_SOC_DAPM_PRE_PMU |
2191 SND_SOC_DAPM_POST_PMD),
2192
2193 SND_SOC_DAPM_ADC_E("DMIC4", NULL, SND_SOC_NOPM, 0, 0,
2194 tabla_codec_enable_dmic, SND_SOC_DAPM_PRE_PMU |
2195 SND_SOC_DAPM_POST_PMD),
2196
2197 SND_SOC_DAPM_ADC_E("DMIC5", NULL, SND_SOC_NOPM, 0, 0,
2198 tabla_codec_enable_dmic, SND_SOC_DAPM_PRE_PMU |
2199 SND_SOC_DAPM_POST_PMD),
2200
2201 SND_SOC_DAPM_ADC_E("DMIC6", NULL, SND_SOC_NOPM, 0, 0,
2202 tabla_codec_enable_dmic, SND_SOC_DAPM_PRE_PMU |
2203 SND_SOC_DAPM_POST_PMD),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002204
2205 /* Sidetone */
2206 SND_SOC_DAPM_MUX("IIR1 INP1 MUX", SND_SOC_NOPM, 0, 0, &iir1_inp1_mux),
2207 SND_SOC_DAPM_PGA("IIR1", TABLA_A_CDC_CLK_SD_CTL, 0, 0, NULL, 0),
2208};
2209
Joonwoo Park6c1ebb62012-01-16 19:08:43 -08002210static const struct snd_soc_dapm_widget tabla_1_x_dapm_widgets[] = {
2211 SND_SOC_DAPM_MICBIAS_E("MIC BIAS4 External", TABLA_1_A_MICB_4_CTL, 7,
2212 0, tabla_codec_enable_micbias,
2213 SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
2214 SND_SOC_DAPM_POST_PMD),
2215};
2216
2217static const struct snd_soc_dapm_widget tabla_2_higher_dapm_widgets[] = {
2218 SND_SOC_DAPM_MICBIAS_E("MIC BIAS4 External", TABLA_2_A_MICB_4_CTL, 7,
2219 0, tabla_codec_enable_micbias,
2220 SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
2221 SND_SOC_DAPM_POST_PMD),
2222};
2223
Santosh Mardie15e2302011-11-15 10:39:23 +05302224static const struct snd_soc_dapm_route audio_i2s_map[] = {
2225 {"RX_I2S_CLK", NULL, "CDC_CONN"},
2226 {"SLIM RX1", NULL, "RX_I2S_CLK"},
2227 {"SLIM RX2", NULL, "RX_I2S_CLK"},
2228 {"SLIM RX3", NULL, "RX_I2S_CLK"},
2229 {"SLIM RX4", NULL, "RX_I2S_CLK"},
2230
2231 {"SLIM TX7", NULL, "TX_I2S_CLK"},
2232 {"SLIM TX8", NULL, "TX_I2S_CLK"},
2233 {"SLIM TX9", NULL, "TX_I2S_CLK"},
2234 {"SLIM TX10", NULL, "TX_I2S_CLK"},
2235};
2236
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002237static const struct snd_soc_dapm_route audio_map[] = {
2238 /* SLIMBUS Connections */
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002239
2240 {"SLIM TX1", NULL, "SLIM TX1 MUX"},
2241 {"SLIM TX1 MUX", "DEC1", "DEC1 MUX"},
2242
2243 {"SLIM TX5", NULL, "SLIM TX5 MUX"},
2244 {"SLIM TX5 MUX", "DEC5", "DEC5 MUX"},
2245
2246 {"SLIM TX6", NULL, "SLIM TX6 MUX"},
2247 {"SLIM TX6 MUX", "DEC6", "DEC6 MUX"},
2248
2249 {"SLIM TX7", NULL, "SLIM TX7 MUX"},
2250 {"SLIM TX7 MUX", "DEC1", "DEC1 MUX"},
Bhalchandra Gajare0d77e1b2011-07-08 10:54:14 -07002251 {"SLIM TX7 MUX", "DEC2", "DEC2 MUX"},
Bhalchandra Gajarecc6ffa02011-07-14 18:35:41 -07002252 {"SLIM TX7 MUX", "DEC3", "DEC3 MUX"},
2253 {"SLIM TX7 MUX", "DEC4", "DEC4 MUX"},
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002254 {"SLIM TX7 MUX", "DEC5", "DEC5 MUX"},
2255 {"SLIM TX7 MUX", "DEC6", "DEC6 MUX"},
Bhalchandra Gajare0d77e1b2011-07-08 10:54:14 -07002256 {"SLIM TX7 MUX", "DEC7", "DEC7 MUX"},
2257 {"SLIM TX7 MUX", "DEC8", "DEC8 MUX"},
Bhalchandra Gajarecc6ffa02011-07-14 18:35:41 -07002258 {"SLIM TX7 MUX", "DEC9", "DEC9 MUX"},
2259 {"SLIM TX7 MUX", "DEC10", "DEC10 MUX"},
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002260
2261 {"SLIM TX8", NULL, "SLIM TX8 MUX"},
Kiran Kandicf45f6a2011-07-17 21:10:19 -07002262 {"SLIM TX8 MUX", "DEC1", "DEC1 MUX"},
2263 {"SLIM TX8 MUX", "DEC2", "DEC2 MUX"},
2264 {"SLIM TX8 MUX", "DEC3", "DEC3 MUX"},
Bhalchandra Gajare9ec83cd2011-09-23 17:25:07 -07002265 {"SLIM TX8 MUX", "DEC4", "DEC4 MUX"},
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002266 {"SLIM TX8 MUX", "DEC5", "DEC5 MUX"},
2267 {"SLIM TX8 MUX", "DEC6", "DEC6 MUX"},
2268
Kiran Kandi3426e512011-09-13 22:50:10 -07002269 {"SLIM TX9", NULL, "SLIM TX9 MUX"},
2270 {"SLIM TX9 MUX", "DEC1", "DEC1 MUX"},
2271 {"SLIM TX9 MUX", "DEC2", "DEC2 MUX"},
2272 {"SLIM TX9 MUX", "DEC3", "DEC3 MUX"},
2273 {"SLIM TX9 MUX", "DEC4", "DEC4 MUX"},
2274 {"SLIM TX9 MUX", "DEC5", "DEC5 MUX"},
2275 {"SLIM TX9 MUX", "DEC6", "DEC6 MUX"},
2276 {"SLIM TX9 MUX", "DEC7", "DEC7 MUX"},
2277 {"SLIM TX9 MUX", "DEC8", "DEC8 MUX"},
2278 {"SLIM TX9 MUX", "DEC9", "DEC9 MUX"},
2279 {"SLIM TX9 MUX", "DEC10", "DEC10 MUX"},
2280
2281 {"SLIM TX10", NULL, "SLIM TX10 MUX"},
2282 {"SLIM TX10 MUX", "DEC1", "DEC1 MUX"},
2283 {"SLIM TX10 MUX", "DEC2", "DEC2 MUX"},
2284 {"SLIM TX10 MUX", "DEC3", "DEC3 MUX"},
2285 {"SLIM TX10 MUX", "DEC4", "DEC4 MUX"},
2286 {"SLIM TX10 MUX", "DEC5", "DEC5 MUX"},
2287 {"SLIM TX10 MUX", "DEC6", "DEC6 MUX"},
2288 {"SLIM TX10 MUX", "DEC7", "DEC7 MUX"},
2289 {"SLIM TX10 MUX", "DEC8", "DEC8 MUX"},
2290 {"SLIM TX10 MUX", "DEC9", "DEC9 MUX"},
2291 {"SLIM TX10 MUX", "DEC10", "DEC10 MUX"},
2292
2293
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002294 /* Earpiece (RX MIX1) */
2295 {"EAR", NULL, "EAR PA"},
Kiran Kandiac034ac2011-07-29 16:39:08 -07002296 {"EAR PA", NULL, "DAC1"},
Bradley Rubin229c6a52011-07-12 16:18:48 -07002297 {"DAC1", NULL, "CP"},
2298
2299 {"ANC1 FB MUX", "EAR_HPH_L", "RX1 MIX1"},
2300 {"ANC1 FB MUX", "EAR_LINE_1", "RX2 MIX1"},
2301 {"ANC", NULL, "ANC1 FB MUX"},
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002302
2303 /* Headset (RX MIX1 and RX MIX2) */
2304 {"HEADPHONE", NULL, "HPHL"},
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002305 {"HEADPHONE", NULL, "HPHR"},
Bradley Rubin229c6a52011-07-12 16:18:48 -07002306
2307 {"HPHL", NULL, "HPHL DAC"},
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002308 {"HPHR", NULL, "HPHR DAC"},
Bradley Rubin229c6a52011-07-12 16:18:48 -07002309
2310 {"HPHL DAC", NULL, "CP"},
2311 {"HPHR DAC", NULL, "CP"},
2312
2313 {"ANC", NULL, "ANC1 MUX"},
2314 {"ANC", NULL, "ANC2 MUX"},
2315 {"ANC1 MUX", "ADC1", "ADC1"},
2316 {"ANC1 MUX", "ADC2", "ADC2"},
2317 {"ANC1 MUX", "ADC3", "ADC3"},
2318 {"ANC1 MUX", "ADC4", "ADC4"},
2319 {"ANC2 MUX", "ADC1", "ADC1"},
2320 {"ANC2 MUX", "ADC2", "ADC2"},
2321 {"ANC2 MUX", "ADC3", "ADC3"},
2322 {"ANC2 MUX", "ADC4", "ADC4"},
2323
Bradley Rubine1d08622011-07-20 18:01:35 -07002324 {"ANC", NULL, "CDC_CONN"},
2325
Bradley Rubin229c6a52011-07-12 16:18:48 -07002326 {"DAC1", "Switch", "RX1 CHAIN"},
2327 {"HPHL DAC", "Switch", "RX1 CHAIN"},
Kiran Kandi8b3a8302011-09-27 16:13:28 -07002328 {"HPHR DAC", NULL, "RX2 CHAIN"},
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002329
Kiran Kandidb0a4b02011-08-23 09:32:09 -07002330 {"LINEOUT1", NULL, "LINEOUT1 PA"},
2331 {"LINEOUT2", NULL, "LINEOUT2 PA"},
2332 {"LINEOUT3", NULL, "LINEOUT3 PA"},
2333 {"LINEOUT4", NULL, "LINEOUT4 PA"},
2334 {"LINEOUT5", NULL, "LINEOUT5 PA"},
Bradley Rubin74a9b4a2011-06-13 15:03:43 -07002335
Kiran Kandidb0a4b02011-08-23 09:32:09 -07002336 {"LINEOUT1 PA", NULL, "LINEOUT1 DAC"},
2337 {"LINEOUT2 PA", NULL, "LINEOUT2 DAC"},
2338 {"LINEOUT3 PA", NULL, "LINEOUT3 DAC"},
2339 {"LINEOUT4 PA", NULL, "LINEOUT4 DAC"},
2340 {"LINEOUT5 PA", NULL, "LINEOUT5 DAC"},
Bradley Rubin74a9b4a2011-06-13 15:03:43 -07002341
Kiran Kandi8b3a8302011-09-27 16:13:28 -07002342 {"LINEOUT1 DAC", NULL, "RX3 MIX1"},
2343 {"LINEOUT5 DAC", NULL, "RX7 MIX1"},
2344
Bradley Rubin229c6a52011-07-12 16:18:48 -07002345 {"RX1 CHAIN", NULL, "RX1 MIX1"},
2346 {"RX2 CHAIN", NULL, "RX2 MIX1"},
2347 {"RX1 CHAIN", NULL, "ANC"},
2348 {"RX2 CHAIN", NULL, "ANC"},
Bradley Rubin74a9b4a2011-06-13 15:03:43 -07002349
Kiran Kandi6fae8bf2011-08-15 10:36:42 -07002350 {"CP", NULL, "RX_BIAS"},
2351 {"LINEOUT1 DAC", NULL, "RX_BIAS"},
2352 {"LINEOUT2 DAC", NULL, "RX_BIAS"},
2353 {"LINEOUT3 DAC", NULL, "RX_BIAS"},
2354 {"LINEOUT4 DAC", NULL, "RX_BIAS"},
Kiran Kandi8b3a8302011-09-27 16:13:28 -07002355 {"LINEOUT5 DAC", NULL, "RX_BIAS"},
Kiran Kandi6fae8bf2011-08-15 10:36:42 -07002356
Bradley Rubin229c6a52011-07-12 16:18:48 -07002357 {"RX1 MIX1", NULL, "RX1 MIX1 INP1"},
2358 {"RX1 MIX1", NULL, "RX1 MIX1 INP2"},
2359 {"RX2 MIX1", NULL, "RX2 MIX1 INP1"},
2360 {"RX2 MIX1", NULL, "RX2 MIX1 INP2"},
Bradley Rubin74a9b4a2011-06-13 15:03:43 -07002361 {"RX3 MIX1", NULL, "RX3 MIX1 INP1"},
2362 {"RX3 MIX1", NULL, "RX3 MIX1 INP2"},
2363 {"RX4 MIX1", NULL, "RX4 MIX1 INP1"},
2364 {"RX4 MIX1", NULL, "RX4 MIX1 INP2"},
2365 {"RX5 MIX1", NULL, "RX5 MIX1 INP1"},
2366 {"RX5 MIX1", NULL, "RX5 MIX1 INP2"},
2367 {"RX6 MIX1", NULL, "RX6 MIX1 INP1"},
2368 {"RX6 MIX1", NULL, "RX6 MIX1 INP2"},
Bhalchandra Gajare0a8ad172011-08-12 13:32:22 -07002369 {"RX7 MIX1", NULL, "RX7 MIX1 INP1"},
2370 {"RX7 MIX1", NULL, "RX7 MIX1 INP2"},
Bradley Rubin74a9b4a2011-06-13 15:03:43 -07002371
Bradley Rubin229c6a52011-07-12 16:18:48 -07002372 {"RX1 MIX1 INP1", "RX1", "SLIM RX1"},
2373 {"RX1 MIX1 INP1", "RX2", "SLIM RX2"},
Santosh Mardie15e2302011-11-15 10:39:23 +05302374 {"RX1 MIX1 INP1", "RX3", "SLIM RX3"},
2375 {"RX1 MIX1 INP1", "RX4", "SLIM RX4"},
Bradley Rubin229c6a52011-07-12 16:18:48 -07002376 {"RX1 MIX1 INP1", "IIR1", "IIR1"},
2377 {"RX1 MIX1 INP2", "RX1", "SLIM RX1"},
2378 {"RX1 MIX1 INP2", "RX2", "SLIM RX2"},
Santosh Mardie15e2302011-11-15 10:39:23 +05302379 {"RX1 MIX1 INP2", "RX3", "SLIM RX3"},
2380 {"RX1 MIX1 INP2", "RX4", "SLIM RX4"},
Bradley Rubin229c6a52011-07-12 16:18:48 -07002381 {"RX1 MIX1 INP2", "IIR1", "IIR1"},
2382 {"RX2 MIX1 INP1", "RX1", "SLIM RX1"},
2383 {"RX2 MIX1 INP1", "RX2", "SLIM RX2"},
Santosh Mardie15e2302011-11-15 10:39:23 +05302384 {"RX2 MIX1 INP1", "RX3", "SLIM RX3"},
2385 {"RX2 MIX1 INP1", "RX4", "SLIM RX4"},
Patrick Lai16261e82011-09-30 13:25:52 -07002386 {"RX2 MIX1 INP1", "IIR1", "IIR1"},
Bradley Rubin229c6a52011-07-12 16:18:48 -07002387 {"RX2 MIX1 INP2", "RX1", "SLIM RX1"},
2388 {"RX2 MIX1 INP2", "RX2", "SLIM RX2"},
Santosh Mardie15e2302011-11-15 10:39:23 +05302389 {"RX2 MIX1 INP2", "RX3", "SLIM RX3"},
2390 {"RX2 MIX1 INP2", "RX4", "SLIM RX4"},
Patrick Lai16261e82011-09-30 13:25:52 -07002391 {"RX2 MIX1 INP2", "IIR1", "IIR1"},
Bradley Rubin229c6a52011-07-12 16:18:48 -07002392 {"RX3 MIX1 INP1", "RX1", "SLIM RX1"},
2393 {"RX3 MIX1 INP1", "RX2", "SLIM RX2"},
Santosh Mardie15e2302011-11-15 10:39:23 +05302394 {"RX3 MIX1 INP1", "RX3", "SLIM RX3"},
2395 {"RX3 MIX1 INP1", "RX4", "SLIM RX4"},
Patrick Lai16261e82011-09-30 13:25:52 -07002396 {"RX3 MIX1 INP1", "IIR1", "IIR1"},
Bradley Rubin229c6a52011-07-12 16:18:48 -07002397 {"RX3 MIX1 INP2", "RX1", "SLIM RX1"},
2398 {"RX3 MIX1 INP2", "RX2", "SLIM RX2"},
Santosh Mardie15e2302011-11-15 10:39:23 +05302399 {"RX3 MIX1 INP2", "RX3", "SLIM RX3"},
2400 {"RX3 MIX1 INP2", "RX4", "SLIM RX4"},
Patrick Lai16261e82011-09-30 13:25:52 -07002401 {"RX3 MIX1 INP2", "IIR1", "IIR1"},
Bradley Rubin229c6a52011-07-12 16:18:48 -07002402 {"RX4 MIX1 INP1", "RX1", "SLIM RX1"},
2403 {"RX4 MIX1 INP1", "RX2", "SLIM RX2"},
Santosh Mardie15e2302011-11-15 10:39:23 +05302404 {"RX4 MIX1 INP1", "RX3", "SLIM RX3"},
2405 {"RX4 MIX1 INP1", "RX4", "SLIM RX4"},
Patrick Lai16261e82011-09-30 13:25:52 -07002406 {"RX4 MIX1 INP1", "IIR1", "IIR1"},
Bradley Rubin229c6a52011-07-12 16:18:48 -07002407 {"RX4 MIX1 INP2", "RX1", "SLIM RX1"},
2408 {"RX4 MIX1 INP2", "RX2", "SLIM RX2"},
Santosh Mardie15e2302011-11-15 10:39:23 +05302409 {"RX4 MIX1 INP2", "RX3", "SLIM RX3"},
2410 {"RX4 MIX1 INP2", "RX4", "SLIM RX4"},
Patrick Lai16261e82011-09-30 13:25:52 -07002411 {"RX4 MIX1 INP2", "IIR1", "IIR1"},
Bradley Rubin229c6a52011-07-12 16:18:48 -07002412 {"RX5 MIX1 INP1", "RX1", "SLIM RX1"},
2413 {"RX5 MIX1 INP1", "RX2", "SLIM RX2"},
Santosh Mardie15e2302011-11-15 10:39:23 +05302414 {"RX5 MIX1 INP1", "RX3", "SLIM RX3"},
2415 {"RX5 MIX1 INP1", "RX4", "SLIM RX4"},
Patrick Lai16261e82011-09-30 13:25:52 -07002416 {"RX5 MIX1 INP1", "IIR1", "IIR1"},
Bradley Rubin229c6a52011-07-12 16:18:48 -07002417 {"RX5 MIX1 INP2", "RX1", "SLIM RX1"},
2418 {"RX5 MIX1 INP2", "RX2", "SLIM RX2"},
Santosh Mardie15e2302011-11-15 10:39:23 +05302419 {"RX5 MIX1 INP2", "RX3", "SLIM RX3"},
2420 {"RX5 MIX1 INP2", "RX4", "SLIM RX4"},
Patrick Lai16261e82011-09-30 13:25:52 -07002421 {"RX5 MIX1 INP2", "IIR1", "IIR1"},
Bradley Rubin229c6a52011-07-12 16:18:48 -07002422 {"RX6 MIX1 INP1", "RX1", "SLIM RX1"},
2423 {"RX6 MIX1 INP1", "RX2", "SLIM RX2"},
Santosh Mardie15e2302011-11-15 10:39:23 +05302424 {"RX6 MIX1 INP1", "RX3", "SLIM RX3"},
2425 {"RX6 MIX1 INP1", "RX4", "SLIM RX4"},
Patrick Lai16261e82011-09-30 13:25:52 -07002426 {"RX6 MIX1 INP1", "IIR1", "IIR1"},
Bradley Rubin229c6a52011-07-12 16:18:48 -07002427 {"RX6 MIX1 INP2", "RX1", "SLIM RX1"},
2428 {"RX6 MIX1 INP2", "RX2", "SLIM RX2"},
Santosh Mardie15e2302011-11-15 10:39:23 +05302429 {"RX6 MIX1 INP2", "RX3", "SLIM RX3"},
2430 {"RX6 MIX1 INP2", "RX4", "SLIM RX4"},
Patrick Lai16261e82011-09-30 13:25:52 -07002431 {"RX6 MIX1 INP2", "IIR1", "IIR1"},
Bhalchandra Gajare0a8ad172011-08-12 13:32:22 -07002432 {"RX7 MIX1 INP1", "RX1", "SLIM RX1"},
2433 {"RX7 MIX1 INP1", "RX2", "SLIM RX2"},
Santosh Mardie15e2302011-11-15 10:39:23 +05302434 {"RX7 MIX1 INP1", "RX3", "SLIM RX3"},
2435 {"RX7 MIX1 INP1", "RX4", "SLIM RX4"},
Patrick Lai16261e82011-09-30 13:25:52 -07002436 {"RX7 MIX1 INP1", "IIR1", "IIR1"},
Bhalchandra Gajare0a8ad172011-08-12 13:32:22 -07002437 {"RX7 MIX1 INP2", "RX1", "SLIM RX1"},
2438 {"RX7 MIX1 INP2", "RX2", "SLIM RX2"},
Santosh Mardie15e2302011-11-15 10:39:23 +05302439 {"RX7 MIX1 INP2", "RX3", "SLIM RX3"},
2440 {"RX7 MIX1 INP2", "RX4", "SLIM RX4"},
Patrick Lai16261e82011-09-30 13:25:52 -07002441 {"RX7 MIX1 INP2", "IIR1", "IIR1"},
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002442
Bhalchandra Gajarecc6ffa02011-07-14 18:35:41 -07002443 /* Decimator Inputs */
Bhalchandra Gajarecc6ffa02011-07-14 18:35:41 -07002444 {"DEC1 MUX", "DMIC1", "DMIC1"},
Kiran Kandicf45f6a2011-07-17 21:10:19 -07002445 {"DEC1 MUX", "ADC6", "ADC6"},
Bradley Rubine1d08622011-07-20 18:01:35 -07002446 {"DEC1 MUX", NULL, "CDC_CONN"},
Kiran Kandicf45f6a2011-07-17 21:10:19 -07002447 {"DEC2 MUX", "DMIC2", "DMIC2"},
Bhalchandra Gajarecc6ffa02011-07-14 18:35:41 -07002448 {"DEC2 MUX", "ADC5", "ADC5"},
Bradley Rubine1d08622011-07-20 18:01:35 -07002449 {"DEC2 MUX", NULL, "CDC_CONN"},
Kiran Kandicf45f6a2011-07-17 21:10:19 -07002450 {"DEC3 MUX", "DMIC3", "DMIC3"},
Bhalchandra Gajarecc6ffa02011-07-14 18:35:41 -07002451 {"DEC3 MUX", "ADC4", "ADC4"},
Bradley Rubine1d08622011-07-20 18:01:35 -07002452 {"DEC3 MUX", NULL, "CDC_CONN"},
Bhalchandra Gajare7cf018e2011-08-11 18:58:32 -07002453 {"DEC4 MUX", "DMIC4", "DMIC4"},
Bhalchandra Gajarecc6ffa02011-07-14 18:35:41 -07002454 {"DEC4 MUX", "ADC3", "ADC3"},
Bradley Rubine1d08622011-07-20 18:01:35 -07002455 {"DEC4 MUX", NULL, "CDC_CONN"},
Bhalchandra Gajare7cf018e2011-08-11 18:58:32 -07002456 {"DEC5 MUX", "DMIC5", "DMIC5"},
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002457 {"DEC5 MUX", "ADC2", "ADC2"},
Bradley Rubine1d08622011-07-20 18:01:35 -07002458 {"DEC5 MUX", NULL, "CDC_CONN"},
Bhalchandra Gajare7cf018e2011-08-11 18:58:32 -07002459 {"DEC6 MUX", "DMIC6", "DMIC6"},
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002460 {"DEC6 MUX", "ADC1", "ADC1"},
Bradley Rubine1d08622011-07-20 18:01:35 -07002461 {"DEC6 MUX", NULL, "CDC_CONN"},
Bhalchandra Gajarecc6ffa02011-07-14 18:35:41 -07002462 {"DEC7 MUX", "DMIC1", "DMIC1"},
Kiran Kandicf45f6a2011-07-17 21:10:19 -07002463 {"DEC7 MUX", "ADC6", "ADC6"},
Bradley Rubine1d08622011-07-20 18:01:35 -07002464 {"DEC7 MUX", NULL, "CDC_CONN"},
Bhalchandra Gajarecc6ffa02011-07-14 18:35:41 -07002465 {"DEC8 MUX", "ADC5", "ADC5"},
Bradley Rubine1d08622011-07-20 18:01:35 -07002466 {"DEC8 MUX", NULL, "CDC_CONN"},
Bhalchandra Gajarecc6ffa02011-07-14 18:35:41 -07002467 {"DEC9 MUX", "ADC3", "ADC3"},
Bradley Rubine1d08622011-07-20 18:01:35 -07002468 {"DEC9 MUX", NULL, "CDC_CONN"},
Bhalchandra Gajarecc6ffa02011-07-14 18:35:41 -07002469 {"DEC10 MUX", "ADC4", "ADC4"},
Bradley Rubine1d08622011-07-20 18:01:35 -07002470 {"DEC10 MUX", NULL, "CDC_CONN"},
Bhalchandra Gajarecc6ffa02011-07-14 18:35:41 -07002471
2472 /* ADC Connections */
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002473 {"ADC1", NULL, "AMIC1"},
2474 {"ADC2", NULL, "AMIC2"},
Bhalchandra Gajarecc6ffa02011-07-14 18:35:41 -07002475 {"ADC3", NULL, "AMIC3"},
2476 {"ADC4", NULL, "AMIC4"},
2477 {"ADC5", NULL, "AMIC5"},
2478 {"ADC6", NULL, "AMIC6"},
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002479
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002480 {"IIR1", NULL, "IIR1 INP1 MUX"},
Patrick Lai16261e82011-09-30 13:25:52 -07002481 {"IIR1 INP1 MUX", "DEC1", "DEC1 MUX"},
2482 {"IIR1 INP1 MUX", "DEC2", "DEC2 MUX"},
2483 {"IIR1 INP1 MUX", "DEC3", "DEC3 MUX"},
2484 {"IIR1 INP1 MUX", "DEC4", "DEC4 MUX"},
2485 {"IIR1 INP1 MUX", "DEC5", "DEC5 MUX"},
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002486 {"IIR1 INP1 MUX", "DEC6", "DEC6 MUX"},
Patrick Lai16261e82011-09-30 13:25:52 -07002487 {"IIR1 INP1 MUX", "DEC7", "DEC7 MUX"},
2488 {"IIR1 INP1 MUX", "DEC8", "DEC8 MUX"},
2489 {"IIR1 INP1 MUX", "DEC9", "DEC9 MUX"},
2490 {"IIR1 INP1 MUX", "DEC10", "DEC10 MUX"},
Bradley Rubin229c6a52011-07-12 16:18:48 -07002491
2492 {"MIC BIAS1 Internal1", NULL, "LDO_H"},
2493 {"MIC BIAS1 Internal2", NULL, "LDO_H"},
2494 {"MIC BIAS1 External", NULL, "LDO_H"},
2495 {"MIC BIAS2 Internal1", NULL, "LDO_H"},
2496 {"MIC BIAS2 Internal2", NULL, "LDO_H"},
2497 {"MIC BIAS2 Internal3", NULL, "LDO_H"},
2498 {"MIC BIAS2 External", NULL, "LDO_H"},
2499 {"MIC BIAS3 Internal1", NULL, "LDO_H"},
2500 {"MIC BIAS3 Internal2", NULL, "LDO_H"},
2501 {"MIC BIAS3 External", NULL, "LDO_H"},
2502 {"MIC BIAS4 External", NULL, "LDO_H"},
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002503};
2504
Kiran Kandi8b3a8302011-09-27 16:13:28 -07002505static const struct snd_soc_dapm_route tabla_1_x_lineout_2_to_4_map[] = {
2506
2507 {"RX4 DSM MUX", "DSM_INV", "RX3 MIX1"},
2508 {"RX4 DSM MUX", "CIC_OUT", "RX4 MIX1"},
2509
2510 {"LINEOUT2 DAC", NULL, "RX4 DSM MUX"},
2511
2512 {"LINEOUT3 DAC", NULL, "RX5 MIX1"},
2513 {"LINEOUT3 DAC GROUND", "Switch", "RX3 MIX1"},
2514 {"LINEOUT3 DAC", NULL, "LINEOUT3 DAC GROUND"},
2515
2516 {"RX6 DSM MUX", "DSM_INV", "RX5 MIX1"},
2517 {"RX6 DSM MUX", "CIC_OUT", "RX6 MIX1"},
2518
2519 {"LINEOUT4 DAC", NULL, "RX6 DSM MUX"},
2520 {"LINEOUT4 DAC GROUND", "Switch", "RX4 DSM MUX"},
2521 {"LINEOUT4 DAC", NULL, "LINEOUT4 DAC GROUND"},
2522};
2523
Kiran Kandi7a9fd902011-11-14 13:51:45 -08002524
2525static const struct snd_soc_dapm_route tabla_2_x_lineout_2_to_4_map[] = {
2526
2527 {"RX4 DSM MUX", "DSM_INV", "RX3 MIX1"},
2528 {"RX4 DSM MUX", "CIC_OUT", "RX4 MIX1"},
2529
2530 {"LINEOUT3 DAC", NULL, "RX4 DSM MUX"},
2531
2532 {"LINEOUT2 DAC", NULL, "RX5 MIX1"},
2533
2534 {"RX6 DSM MUX", "DSM_INV", "RX5 MIX1"},
2535 {"RX6 DSM MUX", "CIC_OUT", "RX6 MIX1"},
2536
2537 {"LINEOUT4 DAC", NULL, "RX6 DSM MUX"},
2538};
2539
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002540static int tabla_readable(struct snd_soc_codec *ssc, unsigned int reg)
2541{
Joonwoo Park6c1ebb62012-01-16 19:08:43 -08002542 int i;
2543 struct tabla *tabla_core = dev_get_drvdata(ssc->dev->parent);
2544
2545 if (TABLA_IS_1_X(tabla_core->version)) {
2546 for (i = 0; i < ARRAY_SIZE(tabla_1_reg_readable); i++) {
2547 if (tabla_1_reg_readable[i] == reg)
2548 return 1;
2549 }
2550 } else {
2551 for (i = 0; i < ARRAY_SIZE(tabla_2_reg_readable); i++) {
2552 if (tabla_2_reg_readable[i] == reg)
2553 return 1;
2554 }
2555 }
2556
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002557 return tabla_reg_readable[reg];
2558}
2559
2560static int tabla_volatile(struct snd_soc_codec *ssc, unsigned int reg)
2561{
2562 /* Registers lower than 0x100 are top level registers which can be
2563 * written by the Tabla core driver.
2564 */
2565
2566 if ((reg >= TABLA_A_CDC_MBHC_EN_CTL) || (reg < 0x100))
2567 return 1;
2568
Ben Romberger1f045a72011-11-04 10:14:57 -07002569 /* IIR Coeff registers are not cacheable */
2570 if ((reg >= TABLA_A_CDC_IIR1_COEF_B1_CTL) &&
2571 (reg <= TABLA_A_CDC_IIR2_COEF_B5_CTL))
2572 return 1;
2573
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002574 return 0;
2575}
2576
2577#define TABLA_FORMATS (SNDRV_PCM_FMTBIT_S16_LE)
2578static int tabla_write(struct snd_soc_codec *codec, unsigned int reg,
2579 unsigned int value)
2580{
2581 int ret;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002582
2583 BUG_ON(reg > TABLA_MAX_REGISTER);
2584
2585 if (!tabla_volatile(codec, reg)) {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002586 ret = snd_soc_cache_write(codec, reg, value);
2587 if (ret != 0)
2588 dev_err(codec->dev, "Cache write to %x failed: %d\n",
2589 reg, ret);
2590 }
2591
2592 return tabla_reg_write(codec->control_data, reg, value);
2593}
2594static unsigned int tabla_read(struct snd_soc_codec *codec,
2595 unsigned int reg)
2596{
2597 unsigned int val;
2598 int ret;
2599
2600 BUG_ON(reg > TABLA_MAX_REGISTER);
2601
2602 if (!tabla_volatile(codec, reg) && tabla_readable(codec, reg) &&
2603 reg < codec->driver->reg_cache_size) {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002604 ret = snd_soc_cache_read(codec, reg, &val);
2605 if (ret >= 0) {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002606 return val;
2607 } else
2608 dev_err(codec->dev, "Cache read from %x failed: %d\n",
2609 reg, ret);
2610 }
2611
2612 val = tabla_reg_read(codec->control_data, reg);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002613 return val;
2614}
2615
2616static void tabla_codec_enable_audio_mode_bandgap(struct snd_soc_codec *codec)
2617{
2618 snd_soc_write(codec, TABLA_A_BIAS_REF_CTL, 0x1C);
2619 snd_soc_update_bits(codec, TABLA_A_BIAS_CENTRAL_BG_CTL, 0x80,
2620 0x80);
2621 snd_soc_update_bits(codec, TABLA_A_BIAS_CENTRAL_BG_CTL, 0x04,
2622 0x04);
2623 snd_soc_update_bits(codec, TABLA_A_BIAS_CENTRAL_BG_CTL, 0x01,
2624 0x01);
2625 usleep_range(1000, 1000);
2626 snd_soc_update_bits(codec, TABLA_A_BIAS_CENTRAL_BG_CTL, 0x80,
2627 0x00);
2628}
2629
2630static void tabla_codec_enable_bandgap(struct snd_soc_codec *codec,
2631 enum tabla_bandgap_type choice)
2632{
2633 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
2634
2635 /* TODO lock resources accessed by audio streams and threaded
2636 * interrupt handlers
2637 */
2638
2639 pr_debug("%s, choice is %d, current is %d\n", __func__, choice,
2640 tabla->bandgap_type);
2641
2642 if (tabla->bandgap_type == choice)
2643 return;
2644
2645 if ((tabla->bandgap_type == TABLA_BANDGAP_OFF) &&
2646 (choice == TABLA_BANDGAP_AUDIO_MODE)) {
2647 tabla_codec_enable_audio_mode_bandgap(codec);
Asish Bhattacharya486745a2012-01-20 06:41:53 +05302648 } else if (choice == TABLA_BANDGAP_MBHC_MODE) {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002649 snd_soc_update_bits(codec, TABLA_A_BIAS_CENTRAL_BG_CTL, 0x2,
2650 0x2);
2651 snd_soc_update_bits(codec, TABLA_A_BIAS_CENTRAL_BG_CTL, 0x80,
2652 0x80);
2653 snd_soc_update_bits(codec, TABLA_A_BIAS_CENTRAL_BG_CTL, 0x4,
2654 0x4);
Asish Bhattacharya486745a2012-01-20 06:41:53 +05302655 snd_soc_update_bits(codec, TABLA_A_BIAS_CENTRAL_BG_CTL, 0x01,
2656 0x01);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002657 usleep_range(1000, 1000);
2658 snd_soc_update_bits(codec, TABLA_A_BIAS_CENTRAL_BG_CTL, 0x80,
2659 0x00);
2660 } else if ((tabla->bandgap_type == TABLA_BANDGAP_MBHC_MODE) &&
2661 (choice == TABLA_BANDGAP_AUDIO_MODE)) {
2662 snd_soc_write(codec, TABLA_A_BIAS_CENTRAL_BG_CTL, 0x00);
2663 usleep_range(100, 100);
2664 tabla_codec_enable_audio_mode_bandgap(codec);
2665 } else if (choice == TABLA_BANDGAP_OFF) {
2666 snd_soc_write(codec, TABLA_A_BIAS_CENTRAL_BG_CTL, 0x00);
2667 } else {
2668 pr_err("%s: Error, Invalid bandgap settings\n", __func__);
2669 }
2670 tabla->bandgap_type = choice;
2671}
2672
2673static int tabla_codec_enable_config_mode(struct snd_soc_codec *codec,
2674 int enable)
2675{
2676 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
2677
Bhalchandra Gajareb95fb592012-01-18 12:49:17 -08002678 pr_debug("%s: enable = %d\n", __func__, enable);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002679 if (enable) {
2680 snd_soc_update_bits(codec, TABLA_A_CONFIG_MODE_FREQ, 0x10, 0);
2681 snd_soc_write(codec, TABLA_A_BIAS_CONFIG_MODE_BG_CTL, 0x17);
2682 usleep_range(5, 5);
2683 snd_soc_update_bits(codec, TABLA_A_CONFIG_MODE_FREQ, 0x80,
2684 0x80);
2685 snd_soc_update_bits(codec, TABLA_A_CONFIG_MODE_TEST, 0x80,
2686 0x80);
2687 usleep_range(10, 10);
2688 snd_soc_update_bits(codec, TABLA_A_CONFIG_MODE_TEST, 0x80, 0);
2689 usleep_range(20, 20);
2690 snd_soc_update_bits(codec, TABLA_A_CLK_BUFF_EN1, 0x08, 0x08);
2691 } else {
2692 snd_soc_update_bits(codec, TABLA_A_BIAS_CONFIG_MODE_BG_CTL, 0x1,
2693 0);
2694 snd_soc_update_bits(codec, TABLA_A_CONFIG_MODE_FREQ, 0x80, 0);
Bhalchandra Gajareb95fb592012-01-18 12:49:17 -08002695 snd_soc_update_bits(codec, TABLA_A_CLK_BUFF_EN1, 0x08, 0x00);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002696 }
2697 tabla->config_mode_active = enable ? true : false;
2698
2699 return 0;
2700}
2701
2702static int tabla_codec_enable_clock_block(struct snd_soc_codec *codec,
2703 int config_mode)
2704{
2705 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
2706
Bhalchandra Gajareb95fb592012-01-18 12:49:17 -08002707 pr_debug("%s: config_mode = %d\n", __func__, config_mode);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002708
2709 if (config_mode) {
2710 tabla_codec_enable_config_mode(codec, 1);
2711 snd_soc_write(codec, TABLA_A_CLK_BUFF_EN2, 0x00);
2712 snd_soc_write(codec, TABLA_A_CLK_BUFF_EN2, 0x02);
2713 snd_soc_write(codec, TABLA_A_CLK_BUFF_EN1, 0x0D);
2714 usleep_range(1000, 1000);
2715 } else
2716 snd_soc_update_bits(codec, TABLA_A_CLK_BUFF_EN1, 0x08, 0x00);
2717
2718 if (!config_mode && tabla->mbhc_polling_active) {
2719 snd_soc_write(codec, TABLA_A_CLK_BUFF_EN2, 0x02);
2720 tabla_codec_enable_config_mode(codec, 0);
2721
2722 }
2723
2724 snd_soc_update_bits(codec, TABLA_A_CLK_BUFF_EN1, 0x05, 0x05);
2725 snd_soc_update_bits(codec, TABLA_A_CLK_BUFF_EN2, 0x02, 0x00);
2726 snd_soc_update_bits(codec, TABLA_A_CLK_BUFF_EN2, 0x04, 0x04);
2727 snd_soc_update_bits(codec, TABLA_A_CDC_CLK_MCLK_CTL, 0x01, 0x01);
2728 usleep_range(50, 50);
2729 tabla->clock_active = true;
2730 return 0;
2731}
2732static void tabla_codec_disable_clock_block(struct snd_soc_codec *codec)
2733{
2734 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
2735 pr_debug("%s\n", __func__);
2736 snd_soc_update_bits(codec, TABLA_A_CLK_BUFF_EN2, 0x04, 0x00);
2737 ndelay(160);
2738 snd_soc_update_bits(codec, TABLA_A_CLK_BUFF_EN2, 0x02, 0x02);
2739 snd_soc_update_bits(codec, TABLA_A_CLK_BUFF_EN1, 0x05, 0x00);
2740 tabla->clock_active = false;
2741}
2742
Joonwoo Park107edf02012-01-11 11:42:24 -08002743static int tabla_codec_mclk_index(const struct tabla_priv *tabla)
2744{
2745 if (tabla->mclk_freq == TABLA_MCLK_RATE_12288KHZ)
2746 return 0;
2747 else if (tabla->mclk_freq == TABLA_MCLK_RATE_9600KHZ)
2748 return 1;
2749 else {
2750 BUG_ON(1);
2751 return -EINVAL;
2752 }
2753}
2754
Bradley Rubincb1e2732011-06-23 16:49:20 -07002755static void tabla_codec_calibrate_hs_polling(struct snd_soc_codec *codec)
2756{
Joonwoo Parkc0672392012-01-11 11:03:14 -08002757 u8 *n_ready, *n_cic;
Joonwoo Park0976d012011-12-22 11:48:18 -08002758 struct tabla_mbhc_btn_detect_cfg *btn_det;
2759 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
Bradley Rubincb1e2732011-06-23 16:49:20 -07002760
Joonwoo Park0976d012011-12-22 11:48:18 -08002761 btn_det = TABLA_MBHC_CAL_BTN_DET_PTR(tabla->calibration);
Bradley Rubincb1e2732011-06-23 16:49:20 -07002762
Joonwoo Park0976d012011-12-22 11:48:18 -08002763 snd_soc_write(codec, TABLA_A_CDC_MBHC_VOLT_B1_CTL,
2764 tabla->mbhc_data.v_ins_hu & 0xFF);
2765 snd_soc_write(codec, TABLA_A_CDC_MBHC_VOLT_B2_CTL,
2766 (tabla->mbhc_data.v_ins_hu >> 8) & 0xFF);
Bradley Rubincb1e2732011-06-23 16:49:20 -07002767
Joonwoo Park0976d012011-12-22 11:48:18 -08002768 snd_soc_write(codec, TABLA_A_CDC_MBHC_VOLT_B3_CTL,
2769 tabla->mbhc_data.v_b1_hu & 0xFF);
2770 snd_soc_write(codec, TABLA_A_CDC_MBHC_VOLT_B4_CTL,
2771 (tabla->mbhc_data.v_b1_hu >> 8) & 0xFF);
2772
2773 snd_soc_write(codec, TABLA_A_CDC_MBHC_VOLT_B5_CTL,
2774 tabla->mbhc_data.v_b1_h & 0xFF);
2775 snd_soc_write(codec, TABLA_A_CDC_MBHC_VOLT_B6_CTL,
2776 (tabla->mbhc_data.v_b1_h >> 8) & 0xFF);
2777
2778 snd_soc_write(codec, TABLA_A_CDC_MBHC_VOLT_B9_CTL,
2779 tabla->mbhc_data.v_brh & 0xFF);
2780 snd_soc_write(codec, TABLA_A_CDC_MBHC_VOLT_B10_CTL,
2781 (tabla->mbhc_data.v_brh >> 8) & 0xFF);
2782
2783 snd_soc_write(codec, TABLA_A_CDC_MBHC_VOLT_B11_CTL,
2784 tabla->mbhc_data.v_brl & 0xFF);
2785 snd_soc_write(codec, TABLA_A_CDC_MBHC_VOLT_B12_CTL,
2786 (tabla->mbhc_data.v_brl >> 8) & 0xFF);
2787
Joonwoo Parkc0672392012-01-11 11:03:14 -08002788 n_ready = tabla_mbhc_cal_btn_det_mp(btn_det, TABLA_BTN_DET_N_READY);
Joonwoo Park0976d012011-12-22 11:48:18 -08002789 snd_soc_write(codec, TABLA_A_CDC_MBHC_TIMER_B1_CTL,
Joonwoo Parkc0672392012-01-11 11:03:14 -08002790 n_ready[tabla_codec_mclk_index(tabla)]);
Joonwoo Park0976d012011-12-22 11:48:18 -08002791 snd_soc_write(codec, TABLA_A_CDC_MBHC_TIMER_B2_CTL,
2792 tabla->mbhc_data.npoll);
2793 snd_soc_write(codec, TABLA_A_CDC_MBHC_TIMER_B3_CTL,
2794 tabla->mbhc_data.nbounce_wait);
Joonwoo Park0976d012011-12-22 11:48:18 -08002795 n_cic = tabla_mbhc_cal_btn_det_mp(btn_det, TABLA_BTN_DET_N_CIC);
Joonwoo Park107edf02012-01-11 11:42:24 -08002796 snd_soc_write(codec, TABLA_A_CDC_MBHC_TIMER_B6_CTL,
2797 n_cic[tabla_codec_mclk_index(tabla)]);
Bradley Rubincb1e2732011-06-23 16:49:20 -07002798}
2799
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002800static int tabla_startup(struct snd_pcm_substream *substream,
2801 struct snd_soc_dai *dai)
2802{
Kiran Kandi6fae8bf2011-08-15 10:36:42 -07002803 pr_debug("%s(): substream = %s stream = %d\n" , __func__,
2804 substream->name, substream->stream);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002805
Kiran Kandi6fae8bf2011-08-15 10:36:42 -07002806 return 0;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002807}
2808
2809static void tabla_shutdown(struct snd_pcm_substream *substream,
2810 struct snd_soc_dai *dai)
2811{
Kiran Kandi6fae8bf2011-08-15 10:36:42 -07002812 pr_debug("%s(): substream = %s stream = %d\n" , __func__,
2813 substream->name, substream->stream);
2814}
2815
2816int tabla_mclk_enable(struct snd_soc_codec *codec, int mclk_enable)
2817{
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002818 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
2819
Kiran Kandi6fae8bf2011-08-15 10:36:42 -07002820 pr_debug("%s() mclk_enable = %u\n", __func__, mclk_enable);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002821
Kiran Kandi6fae8bf2011-08-15 10:36:42 -07002822 if (mclk_enable) {
2823 tabla->mclk_enabled = true;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002824
Kiran Kandi6fae8bf2011-08-15 10:36:42 -07002825 if (tabla->mbhc_polling_active && (tabla->mclk_enabled)) {
Bradley Rubincb1e2732011-06-23 16:49:20 -07002826 tabla_codec_pause_hs_polling(codec);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002827 tabla_codec_enable_bandgap(codec,
Kiran Kandi6fae8bf2011-08-15 10:36:42 -07002828 TABLA_BANDGAP_AUDIO_MODE);
2829 tabla_codec_enable_clock_block(codec, 0);
Bradley Rubincb1e2732011-06-23 16:49:20 -07002830 tabla_codec_calibrate_hs_polling(codec);
2831 tabla_codec_start_hs_polling(codec);
Asish Bhattacharya486745a2012-01-20 06:41:53 +05302832 } else {
2833 tabla_codec_enable_bandgap(codec,
2834 TABLA_BANDGAP_AUDIO_MODE);
2835 tabla_codec_enable_clock_block(codec, 0);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002836 }
Kiran Kandi6fae8bf2011-08-15 10:36:42 -07002837 } else {
2838
2839 if (!tabla->mclk_enabled) {
2840 pr_err("Error, MCLK already diabled\n");
2841 return -EINVAL;
2842 }
2843 tabla->mclk_enabled = false;
2844
2845 if (tabla->mbhc_polling_active) {
2846 if (!tabla->mclk_enabled) {
2847 tabla_codec_pause_hs_polling(codec);
2848 tabla_codec_enable_bandgap(codec,
2849 TABLA_BANDGAP_MBHC_MODE);
2850 tabla_enable_rx_bias(codec, 1);
2851 tabla_codec_enable_clock_block(codec, 1);
2852 tabla_codec_calibrate_hs_polling(codec);
2853 tabla_codec_start_hs_polling(codec);
2854 }
2855 snd_soc_update_bits(codec, TABLA_A_CLK_BUFF_EN1,
2856 0x05, 0x01);
Asish Bhattacharya486745a2012-01-20 06:41:53 +05302857 } else {
2858 tabla_codec_disable_clock_block(codec);
2859 tabla_codec_enable_bandgap(codec,
2860 TABLA_BANDGAP_OFF);
Kiran Kandi6fae8bf2011-08-15 10:36:42 -07002861 }
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002862 }
Kiran Kandi6fae8bf2011-08-15 10:36:42 -07002863 return 0;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002864}
2865
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002866static int tabla_set_dai_sysclk(struct snd_soc_dai *dai,
2867 int clk_id, unsigned int freq, int dir)
2868{
2869 pr_debug("%s\n", __func__);
2870 return 0;
2871}
2872
2873static int tabla_set_dai_fmt(struct snd_soc_dai *dai, unsigned int fmt)
2874{
Santosh Mardie15e2302011-11-15 10:39:23 +05302875 u8 val = 0;
2876 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(dai->codec);
2877
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002878 pr_debug("%s\n", __func__);
Santosh Mardie15e2302011-11-15 10:39:23 +05302879 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
2880 case SND_SOC_DAIFMT_CBS_CFS:
2881 /* CPU is master */
2882 if (tabla->intf_type == TABLA_INTERFACE_TYPE_I2C) {
2883 if (dai->id == TABLA_TX_DAI_ID)
2884 snd_soc_update_bits(dai->codec,
2885 TABLA_A_CDC_CLK_TX_I2S_CTL,
2886 TABLA_I2S_MASTER_MODE_MASK, 0);
2887 else if (dai->id == TABLA_RX_DAI_ID)
2888 snd_soc_update_bits(dai->codec,
2889 TABLA_A_CDC_CLK_RX_I2S_CTL,
2890 TABLA_I2S_MASTER_MODE_MASK, 0);
2891 }
2892 break;
2893 case SND_SOC_DAIFMT_CBM_CFM:
2894 /* CPU is slave */
2895 if (tabla->intf_type == TABLA_INTERFACE_TYPE_I2C) {
2896 val = TABLA_I2S_MASTER_MODE_MASK;
2897 if (dai->id == TABLA_TX_DAI_ID)
2898 snd_soc_update_bits(dai->codec,
2899 TABLA_A_CDC_CLK_TX_I2S_CTL, val, val);
2900 else if (dai->id == TABLA_RX_DAI_ID)
2901 snd_soc_update_bits(dai->codec,
2902 TABLA_A_CDC_CLK_RX_I2S_CTL, val, val);
2903 }
2904 break;
2905 default:
2906 return -EINVAL;
2907 }
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002908 return 0;
2909}
2910
2911static int tabla_hw_params(struct snd_pcm_substream *substream,
2912 struct snd_pcm_hw_params *params,
2913 struct snd_soc_dai *dai)
2914{
Bhalchandra Gajare9a901fd2011-08-01 10:07:15 -07002915 struct snd_soc_codec *codec = dai->codec;
Santosh Mardie15e2302011-11-15 10:39:23 +05302916 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(dai->codec);
Bhalchandra Gajare038bf3a2011-09-02 15:32:30 -07002917 u8 path, shift;
2918 u16 tx_fs_reg, rx_fs_reg;
Bhalchandra Gajare9a901fd2011-08-01 10:07:15 -07002919 u8 tx_fs_rate, rx_fs_rate, rx_state, tx_state;
2920
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002921 pr_debug("%s: DAI-ID %x\n", __func__, dai->id);
Bhalchandra Gajare9a901fd2011-08-01 10:07:15 -07002922
2923 switch (params_rate(params)) {
2924 case 8000:
2925 tx_fs_rate = 0x00;
2926 rx_fs_rate = 0x00;
2927 break;
2928 case 16000:
2929 tx_fs_rate = 0x01;
2930 rx_fs_rate = 0x20;
2931 break;
2932 case 32000:
2933 tx_fs_rate = 0x02;
2934 rx_fs_rate = 0x40;
2935 break;
2936 case 48000:
2937 tx_fs_rate = 0x03;
2938 rx_fs_rate = 0x60;
2939 break;
2940 default:
2941 pr_err("%s: Invalid sampling rate %d\n", __func__,
2942 params_rate(params));
2943 return -EINVAL;
2944 }
2945
2946
2947 /**
2948 * If current dai is a tx dai, set sample rate to
2949 * all the txfe paths that are currently not active
2950 */
2951 if (dai->id == TABLA_TX_DAI_ID) {
2952
2953 tx_state = snd_soc_read(codec,
2954 TABLA_A_CDC_CLK_TX_CLK_EN_B1_CTL);
2955
2956 for (path = 1, shift = 0;
2957 path <= NUM_DECIMATORS; path++, shift++) {
2958
2959 if (path == BITS_PER_REG + 1) {
2960 shift = 0;
2961 tx_state = snd_soc_read(codec,
2962 TABLA_A_CDC_CLK_TX_CLK_EN_B2_CTL);
2963 }
2964
2965 if (!(tx_state & (1 << shift))) {
2966 tx_fs_reg = TABLA_A_CDC_TX1_CLK_FS_CTL
2967 + (BITS_PER_REG*(path-1));
2968 snd_soc_update_bits(codec, tx_fs_reg,
2969 0x03, tx_fs_rate);
2970 }
2971 }
Santosh Mardie15e2302011-11-15 10:39:23 +05302972 if (tabla->intf_type == TABLA_INTERFACE_TYPE_I2C) {
2973 switch (params_format(params)) {
2974 case SNDRV_PCM_FORMAT_S16_LE:
2975 snd_soc_update_bits(codec,
2976 TABLA_A_CDC_CLK_TX_I2S_CTL,
2977 0x20, 0x20);
2978 break;
2979 case SNDRV_PCM_FORMAT_S32_LE:
2980 snd_soc_update_bits(codec,
2981 TABLA_A_CDC_CLK_TX_I2S_CTL,
2982 0x20, 0x00);
2983 break;
2984 default:
2985 pr_err("invalid format\n");
2986 break;
2987 }
2988 snd_soc_update_bits(codec, TABLA_A_CDC_CLK_TX_I2S_CTL,
2989 0x03, tx_fs_rate);
2990 }
Bhalchandra Gajare9a901fd2011-08-01 10:07:15 -07002991 }
2992
2993 /**
2994 * TODO: Need to handle case where same RX chain takes 2 or more inputs
2995 * with varying sample rates
2996 */
2997
2998 /**
2999 * If current dai is a rx dai, set sample rate to
3000 * all the rx paths that are currently not active
3001 */
3002 if (dai->id == TABLA_RX_DAI_ID) {
3003
3004 rx_state = snd_soc_read(codec,
3005 TABLA_A_CDC_CLK_RX_B1_CTL);
3006
3007 for (path = 1, shift = 0;
3008 path <= NUM_INTERPOLATORS; path++, shift++) {
3009
3010 if (!(rx_state & (1 << shift))) {
3011 rx_fs_reg = TABLA_A_CDC_RX1_B5_CTL
3012 + (BITS_PER_REG*(path-1));
3013 snd_soc_update_bits(codec, rx_fs_reg,
3014 0xE0, rx_fs_rate);
3015 }
3016 }
Santosh Mardie15e2302011-11-15 10:39:23 +05303017 if (tabla->intf_type == TABLA_INTERFACE_TYPE_I2C) {
3018 switch (params_format(params)) {
3019 case SNDRV_PCM_FORMAT_S16_LE:
3020 snd_soc_update_bits(codec,
3021 TABLA_A_CDC_CLK_RX_I2S_CTL,
3022 0x20, 0x20);
3023 break;
3024 case SNDRV_PCM_FORMAT_S32_LE:
3025 snd_soc_update_bits(codec,
3026 TABLA_A_CDC_CLK_RX_I2S_CTL,
3027 0x20, 0x00);
3028 break;
3029 default:
3030 pr_err("invalid format\n");
3031 break;
3032 }
3033 snd_soc_update_bits(codec, TABLA_A_CDC_CLK_RX_I2S_CTL,
3034 0x03, (rx_fs_rate >> 0x05));
3035 }
Bhalchandra Gajare9a901fd2011-08-01 10:07:15 -07003036 }
3037
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003038 return 0;
3039}
3040
3041static struct snd_soc_dai_ops tabla_dai_ops = {
3042 .startup = tabla_startup,
3043 .shutdown = tabla_shutdown,
3044 .hw_params = tabla_hw_params,
3045 .set_sysclk = tabla_set_dai_sysclk,
3046 .set_fmt = tabla_set_dai_fmt,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003047};
3048
3049static struct snd_soc_dai_driver tabla_dai[] = {
3050 {
3051 .name = "tabla_rx1",
3052 .id = 1,
3053 .playback = {
3054 .stream_name = "AIF1 Playback",
Bhalchandra Gajare9a901fd2011-08-01 10:07:15 -07003055 .rates = WCD9310_RATES,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003056 .formats = TABLA_FORMATS,
3057 .rate_max = 48000,
3058 .rate_min = 8000,
3059 .channels_min = 1,
Kiran Kandi3426e512011-09-13 22:50:10 -07003060 .channels_max = 4,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003061 },
3062 .ops = &tabla_dai_ops,
3063 },
3064 {
3065 .name = "tabla_tx1",
3066 .id = 2,
3067 .capture = {
3068 .stream_name = "AIF1 Capture",
Bhalchandra Gajare9a901fd2011-08-01 10:07:15 -07003069 .rates = WCD9310_RATES,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003070 .formats = TABLA_FORMATS,
3071 .rate_max = 48000,
3072 .rate_min = 8000,
3073 .channels_min = 1,
3074 .channels_max = 2,
3075 },
3076 .ops = &tabla_dai_ops,
3077 },
3078};
Santosh Mardie15e2302011-11-15 10:39:23 +05303079
3080static struct snd_soc_dai_driver tabla_i2s_dai[] = {
3081 {
3082 .name = "tabla_i2s_rx1",
3083 .id = 1,
3084 .playback = {
3085 .stream_name = "AIF1 Playback",
3086 .rates = WCD9310_RATES,
3087 .formats = TABLA_FORMATS,
3088 .rate_max = 48000,
3089 .rate_min = 8000,
3090 .channels_min = 1,
3091 .channels_max = 4,
3092 },
3093 .ops = &tabla_dai_ops,
3094 },
3095 {
3096 .name = "tabla_i2s_tx1",
3097 .id = 2,
3098 .capture = {
3099 .stream_name = "AIF1 Capture",
3100 .rates = WCD9310_RATES,
3101 .formats = TABLA_FORMATS,
3102 .rate_max = 48000,
3103 .rate_min = 8000,
3104 .channels_min = 1,
3105 .channels_max = 4,
3106 },
3107 .ops = &tabla_dai_ops,
3108 },
3109};
Bradley Rubin89ffd0a2011-07-21 16:04:06 -07003110static short tabla_codec_read_sta_result(struct snd_soc_codec *codec)
Bradley Rubincb1e2732011-06-23 16:49:20 -07003111{
3112 u8 bias_msb, bias_lsb;
3113 short bias_value;
3114
Bradley Rubin89ffd0a2011-07-21 16:04:06 -07003115 bias_msb = snd_soc_read(codec, TABLA_A_CDC_MBHC_B3_STATUS);
3116 bias_lsb = snd_soc_read(codec, TABLA_A_CDC_MBHC_B2_STATUS);
3117 bias_value = (bias_msb << 8) | bias_lsb;
3118 return bias_value;
3119}
3120
3121static short tabla_codec_read_dce_result(struct snd_soc_codec *codec)
3122{
3123 u8 bias_msb, bias_lsb;
3124 short bias_value;
3125
3126 bias_msb = snd_soc_read(codec, TABLA_A_CDC_MBHC_B5_STATUS);
3127 bias_lsb = snd_soc_read(codec, TABLA_A_CDC_MBHC_B4_STATUS);
3128 bias_value = (bias_msb << 8) | bias_lsb;
3129 return bias_value;
3130}
3131
Joonwoo Park0976d012011-12-22 11:48:18 -08003132static short tabla_codec_sta_dce(struct snd_soc_codec *codec, int dce)
Bradley Rubin89ffd0a2011-07-21 16:04:06 -07003133{
Joonwoo Park0976d012011-12-22 11:48:18 -08003134 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
Bradley Rubin89ffd0a2011-07-21 16:04:06 -07003135 short bias_value;
3136
Joonwoo Park925914c2012-01-05 13:35:18 -08003137 /* Turn on the override */
3138 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_B1_CTL, 0x4, 0x4);
Bradley Rubincb1e2732011-06-23 16:49:20 -07003139 if (dce) {
Bradley Rubin89ffd0a2011-07-21 16:04:06 -07003140 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_CLK_CTL, 0x8, 0x8);
3141 snd_soc_write(codec, TABLA_A_CDC_MBHC_EN_CTL, 0x4);
3142 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_CLK_CTL, 0x8, 0x0);
Joonwoo Park433149a2012-01-11 09:53:54 -08003143 usleep_range(tabla->mbhc_data.t_sta_dce,
3144 tabla->mbhc_data.t_sta_dce);
Bradley Rubin89ffd0a2011-07-21 16:04:06 -07003145 snd_soc_write(codec, TABLA_A_CDC_MBHC_EN_CTL, 0x4);
Joonwoo Park0976d012011-12-22 11:48:18 -08003146 usleep_range(tabla->mbhc_data.t_dce,
3147 tabla->mbhc_data.t_dce);
Bradley Rubin89ffd0a2011-07-21 16:04:06 -07003148 bias_value = tabla_codec_read_dce_result(codec);
Bradley Rubincb1e2732011-06-23 16:49:20 -07003149 } else {
Bradley Rubin89ffd0a2011-07-21 16:04:06 -07003150 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_CLK_CTL, 0x8, 0x8);
Bradley Rubincb1e2732011-06-23 16:49:20 -07003151 snd_soc_write(codec, TABLA_A_CDC_MBHC_EN_CTL, 0x2);
3152 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_CLK_CTL, 0x8, 0x0);
Joonwoo Park433149a2012-01-11 09:53:54 -08003153 usleep_range(tabla->mbhc_data.t_sta_dce,
3154 tabla->mbhc_data.t_sta_dce);
Joonwoo Park0976d012011-12-22 11:48:18 -08003155 snd_soc_write(codec, TABLA_A_CDC_MBHC_EN_CTL, 0x2);
3156 usleep_range(tabla->mbhc_data.t_sta,
3157 tabla->mbhc_data.t_sta);
Bradley Rubin89ffd0a2011-07-21 16:04:06 -07003158 bias_value = tabla_codec_read_sta_result(codec);
3159 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_CLK_CTL, 0x8, 0x8);
3160 snd_soc_write(codec, TABLA_A_CDC_MBHC_EN_CTL, 0x0);
Bradley Rubincb1e2732011-06-23 16:49:20 -07003161 }
Joonwoo Park925914c2012-01-05 13:35:18 -08003162 /* Turn off the override after measuring mic voltage */
3163 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_B1_CTL, 0x04, 0x00);
Bradley Rubincb1e2732011-06-23 16:49:20 -07003164
Bradley Rubincb1e2732011-06-23 16:49:20 -07003165 return bias_value;
3166}
3167
Bhalchandra Gajare343cbb02011-09-07 18:58:19 -07003168static short tabla_codec_setup_hs_polling(struct snd_soc_codec *codec)
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003169{
3170 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
Bhalchandra Gajare343cbb02011-09-07 18:58:19 -07003171 short bias_value;
Bhalchandra Gajare19d9c132011-11-18 14:57:08 -08003172 u8 cfilt_mode;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003173
Joonwoo Park0976d012011-12-22 11:48:18 -08003174 if (!tabla->calibration) {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003175 pr_err("Error, no tabla calibration\n");
Bradley Rubincb1e2732011-06-23 16:49:20 -07003176 return -ENODEV;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003177 }
3178
3179 tabla->mbhc_polling_active = true;
3180
Kiran Kandi6fae8bf2011-08-15 10:36:42 -07003181 if (!tabla->mclk_enabled) {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003182 tabla_codec_enable_bandgap(codec, TABLA_BANDGAP_MBHC_MODE);
Kiran Kandi6fae8bf2011-08-15 10:36:42 -07003183 tabla_enable_rx_bias(codec, 1);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003184 tabla_codec_enable_clock_block(codec, 1);
3185 }
3186
3187 snd_soc_update_bits(codec, TABLA_A_CLK_BUFF_EN1, 0x05, 0x01);
3188
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003189 snd_soc_update_bits(codec, TABLA_A_TX_COM_BIAS, 0xE0, 0xE0);
3190
Bhalchandra Gajare19d9c132011-11-18 14:57:08 -08003191 /* Make sure CFILT is in fast mode, save current mode */
Joonwoo Parkf4267c22012-01-10 13:25:24 -08003192 cfilt_mode = snd_soc_read(codec, tabla->mbhc_bias_regs.cfilt_ctl);
3193 snd_soc_update_bits(codec, tabla->mbhc_bias_regs.cfilt_ctl, 0x70, 0x00);
Patrick Lai3043fba2011-08-01 14:15:57 -07003194
Joonwoo Parkf4267c22012-01-10 13:25:24 -08003195 snd_soc_update_bits(codec, tabla->mbhc_bias_regs.ctl_reg, 0x1F, 0x16);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003196
3197 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_CLK_CTL, 0x2, 0x2);
Bradley Rubincb1e2732011-06-23 16:49:20 -07003198 snd_soc_write(codec, TABLA_A_MBHC_SCALING_MUX_1, 0x84);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003199
3200 snd_soc_update_bits(codec, TABLA_A_TX_7_MBHC_EN, 0x80, 0x80);
3201 snd_soc_update_bits(codec, TABLA_A_TX_7_MBHC_EN, 0x1F, 0x1C);
3202 snd_soc_update_bits(codec, TABLA_A_TX_7_MBHC_TEST_CTL, 0x40, 0x40);
3203
3204 snd_soc_update_bits(codec, TABLA_A_TX_7_MBHC_EN, 0x80, 0x00);
Bradley Rubincb1e2732011-06-23 16:49:20 -07003205 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_CLK_CTL, 0x8, 0x8);
3206 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_CLK_CTL, 0x8, 0x00);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003207
Joonwoo Park925914c2012-01-05 13:35:18 -08003208 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_B1_CTL, 0x2, 0x2);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003209 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_CLK_CTL, 0x8, 0x8);
3210
Bradley Rubincb1e2732011-06-23 16:49:20 -07003211 tabla_codec_calibrate_hs_polling(codec);
3212
Joonwoo Park0976d012011-12-22 11:48:18 -08003213 bias_value = tabla_codec_sta_dce(codec, 0);
3214 snd_soc_update_bits(codec, tabla->mbhc_bias_regs.cfilt_ctl, 0x40,
3215 cfilt_mode);
Bradley Rubin89ffd0a2011-07-21 16:04:06 -07003216 snd_soc_update_bits(codec, TABLA_A_MBHC_HPH, 0x13, 0x00);
Bradley Rubincb1e2732011-06-23 16:49:20 -07003217
Bhalchandra Gajare343cbb02011-09-07 18:58:19 -07003218 return bias_value;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003219}
3220
3221static int tabla_codec_enable_hs_detect(struct snd_soc_codec *codec,
3222 int insertion)
3223{
3224 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003225 int central_bias_enabled = 0;
Joonwoo Park0976d012011-12-22 11:48:18 -08003226 const struct tabla_mbhc_general_cfg *generic =
3227 TABLA_MBHC_CAL_GENERAL_PTR(tabla->calibration);
3228 const struct tabla_mbhc_plug_detect_cfg *plug_det =
3229 TABLA_MBHC_CAL_PLUG_DET_PTR(tabla->calibration);
Bhalchandra Gajare5ea376d2011-11-30 14:21:20 -08003230 u8 wg_time;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003231
Joonwoo Park0976d012011-12-22 11:48:18 -08003232 if (!tabla->calibration) {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003233 pr_err("Error, no tabla calibration\n");
3234 return -EINVAL;
3235 }
3236
3237 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_INT_CTL, 0x1, 0);
3238
Bhalchandra Gajare7fc72332011-10-13 19:01:55 -07003239 if (insertion) {
3240 /* Make sure mic bias and Mic line schmitt trigger
3241 * are turned OFF
3242 */
3243 snd_soc_update_bits(codec, tabla->mbhc_bias_regs.ctl_reg,
3244 0x81, 0x01);
3245 snd_soc_update_bits(codec, tabla->mbhc_bias_regs.mbhc_reg,
3246 0x90, 0x00);
Bhalchandra Gajare5ea376d2011-11-30 14:21:20 -08003247 wg_time = snd_soc_read(codec, TABLA_A_RX_HPH_CNP_WG_TIME) ;
3248 wg_time += 1;
Bhalchandra Gajare7fc72332011-10-13 19:01:55 -07003249
3250 /* Enable HPH Schmitt Trigger */
Bhalchandra Gajare5ea376d2011-11-30 14:21:20 -08003251 snd_soc_update_bits(codec, TABLA_A_MBHC_HPH, 0x11, 0x11);
Bhalchandra Gajare7fc72332011-10-13 19:01:55 -07003252 snd_soc_update_bits(codec, TABLA_A_MBHC_HPH, 0x0C,
Joonwoo Park0976d012011-12-22 11:48:18 -08003253 plug_det->hph_current << 2);
Bhalchandra Gajare7fc72332011-10-13 19:01:55 -07003254
Bhalchandra Gajare5ea376d2011-11-30 14:21:20 -08003255 /* Turn off HPH PAs and DAC's during insertion detection to
3256 * avoid false insertion interrupts
Bhalchandra Gajare7fc72332011-10-13 19:01:55 -07003257 */
3258 if (tabla->mbhc_micbias_switched)
3259 tabla_codec_switch_micbias(codec, 0);
3260 snd_soc_update_bits(codec, TABLA_A_RX_HPH_CNP_EN, 0x30, 0x00);
Bhalchandra Gajare5ea376d2011-11-30 14:21:20 -08003261 snd_soc_update_bits(codec, TABLA_A_RX_HPH_L_DAC_CTL,
Joonwoo Park0976d012011-12-22 11:48:18 -08003262 0xC0, 0x00);
Bhalchandra Gajare5ea376d2011-11-30 14:21:20 -08003263 snd_soc_update_bits(codec, TABLA_A_RX_HPH_R_DAC_CTL,
Joonwoo Park0976d012011-12-22 11:48:18 -08003264 0xC0, 0x00);
Bhalchandra Gajare5ea376d2011-11-30 14:21:20 -08003265 usleep_range(wg_time * 1000, wg_time * 1000);
Bhalchandra Gajare7fc72332011-10-13 19:01:55 -07003266
3267 /* setup for insetion detection */
Bhalchandra Gajare5ea376d2011-11-30 14:21:20 -08003268 snd_soc_update_bits(codec, TABLA_A_MBHC_HPH, 0x02, 0x02);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003269 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_INT_CTL, 0x2, 0);
Bhalchandra Gajare7fc72332011-10-13 19:01:55 -07003270 } else {
3271 /* Make sure the HPH schmitt trigger is OFF */
3272 snd_soc_update_bits(codec, TABLA_A_MBHC_HPH, 0x12, 0x00);
3273
3274 /* enable the mic line schmitt trigger */
3275 snd_soc_update_bits(codec, tabla->mbhc_bias_regs.mbhc_reg, 0x60,
Joonwoo Park0976d012011-12-22 11:48:18 -08003276 plug_det->mic_current << 5);
Bhalchandra Gajare7fc72332011-10-13 19:01:55 -07003277 snd_soc_update_bits(codec, tabla->mbhc_bias_regs.mbhc_reg,
3278 0x80, 0x80);
Joonwoo Park0976d012011-12-22 11:48:18 -08003279 usleep_range(plug_det->t_mic_pid, plug_det->t_mic_pid);
Bhalchandra Gajare7fc72332011-10-13 19:01:55 -07003280 snd_soc_update_bits(codec, tabla->mbhc_bias_regs.mbhc_reg,
3281 0x10, 0x10);
3282
3283 /* Setup for low power removal detection */
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003284 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_INT_CTL, 0x2, 0x2);
Bhalchandra Gajare7fc72332011-10-13 19:01:55 -07003285 }
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003286
3287 if (snd_soc_read(codec, TABLA_A_CDC_MBHC_B1_CTL) & 0x4) {
3288 if (!(tabla->clock_active)) {
3289 tabla_codec_enable_config_mode(codec, 1);
3290 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_B1_CTL,
Bradley Rubincb1e2732011-06-23 16:49:20 -07003291 0x06, 0);
Joonwoo Park0976d012011-12-22 11:48:18 -08003292 usleep_range(generic->t_shutdown_plug_rem,
3293 generic->t_shutdown_plug_rem);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003294 tabla_codec_enable_config_mode(codec, 0);
3295 } else
3296 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_B1_CTL,
Bradley Rubincb1e2732011-06-23 16:49:20 -07003297 0x06, 0);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003298 }
3299
Bhalchandra Gajare02d90cd2011-09-30 16:14:00 -07003300 snd_soc_update_bits(codec, tabla->mbhc_bias_regs.int_rbias, 0x80, 0);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003301
3302 /* If central bandgap disabled */
3303 if (!(snd_soc_read(codec, TABLA_A_PIN_CTL_OE1) & 1)) {
3304 snd_soc_update_bits(codec, TABLA_A_PIN_CTL_OE1, 0x3, 0x3);
Joonwoo Park0976d012011-12-22 11:48:18 -08003305 usleep_range(generic->t_bg_fast_settle,
3306 generic->t_bg_fast_settle);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003307 central_bias_enabled = 1;
3308 }
3309
3310 /* If LDO_H disabled */
3311 if (snd_soc_read(codec, TABLA_A_PIN_CTL_OE0) & 0x80) {
3312 snd_soc_update_bits(codec, TABLA_A_PIN_CTL_OE0, 0x10, 0);
3313 snd_soc_update_bits(codec, TABLA_A_PIN_CTL_OE0, 0x80, 0x80);
Joonwoo Park0976d012011-12-22 11:48:18 -08003314 usleep_range(generic->t_ldoh, generic->t_ldoh);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003315 snd_soc_update_bits(codec, TABLA_A_PIN_CTL_OE0, 0x80, 0);
3316
3317 if (central_bias_enabled)
3318 snd_soc_update_bits(codec, TABLA_A_PIN_CTL_OE1, 0x1, 0);
3319 }
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003320
Joonwoo Park6c1ebb62012-01-16 19:08:43 -08003321 snd_soc_update_bits(codec, tabla->reg_addr.micb_4_mbhc, 0x3,
3322 tabla->micbias);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003323
3324 tabla_enable_irq(codec->control_data, TABLA_IRQ_MBHC_INSERTION);
3325 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_INT_CTL, 0x1, 0x1);
3326 return 0;
3327}
3328
Joonwoo Park0976d012011-12-22 11:48:18 -08003329static u16 tabla_codec_v_sta_dce(struct snd_soc_codec *codec, bool dce,
3330 s16 vin_mv)
3331{
3332 short diff, zero;
3333 struct tabla_priv *tabla;
3334 u32 mb_mv, in;
3335
3336 tabla = snd_soc_codec_get_drvdata(codec);
3337 mb_mv = tabla->mbhc_data.micb_mv;
3338
3339 if (mb_mv == 0) {
3340 pr_err("%s: Mic Bias voltage is set to zero\n", __func__);
3341 return -EINVAL;
3342 }
3343
3344 if (dce) {
3345 diff = tabla->mbhc_data.dce_mb - tabla->mbhc_data.dce_z;
3346 zero = tabla->mbhc_data.dce_z;
3347 } else {
3348 diff = tabla->mbhc_data.sta_mb - tabla->mbhc_data.sta_z;
3349 zero = tabla->mbhc_data.sta_z;
3350 }
3351 in = (u32) diff * vin_mv;
3352
3353 return (u16) (in / mb_mv) + zero;
3354}
3355
3356static s32 tabla_codec_sta_dce_v(struct snd_soc_codec *codec, s8 dce,
3357 u16 bias_value)
3358{
3359 struct tabla_priv *tabla;
3360 s32 mv;
3361
3362 tabla = snd_soc_codec_get_drvdata(codec);
3363
3364 if (dce) {
3365 mv = ((s32)bias_value - (s32)tabla->mbhc_data.dce_z) *
3366 (s32)tabla->mbhc_data.micb_mv /
3367 (s32)(tabla->mbhc_data.dce_mb - tabla->mbhc_data.dce_z);
3368 } else {
3369 mv = ((s32)bias_value - (s32)tabla->mbhc_data.sta_z) *
3370 (s32)tabla->mbhc_data.micb_mv /
3371 (s32)(tabla->mbhc_data.sta_mb - tabla->mbhc_data.sta_z);
3372 }
3373
3374 return mv;
3375}
3376
Bhalchandra Gajare0a792b12011-09-06 16:36:58 -07003377static void btn0_lpress_fn(struct work_struct *work)
3378{
3379 struct delayed_work *delayed_work;
3380 struct tabla_priv *tabla;
Joonwoo Park0976d012011-12-22 11:48:18 -08003381 short bias_value;
3382 int dce_mv, sta_mv;
Joonwoo Park816b8e62012-01-23 16:03:21 -08003383 struct tabla *core;
Bhalchandra Gajare0a792b12011-09-06 16:36:58 -07003384
3385 pr_debug("%s:\n", __func__);
3386
3387 delayed_work = to_delayed_work(work);
3388 tabla = container_of(delayed_work, struct tabla_priv, btn0_dwork);
Joonwoo Park816b8e62012-01-23 16:03:21 -08003389 core = dev_get_drvdata(tabla->codec->dev->parent);
Bhalchandra Gajare0a792b12011-09-06 16:36:58 -07003390
3391 if (tabla) {
3392 if (tabla->button_jack) {
Joonwoo Park0976d012011-12-22 11:48:18 -08003393 bias_value = tabla_codec_read_sta_result(tabla->codec);
3394 sta_mv = tabla_codec_sta_dce_v(tabla->codec, 0,
3395 bias_value);
3396 bias_value = tabla_codec_read_dce_result(tabla->codec);
3397 dce_mv = tabla_codec_sta_dce_v(tabla->codec, 1,
3398 bias_value);
3399 pr_debug("%s: Reporting long button press event"
3400 " STA: %d, DCE: %d\n", __func__,
3401 sta_mv, dce_mv);
Joonwoo Park8b1f0982011-12-08 17:12:45 -08003402 tabla_snd_soc_jack_report(tabla, tabla->button_jack,
3403 SND_JACK_BTN_0,
3404 SND_JACK_BTN_0);
Bhalchandra Gajare0a792b12011-09-06 16:36:58 -07003405 }
3406 } else {
3407 pr_err("%s: Bad tabla private data\n", __func__);
3408 }
3409
Joonwoo Park816b8e62012-01-23 16:03:21 -08003410 tabla_unlock_sleep(core);
Bhalchandra Gajare0a792b12011-09-06 16:36:58 -07003411}
Bhalchandra Gajared9ebb6c2011-10-03 19:54:41 -07003412
Joonwoo Park0976d012011-12-22 11:48:18 -08003413void tabla_mbhc_cal(struct snd_soc_codec *codec)
3414{
3415 struct tabla_priv *tabla;
3416 struct tabla_mbhc_btn_detect_cfg *btn_det;
3417 u8 cfilt_mode, bg_mode;
3418 u8 ncic, nmeas, navg;
3419 u32 mclk_rate;
3420 u32 dce_wait, sta_wait;
3421 u8 *n_cic;
3422
3423 tabla = snd_soc_codec_get_drvdata(codec);
3424
3425 /* First compute the DCE / STA wait times
3426 * depending on tunable parameters.
3427 * The value is computed in microseconds
3428 */
3429 btn_det = TABLA_MBHC_CAL_BTN_DET_PTR(tabla->calibration);
3430 n_cic = tabla_mbhc_cal_btn_det_mp(btn_det, TABLA_BTN_DET_N_CIC);
Joonwoo Park107edf02012-01-11 11:42:24 -08003431 ncic = n_cic[tabla_codec_mclk_index(tabla)];
Joonwoo Park0976d012011-12-22 11:48:18 -08003432 nmeas = TABLA_MBHC_CAL_BTN_DET_PTR(tabla->calibration)->n_meas;
3433 navg = TABLA_MBHC_CAL_GENERAL_PTR(tabla->calibration)->mbhc_navg;
3434 mclk_rate = tabla->mclk_freq;
Joonwoo Park433149a2012-01-11 09:53:54 -08003435 dce_wait = (1000 * 512 * ncic * (nmeas + 1)) / (mclk_rate / 1000);
3436 sta_wait = (1000 * 128 * (navg + 1)) / (mclk_rate / 1000);
Joonwoo Park0976d012011-12-22 11:48:18 -08003437
3438 tabla->mbhc_data.t_dce = dce_wait;
3439 tabla->mbhc_data.t_sta = sta_wait;
3440
3441 /* LDOH and CFILT are already configured during pdata handling.
3442 * Only need to make sure CFILT and bandgap are in Fast mode.
3443 * Need to restore defaults once calculation is done.
3444 */
3445 cfilt_mode = snd_soc_read(codec, tabla->mbhc_bias_regs.cfilt_ctl);
3446 snd_soc_update_bits(codec, tabla->mbhc_bias_regs.cfilt_ctl, 0x40, 0x00);
3447 bg_mode = snd_soc_update_bits(codec, TABLA_A_BIAS_CENTRAL_BG_CTL, 0x02,
3448 0x02);
3449
3450 /* Micbias, CFILT, LDOH, MBHC MUX mode settings
3451 * to perform ADC calibration
3452 */
3453 snd_soc_update_bits(codec, tabla->mbhc_bias_regs.ctl_reg, 0x60,
3454 tabla->micbias << 5);
3455 snd_soc_update_bits(codec, tabla->mbhc_bias_regs.ctl_reg, 0x01, 0x00);
3456 snd_soc_update_bits(codec, TABLA_A_LDO_H_MODE_1, 0x60, 0x60);
3457 snd_soc_write(codec, TABLA_A_TX_7_MBHC_TEST_CTL, 0x78);
3458 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_B1_CTL, 0x04, 0x04);
3459
3460 /* DCE measurement for 0 volts */
3461 snd_soc_write(codec, TABLA_A_CDC_MBHC_CLK_CTL, 0x0A);
3462 snd_soc_write(codec, TABLA_A_CDC_MBHC_EN_CTL, 0x04);
3463 snd_soc_write(codec, TABLA_A_CDC_MBHC_CLK_CTL, 0x02);
Joonwoo Park0976d012011-12-22 11:48:18 -08003464 snd_soc_write(codec, TABLA_A_MBHC_SCALING_MUX_1, 0x81);
3465 usleep_range(100, 100);
3466 snd_soc_write(codec, TABLA_A_CDC_MBHC_EN_CTL, 0x04);
3467 usleep_range(tabla->mbhc_data.t_dce, tabla->mbhc_data.t_dce);
3468 tabla->mbhc_data.dce_z = tabla_codec_read_dce_result(codec);
3469
3470 /* DCE measurment for MB voltage */
3471 snd_soc_write(codec, TABLA_A_CDC_MBHC_CLK_CTL, 0x0A);
3472 snd_soc_write(codec, TABLA_A_CDC_MBHC_CLK_CTL, 0x02);
3473 snd_soc_write(codec, TABLA_A_MBHC_SCALING_MUX_1, 0x82);
3474 usleep_range(100, 100);
3475 snd_soc_write(codec, TABLA_A_CDC_MBHC_EN_CTL, 0x04);
3476 usleep_range(tabla->mbhc_data.t_dce, tabla->mbhc_data.t_dce);
3477 tabla->mbhc_data.dce_mb = tabla_codec_read_dce_result(codec);
3478
3479 /* Sta measuremnt for 0 volts */
3480 snd_soc_write(codec, TABLA_A_CDC_MBHC_CLK_CTL, 0x0A);
3481 snd_soc_write(codec, TABLA_A_CDC_MBHC_EN_CTL, 0x02);
3482 snd_soc_write(codec, TABLA_A_CDC_MBHC_CLK_CTL, 0x02);
Joonwoo Park0976d012011-12-22 11:48:18 -08003483 snd_soc_write(codec, TABLA_A_MBHC_SCALING_MUX_1, 0x81);
3484 usleep_range(100, 100);
3485 snd_soc_write(codec, TABLA_A_CDC_MBHC_EN_CTL, 0x02);
3486 usleep_range(tabla->mbhc_data.t_sta, tabla->mbhc_data.t_sta);
3487 tabla->mbhc_data.sta_z = tabla_codec_read_sta_result(codec);
3488
3489 /* STA Measurement for MB Voltage */
3490 snd_soc_write(codec, TABLA_A_MBHC_SCALING_MUX_1, 0x82);
3491 usleep_range(100, 100);
3492 snd_soc_write(codec, TABLA_A_CDC_MBHC_EN_CTL, 0x02);
3493 usleep_range(tabla->mbhc_data.t_sta, tabla->mbhc_data.t_sta);
3494 tabla->mbhc_data.sta_mb = tabla_codec_read_sta_result(codec);
3495
3496 /* Restore default settings. */
3497 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_B1_CTL, 0x04, 0x00);
3498 snd_soc_update_bits(codec, tabla->mbhc_bias_regs.cfilt_ctl, 0x40,
3499 cfilt_mode);
3500 snd_soc_update_bits(codec, TABLA_A_BIAS_CENTRAL_BG_CTL, 0x02, bg_mode);
3501
3502 snd_soc_write(codec, TABLA_A_MBHC_SCALING_MUX_1, 0x84);
3503 usleep_range(100, 100);
3504}
3505
3506void *tabla_mbhc_cal_btn_det_mp(const struct tabla_mbhc_btn_detect_cfg* btn_det,
3507 const enum tabla_mbhc_btn_det_mem mem)
3508{
3509 void *ret = &btn_det->_v_btn_low;
3510
3511 switch (mem) {
3512 case TABLA_BTN_DET_GAIN:
3513 ret += sizeof(btn_det->_n_cic);
3514 case TABLA_BTN_DET_N_CIC:
3515 ret += sizeof(btn_det->_n_ready);
Joonwoo Parkc0672392012-01-11 11:03:14 -08003516 case TABLA_BTN_DET_N_READY:
Joonwoo Park0976d012011-12-22 11:48:18 -08003517 ret += sizeof(btn_det->_v_btn_high[0]) * btn_det->num_btn;
3518 case TABLA_BTN_DET_V_BTN_HIGH:
3519 ret += sizeof(btn_det->_v_btn_low[0]) * btn_det->num_btn;
3520 case TABLA_BTN_DET_V_BTN_LOW:
3521 /* do nothing */
3522 break;
3523 default:
3524 ret = NULL;
3525 }
3526
3527 return ret;
3528}
3529
3530static void tabla_mbhc_calc_thres(struct snd_soc_codec *codec)
3531{
3532 struct tabla_priv *tabla;
3533 s16 btn_mv = 0, btn_delta_mv;
3534 struct tabla_mbhc_btn_detect_cfg *btn_det;
3535 struct tabla_mbhc_plug_type_cfg *plug_type;
3536 u16 *btn_high;
Joonwoo Parkc0672392012-01-11 11:03:14 -08003537 u8 *n_ready;
Joonwoo Park0976d012011-12-22 11:48:18 -08003538 int i;
3539
3540 tabla = snd_soc_codec_get_drvdata(codec);
3541 btn_det = TABLA_MBHC_CAL_BTN_DET_PTR(tabla->calibration);
3542 plug_type = TABLA_MBHC_CAL_PLUG_TYPE_PTR(tabla->calibration);
3543
Joonwoo Parkc0672392012-01-11 11:03:14 -08003544 n_ready = tabla_mbhc_cal_btn_det_mp(btn_det, TABLA_BTN_DET_N_READY);
Joonwoo Park0976d012011-12-22 11:48:18 -08003545 if (tabla->mclk_freq == TABLA_MCLK_RATE_12288KHZ) {
Joonwoo Park0976d012011-12-22 11:48:18 -08003546 tabla->mbhc_data.npoll = 9;
3547 tabla->mbhc_data.nbounce_wait = 30;
3548 } else if (tabla->mclk_freq == TABLA_MCLK_RATE_9600KHZ) {
Joonwoo Park0976d012011-12-22 11:48:18 -08003549 tabla->mbhc_data.npoll = 7;
3550 tabla->mbhc_data.nbounce_wait = 23;
Joonwoo Parkc0672392012-01-11 11:03:14 -08003551 }
Joonwoo Park0976d012011-12-22 11:48:18 -08003552
Joonwoo Park433149a2012-01-11 09:53:54 -08003553 tabla->mbhc_data.t_sta_dce = ((1000 * 256) / (tabla->mclk_freq / 1000) *
Joonwoo Parkc0672392012-01-11 11:03:14 -08003554 n_ready[tabla_codec_mclk_index(tabla)]) +
3555 10;
Joonwoo Park0976d012011-12-22 11:48:18 -08003556 tabla->mbhc_data.v_ins_hu =
3557 tabla_codec_v_sta_dce(codec, STA, plug_type->v_hs_max);
3558 tabla->mbhc_data.v_ins_h =
3559 tabla_codec_v_sta_dce(codec, DCE, plug_type->v_hs_max);
3560
3561 btn_high = tabla_mbhc_cal_btn_det_mp(btn_det, TABLA_BTN_DET_V_BTN_HIGH);
3562 for (i = 0; i < btn_det->num_btn; i++)
3563 btn_mv = btn_high[i] > btn_mv ? btn_high[i] : btn_mv;
3564
3565 tabla->mbhc_data.v_b1_h = tabla_codec_v_sta_dce(codec, DCE, btn_mv);
3566 btn_delta_mv = btn_mv + btn_det->v_btn_press_delta_sta;
3567
3568 tabla->mbhc_data.v_b1_hu =
3569 tabla_codec_v_sta_dce(codec, STA, btn_delta_mv);
3570
3571 btn_delta_mv = btn_mv + btn_det->v_btn_press_delta_cic;
3572
3573 tabla->mbhc_data.v_b1_huc =
3574 tabla_codec_v_sta_dce(codec, DCE, btn_delta_mv);
3575
3576 tabla->mbhc_data.v_brh = tabla->mbhc_data.v_b1_h;
3577 tabla->mbhc_data.v_brl = 0xFA55;
3578
3579 tabla->mbhc_data.v_no_mic =
3580 tabla_codec_v_sta_dce(codec, STA, plug_type->v_no_mic);
3581}
3582
3583void tabla_mbhc_init(struct snd_soc_codec *codec)
3584{
3585 struct tabla_priv *tabla;
3586 struct tabla_mbhc_general_cfg *generic;
3587 struct tabla_mbhc_btn_detect_cfg *btn_det;
3588 int n;
3589 u8 tabla_ver;
3590 u8 *n_cic, *gain;
3591
3592 tabla = snd_soc_codec_get_drvdata(codec);
3593 generic = TABLA_MBHC_CAL_GENERAL_PTR(tabla->calibration);
3594 btn_det = TABLA_MBHC_CAL_BTN_DET_PTR(tabla->calibration);
3595
3596 tabla_ver = snd_soc_read(codec, TABLA_A_CHIP_VERSION);
3597 tabla_ver &= 0x1F;
3598
3599 for (n = 0; n < 8; n++) {
3600 if ((tabla_ver != TABLA_VERSION_1_0 &&
3601 tabla_ver != TABLA_VERSION_1_1) || n != 7) {
3602 snd_soc_update_bits(codec,
3603 TABLA_A_CDC_MBHC_FEATURE_B1_CFG,
3604 0x07, n);
3605 snd_soc_write(codec, TABLA_A_CDC_MBHC_FEATURE_B2_CFG,
3606 btn_det->c[n]);
3607 }
3608 }
3609 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_B2_CTL, 0x07,
3610 btn_det->nc);
3611
3612 n_cic = tabla_mbhc_cal_btn_det_mp(btn_det, TABLA_BTN_DET_N_CIC);
3613 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_TIMER_B6_CTL, 0xFF,
Joonwoo Park107edf02012-01-11 11:42:24 -08003614 n_cic[tabla_codec_mclk_index(tabla)]);
Joonwoo Park0976d012011-12-22 11:48:18 -08003615
3616 gain = tabla_mbhc_cal_btn_det_mp(btn_det, TABLA_BTN_DET_GAIN);
Joonwoo Park107edf02012-01-11 11:42:24 -08003617 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_B2_CTL, 0x78,
3618 gain[tabla_codec_mclk_index(tabla)] << 3);
Joonwoo Park0976d012011-12-22 11:48:18 -08003619
3620 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_TIMER_B4_CTL, 0x70,
3621 generic->mbhc_nsa << 4);
3622
3623 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_TIMER_B4_CTL, 0x0F,
3624 btn_det->n_meas);
3625
3626 snd_soc_write(codec, TABLA_A_CDC_MBHC_TIMER_B5_CTL, generic->mbhc_navg);
3627
3628 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_B1_CTL, 0x80, 0x80);
3629
3630 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_B1_CTL, 0x78,
3631 btn_det->mbhc_nsc << 3);
3632
Joonwoo Park6c1ebb62012-01-16 19:08:43 -08003633 snd_soc_update_bits(codec, tabla->reg_addr.micb_4_mbhc, 0x03,
3634 TABLA_MICBIAS2);
Joonwoo Park0976d012011-12-22 11:48:18 -08003635
3636 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_B1_CTL, 0x02, 0x02);
3637}
3638
Patrick Lai64b43262011-12-06 17:29:15 -08003639static bool tabla_mbhc_fw_validate(const struct firmware *fw)
3640{
3641 u32 cfg_offset;
3642 struct tabla_mbhc_imped_detect_cfg *imped_cfg;
3643 struct tabla_mbhc_btn_detect_cfg *btn_cfg;
3644
3645 if (fw->size < TABLA_MBHC_CAL_MIN_SIZE)
3646 return false;
3647
3648 /* previous check guarantees that there is enough fw data up
3649 * to num_btn
3650 */
3651 btn_cfg = TABLA_MBHC_CAL_BTN_DET_PTR(fw->data);
3652 cfg_offset = (u32) ((void *) btn_cfg - (void *) fw->data);
3653 if (fw->size < (cfg_offset + TABLA_MBHC_CAL_BTN_SZ(btn_cfg)))
3654 return false;
3655
3656 /* previous check guarantees that there is enough fw data up
3657 * to start of impedance detection configuration
3658 */
3659 imped_cfg = TABLA_MBHC_CAL_IMPED_DET_PTR(fw->data);
3660 cfg_offset = (u32) ((void *) imped_cfg - (void *) fw->data);
3661
3662 if (fw->size < (cfg_offset + TABLA_MBHC_CAL_IMPED_MIN_SZ))
3663 return false;
3664
3665 if (fw->size < (cfg_offset + TABLA_MBHC_CAL_IMPED_SZ(imped_cfg)))
3666 return false;
3667
3668 return true;
3669}
3670static void mbhc_fw_read(struct work_struct *work)
3671{
3672 struct delayed_work *dwork;
3673 struct tabla_priv *tabla;
3674 struct snd_soc_codec *codec;
3675 const struct firmware *fw;
3676 int ret = -1, retry = 0, rc;
3677
3678 dwork = to_delayed_work(work);
3679 tabla = container_of(dwork, struct tabla_priv,
3680 mbhc_firmware_dwork);
3681 codec = tabla->codec;
3682
3683 while (retry < MBHC_FW_READ_ATTEMPTS) {
3684 retry++;
3685 pr_info("%s:Attempt %d to request MBHC firmware\n",
3686 __func__, retry);
3687 ret = request_firmware(&fw, "wcd9310/wcd9310_mbhc.bin",
3688 codec->dev);
3689
3690 if (ret != 0) {
3691 usleep_range(MBHC_FW_READ_TIMEOUT,
3692 MBHC_FW_READ_TIMEOUT);
3693 } else {
3694 pr_info("%s: MBHC Firmware read succesful\n", __func__);
3695 break;
3696 }
3697 }
3698
3699 if (ret != 0) {
3700 pr_err("%s: Cannot load MBHC firmware use default cal\n",
3701 __func__);
3702 } else if (tabla_mbhc_fw_validate(fw) == false) {
3703 pr_err("%s: Invalid MBHC cal data size use default cal\n",
3704 __func__);
3705 release_firmware(fw);
3706 } else {
3707 tabla->calibration = (void *)fw->data;
3708 tabla->mbhc_fw = fw;
3709 }
3710
3711 tabla->mclk_cb(codec, 1);
3712 tabla_mbhc_init(codec);
3713 tabla_mbhc_cal(codec);
3714 tabla_mbhc_calc_thres(codec);
3715 tabla->mclk_cb(codec, 0);
3716 tabla_codec_calibrate_hs_polling(codec);
3717 rc = tabla_codec_enable_hs_detect(codec, 1);
3718
3719 if (IS_ERR_VALUE(rc))
3720 pr_err("%s: Failed to setup MBHC detection\n", __func__);
3721
3722}
3723
Bradley Rubincb1e2732011-06-23 16:49:20 -07003724int tabla_hs_detect(struct snd_soc_codec *codec,
Joonwoo Park0976d012011-12-22 11:48:18 -08003725 struct snd_soc_jack *headset_jack,
3726 struct snd_soc_jack *button_jack,
3727 void *calibration, enum tabla_micbias_num micbias,
3728 int (*mclk_cb_fn) (struct snd_soc_codec*, int),
3729 int read_fw_bin, u32 mclk_rate)
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003730{
3731 struct tabla_priv *tabla;
Patrick Lai64b43262011-12-06 17:29:15 -08003732 int rc = 0;
Patrick Lai49efeac2011-11-03 11:01:12 -07003733
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003734 if (!codec || !calibration) {
3735 pr_err("Error: no codec or calibration\n");
3736 return -EINVAL;
3737 }
Joonwoo Park107edf02012-01-11 11:42:24 -08003738
3739 if (mclk_rate != TABLA_MCLK_RATE_12288KHZ) {
3740 if (mclk_rate == TABLA_MCLK_RATE_9600KHZ)
3741 pr_err("Error: clock rate %dHz is not yet supported\n",
3742 mclk_rate);
3743 else
3744 pr_err("Error: unsupported clock rate %d\n", mclk_rate);
3745 return -EINVAL;
3746 }
3747
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003748 tabla = snd_soc_codec_get_drvdata(codec);
Bradley Rubincb1e2732011-06-23 16:49:20 -07003749 tabla->headset_jack = headset_jack;
3750 tabla->button_jack = button_jack;
Joonwoo Park0976d012011-12-22 11:48:18 -08003751 tabla->micbias = micbias;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003752 tabla->calibration = calibration;
Joonwoo Park0976d012011-12-22 11:48:18 -08003753 tabla->mclk_cb = mclk_cb_fn;
3754 tabla->mclk_freq = mclk_rate;
Bhalchandra Gajare02d90cd2011-09-30 16:14:00 -07003755 tabla_get_mbhc_micbias_regs(codec, &tabla->mbhc_bias_regs);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003756
Bhalchandra Gajare19d9c132011-11-18 14:57:08 -08003757 /* Put CFILT in fast mode by default */
3758 snd_soc_update_bits(codec, tabla->mbhc_bias_regs.cfilt_ctl,
3759 0x40, TABLA_CFILT_FAST_MODE);
Patrick Lai64b43262011-12-06 17:29:15 -08003760 INIT_DELAYED_WORK(&tabla->mbhc_firmware_dwork, mbhc_fw_read);
Bhalchandra Gajare0a792b12011-09-06 16:36:58 -07003761 INIT_DELAYED_WORK(&tabla->btn0_dwork, btn0_lpress_fn);
Patrick Lai49efeac2011-11-03 11:01:12 -07003762 INIT_WORK(&tabla->hphlocp_work, hphlocp_off_report);
3763 INIT_WORK(&tabla->hphrocp_work, hphrocp_off_report);
Joonwoo Park0976d012011-12-22 11:48:18 -08003764
3765 if (!read_fw_bin) {
3766 tabla->mclk_cb(codec, 1);
3767 tabla_mbhc_init(codec);
3768 tabla_mbhc_cal(codec);
3769 tabla_mbhc_calc_thres(codec);
3770 tabla->mclk_cb(codec, 0);
3771 tabla_codec_calibrate_hs_polling(codec);
3772 rc = tabla_codec_enable_hs_detect(codec, 1);
3773 } else {
Patrick Lai64b43262011-12-06 17:29:15 -08003774 schedule_delayed_work(&tabla->mbhc_firmware_dwork,
3775 usecs_to_jiffies(MBHC_FW_READ_TIMEOUT));
Joonwoo Park0976d012011-12-22 11:48:18 -08003776 }
Patrick Lai49efeac2011-11-03 11:01:12 -07003777
3778 if (!IS_ERR_VALUE(rc)) {
3779 snd_soc_update_bits(codec, TABLA_A_RX_HPH_OCP_CTL, 0x10,
3780 0x10);
3781 tabla_enable_irq(codec->control_data,
3782 TABLA_IRQ_HPH_PA_OCPL_FAULT);
3783 tabla_enable_irq(codec->control_data,
3784 TABLA_IRQ_HPH_PA_OCPR_FAULT);
3785 }
3786
3787 return rc;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003788}
3789EXPORT_SYMBOL_GPL(tabla_hs_detect);
3790
Joonwoo Park6b9b03f2012-01-23 18:48:54 -08003791static int tabla_determine_button(const struct tabla_priv *priv,
3792 const s32 bias_mv)
3793{
3794 s16 *v_btn_low, *v_btn_high;
3795 struct tabla_mbhc_btn_detect_cfg *btn_det;
3796 int i, btn = -1;
3797
3798 btn_det = TABLA_MBHC_CAL_BTN_DET_PTR(priv->calibration);
3799 v_btn_low = tabla_mbhc_cal_btn_det_mp(btn_det, TABLA_BTN_DET_V_BTN_LOW);
3800 v_btn_high = tabla_mbhc_cal_btn_det_mp(btn_det,
3801 TABLA_BTN_DET_V_BTN_HIGH);
3802 for (i = 0; i < btn_det->num_btn; i++) {
3803 if ((v_btn_low[i] <= bias_mv) && (v_btn_high[i] >= bias_mv)) {
3804 btn = i;
3805 break;
3806 }
3807 }
3808
3809 if (btn == -1)
3810 pr_debug("%s: couldn't find button number for mic mv %d\n",
3811 __func__, bias_mv);
3812
3813 return btn;
3814}
3815
3816static int tabla_get_button_mask(const int btn)
3817{
3818 int mask = 0;
3819 switch (btn) {
3820 case 0:
3821 mask = SND_JACK_BTN_0;
3822 break;
3823 case 1:
3824 mask = SND_JACK_BTN_1;
3825 break;
3826 case 2:
3827 mask = SND_JACK_BTN_2;
3828 break;
3829 case 3:
3830 mask = SND_JACK_BTN_3;
3831 break;
3832 case 4:
3833 mask = SND_JACK_BTN_4;
3834 break;
3835 case 5:
3836 mask = SND_JACK_BTN_5;
3837 break;
3838 case 6:
3839 mask = SND_JACK_BTN_6;
3840 break;
3841 case 7:
3842 mask = SND_JACK_BTN_7;
3843 break;
3844 }
3845 return mask;
3846}
3847
Bradley Rubincb1e2732011-06-23 16:49:20 -07003848static irqreturn_t tabla_dce_handler(int irq, void *data)
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003849{
Joonwoo Park6b9b03f2012-01-23 18:48:54 -08003850 int i, mask;
3851 short bias_value_dce;
3852 s32 bias_mv_dce;
3853 int btn = -1, meas = 0;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003854 struct tabla_priv *priv = data;
Joonwoo Park6b9b03f2012-01-23 18:48:54 -08003855 const struct tabla_mbhc_btn_detect_cfg *d =
3856 TABLA_MBHC_CAL_BTN_DET_PTR(priv->calibration);
3857 short btnmeas[d->n_btn_meas + 1];
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003858 struct snd_soc_codec *codec = priv->codec;
Joonwoo Park816b8e62012-01-23 16:03:21 -08003859 struct tabla *core = dev_get_drvdata(priv->codec->dev->parent);
Bradley Rubincb1e2732011-06-23 16:49:20 -07003860
3861 tabla_disable_irq(codec->control_data, TABLA_IRQ_MBHC_REMOVAL);
3862 tabla_disable_irq(codec->control_data, TABLA_IRQ_MBHC_POTENTIAL);
3863
Joonwoo Park6b9b03f2012-01-23 18:48:54 -08003864 bias_value_dce = tabla_codec_read_dce_result(codec);
3865 bias_mv_dce = tabla_codec_sta_dce_v(codec, 1, bias_value_dce);
Bradley Rubin89ffd0a2011-07-21 16:04:06 -07003866
Joonwoo Park6b9b03f2012-01-23 18:48:54 -08003867 /* determine pressed button */
3868 btnmeas[meas++] = tabla_determine_button(priv, bias_mv_dce);
3869 pr_debug("%s: meas %d - DCE %d,%d, button %d\n", __func__,
3870 meas - 1, bias_value_dce, bias_mv_dce, btnmeas[meas - 1]);
3871 if (d->n_btn_meas == 0)
3872 btn = btnmeas[0];
3873 for (; ((d->n_btn_meas) && (meas < (d->n_btn_meas + 1))); meas++) {
3874 bias_value_dce = tabla_codec_sta_dce(codec, 1);
3875 bias_mv_dce = tabla_codec_sta_dce_v(codec, 1, bias_value_dce);
3876 btnmeas[meas] = tabla_determine_button(priv, bias_mv_dce);
3877 pr_debug("%s: meas %d - DCE %d,%d, button %d\n",
3878 __func__, meas, bias_value_dce, bias_mv_dce,
3879 btnmeas[meas]);
3880 /* if large enough measurements are collected,
3881 * start to check if last all n_btn_con measurements were
3882 * in same button low/high range */
3883 if (meas + 1 >= d->n_btn_con) {
3884 for (i = 0; i < d->n_btn_con; i++)
3885 if ((btnmeas[meas] < 0) ||
3886 (btnmeas[meas] != btnmeas[meas - i]))
3887 break;
3888 if (i == d->n_btn_con) {
3889 /* button pressed */
3890 btn = btnmeas[meas];
3891 break;
3892 }
3893 }
3894 /* if left measurements are less than n_btn_con,
3895 * it's impossible to find button number */
3896 if ((d->n_btn_meas - meas) < d->n_btn_con)
3897 break;
Joonwoo Park8b1f0982011-12-08 17:12:45 -08003898 }
Bhalchandra Gajare0a792b12011-09-06 16:36:58 -07003899
Joonwoo Park6b9b03f2012-01-23 18:48:54 -08003900 if (btn >= 0) {
3901 mask = tabla_get_button_mask(btn);
3902 priv->buttons_pressed |= mask;
3903
3904 msleep(100);
3905
3906 /* XXX: assuming button 0 has the lowest micbias voltage */
3907 if (btn == 0) {
Joonwoo Park816b8e62012-01-23 16:03:21 -08003908 tabla_lock_sleep(core);
Joonwoo Park6b9b03f2012-01-23 18:48:54 -08003909 if (schedule_delayed_work(&priv->btn0_dwork,
3910 msecs_to_jiffies(400)) == 0) {
3911 WARN(1, "Button pressed twice without release"
3912 "event\n");
Joonwoo Park816b8e62012-01-23 16:03:21 -08003913 tabla_unlock_sleep(core);
Joonwoo Park6b9b03f2012-01-23 18:48:54 -08003914 }
3915 } else {
3916 pr_debug("%s: Reporting short button %d(0x%x) press\n",
3917 __func__, btn, mask);
3918 tabla_snd_soc_jack_report(priv, priv->button_jack, mask,
3919 mask);
3920 }
Joonwoo Park816b8e62012-01-23 16:03:21 -08003921 } else {
Joonwoo Park6b9b03f2012-01-23 18:48:54 -08003922 pr_debug("%s: bogus button press, too short press?\n",
3923 __func__);
Joonwoo Park816b8e62012-01-23 16:03:21 -08003924 }
Joonwoo Park6b9b03f2012-01-23 18:48:54 -08003925
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003926 return IRQ_HANDLED;
3927}
3928
Bradley Rubincb1e2732011-06-23 16:49:20 -07003929static irqreturn_t tabla_release_handler(int irq, void *data)
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003930{
Joonwoo Parke5d3aa92012-01-11 14:47:15 -08003931 int ret;
3932 short mb_v;
Joonwoo Park816b8e62012-01-23 16:03:21 -08003933 struct tabla_priv *priv = data;
3934 struct snd_soc_codec *codec = priv->codec;
3935 struct tabla *core = dev_get_drvdata(priv->codec->dev->parent);
Bhalchandra Gajare0a792b12011-09-06 16:36:58 -07003936
Joonwoo Park6b9b03f2012-01-23 18:48:54 -08003937 pr_debug("%s: enter\n", __func__);
Bradley Rubin4d09cf42011-08-17 17:59:16 -07003938 tabla_disable_irq(codec->control_data, TABLA_IRQ_MBHC_RELEASE);
Bhalchandra Gajare0a792b12011-09-06 16:36:58 -07003939
Bradley Rubincb1e2732011-06-23 16:49:20 -07003940 if (priv->buttons_pressed & SND_JACK_BTN_0) {
Bhalchandra Gajare0a792b12011-09-06 16:36:58 -07003941 ret = cancel_delayed_work(&priv->btn0_dwork);
Bhalchandra Gajare0a792b12011-09-06 16:36:58 -07003942 if (ret == 0) {
Joonwoo Park6b9b03f2012-01-23 18:48:54 -08003943 pr_debug("%s: Reporting long button 0 release event\n",
3944 __func__);
Joonwoo Park0976d012011-12-22 11:48:18 -08003945 if (priv->button_jack)
Joonwoo Park8b1f0982011-12-08 17:12:45 -08003946 tabla_snd_soc_jack_report(priv,
3947 priv->button_jack, 0,
3948 SND_JACK_BTN_0);
Bhalchandra Gajare0a792b12011-09-06 16:36:58 -07003949 } else {
Joonwoo Park8b1f0982011-12-08 17:12:45 -08003950 /* if scheduled btn0_dwork is canceled from here,
3951 * we have to unlock from here instead btn0_work */
Joonwoo Park816b8e62012-01-23 16:03:21 -08003952 tabla_unlock_sleep(core);
Joonwoo Park0976d012011-12-22 11:48:18 -08003953 mb_v = tabla_codec_sta_dce(codec, 0);
3954 pr_debug("%s: Mic Voltage on release STA: %d,%d\n",
3955 __func__, mb_v,
3956 tabla_codec_sta_dce_v(codec, 0, mb_v));
Bhalchandra Gajare0a792b12011-09-06 16:36:58 -07003957
Joonwoo Parke5d3aa92012-01-11 14:47:15 -08003958 if (mb_v < (short)priv->mbhc_data.v_b1_hu ||
3959 mb_v > (short)priv->mbhc_data.v_ins_hu)
Bhalchandra Gajare0a792b12011-09-06 16:36:58 -07003960 pr_debug("%s: Fake buttton press interrupt\n",
Joonwoo Park6b9b03f2012-01-23 18:48:54 -08003961 __func__);
Joonwoo Park0976d012011-12-22 11:48:18 -08003962 else if (priv->button_jack) {
Joonwoo Park6b9b03f2012-01-23 18:48:54 -08003963 pr_debug("%s: Reporting short button 0 "
Joonwoo Park0976d012011-12-22 11:48:18 -08003964 "press and release\n", __func__);
3965 tabla_snd_soc_jack_report(priv,
3966 priv->button_jack,
3967 SND_JACK_BTN_0,
3968 SND_JACK_BTN_0);
3969 tabla_snd_soc_jack_report(priv,
Joonwoo Park6b9b03f2012-01-23 18:48:54 -08003970 priv->button_jack, 0,
3971 SND_JACK_BTN_0);
Bhalchandra Gajare0a792b12011-09-06 16:36:58 -07003972 }
3973 }
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003974
Bradley Rubincb1e2732011-06-23 16:49:20 -07003975 priv->buttons_pressed &= ~SND_JACK_BTN_0;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003976 }
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003977
Joonwoo Park6b9b03f2012-01-23 18:48:54 -08003978 if (priv->buttons_pressed) {
3979 pr_debug("%s:reporting button release mask 0x%x\n", __func__,
3980 priv->buttons_pressed);
3981 tabla_snd_soc_jack_report(priv, priv->button_jack, 0,
3982 priv->buttons_pressed);
3983 /* hardware doesn't detect another button press until
3984 * already pressed button is released.
3985 * therefore buttons_pressed has only one button's mask. */
3986 priv->buttons_pressed &= ~TABLA_JACK_BUTTON_MASK;
3987 }
3988
Bradley Rubin688c66a2011-08-16 12:25:13 -07003989 tabla_codec_start_hs_polling(codec);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003990 return IRQ_HANDLED;
3991}
3992
Bradley Rubincb1e2732011-06-23 16:49:20 -07003993static void tabla_codec_shutdown_hs_removal_detect(struct snd_soc_codec *codec)
3994{
3995 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
Joonwoo Park0976d012011-12-22 11:48:18 -08003996 const struct tabla_mbhc_general_cfg *generic =
3997 TABLA_MBHC_CAL_GENERAL_PTR(tabla->calibration);
Bradley Rubincb1e2732011-06-23 16:49:20 -07003998
Kiran Kandi6fae8bf2011-08-15 10:36:42 -07003999 if (!tabla->mclk_enabled && !tabla->mbhc_polling_active)
Bradley Rubincb1e2732011-06-23 16:49:20 -07004000 tabla_codec_enable_config_mode(codec, 1);
4001
4002 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_CLK_CTL, 0x2, 0x2);
4003 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_B1_CTL, 0x6, 0x0);
Bradley Rubincb1e2732011-06-23 16:49:20 -07004004
Joonwoo Park0976d012011-12-22 11:48:18 -08004005 snd_soc_update_bits(codec, tabla->mbhc_bias_regs.mbhc_reg, 0x80, 0x00);
4006
4007 usleep_range(generic->t_shutdown_plug_rem,
4008 generic->t_shutdown_plug_rem);
Bradley Rubincb1e2732011-06-23 16:49:20 -07004009
4010 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_CLK_CTL, 0xA, 0x8);
Kiran Kandi6fae8bf2011-08-15 10:36:42 -07004011 if (!tabla->mclk_enabled && !tabla->mbhc_polling_active)
Bradley Rubincb1e2732011-06-23 16:49:20 -07004012 tabla_codec_enable_config_mode(codec, 0);
4013
4014 snd_soc_write(codec, TABLA_A_MBHC_SCALING_MUX_1, 0x00);
4015}
4016
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004017static void tabla_codec_shutdown_hs_polling(struct snd_soc_codec *codec)
4018{
4019 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
Bradley Rubincb1e2732011-06-23 16:49:20 -07004020
4021 tabla_codec_shutdown_hs_removal_detect(codec);
4022
Kiran Kandi6fae8bf2011-08-15 10:36:42 -07004023 if (!tabla->mclk_enabled) {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004024 snd_soc_update_bits(codec, TABLA_A_TX_COM_BIAS, 0xE0, 0x00);
Asish Bhattacharya486745a2012-01-20 06:41:53 +05304025 tabla_codec_disable_clock_block(codec);
4026 tabla_codec_enable_bandgap(codec, TABLA_BANDGAP_OFF);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004027 }
4028
4029 tabla->mbhc_polling_active = false;
4030}
4031
Patrick Lai49efeac2011-11-03 11:01:12 -07004032static irqreturn_t tabla_hphl_ocp_irq(int irq, void *data)
4033{
4034 struct tabla_priv *tabla = data;
4035 struct snd_soc_codec *codec;
4036
4037 pr_info("%s: received HPHL OCP irq\n", __func__);
4038
4039 if (tabla) {
4040 codec = tabla->codec;
Patrick Laic7cae882011-11-18 11:52:49 -08004041 if (tabla->hphlocp_cnt++ < TABLA_OCP_ATTEMPT) {
4042 pr_info("%s: retry\n", __func__);
4043 snd_soc_update_bits(codec, TABLA_A_RX_HPH_OCP_CTL, 0x10,
4044 0x00);
4045 snd_soc_update_bits(codec, TABLA_A_RX_HPH_OCP_CTL, 0x10,
4046 0x10);
4047 } else {
4048 tabla_disable_irq(codec->control_data,
4049 TABLA_IRQ_HPH_PA_OCPL_FAULT);
4050 tabla->hphlocp_cnt = 0;
4051 tabla->hph_status |= SND_JACK_OC_HPHL;
4052 if (tabla->headset_jack)
4053 tabla_snd_soc_jack_report(tabla,
4054 tabla->headset_jack,
4055 tabla->hph_status,
4056 TABLA_JACK_MASK);
Patrick Lai49efeac2011-11-03 11:01:12 -07004057 }
4058 } else {
4059 pr_err("%s: Bad tabla private data\n", __func__);
4060 }
4061
4062 return IRQ_HANDLED;
4063}
4064
4065static irqreturn_t tabla_hphr_ocp_irq(int irq, void *data)
4066{
4067 struct tabla_priv *tabla = data;
4068 struct snd_soc_codec *codec;
4069
4070 pr_info("%s: received HPHR OCP irq\n", __func__);
4071
4072 if (tabla) {
4073 codec = tabla->codec;
Patrick Laic7cae882011-11-18 11:52:49 -08004074 if (tabla->hphrocp_cnt++ < TABLA_OCP_ATTEMPT) {
4075 pr_info("%s: retry\n", __func__);
4076 snd_soc_update_bits(codec, TABLA_A_RX_HPH_OCP_CTL, 0x10,
4077 0x00);
4078 snd_soc_update_bits(codec, TABLA_A_RX_HPH_OCP_CTL, 0x10,
4079 0x10);
4080 } else {
4081 tabla_disable_irq(codec->control_data,
4082 TABLA_IRQ_HPH_PA_OCPR_FAULT);
4083 tabla->hphrocp_cnt = 0;
4084 tabla->hph_status |= SND_JACK_OC_HPHR;
4085 if (tabla->headset_jack)
4086 tabla_snd_soc_jack_report(tabla,
4087 tabla->headset_jack,
4088 tabla->hph_status,
4089 TABLA_JACK_MASK);
Patrick Lai49efeac2011-11-03 11:01:12 -07004090 }
4091 } else {
4092 pr_err("%s: Bad tabla private data\n", __func__);
4093 }
4094
4095 return IRQ_HANDLED;
4096}
4097
Joonwoo Parka9444452011-12-08 18:48:27 -08004098static void tabla_sync_hph_state(struct tabla_priv *tabla)
4099{
4100 if (test_and_clear_bit(TABLA_HPHR_PA_OFF_ACK,
4101 &tabla->hph_pa_dac_state)) {
4102 pr_debug("%s: HPHR clear flag and enable PA\n", __func__);
4103 snd_soc_update_bits(tabla->codec, TABLA_A_RX_HPH_CNP_EN, 0x10,
4104 1 << 4);
4105 }
4106 if (test_and_clear_bit(TABLA_HPHL_PA_OFF_ACK,
4107 &tabla->hph_pa_dac_state)) {
4108 pr_debug("%s: HPHL clear flag and enable PA\n", __func__);
4109 snd_soc_update_bits(tabla->codec, TABLA_A_RX_HPH_CNP_EN, 0x20,
4110 1 << 5);
4111 }
4112
4113 if (test_and_clear_bit(TABLA_HPHR_DAC_OFF_ACK,
4114 &tabla->hph_pa_dac_state)) {
4115 pr_debug("%s: HPHR clear flag and enable DAC\n", __func__);
4116 snd_soc_update_bits(tabla->codec, TABLA_A_RX_HPH_R_DAC_CTL,
4117 0xC0, 0xC0);
4118 }
4119 if (test_and_clear_bit(TABLA_HPHL_DAC_OFF_ACK,
4120 &tabla->hph_pa_dac_state)) {
4121 pr_debug("%s: HPHL clear flag and enable DAC\n", __func__);
4122 snd_soc_update_bits(tabla->codec, TABLA_A_RX_HPH_L_DAC_CTL,
4123 0xC0, 0xC0);
4124 }
4125}
4126
Bradley Rubincb1e2732011-06-23 16:49:20 -07004127static irqreturn_t tabla_hs_insert_irq(int irq, void *data)
4128{
4129 struct tabla_priv *priv = data;
4130 struct snd_soc_codec *codec = priv->codec;
Joonwoo Park0976d012011-12-22 11:48:18 -08004131 const struct tabla_mbhc_plug_detect_cfg *plug_det =
4132 TABLA_MBHC_CAL_PLUG_DET_PTR(priv->calibration);
Bradley Rubin355611a2011-08-24 14:01:18 -07004133 int ldo_h_on, micb_cfilt_on;
Joonwoo Park0976d012011-12-22 11:48:18 -08004134 short mb_v;
Bhalchandra Gajare7fc72332011-10-13 19:01:55 -07004135 u8 is_removal;
Joonwoo Park0976d012011-12-22 11:48:18 -08004136 int mic_mv;
Bhalchandra Gajare343cbb02011-09-07 18:58:19 -07004137
Joonwoo Parkf4267c22012-01-10 13:25:24 -08004138 pr_debug("%s: enter\n", __func__);
Bradley Rubincb1e2732011-06-23 16:49:20 -07004139 tabla_disable_irq(codec->control_data, TABLA_IRQ_MBHC_INSERTION);
Joonwoo Park8b1f0982011-12-08 17:12:45 -08004140
Bhalchandra Gajare7fc72332011-10-13 19:01:55 -07004141 is_removal = snd_soc_read(codec, TABLA_A_CDC_MBHC_INT_CTL) & 0x02;
4142 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_INT_CTL, 0x03, 0x00);
4143
4144 /* Turn off both HPH and MIC line schmitt triggers */
Joonwoo Park0976d012011-12-22 11:48:18 -08004145 snd_soc_update_bits(codec, priv->mbhc_bias_regs.mbhc_reg, 0x90, 0x00);
Bhalchandra Gajare7fc72332011-10-13 19:01:55 -07004146 snd_soc_update_bits(codec, TABLA_A_MBHC_HPH, 0x13, 0x00);
Bradley Rubincb1e2732011-06-23 16:49:20 -07004147
Joonwoo Parkf4267c22012-01-10 13:25:24 -08004148 if (priv->mbhc_fake_ins_start &&
4149 time_after(jiffies, priv->mbhc_fake_ins_start +
4150 msecs_to_jiffies(TABLA_FAKE_INS_THRESHOLD_MS))) {
Bhalchandra Gajare9494fa262011-11-10 19:25:59 -08004151 pr_debug("%s: fake context interrupt, reset insertion\n",
Joonwoo Parkf4267c22012-01-10 13:25:24 -08004152 __func__);
4153 priv->mbhc_fake_ins_start = 0;
Bhalchandra Gajare9494fa262011-11-10 19:25:59 -08004154 tabla_codec_shutdown_hs_polling(codec);
4155 tabla_codec_enable_hs_detect(codec, 1);
4156 return IRQ_HANDLED;
4157 }
4158
Bradley Rubin355611a2011-08-24 14:01:18 -07004159 ldo_h_on = snd_soc_read(codec, TABLA_A_LDO_H_MODE_1) & 0x80;
Joonwoo Park0976d012011-12-22 11:48:18 -08004160 micb_cfilt_on = snd_soc_read(codec, priv->mbhc_bias_regs.cfilt_ctl)
4161 & 0x80;
Bradley Rubin355611a2011-08-24 14:01:18 -07004162
4163 if (!ldo_h_on)
4164 snd_soc_update_bits(codec, TABLA_A_LDO_H_MODE_1, 0x80, 0x80);
4165 if (!micb_cfilt_on)
Bhalchandra Gajare02d90cd2011-09-30 16:14:00 -07004166 snd_soc_update_bits(codec, priv->mbhc_bias_regs.cfilt_ctl,
Joonwoo Park0976d012011-12-22 11:48:18 -08004167 0x80, 0x80);
4168 if (plug_det->t_ins_complete > 20)
4169 msleep(plug_det->t_ins_complete);
4170 else
4171 usleep_range(plug_det->t_ins_complete * 1000,
4172 plug_det->t_ins_complete * 1000);
Bradley Rubincb1e2732011-06-23 16:49:20 -07004173
Bhalchandra Gajare7fc72332011-10-13 19:01:55 -07004174 if (!ldo_h_on)
4175 snd_soc_update_bits(codec, TABLA_A_LDO_H_MODE_1, 0x80, 0x0);
4176 if (!micb_cfilt_on)
4177 snd_soc_update_bits(codec, priv->mbhc_bias_regs.cfilt_ctl,
Joonwoo Park0976d012011-12-22 11:48:18 -08004178 0x80, 0x0);
Bhalchandra Gajare7fc72332011-10-13 19:01:55 -07004179
4180 if (is_removal) {
Bhalchandra Gajared9ebb6c2011-10-03 19:54:41 -07004181 /*
4182 * If headphone is removed while playback is in progress,
4183 * it is possible that micbias will be switched to VDDIO.
4184 */
4185 if (priv->mbhc_micbias_switched)
4186 tabla_codec_switch_micbias(codec, 0);
Patrick Lai72aa4da2011-12-08 12:38:18 -08004187 priv->hph_status &= ~SND_JACK_HEADPHONE;
Joonwoo Parka9444452011-12-08 18:48:27 -08004188
4189 /* If headphone PA is on, check if userspace receives
4190 * removal event to sync-up PA's state */
4191 if (tabla_is_hph_pa_on(codec)) {
4192 set_bit(TABLA_HPHL_PA_OFF_ACK, &priv->hph_pa_dac_state);
4193 set_bit(TABLA_HPHR_PA_OFF_ACK, &priv->hph_pa_dac_state);
4194 }
4195
4196 if (tabla_is_hph_dac_on(codec, 1))
4197 set_bit(TABLA_HPHL_DAC_OFF_ACK,
4198 &priv->hph_pa_dac_state);
4199 if (tabla_is_hph_dac_on(codec, 0))
4200 set_bit(TABLA_HPHR_DAC_OFF_ACK,
4201 &priv->hph_pa_dac_state);
4202
Bradley Rubincb1e2732011-06-23 16:49:20 -07004203 if (priv->headset_jack) {
4204 pr_debug("%s: Reporting removal\n", __func__);
Joonwoo Park8b1f0982011-12-08 17:12:45 -08004205 tabla_snd_soc_jack_report(priv, priv->headset_jack,
4206 priv->hph_status,
4207 TABLA_JACK_MASK);
Bradley Rubincb1e2732011-06-23 16:49:20 -07004208 }
4209 tabla_codec_shutdown_hs_removal_detect(codec);
4210 tabla_codec_enable_hs_detect(codec, 1);
4211 return IRQ_HANDLED;
4212 }
4213
Joonwoo Park0976d012011-12-22 11:48:18 -08004214 mb_v = tabla_codec_setup_hs_polling(codec);
4215 mic_mv = tabla_codec_sta_dce_v(codec, 0, mb_v);
Bradley Rubin355611a2011-08-24 14:01:18 -07004216
Joonwoo Park0976d012011-12-22 11:48:18 -08004217 if (mb_v > (short) priv->mbhc_data.v_ins_hu) {
Joonwoo Parkf4267c22012-01-10 13:25:24 -08004218 pr_debug("%s: Fake insertion interrupt since %dmsec ago, "
4219 "STA : %d,%d\n", __func__,
4220 (priv->mbhc_fake_ins_start ?
4221 jiffies_to_msecs(jiffies -
4222 priv->mbhc_fake_ins_start) :
4223 0),
4224 mb_v, mic_mv);
4225 if (time_after(jiffies,
4226 priv->mbhc_fake_ins_start +
4227 msecs_to_jiffies(TABLA_FAKE_INS_THRESHOLD_MS))) {
4228 /* Disable HPH trigger and enable MIC line trigger */
4229 snd_soc_update_bits(codec, TABLA_A_MBHC_HPH, 0x12,
4230 0x00);
4231 snd_soc_update_bits(codec,
4232 priv->mbhc_bias_regs.mbhc_reg, 0x60,
4233 plug_det->mic_current << 5);
4234 snd_soc_update_bits(codec,
4235 priv->mbhc_bias_regs.mbhc_reg,
4236 0x80, 0x80);
4237 usleep_range(plug_det->t_mic_pid, plug_det->t_mic_pid);
4238 snd_soc_update_bits(codec,
4239 priv->mbhc_bias_regs.mbhc_reg,
4240 0x10, 0x10);
4241 } else {
4242 if (priv->mbhc_fake_ins_start == 0)
4243 priv->mbhc_fake_ins_start = jiffies;
4244 /* Setup normal insert detection
4245 * Enable HPH Schmitt Trigger
4246 */
4247 snd_soc_update_bits(codec, TABLA_A_MBHC_HPH,
4248 0x13 | 0x0C,
4249 0x13 | plug_det->hph_current << 2);
4250 }
Bhalchandra Gajare9494fa262011-11-10 19:25:59 -08004251 /* Setup for insertion detection */
4252 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_INT_CTL, 0x2, 0);
Bhalchandra Gajare9494fa262011-11-10 19:25:59 -08004253 tabla_enable_irq(codec->control_data, TABLA_IRQ_MBHC_INSERTION);
4254 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_INT_CTL, 0x1, 0x1);
4255
Joonwoo Park0976d012011-12-22 11:48:18 -08004256 } else if (mb_v < (short) priv->mbhc_data.v_no_mic) {
4257 pr_debug("%s: Headphone Detected, mb_v: %d,%d\n",
4258 __func__, mb_v, mic_mv);
Joonwoo Parkf4267c22012-01-10 13:25:24 -08004259 priv->mbhc_fake_ins_start = 0;
Patrick Lai49efeac2011-11-03 11:01:12 -07004260 priv->hph_status |= SND_JACK_HEADPHONE;
Bradley Rubincb1e2732011-06-23 16:49:20 -07004261 if (priv->headset_jack) {
4262 pr_debug("%s: Reporting insertion %d\n", __func__,
Joonwoo Park0976d012011-12-22 11:48:18 -08004263 SND_JACK_HEADPHONE);
Joonwoo Park8b1f0982011-12-08 17:12:45 -08004264 tabla_snd_soc_jack_report(priv, priv->headset_jack,
4265 priv->hph_status,
4266 TABLA_JACK_MASK);
Bradley Rubincb1e2732011-06-23 16:49:20 -07004267 }
4268 tabla_codec_shutdown_hs_polling(codec);
4269 tabla_codec_enable_hs_detect(codec, 0);
Joonwoo Parka9444452011-12-08 18:48:27 -08004270 tabla_sync_hph_state(priv);
Bhalchandra Gajare343cbb02011-09-07 18:58:19 -07004271 } else {
Joonwoo Park0976d012011-12-22 11:48:18 -08004272 pr_debug("%s: Headset detected, mb_v: %d,%d\n",
4273 __func__, mb_v, mic_mv);
Joonwoo Parkf4267c22012-01-10 13:25:24 -08004274 priv->mbhc_fake_ins_start = 0;
Patrick Lai49efeac2011-11-03 11:01:12 -07004275 priv->hph_status |= SND_JACK_HEADSET;
Bradley Rubincb1e2732011-06-23 16:49:20 -07004276 if (priv->headset_jack) {
4277 pr_debug("%s: Reporting insertion %d\n", __func__,
Joonwoo Park0976d012011-12-22 11:48:18 -08004278 SND_JACK_HEADSET);
Joonwoo Park8b1f0982011-12-08 17:12:45 -08004279 tabla_snd_soc_jack_report(priv, priv->headset_jack,
4280 priv->hph_status,
4281 TABLA_JACK_MASK);
Bradley Rubincb1e2732011-06-23 16:49:20 -07004282 }
Joonwoo Parkf4267c22012-01-10 13:25:24 -08004283 /* avoid false button press detect */
4284 msleep(50);
Bradley Rubincb1e2732011-06-23 16:49:20 -07004285 tabla_codec_start_hs_polling(codec);
Joonwoo Parka9444452011-12-08 18:48:27 -08004286 tabla_sync_hph_state(priv);
Bradley Rubincb1e2732011-06-23 16:49:20 -07004287 }
4288
4289 return IRQ_HANDLED;
4290}
4291
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004292static irqreturn_t tabla_hs_remove_irq(int irq, void *data)
4293{
Joonwoo Park6b9b03f2012-01-23 18:48:54 -08004294 short bias_value;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004295 struct tabla_priv *priv = data;
4296 struct snd_soc_codec *codec = priv->codec;
Joonwoo Park0976d012011-12-22 11:48:18 -08004297 const struct tabla_mbhc_general_cfg *generic =
4298 TABLA_MBHC_CAL_GENERAL_PTR(priv->calibration);
Joonwoo Park6b9b03f2012-01-23 18:48:54 -08004299 int fake_removal = 0;
4300 int min_us = TABLA_FAKE_REMOVAL_MIN_PERIOD_MS * 1000;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004301
Joonwoo Park6b9b03f2012-01-23 18:48:54 -08004302 pr_debug("%s: enter, removal interrupt\n", __func__);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004303 tabla_disable_irq(codec->control_data, TABLA_IRQ_MBHC_REMOVAL);
4304 tabla_disable_irq(codec->control_data, TABLA_IRQ_MBHC_POTENTIAL);
Bradley Rubin4d09cf42011-08-17 17:59:16 -07004305 tabla_disable_irq(codec->control_data, TABLA_IRQ_MBHC_RELEASE);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004306
Joonwoo Park0976d012011-12-22 11:48:18 -08004307 usleep_range(generic->t_shutdown_plug_rem,
4308 generic->t_shutdown_plug_rem);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004309
Joonwoo Park6b9b03f2012-01-23 18:48:54 -08004310 do {
4311 bias_value = tabla_codec_sta_dce(codec, 1);
4312 pr_debug("%s: DCE %d,%d, %d us left\n", __func__, bias_value,
4313 tabla_codec_sta_dce_v(codec, 1, bias_value), min_us);
4314 if (bias_value < (short)priv->mbhc_data.v_ins_h) {
4315 fake_removal = 1;
4316 break;
4317 }
4318 min_us -= priv->mbhc_data.t_dce;
4319 } while (min_us > 0);
Bradley Rubin89ffd0a2011-07-21 16:04:06 -07004320
Joonwoo Park6b9b03f2012-01-23 18:48:54 -08004321 if (fake_removal) {
Bradley Rubin89ffd0a2011-07-21 16:04:06 -07004322 pr_debug("False alarm, headset not actually removed\n");
4323 tabla_codec_start_hs_polling(codec);
4324 } else {
Bhalchandra Gajared9ebb6c2011-10-03 19:54:41 -07004325 /*
4326 * If this removal is not false, first check the micbias
4327 * switch status and switch it to LDOH if it is already
4328 * switched to VDDIO.
4329 */
4330 if (priv->mbhc_micbias_switched)
4331 tabla_codec_switch_micbias(codec, 0);
Patrick Lai49efeac2011-11-03 11:01:12 -07004332 priv->hph_status &= ~SND_JACK_HEADSET;
Bradley Rubin89ffd0a2011-07-21 16:04:06 -07004333 if (priv->headset_jack) {
4334 pr_debug("%s: Reporting removal\n", __func__);
Joonwoo Park8b1f0982011-12-08 17:12:45 -08004335 tabla_snd_soc_jack_report(priv, priv->headset_jack, 0,
4336 TABLA_JACK_MASK);
Bradley Rubin89ffd0a2011-07-21 16:04:06 -07004337 }
4338 tabla_codec_shutdown_hs_polling(codec);
4339
4340 tabla_codec_enable_hs_detect(codec, 1);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004341 }
Joonwoo Park8b1f0982011-12-08 17:12:45 -08004342
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004343 return IRQ_HANDLED;
4344}
4345
4346static unsigned long slimbus_value;
4347
4348static irqreturn_t tabla_slimbus_irq(int irq, void *data)
4349{
4350 struct tabla_priv *priv = data;
4351 struct snd_soc_codec *codec = priv->codec;
4352 int i, j;
4353 u8 val;
4354
4355 for (i = 0; i < TABLA_SLIM_NUM_PORT_REG; i++) {
4356 slimbus_value = tabla_interface_reg_read(codec->control_data,
4357 TABLA_SLIM_PGD_PORT_INT_STATUS0 + i);
4358 for_each_set_bit(j, &slimbus_value, BITS_PER_BYTE) {
4359 val = tabla_interface_reg_read(codec->control_data,
4360 TABLA_SLIM_PGD_PORT_INT_SOURCE0 + i*8 + j);
4361 if (val & 0x1)
4362 pr_err_ratelimited("overflow error on port %x,"
4363 " value %x\n", i*8 + j, val);
4364 if (val & 0x2)
4365 pr_err_ratelimited("underflow error on port %x,"
4366 " value %x\n", i*8 + j, val);
4367 }
4368 tabla_interface_reg_write(codec->control_data,
4369 TABLA_SLIM_PGD_PORT_INT_CLR0 + i, 0xFF);
4370 }
4371
4372 return IRQ_HANDLED;
4373}
4374
Patrick Lai3043fba2011-08-01 14:15:57 -07004375
4376static int tabla_handle_pdata(struct tabla_priv *tabla)
4377{
4378 struct snd_soc_codec *codec = tabla->codec;
4379 struct tabla_pdata *pdata = tabla->pdata;
4380 int k1, k2, k3, rc = 0;
Santosh Mardi22920282011-10-26 02:38:40 +05304381 u8 leg_mode = pdata->amic_settings.legacy_mode;
4382 u8 txfe_bypass = pdata->amic_settings.txfe_enable;
4383 u8 txfe_buff = pdata->amic_settings.txfe_buff;
4384 u8 flag = pdata->amic_settings.use_pdata;
4385 u8 i = 0, j = 0;
4386 u8 val_txfe = 0, value = 0;
Patrick Lai3043fba2011-08-01 14:15:57 -07004387
4388 if (!pdata) {
4389 rc = -ENODEV;
4390 goto done;
4391 }
4392
4393 /* Make sure settings are correct */
4394 if ((pdata->micbias.ldoh_v > TABLA_LDOH_2P85_V) ||
4395 (pdata->micbias.bias1_cfilt_sel > TABLA_CFILT3_SEL) ||
4396 (pdata->micbias.bias2_cfilt_sel > TABLA_CFILT3_SEL) ||
4397 (pdata->micbias.bias3_cfilt_sel > TABLA_CFILT3_SEL) ||
4398 (pdata->micbias.bias4_cfilt_sel > TABLA_CFILT3_SEL)) {
4399 rc = -EINVAL;
4400 goto done;
4401 }
4402
4403 /* figure out k value */
4404 k1 = tabla_find_k_value(pdata->micbias.ldoh_v,
4405 pdata->micbias.cfilt1_mv);
4406 k2 = tabla_find_k_value(pdata->micbias.ldoh_v,
4407 pdata->micbias.cfilt2_mv);
4408 k3 = tabla_find_k_value(pdata->micbias.ldoh_v,
4409 pdata->micbias.cfilt3_mv);
4410
4411 if (IS_ERR_VALUE(k1) || IS_ERR_VALUE(k2) || IS_ERR_VALUE(k3)) {
4412 rc = -EINVAL;
4413 goto done;
4414 }
4415
4416 /* Set voltage level and always use LDO */
4417 snd_soc_update_bits(codec, TABLA_A_LDO_H_MODE_1, 0x0C,
4418 (pdata->micbias.ldoh_v << 2));
4419
4420 snd_soc_update_bits(codec, TABLA_A_MICB_CFILT_1_VAL, 0xFC,
4421 (k1 << 2));
4422 snd_soc_update_bits(codec, TABLA_A_MICB_CFILT_2_VAL, 0xFC,
4423 (k2 << 2));
4424 snd_soc_update_bits(codec, TABLA_A_MICB_CFILT_3_VAL, 0xFC,
4425 (k3 << 2));
4426
4427 snd_soc_update_bits(codec, TABLA_A_MICB_1_CTL, 0x60,
4428 (pdata->micbias.bias1_cfilt_sel << 5));
4429 snd_soc_update_bits(codec, TABLA_A_MICB_2_CTL, 0x60,
4430 (pdata->micbias.bias2_cfilt_sel << 5));
4431 snd_soc_update_bits(codec, TABLA_A_MICB_3_CTL, 0x60,
4432 (pdata->micbias.bias3_cfilt_sel << 5));
Joonwoo Park6c1ebb62012-01-16 19:08:43 -08004433 snd_soc_update_bits(codec, tabla->reg_addr.micb_4_ctl, 0x60,
4434 (pdata->micbias.bias4_cfilt_sel << 5));
Patrick Lai3043fba2011-08-01 14:15:57 -07004435
Santosh Mardi22920282011-10-26 02:38:40 +05304436 for (i = 0; i < 6; j++, i += 2) {
4437 if (flag & (0x01 << i)) {
4438 value = (leg_mode & (0x01 << i)) ? 0x10 : 0x00;
4439 val_txfe = (txfe_bypass & (0x01 << i)) ? 0x20 : 0x00;
4440 val_txfe = val_txfe |
4441 ((txfe_buff & (0x01 << i)) ? 0x10 : 0x00);
4442 snd_soc_update_bits(codec, TABLA_A_TX_1_2_EN + j * 10,
4443 0x10, value);
4444 snd_soc_update_bits(codec,
4445 TABLA_A_TX_1_2_TEST_EN + j * 10,
4446 0x30, val_txfe);
4447 }
4448 if (flag & (0x01 << (i + 1))) {
4449 value = (leg_mode & (0x01 << (i + 1))) ? 0x01 : 0x00;
4450 val_txfe = (txfe_bypass &
4451 (0x01 << (i + 1))) ? 0x02 : 0x00;
4452 val_txfe |= (txfe_buff &
4453 (0x01 << (i + 1))) ? 0x01 : 0x00;
4454 snd_soc_update_bits(codec, TABLA_A_TX_1_2_EN + j * 10,
4455 0x01, value);
4456 snd_soc_update_bits(codec,
4457 TABLA_A_TX_1_2_TEST_EN + j * 10,
4458 0x03, val_txfe);
4459 }
4460 }
4461 if (flag & 0x40) {
4462 value = (leg_mode & 0x40) ? 0x10 : 0x00;
4463 value = value | ((txfe_bypass & 0x40) ? 0x02 : 0x00);
4464 value = value | ((txfe_buff & 0x40) ? 0x01 : 0x00);
4465 snd_soc_update_bits(codec, TABLA_A_TX_7_MBHC_EN,
4466 0x13, value);
4467 }
Patrick Lai49efeac2011-11-03 11:01:12 -07004468
4469 if (pdata->ocp.use_pdata) {
4470 /* not defined in CODEC specification */
4471 if (pdata->ocp.hph_ocp_limit == 1 ||
4472 pdata->ocp.hph_ocp_limit == 5) {
4473 rc = -EINVAL;
4474 goto done;
4475 }
4476 snd_soc_update_bits(codec, TABLA_A_RX_COM_OCP_CTL,
4477 0x0F, pdata->ocp.num_attempts);
4478 snd_soc_write(codec, TABLA_A_RX_COM_OCP_COUNT,
4479 ((pdata->ocp.run_time << 4) | pdata->ocp.wait_time));
4480 snd_soc_update_bits(codec, TABLA_A_RX_HPH_OCP_CTL,
4481 0xE0, (pdata->ocp.hph_ocp_limit << 5));
4482 }
Patrick Lai3043fba2011-08-01 14:15:57 -07004483done:
4484 return rc;
4485}
4486
Kiran Kandi1f6fd722011-08-11 10:36:11 -07004487static const struct tabla_reg_mask_val tabla_1_1_reg_defaults[] = {
4488
4489 /* Tabla 1.1 MICBIAS changes */
4490 TABLA_REG_VAL(TABLA_A_MICB_1_INT_RBIAS, 0x24),
4491 TABLA_REG_VAL(TABLA_A_MICB_2_INT_RBIAS, 0x24),
4492 TABLA_REG_VAL(TABLA_A_MICB_3_INT_RBIAS, 0x24),
Kiran Kandi1f6fd722011-08-11 10:36:11 -07004493
4494 /* Tabla 1.1 HPH changes */
4495 TABLA_REG_VAL(TABLA_A_RX_HPH_BIAS_PA, 0x57),
4496 TABLA_REG_VAL(TABLA_A_RX_HPH_BIAS_LDO, 0x56),
4497
4498 /* Tabla 1.1 EAR PA changes */
4499 TABLA_REG_VAL(TABLA_A_RX_EAR_BIAS_PA, 0xA6),
4500 TABLA_REG_VAL(TABLA_A_RX_EAR_GAIN, 0x02),
4501 TABLA_REG_VAL(TABLA_A_RX_EAR_VCM, 0x03),
4502
4503 /* Tabla 1.1 Lineout_5 Changes */
4504 TABLA_REG_VAL(TABLA_A_RX_LINE_5_GAIN, 0x10),
4505
4506 /* Tabla 1.1 RX Changes */
4507 TABLA_REG_VAL(TABLA_A_CDC_RX1_B5_CTL, 0x78),
4508 TABLA_REG_VAL(TABLA_A_CDC_RX2_B5_CTL, 0x78),
4509 TABLA_REG_VAL(TABLA_A_CDC_RX3_B5_CTL, 0x78),
4510 TABLA_REG_VAL(TABLA_A_CDC_RX4_B5_CTL, 0x78),
4511 TABLA_REG_VAL(TABLA_A_CDC_RX5_B5_CTL, 0x78),
4512 TABLA_REG_VAL(TABLA_A_CDC_RX6_B5_CTL, 0x78),
4513 TABLA_REG_VAL(TABLA_A_CDC_RX7_B5_CTL, 0x78),
4514
4515 /* Tabla 1.1 RX1 and RX2 Changes */
4516 TABLA_REG_VAL(TABLA_A_CDC_RX1_B6_CTL, 0xA0),
4517 TABLA_REG_VAL(TABLA_A_CDC_RX2_B6_CTL, 0xA0),
4518
4519 /* Tabla 1.1 RX3 to RX7 Changes */
4520 TABLA_REG_VAL(TABLA_A_CDC_RX3_B6_CTL, 0x80),
4521 TABLA_REG_VAL(TABLA_A_CDC_RX4_B6_CTL, 0x80),
4522 TABLA_REG_VAL(TABLA_A_CDC_RX5_B6_CTL, 0x80),
4523 TABLA_REG_VAL(TABLA_A_CDC_RX6_B6_CTL, 0x80),
4524 TABLA_REG_VAL(TABLA_A_CDC_RX7_B6_CTL, 0x80),
4525
4526 /* Tabla 1.1 CLASSG Changes */
4527 TABLA_REG_VAL(TABLA_A_CDC_CLSG_FREQ_THRESH_B3_CTL, 0x1B),
4528};
4529
4530static const struct tabla_reg_mask_val tabla_2_0_reg_defaults[] = {
Kiran Kandi1f6fd722011-08-11 10:36:11 -07004531 /* Tabla 2.0 MICBIAS changes */
4532 TABLA_REG_VAL(TABLA_A_MICB_2_MBHC, 0x02),
4533};
4534
Joonwoo Park6c1ebb62012-01-16 19:08:43 -08004535static const struct tabla_reg_mask_val tabla_1_x_only_reg_2_0_defaults[] = {
4536 TABLA_REG_VAL(TABLA_1_A_MICB_4_INT_RBIAS, 0x24),
4537};
4538
4539static const struct tabla_reg_mask_val tabla_2_only_reg_2_0_defaults[] = {
4540 TABLA_REG_VAL(TABLA_2_A_MICB_4_INT_RBIAS, 0x24),
4541};
4542
Kiran Kandi1f6fd722011-08-11 10:36:11 -07004543static void tabla_update_reg_defaults(struct snd_soc_codec *codec)
4544{
4545 u32 i;
Joonwoo Park6c1ebb62012-01-16 19:08:43 -08004546 struct tabla *tabla_core = dev_get_drvdata(codec->dev->parent);
Kiran Kandi1f6fd722011-08-11 10:36:11 -07004547
4548 for (i = 0; i < ARRAY_SIZE(tabla_1_1_reg_defaults); i++)
4549 snd_soc_write(codec, tabla_1_1_reg_defaults[i].reg,
4550 tabla_1_1_reg_defaults[i].val);
4551
4552 for (i = 0; i < ARRAY_SIZE(tabla_2_0_reg_defaults); i++)
4553 snd_soc_write(codec, tabla_2_0_reg_defaults[i].reg,
4554 tabla_2_0_reg_defaults[i].val);
Joonwoo Park6c1ebb62012-01-16 19:08:43 -08004555
4556 if (TABLA_IS_1_X(tabla_core->version)) {
4557 for (i = 0; i < ARRAY_SIZE(tabla_1_x_only_reg_2_0_defaults);
4558 i++)
4559 snd_soc_write(codec,
4560 tabla_1_x_only_reg_2_0_defaults[i].reg,
4561 tabla_1_x_only_reg_2_0_defaults[i].val);
4562 } else {
4563 for (i = 0; i < ARRAY_SIZE(tabla_2_only_reg_2_0_defaults); i++)
4564 snd_soc_write(codec,
4565 tabla_2_only_reg_2_0_defaults[i].reg,
4566 tabla_2_only_reg_2_0_defaults[i].val);
4567 }
Kiran Kandi1f6fd722011-08-11 10:36:11 -07004568}
4569
4570static const struct tabla_reg_mask_val tabla_codec_reg_init_val[] = {
Patrick Laic7cae882011-11-18 11:52:49 -08004571 /* Initialize current threshold to 350MA
4572 * number of wait and run cycles to 4096
4573 */
Patrick Lai49efeac2011-11-03 11:01:12 -07004574 {TABLA_A_RX_HPH_OCP_CTL, 0xE0, 0x60},
Patrick Laic7cae882011-11-18 11:52:49 -08004575 {TABLA_A_RX_COM_OCP_COUNT, 0xFF, 0xFF},
Kiran Kandi1f6fd722011-08-11 10:36:11 -07004576
Santosh Mardi32171012011-10-28 23:32:06 +05304577 {TABLA_A_QFUSE_CTL, 0xFF, 0x03},
4578
Kiran Kandi1f6fd722011-08-11 10:36:11 -07004579 /* Initialize gain registers to use register gain */
4580 {TABLA_A_RX_HPH_L_GAIN, 0x10, 0x10},
4581 {TABLA_A_RX_HPH_R_GAIN, 0x10, 0x10},
4582 {TABLA_A_RX_LINE_1_GAIN, 0x10, 0x10},
4583 {TABLA_A_RX_LINE_2_GAIN, 0x10, 0x10},
4584 {TABLA_A_RX_LINE_3_GAIN, 0x10, 0x10},
4585 {TABLA_A_RX_LINE_4_GAIN, 0x10, 0x10},
4586
4587 /* Initialize mic biases to differential mode */
4588 {TABLA_A_MICB_1_INT_RBIAS, 0x24, 0x24},
4589 {TABLA_A_MICB_2_INT_RBIAS, 0x24, 0x24},
4590 {TABLA_A_MICB_3_INT_RBIAS, 0x24, 0x24},
Kiran Kandi1f6fd722011-08-11 10:36:11 -07004591
4592 {TABLA_A_CDC_CONN_CLSG_CTL, 0x3C, 0x14},
4593
4594 /* Use 16 bit sample size for TX1 to TX6 */
4595 {TABLA_A_CDC_CONN_TX_SB_B1_CTL, 0x30, 0x20},
4596 {TABLA_A_CDC_CONN_TX_SB_B2_CTL, 0x30, 0x20},
4597 {TABLA_A_CDC_CONN_TX_SB_B3_CTL, 0x30, 0x20},
4598 {TABLA_A_CDC_CONN_TX_SB_B4_CTL, 0x30, 0x20},
4599 {TABLA_A_CDC_CONN_TX_SB_B5_CTL, 0x30, 0x20},
4600 {TABLA_A_CDC_CONN_TX_SB_B6_CTL, 0x30, 0x20},
4601
4602 /* Use 16 bit sample size for TX7 to TX10 */
4603 {TABLA_A_CDC_CONN_TX_SB_B7_CTL, 0x60, 0x40},
4604 {TABLA_A_CDC_CONN_TX_SB_B8_CTL, 0x60, 0x40},
4605 {TABLA_A_CDC_CONN_TX_SB_B9_CTL, 0x60, 0x40},
4606 {TABLA_A_CDC_CONN_TX_SB_B10_CTL, 0x60, 0x40},
4607
4608 /* Use 16 bit sample size for RX */
4609 {TABLA_A_CDC_CONN_RX_SB_B1_CTL, 0xFF, 0xAA},
4610 {TABLA_A_CDC_CONN_RX_SB_B2_CTL, 0xFF, 0xAA},
4611
4612 /*enable HPF filter for TX paths */
4613 {TABLA_A_CDC_TX1_MUX_CTL, 0x8, 0x0},
4614 {TABLA_A_CDC_TX2_MUX_CTL, 0x8, 0x0},
4615 {TABLA_A_CDC_TX3_MUX_CTL, 0x8, 0x0},
4616 {TABLA_A_CDC_TX4_MUX_CTL, 0x8, 0x0},
4617 {TABLA_A_CDC_TX5_MUX_CTL, 0x8, 0x0},
4618 {TABLA_A_CDC_TX6_MUX_CTL, 0x8, 0x0},
4619 {TABLA_A_CDC_TX7_MUX_CTL, 0x8, 0x0},
4620 {TABLA_A_CDC_TX8_MUX_CTL, 0x8, 0x0},
4621 {TABLA_A_CDC_TX9_MUX_CTL, 0x8, 0x0},
4622 {TABLA_A_CDC_TX10_MUX_CTL, 0x8, 0x0},
4623};
4624
Joonwoo Park6c1ebb62012-01-16 19:08:43 -08004625static const struct tabla_reg_mask_val tabla_1_x_codec_reg_init_val[] = {
4626 /* Initialize mic biases to differential mode */
4627 {TABLA_1_A_MICB_4_INT_RBIAS, 0x24, 0x24},
4628};
4629
4630static const struct tabla_reg_mask_val tabla_2_higher_codec_reg_init_val[] = {
4631 /* Initialize mic biases to differential mode */
4632 {TABLA_2_A_MICB_4_INT_RBIAS, 0x24, 0x24},
4633};
4634
Kiran Kandi1f6fd722011-08-11 10:36:11 -07004635static void tabla_codec_init_reg(struct snd_soc_codec *codec)
4636{
4637 u32 i;
Joonwoo Park6c1ebb62012-01-16 19:08:43 -08004638 struct tabla *tabla_core = dev_get_drvdata(codec->dev->parent);
Kiran Kandi1f6fd722011-08-11 10:36:11 -07004639
4640 for (i = 0; i < ARRAY_SIZE(tabla_codec_reg_init_val); i++)
4641 snd_soc_update_bits(codec, tabla_codec_reg_init_val[i].reg,
4642 tabla_codec_reg_init_val[i].mask,
4643 tabla_codec_reg_init_val[i].val);
Joonwoo Park6c1ebb62012-01-16 19:08:43 -08004644 if (TABLA_IS_1_X(tabla_core->version)) {
4645 for (i = 0; i < ARRAY_SIZE(tabla_1_x_codec_reg_init_val); i++)
4646 snd_soc_update_bits(codec,
4647 tabla_1_x_codec_reg_init_val[i].reg,
4648 tabla_1_x_codec_reg_init_val[i].mask,
4649 tabla_1_x_codec_reg_init_val[i].val);
4650 } else {
4651 for (i = 0; i < ARRAY_SIZE(tabla_2_higher_codec_reg_init_val);
4652 i++)
4653 snd_soc_update_bits(codec,
4654 tabla_2_higher_codec_reg_init_val[i].reg,
4655 tabla_2_higher_codec_reg_init_val[i].mask,
4656 tabla_2_higher_codec_reg_init_val[i].val);
4657 }
4658}
4659
4660static void tabla_update_reg_address(struct tabla_priv *priv)
4661{
4662 struct tabla *tabla_core = dev_get_drvdata(priv->codec->dev->parent);
4663 struct tabla_reg_address *reg_addr = &priv->reg_addr;
4664
4665 if (TABLA_IS_1_X(tabla_core->version)) {
4666 reg_addr->micb_4_ctl = TABLA_1_A_MICB_4_CTL;
4667 reg_addr->micb_4_int_rbias = TABLA_1_A_MICB_4_INT_RBIAS;
4668 reg_addr->micb_4_int_rbias = TABLA_1_A_MICB_4_INT_RBIAS;
4669 } else if (TABLA_IS_2_0(tabla_core->version)) {
4670 reg_addr->micb_4_ctl = TABLA_2_A_MICB_4_CTL;
4671 reg_addr->micb_4_int_rbias = TABLA_2_A_MICB_4_INT_RBIAS;
4672 reg_addr->micb_4_int_rbias = TABLA_2_A_MICB_4_INT_RBIAS;
4673 }
Kiran Kandi1f6fd722011-08-11 10:36:11 -07004674}
4675
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004676static int tabla_codec_probe(struct snd_soc_codec *codec)
4677{
4678 struct tabla *control;
4679 struct tabla_priv *tabla;
4680 struct snd_soc_dapm_context *dapm = &codec->dapm;
4681 int ret = 0;
4682 int i;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004683
4684 codec->control_data = dev_get_drvdata(codec->dev->parent);
4685 control = codec->control_data;
4686
4687 tabla = kzalloc(sizeof(struct tabla_priv), GFP_KERNEL);
4688 if (!tabla) {
4689 dev_err(codec->dev, "Failed to allocate private data\n");
4690 return -ENOMEM;
4691 }
4692
Bhalchandra Gajare02d90cd2011-09-30 16:14:00 -07004693 /* Make sure mbhc micbias register addresses are zeroed out */
4694 memset(&tabla->mbhc_bias_regs, 0,
4695 sizeof(struct mbhc_micbias_regs));
Bhalchandra Gajared9ebb6c2011-10-03 19:54:41 -07004696 tabla->cfilt_k_value = 0;
4697 tabla->mbhc_micbias_switched = false;
Bhalchandra Gajare02d90cd2011-09-30 16:14:00 -07004698
Joonwoo Park0976d012011-12-22 11:48:18 -08004699 /* Make sure mbhc intenal calibration data is zeroed out */
4700 memset(&tabla->mbhc_data, 0,
4701 sizeof(struct mbhc_internal_cal_data));
Joonwoo Park433149a2012-01-11 09:53:54 -08004702 tabla->mbhc_data.t_sta_dce = DEFAULT_DCE_STA_WAIT;
Joonwoo Park0976d012011-12-22 11:48:18 -08004703 tabla->mbhc_data.t_dce = DEFAULT_DCE_WAIT;
4704 tabla->mbhc_data.t_sta = DEFAULT_STA_WAIT;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004705 snd_soc_codec_set_drvdata(codec, tabla);
4706
Kiran Kandi6fae8bf2011-08-15 10:36:42 -07004707 tabla->mclk_enabled = false;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004708 tabla->bandgap_type = TABLA_BANDGAP_OFF;
4709 tabla->clock_active = false;
4710 tabla->config_mode_active = false;
4711 tabla->mbhc_polling_active = false;
Joonwoo Parkf4267c22012-01-10 13:25:24 -08004712 tabla->mbhc_fake_ins_start = 0;
Bradley Rubincb3950a2011-08-18 13:07:26 -07004713 tabla->no_mic_headset_override = false;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004714 tabla->codec = codec;
Patrick Lai3043fba2011-08-01 14:15:57 -07004715 tabla->pdata = dev_get_platdata(codec->dev->parent);
Santosh Mardie15e2302011-11-15 10:39:23 +05304716 tabla->intf_type = tabla_get_intf_type();
Patrick Lai3043fba2011-08-01 14:15:57 -07004717
Joonwoo Park6c1ebb62012-01-16 19:08:43 -08004718 tabla_update_reg_address(tabla);
Santosh Mardi22920282011-10-26 02:38:40 +05304719 tabla_update_reg_defaults(codec);
4720 tabla_codec_init_reg(codec);
Santosh Mardi22920282011-10-26 02:38:40 +05304721 ret = tabla_handle_pdata(tabla);
Patrick Lai3043fba2011-08-01 14:15:57 -07004722 if (IS_ERR_VALUE(ret)) {
4723 pr_err("%s: bad pdata\n", __func__);
4724 goto err_pdata;
4725 }
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004726
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004727 snd_soc_add_controls(codec, tabla_snd_controls,
Joonwoo Park6c1ebb62012-01-16 19:08:43 -08004728 ARRAY_SIZE(tabla_snd_controls));
4729 if (TABLA_IS_1_X(control->version))
4730 snd_soc_add_controls(codec, tabla_1_x_snd_controls,
4731 ARRAY_SIZE(tabla_1_x_snd_controls));
4732 else
4733 snd_soc_add_controls(codec, tabla_2_higher_snd_controls,
4734 ARRAY_SIZE(tabla_2_higher_snd_controls));
4735
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004736 snd_soc_dapm_new_controls(dapm, tabla_dapm_widgets,
Joonwoo Park6c1ebb62012-01-16 19:08:43 -08004737 ARRAY_SIZE(tabla_dapm_widgets));
4738 if (TABLA_IS_1_X(control->version))
4739 snd_soc_dapm_new_controls(dapm, tabla_1_x_dapm_widgets,
4740 ARRAY_SIZE(tabla_1_x_dapm_widgets));
4741 else
4742 snd_soc_dapm_new_controls(dapm, tabla_2_higher_dapm_widgets,
4743 ARRAY_SIZE(tabla_2_higher_dapm_widgets));
4744
Santosh Mardie15e2302011-11-15 10:39:23 +05304745 if (tabla->intf_type == TABLA_INTERFACE_TYPE_I2C) {
4746 snd_soc_dapm_new_controls(dapm, tabla_dapm_i2s_widgets,
4747 ARRAY_SIZE(tabla_dapm_i2s_widgets));
4748 snd_soc_dapm_add_routes(dapm, audio_i2s_map,
4749 ARRAY_SIZE(audio_i2s_map));
4750 }
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004751 snd_soc_dapm_add_routes(dapm, audio_map, ARRAY_SIZE(audio_map));
Kiran Kandi8b3a8302011-09-27 16:13:28 -07004752
Joonwoo Park6c1ebb62012-01-16 19:08:43 -08004753 if (TABLA_IS_1_X(control->version)) {
Kiran Kandi7a9fd902011-11-14 13:51:45 -08004754 snd_soc_dapm_add_routes(dapm, tabla_1_x_lineout_2_to_4_map,
Joonwoo Park6c1ebb62012-01-16 19:08:43 -08004755 ARRAY_SIZE(tabla_1_x_lineout_2_to_4_map));
4756 } else if (TABLA_IS_2_0(control->version)) {
Kiran Kandi7a9fd902011-11-14 13:51:45 -08004757 snd_soc_dapm_add_routes(dapm, tabla_2_x_lineout_2_to_4_map,
Joonwoo Park6c1ebb62012-01-16 19:08:43 -08004758 ARRAY_SIZE(tabla_2_x_lineout_2_to_4_map));
Kiran Kandi7a9fd902011-11-14 13:51:45 -08004759 } else {
4760 pr_err("%s : ERROR. Unsupported Tabla version 0x%2x\n",
Joonwoo Park6c1ebb62012-01-16 19:08:43 -08004761 __func__, control->version);
Kiran Kandi7a9fd902011-11-14 13:51:45 -08004762 goto err_pdata;
4763 }
4764
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004765 snd_soc_dapm_sync(dapm);
4766
4767 ret = tabla_request_irq(codec->control_data, TABLA_IRQ_MBHC_INSERTION,
4768 tabla_hs_insert_irq, "Headset insert detect", tabla);
4769 if (ret) {
4770 pr_err("%s: Failed to request irq %d\n", __func__,
4771 TABLA_IRQ_MBHC_INSERTION);
4772 goto err_insert_irq;
4773 }
4774 tabla_disable_irq(codec->control_data, TABLA_IRQ_MBHC_INSERTION);
4775
4776 ret = tabla_request_irq(codec->control_data, TABLA_IRQ_MBHC_REMOVAL,
4777 tabla_hs_remove_irq, "Headset remove detect", tabla);
4778 if (ret) {
4779 pr_err("%s: Failed to request irq %d\n", __func__,
4780 TABLA_IRQ_MBHC_REMOVAL);
4781 goto err_remove_irq;
4782 }
4783 tabla_disable_irq(codec->control_data, TABLA_IRQ_MBHC_REMOVAL);
4784
4785 ret = tabla_request_irq(codec->control_data, TABLA_IRQ_MBHC_POTENTIAL,
Bradley Rubincb1e2732011-06-23 16:49:20 -07004786 tabla_dce_handler, "DC Estimation detect", tabla);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004787 if (ret) {
4788 pr_err("%s: Failed to request irq %d\n", __func__,
4789 TABLA_IRQ_MBHC_POTENTIAL);
4790 goto err_potential_irq;
4791 }
4792 tabla_disable_irq(codec->control_data, TABLA_IRQ_MBHC_POTENTIAL);
4793
Bradley Rubincb1e2732011-06-23 16:49:20 -07004794 ret = tabla_request_irq(codec->control_data, TABLA_IRQ_MBHC_RELEASE,
4795 tabla_release_handler, "Button Release detect", tabla);
4796 if (ret) {
4797 pr_err("%s: Failed to request irq %d\n", __func__,
4798 TABLA_IRQ_MBHC_RELEASE);
4799 goto err_release_irq;
4800 }
Bradley Rubin4d09cf42011-08-17 17:59:16 -07004801 tabla_disable_irq(codec->control_data, TABLA_IRQ_MBHC_RELEASE);
Bradley Rubincb1e2732011-06-23 16:49:20 -07004802
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004803 ret = tabla_request_irq(codec->control_data, TABLA_IRQ_SLIMBUS,
4804 tabla_slimbus_irq, "SLIMBUS Slave", tabla);
4805 if (ret) {
4806 pr_err("%s: Failed to request irq %d\n", __func__,
4807 TABLA_IRQ_SLIMBUS);
4808 goto err_slimbus_irq;
4809 }
4810
4811 for (i = 0; i < TABLA_SLIM_NUM_PORT_REG; i++)
4812 tabla_interface_reg_write(codec->control_data,
4813 TABLA_SLIM_PGD_PORT_INT_EN0 + i, 0xFF);
4814
Patrick Lai49efeac2011-11-03 11:01:12 -07004815 ret = tabla_request_irq(codec->control_data,
4816 TABLA_IRQ_HPH_PA_OCPL_FAULT, tabla_hphl_ocp_irq,
4817 "HPH_L OCP detect", tabla);
4818 if (ret) {
4819 pr_err("%s: Failed to request irq %d\n", __func__,
4820 TABLA_IRQ_HPH_PA_OCPL_FAULT);
4821 goto err_hphl_ocp_irq;
4822 }
Patrick Lai92032be2011-12-19 14:14:25 -08004823 tabla_disable_irq(codec->control_data, TABLA_IRQ_HPH_PA_OCPL_FAULT);
Patrick Lai49efeac2011-11-03 11:01:12 -07004824
4825 ret = tabla_request_irq(codec->control_data,
4826 TABLA_IRQ_HPH_PA_OCPR_FAULT, tabla_hphr_ocp_irq,
4827 "HPH_R OCP detect", tabla);
4828 if (ret) {
4829 pr_err("%s: Failed to request irq %d\n", __func__,
4830 TABLA_IRQ_HPH_PA_OCPR_FAULT);
4831 goto err_hphr_ocp_irq;
4832 }
Patrick Lai92032be2011-12-19 14:14:25 -08004833 tabla_disable_irq(codec->control_data, TABLA_IRQ_HPH_PA_OCPR_FAULT);
Patrick Lai49efeac2011-11-03 11:01:12 -07004834
Bradley Rubincb3950a2011-08-18 13:07:26 -07004835#ifdef CONFIG_DEBUG_FS
4836 debug_tabla_priv = tabla;
4837#endif
4838
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004839 return ret;
4840
Patrick Lai49efeac2011-11-03 11:01:12 -07004841err_hphr_ocp_irq:
4842 tabla_free_irq(codec->control_data, TABLA_IRQ_HPH_PA_OCPL_FAULT, tabla);
4843err_hphl_ocp_irq:
4844 tabla_free_irq(codec->control_data, TABLA_IRQ_SLIMBUS, tabla);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004845err_slimbus_irq:
Bradley Rubincb1e2732011-06-23 16:49:20 -07004846 tabla_free_irq(codec->control_data, TABLA_IRQ_MBHC_RELEASE, tabla);
4847err_release_irq:
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004848 tabla_free_irq(codec->control_data, TABLA_IRQ_MBHC_POTENTIAL, tabla);
4849err_potential_irq:
4850 tabla_free_irq(codec->control_data, TABLA_IRQ_MBHC_REMOVAL, tabla);
4851err_remove_irq:
4852 tabla_free_irq(codec->control_data, TABLA_IRQ_MBHC_INSERTION, tabla);
4853err_insert_irq:
Patrick Lai3043fba2011-08-01 14:15:57 -07004854err_pdata:
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004855 kfree(tabla);
4856 return ret;
4857}
4858static int tabla_codec_remove(struct snd_soc_codec *codec)
4859{
4860 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
4861 tabla_free_irq(codec->control_data, TABLA_IRQ_SLIMBUS, tabla);
Bradley Rubincb1e2732011-06-23 16:49:20 -07004862 tabla_free_irq(codec->control_data, TABLA_IRQ_MBHC_RELEASE, tabla);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004863 tabla_free_irq(codec->control_data, TABLA_IRQ_MBHC_POTENTIAL, tabla);
4864 tabla_free_irq(codec->control_data, TABLA_IRQ_MBHC_REMOVAL, tabla);
4865 tabla_free_irq(codec->control_data, TABLA_IRQ_MBHC_INSERTION, tabla);
4866 tabla_codec_disable_clock_block(codec);
4867 tabla_codec_enable_bandgap(codec, TABLA_BANDGAP_OFF);
Patrick Lai64b43262011-12-06 17:29:15 -08004868 if (tabla->mbhc_fw)
4869 release_firmware(tabla->mbhc_fw);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004870 kfree(tabla);
4871 return 0;
4872}
4873static struct snd_soc_codec_driver soc_codec_dev_tabla = {
4874 .probe = tabla_codec_probe,
4875 .remove = tabla_codec_remove,
4876 .read = tabla_read,
4877 .write = tabla_write,
4878
4879 .readable_register = tabla_readable,
4880 .volatile_register = tabla_volatile,
4881
4882 .reg_cache_size = TABLA_CACHE_SIZE,
4883 .reg_cache_default = tabla_reg_defaults,
4884 .reg_word_size = 1,
4885};
Bradley Rubincb3950a2011-08-18 13:07:26 -07004886
4887#ifdef CONFIG_DEBUG_FS
4888static struct dentry *debugfs_poke;
4889
4890static int codec_debug_open(struct inode *inode, struct file *file)
4891{
4892 file->private_data = inode->i_private;
4893 return 0;
4894}
4895
4896static ssize_t codec_debug_write(struct file *filp,
4897 const char __user *ubuf, size_t cnt, loff_t *ppos)
4898{
4899 char lbuf[32];
4900 char *buf;
4901 int rc;
4902
4903 if (cnt > sizeof(lbuf) - 1)
4904 return -EINVAL;
4905
4906 rc = copy_from_user(lbuf, ubuf, cnt);
4907 if (rc)
4908 return -EFAULT;
4909
4910 lbuf[cnt] = '\0';
4911 buf = (char *)lbuf;
4912 debug_tabla_priv->no_mic_headset_override = (*strsep(&buf, " ") == '0')
4913 ? false : true;
Bradley Rubincb3950a2011-08-18 13:07:26 -07004914 return rc;
4915}
4916
4917static const struct file_operations codec_debug_ops = {
4918 .open = codec_debug_open,
4919 .write = codec_debug_write,
4920};
4921#endif
4922
Joonwoo Park8b1f0982011-12-08 17:12:45 -08004923#ifdef CONFIG_PM
4924static int tabla_suspend(struct device *dev)
4925{
Joonwoo Park816b8e62012-01-23 16:03:21 -08004926 dev_dbg(dev, "%s: system suspend\n", __func__);
4927 return 0;
Joonwoo Park8b1f0982011-12-08 17:12:45 -08004928}
4929
4930static int tabla_resume(struct device *dev)
4931{
Joonwoo Park816b8e62012-01-23 16:03:21 -08004932 dev_dbg(dev, "%s: system resume\n", __func__);
4933 return 0;
Joonwoo Park8b1f0982011-12-08 17:12:45 -08004934}
4935
4936static const struct dev_pm_ops tabla_pm_ops = {
4937 .suspend = tabla_suspend,
4938 .resume = tabla_resume,
4939};
4940#endif
4941
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004942static int __devinit tabla_probe(struct platform_device *pdev)
4943{
Santosh Mardie15e2302011-11-15 10:39:23 +05304944 int ret = 0;
Bradley Rubincb3950a2011-08-18 13:07:26 -07004945#ifdef CONFIG_DEBUG_FS
4946 debugfs_poke = debugfs_create_file("TRRS",
4947 S_IFREG | S_IRUGO, NULL, (void *) "TRRS", &codec_debug_ops);
4948
4949#endif
Santosh Mardie15e2302011-11-15 10:39:23 +05304950 if (tabla_get_intf_type() == TABLA_INTERFACE_TYPE_SLIMBUS)
4951 ret = snd_soc_register_codec(&pdev->dev, &soc_codec_dev_tabla,
4952 tabla_dai, ARRAY_SIZE(tabla_dai));
4953 else if (tabla_get_intf_type() == TABLA_INTERFACE_TYPE_I2C)
4954 ret = snd_soc_register_codec(&pdev->dev, &soc_codec_dev_tabla,
4955 tabla_i2s_dai, ARRAY_SIZE(tabla_i2s_dai));
4956 return ret;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004957}
4958static int __devexit tabla_remove(struct platform_device *pdev)
4959{
4960 snd_soc_unregister_codec(&pdev->dev);
Bradley Rubincb3950a2011-08-18 13:07:26 -07004961
4962#ifdef CONFIG_DEBUG_FS
4963 debugfs_remove(debugfs_poke);
4964#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004965 return 0;
4966}
4967static struct platform_driver tabla_codec_driver = {
4968 .probe = tabla_probe,
4969 .remove = tabla_remove,
4970 .driver = {
4971 .name = "tabla_codec",
4972 .owner = THIS_MODULE,
Joonwoo Park8b1f0982011-12-08 17:12:45 -08004973#ifdef CONFIG_PM
4974 .pm = &tabla_pm_ops,
4975#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004976 },
4977};
4978
4979static int __init tabla_codec_init(void)
4980{
4981 return platform_driver_register(&tabla_codec_driver);
4982}
4983
4984static void __exit tabla_codec_exit(void)
4985{
4986 platform_driver_unregister(&tabla_codec_driver);
4987}
4988
4989module_init(tabla_codec_init);
4990module_exit(tabla_codec_exit);
4991
4992MODULE_DESCRIPTION("Tabla codec driver");
4993MODULE_VERSION("1.0");
4994MODULE_LICENSE("GPL v2");