Xiaozhe Shi | 73a6569 | 2012-09-18 17:51:57 -0700 | [diff] [blame] | 1 | /* Copyright (c) 2011-2012, The Linux Foundation. All rights reserved. |
Xiaozhe Shi | b19f703 | 2012-08-16 12:14:16 -0700 | [diff] [blame] | 2 | * |
| 3 | * This program is free software; you can redistribute it and/or modify |
| 4 | * it under the terms of the GNU General Public License version 2 and |
| 5 | * only version 2 as published by the Free Software Foundation. |
| 6 | * |
| 7 | * This program is distributed in the hope that it will be useful, |
| 8 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 9 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 10 | * GNU General Public License for more details. |
| 11 | */ |
| 12 | |
Xiaozhe Shi | 73a6569 | 2012-09-18 17:51:57 -0700 | [diff] [blame] | 13 | #define pr_fmt(fmt) "BMS: %s: " fmt, __func__ |
Xiaozhe Shi | b19f703 | 2012-08-16 12:14:16 -0700 | [diff] [blame] | 14 | |
| 15 | #include <linux/module.h> |
| 16 | #include <linux/types.h> |
| 17 | #include <linux/init.h> |
| 18 | #include <linux/slab.h> |
| 19 | #include <linux/err.h> |
| 20 | #include <linux/of.h> |
| 21 | #include <linux/of_device.h> |
| 22 | #include <linux/power_supply.h> |
| 23 | #include <linux/spmi.h> |
Xiaozhe Shi | e118c69 | 2012-09-24 15:17:43 -0700 | [diff] [blame] | 24 | #include <linux/rtc.h> |
Xiaozhe Shi | 7edde5d | 2012-09-26 11:23:09 -0700 | [diff] [blame] | 25 | #include <linux/delay.h> |
Xiaozhe Shi | cd7e530 | 2012-10-17 12:29:53 -0700 | [diff] [blame] | 26 | #include <linux/qpnp/qpnp-adc.h> |
Xiaozhe Shi | 73a6569 | 2012-09-18 17:51:57 -0700 | [diff] [blame] | 27 | #include <linux/mfd/pm8xxx/batterydata-lib.h> |
Xiaozhe Shi | b19f703 | 2012-08-16 12:14:16 -0700 | [diff] [blame] | 28 | |
Xiaozhe Shi | b19f703 | 2012-08-16 12:14:16 -0700 | [diff] [blame] | 29 | /* BMS Register Offsets */ |
| 30 | #define BMS1_REVISION1 0x0 |
| 31 | #define BMS1_REVISION2 0x1 |
| 32 | #define BMS1_STATUS1 0x8 |
| 33 | #define BMS1_MODE_CTL 0X40 |
Xiaozhe Shi | cd7e530 | 2012-10-17 12:29:53 -0700 | [diff] [blame] | 34 | /* Coulomb counter clear registers */ |
Xiaozhe Shi | b19f703 | 2012-08-16 12:14:16 -0700 | [diff] [blame] | 35 | #define BMS1_CC_DATA_CTL 0x42 |
| 36 | #define BMS1_CC_CLEAR_CTRL 0x43 |
| 37 | /* OCV limit registers */ |
| 38 | #define BMS1_OCV_USE_LOW_LIMIT_THR0 0x48 |
| 39 | #define BMS1_OCV_USE_LOW_LIMIT_THR1 0x49 |
| 40 | #define BMS1_OCV_USE_HIGH_LIMIT_THR0 0x4A |
| 41 | #define BMS1_OCV_USE_HIGH_LIMIT_THR1 0x4B |
| 42 | #define BMS1_OCV_USE_LIMIT_CTL 0x4C |
Xiaozhe Shi | 7edde5d | 2012-09-26 11:23:09 -0700 | [diff] [blame] | 43 | /* Delay control */ |
| 44 | #define BMS1_S1_DELAY_CTL 0x5A |
Xiaozhe Shi | b19f703 | 2012-08-16 12:14:16 -0700 | [diff] [blame] | 45 | /* CC interrupt threshold */ |
| 46 | #define BMS1_CC_THR0 0x7A |
| 47 | #define BMS1_CC_THR1 0x7B |
| 48 | #define BMS1_CC_THR2 0x7C |
| 49 | #define BMS1_CC_THR3 0x7D |
| 50 | #define BMS1_CC_THR4 0x7E |
| 51 | /* OCV for r registers */ |
| 52 | #define BMS1_OCV_FOR_R_DATA0 0x80 |
| 53 | #define BMS1_OCV_FOR_R_DATA1 0x81 |
| 54 | #define BMS1_VSENSE_FOR_R_DATA0 0x82 |
| 55 | #define BMS1_VSENSE_FOR_R_DATA1 0x83 |
Xiaozhe Shi | cd7e530 | 2012-10-17 12:29:53 -0700 | [diff] [blame] | 56 | /* Coulomb counter data */ |
Xiaozhe Shi | b19f703 | 2012-08-16 12:14:16 -0700 | [diff] [blame] | 57 | #define BMS1_CC_DATA0 0x8A |
| 58 | #define BMS1_CC_DATA1 0x8B |
| 59 | #define BMS1_CC_DATA2 0x8C |
| 60 | #define BMS1_CC_DATA3 0x8D |
| 61 | #define BMS1_CC_DATA4 0x8E |
| 62 | /* OCV for soc data */ |
| 63 | #define BMS1_OCV_FOR_SOC_DATA0 0x90 |
| 64 | #define BMS1_OCV_FOR_SOC_DATA1 0x91 |
| 65 | #define BMS1_VSENSE_PON_DATA0 0x94 |
| 66 | #define BMS1_VSENSE_PON_DATA1 0x95 |
Xiaozhe Shi | cd7e530 | 2012-10-17 12:29:53 -0700 | [diff] [blame] | 67 | #define BMS1_VSENSE_AVG_DATA0 0x98 |
| 68 | #define BMS1_VSENSE_AVG_DATA1 0x99 |
Xiaozhe Shi | b19f703 | 2012-08-16 12:14:16 -0700 | [diff] [blame] | 69 | #define BMS1_VBAT_AVG_DATA0 0x9E |
| 70 | #define BMS1_VBAT_AVG_DATA1 0x9F |
| 71 | /* Extra bms registers */ |
| 72 | #define BMS1_BMS_DATA_REG_0 0xB0 |
Xiaozhe Shi | cd7e530 | 2012-10-17 12:29:53 -0700 | [diff] [blame] | 73 | #define IAVG_STORAGE_REG 0xB1 |
| 74 | #define SOC_STORAGE_REG 0xB2 |
Xiaozhe Shi | b19f703 | 2012-08-16 12:14:16 -0700 | [diff] [blame] | 75 | #define BMS1_BMS_DATA_REG_3 0xB3 |
| 76 | |
Xiaozhe Shi | cd7e530 | 2012-10-17 12:29:53 -0700 | [diff] [blame] | 77 | /* Configuration for saving of shutdown soc/iavg */ |
| 78 | #define IGNORE_SOC_TEMP_DECIDEG 50 |
| 79 | #define IAVG_STEP_SIZE_MA 50 |
| 80 | #define IAVG_START 600 |
| 81 | #define SOC_ZERO 0xFF |
| 82 | |
Xiaozhe Shi | e118c69 | 2012-09-24 15:17:43 -0700 | [diff] [blame] | 83 | #define IAVG_SAMPLES 16 |
| 84 | |
Xiaozhe Shi | b19f703 | 2012-08-16 12:14:16 -0700 | [diff] [blame] | 85 | #define QPNP_BMS_DEV_NAME "qcom,qpnp-bms" |
| 86 | |
Xiaozhe Shi | cd7e530 | 2012-10-17 12:29:53 -0700 | [diff] [blame] | 87 | struct soc_params { |
| 88 | int fcc_uah; |
| 89 | int cc_uah; |
| 90 | int rbatt; |
| 91 | int iavg_ua; |
| 92 | int uuc_uah; |
| 93 | int ocv_charge_uah; |
| 94 | }; |
| 95 | |
| 96 | struct raw_soc_params { |
| 97 | uint16_t last_good_ocv_raw; |
| 98 | int64_t cc; |
| 99 | int last_good_ocv_uv; |
| 100 | }; |
| 101 | |
Xiaozhe Shi | b19f703 | 2012-08-16 12:14:16 -0700 | [diff] [blame] | 102 | struct qpnp_bms_chip { |
| 103 | struct device *dev; |
| 104 | struct power_supply bms_psy; |
Xiaozhe Shi | 7edde5d | 2012-09-26 11:23:09 -0700 | [diff] [blame] | 105 | struct power_supply *batt_psy; |
Xiaozhe Shi | b19f703 | 2012-08-16 12:14:16 -0700 | [diff] [blame] | 106 | struct spmi_device *spmi; |
| 107 | u16 base; |
| 108 | |
| 109 | u8 revision1; |
| 110 | u8 revision2; |
| 111 | int charger_status; |
| 112 | bool online; |
| 113 | /* platform data */ |
| 114 | unsigned int r_sense_mohm; |
Xiaozhe Shi | cd7e530 | 2012-10-17 12:29:53 -0700 | [diff] [blame] | 115 | unsigned int v_cutoff_uv; |
| 116 | unsigned int max_voltage_uv; |
Xiaozhe Shi | b19f703 | 2012-08-16 12:14:16 -0700 | [diff] [blame] | 117 | unsigned int r_conn_mohm; |
| 118 | int shutdown_soc_valid_limit; |
| 119 | int adjust_soc_low_threshold; |
| 120 | int adjust_soc_high_threshold; |
Xiaozhe Shi | cd7e530 | 2012-10-17 12:29:53 -0700 | [diff] [blame] | 121 | int chg_term_ua; |
Xiaozhe Shi | 73a6569 | 2012-09-18 17:51:57 -0700 | [diff] [blame] | 122 | enum battery_type batt_type; |
| 123 | unsigned int fcc; |
| 124 | struct single_row_lut *fcc_temp_lut; |
| 125 | struct single_row_lut *fcc_sf_lut; |
| 126 | struct pc_temp_ocv_lut *pc_temp_ocv_lut; |
| 127 | struct sf_lut *pc_sf_lut; |
| 128 | struct sf_lut *rbatt_sf_lut; |
| 129 | int default_rbatt_mohm; |
Xiaozhe Shi | cd7e530 | 2012-10-17 12:29:53 -0700 | [diff] [blame] | 130 | |
| 131 | struct delayed_work calculate_soc_delayed_work; |
| 132 | |
| 133 | struct mutex bms_output_lock; |
| 134 | struct mutex last_ocv_uv_mutex; |
Xiaozhe Shi | e118c69 | 2012-09-24 15:17:43 -0700 | [diff] [blame] | 135 | struct mutex soc_invalidation_mutex; |
Xiaozhe Shi | cd7e530 | 2012-10-17 12:29:53 -0700 | [diff] [blame] | 136 | |
| 137 | unsigned int start_percent; |
| 138 | unsigned int end_percent; |
| 139 | bool ignore_shutdown_soc; |
| 140 | int shutdown_soc_invalid; |
| 141 | int shutdown_soc; |
| 142 | int shutdown_iavg_ma; |
| 143 | |
| 144 | int low_soc_calc_threshold; |
| 145 | int low_soc_calculate_soc_ms; |
| 146 | int calculate_soc_ms; |
| 147 | |
Xiaozhe Shi | e118c69 | 2012-09-24 15:17:43 -0700 | [diff] [blame] | 148 | uint16_t ocv_reading_at_100; |
| 149 | int64_t cc_reading_at_100; |
| 150 | uint16_t prev_last_good_ocv_raw; |
| 151 | int last_ocv_uv; |
| 152 | int last_cc_uah; |
| 153 | unsigned long tm_sec; |
| 154 | bool first_time_calc_soc; |
| 155 | bool first_time_calc_uuc; |
| 156 | int pon_ocv_uv; |
| 157 | |
| 158 | int iavg_samples_ma[IAVG_SAMPLES]; |
| 159 | int iavg_index; |
| 160 | int iavg_num_samples; |
| 161 | struct timespec t_soc_queried; |
| 162 | int last_soc; |
Xiaozhe Shi | 7edde5d | 2012-09-26 11:23:09 -0700 | [diff] [blame] | 163 | int last_soc_est; |
Xiaozhe Shi | e118c69 | 2012-09-24 15:17:43 -0700 | [diff] [blame] | 164 | |
| 165 | int charge_time_us; |
| 166 | int catch_up_time_us; |
| 167 | struct single_row_lut *adjusted_fcc_temp_lut; |
| 168 | |
Xiaozhe Shi | cd7e530 | 2012-10-17 12:29:53 -0700 | [diff] [blame] | 169 | unsigned int vadc_v0625; |
| 170 | unsigned int vadc_v1250; |
| 171 | |
| 172 | int prev_iavg_ua; |
| 173 | int prev_uuc_iavg_ma; |
| 174 | int prev_pc_unusable; |
| 175 | int ibat_at_cv_ua; |
| 176 | int soc_at_cv; |
| 177 | int prev_chg_soc; |
| 178 | int calculated_soc; |
Xiaozhe Shi | 781b0a2 | 2012-11-05 17:18:27 -0800 | [diff] [blame] | 179 | int last_vbat_read_uv; |
Xiaozhe Shi | b19f703 | 2012-08-16 12:14:16 -0700 | [diff] [blame] | 180 | }; |
| 181 | |
| 182 | static struct of_device_id qpnp_bms_match_table[] = { |
| 183 | { .compatible = QPNP_BMS_DEV_NAME }, |
| 184 | {} |
| 185 | }; |
| 186 | |
| 187 | static char *qpnp_bms_supplicants[] = { |
| 188 | "battery" |
| 189 | }; |
| 190 | |
| 191 | static enum power_supply_property msm_bms_power_props[] = { |
| 192 | POWER_SUPPLY_PROP_STATUS, |
| 193 | POWER_SUPPLY_PROP_ONLINE, |
| 194 | POWER_SUPPLY_PROP_CAPACITY, |
| 195 | POWER_SUPPLY_PROP_CURRENT_NOW, |
| 196 | POWER_SUPPLY_PROP_CHARGE_FULL_DESIGN, |
| 197 | }; |
| 198 | |
Xiaozhe Shi | 781b0a2 | 2012-11-05 17:18:27 -0800 | [diff] [blame] | 199 | static bool use_voltage_soc; |
| 200 | |
| 201 | /* module params */ |
| 202 | static int bms_param_set_bool(const char *val, const struct kernel_param *kp) |
| 203 | { |
| 204 | int rc; |
| 205 | struct power_supply *bms_psy; |
| 206 | |
| 207 | rc = param_set_bool(val, kp); |
| 208 | if (rc) { |
| 209 | pr_err("failed to set %s, rc = %d\n", kp->name, rc); |
| 210 | return rc; |
| 211 | } |
| 212 | |
| 213 | bms_psy = power_supply_get_by_name("bms"); |
| 214 | |
| 215 | if (bms_psy) |
| 216 | power_supply_changed(bms_psy); |
| 217 | else |
| 218 | pr_debug("%s changed but bms has not been initialized yet\n", |
| 219 | kp->name); |
| 220 | |
| 221 | return 0; |
| 222 | } |
| 223 | |
| 224 | static struct kernel_param_ops bms_param_ops = { |
| 225 | .set = bms_param_set_bool, |
| 226 | .get = param_get_bool, |
| 227 | }; |
| 228 | |
| 229 | module_param_cb(use_voltage_soc, &bms_param_ops, &use_voltage_soc, 0644); |
| 230 | |
Xiaozhe Shi | b19f703 | 2012-08-16 12:14:16 -0700 | [diff] [blame] | 231 | static int qpnp_read_wrapper(struct qpnp_bms_chip *chip, u8 *val, |
| 232 | u16 base, int count) |
| 233 | { |
| 234 | int rc; |
| 235 | struct spmi_device *spmi = chip->spmi; |
| 236 | |
| 237 | rc = spmi_ext_register_readl(spmi->ctrl, spmi->sid, base, val, count); |
Xiaozhe Shi | cd7e530 | 2012-10-17 12:29:53 -0700 | [diff] [blame] | 238 | if (rc) { |
Xiaozhe Shi | b19f703 | 2012-08-16 12:14:16 -0700 | [diff] [blame] | 239 | pr_err("SPMI read failed rc=%d\n", rc); |
Xiaozhe Shi | cd7e530 | 2012-10-17 12:29:53 -0700 | [diff] [blame] | 240 | return rc; |
| 241 | } |
Xiaozhe Shi | b19f703 | 2012-08-16 12:14:16 -0700 | [diff] [blame] | 242 | return 0; |
| 243 | } |
| 244 | |
Xiaozhe Shi | cd7e530 | 2012-10-17 12:29:53 -0700 | [diff] [blame] | 245 | static int qpnp_write_wrapper(struct qpnp_bms_chip *chip, u8 *val, |
| 246 | u16 base, int count) |
| 247 | { |
| 248 | int rc; |
| 249 | struct spmi_device *spmi = chip->spmi; |
| 250 | |
| 251 | rc = spmi_ext_register_writel(spmi->ctrl, spmi->sid, base, val, count); |
| 252 | if (rc) { |
| 253 | pr_err("SPMI write failed rc=%d\n", rc); |
| 254 | return rc; |
| 255 | } |
| 256 | return 0; |
| 257 | } |
| 258 | |
| 259 | static int qpnp_masked_write(struct qpnp_bms_chip *chip, u16 addr, |
| 260 | u8 mask, u8 val) |
| 261 | { |
| 262 | int rc; |
| 263 | u8 reg; |
| 264 | |
| 265 | rc = qpnp_read_wrapper(chip, ®, chip->base + addr, 1); |
| 266 | if (rc) { |
| 267 | pr_err("read failed addr = %03X, rc = %d\n", |
| 268 | chip->base + addr, rc); |
| 269 | return rc; |
| 270 | } |
| 271 | reg &= ~mask; |
| 272 | reg |= val & mask; |
| 273 | rc = qpnp_write_wrapper(chip, ®, chip->base + addr, 1); |
| 274 | if (rc) { |
| 275 | pr_err("write failed addr = %03X, val = %02x, mask = %02x, reg = %02x, rc = %d\n", |
| 276 | chip->base + addr, val, mask, reg, rc); |
| 277 | return rc; |
| 278 | } |
| 279 | return 0; |
| 280 | } |
| 281 | |
| 282 | #define HOLD_OREG_DATA BIT(0) |
| 283 | static int lock_output_data(struct qpnp_bms_chip *chip) |
| 284 | { |
| 285 | int rc; |
| 286 | |
| 287 | rc = qpnp_masked_write(chip, BMS1_CC_DATA_CTL, |
| 288 | HOLD_OREG_DATA, HOLD_OREG_DATA); |
| 289 | if (rc) { |
| 290 | pr_err("couldnt lock bms output rc = %d\n", rc); |
| 291 | return rc; |
| 292 | } |
| 293 | return 0; |
| 294 | } |
| 295 | |
| 296 | static int unlock_output_data(struct qpnp_bms_chip *chip) |
| 297 | { |
| 298 | int rc; |
| 299 | |
| 300 | rc = qpnp_masked_write(chip, BMS1_CC_DATA_CTL, HOLD_OREG_DATA, 0); |
| 301 | if (rc) { |
| 302 | pr_err("fail to unlock BMS_CONTROL rc = %d\n", rc); |
| 303 | return rc; |
| 304 | } |
| 305 | return 0; |
| 306 | } |
| 307 | |
| 308 | #define V_PER_BIT_MUL_FACTOR 97656 |
| 309 | #define V_PER_BIT_DIV_FACTOR 1000 |
| 310 | #define VADC_INTRINSIC_OFFSET 0x6000 |
| 311 | |
| 312 | static int vadc_reading_to_uv(unsigned int reading) |
| 313 | { |
| 314 | if (reading <= VADC_INTRINSIC_OFFSET) |
| 315 | return 0; |
| 316 | |
| 317 | return (reading - VADC_INTRINSIC_OFFSET) |
| 318 | * V_PER_BIT_MUL_FACTOR / V_PER_BIT_DIV_FACTOR; |
| 319 | } |
| 320 | |
| 321 | #define VADC_CALIB_UV 625000 |
| 322 | #define VBATT_MUL_FACTOR 3 |
| 323 | |
| 324 | static int adjust_vbatt_reading(struct qpnp_bms_chip *chip, |
| 325 | unsigned int reading_uv) |
| 326 | { |
| 327 | s64 numerator, denominator; |
| 328 | |
| 329 | if (reading_uv == 0) |
| 330 | return 0; |
| 331 | |
| 332 | /* don't adjust if not calibrated */ |
| 333 | if (chip->vadc_v0625 == 0 || chip->vadc_v1250 == 0) { |
| 334 | pr_debug("No cal yet return %d\n", |
| 335 | VBATT_MUL_FACTOR * reading_uv); |
| 336 | return VBATT_MUL_FACTOR * reading_uv; |
| 337 | } |
| 338 | |
Xiaozhe Shi | 4e37665 | 2012-10-25 12:38:50 -0700 | [diff] [blame] | 339 | numerator = ((s64)reading_uv - chip->vadc_v0625) * VADC_CALIB_UV; |
Xiaozhe Shi | cd7e530 | 2012-10-17 12:29:53 -0700 | [diff] [blame] | 340 | denominator = (s64)chip->vadc_v1250 - chip->vadc_v0625; |
| 341 | if (denominator == 0) |
| 342 | return reading_uv * VBATT_MUL_FACTOR; |
| 343 | return (VADC_CALIB_UV + div_s64(numerator, denominator)) |
| 344 | * VBATT_MUL_FACTOR; |
| 345 | } |
| 346 | |
| 347 | static inline int convert_vbatt_raw_to_uv(struct qpnp_bms_chip *chip, |
| 348 | uint16_t reading) |
| 349 | { |
Xiaozhe Shi | 4e37665 | 2012-10-25 12:38:50 -0700 | [diff] [blame] | 350 | int uv; |
| 351 | |
| 352 | uv = vadc_reading_to_uv(reading); |
| 353 | pr_debug("%u raw converted into %d uv\n", reading, uv); |
| 354 | uv = adjust_vbatt_reading(chip, uv); |
| 355 | pr_debug("adjusted into %d uv\n", uv); |
| 356 | return uv; |
Xiaozhe Shi | cd7e530 | 2012-10-17 12:29:53 -0700 | [diff] [blame] | 357 | } |
| 358 | |
| 359 | #define CC_READING_RESOLUTION_N 542535 |
| 360 | #define CC_READING_RESOLUTION_D 100000 |
| 361 | static int cc_reading_to_uv(int16_t reading) |
| 362 | { |
| 363 | return div_s64(reading * CC_READING_RESOLUTION_N, |
| 364 | CC_READING_RESOLUTION_D); |
| 365 | } |
| 366 | |
| 367 | #define QPNP_ADC_GAIN_NV 17857LL |
Xiaozhe Shi | 4e37665 | 2012-10-25 12:38:50 -0700 | [diff] [blame] | 368 | static s64 cc_adjust_for_gain(s64 uv, uint16_t gain) |
Xiaozhe Shi | cd7e530 | 2012-10-17 12:29:53 -0700 | [diff] [blame] | 369 | { |
| 370 | s64 result_uv; |
| 371 | |
| 372 | pr_debug("adjusting_uv = %lld\n", uv); |
Xiaozhe Shi | 4e37665 | 2012-10-25 12:38:50 -0700 | [diff] [blame] | 373 | pr_debug("adjusting by factor: %lld/%hu = %lld%%\n", |
Xiaozhe Shi | cd7e530 | 2012-10-17 12:29:53 -0700 | [diff] [blame] | 374 | QPNP_ADC_GAIN_NV, gain, |
Xiaozhe Shi | 4e37665 | 2012-10-25 12:38:50 -0700 | [diff] [blame] | 375 | div_s64(QPNP_ADC_GAIN_NV * 100LL, (s64)gain)); |
Xiaozhe Shi | cd7e530 | 2012-10-17 12:29:53 -0700 | [diff] [blame] | 376 | |
Xiaozhe Shi | 4e37665 | 2012-10-25 12:38:50 -0700 | [diff] [blame] | 377 | result_uv = div_s64(uv * QPNP_ADC_GAIN_NV, (s64)gain); |
Xiaozhe Shi | cd7e530 | 2012-10-17 12:29:53 -0700 | [diff] [blame] | 378 | pr_debug("result_uv = %lld\n", result_uv); |
| 379 | return result_uv; |
| 380 | } |
| 381 | |
| 382 | static int convert_vsense_to_uv(struct qpnp_bms_chip *chip, |
| 383 | int16_t reading) |
| 384 | { |
Xiaozhe Shi | 4e37665 | 2012-10-25 12:38:50 -0700 | [diff] [blame] | 385 | struct qpnp_iadc_calib calibration; |
| 386 | |
| 387 | qpnp_iadc_get_gain_and_offset(&calibration); |
| 388 | return cc_adjust_for_gain(cc_reading_to_uv(reading), |
| 389 | calibration.gain_raw); |
Xiaozhe Shi | cd7e530 | 2012-10-17 12:29:53 -0700 | [diff] [blame] | 390 | } |
| 391 | |
| 392 | static int read_vsense_avg(struct qpnp_bms_chip *chip, int *result_uv) |
| 393 | { |
| 394 | int rc; |
| 395 | int16_t reading; |
| 396 | |
| 397 | rc = qpnp_read_wrapper(chip, (u8 *)&reading, |
| 398 | chip->base + BMS1_VSENSE_AVG_DATA0, 2); |
| 399 | |
| 400 | if (rc) { |
| 401 | pr_err("fail to read VSENSE_AVG rc = %d\n", rc); |
| 402 | return rc; |
| 403 | } |
| 404 | |
| 405 | *result_uv = convert_vsense_to_uv(chip, reading); |
| 406 | return 0; |
| 407 | } |
| 408 | |
| 409 | static int get_battery_current(struct qpnp_bms_chip *chip, int *result_ua) |
| 410 | { |
| 411 | int vsense_uv = 0; |
| 412 | |
| 413 | if (chip->r_sense_mohm == 0) { |
| 414 | pr_err("r_sense is zero\n"); |
| 415 | return -EINVAL; |
| 416 | } |
| 417 | |
| 418 | mutex_lock(&chip->bms_output_lock); |
| 419 | lock_output_data(chip); |
| 420 | read_vsense_avg(chip, &vsense_uv); |
| 421 | unlock_output_data(chip); |
| 422 | mutex_unlock(&chip->bms_output_lock); |
| 423 | |
| 424 | pr_debug("vsense_uv=%duV\n", vsense_uv); |
| 425 | /* cast for signed division */ |
| 426 | *result_ua = vsense_uv * 1000 / (int)chip->r_sense_mohm; |
| 427 | pr_debug("ibat=%duA\n", *result_ua); |
| 428 | return 0; |
| 429 | } |
| 430 | |
| 431 | static int get_battery_voltage(int *result_uv) |
| 432 | { |
| 433 | int rc; |
| 434 | struct qpnp_vadc_result adc_result; |
| 435 | |
| 436 | rc = qpnp_vadc_read(VBAT_SNS, &adc_result); |
| 437 | if (rc) { |
| 438 | pr_err("error reading adc channel = %d, rc = %d\n", |
| 439 | VBAT_SNS, rc); |
| 440 | return rc; |
| 441 | } |
| 442 | pr_debug("mvolts phy = %lld meas = 0x%llx\n", adc_result.physical, |
| 443 | adc_result.measurement); |
| 444 | *result_uv = (int)adc_result.physical; |
| 445 | return 0; |
| 446 | } |
| 447 | |
Xiaozhe Shi | e118c69 | 2012-09-24 15:17:43 -0700 | [diff] [blame] | 448 | #define CC_36_BIT_MASK 0xFFFFFFFFFLL |
| 449 | |
| 450 | static int read_cc_raw(struct qpnp_bms_chip *chip, int64_t *reading) |
| 451 | { |
| 452 | int64_t raw_reading; |
| 453 | int rc; |
| 454 | |
| 455 | rc = qpnp_read_wrapper(chip, (u8 *)&raw_reading, |
| 456 | chip->base + BMS1_CC_DATA0, 5); |
| 457 | if (rc) { |
| 458 | pr_err("Error reading cc: rc = %d\n", rc); |
| 459 | return -ENXIO; |
| 460 | } |
| 461 | |
| 462 | raw_reading = raw_reading & CC_36_BIT_MASK; |
| 463 | /* convert 36 bit signed value into 64 signed value */ |
| 464 | *reading = (raw_reading >> 35) == 0LL ? |
| 465 | raw_reading : ((-1LL ^ CC_36_BIT_MASK) | raw_reading); |
| 466 | pr_debug("before conversion: %llx, after conversion: %llx\n", |
| 467 | raw_reading, *reading); |
| 468 | |
| 469 | return 0; |
| 470 | } |
| 471 | |
Xiaozhe Shi | 4e37665 | 2012-10-25 12:38:50 -0700 | [diff] [blame] | 472 | static int calib_vadc(struct qpnp_bms_chip *chip) |
| 473 | { |
| 474 | int rc; |
| 475 | struct qpnp_vadc_result result; |
| 476 | |
| 477 | rc = qpnp_vadc_read(REF_625MV, &result); |
| 478 | if (rc) { |
| 479 | pr_debug("vadc read failed with rc = %d\n", rc); |
| 480 | return rc; |
| 481 | } |
| 482 | chip->vadc_v0625 = result.physical; |
| 483 | |
| 484 | rc = qpnp_vadc_read(REF_125V, &result); |
| 485 | if (rc) { |
| 486 | pr_debug("vadc read failed with rc = %d\n", rc); |
| 487 | return rc; |
| 488 | } |
| 489 | chip->vadc_v1250 = result.physical; |
| 490 | pr_debug("vadc calib: 0625 = %d, 1250 = %d\n", |
| 491 | chip->vadc_v0625, chip->vadc_v1250); |
| 492 | return 0; |
| 493 | } |
| 494 | |
Xiaozhe Shi | e118c69 | 2012-09-24 15:17:43 -0700 | [diff] [blame] | 495 | static void convert_and_store_ocv(struct qpnp_bms_chip *chip, |
| 496 | struct raw_soc_params *raw) |
| 497 | { |
Xiaozhe Shi | 4e37665 | 2012-10-25 12:38:50 -0700 | [diff] [blame] | 498 | int rc; |
| 499 | |
| 500 | pr_debug("prev_last_good_ocv_raw = %d, last_good_ocv_raw = %d\n", |
| 501 | chip->prev_last_good_ocv_raw, |
| 502 | raw->last_good_ocv_raw); |
| 503 | rc = calib_vadc(chip); |
| 504 | if (rc) |
| 505 | pr_err("Vadc reference voltage read failed, rc = %d\n", rc); |
Xiaozhe Shi | e118c69 | 2012-09-24 15:17:43 -0700 | [diff] [blame] | 506 | chip->prev_last_good_ocv_raw = raw->last_good_ocv_raw; |
| 507 | raw->last_good_ocv_uv = convert_vbatt_raw_to_uv(chip, |
| 508 | raw->last_good_ocv_raw); |
| 509 | chip->last_ocv_uv = raw->last_good_ocv_uv; |
Xiaozhe Shi | 4e37665 | 2012-10-25 12:38:50 -0700 | [diff] [blame] | 510 | pr_debug("last_good_ocv_uv = %d\n", raw->last_good_ocv_uv); |
Xiaozhe Shi | e118c69 | 2012-09-24 15:17:43 -0700 | [diff] [blame] | 511 | } |
| 512 | |
Xiaozhe Shi | cd7e530 | 2012-10-17 12:29:53 -0700 | [diff] [blame] | 513 | static int read_soc_params_raw(struct qpnp_bms_chip *chip, |
| 514 | struct raw_soc_params *raw) |
| 515 | { |
Xiaozhe Shi | e118c69 | 2012-09-24 15:17:43 -0700 | [diff] [blame] | 516 | int rc; |
| 517 | |
| 518 | mutex_lock(&chip->bms_output_lock); |
| 519 | lock_output_data(chip); |
| 520 | |
| 521 | rc = qpnp_read_wrapper(chip, (u8 *)&raw->last_good_ocv_raw, |
| 522 | chip->base + BMS1_OCV_FOR_SOC_DATA0, 2); |
| 523 | if (rc) { |
| 524 | pr_err("Error reading ocv: rc = %d\n", rc); |
| 525 | return -ENXIO; |
| 526 | } |
| 527 | |
| 528 | rc = read_cc_raw(chip, &raw->cc); |
| 529 | if (rc) { |
| 530 | pr_err("Failed to read raw cc data, rc = %d\n", rc); |
| 531 | return rc; |
| 532 | } |
| 533 | |
| 534 | unlock_output_data(chip); |
| 535 | mutex_unlock(&chip->bms_output_lock); |
| 536 | |
| 537 | if (chip->prev_last_good_ocv_raw == 0) { |
| 538 | convert_and_store_ocv(chip, raw); |
| 539 | pr_debug("PON_OCV_UV = %d\n", chip->last_ocv_uv); |
| 540 | } else if (chip->prev_last_good_ocv_raw != raw->last_good_ocv_raw) { |
| 541 | convert_and_store_ocv(chip, raw); |
| 542 | /* forget the old cc value upon ocv */ |
| 543 | chip->last_cc_uah = 0; |
| 544 | } else { |
| 545 | raw->last_good_ocv_uv = chip->last_ocv_uv; |
| 546 | } |
| 547 | |
| 548 | /* fake a high OCV if done charging */ |
| 549 | if (chip->ocv_reading_at_100 != raw->last_good_ocv_raw) { |
| 550 | chip->ocv_reading_at_100 = 0; |
| 551 | chip->cc_reading_at_100 = 0; |
| 552 | } else { |
| 553 | /* |
| 554 | * force 100% ocv by selecting the highest voltage the |
| 555 | * battery could ever reach |
| 556 | */ |
| 557 | raw->last_good_ocv_uv = chip->max_voltage_uv; |
| 558 | chip->last_ocv_uv = chip->max_voltage_uv; |
| 559 | } |
| 560 | pr_debug("last_good_ocv_raw= 0x%x, last_good_ocv_uv= %duV\n", |
| 561 | raw->last_good_ocv_raw, raw->last_good_ocv_uv); |
| 562 | pr_debug("cc_raw= 0x%llx\n", raw->cc); |
Xiaozhe Shi | cd7e530 | 2012-10-17 12:29:53 -0700 | [diff] [blame] | 563 | return 0; |
| 564 | } |
| 565 | |
Xiaozhe Shi | e118c69 | 2012-09-24 15:17:43 -0700 | [diff] [blame] | 566 | static int calculate_pc(struct qpnp_bms_chip *chip, int ocv_uv, |
| 567 | int batt_temp) |
| 568 | { |
| 569 | int pc; |
| 570 | |
| 571 | pc = interpolate_pc(chip->pc_temp_ocv_lut, |
| 572 | batt_temp / 10, ocv_uv / 1000); |
| 573 | pr_debug("pc = %u %% for ocv = %d uv batt_temp = %d\n", |
| 574 | pc, ocv_uv, batt_temp); |
| 575 | /* Multiply the initial FCC value by the scale factor. */ |
| 576 | return pc; |
| 577 | } |
| 578 | |
| 579 | static int calculate_fcc(struct qpnp_bms_chip *chip, int batt_temp) |
| 580 | { |
| 581 | int fcc_uah; |
| 582 | |
| 583 | if (chip->adjusted_fcc_temp_lut == NULL) { |
| 584 | /* interpolate_fcc returns a mv value. */ |
| 585 | fcc_uah = interpolate_fcc(chip->fcc_temp_lut, |
| 586 | batt_temp) * 1000; |
| 587 | pr_debug("fcc = %d uAh\n", fcc_uah); |
| 588 | return fcc_uah; |
| 589 | } else { |
| 590 | return 1000 * interpolate_fcc(chip->adjusted_fcc_temp_lut, |
| 591 | batt_temp); |
| 592 | } |
| 593 | } |
| 594 | |
| 595 | /* calculate remaining charge at the time of ocv */ |
| 596 | static int calculate_ocv_charge(struct qpnp_bms_chip *chip, |
| 597 | struct raw_soc_params *raw, |
| 598 | int fcc_uah, |
| 599 | int batt_temp) |
| 600 | { |
| 601 | int ocv_uv, pc; |
| 602 | |
| 603 | ocv_uv = raw->last_good_ocv_uv; |
| 604 | pc = calculate_pc(chip, ocv_uv, batt_temp); |
| 605 | pr_debug("ocv_uv = %d pc = %d\n", ocv_uv, pc); |
| 606 | return (fcc_uah * pc) / 100; |
| 607 | } |
| 608 | |
| 609 | #define CC_RESOLUTION_N 542535 |
| 610 | #define CC_RESOLUTION_D 100000 |
| 611 | |
| 612 | static s64 cc_to_uv(s64 cc) |
| 613 | { |
| 614 | return div_s64(cc * CC_RESOLUTION_N, CC_RESOLUTION_D); |
| 615 | } |
| 616 | |
| 617 | #define CC_READING_TICKS 56 |
| 618 | #define SLEEP_CLK_HZ 32764 |
| 619 | #define SECONDS_PER_HOUR 3600 |
| 620 | |
| 621 | static s64 cc_uv_to_nvh(s64 cc_uv) |
| 622 | { |
| 623 | return div_s64(cc_uv * CC_READING_TICKS * 1000, |
| 624 | SLEEP_CLK_HZ * SECONDS_PER_HOUR); |
| 625 | } |
| 626 | |
| 627 | /** |
| 628 | * calculate_cc- |
| 629 | * @chip: the bms chip pointer |
| 630 | * @cc: the cc reading from bms h/w |
| 631 | * @val: return value |
| 632 | * @coulomb_counter: adjusted coulomb counter for 100% |
| 633 | * |
| 634 | * RETURNS: in val pointer coulomb counter based charger in uAh |
| 635 | * (micro Amp hour) |
| 636 | */ |
| 637 | static int calculate_cc(struct qpnp_bms_chip *chip, int64_t cc) |
| 638 | { |
| 639 | int64_t cc_voltage_uv, cc_nvh, cc_uah; |
Xiaozhe Shi | 4e37665 | 2012-10-25 12:38:50 -0700 | [diff] [blame] | 640 | struct qpnp_iadc_calib calibration; |
| 641 | |
| 642 | qpnp_iadc_get_gain_and_offset(&calibration); |
Xiaozhe Shi | e118c69 | 2012-09-24 15:17:43 -0700 | [diff] [blame] | 643 | cc_voltage_uv = cc; |
| 644 | cc_voltage_uv -= chip->cc_reading_at_100; |
| 645 | pr_debug("cc = %lld. after subtracting 0x%llx cc = %lld\n", |
| 646 | cc, chip->cc_reading_at_100, |
| 647 | cc_voltage_uv); |
| 648 | cc_voltage_uv = cc_to_uv(cc_voltage_uv); |
Xiaozhe Shi | 4e37665 | 2012-10-25 12:38:50 -0700 | [diff] [blame] | 649 | cc_voltage_uv = cc_adjust_for_gain(cc_voltage_uv, calibration.gain_raw); |
Xiaozhe Shi | e118c69 | 2012-09-24 15:17:43 -0700 | [diff] [blame] | 650 | pr_debug("cc_voltage_uv = %lld uv\n", cc_voltage_uv); |
| 651 | cc_nvh = cc_uv_to_nvh(cc_voltage_uv); |
| 652 | pr_debug("cc_nvh = %lld nano_volt_hour\n", cc_nvh); |
| 653 | cc_uah = div_s64(cc_nvh, chip->r_sense_mohm); |
| 654 | /* cc_raw had 4 bits of extra precision. |
| 655 | By now it should be within 32 bit range */ |
| 656 | return (int)cc_uah; |
| 657 | } |
| 658 | |
| 659 | static int get_rbatt(struct qpnp_bms_chip *chip, |
| 660 | int soc_rbatt_mohm, int batt_temp) |
| 661 | { |
| 662 | int rbatt_mohm, scalefactor; |
| 663 | |
| 664 | rbatt_mohm = chip->default_rbatt_mohm; |
| 665 | pr_debug("rbatt before scaling = %d\n", rbatt_mohm); |
| 666 | if (chip->rbatt_sf_lut == NULL) { |
| 667 | pr_debug("RBATT = %d\n", rbatt_mohm); |
| 668 | return rbatt_mohm; |
| 669 | } |
| 670 | /* Convert the batt_temp to DegC from deciDegC */ |
| 671 | batt_temp = batt_temp / 10; |
| 672 | scalefactor = interpolate_scalingfactor(chip->rbatt_sf_lut, |
| 673 | batt_temp, soc_rbatt_mohm); |
| 674 | pr_debug("rbatt sf = %d for batt_temp = %d, soc_rbatt = %d\n", |
| 675 | scalefactor, batt_temp, soc_rbatt_mohm); |
| 676 | rbatt_mohm = (rbatt_mohm * scalefactor) / 100; |
| 677 | |
| 678 | rbatt_mohm += chip->r_conn_mohm; |
| 679 | pr_debug("adding r_conn_mohm = %d rbatt = %d\n", |
| 680 | chip->r_conn_mohm, rbatt_mohm); |
| 681 | |
| 682 | pr_debug("RBATT = %d\n", rbatt_mohm); |
| 683 | return rbatt_mohm; |
| 684 | } |
| 685 | |
| 686 | static void calculate_iavg(struct qpnp_bms_chip *chip, int cc_uah, |
| 687 | int *iavg_ua) |
| 688 | { |
| 689 | int delta_cc_uah, delta_time_s, rc; |
| 690 | struct rtc_time tm; |
| 691 | struct rtc_device *rtc; |
| 692 | unsigned long now_tm_sec = 0; |
| 693 | |
| 694 | rc = 0; |
| 695 | /* if anything fails report the previous iavg_ua */ |
| 696 | *iavg_ua = chip->prev_iavg_ua; |
| 697 | |
| 698 | rtc = rtc_class_open(CONFIG_RTC_HCTOSYS_DEVICE); |
| 699 | if (rtc == NULL) { |
| 700 | pr_err("%s: unable to open rtc device (%s)\n", |
| 701 | __FILE__, CONFIG_RTC_HCTOSYS_DEVICE); |
| 702 | goto out; |
| 703 | } |
| 704 | |
| 705 | rc = rtc_read_time(rtc, &tm); |
| 706 | if (rc) { |
| 707 | pr_err("Error reading rtc device (%s) : %d\n", |
| 708 | CONFIG_RTC_HCTOSYS_DEVICE, rc); |
| 709 | goto out; |
| 710 | } |
| 711 | |
| 712 | rc = rtc_valid_tm(&tm); |
| 713 | if (rc) { |
| 714 | pr_err("Invalid RTC time (%s): %d\n", |
| 715 | CONFIG_RTC_HCTOSYS_DEVICE, rc); |
| 716 | goto out; |
| 717 | } |
| 718 | rtc_tm_to_time(&tm, &now_tm_sec); |
| 719 | |
| 720 | if (chip->tm_sec == 0) { |
| 721 | get_battery_current(chip, iavg_ua); |
| 722 | goto out; |
| 723 | } |
| 724 | |
| 725 | delta_time_s = (now_tm_sec - chip->tm_sec); |
| 726 | |
| 727 | /* use the previous iavg if called within 15 seconds */ |
| 728 | if (delta_time_s < 15) { |
| 729 | *iavg_ua = chip->prev_iavg_ua; |
| 730 | goto out; |
| 731 | } |
| 732 | |
| 733 | delta_cc_uah = cc_uah - chip->last_cc_uah; |
| 734 | |
| 735 | *iavg_ua = div_s64((s64)delta_cc_uah * 3600, delta_time_s); |
| 736 | |
| 737 | pr_debug("tm_sec = %ld, now_tm_sec = %ld delta_s = %d delta_cc = %d iavg_ua = %d\n", |
| 738 | chip->tm_sec, now_tm_sec, |
| 739 | delta_time_s, delta_cc_uah, (int)*iavg_ua); |
| 740 | |
| 741 | out: |
| 742 | /* remember the iavg */ |
| 743 | chip->prev_iavg_ua = *iavg_ua; |
| 744 | |
| 745 | /* remember cc_uah */ |
| 746 | chip->last_cc_uah = cc_uah; |
| 747 | |
| 748 | /* remember this time */ |
| 749 | chip->tm_sec = now_tm_sec; |
| 750 | } |
| 751 | |
| 752 | static int calculate_termination_uuc(struct qpnp_bms_chip *chip, |
| 753 | struct soc_params *params, |
| 754 | int batt_temp, int uuc_iavg_ma, |
| 755 | int *ret_pc_unusable) |
| 756 | { |
| 757 | int unusable_uv, pc_unusable, uuc_uah; |
| 758 | int i = 0; |
| 759 | int ocv_mv; |
| 760 | int batt_temp_degc = batt_temp / 10; |
| 761 | int rbatt_mohm; |
| 762 | int delta_uv; |
| 763 | int prev_delta_uv = 0; |
| 764 | int prev_rbatt_mohm = 0; |
| 765 | int uuc_rbatt_mohm; |
| 766 | |
| 767 | for (i = 0; i <= 100; i++) { |
| 768 | ocv_mv = interpolate_ocv(chip->pc_temp_ocv_lut, |
| 769 | batt_temp_degc, i); |
| 770 | rbatt_mohm = get_rbatt(chip, i, batt_temp); |
| 771 | unusable_uv = (rbatt_mohm * uuc_iavg_ma) |
| 772 | + (chip->v_cutoff_uv); |
| 773 | delta_uv = ocv_mv * 1000 - unusable_uv; |
| 774 | |
| 775 | pr_debug("soc = %d ocv = %d rbat = %d u_uv = %d delta_v = %d\n", |
| 776 | i, ocv_mv, rbatt_mohm, unusable_uv, delta_uv); |
| 777 | |
| 778 | if (delta_uv > 0) |
| 779 | break; |
| 780 | |
| 781 | prev_delta_uv = delta_uv; |
| 782 | prev_rbatt_mohm = rbatt_mohm; |
| 783 | } |
| 784 | |
| 785 | uuc_rbatt_mohm = linear_interpolate(rbatt_mohm, delta_uv, |
| 786 | prev_rbatt_mohm, prev_delta_uv, |
| 787 | 0); |
| 788 | |
| 789 | unusable_uv = (uuc_rbatt_mohm * uuc_iavg_ma) + (chip->v_cutoff_uv); |
| 790 | |
| 791 | pc_unusable = calculate_pc(chip, unusable_uv, batt_temp); |
| 792 | uuc_uah = (params->fcc_uah * pc_unusable) / 100; |
| 793 | pr_debug("For uuc_iavg_ma = %d, unusable_rbatt = %d unusable_uv = %d unusable_pc = %d uuc = %d\n", |
| 794 | uuc_iavg_ma, |
| 795 | uuc_rbatt_mohm, unusable_uv, |
| 796 | pc_unusable, uuc_uah); |
| 797 | *ret_pc_unusable = pc_unusable; |
| 798 | return uuc_uah; |
| 799 | } |
| 800 | |
| 801 | static int adjust_uuc(struct qpnp_bms_chip *chip, |
| 802 | struct soc_params *params, |
| 803 | int new_pc_unusable, |
| 804 | int new_uuc_uah, |
| 805 | int batt_temp) |
| 806 | { |
| 807 | int new_unusable_mv, new_iavg_ma; |
| 808 | int batt_temp_degc = batt_temp / 10; |
| 809 | |
| 810 | if (chip->prev_pc_unusable == -EINVAL |
| 811 | || abs(chip->prev_pc_unusable - new_pc_unusable) <= 1) { |
| 812 | chip->prev_pc_unusable = new_pc_unusable; |
| 813 | return new_uuc_uah; |
| 814 | } |
| 815 | |
| 816 | /* the uuc is trying to change more than 1% restrict it */ |
| 817 | if (new_pc_unusable > chip->prev_pc_unusable) |
| 818 | chip->prev_pc_unusable++; |
| 819 | else |
| 820 | chip->prev_pc_unusable--; |
| 821 | |
| 822 | new_uuc_uah = (params->fcc_uah * chip->prev_pc_unusable) / 100; |
| 823 | |
| 824 | /* also find update the iavg_ma accordingly */ |
| 825 | new_unusable_mv = interpolate_ocv(chip->pc_temp_ocv_lut, |
| 826 | batt_temp_degc, chip->prev_pc_unusable); |
| 827 | if (new_unusable_mv < chip->v_cutoff_uv/1000) |
| 828 | new_unusable_mv = chip->v_cutoff_uv/1000; |
| 829 | |
| 830 | new_iavg_ma = (new_unusable_mv * 1000 - chip->v_cutoff_uv) |
| 831 | / params->rbatt; |
| 832 | if (new_iavg_ma == 0) |
| 833 | new_iavg_ma = 1; |
| 834 | chip->prev_uuc_iavg_ma = new_iavg_ma; |
| 835 | pr_debug("Restricting UUC to %d (%d%%) unusable_mv = %d iavg_ma = %d\n", |
| 836 | new_uuc_uah, chip->prev_pc_unusable, |
| 837 | new_unusable_mv, new_iavg_ma); |
| 838 | |
| 839 | return new_uuc_uah; |
| 840 | } |
| 841 | |
| 842 | #define CHARGING_IAVG_MA 250 |
| 843 | #define MIN_SECONDS_FOR_VALID_SAMPLE 20 |
| 844 | static int calculate_unusable_charge_uah(struct qpnp_bms_chip *chip, |
| 845 | struct soc_params *params, |
| 846 | int batt_temp) |
| 847 | { |
| 848 | int uuc_uah_iavg; |
| 849 | int i; |
| 850 | int uuc_iavg_ma = params->iavg_ua / 1000; |
| 851 | int pc_unusable; |
| 852 | |
| 853 | /* |
| 854 | * if called first time, fill all the samples with |
| 855 | * the shutdown_iavg_ma |
| 856 | */ |
| 857 | if (chip->first_time_calc_uuc && chip->shutdown_iavg_ma != 0) { |
| 858 | pr_debug("Using shutdown_iavg_ma = %d in all samples\n", |
| 859 | chip->shutdown_iavg_ma); |
| 860 | for (i = 0; i < IAVG_SAMPLES; i++) |
| 861 | chip->iavg_samples_ma[i] = chip->shutdown_iavg_ma; |
| 862 | |
| 863 | chip->iavg_index = 0; |
| 864 | chip->iavg_num_samples = IAVG_SAMPLES; |
| 865 | } |
| 866 | |
| 867 | /* |
| 868 | * if charging use a nominal avg current to keep |
| 869 | * a reasonable UUC while charging |
| 870 | */ |
| 871 | if (uuc_iavg_ma < 0) |
| 872 | uuc_iavg_ma = CHARGING_IAVG_MA; |
| 873 | chip->iavg_samples_ma[chip->iavg_index] = uuc_iavg_ma; |
| 874 | chip->iavg_index = (chip->iavg_index + 1) % IAVG_SAMPLES; |
| 875 | chip->iavg_num_samples++; |
| 876 | if (chip->iavg_num_samples >= IAVG_SAMPLES) |
| 877 | chip->iavg_num_samples = IAVG_SAMPLES; |
| 878 | |
| 879 | /* now that this sample is added calcualte the average */ |
| 880 | uuc_iavg_ma = 0; |
| 881 | if (chip->iavg_num_samples != 0) { |
| 882 | for (i = 0; i < chip->iavg_num_samples; i++) { |
| 883 | pr_debug("iavg_samples_ma[%d] = %d\n", i, |
| 884 | chip->iavg_samples_ma[i]); |
| 885 | uuc_iavg_ma += chip->iavg_samples_ma[i]; |
| 886 | } |
| 887 | |
| 888 | uuc_iavg_ma = DIV_ROUND_CLOSEST(uuc_iavg_ma, |
| 889 | chip->iavg_num_samples); |
| 890 | } |
| 891 | |
| 892 | uuc_uah_iavg = calculate_termination_uuc(chip, params, uuc_iavg_ma, |
| 893 | batt_temp, &pc_unusable); |
| 894 | pr_debug("uuc_iavg_ma = %d uuc with iavg = %d\n", |
| 895 | uuc_iavg_ma, uuc_uah_iavg); |
| 896 | |
| 897 | chip->prev_uuc_iavg_ma = uuc_iavg_ma; |
| 898 | /* restrict the uuc such that it can increase only by one percent */ |
| 899 | uuc_uah_iavg = adjust_uuc(chip, params, pc_unusable, |
| 900 | uuc_uah_iavg, batt_temp); |
| 901 | |
| 902 | chip->first_time_calc_uuc = 0; |
| 903 | return uuc_uah_iavg; |
| 904 | } |
| 905 | |
| 906 | static void find_ocv_for_soc(struct qpnp_bms_chip *chip, |
| 907 | struct soc_params *params, |
| 908 | int batt_temp, |
| 909 | int shutdown_soc, |
| 910 | int *ret_ocv_uv) |
| 911 | { |
| 912 | s64 ocv_charge_uah; |
| 913 | int pc, new_pc; |
| 914 | int batt_temp_degc = batt_temp / 10; |
| 915 | int ocv_uv; |
| 916 | |
| 917 | ocv_charge_uah = (s64)shutdown_soc |
| 918 | * (params->fcc_uah - params->uuc_uah); |
| 919 | ocv_charge_uah = div_s64(ocv_charge_uah, 100) |
| 920 | + params->cc_uah + params->uuc_uah; |
| 921 | pc = DIV_ROUND_CLOSEST((int)ocv_charge_uah * 100, params->fcc_uah); |
| 922 | pc = clamp(pc, 0, 100); |
| 923 | |
| 924 | ocv_uv = interpolate_ocv(chip->pc_temp_ocv_lut, batt_temp_degc, pc); |
| 925 | |
| 926 | pr_debug("s_soc = %d, fcc = %d uuc = %d rc = %d, pc = %d, ocv mv = %d\n", |
| 927 | shutdown_soc, params->fcc_uah, |
| 928 | params->uuc_uah, (int)ocv_charge_uah, |
| 929 | pc, ocv_uv); |
| 930 | new_pc = interpolate_pc(chip->pc_temp_ocv_lut, batt_temp_degc, ocv_uv); |
| 931 | pr_debug("test revlookup pc = %d for ocv = %d\n", new_pc, ocv_uv); |
| 932 | |
| 933 | while (abs(new_pc - pc) > 1) { |
| 934 | int delta_mv = 5; |
| 935 | |
| 936 | if (new_pc > pc) |
| 937 | delta_mv = -1 * delta_mv; |
| 938 | |
| 939 | ocv_uv = ocv_uv + delta_mv; |
| 940 | new_pc = interpolate_pc(chip->pc_temp_ocv_lut, |
| 941 | batt_temp_degc, ocv_uv); |
| 942 | pr_debug("test revlookup pc = %d for ocv = %d\n", |
| 943 | new_pc, ocv_uv); |
| 944 | } |
| 945 | |
| 946 | *ret_ocv_uv = ocv_uv * 1000; |
| 947 | params->ocv_charge_uah = (int)ocv_charge_uah; |
| 948 | } |
| 949 | |
| 950 | static void calculate_soc_params(struct qpnp_bms_chip *chip, |
| 951 | struct raw_soc_params *raw, |
| 952 | struct soc_params *params, |
| 953 | int batt_temp) |
| 954 | { |
| 955 | int soc_rbatt; |
| 956 | |
| 957 | params->fcc_uah = calculate_fcc(chip, batt_temp); |
| 958 | pr_debug("FCC = %uuAh batt_temp = %d\n", params->fcc_uah, batt_temp); |
| 959 | |
| 960 | /* calculate remainging charge */ |
| 961 | params->ocv_charge_uah = calculate_ocv_charge( |
| 962 | chip, raw, |
| 963 | params->fcc_uah, |
| 964 | batt_temp); |
| 965 | pr_debug("ocv_charge_uah = %uuAh\n", params->ocv_charge_uah); |
| 966 | |
| 967 | /* calculate cc micro_volt_hour */ |
| 968 | params->cc_uah = calculate_cc(chip, raw->cc); |
| 969 | pr_debug("cc_uah = %duAh raw->cc = %llx cc = %lld after subtracting %llx\n", |
| 970 | params->cc_uah, raw->cc, |
| 971 | (int64_t)raw->cc - chip->cc_reading_at_100, |
| 972 | chip->cc_reading_at_100); |
| 973 | |
| 974 | soc_rbatt = ((params->ocv_charge_uah - params->cc_uah) * 100) |
| 975 | / params->fcc_uah; |
| 976 | if (soc_rbatt < 0) |
| 977 | soc_rbatt = 0; |
| 978 | params->rbatt = get_rbatt(chip, soc_rbatt, batt_temp); |
| 979 | |
| 980 | calculate_iavg(chip, params->cc_uah, ¶ms->iavg_ua); |
| 981 | |
| 982 | params->uuc_uah = calculate_unusable_charge_uah(chip, params, |
| 983 | batt_temp); |
| 984 | pr_debug("UUC = %uuAh\n", params->uuc_uah); |
| 985 | } |
| 986 | |
| 987 | static bool is_shutdown_soc_within_limits(struct qpnp_bms_chip *chip, int soc) |
| 988 | { |
| 989 | if (chip->shutdown_soc_invalid) { |
| 990 | pr_debug("NOT forcing shutdown soc = %d\n", chip->shutdown_soc); |
| 991 | return 0; |
| 992 | } |
| 993 | |
| 994 | if (abs(chip->shutdown_soc - soc) > chip->shutdown_soc_valid_limit) { |
| 995 | pr_debug("rejecting shutdown soc = %d, soc = %d limit = %d\n", |
| 996 | chip->shutdown_soc, soc, |
| 997 | chip->shutdown_soc_valid_limit); |
| 998 | chip->shutdown_soc_invalid = 1; |
| 999 | return 0; |
| 1000 | } |
| 1001 | |
| 1002 | return 1; |
| 1003 | } |
| 1004 | |
Xiaozhe Shi | 7edde5d | 2012-09-26 11:23:09 -0700 | [diff] [blame] | 1005 | #define BMS_OVERRIDE_MODE_EN_BIT BIT(7) |
| 1006 | #define EN_VBAT_BIT BIT(0) |
| 1007 | #define OVERRIDE_MODE_DELAY_MS 20 |
| 1008 | static int override_mode_batt_v_and_i( |
| 1009 | struct qpnp_bms_chip *chip, int *ibat_ua, int *vbat_uv) |
| 1010 | { |
| 1011 | int16_t vsense_raw, vbat_raw; |
| 1012 | int vsense_uv, rc; |
| 1013 | u8 delay; |
| 1014 | |
| 1015 | mutex_lock(&chip->bms_output_lock); |
| 1016 | |
| 1017 | delay = 0x00; |
| 1018 | rc = qpnp_write_wrapper(chip, &delay, |
| 1019 | chip->base + BMS1_S1_DELAY_CTL, 1); |
| 1020 | if (rc) |
| 1021 | pr_err("unable to write into BMS1_S1_DELAY, rc: %d\n", rc); |
| 1022 | |
| 1023 | rc = qpnp_masked_write(chip, BMS1_MODE_CTL, |
| 1024 | BMS_OVERRIDE_MODE_EN_BIT | EN_VBAT_BIT, |
| 1025 | BMS_OVERRIDE_MODE_EN_BIT | EN_VBAT_BIT); |
| 1026 | if (rc) |
| 1027 | pr_err("unable to write into BMS1_MODE_CTL, rc: %d\n", rc); |
| 1028 | |
| 1029 | msleep(OVERRIDE_MODE_DELAY_MS); |
| 1030 | |
| 1031 | lock_output_data(chip); |
| 1032 | qpnp_read_wrapper(chip, (u8 *)&vsense_raw, |
| 1033 | chip->base + BMS1_VSENSE_AVG_DATA0, 2); |
| 1034 | qpnp_read_wrapper(chip, (u8 *)&vbat_raw, |
| 1035 | chip->base + BMS1_VBAT_AVG_DATA0, 2); |
| 1036 | unlock_output_data(chip); |
| 1037 | |
| 1038 | rc = qpnp_masked_write(chip, BMS1_MODE_CTL, |
| 1039 | BMS_OVERRIDE_MODE_EN_BIT | EN_VBAT_BIT, 0); |
| 1040 | |
| 1041 | delay = 0x0B; |
| 1042 | rc = qpnp_write_wrapper(chip, &delay, |
| 1043 | chip->base + BMS1_S1_DELAY_CTL, 1); |
| 1044 | if (rc) |
| 1045 | pr_err("unable to write into BMS1_S1_DELAY, rc: %d\n", rc); |
| 1046 | |
| 1047 | mutex_unlock(&chip->bms_output_lock); |
| 1048 | |
| 1049 | *vbat_uv = convert_vbatt_raw_to_uv(chip, vbat_raw); |
| 1050 | vsense_uv = convert_vsense_to_uv(chip, vsense_raw); |
| 1051 | *ibat_ua = vsense_uv * 1000 / (int)chip->r_sense_mohm; |
| 1052 | |
| 1053 | pr_debug("vsense_raw = 0x%x vbat_raw = 0x%x ibat_ua = %d vbat_uv = %d\n", |
| 1054 | (uint16_t)vsense_raw, (uint16_t)vbat_raw, |
| 1055 | *ibat_ua, *vbat_uv); |
| 1056 | return 0; |
| 1057 | } |
| 1058 | |
| 1059 | static int get_simultaneous_batt_v_and_i( |
| 1060 | struct qpnp_bms_chip *chip, |
| 1061 | int *ibat_ua, int *vbat_uv) |
| 1062 | { |
| 1063 | int rc; |
| 1064 | union power_supply_propval ret = {0,}; |
| 1065 | |
| 1066 | if (chip->batt_psy == NULL) |
| 1067 | chip->batt_psy = power_supply_get_by_name("battery"); |
| 1068 | if (chip->batt_psy) { |
| 1069 | /* if battery has been registered, use the status property */ |
| 1070 | chip->batt_psy->get_property(chip->batt_psy, |
| 1071 | POWER_SUPPLY_PROP_STATUS, &ret); |
| 1072 | } else { |
| 1073 | /* default to using separate vbat/ibat if unregistered */ |
| 1074 | ret.intval = POWER_SUPPLY_STATUS_FULL; |
| 1075 | } |
| 1076 | |
| 1077 | if (ret.intval == POWER_SUPPLY_STATUS_FULL) { |
| 1078 | pr_debug("batfet is open using separate vbat and ibat meas\n"); |
| 1079 | rc = get_battery_voltage(vbat_uv); |
| 1080 | if (rc < 0) { |
| 1081 | pr_err("adc vbat failed err = %d\n", rc); |
| 1082 | return rc; |
| 1083 | } |
| 1084 | rc = get_battery_current(chip, ibat_ua); |
| 1085 | if (rc < 0) { |
| 1086 | pr_err("bms ibat failed err = %d\n", rc); |
| 1087 | return rc; |
| 1088 | } |
| 1089 | } else { |
| 1090 | return override_mode_batt_v_and_i(chip, ibat_ua, vbat_uv); |
| 1091 | } |
| 1092 | |
| 1093 | return 0; |
| 1094 | } |
| 1095 | |
| 1096 | static int bound_soc(int soc) |
| 1097 | { |
| 1098 | soc = max(0, soc); |
| 1099 | soc = min(100, soc); |
| 1100 | return soc; |
| 1101 | } |
| 1102 | |
| 1103 | static int charging_adjustments(struct qpnp_bms_chip *chip, |
| 1104 | struct soc_params *params, int soc, |
| 1105 | int vbat_uv, int ibat_ua, int batt_temp) |
| 1106 | { |
Xiaozhe Shi | 41bc1f1 | 2012-09-26 16:55:22 -0700 | [diff] [blame] | 1107 | int chg_soc; |
| 1108 | |
| 1109 | if (chip->soc_at_cv == -EINVAL) { |
| 1110 | /* In constant current charging return the calc soc */ |
| 1111 | if (vbat_uv <= chip->max_voltage_uv) |
| 1112 | pr_debug("CC CHG SOC %d\n", soc); |
| 1113 | |
| 1114 | /* Note the CC to CV point */ |
| 1115 | if (vbat_uv >= chip->max_voltage_uv) { |
| 1116 | chip->soc_at_cv = soc; |
| 1117 | chip->prev_chg_soc = soc; |
| 1118 | chip->ibat_at_cv_ua = ibat_ua; |
| 1119 | pr_debug("CC_TO_CV ibat_ua = %d CHG SOC %d\n", |
| 1120 | ibat_ua, soc); |
| 1121 | } |
| 1122 | return soc; |
| 1123 | } |
| 1124 | |
| 1125 | /* |
| 1126 | * battery is in CV phase - begin liner inerpolation of soc based on |
| 1127 | * battery charge current |
| 1128 | */ |
| 1129 | |
| 1130 | /* |
| 1131 | * if voltage lessened (possibly because of a system load) |
| 1132 | * keep reporting the prev chg soc |
| 1133 | */ |
| 1134 | if (vbat_uv <= chip->max_voltage_uv) { |
| 1135 | pr_debug("vbat %d < max = %d CC CHG SOC %d\n", |
| 1136 | vbat_uv, chip->max_voltage_uv, chip->prev_chg_soc); |
| 1137 | return chip->prev_chg_soc; |
| 1138 | } |
| 1139 | |
| 1140 | chg_soc = linear_interpolate(chip->soc_at_cv, chip->ibat_at_cv_ua, |
| 1141 | 100, -100000, |
| 1142 | ibat_ua); |
| 1143 | |
| 1144 | /* always report a higher soc */ |
| 1145 | if (chg_soc > chip->prev_chg_soc) { |
| 1146 | int new_ocv_uv; |
| 1147 | |
| 1148 | chip->prev_chg_soc = chg_soc; |
| 1149 | |
| 1150 | find_ocv_for_soc(chip, params, batt_temp, chg_soc, &new_ocv_uv); |
| 1151 | chip->last_ocv_uv = new_ocv_uv; |
| 1152 | pr_debug("CC CHG ADJ OCV = %d CHG SOC %d\n", |
| 1153 | new_ocv_uv, |
| 1154 | chip->prev_chg_soc); |
| 1155 | } |
| 1156 | |
| 1157 | pr_debug("Reporting CHG SOC %d\n", chip->prev_chg_soc); |
| 1158 | return chip->prev_chg_soc; |
Xiaozhe Shi | 7edde5d | 2012-09-26 11:23:09 -0700 | [diff] [blame] | 1159 | } |
| 1160 | |
Xiaozhe Shi | e118c69 | 2012-09-24 15:17:43 -0700 | [diff] [blame] | 1161 | static int adjust_soc(struct qpnp_bms_chip *chip, struct soc_params *params, |
| 1162 | int soc, int batt_temp) |
| 1163 | { |
Xiaozhe Shi | 7edde5d | 2012-09-26 11:23:09 -0700 | [diff] [blame] | 1164 | int ibat_ua = 0, vbat_uv = 0; |
| 1165 | int ocv_est_uv = 0, soc_est = 0, pc_est = 0, pc = 0; |
| 1166 | int delta_ocv_uv = 0; |
| 1167 | int n = 0; |
| 1168 | int rc_new_uah = 0; |
| 1169 | int pc_new = 0; |
| 1170 | int soc_new = 0; |
| 1171 | int slope = 0; |
| 1172 | int rc = 0; |
| 1173 | int delta_ocv_uv_limit = 0; |
| 1174 | |
| 1175 | rc = get_simultaneous_batt_v_and_i(chip, &ibat_ua, &vbat_uv); |
| 1176 | if (rc < 0) { |
| 1177 | pr_err("simultaneous vbat ibat failed err = %d\n", rc); |
| 1178 | goto out; |
| 1179 | } |
| 1180 | |
| 1181 | delta_ocv_uv_limit = DIV_ROUND_CLOSEST(ibat_ua, 1000); |
| 1182 | |
| 1183 | ocv_est_uv = vbat_uv + (ibat_ua * params->rbatt)/1000; |
| 1184 | pc_est = calculate_pc(chip, ocv_est_uv, batt_temp); |
| 1185 | soc_est = div_s64((s64)params->fcc_uah * pc_est - params->uuc_uah*100, |
| 1186 | (s64)params->fcc_uah - params->uuc_uah); |
| 1187 | soc_est = bound_soc(soc_est); |
| 1188 | |
| 1189 | if (ibat_ua < 0) { |
| 1190 | soc = charging_adjustments(chip, params, soc, vbat_uv, ibat_ua, |
| 1191 | batt_temp); |
| 1192 | goto out; |
| 1193 | } |
| 1194 | |
| 1195 | /* |
| 1196 | * do not adjust |
| 1197 | * if soc is same as what bms calculated |
| 1198 | * if soc_est is between 45 and 25, this is the flat portion of the |
| 1199 | * curve where soc_est is not so accurate. We generally don't want to |
| 1200 | * adjust when soc_est is inaccurate except for the cases when soc is |
| 1201 | * way far off (higher than 50 or lesser than 20). |
| 1202 | * Also don't adjust soc if it is above 90 becuase it might be pulled |
| 1203 | * low and cause a bad user experience |
| 1204 | */ |
| 1205 | if (soc_est == soc |
| 1206 | || (is_between(45, chip->adjust_soc_low_threshold, soc_est) |
| 1207 | && is_between(50, chip->adjust_soc_low_threshold - 5, soc)) |
| 1208 | || soc >= 90) |
| 1209 | goto out; |
| 1210 | |
| 1211 | if (chip->last_soc_est == -EINVAL) |
| 1212 | chip->last_soc_est = soc; |
| 1213 | |
| 1214 | n = min(200, max(1 , soc + soc_est + chip->last_soc_est)); |
| 1215 | chip->last_soc_est = soc_est; |
| 1216 | |
| 1217 | pc = calculate_pc(chip, chip->last_ocv_uv, batt_temp); |
| 1218 | if (pc > 0) { |
| 1219 | pc_new = calculate_pc(chip, |
| 1220 | chip->last_ocv_uv - (++slope * 1000), |
| 1221 | batt_temp); |
| 1222 | while (pc_new == pc) { |
| 1223 | /* start taking 10mV steps */ |
| 1224 | slope = slope + 10; |
| 1225 | pc_new = calculate_pc(chip, |
| 1226 | chip->last_ocv_uv - (slope * 1000), |
| 1227 | batt_temp); |
| 1228 | } |
| 1229 | } else { |
| 1230 | /* |
| 1231 | * pc is already at the lowest point, |
| 1232 | * assume 1 millivolt translates to 1% pc |
| 1233 | */ |
| 1234 | pc = 1; |
| 1235 | pc_new = 0; |
| 1236 | slope = 1; |
| 1237 | } |
| 1238 | |
| 1239 | delta_ocv_uv = div_s64((soc - soc_est) * (s64)slope * 1000, |
| 1240 | n * (pc - pc_new)); |
| 1241 | |
| 1242 | if (abs(delta_ocv_uv) > delta_ocv_uv_limit) { |
| 1243 | pr_debug("limiting delta ocv %d limit = %d\n", delta_ocv_uv, |
| 1244 | delta_ocv_uv_limit); |
| 1245 | |
| 1246 | if (delta_ocv_uv > 0) |
| 1247 | delta_ocv_uv = delta_ocv_uv_limit; |
| 1248 | else |
| 1249 | delta_ocv_uv = -1 * delta_ocv_uv_limit; |
| 1250 | pr_debug("new delta ocv = %d\n", delta_ocv_uv); |
| 1251 | } |
| 1252 | |
| 1253 | chip->last_ocv_uv -= delta_ocv_uv; |
| 1254 | |
| 1255 | if (chip->last_ocv_uv >= chip->max_voltage_uv) |
| 1256 | chip->last_ocv_uv = chip->max_voltage_uv; |
| 1257 | |
| 1258 | /* calculate the soc based on this new ocv */ |
| 1259 | pc_new = calculate_pc(chip, chip->last_ocv_uv, batt_temp); |
| 1260 | rc_new_uah = (params->fcc_uah * pc_new) / 100; |
| 1261 | soc_new = (rc_new_uah - params->cc_uah - params->uuc_uah)*100 |
| 1262 | / (params->fcc_uah - params->uuc_uah); |
| 1263 | soc_new = bound_soc(soc_new); |
| 1264 | |
| 1265 | /* |
| 1266 | * if soc_new is ZERO force it higher so that phone doesnt report soc=0 |
| 1267 | * soc = 0 should happen only when soc_est == 0 |
| 1268 | */ |
| 1269 | if (soc_new == 0 && soc_est != 0) |
| 1270 | soc_new = 1; |
| 1271 | |
| 1272 | soc = soc_new; |
| 1273 | |
| 1274 | out: |
| 1275 | pr_debug("ibat_ua = %d, vbat_uv = %d, ocv_est_uv = %d, pc_est = %d, soc_est = %d, n = %d, delta_ocv_uv = %d, last_ocv_uv = %d, pc_new = %d, soc_new = %d, rbatt = %d, slope = %d\n", |
| 1276 | ibat_ua, vbat_uv, ocv_est_uv, pc_est, |
| 1277 | soc_est, n, delta_ocv_uv, chip->last_ocv_uv, |
| 1278 | pc_new, soc_new, params->rbatt, slope); |
| 1279 | |
Xiaozhe Shi | e118c69 | 2012-09-24 15:17:43 -0700 | [diff] [blame] | 1280 | return soc; |
| 1281 | } |
| 1282 | |
Xiaozhe Shi | cd7e530 | 2012-10-17 12:29:53 -0700 | [diff] [blame] | 1283 | static int calculate_state_of_charge(struct qpnp_bms_chip *chip, |
| 1284 | struct raw_soc_params *raw, |
| 1285 | int batt_temp) |
| 1286 | { |
Xiaozhe Shi | e118c69 | 2012-09-24 15:17:43 -0700 | [diff] [blame] | 1287 | int soc, new_ocv_uv; |
| 1288 | int shutdown_soc, new_calculated_soc, remaining_usable_charge_uah; |
| 1289 | struct soc_params params; |
| 1290 | |
| 1291 | calculate_soc_params(chip, raw, ¶ms, batt_temp); |
| 1292 | /* calculate remaining usable charge */ |
| 1293 | remaining_usable_charge_uah = params.ocv_charge_uah |
| 1294 | - params.cc_uah |
| 1295 | - params.uuc_uah; |
| 1296 | |
| 1297 | pr_debug("RUC = %duAh\n", remaining_usable_charge_uah); |
| 1298 | if (params.fcc_uah - params.uuc_uah <= 0) { |
| 1299 | pr_warn("FCC = %duAh, UUC = %duAh forcing soc = 0\n", |
| 1300 | params.fcc_uah, |
| 1301 | params.uuc_uah); |
| 1302 | soc = 0; |
| 1303 | } else { |
| 1304 | soc = DIV_ROUND_CLOSEST((remaining_usable_charge_uah * 100), |
| 1305 | (params.fcc_uah |
| 1306 | - params.uuc_uah)); |
| 1307 | } |
| 1308 | |
| 1309 | if (chip->first_time_calc_soc && soc < 0) { |
| 1310 | /* |
| 1311 | * first time calcualtion and the pon ocv is too low resulting |
| 1312 | * in a bad soc. Adjust ocv to get 0 soc |
| 1313 | */ |
| 1314 | pr_debug("soc is %d, adjusting pon ocv to make it 0\n", soc); |
| 1315 | find_ocv_for_soc(chip, ¶ms, batt_temp, 0, &new_ocv_uv); |
| 1316 | chip->last_ocv_uv = new_ocv_uv; |
| 1317 | |
| 1318 | remaining_usable_charge_uah = params.ocv_charge_uah |
| 1319 | - params.cc_uah |
| 1320 | - params.uuc_uah; |
| 1321 | |
| 1322 | soc = DIV_ROUND_CLOSEST((remaining_usable_charge_uah * 100), |
| 1323 | (params.fcc_uah |
| 1324 | - params.uuc_uah)); |
| 1325 | pr_debug("DONE for O soc is %d, pon ocv adjusted to %duV\n", |
| 1326 | soc, chip->last_ocv_uv); |
| 1327 | } |
| 1328 | |
| 1329 | if (soc > 100) |
| 1330 | soc = 100; |
| 1331 | |
| 1332 | if (soc < 0) { |
| 1333 | pr_err("bad rem_usb_chg = %d rem_chg %d, cc_uah %d, unusb_chg %d\n", |
| 1334 | remaining_usable_charge_uah, |
| 1335 | params.ocv_charge_uah, |
| 1336 | params.cc_uah, params.uuc_uah); |
| 1337 | |
| 1338 | pr_err("for bad rem_usb_chg last_ocv_uv = %d batt_temp = %d fcc = %d soc =%d\n", |
| 1339 | chip->last_ocv_uv, batt_temp, |
| 1340 | params.fcc_uah, soc); |
| 1341 | soc = 0; |
| 1342 | } |
| 1343 | |
| 1344 | mutex_lock(&chip->soc_invalidation_mutex); |
| 1345 | shutdown_soc = chip->shutdown_soc; |
| 1346 | |
| 1347 | if (chip->first_time_calc_soc && soc != shutdown_soc |
| 1348 | && is_shutdown_soc_within_limits(chip, soc)) { |
| 1349 | /* |
| 1350 | * soc for the first time - use shutdown soc |
| 1351 | * to adjust pon ocv since it is a small percent away from |
| 1352 | * the real soc |
| 1353 | */ |
| 1354 | pr_debug("soc = %d before forcing shutdown_soc = %d\n", |
| 1355 | soc, shutdown_soc); |
| 1356 | find_ocv_for_soc(chip, ¶ms, batt_temp, |
| 1357 | shutdown_soc, &new_ocv_uv); |
| 1358 | chip->pon_ocv_uv = chip->last_ocv_uv; |
| 1359 | chip->last_ocv_uv = new_ocv_uv; |
| 1360 | |
| 1361 | remaining_usable_charge_uah = params.ocv_charge_uah |
| 1362 | - params.cc_uah |
| 1363 | - params.uuc_uah; |
| 1364 | |
| 1365 | soc = DIV_ROUND_CLOSEST((remaining_usable_charge_uah * 100), |
| 1366 | (params.fcc_uah |
| 1367 | - params.uuc_uah)); |
| 1368 | |
| 1369 | pr_debug("DONE for shutdown_soc = %d soc is %d, adjusted ocv to %duV\n", |
| 1370 | shutdown_soc, soc, chip->last_ocv_uv); |
| 1371 | } |
| 1372 | mutex_unlock(&chip->soc_invalidation_mutex); |
| 1373 | |
| 1374 | pr_debug("SOC before adjustment = %d\n", soc); |
| 1375 | new_calculated_soc = adjust_soc(chip, ¶ms, soc, batt_temp); |
| 1376 | |
| 1377 | if (new_calculated_soc != chip->calculated_soc |
| 1378 | && chip->bms_psy.name != NULL) { |
| 1379 | power_supply_changed(&chip->bms_psy); |
| 1380 | pr_debug("power supply changed\n"); |
| 1381 | } |
| 1382 | |
| 1383 | chip->calculated_soc = new_calculated_soc; |
| 1384 | pr_debug("Set calculated SOC = %d\n", chip->calculated_soc); |
| 1385 | chip->first_time_calc_soc = 0; |
Xiaozhe Shi | cd7e530 | 2012-10-17 12:29:53 -0700 | [diff] [blame] | 1386 | return chip->calculated_soc; |
| 1387 | } |
| 1388 | |
Xiaozhe Shi | 781b0a2 | 2012-11-05 17:18:27 -0800 | [diff] [blame] | 1389 | static void read_vbat(struct qpnp_bms_chip *chip) |
| 1390 | { |
| 1391 | int rc; |
| 1392 | struct qpnp_vadc_result result; |
| 1393 | |
| 1394 | rc = qpnp_vadc_read(VBAT_SNS, &result); |
| 1395 | if (rc) { |
| 1396 | pr_err("error reading vadc VBAT_SNS = %d, rc = %d\n", |
| 1397 | VBAT_SNS, rc); |
| 1398 | return; |
| 1399 | } |
| 1400 | chip->last_vbat_read_uv = (int)result.physical; |
| 1401 | } |
| 1402 | |
Xiaozhe Shi | cd7e530 | 2012-10-17 12:29:53 -0700 | [diff] [blame] | 1403 | static void calculate_soc_work(struct work_struct *work) |
| 1404 | { |
| 1405 | struct qpnp_bms_chip *chip = container_of(work, |
| 1406 | struct qpnp_bms_chip, |
| 1407 | calculate_soc_delayed_work.work); |
| 1408 | int batt_temp, rc, soc; |
| 1409 | struct qpnp_vadc_result result; |
| 1410 | struct raw_soc_params raw; |
| 1411 | |
Xiaozhe Shi | 781b0a2 | 2012-11-05 17:18:27 -0800 | [diff] [blame] | 1412 | read_vbat(chip); |
| 1413 | |
Xiaozhe Shi | cd7e530 | 2012-10-17 12:29:53 -0700 | [diff] [blame] | 1414 | rc = qpnp_vadc_read(LR_MUX1_BATT_THERM, &result); |
| 1415 | if (rc) { |
| 1416 | pr_err("error reading vadc LR_MUX1_BATT_THERM = %d, rc = %d\n", |
| 1417 | LR_MUX1_BATT_THERM, rc); |
| 1418 | return; |
| 1419 | } |
| 1420 | pr_debug("batt_temp phy = %lld meas = 0x%llx\n", result.physical, |
| 1421 | result.measurement); |
| 1422 | batt_temp = (int)result.physical; |
| 1423 | |
| 1424 | mutex_lock(&chip->last_ocv_uv_mutex); |
| 1425 | read_soc_params_raw(chip, &raw); |
| 1426 | soc = calculate_state_of_charge(chip, &raw, batt_temp); |
| 1427 | mutex_unlock(&chip->last_ocv_uv_mutex); |
| 1428 | |
| 1429 | if (soc < chip->low_soc_calc_threshold) |
| 1430 | schedule_delayed_work(&chip->calculate_soc_delayed_work, |
| 1431 | round_jiffies_relative(msecs_to_jiffies |
| 1432 | (chip->low_soc_calculate_soc_ms))); |
| 1433 | else |
| 1434 | schedule_delayed_work(&chip->calculate_soc_delayed_work, |
| 1435 | round_jiffies_relative(msecs_to_jiffies |
| 1436 | (chip->calculate_soc_ms))); |
| 1437 | } |
| 1438 | |
Xiaozhe Shi | e118c69 | 2012-09-24 15:17:43 -0700 | [diff] [blame] | 1439 | static void backup_soc_and_iavg(struct qpnp_bms_chip *chip, int batt_temp, |
| 1440 | int soc) |
| 1441 | { |
| 1442 | u8 temp; |
| 1443 | int rc; |
| 1444 | int iavg_ma = chip->prev_uuc_iavg_ma; |
| 1445 | |
| 1446 | if (iavg_ma > IAVG_START) |
| 1447 | temp = (iavg_ma - IAVG_START) / IAVG_STEP_SIZE_MA; |
| 1448 | else |
| 1449 | temp = 0; |
| 1450 | |
| 1451 | rc = qpnp_write_wrapper(chip, &temp, |
| 1452 | chip->base + IAVG_STORAGE_REG, 1); |
| 1453 | |
| 1454 | if (soc == 0) |
| 1455 | temp = SOC_ZERO; |
| 1456 | else |
| 1457 | temp = soc; |
| 1458 | |
| 1459 | /* don't store soc if temperature is below 5degC */ |
| 1460 | if (batt_temp > IGNORE_SOC_TEMP_DECIDEG) |
| 1461 | rc = qpnp_write_wrapper(chip, &temp, |
| 1462 | chip->base + SOC_STORAGE_REG, 1); |
| 1463 | } |
| 1464 | |
| 1465 | #define SOC_CATCHUP_SEC_MAX 600 |
| 1466 | #define SOC_CATCHUP_SEC_PER_PERCENT 60 |
| 1467 | #define MAX_CATCHUP_SOC (SOC_CATCHUP_SEC_MAX/SOC_CATCHUP_SEC_PER_PERCENT) |
| 1468 | static int scale_soc_while_chg(struct qpnp_bms_chip *chip, |
| 1469 | int delta_time_us, int new_soc, int prev_soc) |
| 1470 | { |
| 1471 | int chg_time_sec; |
| 1472 | int catch_up_sec; |
| 1473 | int scaled_soc; |
| 1474 | int numerator; |
| 1475 | |
| 1476 | /* |
| 1477 | * The device must be charging for reporting a higher soc, if |
| 1478 | * not ignore this soc and continue reporting the prev_soc. |
| 1479 | * Also don't report a high value immediately slowly scale the |
| 1480 | * value from prev_soc to the new soc based on a charge time |
| 1481 | * weighted average |
| 1482 | */ |
| 1483 | |
| 1484 | /* if not charging, return last soc */ |
| 1485 | if (chip->start_percent == -EINVAL) |
| 1486 | return prev_soc; |
| 1487 | |
| 1488 | chg_time_sec = DIV_ROUND_UP(chip->charge_time_us, USEC_PER_SEC); |
| 1489 | catch_up_sec = DIV_ROUND_UP(chip->catch_up_time_us, USEC_PER_SEC); |
| 1490 | pr_debug("cts= %d catch_up_sec = %d\n", chg_time_sec, catch_up_sec); |
| 1491 | |
| 1492 | /* |
| 1493 | * if charging for more than catch_up time, simply return |
| 1494 | * new soc |
| 1495 | */ |
| 1496 | if (chg_time_sec > catch_up_sec) |
| 1497 | return new_soc; |
| 1498 | |
| 1499 | numerator = (catch_up_sec - chg_time_sec) * prev_soc |
| 1500 | + chg_time_sec * new_soc; |
| 1501 | scaled_soc = numerator / catch_up_sec; |
| 1502 | |
| 1503 | pr_debug("cts = %d new_soc = %d prev_soc = %d scaled_soc = %d\n", |
| 1504 | chg_time_sec, new_soc, prev_soc, scaled_soc); |
| 1505 | |
| 1506 | return scaled_soc; |
| 1507 | } |
| 1508 | |
| 1509 | /* |
| 1510 | * bms_fake_battery is set in setups where a battery emulator is used instead |
| 1511 | * of a real battery. This makes the bms driver report a different/fake value |
| 1512 | * regardless of the calculated state of charge. |
| 1513 | */ |
| 1514 | static int bms_fake_battery = -EINVAL; |
| 1515 | module_param(bms_fake_battery, int, 0644); |
| 1516 | |
| 1517 | static int report_state_of_charge(struct qpnp_bms_chip *chip) |
| 1518 | { |
| 1519 | int soc; |
| 1520 | int delta_time_us; |
| 1521 | struct timespec now; |
| 1522 | struct qpnp_vadc_result result; |
| 1523 | int batt_temp; |
| 1524 | int rc; |
| 1525 | |
| 1526 | if (bms_fake_battery != -EINVAL) { |
| 1527 | pr_debug("Returning Fake SOC = %d%%\n", bms_fake_battery); |
| 1528 | return bms_fake_battery; |
| 1529 | } |
| 1530 | |
| 1531 | soc = chip->calculated_soc; |
| 1532 | |
| 1533 | rc = qpnp_vadc_read(LR_MUX1_BATT_THERM, &result); |
| 1534 | |
| 1535 | if (rc) { |
| 1536 | pr_err("error reading adc channel = %d, rc = %d\n", |
| 1537 | LR_MUX1_BATT_THERM, rc); |
| 1538 | return rc; |
| 1539 | } |
| 1540 | pr_debug("batt_temp phy = %lld meas = 0x%llx\n", result.physical, |
| 1541 | result.measurement); |
| 1542 | batt_temp = (int)result.physical; |
| 1543 | |
| 1544 | do_posix_clock_monotonic_gettime(&now); |
| 1545 | if (chip->t_soc_queried.tv_sec != 0) { |
| 1546 | delta_time_us |
| 1547 | = (now.tv_sec - chip->t_soc_queried.tv_sec) * USEC_PER_SEC |
| 1548 | + (now.tv_nsec - chip->t_soc_queried.tv_nsec) / 1000; |
| 1549 | } else { |
| 1550 | /* calculation for the first time */ |
| 1551 | delta_time_us = 0; |
| 1552 | } |
| 1553 | |
| 1554 | /* |
| 1555 | * account for charge time - limit it to SOC_CATCHUP_SEC to |
| 1556 | * avoid overflows when charging continues for extended periods |
| 1557 | */ |
| 1558 | if (chip->start_percent != -EINVAL) { |
| 1559 | if (chip->charge_time_us == 0) { |
| 1560 | /* |
| 1561 | * calculating soc for the first time |
| 1562 | * after start of chg. Initialize catchup time |
| 1563 | */ |
| 1564 | if (abs(soc - chip->last_soc) < MAX_CATCHUP_SOC) |
| 1565 | chip->catch_up_time_us = |
| 1566 | (soc - chip->last_soc) |
| 1567 | * SOC_CATCHUP_SEC_PER_PERCENT |
| 1568 | * USEC_PER_SEC; |
| 1569 | else |
| 1570 | chip->catch_up_time_us = |
| 1571 | SOC_CATCHUP_SEC_MAX * USEC_PER_SEC; |
| 1572 | |
| 1573 | if (chip->catch_up_time_us < 0) |
| 1574 | chip->catch_up_time_us = 0; |
| 1575 | } |
| 1576 | |
| 1577 | /* add charge time */ |
| 1578 | if (chip->charge_time_us < SOC_CATCHUP_SEC_MAX * USEC_PER_SEC) |
| 1579 | chip->charge_time_us += delta_time_us; |
| 1580 | |
| 1581 | /* end catchup if calculated soc and last soc are same */ |
| 1582 | if (chip->last_soc == soc) |
| 1583 | chip->catch_up_time_us = 0; |
| 1584 | } |
| 1585 | |
| 1586 | /* last_soc < soc ... scale and catch up */ |
| 1587 | if (chip->last_soc != -EINVAL && chip->last_soc < soc && soc != 100) |
| 1588 | soc = scale_soc_while_chg(chip, delta_time_us, |
| 1589 | soc, chip->last_soc); |
| 1590 | |
| 1591 | pr_debug("last_soc = %d, calculated_soc = %d, soc = %d\n", |
| 1592 | chip->last_soc, chip->calculated_soc, soc); |
| 1593 | chip->last_soc = soc; |
| 1594 | backup_soc_and_iavg(chip, batt_temp, chip->last_soc); |
| 1595 | pr_debug("Reported SOC = %d\n", chip->last_soc); |
| 1596 | chip->t_soc_queried = now; |
| 1597 | |
| 1598 | return chip->last_soc; |
| 1599 | } |
| 1600 | |
Xiaozhe Shi | 781b0a2 | 2012-11-05 17:18:27 -0800 | [diff] [blame] | 1601 | static int calculate_soc_from_voltage(struct qpnp_bms_chip *chip) |
| 1602 | { |
| 1603 | int voltage_range_uv, voltage_remaining_uv, voltage_based_soc; |
| 1604 | |
| 1605 | if (chip->last_vbat_read_uv < 0) |
| 1606 | read_vbat(chip); |
| 1607 | |
| 1608 | voltage_range_uv = chip->max_voltage_uv - chip->v_cutoff_uv; |
| 1609 | voltage_remaining_uv = chip->last_vbat_read_uv - chip->v_cutoff_uv; |
| 1610 | voltage_based_soc = voltage_remaining_uv * 100 / voltage_range_uv; |
| 1611 | |
| 1612 | return clamp(voltage_based_soc, 0, 100); |
| 1613 | } |
| 1614 | |
Xiaozhe Shi | b19f703 | 2012-08-16 12:14:16 -0700 | [diff] [blame] | 1615 | /* Returns capacity as a SoC percentage between 0 and 100 */ |
| 1616 | static int get_prop_bms_capacity(struct qpnp_bms_chip *chip) |
| 1617 | { |
Xiaozhe Shi | 781b0a2 | 2012-11-05 17:18:27 -0800 | [diff] [blame] | 1618 | if (use_voltage_soc) |
| 1619 | return calculate_soc_from_voltage(chip); |
Xiaozhe Shi | e118c69 | 2012-09-24 15:17:43 -0700 | [diff] [blame] | 1620 | else |
| 1621 | return report_state_of_charge(chip); |
Xiaozhe Shi | b19f703 | 2012-08-16 12:14:16 -0700 | [diff] [blame] | 1622 | } |
| 1623 | |
| 1624 | /* Returns instantaneous current in uA */ |
| 1625 | static int get_prop_bms_current_now(struct qpnp_bms_chip *chip) |
| 1626 | { |
| 1627 | /* temporarily return 0 until a real algorithm is put in */ |
Xiaozhe Shi | cd7e530 | 2012-10-17 12:29:53 -0700 | [diff] [blame] | 1628 | int rc, result_ua; |
| 1629 | |
| 1630 | rc = get_battery_current(chip, &result_ua); |
| 1631 | if (rc) { |
| 1632 | pr_err("failed to get current: %d\n", rc); |
| 1633 | return rc; |
| 1634 | } |
| 1635 | return result_ua; |
Xiaozhe Shi | b19f703 | 2012-08-16 12:14:16 -0700 | [diff] [blame] | 1636 | } |
| 1637 | |
| 1638 | /* Returns full charge design in uAh */ |
| 1639 | static int get_prop_bms_charge_full_design(struct qpnp_bms_chip *chip) |
| 1640 | { |
Xiaozhe Shi | cd7e530 | 2012-10-17 12:29:53 -0700 | [diff] [blame] | 1641 | return chip->fcc; |
| 1642 | } |
| 1643 | |
| 1644 | static bool get_prop_bms_online(struct qpnp_bms_chip *chip) |
| 1645 | { |
| 1646 | return chip->online; |
| 1647 | } |
| 1648 | |
| 1649 | static int get_prop_bms_status(struct qpnp_bms_chip *chip) |
| 1650 | { |
| 1651 | return chip->charger_status; |
Xiaozhe Shi | b19f703 | 2012-08-16 12:14:16 -0700 | [diff] [blame] | 1652 | } |
| 1653 | |
| 1654 | static void set_prop_bms_online(struct qpnp_bms_chip *chip, bool online) |
| 1655 | { |
| 1656 | chip->online = online; |
| 1657 | } |
| 1658 | |
| 1659 | static void set_prop_bms_status(struct qpnp_bms_chip *chip, int status) |
| 1660 | { |
| 1661 | chip->charger_status = status; |
| 1662 | } |
| 1663 | |
| 1664 | static void qpnp_bms_external_power_changed(struct power_supply *psy) |
| 1665 | { |
| 1666 | } |
| 1667 | |
| 1668 | static int qpnp_bms_power_get_property(struct power_supply *psy, |
| 1669 | enum power_supply_property psp, |
| 1670 | union power_supply_propval *val) |
| 1671 | { |
| 1672 | struct qpnp_bms_chip *chip = container_of(psy, struct qpnp_bms_chip, |
| 1673 | bms_psy); |
| 1674 | |
| 1675 | switch (psp) { |
| 1676 | case POWER_SUPPLY_PROP_CAPACITY: |
| 1677 | val->intval = get_prop_bms_capacity(chip); |
| 1678 | break; |
| 1679 | case POWER_SUPPLY_PROP_CURRENT_NOW: |
| 1680 | val->intval = get_prop_bms_current_now(chip); |
| 1681 | break; |
| 1682 | case POWER_SUPPLY_PROP_CHARGE_FULL_DESIGN: |
| 1683 | val->intval = get_prop_bms_charge_full_design(chip); |
| 1684 | break; |
Xiaozhe Shi | cd7e530 | 2012-10-17 12:29:53 -0700 | [diff] [blame] | 1685 | case POWER_SUPPLY_PROP_STATUS: |
| 1686 | val->intval = get_prop_bms_status(chip); |
| 1687 | break; |
| 1688 | case POWER_SUPPLY_PROP_ONLINE: |
| 1689 | val->intval = get_prop_bms_online(chip); |
| 1690 | break; |
Xiaozhe Shi | b19f703 | 2012-08-16 12:14:16 -0700 | [diff] [blame] | 1691 | default: |
| 1692 | return -EINVAL; |
| 1693 | } |
| 1694 | return 0; |
| 1695 | } |
| 1696 | |
| 1697 | static int qpnp_bms_power_set_property(struct power_supply *psy, |
| 1698 | enum power_supply_property psp, |
| 1699 | const union power_supply_propval *val) |
| 1700 | { |
| 1701 | struct qpnp_bms_chip *chip = container_of(psy, struct qpnp_bms_chip, |
| 1702 | bms_psy); |
| 1703 | |
| 1704 | switch (psp) { |
| 1705 | case POWER_SUPPLY_PROP_ONLINE: |
| 1706 | set_prop_bms_online(chip, val->intval); |
| 1707 | break; |
| 1708 | case POWER_SUPPLY_PROP_STATUS: |
| 1709 | set_prop_bms_status(chip, (bool)val->intval); |
| 1710 | break; |
| 1711 | default: |
| 1712 | return -EINVAL; |
| 1713 | } |
| 1714 | return 0; |
| 1715 | } |
| 1716 | |
Xiaozhe Shi | cd7e530 | 2012-10-17 12:29:53 -0700 | [diff] [blame] | 1717 | static void read_shutdown_soc_and_iavg(struct qpnp_bms_chip *chip) |
| 1718 | { |
| 1719 | int rc; |
| 1720 | u8 temp; |
| 1721 | |
| 1722 | if (chip->ignore_shutdown_soc) { |
| 1723 | chip->shutdown_soc_invalid = 1; |
| 1724 | chip->shutdown_soc = 0; |
| 1725 | chip->shutdown_iavg_ma = 0; |
| 1726 | } else { |
| 1727 | rc = qpnp_read_wrapper(chip, &temp, |
| 1728 | chip->base + IAVG_STORAGE_REG, 1); |
| 1729 | if (rc) { |
| 1730 | pr_err("failed to read addr = %d %d assuming %d\n", |
| 1731 | chip->base + IAVG_STORAGE_REG, rc, |
| 1732 | IAVG_START); |
| 1733 | chip->shutdown_iavg_ma = IAVG_START; |
| 1734 | } else { |
| 1735 | if (temp == 0) { |
| 1736 | chip->shutdown_iavg_ma = IAVG_START; |
| 1737 | } else { |
| 1738 | chip->shutdown_iavg_ma = IAVG_START |
| 1739 | + IAVG_STEP_SIZE_MA * (temp + 1); |
| 1740 | } |
| 1741 | } |
| 1742 | |
| 1743 | rc = qpnp_read_wrapper(chip, &temp, |
| 1744 | chip->base + SOC_STORAGE_REG, 1); |
| 1745 | if (rc) { |
| 1746 | pr_err("failed to read addr = %d %d\n", |
| 1747 | chip->base + SOC_STORAGE_REG, rc); |
| 1748 | } else { |
| 1749 | chip->shutdown_soc = temp; |
| 1750 | |
| 1751 | if (chip->shutdown_soc == 0) { |
| 1752 | pr_debug("No shutdown soc available\n"); |
| 1753 | chip->shutdown_soc_invalid = 1; |
| 1754 | chip->shutdown_iavg_ma = 0; |
| 1755 | } else if (chip->shutdown_soc == SOC_ZERO) { |
| 1756 | chip->shutdown_soc = 0; |
| 1757 | } |
| 1758 | } |
| 1759 | } |
| 1760 | |
| 1761 | pr_debug("shutdown_soc = %d shutdown_iavg = %d shutdown_soc_invalid = %d\n", |
| 1762 | chip->shutdown_soc, |
| 1763 | chip->shutdown_iavg_ma, |
| 1764 | chip->shutdown_soc_invalid); |
| 1765 | } |
| 1766 | |
Xiaozhe Shi | 73a6569 | 2012-09-18 17:51:57 -0700 | [diff] [blame] | 1767 | #define PALLADIUM_ID_MIN 0x7F40 |
| 1768 | #define PALLADIUM_ID_MAX 0x7F5A |
| 1769 | #define DESAY_5200_ID_MIN 0x7F7F |
| 1770 | #define DESAY_5200_ID_MAX 0x802F |
Xiaozhe Shi | cd7e530 | 2012-10-17 12:29:53 -0700 | [diff] [blame] | 1771 | static int32_t read_battery_id(struct qpnp_bms_chip *chip) |
Xiaozhe Shi | 73a6569 | 2012-09-18 17:51:57 -0700 | [diff] [blame] | 1772 | { |
Xiaozhe Shi | cd7e530 | 2012-10-17 12:29:53 -0700 | [diff] [blame] | 1773 | int rc; |
| 1774 | struct qpnp_vadc_result result; |
| 1775 | |
| 1776 | rc = qpnp_vadc_read(LR_MUX2_BAT_ID, &result); |
| 1777 | if (rc) { |
| 1778 | pr_err("error reading batt id channel = %d, rc = %d\n", |
| 1779 | LR_MUX2_BAT_ID, rc); |
| 1780 | return rc; |
| 1781 | } |
| 1782 | pr_debug("batt_id phy = %lld meas = 0x%llx\n", result.physical, |
| 1783 | result.measurement); |
| 1784 | pr_debug("raw_code = 0x%x\n", result.adc_code); |
| 1785 | return result.adc_code; |
Xiaozhe Shi | 73a6569 | 2012-09-18 17:51:57 -0700 | [diff] [blame] | 1786 | } |
| 1787 | |
| 1788 | static int set_battery_data(struct qpnp_bms_chip *chip) |
| 1789 | { |
| 1790 | int64_t battery_id; |
| 1791 | |
| 1792 | if (chip->batt_type == BATT_DESAY) |
| 1793 | goto desay; |
| 1794 | else if (chip->batt_type == BATT_PALLADIUM) |
| 1795 | goto palladium; |
| 1796 | |
| 1797 | battery_id = read_battery_id(chip); |
| 1798 | if (battery_id < 0) { |
| 1799 | pr_err("cannot read battery id err = %lld\n", battery_id); |
| 1800 | return battery_id; |
| 1801 | } |
| 1802 | |
| 1803 | if (is_between(PALLADIUM_ID_MIN, PALLADIUM_ID_MAX, battery_id)) { |
| 1804 | goto palladium; |
| 1805 | } else if (is_between(DESAY_5200_ID_MIN, DESAY_5200_ID_MAX, |
| 1806 | battery_id)) { |
| 1807 | goto desay; |
| 1808 | } else { |
| 1809 | pr_warn("invalid battid, palladium 1500 assumed batt_id %llx\n", |
| 1810 | battery_id); |
| 1811 | goto palladium; |
| 1812 | } |
| 1813 | |
| 1814 | palladium: |
| 1815 | chip->fcc = palladium_1500_data.fcc; |
| 1816 | chip->fcc_temp_lut = palladium_1500_data.fcc_temp_lut; |
| 1817 | chip->fcc_sf_lut = palladium_1500_data.fcc_sf_lut; |
| 1818 | chip->pc_temp_ocv_lut = palladium_1500_data.pc_temp_ocv_lut; |
| 1819 | chip->pc_sf_lut = palladium_1500_data.pc_sf_lut; |
| 1820 | chip->rbatt_sf_lut = palladium_1500_data.rbatt_sf_lut; |
| 1821 | chip->default_rbatt_mohm |
| 1822 | = palladium_1500_data.default_rbatt_mohm; |
Xiaozhe Shi | cd7e530 | 2012-10-17 12:29:53 -0700 | [diff] [blame] | 1823 | goto check_lut; |
Xiaozhe Shi | 73a6569 | 2012-09-18 17:51:57 -0700 | [diff] [blame] | 1824 | desay: |
| 1825 | chip->fcc = desay_5200_data.fcc; |
| 1826 | chip->fcc_temp_lut = desay_5200_data.fcc_temp_lut; |
| 1827 | chip->pc_temp_ocv_lut = desay_5200_data.pc_temp_ocv_lut; |
| 1828 | chip->pc_sf_lut = desay_5200_data.pc_sf_lut; |
| 1829 | chip->rbatt_sf_lut = desay_5200_data.rbatt_sf_lut; |
| 1830 | chip->default_rbatt_mohm = desay_5200_data.default_rbatt_mohm; |
Xiaozhe Shi | cd7e530 | 2012-10-17 12:29:53 -0700 | [diff] [blame] | 1831 | goto check_lut; |
| 1832 | check_lut: |
| 1833 | if (chip->pc_temp_ocv_lut == NULL) { |
| 1834 | pr_err("temp ocv lut table is NULL\n"); |
| 1835 | return -EINVAL; |
| 1836 | } |
Xiaozhe Shi | 73a6569 | 2012-09-18 17:51:57 -0700 | [diff] [blame] | 1837 | return 0; |
| 1838 | } |
| 1839 | |
Xiaozhe Shi | cd7e530 | 2012-10-17 12:29:53 -0700 | [diff] [blame] | 1840 | #define SPMI_PROP_READ(chip_prop, qpnp_spmi_property, retval) \ |
Xiaozhe Shi | b19f703 | 2012-08-16 12:14:16 -0700 | [diff] [blame] | 1841 | do { \ |
Xiaozhe Shi | cd7e530 | 2012-10-17 12:29:53 -0700 | [diff] [blame] | 1842 | retval = of_property_read_u32(chip->spmi->dev.of_node, \ |
Xiaozhe Shi | b19f703 | 2012-08-16 12:14:16 -0700 | [diff] [blame] | 1843 | "qcom,bms-" qpnp_spmi_property, \ |
| 1844 | &chip->chip_prop); \ |
| 1845 | if (retval) { \ |
| 1846 | pr_err("Error reading " #qpnp_spmi_property \ |
| 1847 | " property %d\n", rc); \ |
Xiaozhe Shi | cd7e530 | 2012-10-17 12:29:53 -0700 | [diff] [blame] | 1848 | return -EINVAL; \ |
Xiaozhe Shi | b19f703 | 2012-08-16 12:14:16 -0700 | [diff] [blame] | 1849 | } \ |
| 1850 | } while (0) |
| 1851 | |
Xiaozhe Shi | cd7e530 | 2012-10-17 12:29:53 -0700 | [diff] [blame] | 1852 | static inline int bms_read_properties(struct qpnp_bms_chip *chip) |
| 1853 | { |
| 1854 | int rc; |
| 1855 | |
| 1856 | SPMI_PROP_READ(r_sense_mohm, "r-sense-mohm", rc); |
| 1857 | SPMI_PROP_READ(v_cutoff_uv, "v-cutoff-uv", rc); |
| 1858 | SPMI_PROP_READ(max_voltage_uv, "max-voltage-uv", rc); |
| 1859 | SPMI_PROP_READ(r_conn_mohm, "r-conn-mohm", rc); |
| 1860 | SPMI_PROP_READ(chg_term_ua, "chg-term-ua", rc); |
| 1861 | SPMI_PROP_READ(shutdown_soc_valid_limit, |
| 1862 | "shutdown-soc-valid-limit", rc); |
| 1863 | SPMI_PROP_READ(adjust_soc_high_threshold, |
| 1864 | "adjust-soc-high-threshold", rc); |
| 1865 | SPMI_PROP_READ(adjust_soc_low_threshold, |
| 1866 | "adjust-soc-low-threshold", rc); |
| 1867 | SPMI_PROP_READ(batt_type, "batt-type", rc); |
| 1868 | SPMI_PROP_READ(low_soc_calc_threshold, |
| 1869 | "low-soc-calculate-soc-threshold", rc); |
| 1870 | SPMI_PROP_READ(low_soc_calculate_soc_ms, |
| 1871 | "low-soc-calculate-soc-ms", rc); |
| 1872 | SPMI_PROP_READ(calculate_soc_ms, "calculate-soc-ms", rc); |
| 1873 | chip->ignore_shutdown_soc = of_property_read_bool( |
| 1874 | chip->spmi->dev.of_node, |
| 1875 | "qcom,bms-ignore-shutdown-soc"); |
Xiaozhe Shi | 781b0a2 | 2012-11-05 17:18:27 -0800 | [diff] [blame] | 1876 | use_voltage_soc = of_property_read_bool(chip->spmi->dev.of_node, |
| 1877 | "qcom,bms-use-voltage-soc"); |
Xiaozhe Shi | cd7e530 | 2012-10-17 12:29:53 -0700 | [diff] [blame] | 1878 | |
| 1879 | if (chip->adjust_soc_low_threshold >= 45) |
| 1880 | chip->adjust_soc_low_threshold = 45; |
| 1881 | |
| 1882 | pr_debug("dts data: r_sense_mohm:%d, v_cutoff_uv:%d, max_v:%d\n", |
| 1883 | chip->r_sense_mohm, chip->v_cutoff_uv, |
| 1884 | chip->max_voltage_uv); |
| 1885 | pr_debug("r_conn:%d, shutdown_soc: %d, adjust_soc_low:%d\n", |
| 1886 | chip->r_conn_mohm, chip->shutdown_soc_valid_limit, |
| 1887 | chip->adjust_soc_low_threshold); |
| 1888 | pr_debug("adjust_soc_high:%d, chg_term_ua:%d, batt_type:%d\n", |
| 1889 | chip->adjust_soc_high_threshold, chip->chg_term_ua, |
| 1890 | chip->batt_type); |
Xiaozhe Shi | 781b0a2 | 2012-11-05 17:18:27 -0800 | [diff] [blame] | 1891 | pr_debug("ignore_shutdown_soc:%d, use_voltage_soc:%d\n", |
| 1892 | chip->ignore_shutdown_soc, use_voltage_soc); |
Xiaozhe Shi | cd7e530 | 2012-10-17 12:29:53 -0700 | [diff] [blame] | 1893 | |
| 1894 | return 0; |
| 1895 | } |
| 1896 | |
| 1897 | static inline void bms_initialize_constants(struct qpnp_bms_chip *chip) |
| 1898 | { |
| 1899 | chip->start_percent = -EINVAL; |
| 1900 | chip->end_percent = -EINVAL; |
| 1901 | chip->prev_pc_unusable = -EINVAL; |
| 1902 | chip->soc_at_cv = -EINVAL; |
| 1903 | chip->calculated_soc = -EINVAL; |
Xiaozhe Shi | e118c69 | 2012-09-24 15:17:43 -0700 | [diff] [blame] | 1904 | chip->last_soc = -EINVAL; |
Xiaozhe Shi | 781b0a2 | 2012-11-05 17:18:27 -0800 | [diff] [blame] | 1905 | chip->last_vbat_read_uv = -EINVAL; |
Xiaozhe Shi | 7edde5d | 2012-09-26 11:23:09 -0700 | [diff] [blame] | 1906 | chip->last_soc_est = -EINVAL; |
Xiaozhe Shi | e118c69 | 2012-09-24 15:17:43 -0700 | [diff] [blame] | 1907 | chip->first_time_calc_soc = 1; |
| 1908 | chip->first_time_calc_uuc = 1; |
Xiaozhe Shi | cd7e530 | 2012-10-17 12:29:53 -0700 | [diff] [blame] | 1909 | } |
| 1910 | |
Xiaozhe Shi | b19f703 | 2012-08-16 12:14:16 -0700 | [diff] [blame] | 1911 | static int __devinit |
| 1912 | qpnp_bms_probe(struct spmi_device *spmi) |
| 1913 | { |
| 1914 | struct qpnp_bms_chip *chip; |
| 1915 | struct resource *bms_resource; |
Xiaozhe Shi | cd7e530 | 2012-10-17 12:29:53 -0700 | [diff] [blame] | 1916 | int rc, vbatt; |
Xiaozhe Shi | b19f703 | 2012-08-16 12:14:16 -0700 | [diff] [blame] | 1917 | |
| 1918 | chip = kzalloc(sizeof *chip, GFP_KERNEL); |
| 1919 | |
| 1920 | if (chip == NULL) { |
| 1921 | pr_err("kzalloc() failed.\n"); |
| 1922 | return -ENOMEM; |
| 1923 | } |
| 1924 | |
| 1925 | chip->dev = &(spmi->dev); |
| 1926 | chip->spmi = spmi; |
| 1927 | |
Xiaozhe Shi | cd7e530 | 2012-10-17 12:29:53 -0700 | [diff] [blame] | 1928 | mutex_init(&chip->bms_output_lock); |
| 1929 | mutex_init(&chip->last_ocv_uv_mutex); |
Xiaozhe Shi | e118c69 | 2012-09-24 15:17:43 -0700 | [diff] [blame] | 1930 | mutex_init(&chip->soc_invalidation_mutex); |
Xiaozhe Shi | cd7e530 | 2012-10-17 12:29:53 -0700 | [diff] [blame] | 1931 | |
Xiaozhe Shi | b19f703 | 2012-08-16 12:14:16 -0700 | [diff] [blame] | 1932 | bms_resource = spmi_get_resource(spmi, NULL, IORESOURCE_MEM, 0); |
| 1933 | if (!bms_resource) { |
| 1934 | dev_err(&spmi->dev, "Unable to get BMS base address\n"); |
| 1935 | return -ENXIO; |
| 1936 | } |
| 1937 | chip->base = bms_resource->start; |
| 1938 | |
| 1939 | rc = qpnp_read_wrapper(chip, &chip->revision1, |
| 1940 | chip->base + BMS1_REVISION1, 1); |
| 1941 | if (rc) { |
| 1942 | pr_err("error reading version register %d\n", rc); |
| 1943 | goto error_read; |
| 1944 | } |
| 1945 | |
| 1946 | rc = qpnp_read_wrapper(chip, &chip->revision2, |
| 1947 | chip->base + BMS1_REVISION2, 1); |
| 1948 | if (rc) { |
| 1949 | pr_err("Error reading version register %d\n", rc); |
| 1950 | goto error_read; |
| 1951 | } |
| 1952 | |
Xiaozhe Shi | 8cf085e | 2012-11-26 11:36:36 -0800 | [diff] [blame^] | 1953 | rc = qpnp_vadc_is_ready(); |
| 1954 | if (rc) { |
| 1955 | pr_info("vadc not ready: %d, deferring probe\n", rc); |
| 1956 | goto error_read; |
| 1957 | } |
| 1958 | |
| 1959 | rc = qpnp_iadc_is_ready(); |
| 1960 | if (rc) { |
| 1961 | pr_info("iadc not ready: %d, deferring probe\n", rc); |
| 1962 | goto error_read; |
| 1963 | } |
| 1964 | |
Xiaozhe Shi | 73a6569 | 2012-09-18 17:51:57 -0700 | [diff] [blame] | 1965 | rc = set_battery_data(chip); |
| 1966 | if (rc) { |
| 1967 | pr_err("Bad battery data %d\n", rc); |
| 1968 | goto error_read; |
| 1969 | } |
| 1970 | |
Xiaozhe Shi | cd7e530 | 2012-10-17 12:29:53 -0700 | [diff] [blame] | 1971 | rc = bms_read_properties(chip); |
| 1972 | if (rc) { |
| 1973 | pr_err("Unable to read all bms properties, rc = %d\n", rc); |
| 1974 | goto error_read; |
| 1975 | } |
Xiaozhe Shi | b19f703 | 2012-08-16 12:14:16 -0700 | [diff] [blame] | 1976 | |
Xiaozhe Shi | cd7e530 | 2012-10-17 12:29:53 -0700 | [diff] [blame] | 1977 | bms_initialize_constants(chip); |
| 1978 | |
| 1979 | INIT_DELAYED_WORK(&chip->calculate_soc_delayed_work, |
| 1980 | calculate_soc_work); |
| 1981 | |
| 1982 | read_shutdown_soc_and_iavg(chip); |
Xiaozhe Shi | b19f703 | 2012-08-16 12:14:16 -0700 | [diff] [blame] | 1983 | |
| 1984 | dev_set_drvdata(&spmi->dev, chip); |
| 1985 | device_init_wakeup(&spmi->dev, 1); |
| 1986 | |
Xiaozhe Shi | cd7e530 | 2012-10-17 12:29:53 -0700 | [diff] [blame] | 1987 | calculate_soc_work(&(chip->calculate_soc_delayed_work.work)); |
| 1988 | |
Xiaozhe Shi | b19f703 | 2012-08-16 12:14:16 -0700 | [diff] [blame] | 1989 | /* setup & register the battery power supply */ |
| 1990 | chip->bms_psy.name = "bms"; |
| 1991 | chip->bms_psy.type = POWER_SUPPLY_TYPE_BMS; |
| 1992 | chip->bms_psy.properties = msm_bms_power_props; |
| 1993 | chip->bms_psy.num_properties = ARRAY_SIZE(msm_bms_power_props); |
| 1994 | chip->bms_psy.get_property = qpnp_bms_power_get_property; |
| 1995 | chip->bms_psy.set_property = qpnp_bms_power_set_property; |
| 1996 | chip->bms_psy.external_power_changed = |
| 1997 | qpnp_bms_external_power_changed; |
| 1998 | chip->bms_psy.supplied_to = qpnp_bms_supplicants; |
| 1999 | chip->bms_psy.num_supplicants = ARRAY_SIZE(qpnp_bms_supplicants); |
| 2000 | |
| 2001 | rc = power_supply_register(chip->dev, &chip->bms_psy); |
| 2002 | |
| 2003 | if (rc < 0) { |
| 2004 | pr_err("power_supply_register bms failed rc = %d\n", rc); |
| 2005 | goto unregister_dc; |
| 2006 | } |
| 2007 | |
Xiaozhe Shi | cd7e530 | 2012-10-17 12:29:53 -0700 | [diff] [blame] | 2008 | vbatt = 0; |
| 2009 | get_battery_voltage(&vbatt); |
| 2010 | |
Xiaozhe Shi | 8cf085e | 2012-11-26 11:36:36 -0800 | [diff] [blame^] | 2011 | pr_debug("OK battery_capacity_at_boot=%d vbatt = %d\n", |
Xiaozhe Shi | cd7e530 | 2012-10-17 12:29:53 -0700 | [diff] [blame] | 2012 | get_prop_bms_capacity(chip), |
| 2013 | vbatt); |
Xiaozhe Shi | b19f703 | 2012-08-16 12:14:16 -0700 | [diff] [blame] | 2014 | pr_info("probe success\n"); |
| 2015 | return 0; |
| 2016 | |
| 2017 | unregister_dc: |
| 2018 | power_supply_unregister(&chip->bms_psy); |
| 2019 | dev_set_drvdata(&spmi->dev, NULL); |
| 2020 | error_read: |
| 2021 | kfree(chip); |
| 2022 | return rc; |
| 2023 | } |
| 2024 | |
| 2025 | static int __devexit |
| 2026 | qpnp_bms_remove(struct spmi_device *spmi) |
| 2027 | { |
| 2028 | struct qpnp_bms_chip *chip = dev_get_drvdata(&spmi->dev); |
| 2029 | |
| 2030 | dev_set_drvdata(&spmi->dev, NULL); |
| 2031 | kfree(chip); |
| 2032 | return 0; |
| 2033 | } |
| 2034 | |
| 2035 | static struct spmi_driver qpnp_bms_driver = { |
| 2036 | .probe = qpnp_bms_probe, |
| 2037 | .remove = __devexit_p(qpnp_bms_remove), |
| 2038 | .driver = { |
| 2039 | .name = QPNP_BMS_DEV_NAME, |
| 2040 | .owner = THIS_MODULE, |
| 2041 | .of_match_table = qpnp_bms_match_table, |
| 2042 | }, |
| 2043 | }; |
| 2044 | |
| 2045 | static int __init qpnp_bms_init(void) |
| 2046 | { |
| 2047 | pr_info("QPNP BMS INIT\n"); |
| 2048 | return spmi_driver_register(&qpnp_bms_driver); |
| 2049 | } |
| 2050 | |
| 2051 | static void __exit qpnp_bms_exit(void) |
| 2052 | { |
| 2053 | pr_info("QPNP BMS EXIT\n"); |
| 2054 | return spmi_driver_unregister(&qpnp_bms_driver); |
| 2055 | } |
| 2056 | |
| 2057 | module_init(qpnp_bms_init); |
| 2058 | module_exit(qpnp_bms_exit); |
| 2059 | |
| 2060 | MODULE_DESCRIPTION("QPNP BMS Driver"); |
| 2061 | MODULE_LICENSE("GPL v2"); |
| 2062 | MODULE_ALIAS("platform:" QPNP_BMS_DEV_NAME); |