blob: 87f9971839364c65dcd1e31b696f606396c0a49a [file] [log] [blame]
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001/*
Sujithcee075a2009-03-13 09:07:23 +05302 * Copyright (c) 2008-2009 Atheros Communications Inc.
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07003 *
4 * Permission to use, copy, modify, and/or distribute this software for any
5 * purpose with or without fee is hereby granted, provided that the above
6 * copyright notice and this permission notice appear in all copies.
7 *
8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
15 */
16
Luis R. Rodriguezf078f202008-08-04 00:16:41 -070017#include <linux/nl80211.h>
Sujith394cf0a2009-02-09 13:26:54 +053018#include "ath9k.h"
Luis R. Rodriguezf078f202008-08-04 00:16:41 -070019
20#define ATH_PCI_VERSION "0.1"
21
Luis R. Rodriguezf078f202008-08-04 00:16:41 -070022static char *dev_info = "ath9k";
23
24MODULE_AUTHOR("Atheros Communications");
25MODULE_DESCRIPTION("Support for Atheros 802.11n wireless LAN cards.");
26MODULE_SUPPORTED_DEVICE("Atheros 802.11n WLAN cards");
27MODULE_LICENSE("Dual BSD/GPL");
28
Jouni Malinenb3bd89c2009-02-24 13:42:01 +020029static int modparam_nohwcrypt;
30module_param_named(nohwcrypt, modparam_nohwcrypt, int, 0444);
31MODULE_PARM_DESC(nohwcrypt, "Disable hardware encryption");
32
Luis R. Rodriguez5f8e0772009-01-22 15:16:48 -080033/* We use the hw_value as an index into our private channel structure */
34
35#define CHAN2G(_freq, _idx) { \
36 .center_freq = (_freq), \
37 .hw_value = (_idx), \
Luis R. Rodriguezeeddfd92009-05-19 17:49:46 -040038 .max_power = 20, \
Luis R. Rodriguez5f8e0772009-01-22 15:16:48 -080039}
40
41#define CHAN5G(_freq, _idx) { \
42 .band = IEEE80211_BAND_5GHZ, \
43 .center_freq = (_freq), \
44 .hw_value = (_idx), \
Luis R. Rodriguezeeddfd92009-05-19 17:49:46 -040045 .max_power = 20, \
Luis R. Rodriguez5f8e0772009-01-22 15:16:48 -080046}
47
48/* Some 2 GHz radios are actually tunable on 2312-2732
49 * on 5 MHz steps, we support the channels which we know
50 * we have calibration data for all cards though to make
51 * this static */
52static struct ieee80211_channel ath9k_2ghz_chantable[] = {
53 CHAN2G(2412, 0), /* Channel 1 */
54 CHAN2G(2417, 1), /* Channel 2 */
55 CHAN2G(2422, 2), /* Channel 3 */
56 CHAN2G(2427, 3), /* Channel 4 */
57 CHAN2G(2432, 4), /* Channel 5 */
58 CHAN2G(2437, 5), /* Channel 6 */
59 CHAN2G(2442, 6), /* Channel 7 */
60 CHAN2G(2447, 7), /* Channel 8 */
61 CHAN2G(2452, 8), /* Channel 9 */
62 CHAN2G(2457, 9), /* Channel 10 */
63 CHAN2G(2462, 10), /* Channel 11 */
64 CHAN2G(2467, 11), /* Channel 12 */
65 CHAN2G(2472, 12), /* Channel 13 */
66 CHAN2G(2484, 13), /* Channel 14 */
67};
68
69/* Some 5 GHz radios are actually tunable on XXXX-YYYY
70 * on 5 MHz steps, we support the channels which we know
71 * we have calibration data for all cards though to make
72 * this static */
73static struct ieee80211_channel ath9k_5ghz_chantable[] = {
74 /* _We_ call this UNII 1 */
75 CHAN5G(5180, 14), /* Channel 36 */
76 CHAN5G(5200, 15), /* Channel 40 */
77 CHAN5G(5220, 16), /* Channel 44 */
78 CHAN5G(5240, 17), /* Channel 48 */
79 /* _We_ call this UNII 2 */
80 CHAN5G(5260, 18), /* Channel 52 */
81 CHAN5G(5280, 19), /* Channel 56 */
82 CHAN5G(5300, 20), /* Channel 60 */
83 CHAN5G(5320, 21), /* Channel 64 */
84 /* _We_ call this "Middle band" */
85 CHAN5G(5500, 22), /* Channel 100 */
86 CHAN5G(5520, 23), /* Channel 104 */
87 CHAN5G(5540, 24), /* Channel 108 */
88 CHAN5G(5560, 25), /* Channel 112 */
89 CHAN5G(5580, 26), /* Channel 116 */
90 CHAN5G(5600, 27), /* Channel 120 */
91 CHAN5G(5620, 28), /* Channel 124 */
92 CHAN5G(5640, 29), /* Channel 128 */
93 CHAN5G(5660, 30), /* Channel 132 */
94 CHAN5G(5680, 31), /* Channel 136 */
95 CHAN5G(5700, 32), /* Channel 140 */
96 /* _We_ call this UNII 3 */
97 CHAN5G(5745, 33), /* Channel 149 */
98 CHAN5G(5765, 34), /* Channel 153 */
99 CHAN5G(5785, 35), /* Channel 157 */
100 CHAN5G(5805, 36), /* Channel 161 */
101 CHAN5G(5825, 37), /* Channel 165 */
102};
103
Luis R. Rodriguezce111ba2008-12-23 15:58:39 -0800104static void ath_cache_conf_rate(struct ath_softc *sc,
105 struct ieee80211_conf *conf)
Sujithff37e332008-11-24 12:07:55 +0530106{
Luis R. Rodriguez030bb492008-12-23 15:58:37 -0800107 switch (conf->channel->band) {
108 case IEEE80211_BAND_2GHZ:
109 if (conf_is_ht20(conf))
110 sc->cur_rate_table =
111 sc->hw_rate_table[ATH9K_MODE_11NG_HT20];
112 else if (conf_is_ht40_minus(conf))
113 sc->cur_rate_table =
114 sc->hw_rate_table[ATH9K_MODE_11NG_HT40MINUS];
115 else if (conf_is_ht40_plus(conf))
116 sc->cur_rate_table =
117 sc->hw_rate_table[ATH9K_MODE_11NG_HT40PLUS];
Luis R. Rodriguez96742252008-12-23 15:58:38 -0800118 else
Luis R. Rodriguez030bb492008-12-23 15:58:37 -0800119 sc->cur_rate_table =
120 sc->hw_rate_table[ATH9K_MODE_11G];
Luis R. Rodriguez030bb492008-12-23 15:58:37 -0800121 break;
122 case IEEE80211_BAND_5GHZ:
123 if (conf_is_ht20(conf))
124 sc->cur_rate_table =
125 sc->hw_rate_table[ATH9K_MODE_11NA_HT20];
126 else if (conf_is_ht40_minus(conf))
127 sc->cur_rate_table =
128 sc->hw_rate_table[ATH9K_MODE_11NA_HT40MINUS];
129 else if (conf_is_ht40_plus(conf))
130 sc->cur_rate_table =
131 sc->hw_rate_table[ATH9K_MODE_11NA_HT40PLUS];
132 else
Luis R. Rodriguez96742252008-12-23 15:58:38 -0800133 sc->cur_rate_table =
134 sc->hw_rate_table[ATH9K_MODE_11A];
Luis R. Rodriguez030bb492008-12-23 15:58:37 -0800135 break;
136 default:
Luis R. Rodriguezce111ba2008-12-23 15:58:39 -0800137 BUG_ON(1);
Luis R. Rodriguez030bb492008-12-23 15:58:37 -0800138 break;
139 }
Sujithff37e332008-11-24 12:07:55 +0530140}
141
142static void ath_update_txpow(struct ath_softc *sc)
143{
Sujithcbe61d82009-02-09 13:27:12 +0530144 struct ath_hw *ah = sc->sc_ah;
Sujithff37e332008-11-24 12:07:55 +0530145 u32 txpow;
146
Sujith17d79042009-02-09 13:27:03 +0530147 if (sc->curtxpow != sc->config.txpowlimit) {
148 ath9k_hw_set_txpowerlimit(ah, sc->config.txpowlimit);
Sujithff37e332008-11-24 12:07:55 +0530149 /* read back in case value is clamped */
150 ath9k_hw_getcapability(ah, ATH9K_CAP_TXPOW, 1, &txpow);
Sujith17d79042009-02-09 13:27:03 +0530151 sc->curtxpow = txpow;
Sujithff37e332008-11-24 12:07:55 +0530152 }
153}
154
155static u8 parse_mpdudensity(u8 mpdudensity)
156{
157 /*
158 * 802.11n D2.0 defined values for "Minimum MPDU Start Spacing":
159 * 0 for no restriction
160 * 1 for 1/4 us
161 * 2 for 1/2 us
162 * 3 for 1 us
163 * 4 for 2 us
164 * 5 for 4 us
165 * 6 for 8 us
166 * 7 for 16 us
167 */
168 switch (mpdudensity) {
169 case 0:
170 return 0;
171 case 1:
172 case 2:
173 case 3:
174 /* Our lower layer calculations limit our precision to
175 1 microsecond */
176 return 1;
177 case 4:
178 return 2;
179 case 5:
180 return 4;
181 case 6:
182 return 8;
183 case 7:
184 return 16;
185 default:
186 return 0;
187 }
188}
189
190static void ath_setup_rates(struct ath_softc *sc, enum ieee80211_band band)
191{
Luis R. Rodriguez4f0fc7c2009-05-06 02:20:00 -0400192 const struct ath_rate_table *rate_table = NULL;
Sujithff37e332008-11-24 12:07:55 +0530193 struct ieee80211_supported_band *sband;
194 struct ieee80211_rate *rate;
195 int i, maxrates;
196
197 switch (band) {
198 case IEEE80211_BAND_2GHZ:
199 rate_table = sc->hw_rate_table[ATH9K_MODE_11G];
200 break;
201 case IEEE80211_BAND_5GHZ:
202 rate_table = sc->hw_rate_table[ATH9K_MODE_11A];
203 break;
204 default:
205 break;
206 }
207
208 if (rate_table == NULL)
209 return;
210
211 sband = &sc->sbands[band];
212 rate = sc->rates[band];
213
214 if (rate_table->rate_cnt > ATH_RATE_MAX)
215 maxrates = ATH_RATE_MAX;
216 else
217 maxrates = rate_table->rate_cnt;
218
219 for (i = 0; i < maxrates; i++) {
220 rate[i].bitrate = rate_table->info[i].ratekbps / 100;
221 rate[i].hw_value = rate_table->info[i].ratecode;
Sujithf46730d2009-01-27 13:51:03 +0530222 if (rate_table->info[i].short_preamble) {
223 rate[i].hw_value_short = rate_table->info[i].ratecode |
224 rate_table->info[i].short_preamble;
225 rate[i].flags = IEEE80211_RATE_SHORT_PREAMBLE;
226 }
Sujithff37e332008-11-24 12:07:55 +0530227 sband->n_bitrates++;
Sujithf46730d2009-01-27 13:51:03 +0530228
Sujith04bd4632008-11-28 22:18:05 +0530229 DPRINTF(sc, ATH_DBG_CONFIG, "Rate: %2dMbps, ratecode: %2d\n",
230 rate[i].bitrate / 10, rate[i].hw_value);
Sujithff37e332008-11-24 12:07:55 +0530231 }
232}
233
Vasanthakumar Thiagarajan82880a72009-06-13 14:50:24 +0530234static struct ath9k_channel *ath_get_curchannel(struct ath_softc *sc,
235 struct ieee80211_hw *hw)
236{
237 struct ieee80211_channel *curchan = hw->conf.channel;
238 struct ath9k_channel *channel;
239 u8 chan_idx;
240
241 chan_idx = curchan->hw_value;
242 channel = &sc->sc_ah->channels[chan_idx];
243 ath9k_update_ichannel(sc, hw, channel);
244 return channel;
245}
246
Sujithff37e332008-11-24 12:07:55 +0530247/*
248 * Set/change channels. If the channel is really being changed, it's done
249 * by reseting the chip. To accomplish this we must first cleanup any pending
250 * DMA, then restart stuff.
251*/
Jouni Malinen0e2dedf2009-03-03 19:23:32 +0200252int ath_set_channel(struct ath_softc *sc, struct ieee80211_hw *hw,
253 struct ath9k_channel *hchan)
Sujithff37e332008-11-24 12:07:55 +0530254{
Sujithcbe61d82009-02-09 13:27:12 +0530255 struct ath_hw *ah = sc->sc_ah;
Sujithff37e332008-11-24 12:07:55 +0530256 bool fastcc = true, stopped;
Luis R. Rodriguezae8d2852008-12-23 15:58:40 -0800257 struct ieee80211_channel *channel = hw->conf.channel;
258 int r;
Sujithff37e332008-11-24 12:07:55 +0530259
260 if (sc->sc_flags & SC_OP_INVALID)
261 return -EIO;
262
Vivek Natarajan3cbb5dd2009-01-20 11:17:08 +0530263 ath9k_ps_wakeup(sc);
264
Luis R. Rodriguezc0d7c7a2008-12-23 15:58:50 -0800265 /*
266 * This is only performed if the channel settings have
267 * actually changed.
268 *
269 * To switch channels clear any pending DMA operations;
270 * wait long enough for the RX fifo to drain, reset the
271 * hardware at the new frequency, and then re-enable
272 * the relevant bits of the h/w.
273 */
274 ath9k_hw_set_interrupts(ah, 0);
Sujith043a0402009-01-16 21:38:47 +0530275 ath_drain_all_txq(sc, false);
Luis R. Rodriguezc0d7c7a2008-12-23 15:58:50 -0800276 stopped = ath_stoprecv(sc);
Sujithff37e332008-11-24 12:07:55 +0530277
Luis R. Rodriguezc0d7c7a2008-12-23 15:58:50 -0800278 /* XXX: do not flush receive queue here. We don't want
279 * to flush data frames already in queue because of
280 * changing channel. */
Sujithff37e332008-11-24 12:07:55 +0530281
Luis R. Rodriguezc0d7c7a2008-12-23 15:58:50 -0800282 if (!stopped || (sc->sc_flags & SC_OP_FULL_RESET))
283 fastcc = false;
Sujithff37e332008-11-24 12:07:55 +0530284
Luis R. Rodriguezc0d7c7a2008-12-23 15:58:50 -0800285 DPRINTF(sc, ATH_DBG_CONFIG,
286 "(%u MHz) -> (%u MHz), chanwidth: %d\n",
Sujith2660b812009-02-09 13:27:26 +0530287 sc->sc_ah->curchan->channel,
Luis R. Rodriguezc0d7c7a2008-12-23 15:58:50 -0800288 channel->center_freq, sc->tx_chan_width);
Sujith99405f92008-11-24 12:08:35 +0530289
Luis R. Rodriguezc0d7c7a2008-12-23 15:58:50 -0800290 spin_lock_bh(&sc->sc_resetlock);
Luis R. Rodriguezae8d2852008-12-23 15:58:40 -0800291
Luis R. Rodriguezc0d7c7a2008-12-23 15:58:50 -0800292 r = ath9k_hw_reset(ah, hchan, fastcc);
293 if (r) {
294 DPRINTF(sc, ATH_DBG_FATAL,
295 "Unable to reset channel (%u Mhz) "
Vasanthakumar Thiagarajan6b457842009-05-15 18:59:20 +0530296 "reset status %d\n",
Luis R. Rodriguezc0d7c7a2008-12-23 15:58:50 -0800297 channel->center_freq, r);
Sujithff37e332008-11-24 12:07:55 +0530298 spin_unlock_bh(&sc->sc_resetlock);
Gabor Juhos39892792009-06-15 17:49:09 +0200299 goto ps_restore;
Sujithff37e332008-11-24 12:07:55 +0530300 }
Luis R. Rodriguezc0d7c7a2008-12-23 15:58:50 -0800301 spin_unlock_bh(&sc->sc_resetlock);
302
Luis R. Rodriguezc0d7c7a2008-12-23 15:58:50 -0800303 sc->sc_flags &= ~SC_OP_FULL_RESET;
304
305 if (ath_startrecv(sc) != 0) {
306 DPRINTF(sc, ATH_DBG_FATAL,
307 "Unable to restart recv logic\n");
Gabor Juhos39892792009-06-15 17:49:09 +0200308 r = -EIO;
309 goto ps_restore;
Luis R. Rodriguezc0d7c7a2008-12-23 15:58:50 -0800310 }
311
312 ath_cache_conf_rate(sc, &hw->conf);
313 ath_update_txpow(sc);
Sujith17d79042009-02-09 13:27:03 +0530314 ath9k_hw_set_interrupts(ah, sc->imask);
Gabor Juhos39892792009-06-15 17:49:09 +0200315
316 ps_restore:
Vivek Natarajan3cbb5dd2009-01-20 11:17:08 +0530317 ath9k_ps_restore(sc);
Gabor Juhos39892792009-06-15 17:49:09 +0200318 return r;
Sujithff37e332008-11-24 12:07:55 +0530319}
320
321/*
322 * This routine performs the periodic noise floor calibration function
323 * that is used to adjust and optimize the chip performance. This
324 * takes environmental changes (location, temperature) into account.
325 * When the task is complete, it reschedules itself depending on the
326 * appropriate interval that was calculated.
327 */
328static void ath_ani_calibrate(unsigned long data)
329{
Sujith20977d32009-02-20 15:13:28 +0530330 struct ath_softc *sc = (struct ath_softc *)data;
331 struct ath_hw *ah = sc->sc_ah;
Sujithff37e332008-11-24 12:07:55 +0530332 bool longcal = false;
333 bool shortcal = false;
334 bool aniflag = false;
335 unsigned int timestamp = jiffies_to_msecs(jiffies);
Sujith20977d32009-02-20 15:13:28 +0530336 u32 cal_interval, short_cal_interval;
Sujithff37e332008-11-24 12:07:55 +0530337
Sujith20977d32009-02-20 15:13:28 +0530338 short_cal_interval = (ah->opmode == NL80211_IFTYPE_AP) ?
339 ATH_AP_SHORT_CALINTERVAL : ATH_STA_SHORT_CALINTERVAL;
Sujithff37e332008-11-24 12:07:55 +0530340
341 /*
342 * don't calibrate when we're scanning.
343 * we are most likely not on our home channel.
344 */
Senthil Balasubramaniane5f09212009-06-24 18:56:41 +0530345 spin_lock(&sc->ani_lock);
Sujith0c98de62009-03-03 10:16:45 +0530346 if (sc->sc_flags & SC_OP_SCANNING)
Sujith20977d32009-02-20 15:13:28 +0530347 goto set_timer;
Sujithff37e332008-11-24 12:07:55 +0530348
Jouni Malinen1ffc1c62009-05-19 17:01:39 +0300349 /* Only calibrate if awake */
350 if (sc->sc_ah->power_mode != ATH9K_PM_AWAKE)
351 goto set_timer;
352
353 ath9k_ps_wakeup(sc);
354
Sujithff37e332008-11-24 12:07:55 +0530355 /* Long calibration runs independently of short calibration. */
Sujith17d79042009-02-09 13:27:03 +0530356 if ((timestamp - sc->ani.longcal_timer) >= ATH_LONG_CALINTERVAL) {
Sujithff37e332008-11-24 12:07:55 +0530357 longcal = true;
Sujith04bd4632008-11-28 22:18:05 +0530358 DPRINTF(sc, ATH_DBG_ANI, "longcal @%lu\n", jiffies);
Sujith17d79042009-02-09 13:27:03 +0530359 sc->ani.longcal_timer = timestamp;
Sujithff37e332008-11-24 12:07:55 +0530360 }
361
Sujith17d79042009-02-09 13:27:03 +0530362 /* Short calibration applies only while caldone is false */
363 if (!sc->ani.caldone) {
Sujith20977d32009-02-20 15:13:28 +0530364 if ((timestamp - sc->ani.shortcal_timer) >= short_cal_interval) {
Sujithff37e332008-11-24 12:07:55 +0530365 shortcal = true;
Sujith04bd4632008-11-28 22:18:05 +0530366 DPRINTF(sc, ATH_DBG_ANI, "shortcal @%lu\n", jiffies);
Sujith17d79042009-02-09 13:27:03 +0530367 sc->ani.shortcal_timer = timestamp;
368 sc->ani.resetcal_timer = timestamp;
Sujithff37e332008-11-24 12:07:55 +0530369 }
370 } else {
Sujith17d79042009-02-09 13:27:03 +0530371 if ((timestamp - sc->ani.resetcal_timer) >=
Sujithff37e332008-11-24 12:07:55 +0530372 ATH_RESTART_CALINTERVAL) {
Sujith17d79042009-02-09 13:27:03 +0530373 sc->ani.caldone = ath9k_hw_reset_calvalid(ah);
374 if (sc->ani.caldone)
375 sc->ani.resetcal_timer = timestamp;
Sujithff37e332008-11-24 12:07:55 +0530376 }
377 }
378
379 /* Verify whether we must check ANI */
Sujith20977d32009-02-20 15:13:28 +0530380 if ((timestamp - sc->ani.checkani_timer) >= ATH_ANI_POLLINTERVAL) {
Sujithff37e332008-11-24 12:07:55 +0530381 aniflag = true;
Sujith17d79042009-02-09 13:27:03 +0530382 sc->ani.checkani_timer = timestamp;
Sujithff37e332008-11-24 12:07:55 +0530383 }
384
385 /* Skip all processing if there's nothing to do. */
386 if (longcal || shortcal || aniflag) {
387 /* Call ANI routine if necessary */
388 if (aniflag)
Sujith20977d32009-02-20 15:13:28 +0530389 ath9k_hw_ani_monitor(ah, &sc->nodestats, ah->curchan);
Sujithff37e332008-11-24 12:07:55 +0530390
391 /* Perform calibration if necessary */
392 if (longcal || shortcal) {
Sujith379f0442009-04-13 21:56:48 +0530393 sc->ani.caldone = ath9k_hw_calibrate(ah, ah->curchan,
394 sc->rx_chainmask, longcal);
Sujithff37e332008-11-24 12:07:55 +0530395
Sujith379f0442009-04-13 21:56:48 +0530396 if (longcal)
397 sc->ani.noise_floor = ath9k_hw_getchan_noise(ah,
398 ah->curchan);
Sujithff37e332008-11-24 12:07:55 +0530399
Sujith379f0442009-04-13 21:56:48 +0530400 DPRINTF(sc, ATH_DBG_ANI," calibrate chan %u/%x nf: %d\n",
401 ah->curchan->channel, ah->curchan->channelFlags,
402 sc->ani.noise_floor);
Sujithff37e332008-11-24 12:07:55 +0530403 }
404 }
405
Jouni Malinen1ffc1c62009-05-19 17:01:39 +0300406 ath9k_ps_restore(sc);
407
Sujith20977d32009-02-20 15:13:28 +0530408set_timer:
Senthil Balasubramaniane5f09212009-06-24 18:56:41 +0530409 spin_unlock(&sc->ani_lock);
Sujithff37e332008-11-24 12:07:55 +0530410 /*
411 * Set timer interval based on previous results.
412 * The interval must be the shortest necessary to satisfy ANI,
413 * short calibration and long calibration.
414 */
Sujithaac92072008-12-02 18:37:54 +0530415 cal_interval = ATH_LONG_CALINTERVAL;
Sujith2660b812009-02-09 13:27:26 +0530416 if (sc->sc_ah->config.enable_ani)
Sujithaac92072008-12-02 18:37:54 +0530417 cal_interval = min(cal_interval, (u32)ATH_ANI_POLLINTERVAL);
Sujith17d79042009-02-09 13:27:03 +0530418 if (!sc->ani.caldone)
Sujith20977d32009-02-20 15:13:28 +0530419 cal_interval = min(cal_interval, (u32)short_cal_interval);
Sujithff37e332008-11-24 12:07:55 +0530420
Sujith17d79042009-02-09 13:27:03 +0530421 mod_timer(&sc->ani.timer, jiffies + msecs_to_jiffies(cal_interval));
Sujithff37e332008-11-24 12:07:55 +0530422}
423
Sujith415f7382009-04-13 21:56:46 +0530424static void ath_start_ani(struct ath_softc *sc)
425{
426 unsigned long timestamp = jiffies_to_msecs(jiffies);
427
428 sc->ani.longcal_timer = timestamp;
429 sc->ani.shortcal_timer = timestamp;
430 sc->ani.checkani_timer = timestamp;
431
432 mod_timer(&sc->ani.timer,
433 jiffies + msecs_to_jiffies(ATH_ANI_POLLINTERVAL));
434}
435
Sujithff37e332008-11-24 12:07:55 +0530436/*
437 * Update tx/rx chainmask. For legacy association,
438 * hard code chainmask to 1x1, for 11n association, use
Vasanthakumar Thiagarajanc97c92d2009-01-02 15:35:46 +0530439 * the chainmask configuration, for bt coexistence, use
440 * the chainmask configuration even in legacy mode.
Sujithff37e332008-11-24 12:07:55 +0530441 */
Jouni Malinen0e2dedf2009-03-03 19:23:32 +0200442void ath_update_chainmask(struct ath_softc *sc, int is_ht)
Sujithff37e332008-11-24 12:07:55 +0530443{
Vasanthakumar Thiagarajanc97c92d2009-01-02 15:35:46 +0530444 if (is_ht ||
Sujith2660b812009-02-09 13:27:26 +0530445 (sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_BT_COEX)) {
446 sc->tx_chainmask = sc->sc_ah->caps.tx_chainmask;
447 sc->rx_chainmask = sc->sc_ah->caps.rx_chainmask;
Sujithff37e332008-11-24 12:07:55 +0530448 } else {
Sujith17d79042009-02-09 13:27:03 +0530449 sc->tx_chainmask = 1;
450 sc->rx_chainmask = 1;
Sujithff37e332008-11-24 12:07:55 +0530451 }
452
Sujith04bd4632008-11-28 22:18:05 +0530453 DPRINTF(sc, ATH_DBG_CONFIG, "tx chmask: %d, rx chmask: %d\n",
Sujith17d79042009-02-09 13:27:03 +0530454 sc->tx_chainmask, sc->rx_chainmask);
Sujithff37e332008-11-24 12:07:55 +0530455}
456
457static void ath_node_attach(struct ath_softc *sc, struct ieee80211_sta *sta)
458{
459 struct ath_node *an;
460
461 an = (struct ath_node *)sta->drv_priv;
462
Sujith87792ef2009-03-30 15:28:48 +0530463 if (sc->sc_flags & SC_OP_TXAGGR) {
Sujithff37e332008-11-24 12:07:55 +0530464 ath_tx_node_init(sc, an);
Sujith9e98ac62009-07-23 15:32:34 +0530465 an->maxampdu = 1 << (IEEE80211_HT_MAX_AMPDU_FACTOR +
Sujith87792ef2009-03-30 15:28:48 +0530466 sta->ht_cap.ampdu_factor);
467 an->mpdudensity = parse_mpdudensity(sta->ht_cap.ampdu_density);
Senthil Balasubramaniana59b5a52009-07-14 20:17:07 -0400468 an->last_rssi = ATH_RSSI_DUMMY_MARKER;
Sujith87792ef2009-03-30 15:28:48 +0530469 }
Sujithff37e332008-11-24 12:07:55 +0530470}
471
472static void ath_node_detach(struct ath_softc *sc, struct ieee80211_sta *sta)
473{
474 struct ath_node *an = (struct ath_node *)sta->drv_priv;
475
476 if (sc->sc_flags & SC_OP_TXAGGR)
477 ath_tx_node_cleanup(sc, an);
478}
479
480static void ath9k_tasklet(unsigned long data)
481{
482 struct ath_softc *sc = (struct ath_softc *)data;
Sujith17d79042009-02-09 13:27:03 +0530483 u32 status = sc->intrstatus;
Sujithff37e332008-11-24 12:07:55 +0530484
Vasanthakumar Thiagarajan153e0802009-05-15 02:47:16 -0400485 ath9k_ps_wakeup(sc);
486
Sujithff37e332008-11-24 12:07:55 +0530487 if (status & ATH9K_INT_FATAL) {
Sujithff37e332008-11-24 12:07:55 +0530488 ath_reset(sc, false);
Vasanthakumar Thiagarajan153e0802009-05-15 02:47:16 -0400489 ath9k_ps_restore(sc);
Sujithff37e332008-11-24 12:07:55 +0530490 return;
Sujithff37e332008-11-24 12:07:55 +0530491 }
492
Sujith063d8be2009-03-30 15:28:49 +0530493 if (status & (ATH9K_INT_RX | ATH9K_INT_RXEOL | ATH9K_INT_RXORN)) {
494 spin_lock_bh(&sc->rx.rxflushlock);
495 ath_rx_tasklet(sc, 0);
496 spin_unlock_bh(&sc->rx.rxflushlock);
497 }
498
499 if (status & ATH9K_INT_TX)
500 ath_tx_tasklet(sc);
501
Gabor Juhos96148322009-07-24 17:27:21 +0200502 if ((status & ATH9K_INT_TSFOOR) && sc->ps_enabled) {
Jouni Malinen54ce8462009-05-19 17:01:40 +0300503 /*
504 * TSF sync does not look correct; remain awake to sync with
505 * the next Beacon.
506 */
507 DPRINTF(sc, ATH_DBG_PS, "TSFOOR - Sync with next Beacon\n");
Jouni Malinenccdfeab2009-05-20 21:59:08 +0300508 sc->sc_flags |= SC_OP_WAIT_FOR_BEACON | SC_OP_BEACON_SYNC;
Jouni Malinen54ce8462009-05-19 17:01:40 +0300509 }
510
Sujithff37e332008-11-24 12:07:55 +0530511 /* re-enable hardware interrupt */
Sujith17d79042009-02-09 13:27:03 +0530512 ath9k_hw_set_interrupts(sc->sc_ah, sc->imask);
Vasanthakumar Thiagarajan153e0802009-05-15 02:47:16 -0400513 ath9k_ps_restore(sc);
Sujithff37e332008-11-24 12:07:55 +0530514}
515
Gabor Juhos6baff7f2009-01-14 20:17:06 +0100516irqreturn_t ath_isr(int irq, void *dev)
Sujithff37e332008-11-24 12:07:55 +0530517{
Sujith063d8be2009-03-30 15:28:49 +0530518#define SCHED_INTR ( \
519 ATH9K_INT_FATAL | \
520 ATH9K_INT_RXORN | \
521 ATH9K_INT_RXEOL | \
522 ATH9K_INT_RX | \
523 ATH9K_INT_TX | \
524 ATH9K_INT_BMISS | \
525 ATH9K_INT_CST | \
526 ATH9K_INT_TSFOOR)
527
Sujithff37e332008-11-24 12:07:55 +0530528 struct ath_softc *sc = dev;
Sujithcbe61d82009-02-09 13:27:12 +0530529 struct ath_hw *ah = sc->sc_ah;
Sujithff37e332008-11-24 12:07:55 +0530530 enum ath9k_int status;
531 bool sched = false;
532
Sujith063d8be2009-03-30 15:28:49 +0530533 /*
534 * The hardware is not ready/present, don't
535 * touch anything. Note this can happen early
536 * on if the IRQ is shared.
537 */
538 if (sc->sc_flags & SC_OP_INVALID)
539 return IRQ_NONE;
Sujithff37e332008-11-24 12:07:55 +0530540
Sujithff37e332008-11-24 12:07:55 +0530541
Sujith063d8be2009-03-30 15:28:49 +0530542 /* shared irq, not for us */
Sujithff37e332008-11-24 12:07:55 +0530543
Vasanthakumar Thiagarajan153e0802009-05-15 02:47:16 -0400544 if (!ath9k_hw_intrpend(ah))
Sujith063d8be2009-03-30 15:28:49 +0530545 return IRQ_NONE;
Sujithff37e332008-11-24 12:07:55 +0530546
Sujith063d8be2009-03-30 15:28:49 +0530547 /*
548 * Figure out the reason(s) for the interrupt. Note
549 * that the hal returns a pseudo-ISR that may include
550 * bits we haven't explicitly enabled so we mask the
551 * value to insure we only process bits we requested.
552 */
553 ath9k_hw_getisr(ah, &status); /* NB: clears ISR too */
554 status &= sc->imask; /* discard unasked-for bits */
555
556 /*
557 * If there are no status bits set, then this interrupt was not
558 * for me (should have been caught above).
559 */
Vasanthakumar Thiagarajan153e0802009-05-15 02:47:16 -0400560 if (!status)
Sujith063d8be2009-03-30 15:28:49 +0530561 return IRQ_NONE;
Sujith063d8be2009-03-30 15:28:49 +0530562
563 /* Cache the status */
564 sc->intrstatus = status;
565
566 if (status & SCHED_INTR)
567 sched = true;
568
569 /*
570 * If a FATAL or RXORN interrupt is received, we have to reset the
571 * chip immediately.
572 */
573 if (status & (ATH9K_INT_FATAL | ATH9K_INT_RXORN))
574 goto chip_reset;
575
576 if (status & ATH9K_INT_SWBA)
577 tasklet_schedule(&sc->bcon_tasklet);
578
579 if (status & ATH9K_INT_TXURN)
580 ath9k_hw_updatetxtriglevel(ah, true);
581
582 if (status & ATH9K_INT_MIB) {
583 /*
584 * Disable interrupts until we service the MIB
585 * interrupt; otherwise it will continue to
586 * fire.
587 */
588 ath9k_hw_set_interrupts(ah, 0);
589 /*
590 * Let the hal handle the event. We assume
591 * it will clear whatever condition caused
592 * the interrupt.
593 */
594 ath9k_hw_procmibevent(ah, &sc->nodestats);
595 ath9k_hw_set_interrupts(ah, sc->imask);
596 }
597
Vasanthakumar Thiagarajan153e0802009-05-15 02:47:16 -0400598 if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP))
599 if (status & ATH9K_INT_TIM_TIMER) {
Sujith063d8be2009-03-30 15:28:49 +0530600 /* Clear RxAbort bit so that we can
601 * receive frames */
602 ath9k_hw_setpower(ah, ATH9K_PM_AWAKE);
Vasanthakumar Thiagarajan153e0802009-05-15 02:47:16 -0400603 ath9k_hw_setrxabort(sc->sc_ah, 0);
Sujith063d8be2009-03-30 15:28:49 +0530604 sc->sc_flags |= SC_OP_WAIT_FOR_BEACON;
605 }
Sujith063d8be2009-03-30 15:28:49 +0530606
607chip_reset:
608
Sujith817e11d2008-12-07 21:42:44 +0530609 ath_debug_stat_interrupt(sc, status);
610
Sujithff37e332008-11-24 12:07:55 +0530611 if (sched) {
612 /* turn off every interrupt except SWBA */
Sujith17d79042009-02-09 13:27:03 +0530613 ath9k_hw_set_interrupts(ah, (sc->imask & ATH9K_INT_SWBA));
Sujithff37e332008-11-24 12:07:55 +0530614 tasklet_schedule(&sc->intr_tq);
615 }
616
617 return IRQ_HANDLED;
Sujith063d8be2009-03-30 15:28:49 +0530618
619#undef SCHED_INTR
Sujithff37e332008-11-24 12:07:55 +0530620}
621
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700622static u32 ath_get_extchanmode(struct ath_softc *sc,
Sujith99405f92008-11-24 12:08:35 +0530623 struct ieee80211_channel *chan,
Sujith094d05d2008-12-12 11:57:43 +0530624 enum nl80211_channel_type channel_type)
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700625{
626 u32 chanmode = 0;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700627
628 switch (chan->band) {
629 case IEEE80211_BAND_2GHZ:
Sujith094d05d2008-12-12 11:57:43 +0530630 switch(channel_type) {
631 case NL80211_CHAN_NO_HT:
632 case NL80211_CHAN_HT20:
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700633 chanmode = CHANNEL_G_HT20;
Sujith094d05d2008-12-12 11:57:43 +0530634 break;
635 case NL80211_CHAN_HT40PLUS:
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700636 chanmode = CHANNEL_G_HT40PLUS;
Sujith094d05d2008-12-12 11:57:43 +0530637 break;
638 case NL80211_CHAN_HT40MINUS:
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700639 chanmode = CHANNEL_G_HT40MINUS;
Sujith094d05d2008-12-12 11:57:43 +0530640 break;
641 }
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700642 break;
643 case IEEE80211_BAND_5GHZ:
Sujith094d05d2008-12-12 11:57:43 +0530644 switch(channel_type) {
645 case NL80211_CHAN_NO_HT:
646 case NL80211_CHAN_HT20:
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700647 chanmode = CHANNEL_A_HT20;
Sujith094d05d2008-12-12 11:57:43 +0530648 break;
649 case NL80211_CHAN_HT40PLUS:
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700650 chanmode = CHANNEL_A_HT40PLUS;
Sujith094d05d2008-12-12 11:57:43 +0530651 break;
652 case NL80211_CHAN_HT40MINUS:
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700653 chanmode = CHANNEL_A_HT40MINUS;
Sujith094d05d2008-12-12 11:57:43 +0530654 break;
655 }
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700656 break;
657 default:
658 break;
659 }
660
661 return chanmode;
662}
663
Jouni Malinen6ace2892008-12-17 13:32:17 +0200664static int ath_setkey_tkip(struct ath_softc *sc, u16 keyix, const u8 *key,
Jouni Malinen3f53dd62009-02-26 11:18:46 +0200665 struct ath9k_keyval *hk, const u8 *addr,
666 bool authenticator)
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700667{
Jouni Malinen6ace2892008-12-17 13:32:17 +0200668 const u8 *key_rxmic;
669 const u8 *key_txmic;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700670
Jouni Malinen6ace2892008-12-17 13:32:17 +0200671 key_txmic = key + NL80211_TKIP_DATA_OFFSET_TX_MIC_KEY;
672 key_rxmic = key + NL80211_TKIP_DATA_OFFSET_RX_MIC_KEY;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700673
674 if (addr == NULL) {
Jouni Malinend216aaa2009-03-03 13:11:53 +0200675 /*
676 * Group key installation - only two key cache entries are used
677 * regardless of splitmic capability since group key is only
678 * used either for TX or RX.
679 */
Jouni Malinen3f53dd62009-02-26 11:18:46 +0200680 if (authenticator) {
681 memcpy(hk->kv_mic, key_txmic, sizeof(hk->kv_mic));
682 memcpy(hk->kv_txmic, key_txmic, sizeof(hk->kv_mic));
683 } else {
684 memcpy(hk->kv_mic, key_rxmic, sizeof(hk->kv_mic));
685 memcpy(hk->kv_txmic, key_rxmic, sizeof(hk->kv_mic));
686 }
Jouni Malinend216aaa2009-03-03 13:11:53 +0200687 return ath9k_hw_set_keycache_entry(sc->sc_ah, keyix, hk, addr);
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700688 }
Sujith17d79042009-02-09 13:27:03 +0530689 if (!sc->splitmic) {
Jouni Malinend216aaa2009-03-03 13:11:53 +0200690 /* TX and RX keys share the same key cache entry. */
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700691 memcpy(hk->kv_mic, key_rxmic, sizeof(hk->kv_mic));
692 memcpy(hk->kv_txmic, key_txmic, sizeof(hk->kv_txmic));
Jouni Malinend216aaa2009-03-03 13:11:53 +0200693 return ath9k_hw_set_keycache_entry(sc->sc_ah, keyix, hk, addr);
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700694 }
Jouni Malinend216aaa2009-03-03 13:11:53 +0200695
696 /* Separate key cache entries for TX and RX */
697
698 /* TX key goes at first index, RX key at +32. */
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700699 memcpy(hk->kv_mic, key_txmic, sizeof(hk->kv_mic));
Jouni Malinend216aaa2009-03-03 13:11:53 +0200700 if (!ath9k_hw_set_keycache_entry(sc->sc_ah, keyix, hk, NULL)) {
701 /* TX MIC entry failed. No need to proceed further */
Sujithd8baa932009-03-30 15:28:25 +0530702 DPRINTF(sc, ATH_DBG_FATAL,
Sujith04bd4632008-11-28 22:18:05 +0530703 "Setting TX MIC Key Failed\n");
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700704 return 0;
705 }
706
707 memcpy(hk->kv_mic, key_rxmic, sizeof(hk->kv_mic));
708 /* XXX delete tx key on failure? */
Jouni Malinend216aaa2009-03-03 13:11:53 +0200709 return ath9k_hw_set_keycache_entry(sc->sc_ah, keyix + 32, hk, addr);
Jouni Malinen6ace2892008-12-17 13:32:17 +0200710}
711
712static int ath_reserve_key_cache_slot_tkip(struct ath_softc *sc)
713{
714 int i;
715
Sujith17d79042009-02-09 13:27:03 +0530716 for (i = IEEE80211_WEP_NKID; i < sc->keymax / 2; i++) {
717 if (test_bit(i, sc->keymap) ||
718 test_bit(i + 64, sc->keymap))
Jouni Malinen6ace2892008-12-17 13:32:17 +0200719 continue; /* At least one part of TKIP key allocated */
Sujith17d79042009-02-09 13:27:03 +0530720 if (sc->splitmic &&
721 (test_bit(i + 32, sc->keymap) ||
722 test_bit(i + 64 + 32, sc->keymap)))
Jouni Malinen6ace2892008-12-17 13:32:17 +0200723 continue; /* At least one part of TKIP key allocated */
724
725 /* Found a free slot for a TKIP key */
726 return i;
727 }
728 return -1;
729}
730
731static int ath_reserve_key_cache_slot(struct ath_softc *sc)
732{
733 int i;
734
735 /* First, try to find slots that would not be available for TKIP. */
Sujith17d79042009-02-09 13:27:03 +0530736 if (sc->splitmic) {
737 for (i = IEEE80211_WEP_NKID; i < sc->keymax / 4; i++) {
738 if (!test_bit(i, sc->keymap) &&
739 (test_bit(i + 32, sc->keymap) ||
740 test_bit(i + 64, sc->keymap) ||
741 test_bit(i + 64 + 32, sc->keymap)))
Jouni Malinen6ace2892008-12-17 13:32:17 +0200742 return i;
Sujith17d79042009-02-09 13:27:03 +0530743 if (!test_bit(i + 32, sc->keymap) &&
744 (test_bit(i, sc->keymap) ||
745 test_bit(i + 64, sc->keymap) ||
746 test_bit(i + 64 + 32, sc->keymap)))
Jouni Malinen6ace2892008-12-17 13:32:17 +0200747 return i + 32;
Sujith17d79042009-02-09 13:27:03 +0530748 if (!test_bit(i + 64, sc->keymap) &&
749 (test_bit(i , sc->keymap) ||
750 test_bit(i + 32, sc->keymap) ||
751 test_bit(i + 64 + 32, sc->keymap)))
Jouni Malinenea612132008-12-18 14:31:10 +0200752 return i + 64;
Sujith17d79042009-02-09 13:27:03 +0530753 if (!test_bit(i + 64 + 32, sc->keymap) &&
754 (test_bit(i, sc->keymap) ||
755 test_bit(i + 32, sc->keymap) ||
756 test_bit(i + 64, sc->keymap)))
Jouni Malinenea612132008-12-18 14:31:10 +0200757 return i + 64 + 32;
Jouni Malinen6ace2892008-12-17 13:32:17 +0200758 }
759 } else {
Sujith17d79042009-02-09 13:27:03 +0530760 for (i = IEEE80211_WEP_NKID; i < sc->keymax / 2; i++) {
761 if (!test_bit(i, sc->keymap) &&
762 test_bit(i + 64, sc->keymap))
Jouni Malinen6ace2892008-12-17 13:32:17 +0200763 return i;
Sujith17d79042009-02-09 13:27:03 +0530764 if (test_bit(i, sc->keymap) &&
765 !test_bit(i + 64, sc->keymap))
Jouni Malinen6ace2892008-12-17 13:32:17 +0200766 return i + 64;
767 }
768 }
769
770 /* No partially used TKIP slots, pick any available slot */
Sujith17d79042009-02-09 13:27:03 +0530771 for (i = IEEE80211_WEP_NKID; i < sc->keymax; i++) {
Jouni Malinenbe2864c2008-12-18 14:33:00 +0200772 /* Do not allow slots that could be needed for TKIP group keys
773 * to be used. This limitation could be removed if we know that
774 * TKIP will not be used. */
775 if (i >= 64 && i < 64 + IEEE80211_WEP_NKID)
776 continue;
Sujith17d79042009-02-09 13:27:03 +0530777 if (sc->splitmic) {
Jouni Malinenbe2864c2008-12-18 14:33:00 +0200778 if (i >= 32 && i < 32 + IEEE80211_WEP_NKID)
779 continue;
780 if (i >= 64 + 32 && i < 64 + 32 + IEEE80211_WEP_NKID)
781 continue;
782 }
783
Sujith17d79042009-02-09 13:27:03 +0530784 if (!test_bit(i, sc->keymap))
Jouni Malinen6ace2892008-12-17 13:32:17 +0200785 return i; /* Found a free slot for a key */
786 }
787
788 /* No free slot found */
789 return -1;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700790}
791
792static int ath_key_config(struct ath_softc *sc,
Jouni Malinen3f53dd62009-02-26 11:18:46 +0200793 struct ieee80211_vif *vif,
Johannes Bergdc822b52008-12-29 12:55:09 +0100794 struct ieee80211_sta *sta,
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700795 struct ieee80211_key_conf *key)
796{
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700797 struct ath9k_keyval hk;
798 const u8 *mac = NULL;
799 int ret = 0;
Jouni Malinen6ace2892008-12-17 13:32:17 +0200800 int idx;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700801
802 memset(&hk, 0, sizeof(hk));
803
804 switch (key->alg) {
805 case ALG_WEP:
806 hk.kv_type = ATH9K_CIPHER_WEP;
807 break;
808 case ALG_TKIP:
809 hk.kv_type = ATH9K_CIPHER_TKIP;
810 break;
811 case ALG_CCMP:
812 hk.kv_type = ATH9K_CIPHER_AES_CCM;
813 break;
814 default:
Jouni Malinenca470b22009-01-08 13:32:12 +0200815 return -EOPNOTSUPP;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700816 }
817
Jouni Malinen6ace2892008-12-17 13:32:17 +0200818 hk.kv_len = key->keylen;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700819 memcpy(hk.kv_val, key->key, key->keylen);
820
Jouni Malinen6ace2892008-12-17 13:32:17 +0200821 if (!(key->flags & IEEE80211_KEY_FLAG_PAIRWISE)) {
822 /* For now, use the default keys for broadcast keys. This may
823 * need to change with virtual interfaces. */
824 idx = key->keyidx;
825 } else if (key->keyidx) {
Johannes Bergdc822b52008-12-29 12:55:09 +0100826 if (WARN_ON(!sta))
827 return -EOPNOTSUPP;
828 mac = sta->addr;
829
Jouni Malinen6ace2892008-12-17 13:32:17 +0200830 if (vif->type != NL80211_IFTYPE_AP) {
831 /* Only keyidx 0 should be used with unicast key, but
832 * allow this for client mode for now. */
833 idx = key->keyidx;
834 } else
835 return -EIO;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700836 } else {
Johannes Bergdc822b52008-12-29 12:55:09 +0100837 if (WARN_ON(!sta))
838 return -EOPNOTSUPP;
839 mac = sta->addr;
840
Jouni Malinen6ace2892008-12-17 13:32:17 +0200841 if (key->alg == ALG_TKIP)
842 idx = ath_reserve_key_cache_slot_tkip(sc);
843 else
844 idx = ath_reserve_key_cache_slot(sc);
845 if (idx < 0)
Jouni Malinenca470b22009-01-08 13:32:12 +0200846 return -ENOSPC; /* no free key cache entries */
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700847 }
848
849 if (key->alg == ALG_TKIP)
Jouni Malinen3f53dd62009-02-26 11:18:46 +0200850 ret = ath_setkey_tkip(sc, idx, key->key, &hk, mac,
851 vif->type == NL80211_IFTYPE_AP);
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700852 else
Jouni Malinend216aaa2009-03-03 13:11:53 +0200853 ret = ath9k_hw_set_keycache_entry(sc->sc_ah, idx, &hk, mac);
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700854
855 if (!ret)
856 return -EIO;
857
Sujith17d79042009-02-09 13:27:03 +0530858 set_bit(idx, sc->keymap);
Jouni Malinen6ace2892008-12-17 13:32:17 +0200859 if (key->alg == ALG_TKIP) {
Sujith17d79042009-02-09 13:27:03 +0530860 set_bit(idx + 64, sc->keymap);
861 if (sc->splitmic) {
862 set_bit(idx + 32, sc->keymap);
863 set_bit(idx + 64 + 32, sc->keymap);
Jouni Malinen6ace2892008-12-17 13:32:17 +0200864 }
865 }
866
867 return idx;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700868}
869
870static void ath_key_delete(struct ath_softc *sc, struct ieee80211_key_conf *key)
871{
Jouni Malinen6ace2892008-12-17 13:32:17 +0200872 ath9k_hw_keyreset(sc->sc_ah, key->hw_key_idx);
873 if (key->hw_key_idx < IEEE80211_WEP_NKID)
874 return;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700875
Sujith17d79042009-02-09 13:27:03 +0530876 clear_bit(key->hw_key_idx, sc->keymap);
Jouni Malinen6ace2892008-12-17 13:32:17 +0200877 if (key->alg != ALG_TKIP)
878 return;
879
Sujith17d79042009-02-09 13:27:03 +0530880 clear_bit(key->hw_key_idx + 64, sc->keymap);
881 if (sc->splitmic) {
882 clear_bit(key->hw_key_idx + 32, sc->keymap);
883 clear_bit(key->hw_key_idx + 64 + 32, sc->keymap);
Jouni Malinen6ace2892008-12-17 13:32:17 +0200884 }
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700885}
886
Sujitheb2599c2009-01-23 11:20:44 +0530887static void setup_ht_cap(struct ath_softc *sc,
888 struct ieee80211_sta_ht_cap *ht_info)
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700889{
Senthil Balasubramanian140add22009-06-24 18:56:42 +0530890 u8 tx_streams, rx_streams;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700891
Johannes Bergd9fe60d2008-10-09 12:13:49 +0200892 ht_info->ht_supported = true;
893 ht_info->cap = IEEE80211_HT_CAP_SUP_WIDTH_20_40 |
894 IEEE80211_HT_CAP_SM_PS |
895 IEEE80211_HT_CAP_SGI_40 |
896 IEEE80211_HT_CAP_DSSSCCK40;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700897
Sujith9e98ac62009-07-23 15:32:34 +0530898 ht_info->ampdu_factor = IEEE80211_HT_MAX_AMPDU_64K;
899 ht_info->ampdu_density = IEEE80211_HT_MPDU_DENSITY_8;
Sujitheb2599c2009-01-23 11:20:44 +0530900
Johannes Bergd9fe60d2008-10-09 12:13:49 +0200901 /* set up supported mcs set */
902 memset(&ht_info->mcs, 0, sizeof(ht_info->mcs));
Senthil Balasubramanian140add22009-06-24 18:56:42 +0530903 tx_streams = !(sc->tx_chainmask & (sc->tx_chainmask - 1)) ? 1 : 2;
904 rx_streams = !(sc->rx_chainmask & (sc->rx_chainmask - 1)) ? 1 : 2;
Sujitheb2599c2009-01-23 11:20:44 +0530905
Senthil Balasubramanian140add22009-06-24 18:56:42 +0530906 if (tx_streams != rx_streams) {
907 DPRINTF(sc, ATH_DBG_CONFIG, "TX streams %d, RX streams: %d\n",
908 tx_streams, rx_streams);
909 ht_info->mcs.tx_params |= IEEE80211_HT_MCS_TX_RX_DIFF;
910 ht_info->mcs.tx_params |= ((tx_streams - 1) <<
911 IEEE80211_HT_MCS_TX_MAX_STREAMS_SHIFT);
Sujitheb2599c2009-01-23 11:20:44 +0530912 }
913
Senthil Balasubramanian140add22009-06-24 18:56:42 +0530914 ht_info->mcs.rx_mask[0] = 0xff;
915 if (rx_streams >= 2)
916 ht_info->mcs.rx_mask[1] = 0xff;
917
918 ht_info->mcs.tx_params |= IEEE80211_HT_MCS_TX_DEFINED;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700919}
920
Vasanthakumar Thiagarajan8feceb62008-09-10 18:49:27 +0530921static void ath9k_bss_assoc_info(struct ath_softc *sc,
Sujith5640b082008-10-29 10:16:06 +0530922 struct ieee80211_vif *vif,
Vasanthakumar Thiagarajan8feceb62008-09-10 18:49:27 +0530923 struct ieee80211_bss_conf *bss_conf)
924{
Vasanthakumar Thiagarajan8feceb62008-09-10 18:49:27 +0530925
926 if (bss_conf->assoc) {
Sujith094d05d2008-12-12 11:57:43 +0530927 DPRINTF(sc, ATH_DBG_CONFIG, "Bss Info ASSOC %d, bssid: %pM\n",
Sujith17d79042009-02-09 13:27:03 +0530928 bss_conf->aid, sc->curbssid);
Vasanthakumar Thiagarajan8feceb62008-09-10 18:49:27 +0530929
Vasanthakumar Thiagarajan8feceb62008-09-10 18:49:27 +0530930 /* New association, store aid */
Senthil Balasubramanian2664f202009-06-24 18:56:39 +0530931 sc->curaid = bss_conf->aid;
932 ath9k_hw_write_associd(sc);
Jouni Malinenccdfeab2009-05-20 21:59:08 +0300933
Senthil Balasubramanian2664f202009-06-24 18:56:39 +0530934 /*
935 * Request a re-configuration of Beacon related timers
936 * on the receipt of the first Beacon frame (i.e.,
937 * after time sync with the AP).
938 */
939 sc->sc_flags |= SC_OP_BEACON_SYNC;
Vasanthakumar Thiagarajan8feceb62008-09-10 18:49:27 +0530940
941 /* Configure the beacon */
Jouni Malinen2c3db3d2009-03-03 19:23:26 +0200942 ath_beacon_config(sc, vif);
Vasanthakumar Thiagarajan8feceb62008-09-10 18:49:27 +0530943
944 /* Reset rssi stats */
Sujith17d79042009-02-09 13:27:03 +0530945 sc->nodestats.ns_avgbrssi = ATH_RSSI_DUMMY_MARKER;
946 sc->nodestats.ns_avgrssi = ATH_RSSI_DUMMY_MARKER;
947 sc->nodestats.ns_avgtxrssi = ATH_RSSI_DUMMY_MARKER;
948 sc->nodestats.ns_avgtxrate = ATH_RATE_DUMMY_MARKER;
Vasanthakumar Thiagarajan8feceb62008-09-10 18:49:27 +0530949
Sujith415f7382009-04-13 21:56:46 +0530950 ath_start_ani(sc);
Vasanthakumar Thiagarajan8feceb62008-09-10 18:49:27 +0530951 } else {
Sujith1ffb0612009-03-30 15:28:46 +0530952 DPRINTF(sc, ATH_DBG_CONFIG, "Bss Info DISASSOC\n");
Sujith17d79042009-02-09 13:27:03 +0530953 sc->curaid = 0;
Senthil Balasubramanianf38faa32009-06-24 18:56:40 +0530954 /* Stop ANI */
955 del_timer_sync(&sc->ani.timer);
Vasanthakumar Thiagarajan8feceb62008-09-10 18:49:27 +0530956 }
957}
958
Vasanthakumar Thiagarajan8feceb62008-09-10 18:49:27 +0530959/********************************/
960/* LED functions */
961/********************************/
962
Vasanthakumar Thiagarajanf2bffa72009-01-29 17:52:19 +0530963static void ath_led_blink_work(struct work_struct *work)
964{
965 struct ath_softc *sc = container_of(work, struct ath_softc,
966 ath_led_blink_work.work);
967
968 if (!(sc->sc_flags & SC_OP_LED_ASSOCIATED))
969 return;
Vasanthakumar Thiagarajan85067c02009-03-14 19:59:41 +0530970
971 if ((sc->led_on_duration == ATH_LED_ON_DURATION_IDLE) ||
972 (sc->led_off_duration == ATH_LED_OFF_DURATION_IDLE))
973 ath9k_hw_set_gpio(sc->sc_ah, ATH_LED_PIN, 0);
974 else
975 ath9k_hw_set_gpio(sc->sc_ah, ATH_LED_PIN,
976 (sc->sc_flags & SC_OP_LED_ON) ? 1 : 0);
Vasanthakumar Thiagarajanf2bffa72009-01-29 17:52:19 +0530977
978 queue_delayed_work(sc->hw->workqueue, &sc->ath_led_blink_work,
979 (sc->sc_flags & SC_OP_LED_ON) ?
980 msecs_to_jiffies(sc->led_off_duration) :
981 msecs_to_jiffies(sc->led_on_duration));
982
Vasanthakumar Thiagarajan85067c02009-03-14 19:59:41 +0530983 sc->led_on_duration = sc->led_on_cnt ?
984 max((ATH_LED_ON_DURATION_IDLE - sc->led_on_cnt), 25) :
985 ATH_LED_ON_DURATION_IDLE;
986 sc->led_off_duration = sc->led_off_cnt ?
987 max((ATH_LED_OFF_DURATION_IDLE - sc->led_off_cnt), 10) :
988 ATH_LED_OFF_DURATION_IDLE;
Vasanthakumar Thiagarajanf2bffa72009-01-29 17:52:19 +0530989 sc->led_on_cnt = sc->led_off_cnt = 0;
990 if (sc->sc_flags & SC_OP_LED_ON)
991 sc->sc_flags &= ~SC_OP_LED_ON;
992 else
993 sc->sc_flags |= SC_OP_LED_ON;
994}
995
Vasanthakumar Thiagarajan8feceb62008-09-10 18:49:27 +0530996static void ath_led_brightness(struct led_classdev *led_cdev,
997 enum led_brightness brightness)
998{
999 struct ath_led *led = container_of(led_cdev, struct ath_led, led_cdev);
1000 struct ath_softc *sc = led->sc;
1001
1002 switch (brightness) {
1003 case LED_OFF:
1004 if (led->led_type == ATH_LED_ASSOC ||
Vasanthakumar Thiagarajanf2bffa72009-01-29 17:52:19 +05301005 led->led_type == ATH_LED_RADIO) {
1006 ath9k_hw_set_gpio(sc->sc_ah, ATH_LED_PIN,
1007 (led->led_type == ATH_LED_RADIO));
Vasanthakumar Thiagarajan8feceb62008-09-10 18:49:27 +05301008 sc->sc_flags &= ~SC_OP_LED_ASSOCIATED;
Vasanthakumar Thiagarajanf2bffa72009-01-29 17:52:19 +05301009 if (led->led_type == ATH_LED_RADIO)
1010 sc->sc_flags &= ~SC_OP_LED_ON;
1011 } else {
1012 sc->led_off_cnt++;
1013 }
Vasanthakumar Thiagarajan8feceb62008-09-10 18:49:27 +05301014 break;
1015 case LED_FULL:
Vasanthakumar Thiagarajanf2bffa72009-01-29 17:52:19 +05301016 if (led->led_type == ATH_LED_ASSOC) {
Vasanthakumar Thiagarajan8feceb62008-09-10 18:49:27 +05301017 sc->sc_flags |= SC_OP_LED_ASSOCIATED;
Vasanthakumar Thiagarajanf2bffa72009-01-29 17:52:19 +05301018 queue_delayed_work(sc->hw->workqueue,
1019 &sc->ath_led_blink_work, 0);
1020 } else if (led->led_type == ATH_LED_RADIO) {
1021 ath9k_hw_set_gpio(sc->sc_ah, ATH_LED_PIN, 0);
1022 sc->sc_flags |= SC_OP_LED_ON;
1023 } else {
1024 sc->led_on_cnt++;
1025 }
Vasanthakumar Thiagarajan8feceb62008-09-10 18:49:27 +05301026 break;
1027 default:
1028 break;
1029 }
1030}
1031
1032static int ath_register_led(struct ath_softc *sc, struct ath_led *led,
1033 char *trigger)
1034{
1035 int ret;
1036
1037 led->sc = sc;
1038 led->led_cdev.name = led->name;
1039 led->led_cdev.default_trigger = trigger;
1040 led->led_cdev.brightness_set = ath_led_brightness;
1041
1042 ret = led_classdev_register(wiphy_dev(sc->hw->wiphy), &led->led_cdev);
1043 if (ret)
1044 DPRINTF(sc, ATH_DBG_FATAL,
1045 "Failed to register led:%s", led->name);
1046 else
1047 led->registered = 1;
1048 return ret;
1049}
1050
1051static void ath_unregister_led(struct ath_led *led)
1052{
1053 if (led->registered) {
1054 led_classdev_unregister(&led->led_cdev);
1055 led->registered = 0;
1056 }
1057}
1058
1059static void ath_deinit_leds(struct ath_softc *sc)
1060{
Vasanthakumar Thiagarajanf2bffa72009-01-29 17:52:19 +05301061 cancel_delayed_work_sync(&sc->ath_led_blink_work);
Vasanthakumar Thiagarajan8feceb62008-09-10 18:49:27 +05301062 ath_unregister_led(&sc->assoc_led);
1063 sc->sc_flags &= ~SC_OP_LED_ASSOCIATED;
1064 ath_unregister_led(&sc->tx_led);
1065 ath_unregister_led(&sc->rx_led);
1066 ath_unregister_led(&sc->radio_led);
1067 ath9k_hw_set_gpio(sc->sc_ah, ATH_LED_PIN, 1);
1068}
1069
1070static void ath_init_leds(struct ath_softc *sc)
1071{
1072 char *trigger;
1073 int ret;
1074
1075 /* Configure gpio 1 for output */
1076 ath9k_hw_cfg_output(sc->sc_ah, ATH_LED_PIN,
1077 AR_GPIO_OUTPUT_MUX_AS_OUTPUT);
1078 /* LED off, active low */
1079 ath9k_hw_set_gpio(sc->sc_ah, ATH_LED_PIN, 1);
1080
Vasanthakumar Thiagarajanf2bffa72009-01-29 17:52:19 +05301081 INIT_DELAYED_WORK(&sc->ath_led_blink_work, ath_led_blink_work);
1082
Vasanthakumar Thiagarajan8feceb62008-09-10 18:49:27 +05301083 trigger = ieee80211_get_radio_led_name(sc->hw);
1084 snprintf(sc->radio_led.name, sizeof(sc->radio_led.name),
Danny Kukawka0818cb82009-01-31 15:52:09 +01001085 "ath9k-%s::radio", wiphy_name(sc->hw->wiphy));
Vasanthakumar Thiagarajan8feceb62008-09-10 18:49:27 +05301086 ret = ath_register_led(sc, &sc->radio_led, trigger);
1087 sc->radio_led.led_type = ATH_LED_RADIO;
1088 if (ret)
1089 goto fail;
1090
1091 trigger = ieee80211_get_assoc_led_name(sc->hw);
1092 snprintf(sc->assoc_led.name, sizeof(sc->assoc_led.name),
Danny Kukawka0818cb82009-01-31 15:52:09 +01001093 "ath9k-%s::assoc", wiphy_name(sc->hw->wiphy));
Vasanthakumar Thiagarajan8feceb62008-09-10 18:49:27 +05301094 ret = ath_register_led(sc, &sc->assoc_led, trigger);
1095 sc->assoc_led.led_type = ATH_LED_ASSOC;
1096 if (ret)
1097 goto fail;
1098
1099 trigger = ieee80211_get_tx_led_name(sc->hw);
1100 snprintf(sc->tx_led.name, sizeof(sc->tx_led.name),
Danny Kukawka0818cb82009-01-31 15:52:09 +01001101 "ath9k-%s::tx", wiphy_name(sc->hw->wiphy));
Vasanthakumar Thiagarajan8feceb62008-09-10 18:49:27 +05301102 ret = ath_register_led(sc, &sc->tx_led, trigger);
1103 sc->tx_led.led_type = ATH_LED_TX;
1104 if (ret)
1105 goto fail;
1106
1107 trigger = ieee80211_get_rx_led_name(sc->hw);
1108 snprintf(sc->rx_led.name, sizeof(sc->rx_led.name),
Danny Kukawka0818cb82009-01-31 15:52:09 +01001109 "ath9k-%s::rx", wiphy_name(sc->hw->wiphy));
Vasanthakumar Thiagarajan8feceb62008-09-10 18:49:27 +05301110 ret = ath_register_led(sc, &sc->rx_led, trigger);
1111 sc->rx_led.led_type = ATH_LED_RX;
1112 if (ret)
1113 goto fail;
1114
1115 return;
1116
1117fail:
1118 ath_deinit_leds(sc);
1119}
1120
Jouni Malinen7ec3e512009-03-03 19:23:37 +02001121void ath_radio_enable(struct ath_softc *sc)
Vasanthakumar Thiagarajan500c0642008-09-10 18:50:17 +05301122{
Sujithcbe61d82009-02-09 13:27:12 +05301123 struct ath_hw *ah = sc->sc_ah;
Luis R. Rodriguezae8d2852008-12-23 15:58:40 -08001124 struct ieee80211_channel *channel = sc->hw->conf.channel;
1125 int r;
Vasanthakumar Thiagarajan500c0642008-09-10 18:50:17 +05301126
Vivek Natarajan3cbb5dd2009-01-20 11:17:08 +05301127 ath9k_ps_wakeup(sc);
Sujithd2f5b3a2009-04-13 21:56:25 +05301128 ath9k_hw_configpcipowersave(ah, 0);
1129
Vasanthakumar Thiagarajan159cd462009-06-13 14:50:25 +05301130 if (!ah->curchan)
1131 ah->curchan = ath_get_curchannel(sc, sc->hw);
1132
Vasanthakumar Thiagarajan500c0642008-09-10 18:50:17 +05301133 spin_lock_bh(&sc->sc_resetlock);
Sujith2660b812009-02-09 13:27:26 +05301134 r = ath9k_hw_reset(ah, ah->curchan, false);
Luis R. Rodriguezae8d2852008-12-23 15:58:40 -08001135 if (r) {
Vasanthakumar Thiagarajan500c0642008-09-10 18:50:17 +05301136 DPRINTF(sc, ATH_DBG_FATAL,
Luis R. Rodriguezae8d2852008-12-23 15:58:40 -08001137 "Unable to reset channel %u (%uMhz) ",
Vasanthakumar Thiagarajan6b457842009-05-15 18:59:20 +05301138 "reset status %d\n",
Luis R. Rodriguezae8d2852008-12-23 15:58:40 -08001139 channel->center_freq, r);
Vasanthakumar Thiagarajan500c0642008-09-10 18:50:17 +05301140 }
1141 spin_unlock_bh(&sc->sc_resetlock);
1142
1143 ath_update_txpow(sc);
1144 if (ath_startrecv(sc) != 0) {
1145 DPRINTF(sc, ATH_DBG_FATAL,
Sujith04bd4632008-11-28 22:18:05 +05301146 "Unable to restart recv logic\n");
Vasanthakumar Thiagarajan500c0642008-09-10 18:50:17 +05301147 return;
1148 }
1149
1150 if (sc->sc_flags & SC_OP_BEACONS)
Jouni Malinen2c3db3d2009-03-03 19:23:26 +02001151 ath_beacon_config(sc, NULL); /* restart beacons */
Vasanthakumar Thiagarajan500c0642008-09-10 18:50:17 +05301152
1153 /* Re-Enable interrupts */
Sujith17d79042009-02-09 13:27:03 +05301154 ath9k_hw_set_interrupts(ah, sc->imask);
Vasanthakumar Thiagarajan500c0642008-09-10 18:50:17 +05301155
1156 /* Enable LED */
1157 ath9k_hw_cfg_output(ah, ATH_LED_PIN,
1158 AR_GPIO_OUTPUT_MUX_AS_OUTPUT);
1159 ath9k_hw_set_gpio(ah, ATH_LED_PIN, 0);
1160
1161 ieee80211_wake_queues(sc->hw);
Vivek Natarajan3cbb5dd2009-01-20 11:17:08 +05301162 ath9k_ps_restore(sc);
Vasanthakumar Thiagarajan500c0642008-09-10 18:50:17 +05301163}
1164
Jouni Malinen7ec3e512009-03-03 19:23:37 +02001165void ath_radio_disable(struct ath_softc *sc)
Vasanthakumar Thiagarajan500c0642008-09-10 18:50:17 +05301166{
Sujithcbe61d82009-02-09 13:27:12 +05301167 struct ath_hw *ah = sc->sc_ah;
Luis R. Rodriguezae8d2852008-12-23 15:58:40 -08001168 struct ieee80211_channel *channel = sc->hw->conf.channel;
1169 int r;
Vasanthakumar Thiagarajan500c0642008-09-10 18:50:17 +05301170
Vivek Natarajan3cbb5dd2009-01-20 11:17:08 +05301171 ath9k_ps_wakeup(sc);
Vasanthakumar Thiagarajan500c0642008-09-10 18:50:17 +05301172 ieee80211_stop_queues(sc->hw);
1173
1174 /* Disable LED */
1175 ath9k_hw_set_gpio(ah, ATH_LED_PIN, 1);
1176 ath9k_hw_cfg_gpio_input(ah, ATH_LED_PIN);
1177
1178 /* Disable interrupts */
1179 ath9k_hw_set_interrupts(ah, 0);
1180
Sujith043a0402009-01-16 21:38:47 +05301181 ath_drain_all_txq(sc, false); /* clear pending tx frames */
Vasanthakumar Thiagarajan500c0642008-09-10 18:50:17 +05301182 ath_stoprecv(sc); /* turn off frame recv */
1183 ath_flushrecv(sc); /* flush recv queue */
1184
Vasanthakumar Thiagarajan159cd462009-06-13 14:50:25 +05301185 if (!ah->curchan)
1186 ah->curchan = ath_get_curchannel(sc, sc->hw);
1187
Vasanthakumar Thiagarajan500c0642008-09-10 18:50:17 +05301188 spin_lock_bh(&sc->sc_resetlock);
Sujith2660b812009-02-09 13:27:26 +05301189 r = ath9k_hw_reset(ah, ah->curchan, false);
Luis R. Rodriguezae8d2852008-12-23 15:58:40 -08001190 if (r) {
Vasanthakumar Thiagarajan500c0642008-09-10 18:50:17 +05301191 DPRINTF(sc, ATH_DBG_FATAL,
Sujith04bd4632008-11-28 22:18:05 +05301192 "Unable to reset channel %u (%uMhz) "
Vasanthakumar Thiagarajan6b457842009-05-15 18:59:20 +05301193 "reset status %d\n",
Luis R. Rodriguezae8d2852008-12-23 15:58:40 -08001194 channel->center_freq, r);
Vasanthakumar Thiagarajan500c0642008-09-10 18:50:17 +05301195 }
1196 spin_unlock_bh(&sc->sc_resetlock);
1197
1198 ath9k_hw_phy_disable(ah);
Sujithd2f5b3a2009-04-13 21:56:25 +05301199 ath9k_hw_configpcipowersave(ah, 1);
Vivek Natarajan3cbb5dd2009-01-20 11:17:08 +05301200 ath9k_ps_restore(sc);
Gabor Juhos38ab4222009-06-17 20:53:21 +02001201 ath9k_hw_setpower(ah, ATH9K_PM_FULL_SLEEP);
Vasanthakumar Thiagarajan500c0642008-09-10 18:50:17 +05301202}
1203
Gabor Juhos5077fd32009-03-06 11:17:55 +01001204/*******************/
1205/* Rfkill */
1206/*******************/
1207
Vasanthakumar Thiagarajan500c0642008-09-10 18:50:17 +05301208static bool ath_is_rfkill_set(struct ath_softc *sc)
1209{
Sujithcbe61d82009-02-09 13:27:12 +05301210 struct ath_hw *ah = sc->sc_ah;
Vasanthakumar Thiagarajan500c0642008-09-10 18:50:17 +05301211
Sujith2660b812009-02-09 13:27:26 +05301212 return ath9k_hw_gpio_get(ah, ah->rfkill_gpio) ==
1213 ah->rfkill_polarity;
Vasanthakumar Thiagarajan500c0642008-09-10 18:50:17 +05301214}
1215
Johannes Berg3b319aa2009-06-13 14:50:26 +05301216static void ath9k_rfkill_poll_state(struct ieee80211_hw *hw)
Vasanthakumar Thiagarajan500c0642008-09-10 18:50:17 +05301217{
Johannes Berg3b319aa2009-06-13 14:50:26 +05301218 struct ath_wiphy *aphy = hw->priv;
1219 struct ath_softc *sc = aphy->sc;
1220 bool blocked = !!ath_is_rfkill_set(sc);
1221
1222 wiphy_rfkill_set_hw_state(hw->wiphy, blocked);
Vasanthakumar Thiagarajan500c0642008-09-10 18:50:17 +05301223
Johannes Berg19d337d2009-06-02 13:01:37 +02001224 if (blocked)
1225 ath_radio_disable(sc);
1226 else
1227 ath_radio_enable(sc);
Johannes Berg19d337d2009-06-02 13:01:37 +02001228}
1229
Johannes Berg3b319aa2009-06-13 14:50:26 +05301230static void ath_start_rfkill_poll(struct ath_softc *sc)
Johannes Berg19d337d2009-06-02 13:01:37 +02001231{
Johannes Berg3b319aa2009-06-13 14:50:26 +05301232 struct ath_hw *ah = sc->sc_ah;
Johannes Berg19d337d2009-06-02 13:01:37 +02001233
Johannes Berg3b319aa2009-06-13 14:50:26 +05301234 if (ah->caps.hw_caps & ATH9K_HW_CAP_RFSILENT)
1235 wiphy_rfkill_start_polling(sc->hw->wiphy);
Vasanthakumar Thiagarajan500c0642008-09-10 18:50:17 +05301236}
1237
Gabor Juhos6baff7f2009-01-14 20:17:06 +01001238void ath_cleanup(struct ath_softc *sc)
Gabor Juhos39c3c2f2009-01-14 20:17:05 +01001239{
1240 ath_detach(sc);
1241 free_irq(sc->irq, sc);
1242 ath_bus_cleanup(sc);
Jouni Malinenc52f33d2009-03-03 19:23:29 +02001243 kfree(sc->sec_wiphy);
Gabor Juhos39c3c2f2009-01-14 20:17:05 +01001244 ieee80211_free_hw(sc->hw);
1245}
1246
Gabor Juhos6baff7f2009-01-14 20:17:06 +01001247void ath_detach(struct ath_softc *sc)
Vasanthakumar Thiagarajan8feceb62008-09-10 18:49:27 +05301248{
1249 struct ieee80211_hw *hw = sc->hw;
Sujith9c84b792008-10-29 10:17:13 +05301250 int i = 0;
Vasanthakumar Thiagarajan8feceb62008-09-10 18:49:27 +05301251
Vivek Natarajan3cbb5dd2009-01-20 11:17:08 +05301252 ath9k_ps_wakeup(sc);
1253
Sujith04bd4632008-11-28 22:18:05 +05301254 DPRINTF(sc, ATH_DBG_CONFIG, "Detach ATH hw\n");
Vasanthakumar Thiagarajan8feceb62008-09-10 18:49:27 +05301255
Vasanthakumar Thiagarajan3fcdfb42008-11-18 01:19:56 +05301256 ath_deinit_leds(sc);
Jouni Malinen0e2dedf2009-03-03 19:23:32 +02001257 cancel_work_sync(&sc->chan_work);
Jouni Malinenf98c3bd2009-03-03 19:23:39 +02001258 cancel_delayed_work_sync(&sc->wiphy_work);
Senthil Balasubramanian164ace32009-07-14 20:17:09 -04001259 cancel_delayed_work_sync(&sc->tx_complete_work);
Vasanthakumar Thiagarajan3fcdfb42008-11-18 01:19:56 +05301260
Jouni Malinenc52f33d2009-03-03 19:23:29 +02001261 for (i = 0; i < sc->num_sec_wiphy; i++) {
1262 struct ath_wiphy *aphy = sc->sec_wiphy[i];
1263 if (aphy == NULL)
1264 continue;
1265 sc->sec_wiphy[i] = NULL;
1266 ieee80211_unregister_hw(aphy->hw);
1267 ieee80211_free_hw(aphy->hw);
1268 }
Vasanthakumar Thiagarajan3fcdfb42008-11-18 01:19:56 +05301269 ieee80211_unregister_hw(hw);
Vasanthakumar Thiagarajan8feceb62008-09-10 18:49:27 +05301270 ath_rx_cleanup(sc);
1271 ath_tx_cleanup(sc);
1272
Sujith9c84b792008-10-29 10:17:13 +05301273 tasklet_kill(&sc->intr_tq);
1274 tasklet_kill(&sc->bcon_tasklet);
Vasanthakumar Thiagarajan8feceb62008-09-10 18:49:27 +05301275
Sujith9c84b792008-10-29 10:17:13 +05301276 if (!(sc->sc_flags & SC_OP_INVALID))
1277 ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_AWAKE);
Vasanthakumar Thiagarajan8feceb62008-09-10 18:49:27 +05301278
Sujith9c84b792008-10-29 10:17:13 +05301279 /* cleanup tx queues */
1280 for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++)
1281 if (ATH_TXQ_SETUP(sc, i))
Sujithb77f4832008-12-07 21:44:03 +05301282 ath_tx_cleanupq(sc, &sc->tx.txq[i]);
Sujith9c84b792008-10-29 10:17:13 +05301283
1284 ath9k_hw_detach(sc->sc_ah);
Sujith826d2682008-11-28 22:20:23 +05301285 ath9k_exit_debug(sc);
Vasanthakumar Thiagarajan8feceb62008-09-10 18:49:27 +05301286}
1287
Bob Copelande3bb2492009-03-30 22:30:30 -04001288static int ath9k_reg_notifier(struct wiphy *wiphy,
1289 struct regulatory_request *request)
1290{
1291 struct ieee80211_hw *hw = wiphy_to_ieee80211_hw(wiphy);
1292 struct ath_wiphy *aphy = hw->priv;
1293 struct ath_softc *sc = aphy->sc;
1294 struct ath_regulatory *reg = &sc->sc_ah->regulatory;
1295
1296 return ath_reg_notifier_apply(wiphy, request, reg);
1297}
1298
Sujithff37e332008-11-24 12:07:55 +05301299static int ath_init(u16 devid, struct ath_softc *sc)
1300{
Sujithcbe61d82009-02-09 13:27:12 +05301301 struct ath_hw *ah = NULL;
Sujithff37e332008-11-24 12:07:55 +05301302 int status;
1303 int error = 0, i;
1304 int csz = 0;
1305
1306 /* XXX: hardware will not be ready until ath_open() being called */
1307 sc->sc_flags |= SC_OP_INVALID;
Sujith88b126a2008-11-28 22:19:02 +05301308
Sujith826d2682008-11-28 22:20:23 +05301309 if (ath9k_init_debug(sc) < 0)
1310 printk(KERN_ERR "Unable to create debugfs files\n");
Sujithff37e332008-11-24 12:07:55 +05301311
Jouni Malinenc52f33d2009-03-03 19:23:29 +02001312 spin_lock_init(&sc->wiphy_lock);
Sujithff37e332008-11-24 12:07:55 +05301313 spin_lock_init(&sc->sc_resetlock);
Luis R. Rodriguez61584252009-03-12 18:18:49 -04001314 spin_lock_init(&sc->sc_serial_rw);
Senthil Balasubramaniane5f09212009-06-24 18:56:41 +05301315 spin_lock_init(&sc->ani_lock);
Gabor Juhos04717cc2009-07-14 20:17:13 -04001316 spin_lock_init(&sc->sc_pm_lock);
Sujithaa33de02008-12-18 11:40:16 +05301317 mutex_init(&sc->mutex);
Sujithff37e332008-11-24 12:07:55 +05301318 tasklet_init(&sc->intr_tq, ath9k_tasklet, (unsigned long)sc);
Sujith9fc9ab02009-03-03 10:16:51 +05301319 tasklet_init(&sc->bcon_tasklet, ath_beacon_tasklet,
Sujithff37e332008-11-24 12:07:55 +05301320 (unsigned long)sc);
1321
1322 /*
1323 * Cache line size is used to size and align various
1324 * structures used to communicate with the hardware.
1325 */
Gabor Juhos88d15702009-01-14 20:17:04 +01001326 ath_read_cachesize(sc, &csz);
Sujithff37e332008-11-24 12:07:55 +05301327 /* XXX assert csz is non-zero */
Sujith17d79042009-02-09 13:27:03 +05301328 sc->cachelsz = csz << 2; /* convert to bytes */
Sujithff37e332008-11-24 12:07:55 +05301329
Sujithcbe61d82009-02-09 13:27:12 +05301330 ah = ath9k_hw_attach(devid, sc, &status);
Sujithff37e332008-11-24 12:07:55 +05301331 if (ah == NULL) {
1332 DPRINTF(sc, ATH_DBG_FATAL,
Gabor Juhos295834f2008-12-29 21:07:42 +01001333 "Unable to attach hardware; HAL status %d\n", status);
Sujithff37e332008-11-24 12:07:55 +05301334 error = -ENXIO;
1335 goto bad;
1336 }
1337 sc->sc_ah = ah;
1338
1339 /* Get the hardware key cache size. */
Sujith2660b812009-02-09 13:27:26 +05301340 sc->keymax = ah->caps.keycache_size;
Sujith17d79042009-02-09 13:27:03 +05301341 if (sc->keymax > ATH_KEYMAX) {
Sujithd8baa932009-03-30 15:28:25 +05301342 DPRINTF(sc, ATH_DBG_ANY,
Sujith04bd4632008-11-28 22:18:05 +05301343 "Warning, using only %u entries in %u key cache\n",
Sujith17d79042009-02-09 13:27:03 +05301344 ATH_KEYMAX, sc->keymax);
1345 sc->keymax = ATH_KEYMAX;
Sujithff37e332008-11-24 12:07:55 +05301346 }
1347
1348 /*
1349 * Reset the key cache since some parts do not
1350 * reset the contents on initial power up.
1351 */
Sujith17d79042009-02-09 13:27:03 +05301352 for (i = 0; i < sc->keymax; i++)
Sujithff37e332008-11-24 12:07:55 +05301353 ath9k_hw_keyreset(ah, (u16) i);
Sujithff37e332008-11-24 12:07:55 +05301354
Luis R. Rodriguez85efc862009-04-13 21:41:46 -04001355 if (error)
Sujithff37e332008-11-24 12:07:55 +05301356 goto bad;
1357
1358 /* default to MONITOR mode */
Sujith2660b812009-02-09 13:27:26 +05301359 sc->sc_ah->opmode = NL80211_IFTYPE_MONITOR;
Colin McCabed97809d2008-12-01 13:38:55 -08001360
Sujithff37e332008-11-24 12:07:55 +05301361 /* Setup rate tables */
1362
1363 ath_rate_attach(sc);
1364 ath_setup_rates(sc, IEEE80211_BAND_2GHZ);
1365 ath_setup_rates(sc, IEEE80211_BAND_5GHZ);
1366
1367 /*
1368 * Allocate hardware transmit queues: one queue for
1369 * beacon frames and one data queue for each QoS
1370 * priority. Note that the hal handles reseting
1371 * these queues at the needed time.
1372 */
Sujithb77f4832008-12-07 21:44:03 +05301373 sc->beacon.beaconq = ath_beaconq_setup(ah);
1374 if (sc->beacon.beaconq == -1) {
Sujithff37e332008-11-24 12:07:55 +05301375 DPRINTF(sc, ATH_DBG_FATAL,
Sujith04bd4632008-11-28 22:18:05 +05301376 "Unable to setup a beacon xmit queue\n");
Sujithff37e332008-11-24 12:07:55 +05301377 error = -EIO;
1378 goto bad2;
1379 }
Sujithb77f4832008-12-07 21:44:03 +05301380 sc->beacon.cabq = ath_txq_setup(sc, ATH9K_TX_QUEUE_CAB, 0);
1381 if (sc->beacon.cabq == NULL) {
Sujithff37e332008-11-24 12:07:55 +05301382 DPRINTF(sc, ATH_DBG_FATAL,
Sujith04bd4632008-11-28 22:18:05 +05301383 "Unable to setup CAB xmit queue\n");
Sujithff37e332008-11-24 12:07:55 +05301384 error = -EIO;
1385 goto bad2;
1386 }
1387
Sujith17d79042009-02-09 13:27:03 +05301388 sc->config.cabqReadytime = ATH_CABQ_READY_TIME;
Sujithff37e332008-11-24 12:07:55 +05301389 ath_cabq_update(sc);
1390
Sujithb77f4832008-12-07 21:44:03 +05301391 for (i = 0; i < ARRAY_SIZE(sc->tx.hwq_map); i++)
1392 sc->tx.hwq_map[i] = -1;
Sujithff37e332008-11-24 12:07:55 +05301393
1394 /* Setup data queues */
1395 /* NB: ensure BK queue is the lowest priority h/w queue */
1396 if (!ath_tx_setup(sc, ATH9K_WME_AC_BK)) {
1397 DPRINTF(sc, ATH_DBG_FATAL,
Sujith04bd4632008-11-28 22:18:05 +05301398 "Unable to setup xmit queue for BK traffic\n");
Sujithff37e332008-11-24 12:07:55 +05301399 error = -EIO;
1400 goto bad2;
1401 }
1402
1403 if (!ath_tx_setup(sc, ATH9K_WME_AC_BE)) {
1404 DPRINTF(sc, ATH_DBG_FATAL,
Sujith04bd4632008-11-28 22:18:05 +05301405 "Unable to setup xmit queue for BE traffic\n");
Sujithff37e332008-11-24 12:07:55 +05301406 error = -EIO;
1407 goto bad2;
1408 }
1409 if (!ath_tx_setup(sc, ATH9K_WME_AC_VI)) {
1410 DPRINTF(sc, ATH_DBG_FATAL,
Sujith04bd4632008-11-28 22:18:05 +05301411 "Unable to setup xmit queue for VI traffic\n");
Sujithff37e332008-11-24 12:07:55 +05301412 error = -EIO;
1413 goto bad2;
1414 }
1415 if (!ath_tx_setup(sc, ATH9K_WME_AC_VO)) {
1416 DPRINTF(sc, ATH_DBG_FATAL,
Sujith04bd4632008-11-28 22:18:05 +05301417 "Unable to setup xmit queue for VO traffic\n");
Sujithff37e332008-11-24 12:07:55 +05301418 error = -EIO;
1419 goto bad2;
1420 }
1421
1422 /* Initializes the noise floor to a reasonable default value.
1423 * Later on this will be updated during ANI processing. */
1424
Sujith17d79042009-02-09 13:27:03 +05301425 sc->ani.noise_floor = ATH_DEFAULT_NOISE_FLOOR;
1426 setup_timer(&sc->ani.timer, ath_ani_calibrate, (unsigned long)sc);
Sujithff37e332008-11-24 12:07:55 +05301427
1428 if (ath9k_hw_getcapability(ah, ATH9K_CAP_CIPHER,
1429 ATH9K_CIPHER_TKIP, NULL)) {
1430 /*
1431 * Whether we should enable h/w TKIP MIC.
1432 * XXX: if we don't support WME TKIP MIC, then we wouldn't
1433 * report WMM capable, so it's always safe to turn on
1434 * TKIP MIC in this case.
1435 */
1436 ath9k_hw_setcapability(sc->sc_ah, ATH9K_CAP_TKIP_MIC,
1437 0, 1, NULL);
1438 }
1439
1440 /*
1441 * Check whether the separate key cache entries
1442 * are required to handle both tx+rx MIC keys.
1443 * With split mic keys the number of stations is limited
1444 * to 27 otherwise 59.
1445 */
1446 if (ath9k_hw_getcapability(ah, ATH9K_CAP_CIPHER,
1447 ATH9K_CIPHER_TKIP, NULL)
1448 && ath9k_hw_getcapability(ah, ATH9K_CAP_CIPHER,
1449 ATH9K_CIPHER_MIC, NULL)
1450 && ath9k_hw_getcapability(ah, ATH9K_CAP_TKIP_SPLIT,
1451 0, NULL))
Sujith17d79042009-02-09 13:27:03 +05301452 sc->splitmic = 1;
Sujithff37e332008-11-24 12:07:55 +05301453
1454 /* turn on mcast key search if possible */
1455 if (!ath9k_hw_getcapability(ah, ATH9K_CAP_MCAST_KEYSRCH, 0, NULL))
1456 (void)ath9k_hw_setcapability(ah, ATH9K_CAP_MCAST_KEYSRCH, 1,
1457 1, NULL);
1458
Sujith17d79042009-02-09 13:27:03 +05301459 sc->config.txpowlimit = ATH_TXPOWER_MAX;
Sujithff37e332008-11-24 12:07:55 +05301460
1461 /* 11n Capabilities */
Sujith2660b812009-02-09 13:27:26 +05301462 if (ah->caps.hw_caps & ATH9K_HW_CAP_HT) {
Sujithff37e332008-11-24 12:07:55 +05301463 sc->sc_flags |= SC_OP_TXAGGR;
1464 sc->sc_flags |= SC_OP_RXAGGR;
1465 }
1466
Sujith2660b812009-02-09 13:27:26 +05301467 sc->tx_chainmask = ah->caps.tx_chainmask;
1468 sc->rx_chainmask = ah->caps.rx_chainmask;
Sujithff37e332008-11-24 12:07:55 +05301469
1470 ath9k_hw_setcapability(ah, ATH9K_CAP_DIVERSITY, 1, true, NULL);
Sujithb77f4832008-12-07 21:44:03 +05301471 sc->rx.defant = ath9k_hw_getdefantenna(ah);
Sujithff37e332008-11-24 12:07:55 +05301472
Jouni Malinen8ca21f02009-03-03 19:23:27 +02001473 if (ah->caps.hw_caps & ATH9K_HW_CAP_BSSIDMASK)
Sujithba52da52009-02-09 13:27:10 +05301474 memcpy(sc->bssidmask, ath_bcast_mac, ETH_ALEN);
Sujithff37e332008-11-24 12:07:55 +05301475
Sujithb77f4832008-12-07 21:44:03 +05301476 sc->beacon.slottime = ATH9K_SLOT_TIME_9; /* default to short slot time */
Sujithff37e332008-11-24 12:07:55 +05301477
1478 /* initialize beacon slots */
Jouni Malinenc52f33d2009-03-03 19:23:29 +02001479 for (i = 0; i < ARRAY_SIZE(sc->beacon.bslot); i++) {
Jouni Malinen2c3db3d2009-03-03 19:23:26 +02001480 sc->beacon.bslot[i] = NULL;
Jouni Malinenc52f33d2009-03-03 19:23:29 +02001481 sc->beacon.bslot_aphy[i] = NULL;
1482 }
Sujithff37e332008-11-24 12:07:55 +05301483
Sujithff37e332008-11-24 12:07:55 +05301484 /* setup channels and rates */
1485
Luis R. Rodriguez5f8e0772009-01-22 15:16:48 -08001486 sc->sbands[IEEE80211_BAND_2GHZ].channels = ath9k_2ghz_chantable;
Sujithff37e332008-11-24 12:07:55 +05301487 sc->sbands[IEEE80211_BAND_2GHZ].bitrates =
1488 sc->rates[IEEE80211_BAND_2GHZ];
1489 sc->sbands[IEEE80211_BAND_2GHZ].band = IEEE80211_BAND_2GHZ;
Luis R. Rodriguez5f8e0772009-01-22 15:16:48 -08001490 sc->sbands[IEEE80211_BAND_2GHZ].n_channels =
1491 ARRAY_SIZE(ath9k_2ghz_chantable);
Sujithff37e332008-11-24 12:07:55 +05301492
Sujith2660b812009-02-09 13:27:26 +05301493 if (test_bit(ATH9K_MODE_11A, sc->sc_ah->caps.wireless_modes)) {
Luis R. Rodriguez5f8e0772009-01-22 15:16:48 -08001494 sc->sbands[IEEE80211_BAND_5GHZ].channels = ath9k_5ghz_chantable;
Sujithff37e332008-11-24 12:07:55 +05301495 sc->sbands[IEEE80211_BAND_5GHZ].bitrates =
1496 sc->rates[IEEE80211_BAND_5GHZ];
1497 sc->sbands[IEEE80211_BAND_5GHZ].band = IEEE80211_BAND_5GHZ;
Luis R. Rodriguez5f8e0772009-01-22 15:16:48 -08001498 sc->sbands[IEEE80211_BAND_5GHZ].n_channels =
1499 ARRAY_SIZE(ath9k_5ghz_chantable);
Sujithff37e332008-11-24 12:07:55 +05301500 }
1501
Sujith2660b812009-02-09 13:27:26 +05301502 if (sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_BT_COEX)
Vasanthakumar Thiagarajanc97c92d2009-01-02 15:35:46 +05301503 ath9k_hw_btcoex_enable(sc->sc_ah);
1504
Sujithff37e332008-11-24 12:07:55 +05301505 return 0;
1506bad2:
1507 /* cleanup tx queues */
1508 for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++)
1509 if (ATH_TXQ_SETUP(sc, i))
Sujithb77f4832008-12-07 21:44:03 +05301510 ath_tx_cleanupq(sc, &sc->tx.txq[i]);
Sujithff37e332008-11-24 12:07:55 +05301511bad:
1512 if (ah)
1513 ath9k_hw_detach(ah);
Vasanthakumar Thiagarajan40b130a2009-02-16 13:55:07 +05301514 ath9k_exit_debug(sc);
Sujithff37e332008-11-24 12:07:55 +05301515
1516 return error;
1517}
1518
Jouni Malinenc52f33d2009-03-03 19:23:29 +02001519void ath_set_hw_capab(struct ath_softc *sc, struct ieee80211_hw *hw)
Vasanthakumar Thiagarajan8feceb62008-09-10 18:49:27 +05301520{
Sujith9c84b792008-10-29 10:17:13 +05301521 hw->flags = IEEE80211_HW_RX_INCLUDES_FCS |
1522 IEEE80211_HW_HOST_BROADCAST_PS_BUFFERING |
1523 IEEE80211_HW_SIGNAL_DBM |
Vivek Natarajan3cbb5dd2009-01-20 11:17:08 +05301524 IEEE80211_HW_AMPDU_AGGREGATION |
1525 IEEE80211_HW_SUPPORTS_PS |
Sujitheeee1322009-03-10 10:39:53 +05301526 IEEE80211_HW_PS_NULLFUNC_STACK |
1527 IEEE80211_HW_SPECTRUM_MGMT;
Vasanthakumar Thiagarajan8feceb62008-09-10 18:49:27 +05301528
Jouni Malinenb3bd89c2009-02-24 13:42:01 +02001529 if (AR_SREV_9160_10_OR_LATER(sc->sc_ah) || modparam_nohwcrypt)
Jouni Malinen0ced0e12009-01-08 13:32:13 +02001530 hw->flags |= IEEE80211_HW_MFP_CAPABLE;
1531
Sujith9c84b792008-10-29 10:17:13 +05301532 hw->wiphy->interface_modes =
1533 BIT(NL80211_IFTYPE_AP) |
1534 BIT(NL80211_IFTYPE_STATION) |
Pat Erley9cb54122009-03-20 22:59:59 -04001535 BIT(NL80211_IFTYPE_ADHOC) |
1536 BIT(NL80211_IFTYPE_MESH_POINT);
Vasanthakumar Thiagarajan8feceb62008-09-10 18:49:27 +05301537
Vasanthakumar Thiagarajan8feceb62008-09-10 18:49:27 +05301538 hw->queues = 4;
Sujithe63835b2008-11-18 09:07:53 +05301539 hw->max_rates = 4;
Sujith171387e2009-02-17 15:36:25 +05301540 hw->channel_change_time = 5000;
Jouni Malinen465ca842009-03-03 19:23:34 +02001541 hw->max_listen_interval = 10;
Luis R. Rodriguezdd190182009-07-14 20:13:56 -04001542 /* Hardware supports 10 but we use 4 */
1543 hw->max_rate_tries = 4;
Sujith528f0c62008-10-29 10:14:26 +05301544 hw->sta_data_size = sizeof(struct ath_node);
Sujith17d79042009-02-09 13:27:03 +05301545 hw->vif_data_size = sizeof(struct ath_vif);
Vasanthakumar Thiagarajan8feceb62008-09-10 18:49:27 +05301546
Vasanthakumar Thiagarajan8feceb62008-09-10 18:49:27 +05301547 hw->rate_control_algorithm = "ath9k_rate_control";
Vasanthakumar Thiagarajan8feceb62008-09-10 18:49:27 +05301548
Jouni Malinenc52f33d2009-03-03 19:23:29 +02001549 hw->wiphy->bands[IEEE80211_BAND_2GHZ] =
1550 &sc->sbands[IEEE80211_BAND_2GHZ];
1551 if (test_bit(ATH9K_MODE_11A, sc->sc_ah->caps.wireless_modes))
1552 hw->wiphy->bands[IEEE80211_BAND_5GHZ] =
1553 &sc->sbands[IEEE80211_BAND_5GHZ];
1554}
1555
1556int ath_attach(u16 devid, struct ath_softc *sc)
1557{
1558 struct ieee80211_hw *hw = sc->hw;
Jouni Malinenc52f33d2009-03-03 19:23:29 +02001559 int error = 0, i;
Bob Copeland3a702e42009-03-30 22:30:29 -04001560 struct ath_regulatory *reg;
Jouni Malinenc52f33d2009-03-03 19:23:29 +02001561
1562 DPRINTF(sc, ATH_DBG_CONFIG, "Attach ATH hw\n");
1563
1564 error = ath_init(devid, sc);
1565 if (error != 0)
1566 return error;
1567
1568 /* get mac address from hardware and set in mac80211 */
1569
1570 SET_IEEE80211_PERM_ADDR(hw, sc->sc_ah->macaddr);
1571
1572 ath_set_hw_capab(sc, hw);
1573
Luis R. Rodriguezc26c2e52009-05-19 18:27:11 -04001574 error = ath_regd_init(&sc->sc_ah->regulatory, sc->hw->wiphy,
1575 ath9k_reg_notifier);
1576 if (error)
1577 return error;
1578
1579 reg = &sc->sc_ah->regulatory;
1580
Sujith2660b812009-02-09 13:27:26 +05301581 if (sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_HT) {
Sujitheb2599c2009-01-23 11:20:44 +05301582 setup_ht_cap(sc, &sc->sbands[IEEE80211_BAND_2GHZ].ht_cap);
Sujith2660b812009-02-09 13:27:26 +05301583 if (test_bit(ATH9K_MODE_11A, sc->sc_ah->caps.wireless_modes))
Sujitheb2599c2009-01-23 11:20:44 +05301584 setup_ht_cap(sc, &sc->sbands[IEEE80211_BAND_5GHZ].ht_cap);
Sujith9c84b792008-10-29 10:17:13 +05301585 }
1586
Senthil Balasubramaniandb93e7b2008-11-13 18:01:08 +05301587 /* initialize tx/rx engine */
1588 error = ath_tx_init(sc, ATH_TXBUF);
1589 if (error != 0)
Vasanthakumar Thiagarajan40b130a2009-02-16 13:55:07 +05301590 goto error_attach;
Vasanthakumar Thiagarajan8feceb62008-09-10 18:49:27 +05301591
Senthil Balasubramaniandb93e7b2008-11-13 18:01:08 +05301592 error = ath_rx_init(sc, ATH_RXBUF);
1593 if (error != 0)
Vasanthakumar Thiagarajan40b130a2009-02-16 13:55:07 +05301594 goto error_attach;
Vasanthakumar Thiagarajan8feceb62008-09-10 18:49:27 +05301595
Jouni Malinen0e2dedf2009-03-03 19:23:32 +02001596 INIT_WORK(&sc->chan_work, ath9k_wiphy_chan_work);
Jouni Malinenf98c3bd2009-03-03 19:23:39 +02001597 INIT_DELAYED_WORK(&sc->wiphy_work, ath9k_wiphy_work);
1598 sc->wiphy_scheduler_int = msecs_to_jiffies(500);
Jouni Malinen0e2dedf2009-03-03 19:23:32 +02001599
Senthil Balasubramaniandb93e7b2008-11-13 18:01:08 +05301600 error = ieee80211_register_hw(hw);
Vasanthakumar Thiagarajan8feceb62008-09-10 18:49:27 +05301601
Bob Copeland3a702e42009-03-30 22:30:29 -04001602 if (!ath_is_world_regd(reg)) {
Bob Copelandc02cf372009-03-30 22:30:28 -04001603 error = regulatory_hint(hw->wiphy, reg->alpha2);
Luis R. Rodriguezfe33eb32009-02-21 00:04:30 -05001604 if (error)
1605 goto error_attach;
1606 }
Luis R. Rodriguez5f8e0772009-01-22 15:16:48 -08001607
Senthil Balasubramaniandb93e7b2008-11-13 18:01:08 +05301608 /* Initialize LED control */
1609 ath_init_leds(sc);
Vasanthakumar Thiagarajan8feceb62008-09-10 18:49:27 +05301610
Johannes Berg3b319aa2009-06-13 14:50:26 +05301611 ath_start_rfkill_poll(sc);
Luis R. Rodriguez5f8e0772009-01-22 15:16:48 -08001612
Vasanthakumar Thiagarajan8feceb62008-09-10 18:49:27 +05301613 return 0;
Vasanthakumar Thiagarajan40b130a2009-02-16 13:55:07 +05301614
1615error_attach:
1616 /* cleanup tx queues */
1617 for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++)
1618 if (ATH_TXQ_SETUP(sc, i))
1619 ath_tx_cleanupq(sc, &sc->tx.txq[i]);
1620
1621 ath9k_hw_detach(sc->sc_ah);
1622 ath9k_exit_debug(sc);
1623
Vasanthakumar Thiagarajan8feceb62008-09-10 18:49:27 +05301624 return error;
1625}
1626
Sujithff37e332008-11-24 12:07:55 +05301627int ath_reset(struct ath_softc *sc, bool retry_tx)
1628{
Sujithcbe61d82009-02-09 13:27:12 +05301629 struct ath_hw *ah = sc->sc_ah;
Luis R. Rodriguez030bb492008-12-23 15:58:37 -08001630 struct ieee80211_hw *hw = sc->hw;
Luis R. Rodriguezae8d2852008-12-23 15:58:40 -08001631 int r;
Sujithff37e332008-11-24 12:07:55 +05301632
1633 ath9k_hw_set_interrupts(ah, 0);
Sujith043a0402009-01-16 21:38:47 +05301634 ath_drain_all_txq(sc, retry_tx);
Sujithff37e332008-11-24 12:07:55 +05301635 ath_stoprecv(sc);
1636 ath_flushrecv(sc);
1637
1638 spin_lock_bh(&sc->sc_resetlock);
Sujith2660b812009-02-09 13:27:26 +05301639 r = ath9k_hw_reset(ah, sc->sc_ah->curchan, false);
Luis R. Rodriguezae8d2852008-12-23 15:58:40 -08001640 if (r)
Sujithff37e332008-11-24 12:07:55 +05301641 DPRINTF(sc, ATH_DBG_FATAL,
Vasanthakumar Thiagarajan6b457842009-05-15 18:59:20 +05301642 "Unable to reset hardware; reset status %d\n", r);
Sujithff37e332008-11-24 12:07:55 +05301643 spin_unlock_bh(&sc->sc_resetlock);
1644
1645 if (ath_startrecv(sc) != 0)
Sujith04bd4632008-11-28 22:18:05 +05301646 DPRINTF(sc, ATH_DBG_FATAL, "Unable to start recv logic\n");
Sujithff37e332008-11-24 12:07:55 +05301647
1648 /*
1649 * We may be doing a reset in response to a request
1650 * that changes the channel so update any state that
1651 * might change as a result.
1652 */
Luis R. Rodriguezce111ba2008-12-23 15:58:39 -08001653 ath_cache_conf_rate(sc, &hw->conf);
Sujithff37e332008-11-24 12:07:55 +05301654
1655 ath_update_txpow(sc);
1656
1657 if (sc->sc_flags & SC_OP_BEACONS)
Jouni Malinen2c3db3d2009-03-03 19:23:26 +02001658 ath_beacon_config(sc, NULL); /* restart beacons */
Sujithff37e332008-11-24 12:07:55 +05301659
Sujith17d79042009-02-09 13:27:03 +05301660 ath9k_hw_set_interrupts(ah, sc->imask);
Sujithff37e332008-11-24 12:07:55 +05301661
1662 if (retry_tx) {
1663 int i;
1664 for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++) {
1665 if (ATH_TXQ_SETUP(sc, i)) {
Sujithb77f4832008-12-07 21:44:03 +05301666 spin_lock_bh(&sc->tx.txq[i].axq_lock);
1667 ath_txq_schedule(sc, &sc->tx.txq[i]);
1668 spin_unlock_bh(&sc->tx.txq[i].axq_lock);
Sujithff37e332008-11-24 12:07:55 +05301669 }
1670 }
1671 }
1672
Luis R. Rodriguezae8d2852008-12-23 15:58:40 -08001673 return r;
Sujithff37e332008-11-24 12:07:55 +05301674}
1675
1676/*
1677 * This function will allocate both the DMA descriptor structure, and the
1678 * buffers it contains. These are used to contain the descriptors used
1679 * by the system.
1680*/
1681int ath_descdma_setup(struct ath_softc *sc, struct ath_descdma *dd,
1682 struct list_head *head, const char *name,
1683 int nbuf, int ndesc)
1684{
1685#define DS2PHYS(_dd, _ds) \
1686 ((_dd)->dd_desc_paddr + ((caddr_t)(_ds) - (caddr_t)(_dd)->dd_desc))
1687#define ATH_DESC_4KB_BOUND_CHECK(_daddr) ((((_daddr) & 0xFFF) > 0xF7F) ? 1 : 0)
1688#define ATH_DESC_4KB_BOUND_NUM_SKIPPED(_len) ((_len) / 4096)
1689
1690 struct ath_desc *ds;
1691 struct ath_buf *bf;
1692 int i, bsize, error;
1693
Sujith04bd4632008-11-28 22:18:05 +05301694 DPRINTF(sc, ATH_DBG_CONFIG, "%s DMA: %u buffers %u desc/buf\n",
1695 name, nbuf, ndesc);
Sujithff37e332008-11-24 12:07:55 +05301696
Senthil Balasubramanianb03a9db2009-03-06 11:24:09 +05301697 INIT_LIST_HEAD(head);
Sujithff37e332008-11-24 12:07:55 +05301698 /* ath_desc must be a multiple of DWORDs */
1699 if ((sizeof(struct ath_desc) % 4) != 0) {
Sujith04bd4632008-11-28 22:18:05 +05301700 DPRINTF(sc, ATH_DBG_FATAL, "ath_desc not DWORD aligned\n");
Sujithff37e332008-11-24 12:07:55 +05301701 ASSERT((sizeof(struct ath_desc) % 4) == 0);
1702 error = -ENOMEM;
1703 goto fail;
1704 }
1705
Sujithff37e332008-11-24 12:07:55 +05301706 dd->dd_desc_len = sizeof(struct ath_desc) * nbuf * ndesc;
1707
1708 /*
1709 * Need additional DMA memory because we can't use
1710 * descriptors that cross the 4K page boundary. Assume
1711 * one skipped descriptor per 4K page.
1712 */
Sujith2660b812009-02-09 13:27:26 +05301713 if (!(sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_4KB_SPLITTRANS)) {
Sujithff37e332008-11-24 12:07:55 +05301714 u32 ndesc_skipped =
1715 ATH_DESC_4KB_BOUND_NUM_SKIPPED(dd->dd_desc_len);
1716 u32 dma_len;
1717
1718 while (ndesc_skipped) {
1719 dma_len = ndesc_skipped * sizeof(struct ath_desc);
1720 dd->dd_desc_len += dma_len;
1721
1722 ndesc_skipped = ATH_DESC_4KB_BOUND_NUM_SKIPPED(dma_len);
1723 };
1724 }
1725
1726 /* allocate descriptors */
Gabor Juhos7da3c552009-01-14 20:17:03 +01001727 dd->dd_desc = dma_alloc_coherent(sc->dev, dd->dd_desc_len,
Senthil Balasubramanianf0e6ce12009-03-06 11:24:08 +05301728 &dd->dd_desc_paddr, GFP_KERNEL);
Sujithff37e332008-11-24 12:07:55 +05301729 if (dd->dd_desc == NULL) {
1730 error = -ENOMEM;
1731 goto fail;
1732 }
1733 ds = dd->dd_desc;
Sujith04bd4632008-11-28 22:18:05 +05301734 DPRINTF(sc, ATH_DBG_CONFIG, "%s DMA map: %p (%u) -> %llx (%u)\n",
Sujithae459af2009-03-30 15:28:40 +05301735 name, ds, (u32) dd->dd_desc_len,
Sujithff37e332008-11-24 12:07:55 +05301736 ito64(dd->dd_desc_paddr), /*XXX*/(u32) dd->dd_desc_len);
1737
1738 /* allocate buffers */
1739 bsize = sizeof(struct ath_buf) * nbuf;
Senthil Balasubramanianf0e6ce12009-03-06 11:24:08 +05301740 bf = kzalloc(bsize, GFP_KERNEL);
Sujithff37e332008-11-24 12:07:55 +05301741 if (bf == NULL) {
1742 error = -ENOMEM;
1743 goto fail2;
1744 }
Sujithff37e332008-11-24 12:07:55 +05301745 dd->dd_bufptr = bf;
1746
Sujithff37e332008-11-24 12:07:55 +05301747 for (i = 0; i < nbuf; i++, bf++, ds += ndesc) {
1748 bf->bf_desc = ds;
1749 bf->bf_daddr = DS2PHYS(dd, ds);
1750
Sujith2660b812009-02-09 13:27:26 +05301751 if (!(sc->sc_ah->caps.hw_caps &
Sujithff37e332008-11-24 12:07:55 +05301752 ATH9K_HW_CAP_4KB_SPLITTRANS)) {
1753 /*
1754 * Skip descriptor addresses which can cause 4KB
1755 * boundary crossing (addr + length) with a 32 dword
1756 * descriptor fetch.
1757 */
1758 while (ATH_DESC_4KB_BOUND_CHECK(bf->bf_daddr)) {
1759 ASSERT((caddr_t) bf->bf_desc <
1760 ((caddr_t) dd->dd_desc +
1761 dd->dd_desc_len));
1762
1763 ds += ndesc;
1764 bf->bf_desc = ds;
1765 bf->bf_daddr = DS2PHYS(dd, ds);
1766 }
1767 }
1768 list_add_tail(&bf->list, head);
1769 }
1770 return 0;
1771fail2:
Gabor Juhos7da3c552009-01-14 20:17:03 +01001772 dma_free_coherent(sc->dev, dd->dd_desc_len, dd->dd_desc,
1773 dd->dd_desc_paddr);
Sujithff37e332008-11-24 12:07:55 +05301774fail:
1775 memset(dd, 0, sizeof(*dd));
1776 return error;
1777#undef ATH_DESC_4KB_BOUND_CHECK
1778#undef ATH_DESC_4KB_BOUND_NUM_SKIPPED
1779#undef DS2PHYS
1780}
1781
1782void ath_descdma_cleanup(struct ath_softc *sc,
1783 struct ath_descdma *dd,
1784 struct list_head *head)
1785{
Gabor Juhos7da3c552009-01-14 20:17:03 +01001786 dma_free_coherent(sc->dev, dd->dd_desc_len, dd->dd_desc,
1787 dd->dd_desc_paddr);
Sujithff37e332008-11-24 12:07:55 +05301788
1789 INIT_LIST_HEAD(head);
1790 kfree(dd->dd_bufptr);
1791 memset(dd, 0, sizeof(*dd));
1792}
1793
1794int ath_get_hal_qnum(u16 queue, struct ath_softc *sc)
1795{
1796 int qnum;
1797
1798 switch (queue) {
1799 case 0:
Sujithb77f4832008-12-07 21:44:03 +05301800 qnum = sc->tx.hwq_map[ATH9K_WME_AC_VO];
Sujithff37e332008-11-24 12:07:55 +05301801 break;
1802 case 1:
Sujithb77f4832008-12-07 21:44:03 +05301803 qnum = sc->tx.hwq_map[ATH9K_WME_AC_VI];
Sujithff37e332008-11-24 12:07:55 +05301804 break;
1805 case 2:
Sujithb77f4832008-12-07 21:44:03 +05301806 qnum = sc->tx.hwq_map[ATH9K_WME_AC_BE];
Sujithff37e332008-11-24 12:07:55 +05301807 break;
1808 case 3:
Sujithb77f4832008-12-07 21:44:03 +05301809 qnum = sc->tx.hwq_map[ATH9K_WME_AC_BK];
Sujithff37e332008-11-24 12:07:55 +05301810 break;
1811 default:
Sujithb77f4832008-12-07 21:44:03 +05301812 qnum = sc->tx.hwq_map[ATH9K_WME_AC_BE];
Sujithff37e332008-11-24 12:07:55 +05301813 break;
1814 }
1815
1816 return qnum;
1817}
1818
1819int ath_get_mac80211_qnum(u32 queue, struct ath_softc *sc)
1820{
1821 int qnum;
1822
1823 switch (queue) {
1824 case ATH9K_WME_AC_VO:
1825 qnum = 0;
1826 break;
1827 case ATH9K_WME_AC_VI:
1828 qnum = 1;
1829 break;
1830 case ATH9K_WME_AC_BE:
1831 qnum = 2;
1832 break;
1833 case ATH9K_WME_AC_BK:
1834 qnum = 3;
1835 break;
1836 default:
1837 qnum = -1;
1838 break;
1839 }
1840
1841 return qnum;
1842}
1843
Luis R. Rodriguez5f8e0772009-01-22 15:16:48 -08001844/* XXX: Remove me once we don't depend on ath9k_channel for all
1845 * this redundant data */
Jouni Malinen0e2dedf2009-03-03 19:23:32 +02001846void ath9k_update_ichannel(struct ath_softc *sc, struct ieee80211_hw *hw,
1847 struct ath9k_channel *ichan)
Luis R. Rodriguez5f8e0772009-01-22 15:16:48 -08001848{
Luis R. Rodriguez5f8e0772009-01-22 15:16:48 -08001849 struct ieee80211_channel *chan = hw->conf.channel;
1850 struct ieee80211_conf *conf = &hw->conf;
1851
1852 ichan->channel = chan->center_freq;
1853 ichan->chan = chan;
1854
1855 if (chan->band == IEEE80211_BAND_2GHZ) {
1856 ichan->chanmode = CHANNEL_G;
1857 ichan->channelFlags = CHANNEL_2GHZ | CHANNEL_OFDM;
1858 } else {
1859 ichan->chanmode = CHANNEL_A;
1860 ichan->channelFlags = CHANNEL_5GHZ | CHANNEL_OFDM;
1861 }
1862
1863 sc->tx_chan_width = ATH9K_HT_MACMODE_20;
1864
1865 if (conf_is_ht(conf)) {
1866 if (conf_is_ht40(conf))
1867 sc->tx_chan_width = ATH9K_HT_MACMODE_2040;
1868
1869 ichan->chanmode = ath_get_extchanmode(sc, chan,
1870 conf->channel_type);
1871 }
1872}
1873
Sujithff37e332008-11-24 12:07:55 +05301874/**********************/
1875/* mac80211 callbacks */
1876/**********************/
1877
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001878static int ath9k_start(struct ieee80211_hw *hw)
1879{
Jouni Malinenbce048d2009-03-03 19:23:28 +02001880 struct ath_wiphy *aphy = hw->priv;
1881 struct ath_softc *sc = aphy->sc;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001882 struct ieee80211_channel *curchan = hw->conf.channel;
Sujithff37e332008-11-24 12:07:55 +05301883 struct ath9k_channel *init_channel;
Vasanthakumar Thiagarajan82880a72009-06-13 14:50:24 +05301884 int r;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001885
Sujith04bd4632008-11-28 22:18:05 +05301886 DPRINTF(sc, ATH_DBG_CONFIG, "Starting driver with "
1887 "initial channel: %d MHz\n", curchan->center_freq);
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001888
Sujith141b38b2009-02-04 08:10:07 +05301889 mutex_lock(&sc->mutex);
1890
Jouni Malinen9580a222009-03-03 19:23:33 +02001891 if (ath9k_wiphy_started(sc)) {
1892 if (sc->chan_idx == curchan->hw_value) {
1893 /*
1894 * Already on the operational channel, the new wiphy
1895 * can be marked active.
1896 */
1897 aphy->state = ATH_WIPHY_ACTIVE;
1898 ieee80211_wake_queues(hw);
1899 } else {
1900 /*
1901 * Another wiphy is on another channel, start the new
1902 * wiphy in paused state.
1903 */
1904 aphy->state = ATH_WIPHY_PAUSED;
1905 ieee80211_stop_queues(hw);
1906 }
1907 mutex_unlock(&sc->mutex);
1908 return 0;
1909 }
1910 aphy->state = ATH_WIPHY_ACTIVE;
1911
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001912 /* setup initial channel */
1913
Vasanthakumar Thiagarajan82880a72009-06-13 14:50:24 +05301914 sc->chan_idx = curchan->hw_value;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001915
Vasanthakumar Thiagarajan82880a72009-06-13 14:50:24 +05301916 init_channel = ath_get_curchannel(sc, hw);
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001917
Sujithff37e332008-11-24 12:07:55 +05301918 /* Reset SERDES registers */
1919 ath9k_hw_configpcipowersave(sc->sc_ah, 0);
1920
1921 /*
1922 * The basic interface to setting the hardware in a good
1923 * state is ``reset''. On return the hardware is known to
1924 * be powered up and with interrupts disabled. This must
1925 * be followed by initialization of the appropriate bits
1926 * and then setup of the interrupt mask.
1927 */
1928 spin_lock_bh(&sc->sc_resetlock);
Luis R. Rodriguezae8d2852008-12-23 15:58:40 -08001929 r = ath9k_hw_reset(sc->sc_ah, init_channel, false);
1930 if (r) {
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001931 DPRINTF(sc, ATH_DBG_FATAL,
Vasanthakumar Thiagarajan6b457842009-05-15 18:59:20 +05301932 "Unable to reset hardware; reset status %d "
Luis R. Rodriguezae8d2852008-12-23 15:58:40 -08001933 "(freq %u MHz)\n", r,
1934 curchan->center_freq);
Sujithff37e332008-11-24 12:07:55 +05301935 spin_unlock_bh(&sc->sc_resetlock);
Sujith141b38b2009-02-04 08:10:07 +05301936 goto mutex_unlock;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001937 }
Sujithff37e332008-11-24 12:07:55 +05301938 spin_unlock_bh(&sc->sc_resetlock);
1939
1940 /*
1941 * This is needed only to setup initial state
1942 * but it's best done after a reset.
1943 */
1944 ath_update_txpow(sc);
1945
1946 /*
1947 * Setup the hardware after reset:
1948 * The receive engine is set going.
1949 * Frame transmit is handled entirely
1950 * in the frame output path; there's nothing to do
1951 * here except setup the interrupt mask.
1952 */
1953 if (ath_startrecv(sc) != 0) {
Sujith1ffb0612009-03-30 15:28:46 +05301954 DPRINTF(sc, ATH_DBG_FATAL, "Unable to start recv logic\n");
Sujith141b38b2009-02-04 08:10:07 +05301955 r = -EIO;
1956 goto mutex_unlock;
Sujithff37e332008-11-24 12:07:55 +05301957 }
1958
1959 /* Setup our intr mask. */
Sujith17d79042009-02-09 13:27:03 +05301960 sc->imask = ATH9K_INT_RX | ATH9K_INT_TX
Sujithff37e332008-11-24 12:07:55 +05301961 | ATH9K_INT_RXEOL | ATH9K_INT_RXORN
1962 | ATH9K_INT_FATAL | ATH9K_INT_GLOBAL;
1963
Sujith2660b812009-02-09 13:27:26 +05301964 if (sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_GTT)
Sujith17d79042009-02-09 13:27:03 +05301965 sc->imask |= ATH9K_INT_GTT;
Sujithff37e332008-11-24 12:07:55 +05301966
Sujith2660b812009-02-09 13:27:26 +05301967 if (sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_HT)
Sujith17d79042009-02-09 13:27:03 +05301968 sc->imask |= ATH9K_INT_CST;
Sujithff37e332008-11-24 12:07:55 +05301969
Luis R. Rodriguezce111ba2008-12-23 15:58:39 -08001970 ath_cache_conf_rate(sc, &hw->conf);
Sujithff37e332008-11-24 12:07:55 +05301971
1972 sc->sc_flags &= ~SC_OP_INVALID;
1973
1974 /* Disable BMISS interrupt when we're not associated */
Sujith17d79042009-02-09 13:27:03 +05301975 sc->imask &= ~(ATH9K_INT_SWBA | ATH9K_INT_BMISS);
1976 ath9k_hw_set_interrupts(sc->sc_ah, sc->imask);
Sujithff37e332008-11-24 12:07:55 +05301977
Jouni Malinenbce048d2009-03-03 19:23:28 +02001978 ieee80211_wake_queues(hw);
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001979
Senthil Balasubramanian164ace32009-07-14 20:17:09 -04001980 queue_delayed_work(sc->hw->workqueue, &sc->tx_complete_work, 0);
1981
Sujith141b38b2009-02-04 08:10:07 +05301982mutex_unlock:
1983 mutex_unlock(&sc->mutex);
1984
Luis R. Rodriguezae8d2852008-12-23 15:58:40 -08001985 return r;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001986}
1987
1988static int ath9k_tx(struct ieee80211_hw *hw,
1989 struct sk_buff *skb)
1990{
Jouni Malinen147583c2008-08-11 14:01:50 +03001991 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
Jouni Malinenbce048d2009-03-03 19:23:28 +02001992 struct ath_wiphy *aphy = hw->priv;
1993 struct ath_softc *sc = aphy->sc;
Sujith528f0c62008-10-29 10:14:26 +05301994 struct ath_tx_control txctl;
1995 int hdrlen, padsize;
1996
Jouni Malinen8089cc42009-03-03 19:23:38 +02001997 if (aphy->state != ATH_WIPHY_ACTIVE && aphy->state != ATH_WIPHY_SCAN) {
Jouni Malinenee166a02009-03-03 19:23:36 +02001998 printk(KERN_DEBUG "ath9k: %s: TX in unexpected wiphy state "
1999 "%d\n", wiphy_name(hw->wiphy), aphy->state);
2000 goto exit;
2001 }
2002
Gabor Juhos96148322009-07-24 17:27:21 +02002003 if (sc->ps_enabled) {
Jouni Malinendc8c4582009-05-19 17:01:42 +03002004 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *) skb->data;
2005 /*
2006 * mac80211 does not set PM field for normal data frames, so we
2007 * need to update that based on the current PS mode.
2008 */
2009 if (ieee80211_is_data(hdr->frame_control) &&
2010 !ieee80211_is_nullfunc(hdr->frame_control) &&
2011 !ieee80211_has_pm(hdr->frame_control)) {
2012 DPRINTF(sc, ATH_DBG_PS, "Add PM=1 for a TX frame "
2013 "while in PS mode\n");
2014 hdr->frame_control |= cpu_to_le16(IEEE80211_FCTL_PM);
2015 }
2016 }
2017
Jouni Malinen9a23f9c2009-05-19 17:01:38 +03002018 if (unlikely(sc->sc_ah->power_mode != ATH9K_PM_AWAKE)) {
2019 /*
2020 * We are using PS-Poll and mac80211 can request TX while in
2021 * power save mode. Need to wake up hardware for the TX to be
2022 * completed and if needed, also for RX of buffered frames.
2023 */
2024 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *) skb->data;
2025 ath9k_ps_wakeup(sc);
2026 ath9k_hw_setrxabort(sc->sc_ah, 0);
2027 if (ieee80211_is_pspoll(hdr->frame_control)) {
2028 DPRINTF(sc, ATH_DBG_PS, "Sending PS-Poll to pick a "
2029 "buffered frame\n");
2030 sc->sc_flags |= SC_OP_WAIT_FOR_PSPOLL_DATA;
2031 } else {
2032 DPRINTF(sc, ATH_DBG_PS, "Wake up to complete TX\n");
2033 sc->sc_flags |= SC_OP_WAIT_FOR_TX_ACK;
2034 }
2035 /*
2036 * The actual restore operation will happen only after
2037 * the sc_flags bit is cleared. We are just dropping
2038 * the ps_usecount here.
2039 */
2040 ath9k_ps_restore(sc);
2041 }
2042
Sujith528f0c62008-10-29 10:14:26 +05302043 memset(&txctl, 0, sizeof(struct ath_tx_control));
Jouni Malinen147583c2008-08-11 14:01:50 +03002044
2045 /*
2046 * As a temporary workaround, assign seq# here; this will likely need
2047 * to be cleaned up to work better with Beacon transmission and virtual
2048 * BSSes.
2049 */
2050 if (info->flags & IEEE80211_TX_CTL_ASSIGN_SEQ) {
2051 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *) skb->data;
2052 if (info->flags & IEEE80211_TX_CTL_FIRST_FRAGMENT)
Sujithb77f4832008-12-07 21:44:03 +05302053 sc->tx.seq_no += 0x10;
Jouni Malinen147583c2008-08-11 14:01:50 +03002054 hdr->seq_ctrl &= cpu_to_le16(IEEE80211_SCTL_FRAG);
Sujithb77f4832008-12-07 21:44:03 +05302055 hdr->seq_ctrl |= cpu_to_le16(sc->tx.seq_no);
Jouni Malinen147583c2008-08-11 14:01:50 +03002056 }
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07002057
2058 /* Add the padding after the header if this is not already done */
2059 hdrlen = ieee80211_get_hdrlen_from_skb(skb);
2060 if (hdrlen & 3) {
2061 padsize = hdrlen % 4;
2062 if (skb_headroom(skb) < padsize)
2063 return -1;
2064 skb_push(skb, padsize);
2065 memmove(skb->data, skb->data + padsize, hdrlen);
2066 }
2067
Sujith528f0c62008-10-29 10:14:26 +05302068 /* Check if a tx queue is available */
2069
2070 txctl.txq = ath_test_get_txq(sc, skb);
2071 if (!txctl.txq)
2072 goto exit;
2073
Sujith04bd4632008-11-28 22:18:05 +05302074 DPRINTF(sc, ATH_DBG_XMIT, "transmitting packet, skb: %p\n", skb);
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07002075
Jouni Malinenc52f33d2009-03-03 19:23:29 +02002076 if (ath_tx_start(hw, skb, &txctl) != 0) {
Sujith04bd4632008-11-28 22:18:05 +05302077 DPRINTF(sc, ATH_DBG_XMIT, "TX failed\n");
Sujith528f0c62008-10-29 10:14:26 +05302078 goto exit;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07002079 }
2080
2081 return 0;
Sujith528f0c62008-10-29 10:14:26 +05302082exit:
2083 dev_kfree_skb_any(skb);
2084 return 0;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07002085}
2086
2087static void ath9k_stop(struct ieee80211_hw *hw)
2088{
Jouni Malinenbce048d2009-03-03 19:23:28 +02002089 struct ath_wiphy *aphy = hw->priv;
2090 struct ath_softc *sc = aphy->sc;
Sujith9c84b792008-10-29 10:17:13 +05302091
Jouni Malinen9580a222009-03-03 19:23:33 +02002092 aphy->state = ATH_WIPHY_INACTIVE;
2093
Sujith9c84b792008-10-29 10:17:13 +05302094 if (sc->sc_flags & SC_OP_INVALID) {
Sujith04bd4632008-11-28 22:18:05 +05302095 DPRINTF(sc, ATH_DBG_ANY, "Device not present\n");
Sujith9c84b792008-10-29 10:17:13 +05302096 return;
2097 }
2098
Sujith141b38b2009-02-04 08:10:07 +05302099 mutex_lock(&sc->mutex);
Sujithff37e332008-11-24 12:07:55 +05302100
Jouni Malinen9580a222009-03-03 19:23:33 +02002101 if (ath9k_wiphy_started(sc)) {
2102 mutex_unlock(&sc->mutex);
2103 return; /* another wiphy still in use */
2104 }
2105
Sujithff37e332008-11-24 12:07:55 +05302106 /* make sure h/w will not generate any interrupt
2107 * before setting the invalid flag. */
2108 ath9k_hw_set_interrupts(sc->sc_ah, 0);
2109
2110 if (!(sc->sc_flags & SC_OP_INVALID)) {
Sujith043a0402009-01-16 21:38:47 +05302111 ath_drain_all_txq(sc, false);
Sujithff37e332008-11-24 12:07:55 +05302112 ath_stoprecv(sc);
2113 ath9k_hw_phy_disable(sc->sc_ah);
2114 } else
Sujithb77f4832008-12-07 21:44:03 +05302115 sc->rx.rxlink = NULL;
Sujithff37e332008-11-24 12:07:55 +05302116
Johannes Berg3b319aa2009-06-13 14:50:26 +05302117 wiphy_rfkill_stop_polling(sc->hw->wiphy);
Johannes Berg19d337d2009-06-02 13:01:37 +02002118
Sujithff37e332008-11-24 12:07:55 +05302119 /* disable HAL and put h/w to sleep */
2120 ath9k_hw_disable(sc->sc_ah);
2121 ath9k_hw_configpcipowersave(sc->sc_ah, 1);
2122
2123 sc->sc_flags |= SC_OP_INVALID;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07002124
Sujith141b38b2009-02-04 08:10:07 +05302125 mutex_unlock(&sc->mutex);
2126
Sujith04bd4632008-11-28 22:18:05 +05302127 DPRINTF(sc, ATH_DBG_CONFIG, "Driver halt\n");
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07002128}
2129
2130static int ath9k_add_interface(struct ieee80211_hw *hw,
2131 struct ieee80211_if_init_conf *conf)
2132{
Jouni Malinenbce048d2009-03-03 19:23:28 +02002133 struct ath_wiphy *aphy = hw->priv;
2134 struct ath_softc *sc = aphy->sc;
Sujith17d79042009-02-09 13:27:03 +05302135 struct ath_vif *avp = (void *)conf->vif->drv_priv;
Colin McCabed97809d2008-12-01 13:38:55 -08002136 enum nl80211_iftype ic_opmode = NL80211_IFTYPE_UNSPECIFIED;
Jouni Malinen2c3db3d2009-03-03 19:23:26 +02002137 int ret = 0;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07002138
Sujith141b38b2009-02-04 08:10:07 +05302139 mutex_lock(&sc->mutex);
2140
Jouni Malinen8ca21f02009-03-03 19:23:27 +02002141 if (!(sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_BSSIDMASK) &&
2142 sc->nvifs > 0) {
2143 ret = -ENOBUFS;
2144 goto out;
2145 }
2146
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07002147 switch (conf->type) {
Johannes Berg05c914f2008-09-11 00:01:58 +02002148 case NL80211_IFTYPE_STATION:
Colin McCabed97809d2008-12-01 13:38:55 -08002149 ic_opmode = NL80211_IFTYPE_STATION;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07002150 break;
Johannes Berg05c914f2008-09-11 00:01:58 +02002151 case NL80211_IFTYPE_ADHOC:
Johannes Berg05c914f2008-09-11 00:01:58 +02002152 case NL80211_IFTYPE_AP:
Pat Erley9cb54122009-03-20 22:59:59 -04002153 case NL80211_IFTYPE_MESH_POINT:
Jouni Malinen2c3db3d2009-03-03 19:23:26 +02002154 if (sc->nbcnvifs >= ATH_BCBUF) {
2155 ret = -ENOBUFS;
2156 goto out;
2157 }
Pat Erley9cb54122009-03-20 22:59:59 -04002158 ic_opmode = conf->type;
Jouni Malinen2ad67de2008-08-11 14:01:47 +03002159 break;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07002160 default:
2161 DPRINTF(sc, ATH_DBG_FATAL,
Sujith04bd4632008-11-28 22:18:05 +05302162 "Interface type %d not yet supported\n", conf->type);
Jouni Malinen2c3db3d2009-03-03 19:23:26 +02002163 ret = -EOPNOTSUPP;
2164 goto out;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07002165 }
2166
Sujith17d79042009-02-09 13:27:03 +05302167 DPRINTF(sc, ATH_DBG_CONFIG, "Attach a VIF of type: %d\n", ic_opmode);
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07002168
Sujith17d79042009-02-09 13:27:03 +05302169 /* Set the VIF opmode */
Sujith5640b082008-10-29 10:16:06 +05302170 avp->av_opmode = ic_opmode;
2171 avp->av_bslot = -1;
2172
Jouni Malinen2c3db3d2009-03-03 19:23:26 +02002173 sc->nvifs++;
Jouni Malinen8ca21f02009-03-03 19:23:27 +02002174
2175 if (sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_BSSIDMASK)
2176 ath9k_set_bssid_mask(hw);
2177
Jouni Malinen2c3db3d2009-03-03 19:23:26 +02002178 if (sc->nvifs > 1)
2179 goto out; /* skip global settings for secondary vif */
2180
Sujithb238e902009-03-03 10:16:56 +05302181 if (ic_opmode == NL80211_IFTYPE_AP) {
Sujith5640b082008-10-29 10:16:06 +05302182 ath9k_hw_set_tsfadjust(sc->sc_ah, 1);
Sujithb238e902009-03-03 10:16:56 +05302183 sc->sc_flags |= SC_OP_TSF_RESET;
2184 }
Sujith5640b082008-10-29 10:16:06 +05302185
Sujith5640b082008-10-29 10:16:06 +05302186 /* Set the device opmode */
Sujith2660b812009-02-09 13:27:26 +05302187 sc->sc_ah->opmode = ic_opmode;
Sujith5640b082008-10-29 10:16:06 +05302188
Vivek Natarajan4e30ffa2009-01-28 20:53:27 +05302189 /*
2190 * Enable MIB interrupts when there are hardware phy counters.
2191 * Note we only do this (at the moment) for station mode.
2192 */
Sujith4af9cf42009-02-12 10:06:47 +05302193 if ((conf->type == NL80211_IFTYPE_STATION) ||
Pat Erley9cb54122009-03-20 22:59:59 -04002194 (conf->type == NL80211_IFTYPE_ADHOC) ||
2195 (conf->type == NL80211_IFTYPE_MESH_POINT)) {
Sujith4af9cf42009-02-12 10:06:47 +05302196 if (ath9k_hw_phycounters(sc->sc_ah))
2197 sc->imask |= ATH9K_INT_MIB;
2198 sc->imask |= ATH9K_INT_TSFOOR;
2199 }
2200
Sujith17d79042009-02-09 13:27:03 +05302201 ath9k_hw_set_interrupts(sc->sc_ah, sc->imask);
Vivek Natarajan4e30ffa2009-01-28 20:53:27 +05302202
Senthil Balasubramanianf38faa32009-06-24 18:56:40 +05302203 if (conf->type == NL80211_IFTYPE_AP ||
2204 conf->type == NL80211_IFTYPE_ADHOC ||
2205 conf->type == NL80211_IFTYPE_MONITOR)
Sujith415f7382009-04-13 21:56:46 +05302206 ath_start_ani(sc);
Luis R. Rodriguez6f255422008-10-03 15:45:27 -07002207
Jouni Malinen2c3db3d2009-03-03 19:23:26 +02002208out:
Sujith141b38b2009-02-04 08:10:07 +05302209 mutex_unlock(&sc->mutex);
Jouni Malinen2c3db3d2009-03-03 19:23:26 +02002210 return ret;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07002211}
2212
2213static void ath9k_remove_interface(struct ieee80211_hw *hw,
2214 struct ieee80211_if_init_conf *conf)
2215{
Jouni Malinenbce048d2009-03-03 19:23:28 +02002216 struct ath_wiphy *aphy = hw->priv;
2217 struct ath_softc *sc = aphy->sc;
Sujith17d79042009-02-09 13:27:03 +05302218 struct ath_vif *avp = (void *)conf->vif->drv_priv;
Jouni Malinen2c3db3d2009-03-03 19:23:26 +02002219 int i;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07002220
Sujith04bd4632008-11-28 22:18:05 +05302221 DPRINTF(sc, ATH_DBG_CONFIG, "Detach Interface\n");
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07002222
Sujith141b38b2009-02-04 08:10:07 +05302223 mutex_lock(&sc->mutex);
2224
Luis R. Rodriguez6f255422008-10-03 15:45:27 -07002225 /* Stop ANI */
Sujith17d79042009-02-09 13:27:03 +05302226 del_timer_sync(&sc->ani.timer);
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07002227
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07002228 /* Reclaim beacon resources */
Pat Erley9cb54122009-03-20 22:59:59 -04002229 if ((sc->sc_ah->opmode == NL80211_IFTYPE_AP) ||
2230 (sc->sc_ah->opmode == NL80211_IFTYPE_ADHOC) ||
2231 (sc->sc_ah->opmode == NL80211_IFTYPE_MESH_POINT)) {
Sujithb77f4832008-12-07 21:44:03 +05302232 ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07002233 ath_beacon_return(sc, avp);
2234 }
2235
Sujith672840a2008-08-11 14:05:08 +05302236 sc->sc_flags &= ~SC_OP_BEACONS;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07002237
Jouni Malinen2c3db3d2009-03-03 19:23:26 +02002238 for (i = 0; i < ARRAY_SIZE(sc->beacon.bslot); i++) {
2239 if (sc->beacon.bslot[i] == conf->vif) {
2240 printk(KERN_DEBUG "%s: vif had allocated beacon "
2241 "slot\n", __func__);
2242 sc->beacon.bslot[i] = NULL;
Jouni Malinenc52f33d2009-03-03 19:23:29 +02002243 sc->beacon.bslot_aphy[i] = NULL;
Jouni Malinen2c3db3d2009-03-03 19:23:26 +02002244 }
2245 }
2246
Sujith17d79042009-02-09 13:27:03 +05302247 sc->nvifs--;
Sujith141b38b2009-02-04 08:10:07 +05302248
2249 mutex_unlock(&sc->mutex);
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07002250}
2251
Johannes Berge8975582008-10-09 12:18:51 +02002252static int ath9k_config(struct ieee80211_hw *hw, u32 changed)
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07002253{
Jouni Malinenbce048d2009-03-03 19:23:28 +02002254 struct ath_wiphy *aphy = hw->priv;
2255 struct ath_softc *sc = aphy->sc;
Johannes Berge8975582008-10-09 12:18:51 +02002256 struct ieee80211_conf *conf = &hw->conf;
Vivek Natarajan8782b412009-03-30 14:17:00 +05302257 struct ath_hw *ah = sc->sc_ah;
Luis R. Rodriguez64839172009-07-14 20:22:53 -04002258 bool all_wiphys_idle = false, disable_radio = false;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07002259
Sujithaa33de02008-12-18 11:40:16 +05302260 mutex_lock(&sc->mutex);
Sujith141b38b2009-02-04 08:10:07 +05302261
Luis R. Rodriguez64839172009-07-14 20:22:53 -04002262 /* Leave this as the first check */
2263 if (changed & IEEE80211_CONF_CHANGE_IDLE) {
2264
2265 spin_lock_bh(&sc->wiphy_lock);
2266 all_wiphys_idle = ath9k_all_wiphys_idle(sc);
2267 spin_unlock_bh(&sc->wiphy_lock);
2268
2269 if (conf->flags & IEEE80211_CONF_IDLE){
2270 if (all_wiphys_idle)
2271 disable_radio = true;
2272 }
2273 else if (all_wiphys_idle) {
2274 ath_radio_enable(sc);
2275 DPRINTF(sc, ATH_DBG_CONFIG,
2276 "not-idle: enabling radio\n");
2277 }
2278 }
2279
Vivek Natarajan3cbb5dd2009-01-20 11:17:08 +05302280 if (changed & IEEE80211_CONF_CHANGE_PS) {
2281 if (conf->flags & IEEE80211_CONF_PS) {
Vivek Natarajan8782b412009-03-30 14:17:00 +05302282 if (!(ah->caps.hw_caps &
2283 ATH9K_HW_CAP_AUTOSLEEP)) {
2284 if ((sc->imask & ATH9K_INT_TIM_TIMER) == 0) {
2285 sc->imask |= ATH9K_INT_TIM_TIMER;
2286 ath9k_hw_set_interrupts(sc->sc_ah,
2287 sc->imask);
2288 }
2289 ath9k_hw_setrxabort(sc->sc_ah, 1);
Vivek Natarajan3cbb5dd2009-01-20 11:17:08 +05302290 }
Gabor Juhos96148322009-07-24 17:27:21 +02002291 sc->ps_enabled = true;
Vivek Natarajan3cbb5dd2009-01-20 11:17:08 +05302292 } else {
Gabor Juhos96148322009-07-24 17:27:21 +02002293 sc->ps_enabled = false;
Vivek Natarajan3cbb5dd2009-01-20 11:17:08 +05302294 ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_AWAKE);
Vivek Natarajan8782b412009-03-30 14:17:00 +05302295 if (!(ah->caps.hw_caps &
2296 ATH9K_HW_CAP_AUTOSLEEP)) {
2297 ath9k_hw_setrxabort(sc->sc_ah, 0);
Jouni Malinen9a23f9c2009-05-19 17:01:38 +03002298 sc->sc_flags &= ~(SC_OP_WAIT_FOR_BEACON |
2299 SC_OP_WAIT_FOR_CAB |
2300 SC_OP_WAIT_FOR_PSPOLL_DATA |
2301 SC_OP_WAIT_FOR_TX_ACK);
Vivek Natarajan8782b412009-03-30 14:17:00 +05302302 if (sc->imask & ATH9K_INT_TIM_TIMER) {
2303 sc->imask &= ~ATH9K_INT_TIM_TIMER;
2304 ath9k_hw_set_interrupts(sc->sc_ah,
2305 sc->imask);
2306 }
Vivek Natarajan3cbb5dd2009-01-20 11:17:08 +05302307 }
2308 }
2309 }
2310
Johannes Berg47979382009-01-07 10:13:27 +01002311 if (changed & IEEE80211_CONF_CHANGE_CHANNEL) {
Sujith99405f92008-11-24 12:08:35 +05302312 struct ieee80211_channel *curchan = hw->conf.channel;
Luis R. Rodriguez5f8e0772009-01-22 15:16:48 -08002313 int pos = curchan->hw_value;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07002314
Jouni Malinen0e2dedf2009-03-03 19:23:32 +02002315 aphy->chan_idx = pos;
2316 aphy->chan_is_ht = conf_is_ht(conf);
2317
Jouni Malinen8089cc42009-03-03 19:23:38 +02002318 if (aphy->state == ATH_WIPHY_SCAN ||
2319 aphy->state == ATH_WIPHY_ACTIVE)
2320 ath9k_wiphy_pause_all_forced(sc, aphy);
2321 else {
2322 /*
2323 * Do not change operational channel based on a paused
2324 * wiphy changes.
2325 */
2326 goto skip_chan_change;
2327 }
Jouni Malinen0e2dedf2009-03-03 19:23:32 +02002328
Sujith04bd4632008-11-28 22:18:05 +05302329 DPRINTF(sc, ATH_DBG_CONFIG, "Set channel: %d MHz\n",
2330 curchan->center_freq);
Johannes Bergae5eb022008-10-14 16:58:37 +02002331
Luis R. Rodriguez5f8e0772009-01-22 15:16:48 -08002332 /* XXX: remove me eventualy */
Jouni Malinen0e2dedf2009-03-03 19:23:32 +02002333 ath9k_update_ichannel(sc, hw, &sc->sc_ah->channels[pos]);
Sujithe11602b2008-11-27 09:46:27 +05302334
Luis R. Rodriguezecf70442008-12-23 15:58:43 -08002335 ath_update_chainmask(sc, conf_is_ht(conf));
Sujith86060f02009-01-07 14:25:29 +05302336
Jouni Malinen0e2dedf2009-03-03 19:23:32 +02002337 if (ath_set_channel(sc, hw, &sc->sc_ah->channels[pos]) < 0) {
Sujith04bd4632008-11-28 22:18:05 +05302338 DPRINTF(sc, ATH_DBG_FATAL, "Unable to set channel\n");
Sujithaa33de02008-12-18 11:40:16 +05302339 mutex_unlock(&sc->mutex);
Sujithe11602b2008-11-27 09:46:27 +05302340 return -EINVAL;
2341 }
Sujith094d05d2008-12-12 11:57:43 +05302342 }
Sujith86b89ee2008-08-07 10:54:57 +05302343
Jouni Malinen8089cc42009-03-03 19:23:38 +02002344skip_chan_change:
Luis R. Rodriguez5c020dc2008-10-22 13:28:45 -07002345 if (changed & IEEE80211_CONF_CHANGE_POWER)
Sujith17d79042009-02-09 13:27:03 +05302346 sc->config.txpowlimit = 2 * conf->power_level;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07002347
Luis R. Rodriguez64839172009-07-14 20:22:53 -04002348 if (disable_radio) {
2349 DPRINTF(sc, ATH_DBG_CONFIG, "idle: disabling radio\n");
2350 ath_radio_disable(sc);
2351 }
2352
Sujithaa33de02008-12-18 11:40:16 +05302353 mutex_unlock(&sc->mutex);
Sujith141b38b2009-02-04 08:10:07 +05302354
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07002355 return 0;
2356}
2357
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07002358#define SUPPORTED_FILTERS \
2359 (FIF_PROMISC_IN_BSS | \
2360 FIF_ALLMULTI | \
2361 FIF_CONTROL | \
2362 FIF_OTHER_BSS | \
2363 FIF_BCN_PRBRESP_PROMISC | \
2364 FIF_FCSFAIL)
2365
Sujith7dcfdcd2008-08-11 14:03:13 +05302366/* FIXME: sc->sc_full_reset ? */
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07002367static void ath9k_configure_filter(struct ieee80211_hw *hw,
2368 unsigned int changed_flags,
2369 unsigned int *total_flags,
2370 int mc_count,
2371 struct dev_mc_list *mclist)
2372{
Jouni Malinenbce048d2009-03-03 19:23:28 +02002373 struct ath_wiphy *aphy = hw->priv;
2374 struct ath_softc *sc = aphy->sc;
Sujith7dcfdcd2008-08-11 14:03:13 +05302375 u32 rfilt;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07002376
2377 changed_flags &= SUPPORTED_FILTERS;
2378 *total_flags &= SUPPORTED_FILTERS;
2379
Sujithb77f4832008-12-07 21:44:03 +05302380 sc->rx.rxfilter = *total_flags;
Jouni Malinenaa68aea2009-05-19 17:01:41 +03002381 ath9k_ps_wakeup(sc);
Sujith7dcfdcd2008-08-11 14:03:13 +05302382 rfilt = ath_calcrxfilter(sc);
2383 ath9k_hw_setrxfilter(sc->sc_ah, rfilt);
Jouni Malinenaa68aea2009-05-19 17:01:41 +03002384 ath9k_ps_restore(sc);
Sujith7dcfdcd2008-08-11 14:03:13 +05302385
Sujithb77f4832008-12-07 21:44:03 +05302386 DPRINTF(sc, ATH_DBG_CONFIG, "Set HW RX filter: 0x%x\n", sc->rx.rxfilter);
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07002387}
2388
2389static void ath9k_sta_notify(struct ieee80211_hw *hw,
2390 struct ieee80211_vif *vif,
2391 enum sta_notify_cmd cmd,
Johannes Berg17741cd2008-09-11 00:02:02 +02002392 struct ieee80211_sta *sta)
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07002393{
Jouni Malinenbce048d2009-03-03 19:23:28 +02002394 struct ath_wiphy *aphy = hw->priv;
2395 struct ath_softc *sc = aphy->sc;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07002396
2397 switch (cmd) {
2398 case STA_NOTIFY_ADD:
Sujith5640b082008-10-29 10:16:06 +05302399 ath_node_attach(sc, sta);
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07002400 break;
2401 case STA_NOTIFY_REMOVE:
Sujithb5aa9bf2008-10-29 10:13:31 +05302402 ath_node_detach(sc, sta);
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07002403 break;
2404 default:
2405 break;
2406 }
2407}
2408
Sujith141b38b2009-02-04 08:10:07 +05302409static int ath9k_conf_tx(struct ieee80211_hw *hw, u16 queue,
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07002410 const struct ieee80211_tx_queue_params *params)
2411{
Jouni Malinenbce048d2009-03-03 19:23:28 +02002412 struct ath_wiphy *aphy = hw->priv;
2413 struct ath_softc *sc = aphy->sc;
Sujithea9880f2008-08-07 10:53:10 +05302414 struct ath9k_tx_queue_info qi;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07002415 int ret = 0, qnum;
2416
2417 if (queue >= WME_NUM_AC)
2418 return 0;
2419
Sujith141b38b2009-02-04 08:10:07 +05302420 mutex_lock(&sc->mutex);
2421
Sujith1ffb0612009-03-30 15:28:46 +05302422 memset(&qi, 0, sizeof(struct ath9k_tx_queue_info));
2423
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07002424 qi.tqi_aifs = params->aifs;
2425 qi.tqi_cwmin = params->cw_min;
2426 qi.tqi_cwmax = params->cw_max;
2427 qi.tqi_burstTime = params->txop;
2428 qnum = ath_get_hal_qnum(queue, sc);
2429
2430 DPRINTF(sc, ATH_DBG_CONFIG,
Sujith04bd4632008-11-28 22:18:05 +05302431 "Configure tx [queue/halq] [%d/%d], "
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07002432 "aifs: %d, cw_min: %d, cw_max: %d, txop: %d\n",
Sujith04bd4632008-11-28 22:18:05 +05302433 queue, qnum, params->aifs, params->cw_min,
2434 params->cw_max, params->txop);
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07002435
2436 ret = ath_txq_update(sc, qnum, &qi);
2437 if (ret)
Sujith04bd4632008-11-28 22:18:05 +05302438 DPRINTF(sc, ATH_DBG_FATAL, "TXQ Update failed\n");
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07002439
Sujith141b38b2009-02-04 08:10:07 +05302440 mutex_unlock(&sc->mutex);
2441
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07002442 return ret;
2443}
2444
2445static int ath9k_set_key(struct ieee80211_hw *hw,
2446 enum set_key_cmd cmd,
Johannes Bergdc822b52008-12-29 12:55:09 +01002447 struct ieee80211_vif *vif,
2448 struct ieee80211_sta *sta,
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07002449 struct ieee80211_key_conf *key)
2450{
Jouni Malinenbce048d2009-03-03 19:23:28 +02002451 struct ath_wiphy *aphy = hw->priv;
2452 struct ath_softc *sc = aphy->sc;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07002453 int ret = 0;
2454
Jouni Malinenb3bd89c2009-02-24 13:42:01 +02002455 if (modparam_nohwcrypt)
2456 return -ENOSPC;
2457
Sujith141b38b2009-02-04 08:10:07 +05302458 mutex_lock(&sc->mutex);
Vivek Natarajan3cbb5dd2009-01-20 11:17:08 +05302459 ath9k_ps_wakeup(sc);
Sujithd8baa932009-03-30 15:28:25 +05302460 DPRINTF(sc, ATH_DBG_CONFIG, "Set HW Key\n");
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07002461
2462 switch (cmd) {
2463 case SET_KEY:
Jouni Malinen3f53dd62009-02-26 11:18:46 +02002464 ret = ath_key_config(sc, vif, sta, key);
Jouni Malinen6ace2892008-12-17 13:32:17 +02002465 if (ret >= 0) {
2466 key->hw_key_idx = ret;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07002467 /* push IV and Michael MIC generation to stack */
2468 key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
Senthil Balasubramanian1b961752008-09-01 19:45:21 +05302469 if (key->alg == ALG_TKIP)
2470 key->flags |= IEEE80211_KEY_FLAG_GENERATE_MMIC;
Jouni Malinen0ced0e12009-01-08 13:32:13 +02002471 if (sc->sc_ah->sw_mgmt_crypto && key->alg == ALG_CCMP)
2472 key->flags |= IEEE80211_KEY_FLAG_SW_MGMT;
Jouni Malinen6ace2892008-12-17 13:32:17 +02002473 ret = 0;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07002474 }
2475 break;
2476 case DISABLE_KEY:
2477 ath_key_delete(sc, key);
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07002478 break;
2479 default:
2480 ret = -EINVAL;
2481 }
2482
Vivek Natarajan3cbb5dd2009-01-20 11:17:08 +05302483 ath9k_ps_restore(sc);
Sujith141b38b2009-02-04 08:10:07 +05302484 mutex_unlock(&sc->mutex);
2485
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07002486 return ret;
2487}
2488
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07002489static void ath9k_bss_info_changed(struct ieee80211_hw *hw,
2490 struct ieee80211_vif *vif,
2491 struct ieee80211_bss_conf *bss_conf,
2492 u32 changed)
2493{
Jouni Malinenbce048d2009-03-03 19:23:28 +02002494 struct ath_wiphy *aphy = hw->priv;
2495 struct ath_softc *sc = aphy->sc;
Johannes Berg2d0ddec2009-04-23 16:13:26 +02002496 struct ath_hw *ah = sc->sc_ah;
2497 struct ath_vif *avp = (void *)vif->drv_priv;
2498 u32 rfilt = 0;
2499 int error, i;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07002500
Sujith141b38b2009-02-04 08:10:07 +05302501 mutex_lock(&sc->mutex);
2502
Johannes Berg2d0ddec2009-04-23 16:13:26 +02002503 /*
2504 * TODO: Need to decide which hw opmode to use for
2505 * multi-interface cases
2506 * XXX: This belongs into add_interface!
2507 */
2508 if (vif->type == NL80211_IFTYPE_AP &&
2509 ah->opmode != NL80211_IFTYPE_AP) {
2510 ah->opmode = NL80211_IFTYPE_STATION;
2511 ath9k_hw_setopmode(ah);
2512 memcpy(sc->curbssid, sc->sc_ah->macaddr, ETH_ALEN);
2513 sc->curaid = 0;
2514 ath9k_hw_write_associd(sc);
2515 /* Request full reset to get hw opmode changed properly */
2516 sc->sc_flags |= SC_OP_FULL_RESET;
2517 }
2518
2519 if ((changed & BSS_CHANGED_BSSID) &&
2520 !is_zero_ether_addr(bss_conf->bssid)) {
2521 switch (vif->type) {
2522 case NL80211_IFTYPE_STATION:
2523 case NL80211_IFTYPE_ADHOC:
2524 case NL80211_IFTYPE_MESH_POINT:
2525 /* Set BSSID */
2526 memcpy(sc->curbssid, bss_conf->bssid, ETH_ALEN);
2527 memcpy(avp->bssid, bss_conf->bssid, ETH_ALEN);
2528 sc->curaid = 0;
2529 ath9k_hw_write_associd(sc);
2530
2531 /* Set aggregation protection mode parameters */
2532 sc->config.ath_aggr_prot = 0;
2533
2534 DPRINTF(sc, ATH_DBG_CONFIG,
2535 "RX filter 0x%x bssid %pM aid 0x%x\n",
2536 rfilt, sc->curbssid, sc->curaid);
2537
2538 /* need to reconfigure the beacon */
2539 sc->sc_flags &= ~SC_OP_BEACONS ;
2540
2541 break;
2542 default:
2543 break;
2544 }
2545 }
2546
2547 if ((vif->type == NL80211_IFTYPE_ADHOC) ||
2548 (vif->type == NL80211_IFTYPE_AP) ||
2549 (vif->type == NL80211_IFTYPE_MESH_POINT)) {
2550 if ((changed & BSS_CHANGED_BEACON) ||
2551 (changed & BSS_CHANGED_BEACON_ENABLED &&
2552 bss_conf->enable_beacon)) {
2553 /*
2554 * Allocate and setup the beacon frame.
2555 *
2556 * Stop any previous beacon DMA. This may be
2557 * necessary, for example, when an ibss merge
2558 * causes reconfiguration; we may be called
2559 * with beacon transmission active.
2560 */
2561 ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
2562
2563 error = ath_beacon_alloc(aphy, vif);
2564 if (!error)
2565 ath_beacon_config(sc, vif);
2566 }
2567 }
2568
2569 /* Check for WLAN_CAPABILITY_PRIVACY ? */
2570 if ((avp->av_opmode != NL80211_IFTYPE_STATION)) {
2571 for (i = 0; i < IEEE80211_WEP_NKID; i++)
2572 if (ath9k_hw_keyisvalid(sc->sc_ah, (u16)i))
2573 ath9k_hw_keysetmac(sc->sc_ah,
2574 (u16)i,
2575 sc->curbssid);
2576 }
2577
2578 /* Only legacy IBSS for now */
2579 if (vif->type == NL80211_IFTYPE_ADHOC)
2580 ath_update_chainmask(sc, 0);
2581
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07002582 if (changed & BSS_CHANGED_ERP_PREAMBLE) {
Sujith04bd4632008-11-28 22:18:05 +05302583 DPRINTF(sc, ATH_DBG_CONFIG, "BSS Changed PREAMBLE %d\n",
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07002584 bss_conf->use_short_preamble);
2585 if (bss_conf->use_short_preamble)
Sujith672840a2008-08-11 14:05:08 +05302586 sc->sc_flags |= SC_OP_PREAMBLE_SHORT;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07002587 else
Sujith672840a2008-08-11 14:05:08 +05302588 sc->sc_flags &= ~SC_OP_PREAMBLE_SHORT;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07002589 }
2590
2591 if (changed & BSS_CHANGED_ERP_CTS_PROT) {
Sujith04bd4632008-11-28 22:18:05 +05302592 DPRINTF(sc, ATH_DBG_CONFIG, "BSS Changed CTS PROT %d\n",
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07002593 bss_conf->use_cts_prot);
2594 if (bss_conf->use_cts_prot &&
2595 hw->conf.channel->band != IEEE80211_BAND_5GHZ)
Sujith672840a2008-08-11 14:05:08 +05302596 sc->sc_flags |= SC_OP_PROTECT_ENABLE;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07002597 else
Sujith672840a2008-08-11 14:05:08 +05302598 sc->sc_flags &= ~SC_OP_PROTECT_ENABLE;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07002599 }
2600
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07002601 if (changed & BSS_CHANGED_ASSOC) {
Sujith04bd4632008-11-28 22:18:05 +05302602 DPRINTF(sc, ATH_DBG_CONFIG, "BSS Changed ASSOC %d\n",
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07002603 bss_conf->assoc);
Sujith5640b082008-10-29 10:16:06 +05302604 ath9k_bss_assoc_info(sc, vif, bss_conf);
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07002605 }
Sujith141b38b2009-02-04 08:10:07 +05302606
Johannes Berg57c4d7b2009-04-23 16:10:04 +02002607 /*
2608 * The HW TSF has to be reset when the beacon interval changes.
2609 * We set the flag here, and ath_beacon_config_ap() would take this
2610 * into account when it gets called through the subsequent
2611 * config_interface() call - with IFCC_BEACON in the changed field.
2612 */
2613
2614 if (changed & BSS_CHANGED_BEACON_INT) {
2615 sc->sc_flags |= SC_OP_TSF_RESET;
2616 sc->beacon_interval = bss_conf->beacon_int;
2617 }
2618
Sujith141b38b2009-02-04 08:10:07 +05302619 mutex_unlock(&sc->mutex);
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07002620}
2621
2622static u64 ath9k_get_tsf(struct ieee80211_hw *hw)
2623{
2624 u64 tsf;
Jouni Malinenbce048d2009-03-03 19:23:28 +02002625 struct ath_wiphy *aphy = hw->priv;
2626 struct ath_softc *sc = aphy->sc;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07002627
Sujith141b38b2009-02-04 08:10:07 +05302628 mutex_lock(&sc->mutex);
2629 tsf = ath9k_hw_gettsf64(sc->sc_ah);
2630 mutex_unlock(&sc->mutex);
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07002631
2632 return tsf;
2633}
2634
Alina Friedrichsen3b5d6652009-01-24 07:09:59 +01002635static void ath9k_set_tsf(struct ieee80211_hw *hw, u64 tsf)
2636{
Jouni Malinenbce048d2009-03-03 19:23:28 +02002637 struct ath_wiphy *aphy = hw->priv;
2638 struct ath_softc *sc = aphy->sc;
Alina Friedrichsen3b5d6652009-01-24 07:09:59 +01002639
Sujith141b38b2009-02-04 08:10:07 +05302640 mutex_lock(&sc->mutex);
2641 ath9k_hw_settsf64(sc->sc_ah, tsf);
2642 mutex_unlock(&sc->mutex);
Alina Friedrichsen3b5d6652009-01-24 07:09:59 +01002643}
2644
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07002645static void ath9k_reset_tsf(struct ieee80211_hw *hw)
2646{
Jouni Malinenbce048d2009-03-03 19:23:28 +02002647 struct ath_wiphy *aphy = hw->priv;
2648 struct ath_softc *sc = aphy->sc;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07002649
Sujith141b38b2009-02-04 08:10:07 +05302650 mutex_lock(&sc->mutex);
2651 ath9k_hw_reset_tsf(sc->sc_ah);
2652 mutex_unlock(&sc->mutex);
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07002653}
2654
2655static int ath9k_ampdu_action(struct ieee80211_hw *hw,
Sujith141b38b2009-02-04 08:10:07 +05302656 enum ieee80211_ampdu_mlme_action action,
2657 struct ieee80211_sta *sta,
2658 u16 tid, u16 *ssn)
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07002659{
Jouni Malinenbce048d2009-03-03 19:23:28 +02002660 struct ath_wiphy *aphy = hw->priv;
2661 struct ath_softc *sc = aphy->sc;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07002662 int ret = 0;
2663
2664 switch (action) {
2665 case IEEE80211_AMPDU_RX_START:
Sujithdca3edb2008-10-29 10:19:01 +05302666 if (!(sc->sc_flags & SC_OP_RXAGGR))
2667 ret = -ENOTSUPP;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07002668 break;
2669 case IEEE80211_AMPDU_RX_STOP:
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07002670 break;
2671 case IEEE80211_AMPDU_TX_START:
Sujithf83da962009-07-23 15:32:37 +05302672 ath_tx_aggr_start(sc, sta, tid, ssn);
2673 ieee80211_start_tx_ba_cb_irqsafe(hw, sta->addr, tid);
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07002674 break;
2675 case IEEE80211_AMPDU_TX_STOP:
Sujithf83da962009-07-23 15:32:37 +05302676 ath_tx_aggr_stop(sc, sta, tid);
Johannes Berg17741cd2008-09-11 00:02:02 +02002677 ieee80211_stop_tx_ba_cb_irqsafe(hw, sta->addr, tid);
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07002678 break;
Johannes Bergb1720232009-03-23 17:28:39 +01002679 case IEEE80211_AMPDU_TX_OPERATIONAL:
Sujith8469cde2008-10-29 10:19:28 +05302680 ath_tx_aggr_resume(sc, sta, tid);
2681 break;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07002682 default:
Sujith04bd4632008-11-28 22:18:05 +05302683 DPRINTF(sc, ATH_DBG_FATAL, "Unknown AMPDU action\n");
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07002684 }
2685
2686 return ret;
2687}
2688
Sujith0c98de62009-03-03 10:16:45 +05302689static void ath9k_sw_scan_start(struct ieee80211_hw *hw)
2690{
Jouni Malinenbce048d2009-03-03 19:23:28 +02002691 struct ath_wiphy *aphy = hw->priv;
2692 struct ath_softc *sc = aphy->sc;
Sujith0c98de62009-03-03 10:16:45 +05302693
Jouni Malinen8089cc42009-03-03 19:23:38 +02002694 if (ath9k_wiphy_scanning(sc)) {
2695 printk(KERN_DEBUG "ath9k: Two wiphys trying to scan at the "
2696 "same time\n");
2697 /*
2698 * Do not allow the concurrent scanning state for now. This
2699 * could be improved with scanning control moved into ath9k.
2700 */
2701 return;
2702 }
2703
2704 aphy->state = ATH_WIPHY_SCAN;
2705 ath9k_wiphy_pause_all_forced(sc, aphy);
2706
Senthil Balasubramaniane5f09212009-06-24 18:56:41 +05302707 spin_lock_bh(&sc->ani_lock);
Sujith0c98de62009-03-03 10:16:45 +05302708 sc->sc_flags |= SC_OP_SCANNING;
Senthil Balasubramaniane5f09212009-06-24 18:56:41 +05302709 spin_unlock_bh(&sc->ani_lock);
Sujith0c98de62009-03-03 10:16:45 +05302710}
2711
2712static void ath9k_sw_scan_complete(struct ieee80211_hw *hw)
2713{
Jouni Malinenbce048d2009-03-03 19:23:28 +02002714 struct ath_wiphy *aphy = hw->priv;
2715 struct ath_softc *sc = aphy->sc;
Sujith0c98de62009-03-03 10:16:45 +05302716
Senthil Balasubramaniane5f09212009-06-24 18:56:41 +05302717 spin_lock_bh(&sc->ani_lock);
Jouni Malinen8089cc42009-03-03 19:23:38 +02002718 aphy->state = ATH_WIPHY_ACTIVE;
Sujith0c98de62009-03-03 10:16:45 +05302719 sc->sc_flags &= ~SC_OP_SCANNING;
Sujith9c07a772009-04-13 21:56:36 +05302720 sc->sc_flags |= SC_OP_FULL_RESET;
Senthil Balasubramaniane5f09212009-06-24 18:56:41 +05302721 spin_unlock_bh(&sc->ani_lock);
Sujith0c98de62009-03-03 10:16:45 +05302722}
2723
Gabor Juhos6baff7f2009-01-14 20:17:06 +01002724struct ieee80211_ops ath9k_ops = {
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07002725 .tx = ath9k_tx,
2726 .start = ath9k_start,
2727 .stop = ath9k_stop,
2728 .add_interface = ath9k_add_interface,
2729 .remove_interface = ath9k_remove_interface,
2730 .config = ath9k_config,
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07002731 .configure_filter = ath9k_configure_filter,
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07002732 .sta_notify = ath9k_sta_notify,
2733 .conf_tx = ath9k_conf_tx,
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07002734 .bss_info_changed = ath9k_bss_info_changed,
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07002735 .set_key = ath9k_set_key,
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07002736 .get_tsf = ath9k_get_tsf,
Alina Friedrichsen3b5d6652009-01-24 07:09:59 +01002737 .set_tsf = ath9k_set_tsf,
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07002738 .reset_tsf = ath9k_reset_tsf,
Johannes Berg4233df62008-10-13 13:35:05 +02002739 .ampdu_action = ath9k_ampdu_action,
Sujith0c98de62009-03-03 10:16:45 +05302740 .sw_scan_start = ath9k_sw_scan_start,
2741 .sw_scan_complete = ath9k_sw_scan_complete,
Johannes Berg3b319aa2009-06-13 14:50:26 +05302742 .rfkill_poll = ath9k_rfkill_poll_state,
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07002743};
2744
Benoit PAPILLAULT392dff82008-11-06 22:26:49 +01002745static struct {
2746 u32 version;
2747 const char * name;
2748} ath_mac_bb_names[] = {
2749 { AR_SREV_VERSION_5416_PCI, "5416" },
2750 { AR_SREV_VERSION_5416_PCIE, "5418" },
2751 { AR_SREV_VERSION_9100, "9100" },
2752 { AR_SREV_VERSION_9160, "9160" },
2753 { AR_SREV_VERSION_9280, "9280" },
Vivek Natarajanac88b6e2009-07-23 10:59:57 +05302754 { AR_SREV_VERSION_9285, "9285" },
2755 { AR_SREV_VERSION_9287, "9287" }
Benoit PAPILLAULT392dff82008-11-06 22:26:49 +01002756};
2757
2758static struct {
2759 u16 version;
2760 const char * name;
2761} ath_rf_names[] = {
2762 { 0, "5133" },
2763 { AR_RAD5133_SREV_MAJOR, "5133" },
2764 { AR_RAD5122_SREV_MAJOR, "5122" },
2765 { AR_RAD2133_SREV_MAJOR, "2133" },
2766 { AR_RAD2122_SREV_MAJOR, "2122" }
2767};
2768
2769/*
2770 * Return the MAC/BB name. "????" is returned if the MAC/BB is unknown.
2771 */
Gabor Juhos6baff7f2009-01-14 20:17:06 +01002772const char *
Benoit PAPILLAULT392dff82008-11-06 22:26:49 +01002773ath_mac_bb_name(u32 mac_bb_version)
2774{
2775 int i;
2776
2777 for (i=0; i<ARRAY_SIZE(ath_mac_bb_names); i++) {
2778 if (ath_mac_bb_names[i].version == mac_bb_version) {
2779 return ath_mac_bb_names[i].name;
2780 }
2781 }
2782
2783 return "????";
2784}
2785
2786/*
2787 * Return the RF name. "????" is returned if the RF is unknown.
2788 */
Gabor Juhos6baff7f2009-01-14 20:17:06 +01002789const char *
Benoit PAPILLAULT392dff82008-11-06 22:26:49 +01002790ath_rf_name(u16 rf_version)
2791{
2792 int i;
2793
2794 for (i=0; i<ARRAY_SIZE(ath_rf_names); i++) {
2795 if (ath_rf_names[i].version == rf_version) {
2796 return ath_rf_names[i].name;
2797 }
2798 }
2799
2800 return "????";
2801}
2802
Gabor Juhos6baff7f2009-01-14 20:17:06 +01002803static int __init ath9k_init(void)
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07002804{
Vasanthakumar Thiagarajanca8a8562008-12-16 12:37:38 +05302805 int error;
2806
Vasanthakumar Thiagarajanca8a8562008-12-16 12:37:38 +05302807 /* Register rate control algorithm */
2808 error = ath_rate_control_register();
2809 if (error != 0) {
2810 printk(KERN_ERR
Luis R. Rodriguezb51bb3c2009-01-26 07:30:03 -08002811 "ath9k: Unable to register rate control "
2812 "algorithm: %d\n",
Vasanthakumar Thiagarajanca8a8562008-12-16 12:37:38 +05302813 error);
Gabor Juhos6baff7f2009-01-14 20:17:06 +01002814 goto err_out;
Vasanthakumar Thiagarajanca8a8562008-12-16 12:37:38 +05302815 }
2816
Gabor Juhos19d8bc22009-03-05 16:55:18 +01002817 error = ath9k_debug_create_root();
2818 if (error) {
2819 printk(KERN_ERR
2820 "ath9k: Unable to create debugfs root: %d\n",
2821 error);
2822 goto err_rate_unregister;
2823 }
2824
Gabor Juhos6baff7f2009-01-14 20:17:06 +01002825 error = ath_pci_init();
2826 if (error < 0) {
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07002827 printk(KERN_ERR
Luis R. Rodriguezb51bb3c2009-01-26 07:30:03 -08002828 "ath9k: No PCI devices found, driver not installed.\n");
Gabor Juhos6baff7f2009-01-14 20:17:06 +01002829 error = -ENODEV;
Gabor Juhos19d8bc22009-03-05 16:55:18 +01002830 goto err_remove_root;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07002831 }
2832
Gabor Juhos09329d32009-01-14 20:17:07 +01002833 error = ath_ahb_init();
2834 if (error < 0) {
2835 error = -ENODEV;
2836 goto err_pci_exit;
2837 }
2838
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07002839 return 0;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07002840
Gabor Juhos09329d32009-01-14 20:17:07 +01002841 err_pci_exit:
2842 ath_pci_exit();
2843
Gabor Juhos19d8bc22009-03-05 16:55:18 +01002844 err_remove_root:
2845 ath9k_debug_remove_root();
Gabor Juhos6baff7f2009-01-14 20:17:06 +01002846 err_rate_unregister:
Vasanthakumar Thiagarajanca8a8562008-12-16 12:37:38 +05302847 ath_rate_control_unregister();
Gabor Juhos6baff7f2009-01-14 20:17:06 +01002848 err_out:
2849 return error;
2850}
2851module_init(ath9k_init);
2852
2853static void __exit ath9k_exit(void)
2854{
Gabor Juhos09329d32009-01-14 20:17:07 +01002855 ath_ahb_exit();
Gabor Juhos6baff7f2009-01-14 20:17:06 +01002856 ath_pci_exit();
Gabor Juhos19d8bc22009-03-05 16:55:18 +01002857 ath9k_debug_remove_root();
Gabor Juhos6baff7f2009-01-14 20:17:06 +01002858 ath_rate_control_unregister();
Sujith04bd4632008-11-28 22:18:05 +05302859 printk(KERN_INFO "%s: Driver unloaded\n", dev_info);
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07002860}
Gabor Juhos6baff7f2009-01-14 20:17:06 +01002861module_exit(ath9k_exit);