blob: c75971b459f245e038a575a4869bd3172159987b [file] [log] [blame]
Stepan Moskovchenkof441ca22010-12-01 19:31:16 -08001/* Copyright (c) 2011, Code Aurora Forum. All rights reserved.
2 *
3 * This program is free software; you can redistribute it and/or modify
4 * it under the terms of the GNU General Public License version 2 and
5 * only version 2 as published by the Free Software Foundation.
6 *
7 * This program is distributed in the hope that it will be useful,
8 * but WITHOUT ANY WARRANTY; without even the implied warranty of
9 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
10 * GNU General Public License for more details.
11 *
Stepan Moskovchenkof441ca22010-12-01 19:31:16 -080012 */
13#include <linux/kernel.h>
14#include <linux/platform_device.h>
15#include <linux/io.h>
16#include <linux/irq.h>
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070017#include <linux/i2c.h>
Rohit Vaswanicd2a59b2011-07-19 12:00:48 -070018#include <linux/i2c/sx150x.h>
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070019#include <linux/gpio.h>
20#include <linux/msm_ssbi.h>
21#include <linux/regulator/gpio-regulator.h>
22#include <linux/mfd/pm8xxx/pm8921.h>
23#include <linux/regulator/consumer.h>
24#include <linux/spi/spi.h>
25#include <linux/slimbus/slimbus.h>
26#include <linux/bootmem.h>
27#ifdef CONFIG_ANDROID_PMEM
28#include <linux/android_pmem.h>
29#endif
30#include <linux/cyttsp.h>
31#include <linux/dma-mapping.h>
32#include <linux/platform_data/qcom_crypto_device.h>
33#include <linux/leds.h>
34#include <linux/leds-pm8xxx.h>
Stepan Moskovchenkof441ca22010-12-01 19:31:16 -080035
36#include <asm/mach-types.h>
37#include <asm/mach/arch.h>
Larry Basselb4126da2011-07-18 14:31:33 -070038#include <asm/setup.h>
Stepan Moskovchenkof441ca22010-12-01 19:31:16 -080039#include <asm/hardware/gic.h>
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070040#include <asm/mach/mmc.h>
Stepan Moskovchenkof441ca22010-12-01 19:31:16 -080041
42#include <mach/board.h>
43#include <mach/msm_iomap.h>
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070044#include <mach/msm_spi.h>
45#ifdef CONFIG_USB_MSM_OTG_72K
46#include <mach/msm_hsusb.h>
47#else
48#include <linux/usb/msm_hsusb.h>
49#endif
50#include <linux/usb/android.h>
51#include <mach/usbdiag.h>
52#include <mach/socinfo.h>
53#include <mach/rpm.h>
54#include <mach/gpio.h>
Rohit Vaswania513aa8d2011-07-18 15:14:28 -070055#include <mach/gpiomux.h>
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070056#include <mach/msm_bus_board.h>
57#include <mach/msm_memtypes.h>
58#include <mach/dma.h>
59#include <mach/msm_dsps.h>
60#include <mach/msm_xo.h>
Stepan Moskovchenkof441ca22010-12-01 19:31:16 -080061
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070062#ifdef CONFIG_WCD9310_CODEC
63#include <linux/slimbus/slimbus.h>
64#include <linux/mfd/wcd9310/core.h>
65#include <linux/mfd/wcd9310/pdata.h>
66#endif
67
68#include "timer.h"
Stepan Moskovchenkod056fca2011-01-27 12:12:07 -080069#include "devices.h"
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070070#include "devices-msm8x60.h"
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070071#include "spm.h"
72#include "board-msm8960.h"
73#include "pm.h"
74#include "cpuidle.h"
75#include "rpm_resources.h"
76#include "mpm.h"
77
78static struct platform_device msm_fm_platform_init = {
79 .name = "iris_fm",
80 .id = -1,
81};
82
83struct pm8xxx_gpio_init {
84 unsigned gpio;
85 struct pm_gpio config;
86};
87
88struct pm8xxx_mpp_init {
89 unsigned mpp;
90 struct pm8xxx_mpp_config_data config;
91};
92
93#define PM8XXX_GPIO_INIT(_gpio, _dir, _buf, _val, _pull, _vin, _out_strength, \
94 _func, _inv, _disable) \
95{ \
96 .gpio = PM8921_GPIO_PM_TO_SYS(_gpio), \
97 .config = { \
98 .direction = _dir, \
99 .output_buffer = _buf, \
100 .output_value = _val, \
101 .pull = _pull, \
102 .vin_sel = _vin, \
103 .out_strength = _out_strength, \
104 .function = _func, \
105 .inv_int_pol = _inv, \
106 .disable_pin = _disable, \
107 } \
108}
109
110#define PM8XXX_MPP_INIT(_mpp, _type, _level, _control) \
111{ \
112 .mpp = PM8921_MPP_PM_TO_SYS(_mpp), \
113 .config = { \
114 .type = PM8XXX_MPP_TYPE_##_type, \
115 .level = _level, \
116 .control = PM8XXX_MPP_##_control, \
117 } \
118}
119
120#define PM8XXX_GPIO_DISABLE(_gpio) \
121 PM8XXX_GPIO_INIT(_gpio, PM_GPIO_DIR_IN, 0, 0, 0, PM_GPIO_VIN_S4, \
122 0, 0, 0, 1)
123
124#define PM8XXX_GPIO_OUTPUT(_gpio, _val) \
125 PM8XXX_GPIO_INIT(_gpio, PM_GPIO_DIR_OUT, PM_GPIO_OUT_BUF_CMOS, _val, \
126 PM_GPIO_PULL_NO, PM_GPIO_VIN_S4, \
127 PM_GPIO_STRENGTH_HIGH, \
128 PM_GPIO_FUNC_NORMAL, 0, 0)
129
130#define PM8XXX_GPIO_INPUT(_gpio, _pull) \
131 PM8XXX_GPIO_INIT(_gpio, PM_GPIO_DIR_IN, PM_GPIO_OUT_BUF_CMOS, 0, \
132 _pull, PM_GPIO_VIN_S4, \
133 PM_GPIO_STRENGTH_NO, \
134 PM_GPIO_FUNC_NORMAL, 0, 0)
135
136#define PM8XXX_GPIO_OUTPUT_FUNC(_gpio, _val, _func) \
137 PM8XXX_GPIO_INIT(_gpio, PM_GPIO_DIR_OUT, PM_GPIO_OUT_BUF_CMOS, _val, \
138 PM_GPIO_PULL_NO, PM_GPIO_VIN_S4, \
139 PM_GPIO_STRENGTH_HIGH, \
140 _func, 0, 0)
141
142/* Initial PM8921 GPIO configurations */
143static struct pm8xxx_gpio_init pm8921_gpios[] __initdata = {
144 PM8XXX_GPIO_DISABLE(6), /* Disable unused */
145 PM8XXX_GPIO_DISABLE(7), /* Disable NFC */
146 PM8XXX_GPIO_INPUT(16, PM_GPIO_PULL_UP_30), /* SD_CARD_WP */
147 PM8XXX_GPIO_DISABLE(22), /* Disable NFC */
Nagamalleswararao Ganjieac5dfa2011-07-23 17:31:16 -0700148 PM8XXX_GPIO_OUTPUT_FUNC(24, 0, PM_GPIO_FUNC_2), /* Bl: Off, PWM mode */
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700149 PM8XXX_GPIO_INPUT(26, PM_GPIO_PULL_UP_30), /* SD_CARD_DET_N */
150 PM8XXX_GPIO_OUTPUT(43, 0), /* DISP_RESET_N */
151};
152
153/* Initial PM8921 MPP configurations */
154static struct pm8xxx_mpp_init pm8921_mpps[] __initdata = {
155 /* External 5V regulator enable; shared by HDMI and USB_OTG switches. */
156 PM8XXX_MPP_INIT(7, D_INPUT, PM8921_MPP_DIG_LEVEL_VPH, DIN_TO_INT),
157 PM8XXX_MPP_INIT(PM8921_AMUX_MPP_3, A_INPUT, PM8XXX_MPP_AIN_AMUX_CH6,
158 DOUT_CTRL_LOW),
159 PM8XXX_MPP_INIT(PM8921_AMUX_MPP_8, A_INPUT, PM8XXX_MPP_AIN_AMUX_CH8,
160 DOUT_CTRL_LOW),
161};
162
163static void __init pm8921_gpio_mpp_init(void)
164{
165 int i, rc;
166
167 for (i = 0; i < ARRAY_SIZE(pm8921_gpios); i++) {
168 rc = pm8xxx_gpio_config(pm8921_gpios[i].gpio,
169 &pm8921_gpios[i].config);
170 if (rc) {
171 pr_err("%s: pm8xxx_gpio_config: rc=%d\n", __func__, rc);
172 break;
173 }
174 }
175
176 for (i = 0; i < ARRAY_SIZE(pm8921_mpps); i++) {
177 rc = pm8xxx_mpp_config(pm8921_mpps[i].mpp,
178 &pm8921_mpps[i].config);
179 if (rc) {
180 pr_err("%s: pm8xxx_mpp_config: rc=%d\n", __func__, rc);
181 break;
182 }
183 }
184}
185
186#define FPGA_CS_GPIO 14
187#define KS8851_RST_GPIO 89
188#define KS8851_IRQ_GPIO 90
189
190/* Macros assume PMIC GPIOs and MPPs start at 1 */
191#define PM8921_GPIO_BASE NR_GPIO_IRQS
192#define PM8921_GPIO_PM_TO_SYS(pm_gpio) (pm_gpio - 1 + PM8921_GPIO_BASE)
193#define PM8921_MPP_BASE (PM8921_GPIO_BASE + PM8921_NR_GPIOS)
194#define PM8921_MPP_PM_TO_SYS(pm_gpio) (pm_gpio - 1 + PM8921_MPP_BASE)
195#define PM8921_IRQ_BASE (NR_MSM_IRQS + NR_GPIO_IRQS)
196#define PM8921_MPP_IRQ_BASE (PM8921_IRQ_BASE + NR_GPIO_IRQS)
197
Rohit Vaswanicd2a59b2011-07-19 12:00:48 -0700198#if defined(CONFIG_GPIO_SX150X) || defined(CONFIG_GPIO_SX150X_MODULE)
199enum {
200 GPIO_EXPANDER_IRQ_BASE = (PM8921_MPP_IRQ_BASE + PM8921_NR_MPPS),
201 GPIO_EXPANDER_GPIO_BASE = (PM8921_MPP_BASE + PM8921_NR_MPPS),
202 /* CAM Expander */
203 GPIO_CAM_EXPANDER_BASE = GPIO_EXPANDER_GPIO_BASE,
204 GPIO_CAM_GP_STROBE_READY = GPIO_CAM_EXPANDER_BASE,
205 GPIO_CAM_GP_AFBUSY,
206 GPIO_CAM_GP_STROBE_CE,
207 GPIO_CAM_GP_CAM1MP_XCLR,
208 GPIO_CAM_GP_CAMIF_RESET_N,
209 GPIO_CAM_GP_XMT_FLASH_INT,
210 GPIO_CAM_GP_LED_EN1,
211 GPIO_CAM_GP_LED_EN2,
212
213};
214#endif
215
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700216static struct gpiomux_setting gsbi1 = {
217 .func = GPIOMUX_FUNC_1,
218 .drv = GPIOMUX_DRV_8MA,
219 .pull = GPIOMUX_PULL_NONE,
220};
221
222static struct gpiomux_setting gsbi3 = {
223 .func = GPIOMUX_FUNC_1,
224 .drv = GPIOMUX_DRV_8MA,
225 .pull = GPIOMUX_PULL_NONE,
226};
227
228static struct gpiomux_setting gsbi4 = {
229 .func = GPIOMUX_FUNC_1,
230 .drv = GPIOMUX_DRV_8MA,
231 .pull = GPIOMUX_PULL_NONE,
232};
233
234static struct gpiomux_setting gsbi5 = {
235 .func = GPIOMUX_FUNC_1,
236 .drv = GPIOMUX_DRV_8MA,
237 .pull = GPIOMUX_PULL_NONE,
238};
239
240static struct gpiomux_setting gsbi10 = {
241 .func = GPIOMUX_FUNC_2,
242 .drv = GPIOMUX_DRV_8MA,
243 .pull = GPIOMUX_PULL_NONE,
244};
245
246static struct gpiomux_setting gsbi12 = {
247 .func = GPIOMUX_FUNC_1,
248 .drv = GPIOMUX_DRV_8MA,
249 .pull = GPIOMUX_PULL_NONE,
250};
251
252static struct gpiomux_setting cdc_mclk = {
253 .func = GPIOMUX_FUNC_1,
254 .drv = GPIOMUX_DRV_8MA,
255 .pull = GPIOMUX_PULL_NONE,
256};
257
258static struct gpiomux_setting gpio_eth_config = {
259 .pull = GPIOMUX_PULL_NONE,
260 .drv = GPIOMUX_DRV_8MA,
261 .func = GPIOMUX_FUNC_GPIO,
262};
263
264static struct gpiomux_setting slimbus = {
265 .func = GPIOMUX_FUNC_1,
266 .drv = GPIOMUX_DRV_8MA,
267 .pull = GPIOMUX_PULL_KEEPER,
268};
269
270struct msm_gpiomux_config msm8960_gpiomux_configs[NR_GPIO_IRQS] = {
271 {
272 .gpio = KS8851_IRQ_GPIO,
273 .settings = {
274 [GPIOMUX_SUSPENDED] = &gpio_eth_config,
275 }
276 },
277 {
278 .gpio = KS8851_RST_GPIO,
279 .settings = {
280 [GPIOMUX_SUSPENDED] = &gpio_eth_config,
281 }
282 },
283 {
284 .gpio = FPGA_CS_GPIO,
285 .settings = {
286 [GPIOMUX_SUSPENDED] = &gpio_eth_config,
287 }
288 },
289};
290
291static struct msm_gpiomux_config msm8960_gsbi_configs[] __initdata = {
292 {
293 .gpio = 6, /* GSBI1 QUP SPI_DATA_MOSI */
294 .settings = {
295 [GPIOMUX_SUSPENDED] = &gsbi1,
296 },
297 },
298 {
299 .gpio = 7, /* GSBI1 QUP SPI_DATA_MISO */
300 .settings = {
301 [GPIOMUX_SUSPENDED] = &gsbi1,
302 },
303 },
304 {
305 .gpio = 8, /* GSBI1 QUP SPI_CS_N */
306 .settings = {
307 [GPIOMUX_SUSPENDED] = &gsbi1,
308 },
309 },
310 {
311 .gpio = 9, /* GSBI1 QUP SPI_CLK */
312 .settings = {
313 [GPIOMUX_SUSPENDED] = &gsbi1,
314 },
315 },
316 {
317 .gpio = 16, /* GSBI3 I2C QUP SDA */
318 .settings = {
319 [GPIOMUX_SUSPENDED] = &gsbi3,
320 },
321 },
322 {
323 .gpio = 17, /* GSBI3 I2C QUP SCL */
324 .settings = {
325 [GPIOMUX_SUSPENDED] = &gsbi3,
326 },
327 },
328 {
329 .gpio = 20, /* GSBI4 I2C QUP SDA */
330 .settings = {
331 [GPIOMUX_SUSPENDED] = &gsbi4,
332 },
333 },
334 {
335 .gpio = 21, /* GSBI4 I2C QUP SCL */
336 .settings = {
337 [GPIOMUX_SUSPENDED] = &gsbi4,
338 },
339 },
340 {
341 .gpio = 22, /* GSBI5 UART2 */
342 .settings = {
343 [GPIOMUX_SUSPENDED] = &gsbi5,
344 },
345 },
346 {
347 .gpio = 23, /* GSBI5 UART2 */
348 .settings = {
349 [GPIOMUX_SUSPENDED] = &gsbi5,
350 },
351 },
352 {
353 .gpio = 24, /* GSBI5 UART2 */
354 .settings = {
355 [GPIOMUX_SUSPENDED] = &gsbi5,
356 },
357 },
358 {
359 .gpio = 25, /* GSBI5 UART2 */
360 .settings = {
361 [GPIOMUX_SUSPENDED] = &gsbi5,
362 },
363 },
364 {
365 .gpio = 44, /* GSBI12 I2C QUP SDA */
366 .settings = {
367 [GPIOMUX_SUSPENDED] = &gsbi12,
368 },
369 },
370 {
371 .gpio = 45, /* GSBI12 I2C QUP SCL */
372 .settings = {
373 [GPIOMUX_SUSPENDED] = &gsbi12,
374 },
375 },
376 {
377 .gpio = 73, /* GSBI10 I2C QUP SDA */
378 .settings = {
379 [GPIOMUX_SUSPENDED] = &gsbi10,
380 },
381 },
382 {
383 .gpio = 74, /* GSBI10 I2C QUP SCL */
384 .settings = {
385 [GPIOMUX_SUSPENDED] = &gsbi10,
386 },
387 },
388};
389
390static struct msm_gpiomux_config msm8960_slimbus_config[] __initdata = {
391 {
392 .gpio = 60, /* slimbus data */
393 .settings = {
394 [GPIOMUX_SUSPENDED] = &slimbus,
395 },
396 },
397 {
398 .gpio = 61, /* slimbus clk */
399 .settings = {
400 [GPIOMUX_SUSPENDED] = &slimbus,
401 },
402 },
403};
404
405static struct msm_gpiomux_config msm8960_audio_codec_configs[] __initdata = {
406 {
407 .gpio = 59,
408 .settings = {
409 [GPIOMUX_SUSPENDED] = &cdc_mclk,
410 },
411 },
412};
413static struct gpiomux_setting wcnss_5wire_suspend_cfg = {
414 .func = GPIOMUX_FUNC_GPIO,
415 .drv = GPIOMUX_DRV_2MA,
416 .pull = GPIOMUX_PULL_NONE,
417};
418
419static struct gpiomux_setting wcnss_5wire_active_cfg = {
420 .func = GPIOMUX_FUNC_1,
421 .drv = GPIOMUX_DRV_6MA,
422 .pull = GPIOMUX_PULL_DOWN,
423};
424
425static struct msm_gpiomux_config wcnss_5wire_interface[] = {
426 {
427 .gpio = 84,
428 .settings = {
429 [GPIOMUX_ACTIVE] = &wcnss_5wire_active_cfg,
430 [GPIOMUX_SUSPENDED] = &wcnss_5wire_suspend_cfg,
431 },
432 },
433 {
434 .gpio = 85,
435 .settings = {
436 [GPIOMUX_ACTIVE] = &wcnss_5wire_active_cfg,
437 [GPIOMUX_SUSPENDED] = &wcnss_5wire_suspend_cfg,
438 },
439 },
440 {
441 .gpio = 86,
442 .settings = {
443 [GPIOMUX_ACTIVE] = &wcnss_5wire_active_cfg,
444 [GPIOMUX_SUSPENDED] = &wcnss_5wire_suspend_cfg,
445 },
446 },
447 {
448 .gpio = 87,
449 .settings = {
450 [GPIOMUX_ACTIVE] = &wcnss_5wire_active_cfg,
451 [GPIOMUX_SUSPENDED] = &wcnss_5wire_suspend_cfg,
452 },
453 },
454 {
455 .gpio = 88,
456 .settings = {
457 [GPIOMUX_ACTIVE] = &wcnss_5wire_active_cfg,
458 [GPIOMUX_SUSPENDED] = &wcnss_5wire_suspend_cfg,
459 },
460 },
461};
Nishant Pandit474f2252011-07-23 23:17:56 +0530462static struct gpiomux_setting cam_settings[4] = {
463 {
464 .func = GPIOMUX_FUNC_GPIO, /*suspend*/
465 .drv = GPIOMUX_DRV_2MA,
466 .pull = GPIOMUX_PULL_DOWN,
467 },
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700468
Nishant Pandit474f2252011-07-23 23:17:56 +0530469 {
470 .func = GPIOMUX_FUNC_1, /*active 1*/
471 .drv = GPIOMUX_DRV_2MA,
472 .pull = GPIOMUX_PULL_NONE,
473 },
474
475 {
476 .func = GPIOMUX_FUNC_GPIO, /*active 2*/
477 .drv = GPIOMUX_DRV_2MA,
478 .pull = GPIOMUX_PULL_NONE,
479 },
480
481 {
482 .func = GPIOMUX_FUNC_1, /*active 3*/
483 .drv = GPIOMUX_DRV_8MA,
484 .pull = GPIOMUX_PULL_UP,
485 },
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700486};
487
Nishant Pandit474f2252011-07-23 23:17:56 +0530488static struct msm_gpiomux_config msm8960_cam_configs[] = {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700489 {
490 .gpio = 2,
491 .settings = {
Nishant Pandit474f2252011-07-23 23:17:56 +0530492 [GPIOMUX_ACTIVE] = &cam_settings[2],
493 [GPIOMUX_SUSPENDED] = &cam_settings[0],
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700494 },
495 },
496 {
497 .gpio = 3,
498 .settings = {
Nishant Pandit474f2252011-07-23 23:17:56 +0530499 [GPIOMUX_ACTIVE] = &cam_settings[1],
500 [GPIOMUX_SUSPENDED] = &cam_settings[0],
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700501 },
502 },
503 {
504 .gpio = 4,
505 .settings = {
Nishant Pandit474f2252011-07-23 23:17:56 +0530506 [GPIOMUX_ACTIVE] = &cam_settings[1],
507 [GPIOMUX_SUSPENDED] = &cam_settings[0],
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700508 },
509 },
510 {
511 .gpio = 5,
512 .settings = {
Nishant Pandit474f2252011-07-23 23:17:56 +0530513 [GPIOMUX_ACTIVE] = &cam_settings[1],
514 [GPIOMUX_SUSPENDED] = &cam_settings[0],
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700515 },
516 },
517 {
518 .gpio = 18,
519 .settings = {
Nishant Pandit474f2252011-07-23 23:17:56 +0530520 [GPIOMUX_ACTIVE] = &cam_settings[3],
521 [GPIOMUX_SUSPENDED] = &cam_settings[0],
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700522 },
523 },
524 {
525 .gpio = 19,
526 .settings = {
Nishant Pandit474f2252011-07-23 23:17:56 +0530527 [GPIOMUX_ACTIVE] = &cam_settings[3],
528 [GPIOMUX_SUSPENDED] = &cam_settings[0],
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700529 },
530 },
531 {
532 .gpio = 20,
533 .settings = {
Nishant Pandit474f2252011-07-23 23:17:56 +0530534 [GPIOMUX_ACTIVE] = &cam_settings[3],
535 [GPIOMUX_SUSPENDED] = &cam_settings[0],
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700536 },
537 },
538 {
539 .gpio = 21,
540 .settings = {
Nishant Pandit474f2252011-07-23 23:17:56 +0530541 [GPIOMUX_ACTIVE] = &cam_settings[3],
542 [GPIOMUX_SUSPENDED] = &cam_settings[0],
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700543 },
544 },
545 {
546 .gpio = 76,
547 .settings = {
Nishant Pandit474f2252011-07-23 23:17:56 +0530548 [GPIOMUX_ACTIVE] = &cam_settings[2],
549 [GPIOMUX_SUSPENDED] = &cam_settings[0],
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700550 },
551 },
552 {
553 .gpio = 107,
554 .settings = {
Nishant Pandit474f2252011-07-23 23:17:56 +0530555 [GPIOMUX_ACTIVE] = &cam_settings[2],
556 [GPIOMUX_SUSPENDED] = &cam_settings[0],
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700557 },
558 },
559};
560
561static struct gpiomux_setting cyts_resout_sus_cfg = {
562 .func = GPIOMUX_FUNC_GPIO,
563 .drv = GPIOMUX_DRV_6MA,
564 .pull = GPIOMUX_PULL_UP,
565};
566
567static struct gpiomux_setting cyts_resout_act_cfg = {
568 .func = GPIOMUX_FUNC_GPIO,
569 .drv = GPIOMUX_DRV_6MA,
570 .pull = GPIOMUX_PULL_UP,
571};
572
573static struct gpiomux_setting cyts_sleep_sus_cfg = {
574 .func = GPIOMUX_FUNC_GPIO,
575 .drv = GPIOMUX_DRV_6MA,
576 .pull = GPIOMUX_PULL_DOWN,
577};
578
579static struct gpiomux_setting cyts_sleep_act_cfg = {
580 .func = GPIOMUX_FUNC_GPIO,
581 .drv = GPIOMUX_DRV_6MA,
582 .pull = GPIOMUX_PULL_DOWN,
583};
584
585static struct gpiomux_setting cyts_int_act_cfg = {
586 .func = GPIOMUX_FUNC_GPIO,
587 .drv = GPIOMUX_DRV_8MA,
588 .pull = GPIOMUX_PULL_UP,
589};
590
591static struct gpiomux_setting cyts_int_sus_cfg = {
592 .func = GPIOMUX_FUNC_GPIO,
593 .drv = GPIOMUX_DRV_2MA,
594 .pull = GPIOMUX_PULL_UP,
595};
596
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700597static struct msm_gpiomux_config msm8960_cyts_configs[] __initdata = {
598 { /* TS INTERRUPT */
599 .gpio = 11,
600 .settings = {
601 [GPIOMUX_ACTIVE] = &cyts_int_act_cfg,
602 [GPIOMUX_SUSPENDED] = &cyts_int_sus_cfg,
603 },
604 },
605 { /* TS SLEEP */
606 .gpio = 50,
607 .settings = {
608 [GPIOMUX_ACTIVE] = &cyts_sleep_act_cfg,
609 [GPIOMUX_SUSPENDED] = &cyts_sleep_sus_cfg,
610 },
611 },
612 { /* TS RESOUT */
613 .gpio = 52,
614 .settings = {
615 [GPIOMUX_ACTIVE] = &cyts_resout_act_cfg,
616 [GPIOMUX_SUSPENDED] = &cyts_resout_sus_cfg,
617 },
618 },
619};
620
Rohit Vaswanicd2a59b2011-07-19 12:00:48 -0700621#if defined(CONFIG_GPIO_SX150X) || defined(CONFIG_GPIO_SX150X_MODULE)
622enum {
623 SX150X_CAM,
624};
625
Nishant Pandit474f2252011-07-23 23:17:56 +0530626static struct sx150x_platform_data sx150x_data[] = {
Rohit Vaswanicd2a59b2011-07-19 12:00:48 -0700627 [SX150X_CAM] = {
628 .gpio_base = GPIO_CAM_EXPANDER_BASE,
629 .oscio_is_gpo = false,
630 .io_pullup_ena = 0x0,
Nishant Pandit474f2252011-07-23 23:17:56 +0530631 .io_pulldn_ena = 0xc0,
Rohit Vaswanicd2a59b2011-07-19 12:00:48 -0700632 .io_open_drain_ena = 0x0,
633 .irq_summary = -1,
634 },
635};
Nishant Pandit474f2252011-07-23 23:17:56 +0530636
637#endif
638
639#ifdef CONFIG_I2C
640
641#define MSM_8960_GSBI4_QUP_I2C_BUS_ID 4
642#define MSM_8960_GSBI3_QUP_I2C_BUS_ID 3
643
644#if defined(CONFIG_GPIO_SX150X) || defined(CONFIG_GPIO_SX150X_MODULE)
645
646static struct i2c_board_info cam_expander_i2c_info[] = {
647 {
648 I2C_BOARD_INFO("sx1508q", 0x22),
649 .platform_data = &sx150x_data[SX150X_CAM]
650 },
651};
652
653static struct msm_cam_expander_info cam_expander_info[] = {
654 {
655 cam_expander_i2c_info,
656 MSM_8960_GSBI4_QUP_I2C_BUS_ID,
657 },
658};
659#endif
Rohit Vaswanicd2a59b2011-07-19 12:00:48 -0700660#endif
661
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700662#define MSM_PMEM_KERNEL_EBI1_SIZE 0x110C000
663#define MSM_PMEM_ADSP_SIZE 0x3800000
664#define MSM_PMEM_AUDIO_SIZE 0x279000
665#define MSM_PMEM_SIZE 0x1800000 /* 24 Mbytes */
666
667#ifdef CONFIG_KERNEL_PMEM_EBI_REGION
668static unsigned pmem_kernel_ebi1_size = MSM_PMEM_KERNEL_EBI1_SIZE;
669static int __init pmem_kernel_ebi1_size_setup(char *p)
670{
671 pmem_kernel_ebi1_size = memparse(p, NULL);
672 return 0;
673}
674early_param("pmem_kernel_ebi1_size", pmem_kernel_ebi1_size_setup);
675#endif
676
677#ifdef CONFIG_ANDROID_PMEM
678static unsigned pmem_size = MSM_PMEM_SIZE;
679static int __init pmem_size_setup(char *p)
680{
681 pmem_size = memparse(p, NULL);
682 return 0;
683}
684early_param("pmem_size", pmem_size_setup);
685
686static unsigned pmem_adsp_size = MSM_PMEM_ADSP_SIZE;
687
688static int __init pmem_adsp_size_setup(char *p)
689{
690 pmem_adsp_size = memparse(p, NULL);
691 return 0;
692}
693early_param("pmem_adsp_size", pmem_adsp_size_setup);
694
695static unsigned pmem_audio_size = MSM_PMEM_AUDIO_SIZE;
696
697static int __init pmem_audio_size_setup(char *p)
698{
699 pmem_audio_size = memparse(p, NULL);
700 return 0;
701}
702early_param("pmem_audio_size", pmem_audio_size_setup);
703#endif
704
705#ifdef CONFIG_ANDROID_PMEM
706static struct android_pmem_platform_data android_pmem_pdata = {
707 .name = "pmem",
708 .allocator_type = PMEM_ALLOCATORTYPE_ALLORNOTHING,
709 .cached = 1,
710 .memory_type = MEMTYPE_EBI1,
711};
712
713static struct platform_device android_pmem_device = {
714 .name = "android_pmem",
715 .id = 0,
716 .dev = {.platform_data = &android_pmem_pdata},
717};
718
719static struct android_pmem_platform_data android_pmem_adsp_pdata = {
720 .name = "pmem_adsp",
721 .allocator_type = PMEM_ALLOCATORTYPE_BITMAP,
722 .cached = 0,
723 .memory_type = MEMTYPE_EBI1,
724};
725static struct platform_device android_pmem_adsp_device = {
726 .name = "android_pmem",
727 .id = 2,
728 .dev = { .platform_data = &android_pmem_adsp_pdata },
729};
730
731static struct android_pmem_platform_data android_pmem_audio_pdata = {
732 .name = "pmem_audio",
733 .allocator_type = PMEM_ALLOCATORTYPE_BITMAP,
734 .cached = 0,
735 .memory_type = MEMTYPE_EBI1,
736};
737
738static struct platform_device android_pmem_audio_device = {
739 .name = "android_pmem",
740 .id = 4,
741 .dev = { .platform_data = &android_pmem_audio_pdata },
742};
743#endif
744
745static struct memtype_reserve msm8960_reserve_table[] __initdata = {
746 [MEMTYPE_SMI] = {
747 },
748 [MEMTYPE_EBI0] = {
749 .flags = MEMTYPE_FLAGS_1M_ALIGN,
750 },
751 [MEMTYPE_EBI1] = {
752 .flags = MEMTYPE_FLAGS_1M_ALIGN,
753 },
754};
755
756static void __init size_pmem_devices(void)
757{
758#ifdef CONFIG_ANDROID_PMEM
759 android_pmem_adsp_pdata.size = pmem_adsp_size;
760 android_pmem_pdata.size = pmem_size;
761 android_pmem_audio_pdata.size = MSM_PMEM_AUDIO_SIZE;
762#endif
763}
764
765static void __init reserve_memory_for(struct android_pmem_platform_data *p)
766{
767 msm8960_reserve_table[p->memory_type].size += p->size;
768}
769
770static void __init reserve_pmem_memory(void)
771{
772#ifdef CONFIG_ANDROID_PMEM
773 reserve_memory_for(&android_pmem_adsp_pdata);
774 reserve_memory_for(&android_pmem_pdata);
775 reserve_memory_for(&android_pmem_audio_pdata);
776 msm8960_reserve_table[MEMTYPE_EBI1].size += pmem_kernel_ebi1_size;
777#endif
778}
779
Larry Basselb4126da2011-07-18 14:31:33 -0700780static int msm8960_paddr_to_memtype(unsigned int paddr)
781{
782 return MEMTYPE_EBI1;
783}
784
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700785static void __init msm8960_calculate_reserve_sizes(void)
786{
787 size_pmem_devices();
788 reserve_pmem_memory();
789}
790
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700791static struct reserve_info msm8960_reserve_info __initdata = {
792 .memtype_reserve_table = msm8960_reserve_table,
793 .calculate_reserve_sizes = msm8960_calculate_reserve_sizes,
794 .paddr_to_memtype = msm8960_paddr_to_memtype,
795};
796
Larry Basselb4126da2011-07-18 14:31:33 -0700797static int msm8960_memory_bank_size(void)
798{
799 return 1<<29;
800}
801
802static void __init locate_unstable_memory(void)
803{
804 struct membank *mb = &meminfo.bank[meminfo.nr_banks - 1];
805 unsigned long bank_size;
806 unsigned long low, high;
807
808 bank_size = msm8960_memory_bank_size();
809 low = meminfo.bank[0].start;
810 high = mb->start + mb->size;
811 low &= ~(bank_size - 1);
812
813 if (high - low <= bank_size)
814 return;
815 msm8960_reserve_info.low_unstable_address = low + bank_size;
816 msm8960_reserve_info.max_unstable_size = high - low - bank_size;
817 msm8960_reserve_info.bank_size = bank_size;
818 pr_info("low unstable address %lx max size %lx bank size %lx\n",
819 msm8960_reserve_info.low_unstable_address,
820 msm8960_reserve_info.max_unstable_size,
821 msm8960_reserve_info.bank_size);
822}
823
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700824static void __init msm8960_reserve(void)
825{
826 reserve_info = &msm8960_reserve_info;
Larry Basselb4126da2011-07-18 14:31:33 -0700827 locate_unstable_memory();
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700828 msm_reserve();
829}
830
Larry Bassela7eadea2011-07-14 10:46:00 -0700831static int msm8960_change_memory_power(unsigned long start_pfn,
832 unsigned long nr_pages, int change_type)
833{
834 return 1;
835}
836
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700837#ifdef CONFIG_MSM_CAMERA
838
839static int msm_cam_gpio_tbl[] = {
840 5, /*CAMIF_MCLK*/
841 20, /*CAMIF_I2C_DATA*/
842 21, /*CAMIF_I2C_CLK*/
843};
844
845#define VFE_CAMIF_TIMER1_GPIO 2
846#define VFE_CAMIF_TIMER2_GPIO 3
847#define VFE_CAMIF_TIMER3_GPIO_INT 4
848struct msm_camera_sensor_strobe_flash_data strobe_flash_xenon = {
849 .flash_trigger = VFE_CAMIF_TIMER2_GPIO,
850 .flash_charge = VFE_CAMIF_TIMER1_GPIO,
851 .flash_charge_done = VFE_CAMIF_TIMER3_GPIO_INT,
852 .flash_recharge_duration = 50000,
853 .irq = MSM_GPIO_TO_INT(VFE_CAMIF_TIMER3_GPIO_INT),
854};
855
Nishant Pandit474f2252011-07-23 23:17:56 +0530856#ifdef CONFIG_MSM_CAMERA_FLASH
857static struct msm_camera_sensor_flash_src msm_flash_src = {
858 .flash_sr_type = MSM_CAMERA_FLASH_SRC_EXT,
859 ._fsrc.ext_driver_src.led_en = GPIO_CAM_GP_LED_EN1,
860 ._fsrc.ext_driver_src.led_flash_en = GPIO_CAM_GP_LED_EN2,
861#if defined(CONFIG_I2C) && (defined(CONFIG_GPIO_SX150X) || \
862 defined(CONFIG_GPIO_SX150X_MODULE))
863 ._fsrc.ext_driver_src.expander_info = cam_expander_info,
864#endif
865};
866#endif
867
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700868#ifdef CONFIG_IMX074
869static struct msm_camera_sensor_platform_info sensor_board_info = {
Mansoor Aftab6d6ff5e2011-07-20 17:25:36 -0700870 .mount_angle = 90
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700871};
872#endif
873
874static int config_gpio_table(int gpio_en)
875{
876 int rc = 0, i = 0;
877 if (gpio_en) {
878 for (i = 0; i < ARRAY_SIZE(msm_cam_gpio_tbl); i++) {
879 rc = gpio_request(msm_cam_gpio_tbl[i], "CAM_GPIO");
880 if (rc < 0) {
881 pr_err("%s not able to get gpio\n", __func__);
882 for (i--; i >= 0; i--)
883 gpio_free(msm_cam_gpio_tbl[i]);
884 break;
885 }
886 }
887 } else {
888 for (i = 0; i < ARRAY_SIZE(msm_cam_gpio_tbl); i++)
889 gpio_free(msm_cam_gpio_tbl[i]);
890 }
891 return rc;
892}
893
894static int config_camera_on_gpios(void)
895{
896 int rc = 0;
897
898 rc = config_gpio_table(1);
899 if (rc < 0) {
900 printk(KERN_ERR "%s: CAMSENSOR gpio table request"
901 "failed\n", __func__);
902 return rc;
903 }
904 return rc;
905}
906
907static void config_camera_off_gpios(void)
908{
909 config_gpio_table(0);
910}
911
912struct msm_camera_device_platform_data msm_camera_csi0_device_data = {
913 .camera_gpio_on = config_camera_on_gpios,
914 .camera_gpio_off = config_camera_off_gpios,
915 .ioclk.mclk_clk_rate = 24000000,
916 .ioclk.vfe_clk_rate = 228570000,
917 .csid_core = 0,
918};
919
920struct msm_camera_device_platform_data msm_camera_csi1_device_data = {
921 .camera_gpio_on = config_camera_on_gpios,
922 .camera_gpio_off = config_camera_off_gpios,
923 .ioclk.mclk_clk_rate = 24000000,
924 .ioclk.vfe_clk_rate = 228570000,
925 .csid_core = 1,
926};
927
928#ifdef CONFIG_IMX074
929static struct msm_camera_sensor_flash_data flash_imx074 = {
930 .flash_type = MSM_CAMERA_FLASH_LED,
Nishant Pandit474f2252011-07-23 23:17:56 +0530931#ifdef CONFIG_MSM_CAMERA_FLASH
932 .flash_src = &msm_flash_src
933#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700934};
935
936static struct msm_camera_sensor_info msm_camera_sensor_imx074_data = {
937 .sensor_name = "imx074",
938 .sensor_reset = 107,
939 .sensor_pwd = 85,
940 .vcm_pwd = 0,
941 .vcm_enable = 1,
942 .pdata = &msm_camera_csi0_device_data,
943 .flash_data = &flash_imx074,
944 .strobe_flash_data = &strobe_flash_xenon,
945 .sensor_platform_info = &sensor_board_info,
946 .csi_if = 1
947};
948
949struct platform_device msm8960_camera_sensor_imx074 = {
950 .name = "msm_camera_imx074",
951 .dev = {
952 .platform_data = &msm_camera_sensor_imx074_data,
953 },
954};
955#endif
956#ifdef CONFIG_OV2720
957static struct msm_camera_sensor_flash_data flash_ov2720 = {
Kevin Chan1a990332011-07-26 20:31:23 -0700958 .flash_type = MSM_CAMERA_FLASH_NONE,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700959};
960
961static struct msm_camera_sensor_info msm_camera_sensor_ov2720_data = {
962 .sensor_name = "ov2720",
963 .sensor_reset = 76,
964 .sensor_pwd = 85,
965 .vcm_pwd = 0,
966 .vcm_enable = 1,
967 .pdata = &msm_camera_csi1_device_data,
968 .flash_data = &flash_ov2720,
969 .csi_if = 1
970};
971
972struct platform_device msm8960_camera_sensor_ov2720 = {
973 .name = "msm_camera_ov2720",
974 .dev = {
975 .platform_data = &msm_camera_sensor_ov2720_data,
976 },
977};
978#endif
Kevin Chandfecce22011-07-13 10:52:41 -0700979
980static struct msm_camera_sensor_flash_data flash_qs_mt9p017 = {
981 .flash_type = MSM_CAMERA_FLASH_LED,
982};
983
984static struct msm_camera_sensor_info msm_camera_sensor_qs_mt9p017_data = {
985 .sensor_name = "qs_mt9p017",
986 .sensor_reset = 107,
987 .sensor_pwd = 85,
988 .vcm_pwd = 0,
989 .vcm_enable = 1,
990 .pdata = &msm_camera_csi0_device_data,
991 .flash_data = &flash_qs_mt9p017,
992 .sensor_platform_info = &sensor_board_info,
993 .csi_if = 1
994};
995
996struct platform_device msm8960_camera_sensor_qs_mt9p017 = {
997 .name = "msm_camera_qs_mt9p017",
998 .dev = {
999 .platform_data = &msm_camera_sensor_qs_mt9p017_data,
1000 },
1001};
1002
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001003static void __init msm8960_init_cam(void)
1004{
1005 int i;
1006 struct platform_device *cam_dev[] = {
1007 &msm8960_camera_sensor_imx074,
1008 &msm8960_camera_sensor_ov2720,
Kevin Chandfecce22011-07-13 10:52:41 -07001009 &msm8960_camera_sensor_qs_mt9p017,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001010 };
1011
1012 for (i = 0; i < ARRAY_SIZE(cam_dev); i++) {
1013 struct msm_camera_sensor_info *s_info;
1014 s_info = cam_dev[i]->dev.platform_data;
1015 msm_get_cam_resources(s_info);
1016 platform_device_register(cam_dev[i]);
1017 }
1018}
1019#endif
1020
1021#ifdef CONFIG_FB_MSM_TRIPLE_BUFFER
1022/* prim = 608 x 1024 x 4(bpp) x 3(pages) */
1023#define MSM_FB_PRIM_BUF_SIZE 0x720000
1024#else
1025/* prim = 608 x 1024 x 4(bpp) x 2(pages) */
1026#define MSM_FB_PRIM_BUF_SIZE 0x4C0000
1027#endif
1028
1029#ifdef CONFIG_FB_MSM_MIPI_DSI
1030/* 960 x 540 x 3 x 2 */
1031#define MIPI_DSI_WRITEBACK_SIZE 0x300000
1032#else
1033#define MIPI_DSI_WRITEBACK_SIZE 0
1034#endif
1035
1036#ifdef CONFIG_FB_MSM_HDMI_MSM_PANEL
1037/* hdmi = 1920 x 1088 x 2(bpp) x 1(page) */
1038#define MSM_FB_EXT_BUF_SIZE 0x3FC000
1039#elif defined(CONFIG_FB_MSM_TVOUT)
1040/* tvout = 720 x 576 x 2(bpp) x 2(pages) */
1041#define MSM_FB_EXT_BUF_SIZE 0x195000
1042#else /* CONFIG_FB_MSM_HDMI_MSM_PANEL */
1043#define MSM_FB_EXT_BUF_SIZE 0
1044#endif /* CONFIG_FB_MSM_HDMI_MSM_PANEL */
1045
1046#define MSM_FB_SIZE roundup(MSM_FB_PRIM_BUF_SIZE + MSM_FB_EXT_BUF_SIZE +\
1047 MIPI_DSI_WRITEBACK_SIZE, 4096)
1048
1049#define MDP_VSYNC_GPIO 0
1050
1051static struct resource msm_fb_resources[] = {
1052 {
1053 .flags = IORESOURCE_DMA,
1054 }
1055};
1056
1057static struct platform_device msm_fb_device = {
1058 .name = "msm_fb",
1059 .id = 0,
1060 .num_resources = ARRAY_SIZE(msm_fb_resources),
1061 .resource = msm_fb_resources,
1062};
1063
1064static bool dsi_power_on;
1065
1066static int mipi_dsi_panel_power(int on)
1067{
1068 static struct regulator *reg_l8, *reg_l23, *reg_l2;
Nagamalleswararao Ganjieac5dfa2011-07-23 17:31:16 -07001069 static int gpio43;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001070 int rc;
1071
1072 struct pm_gpio gpio43_param = {
1073 .direction = PM_GPIO_DIR_OUT,
1074 .output_buffer = PM_GPIO_OUT_BUF_CMOS,
1075 .output_value = 0,
1076 .pull = PM_GPIO_PULL_NO,
1077 .vin_sel = 2,
1078 .out_strength = PM_GPIO_STRENGTH_HIGH,
1079 .function = PM_GPIO_FUNC_PAIRED,
1080 .inv_int_pol = 0,
1081 .disable_pin = 0,
1082 };
1083
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001084 pr_info("%s: state : %d\n", __func__, on);
1085
1086 if (!dsi_power_on) {
1087
1088 reg_l8 = regulator_get(&msm_mipi_dsi1_device.dev,
1089 "dsi_vdc");
1090 if (IS_ERR(reg_l8)) {
1091 pr_err("could not get 8921_l8, rc = %ld\n",
1092 PTR_ERR(reg_l8));
1093 return -ENODEV;
1094 }
1095
1096 reg_l23 = regulator_get(&msm_mipi_dsi1_device.dev,
1097 "dsi_vddio");
1098 if (IS_ERR(reg_l23)) {
1099 pr_err("could not get 8921_l23, rc = %ld\n",
1100 PTR_ERR(reg_l23));
1101 return -ENODEV;
1102 }
1103
1104 reg_l2 = regulator_get(&msm_mipi_dsi1_device.dev,
1105 "dsi_vdda");
1106 if (IS_ERR(reg_l2)) {
1107 pr_err("could not get 8921_l2, rc = %ld\n",
1108 PTR_ERR(reg_l2));
1109 return -ENODEV;
1110 }
1111
1112 rc = regulator_set_voltage(reg_l8, 2800000, 3000000);
1113 if (rc) {
1114 pr_err("set_voltage l8 failed, rc=%d\n", rc);
1115 return -EINVAL;
1116 }
1117 rc = regulator_set_voltage(reg_l23, 1800000, 1800000);
1118 if (rc) {
1119 pr_err("set_voltage l23 failed, rc=%d\n", rc);
1120 return -EINVAL;
1121 }
1122 rc = regulator_set_voltage(reg_l2, 1200000, 1200000);
1123 if (rc) {
1124 pr_err("set_voltage l2 failed, rc=%d\n", rc);
1125 return -EINVAL;
1126 }
1127
1128 gpio43 = PM8921_GPIO_PM_TO_SYS(43);
1129 rc = gpio_request(gpio43, "disp_rst_n");
1130 if (rc) {
1131 pr_err("request gpio 43 failed, rc=%d\n", rc);
1132 return -ENODEV;
1133 }
1134
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001135 dsi_power_on = true;
1136 }
1137
1138 if (on) {
1139 rc = regulator_set_optimum_mode(reg_l8, 100000);
1140 if (rc < 0) {
1141 pr_err("set_optimum_mode l8 failed, rc=%d\n", rc);
1142 return -EINVAL;
1143 }
1144 rc = regulator_set_optimum_mode(reg_l23, 100000);
1145 if (rc < 0) {
1146 pr_err("set_optimum_mode l23 failed, rc=%d\n", rc);
1147 return -EINVAL;
1148 }
1149 rc = regulator_set_optimum_mode(reg_l2, 100000);
1150 if (rc < 0) {
1151 pr_err("set_optimum_mode l2 failed, rc=%d\n", rc);
1152 return -EINVAL;
1153 }
1154 rc = regulator_enable(reg_l8);
1155 if (rc) {
1156 pr_err("enable l8 failed, rc=%d\n", rc);
1157 return -ENODEV;
1158 }
1159 rc = regulator_enable(reg_l23);
1160 if (rc) {
1161 pr_err("enable l8 failed, rc=%d\n", rc);
1162 return -ENODEV;
1163 }
1164 rc = regulator_enable(reg_l2);
1165 if (rc) {
1166 pr_err("enable l2 failed, rc=%d\n", rc);
1167 return -ENODEV;
1168 }
1169
1170 gpio43_param.pull = PM_GPIO_PULL_NO;
1171 rc = pm8xxx_gpio_config(gpio43, &gpio43_param);
1172 if (rc) {
1173 pr_err("gpio_config 43 failed (1), rc=%d\n", rc);
1174 return -EINVAL;
1175 }
1176 gpio43_param.pull = PM_GPIO_PULL_UP_30;
1177 rc = pm8xxx_gpio_config(gpio43, &gpio43_param);
1178 if (rc) {
1179 pr_err("gpio_config 43 failed (2), rc=%d\n", rc);
1180 return -EINVAL;
1181 }
1182 gpio43_param.pull = PM_GPIO_PULL_NO;
1183 rc = pm8xxx_gpio_config(gpio43, &gpio43_param);
1184 if (rc) {
1185 pr_err("gpio_config 43 failed (3), rc=%d\n", rc);
1186 return -EINVAL;
1187 }
1188 gpio43_param.pull = PM_GPIO_PULL_UP_30;
1189 rc = pm8xxx_gpio_config(gpio43, &gpio43_param);
1190 if (rc) {
1191 pr_err("gpio_config 43 failed (4), rc=%d\n", rc);
1192 return -EINVAL;
1193 }
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001194 gpio_set_value_cansleep(gpio43, 1);
1195 } else {
1196 rc = regulator_set_optimum_mode(reg_l8, 100);
1197 if (rc < 0) {
1198 pr_err("set_optimum_mode l8 failed, rc=%d\n", rc);
1199 return -EINVAL;
1200 }
1201 rc = regulator_set_optimum_mode(reg_l23, 100);
1202 if (rc < 0) {
1203 pr_err("set_optimum_mode l23 failed, rc=%d\n", rc);
1204 return -EINVAL;
1205 }
1206 rc = regulator_set_optimum_mode(reg_l2, 100);
1207 if (rc < 0) {
1208 pr_err("set_optimum_mode l2 failed, rc=%d\n", rc);
1209 return -EINVAL;
1210 }
1211 gpio_set_value_cansleep(gpio43, 0);
1212 }
1213 return 0;
1214}
1215
1216static struct mipi_dsi_platform_data mipi_dsi_pdata = {
1217 .vsync_gpio = MDP_VSYNC_GPIO,
1218 .dsi_power_save = mipi_dsi_panel_power,
1219};
1220
1221#ifdef CONFIG_MSM_BUS_SCALING
1222
1223static struct msm_bus_vectors mdp_init_vectors[] = {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001224 {
1225 .src = MSM_BUS_MASTER_MDP_PORT0,
1226 .dst = MSM_BUS_SLAVE_EBI_CH0,
1227 .ab = 0,
1228 .ib = 0,
1229 },
Ravishangar Kalyanam882930f2011-07-08 17:51:52 -07001230};
1231
1232static struct msm_bus_vectors mdp_ui_vectors[] = {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001233 {
1234 .src = MSM_BUS_MASTER_MDP_PORT0,
1235 .dst = MSM_BUS_SLAVE_EBI_CH0,
Ravishangar Kalyanam882930f2011-07-08 17:51:52 -07001236 .ab = 216000000 * 2,
1237 .ib = 270000000 * 2,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001238 },
1239};
1240
1241static struct msm_bus_vectors mdp_vga_vectors[] = {
1242 /* VGA and less video */
1243 {
1244 .src = MSM_BUS_MASTER_MDP_PORT0,
1245 .dst = MSM_BUS_SLAVE_EBI_CH0,
Ravishangar Kalyanam882930f2011-07-08 17:51:52 -07001246 .ab = 216000000 * 2,
1247 .ib = 270000000 * 2,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001248 },
1249};
1250
1251static struct msm_bus_vectors mdp_720p_vectors[] = {
1252 /* 720p and less video */
1253 {
1254 .src = MSM_BUS_MASTER_MDP_PORT0,
1255 .dst = MSM_BUS_SLAVE_EBI_CH0,
Ravishangar Kalyanam882930f2011-07-08 17:51:52 -07001256 .ab = 230400000 * 2,
1257 .ib = 288000000 * 2,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001258 },
1259};
1260
1261static struct msm_bus_vectors mdp_1080p_vectors[] = {
1262 /* 1080p and less video */
1263 {
1264 .src = MSM_BUS_MASTER_MDP_PORT0,
1265 .dst = MSM_BUS_SLAVE_EBI_CH0,
Ravishangar Kalyanam882930f2011-07-08 17:51:52 -07001266 .ab = 334080000 * 2,
1267 .ib = 417600000 * 2,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001268 },
1269};
1270
1271static struct msm_bus_paths mdp_bus_scale_usecases[] = {
1272 {
1273 ARRAY_SIZE(mdp_init_vectors),
1274 mdp_init_vectors,
1275 },
1276 {
Ravishangar Kalyanam882930f2011-07-08 17:51:52 -07001277 ARRAY_SIZE(mdp_ui_vectors),
1278 mdp_ui_vectors,
1279 },
1280 {
1281 ARRAY_SIZE(mdp_ui_vectors),
1282 mdp_ui_vectors,
1283 },
1284 {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001285 ARRAY_SIZE(mdp_vga_vectors),
1286 mdp_vga_vectors,
1287 },
1288 {
1289 ARRAY_SIZE(mdp_720p_vectors),
1290 mdp_720p_vectors,
1291 },
1292 {
1293 ARRAY_SIZE(mdp_1080p_vectors),
1294 mdp_1080p_vectors,
1295 },
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001296};
1297
1298static struct msm_bus_scale_pdata mdp_bus_scale_pdata = {
1299 mdp_bus_scale_usecases,
1300 ARRAY_SIZE(mdp_bus_scale_usecases),
1301 .name = "mdp",
1302};
1303
1304#endif
1305
1306int mdp_core_clk_rate_table[] = {
1307 85330000,
1308 85330000,
1309 128000000,
1310 200000000,
1311 200000000,
1312};
1313
1314static struct msm_panel_common_pdata mdp_pdata = {
1315 .gpio = MDP_VSYNC_GPIO,
1316 .mdp_core_clk_rate = 85330000,
1317 .mdp_core_clk_table = mdp_core_clk_rate_table,
1318 .num_mdp_clk = ARRAY_SIZE(mdp_core_clk_rate_table),
1319#ifdef CONFIG_MSM_BUS_SCALING
1320 .mdp_bus_scale_table = &mdp_bus_scale_pdata,
1321#endif
1322 .mdp_rev = MDP_REV_42,
1323};
1324
1325static struct platform_device mipi_dsi_renesas_panel_device = {
1326 .name = "mipi_renesas",
1327 .id = 0,
1328};
1329
1330static struct platform_device mipi_dsi_simulator_panel_device = {
1331 .name = "mipi_simulator",
1332 .id = 0,
1333};
1334
Nagamalleswararao Ganjieac5dfa2011-07-23 17:31:16 -07001335#define LPM_CHANNEL0 0
1336static int toshiba_gpio[] = {LPM_CHANNEL0};
1337
1338static struct mipi_dsi_panel_platform_data toshiba_pdata = {
1339 .gpio = toshiba_gpio,
1340};
1341
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001342static struct platform_device mipi_dsi_toshiba_panel_device = {
1343 .name = "mipi_toshiba",
1344 .id = 0,
Nagamalleswararao Ganjieac5dfa2011-07-23 17:31:16 -07001345 .dev = {
1346 .platform_data = &toshiba_pdata,
1347 }
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001348};
1349
1350#ifdef CONFIG_FB_MSM_HDMI_MSM_PANEL
1351static struct resource hdmi_msm_resources[] = {
1352 {
1353 .name = "hdmi_msm_qfprom_addr",
1354 .start = 0x00700000,
1355 .end = 0x007060FF,
1356 .flags = IORESOURCE_MEM,
1357 },
1358 {
1359 .name = "hdmi_msm_hdmi_addr",
1360 .start = 0x04A00000,
1361 .end = 0x04A00FFF,
1362 .flags = IORESOURCE_MEM,
1363 },
1364 {
1365 .name = "hdmi_msm_irq",
1366 .start = HDMI_IRQ,
1367 .end = HDMI_IRQ,
1368 .flags = IORESOURCE_IRQ,
1369 },
1370};
1371
1372static int hdmi_enable_5v(int on);
1373static int hdmi_core_power(int on, int show);
1374static int hdmi_cec_power(int on);
1375
1376static struct msm_hdmi_platform_data hdmi_msm_data = {
1377 .irq = HDMI_IRQ,
1378 .enable_5v = hdmi_enable_5v,
1379 .core_power = hdmi_core_power,
1380 .cec_power = hdmi_cec_power,
1381};
1382
1383static struct platform_device hdmi_msm_device = {
1384 .name = "hdmi_msm",
1385 .id = 0,
1386 .num_resources = ARRAY_SIZE(hdmi_msm_resources),
1387 .resource = hdmi_msm_resources,
1388 .dev.platform_data = &hdmi_msm_data,
1389};
1390#endif /* CONFIG_FB_MSM_HDMI_MSM_PANEL */
1391
Ravishangar Kalyanam882930f2011-07-08 17:51:52 -07001392#ifdef CONFIG_MSM_BUS_SCALING
1393static struct msm_bus_vectors dtv_bus_init_vectors[] = {
1394 {
1395 .src = MSM_BUS_MASTER_MDP_PORT0,
1396 .dst = MSM_BUS_SLAVE_EBI_CH0,
1397 .ab = 0,
1398 .ib = 0,
1399 },
1400};
1401static struct msm_bus_vectors dtv_bus_def_vectors[] = {
1402 {
1403 .src = MSM_BUS_MASTER_MDP_PORT0,
1404 .dst = MSM_BUS_SLAVE_EBI_CH0,
1405 .ab = 566092800 * 2,
1406 .ib = 707616000 * 2,
1407 },
1408};
1409static struct msm_bus_paths dtv_bus_scale_usecases[] = {
1410 {
1411 ARRAY_SIZE(dtv_bus_init_vectors),
1412 dtv_bus_init_vectors,
1413 },
1414 {
1415 ARRAY_SIZE(dtv_bus_def_vectors),
1416 dtv_bus_def_vectors,
1417 },
1418};
1419static struct msm_bus_scale_pdata dtv_bus_scale_pdata = {
1420 dtv_bus_scale_usecases,
1421 ARRAY_SIZE(dtv_bus_scale_usecases),
1422 .name = "dtv",
1423};
1424
1425static struct lcdc_platform_data dtv_pdata = {
1426 .bus_scale_table = &dtv_bus_scale_pdata,
1427};
1428#endif
1429
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001430static void __init msm_fb_add_devices(void)
1431{
1432 if (machine_is_msm8x60_rumi3()) {
1433 msm_fb_register_device("mdp", NULL);
1434 mipi_dsi_pdata.target_type = 1;
1435 } else
1436 msm_fb_register_device("mdp", &mdp_pdata);
1437 msm_fb_register_device("mipi_dsi", &mipi_dsi_pdata);
Ravishangar Kalyanam882930f2011-07-08 17:51:52 -07001438#ifdef CONFIG_MSM_BUS_SCALING
1439 msm_fb_register_device("dtv", &dtv_pdata);
1440#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001441}
1442
1443#ifdef CONFIG_FB_MSM_HDMI_MSM_PANEL
1444static struct gpiomux_setting hdmi_suspend_cfg = {
1445 .func = GPIOMUX_FUNC_GPIO,
1446 .drv = GPIOMUX_DRV_2MA,
1447 .pull = GPIOMUX_PULL_DOWN,
1448};
1449
1450static struct gpiomux_setting hdmi_active_1_cfg = {
1451 .func = GPIOMUX_FUNC_1,
1452 .drv = GPIOMUX_DRV_2MA,
1453 .pull = GPIOMUX_PULL_UP,
1454};
1455
1456static struct gpiomux_setting hdmi_active_2_cfg = {
1457 .func = GPIOMUX_FUNC_1,
1458 .drv = GPIOMUX_DRV_2MA,
1459 .pull = GPIOMUX_PULL_DOWN,
1460};
1461
1462static struct msm_gpiomux_config msm8960_hdmi_configs[] __initdata = {
1463 {
1464 .gpio = 99,
1465 .settings = {
1466 [GPIOMUX_ACTIVE] = &hdmi_active_1_cfg,
1467 [GPIOMUX_SUSPENDED] = &hdmi_suspend_cfg,
1468 },
1469 },
1470 {
1471 .gpio = 100,
1472 .settings = {
1473 [GPIOMUX_ACTIVE] = &hdmi_active_1_cfg,
1474 [GPIOMUX_SUSPENDED] = &hdmi_suspend_cfg,
1475 },
1476 },
1477 {
1478 .gpio = 101,
1479 .settings = {
1480 [GPIOMUX_ACTIVE] = &hdmi_active_1_cfg,
1481 [GPIOMUX_SUSPENDED] = &hdmi_suspend_cfg,
1482 },
1483 },
1484 {
1485 .gpio = 102,
1486 .settings = {
1487 [GPIOMUX_ACTIVE] = &hdmi_active_2_cfg,
1488 [GPIOMUX_SUSPENDED] = &hdmi_suspend_cfg,
1489 },
1490 },
1491};
1492
1493static int hdmi_enable_5v(int on)
1494{
1495 /* TBD: PM8921 regulator instead of 8901 */
1496 static struct regulator *reg_8921_hdmi_mvs; /* HDMI_5V */
1497 static int prev_on;
1498 int rc;
1499
1500 if (on == prev_on)
1501 return 0;
1502
1503 if (!reg_8921_hdmi_mvs)
1504 reg_8921_hdmi_mvs = regulator_get(&hdmi_msm_device.dev,
1505 "hdmi_mvs");
1506
1507 if (on) {
1508 rc = regulator_enable(reg_8921_hdmi_mvs);
1509 if (rc) {
1510 pr_err("'%s' regulator enable failed, rc=%d\n",
1511 "8921_hdmi_mvs", rc);
1512 return rc;
1513 }
1514 pr_debug("%s(on): success\n", __func__);
1515 } else {
1516 rc = regulator_disable(reg_8921_hdmi_mvs);
1517 if (rc)
1518 pr_warning("'%s' regulator disable failed, rc=%d\n",
1519 "8921_hdmi_mvs", rc);
1520 pr_debug("%s(off): success\n", __func__);
1521 }
1522
1523 prev_on = on;
1524
1525 return 0;
1526}
1527
1528static int hdmi_core_power(int on, int show)
1529{
1530 static struct regulator *reg_8921_l23, *reg_8921_s4;
1531 static int prev_on;
1532 int rc;
1533
1534 if (on == prev_on)
1535 return 0;
1536
1537 /* TBD: PM8921 regulator instead of 8901 */
1538 if (!reg_8921_l23)
1539 reg_8921_l23 = regulator_get(&hdmi_msm_device.dev, "hdmi_avdd");
1540
1541 if (!reg_8921_s4)
1542 reg_8921_s4 = regulator_get(&hdmi_msm_device.dev, "hdmi_vcc");
1543
1544 if (on) {
1545 rc = regulator_set_optimum_mode(reg_8921_l23, 100000);
1546 if (rc < 0) {
1547 pr_err("set_optimum_mode l23 failed, rc=%d\n", rc);
1548 return -EINVAL;
1549 }
1550
1551 rc = regulator_set_voltage(reg_8921_l23, 1800000, 1800000);
1552 if (!rc)
1553 rc = regulator_enable(reg_8921_l23);
1554 if (rc) {
1555 pr_err("'%s' regulator enable failed, rc=%d\n",
1556 "hdmi_avdd", rc);
1557 return rc;
1558 }
1559 rc = regulator_set_voltage(reg_8921_s4, 1800000, 1800000);
1560 if (!rc)
1561 rc = regulator_enable(reg_8921_s4);
1562 if (rc) {
1563 pr_err("'%s' regulator enable failed, rc=%d\n",
1564 "hdmi_vcc", rc);
1565 return rc;
1566 }
1567
1568 rc = gpio_request(100, "HDMI_DDC_CLK");
1569 if (rc) {
1570 pr_err("'%s'(%d) gpio_request failed, rc=%d\n",
1571 "HDMI_DDC_CLK", 100, rc);
1572 goto error1;
1573 }
1574 rc = gpio_request(101, "HDMI_DDC_DATA");
1575 if (rc) {
1576 pr_err("'%s'(%d) gpio_request failed, rc=%d\n",
1577 "HDMI_DDC_DATA", 101, rc);
1578 goto error2;
1579 }
1580 rc = gpio_request(102, "HDMI_HPD");
1581 if (rc) {
1582 pr_err("'%s'(%d) gpio_request failed, rc=%d\n",
1583 "HDMI_HPD", 102, rc);
1584 goto error3;
1585 }
1586 pr_debug("%s(on): success\n", __func__);
1587 } else {
1588 gpio_free(100);
1589 gpio_free(101);
1590 gpio_free(102);
1591
1592 rc = regulator_set_optimum_mode(reg_8921_l23, 100);
1593 if (rc < 0) {
1594 pr_err("set_optimum_mode l23 failed, rc=%d\n", rc);
1595 return -EINVAL;
1596 }
1597
1598 pr_debug("%s(off): success\n", __func__);
1599 }
1600
1601 prev_on = on;
1602
1603 return 0;
1604
1605error3:
1606 gpio_free(101);
1607error2:
1608 gpio_free(100);
1609error1:
1610 regulator_disable(reg_8921_l23);
1611 return rc;
1612}
1613
1614static int hdmi_cec_power(int on)
1615{
1616 static int prev_on;
1617 int rc;
1618
1619 if (on == prev_on)
1620 return 0;
1621
1622 if (on) {
1623 rc = gpio_request(99, "HDMI_CEC_VAR");
1624 if (rc) {
1625 pr_err("'%s'(%d) gpio_request failed, rc=%d\n",
1626 "HDMI_CEC_VAR", 99, rc);
1627 goto error;
1628 }
1629 pr_debug("%s(on): success\n", __func__);
1630 } else {
1631 gpio_free(99);
1632 pr_debug("%s(off): success\n", __func__);
1633 }
1634
1635 prev_on = on;
1636
1637 return 0;
1638error:
1639 return rc;
1640}
1641#endif /* CONFIG_FB_MSM_HDMI_MSM_PANEL */
1642
1643static void __init msm8960_allocate_memory_regions(void)
1644{
1645 void *addr;
1646 unsigned long size;
1647
1648 size = MSM_FB_SIZE;
1649 addr = alloc_bootmem_align(size, 0x1000);
1650 msm_fb_resources[0].start = __pa(addr);
1651 msm_fb_resources[0].end = msm_fb_resources[0].start + size - 1;
1652 pr_info("allocating %lu bytes at %p (%lx physical) for fb\n",
1653 size, addr, __pa(addr));
1654
1655}
1656#ifdef CONFIG_WCD9310_CODEC
1657
1658#define TABLA_INTERRUPT_BASE (NR_MSM_IRQS + NR_GPIO_IRQS + NR_PM8921_IRQS)
1659
1660static struct tabla_pdata tabla_platform_data = {
1661 .slimbus_slave_device = {
1662 .name = "tabla-slave",
1663 .e_addr = {0, 0, 0x10, 0, 0x17, 2},
1664 },
1665 .irq = MSM_GPIO_TO_INT(62),
1666 .irq_base = TABLA_INTERRUPT_BASE,
1667 .num_irqs = NR_TABLA_IRQS,
1668 .reset_gpio = PM8921_GPIO_PM_TO_SYS(34),
1669};
1670
1671static struct slim_device msm_slim_tabla = {
1672 .name = "tabla-slim",
1673 .e_addr = {0, 1, 0x10, 0, 0x17, 2},
1674 .dev = {
1675 .platform_data = &tabla_platform_data,
1676 },
1677};
1678#endif
1679
1680static struct slim_boardinfo msm_slim_devices[] = {
1681#ifdef CONFIG_WCD9310_CODEC
1682 {
1683 .bus_num = 1,
1684 .slim_slave = &msm_slim_tabla,
1685 },
1686#endif
1687 /* add more slimbus slaves as needed */
1688};
1689
Yunsen Wang5c1a7392011-07-09 19:10:16 -07001690#define MSM_WCNSS_PHYS 0x03000000
1691#define MSM_WCNSS_SIZE 0x280000
1692
1693static struct resource resources_wcnss_wlan[] = {
1694 {
1695 .start = RIVA_APPS_WLAN_RX_DATA_AVAIL_IRQ,
1696 .end = RIVA_APPS_WLAN_RX_DATA_AVAIL_IRQ,
1697 .name = "wcnss_wlanrx_irq",
1698 .flags = IORESOURCE_IRQ,
1699 },
1700 {
1701 .start = RIVA_APPS_WLAN_DATA_XFER_DONE_IRQ,
1702 .end = RIVA_APPS_WLAN_DATA_XFER_DONE_IRQ,
1703 .name = "wcnss_wlantx_irq",
1704 .flags = IORESOURCE_IRQ,
1705 },
1706 {
1707 .start = MSM_WCNSS_PHYS,
1708 .end = MSM_WCNSS_PHYS + MSM_WCNSS_SIZE - 1,
1709 .name = "wcnss_mmio",
1710 .flags = IORESOURCE_MEM,
1711 },
1712};
1713
1714static struct platform_device msm_device_wcnss_wlan = {
1715 .name = "wcnss_wlan",
1716 .id = 0,
1717 .num_resources = ARRAY_SIZE(resources_wcnss_wlan),
1718 .resource = resources_wcnss_wlan,
1719};
1720
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001721#if defined(CONFIG_CRYPTO_DEV_QCRYPTO) || \
1722 defined(CONFIG_CRYPTO_DEV_QCRYPTO_MODULE) || \
1723 defined(CONFIG_CRYPTO_DEV_QCEDEV) || \
1724 defined(CONFIG_CRYPTO_DEV_QCEDEV_MODULE)
1725
1726#define QCE_SIZE 0x10000
1727#define QCE_0_BASE 0x18500000
1728
1729#define QCE_HW_KEY_SUPPORT 0
1730#define QCE_SHA_HMAC_SUPPORT 1
1731#define QCE_SHARE_CE_RESOURCE 1
1732#define QCE_CE_SHARED 0
1733
1734static struct resource qcrypto_resources[] = {
1735 [0] = {
1736 .start = QCE_0_BASE,
1737 .end = QCE_0_BASE + QCE_SIZE - 1,
1738 .flags = IORESOURCE_MEM,
1739 },
1740 [1] = {
1741 .name = "crypto_channels",
1742 .start = DMOV_CE_IN_CHAN,
1743 .end = DMOV_CE_OUT_CHAN,
1744 .flags = IORESOURCE_DMA,
1745 },
1746 [2] = {
1747 .name = "crypto_crci_in",
1748 .start = DMOV_CE_IN_CRCI,
1749 .end = DMOV_CE_IN_CRCI,
1750 .flags = IORESOURCE_DMA,
1751 },
1752 [3] = {
1753 .name = "crypto_crci_out",
1754 .start = DMOV_CE_OUT_CRCI,
1755 .end = DMOV_CE_OUT_CRCI,
1756 .flags = IORESOURCE_DMA,
1757 },
1758};
1759
1760static struct resource qcedev_resources[] = {
1761 [0] = {
1762 .start = QCE_0_BASE,
1763 .end = QCE_0_BASE + QCE_SIZE - 1,
1764 .flags = IORESOURCE_MEM,
1765 },
1766 [1] = {
1767 .name = "crypto_channels",
1768 .start = DMOV_CE_IN_CHAN,
1769 .end = DMOV_CE_OUT_CHAN,
1770 .flags = IORESOURCE_DMA,
1771 },
1772 [2] = {
1773 .name = "crypto_crci_in",
1774 .start = DMOV_CE_IN_CRCI,
1775 .end = DMOV_CE_IN_CRCI,
1776 .flags = IORESOURCE_DMA,
1777 },
1778 [3] = {
1779 .name = "crypto_crci_out",
1780 .start = DMOV_CE_OUT_CRCI,
1781 .end = DMOV_CE_OUT_CRCI,
1782 .flags = IORESOURCE_DMA,
1783 },
1784};
1785
1786#endif
1787
1788#if defined(CONFIG_CRYPTO_DEV_QCRYPTO) || \
1789 defined(CONFIG_CRYPTO_DEV_QCRYPTO_MODULE)
1790
1791static struct msm_ce_hw_support qcrypto_ce_hw_suppport = {
1792 .ce_shared = QCE_CE_SHARED,
1793 .shared_ce_resource = QCE_SHARE_CE_RESOURCE,
1794 .hw_key_support = QCE_HW_KEY_SUPPORT,
1795 .sha_hmac = QCE_SHA_HMAC_SUPPORT,
1796};
1797
1798static struct platform_device qcrypto_device = {
1799 .name = "qcrypto",
1800 .id = 0,
1801 .num_resources = ARRAY_SIZE(qcrypto_resources),
1802 .resource = qcrypto_resources,
1803 .dev = {
1804 .coherent_dma_mask = DMA_BIT_MASK(32),
1805 .platform_data = &qcrypto_ce_hw_suppport,
1806 },
1807};
1808#endif
1809
1810#if defined(CONFIG_CRYPTO_DEV_QCEDEV) || \
1811 defined(CONFIG_CRYPTO_DEV_QCEDEV_MODULE)
1812
1813static struct msm_ce_hw_support qcedev_ce_hw_suppport = {
1814 .ce_shared = QCE_CE_SHARED,
1815 .shared_ce_resource = QCE_SHARE_CE_RESOURCE,
1816 .hw_key_support = QCE_HW_KEY_SUPPORT,
1817 .sha_hmac = QCE_SHA_HMAC_SUPPORT,
1818};
1819
1820static struct platform_device qcedev_device = {
1821 .name = "qce",
1822 .id = 0,
1823 .num_resources = ARRAY_SIZE(qcedev_resources),
1824 .resource = qcedev_resources,
1825 .dev = {
1826 .coherent_dma_mask = DMA_BIT_MASK(32),
1827 .platform_data = &qcedev_ce_hw_suppport,
1828 },
1829};
1830#endif
1831
1832
1833static int __init gpiomux_init(void)
1834{
1835 int rc;
1836
1837 rc = msm_gpiomux_init(NR_GPIO_IRQS);
1838 if (rc) {
1839 pr_err(KERN_ERR "msm_gpiomux_init failed %d\n", rc);
1840 return rc;
1841 }
1842
1843 msm_gpiomux_install(msm8960_cam_configs,
1844 ARRAY_SIZE(msm8960_cam_configs));
1845
1846 msm_gpiomux_install(msm8960_gpiomux_configs,
1847 ARRAY_SIZE(msm8960_gsbi_configs));
1848
1849 msm_gpiomux_install(msm8960_gsbi_configs,
1850 ARRAY_SIZE(msm8960_gsbi_configs));
1851
1852 msm_gpiomux_install(msm8960_cyts_configs,
1853 ARRAY_SIZE(msm8960_cyts_configs));
1854
1855 msm_gpiomux_install(msm8960_slimbus_config,
1856 ARRAY_SIZE(msm8960_slimbus_config));
1857
1858 msm_gpiomux_install(msm8960_audio_codec_configs,
1859 ARRAY_SIZE(msm8960_audio_codec_configs));
1860
1861#ifdef CONFIG_FB_MSM_HDMI_MSM_PANEL
1862 msm_gpiomux_install(msm8960_hdmi_configs,
1863 ARRAY_SIZE(msm8960_hdmi_configs));
1864#endif
1865
1866 msm_gpiomux_install(wcnss_5wire_interface,
1867 ARRAY_SIZE(wcnss_5wire_interface));
1868
1869 return 0;
1870}
1871
1872static struct msm_acpu_clock_platform_data msm8960_acpu_clock_data = {
1873 .acpu_switch_time_us = 0,
1874 .vdd_switch_time_us = 0,
1875};
1876
1877#define MSM_SHARED_RAM_PHYS 0x80000000
1878
1879static struct pm8921_adc_amux pm8921_adc_channels_data[] = {
1880 {"vcoin", CHANNEL_VCOIN, CHAN_PATH_SCALING2, AMUX_RSV1,
1881 ADC_DECIMATION_TYPE2, ADC_SCALE_DEFAULT},
1882 {"vbat", CHANNEL_VBAT, CHAN_PATH_SCALING2, AMUX_RSV1,
1883 ADC_DECIMATION_TYPE2, ADC_SCALE_DEFAULT},
1884 {"dcin", CHANNEL_DCIN, CHAN_PATH_SCALING4, AMUX_RSV1,
1885 ADC_DECIMATION_TYPE2, ADC_SCALE_DEFAULT},
1886 {"ichg", CHANNEL_ICHG, CHAN_PATH_SCALING1, AMUX_RSV1,
1887 ADC_DECIMATION_TYPE2, ADC_SCALE_DEFAULT},
1888 {"vph_pwr", CHANNEL_VPH_PWR, CHAN_PATH_SCALING2, AMUX_RSV1,
1889 ADC_DECIMATION_TYPE2, ADC_SCALE_DEFAULT},
1890 {"ibat", CHANNEL_IBAT, CHAN_PATH_SCALING1, AMUX_RSV1,
1891 ADC_DECIMATION_TYPE2, ADC_SCALE_DEFAULT},
1892 {"m4", CHANNEL_MPP_1, CHAN_PATH_SCALING1, AMUX_RSV1,
1893 ADC_DECIMATION_TYPE2, ADC_SCALE_DEFAULT},
1894 {"m5", CHANNEL_MPP_2, CHAN_PATH_SCALING2, AMUX_RSV1,
1895 ADC_DECIMATION_TYPE2, ADC_SCALE_DEFAULT},
1896 {"batt_therm", CHANNEL_BATT_THERM, CHAN_PATH_SCALING1, AMUX_RSV2,
1897 ADC_DECIMATION_TYPE2, ADC_SCALE_BATT_THERM},
1898 {"batt_id", CHANNEL_BATT_ID, CHAN_PATH_SCALING1, AMUX_RSV1,
1899 ADC_DECIMATION_TYPE2, ADC_SCALE_DEFAULT},
1900 {"usbin", CHANNEL_USBIN, CHAN_PATH_SCALING3, AMUX_RSV1,
1901 ADC_DECIMATION_TYPE2, ADC_SCALE_DEFAULT},
1902 {"pmic_therm", CHANNEL_DIE_TEMP, CHAN_PATH_SCALING1, AMUX_RSV1,
1903 ADC_DECIMATION_TYPE2, ADC_SCALE_PMIC_THERM},
1904 {"625mv", CHANNEL_625MV, CHAN_PATH_SCALING1, AMUX_RSV1,
1905 ADC_DECIMATION_TYPE2, ADC_SCALE_DEFAULT},
1906 {"125v", CHANNEL_125V, CHAN_PATH_SCALING1, AMUX_RSV1,
1907 ADC_DECIMATION_TYPE2, ADC_SCALE_DEFAULT},
1908 {"chg_temp", CHANNEL_CHG_TEMP, CHAN_PATH_SCALING1, AMUX_RSV1,
1909 ADC_DECIMATION_TYPE2, ADC_SCALE_DEFAULT},
1910};
1911
1912static struct pm8921_adc_properties pm8921_adc_data = {
1913 .adc_vdd_reference = 1800, /* milli-voltage for this adc */
1914 .bitresolution = 15,
1915 .bipolar = 0,
1916};
1917
1918static struct pm8921_adc_platform_data pm8921_adc_pdata = {
1919 .adc_channel = pm8921_adc_channels_data,
1920 .adc_num_channel = ARRAY_SIZE(pm8921_adc_channels_data),
1921 .adc_prop = &pm8921_adc_data,
1922};
Stepan Moskovchenkod056fca2011-01-27 12:12:07 -08001923
Stepan Moskovchenkof441ca22010-12-01 19:31:16 -08001924static void __init msm8960_map_io(void)
1925{
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001926 msm_shared_ram_phys = MSM_SHARED_RAM_PHYS;
Stepan Moskovchenkof441ca22010-12-01 19:31:16 -08001927 msm_map_msm8960_io();
1928}
1929
1930static void __init msm8960_init_irq(void)
1931{
1932 unsigned int i;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001933
1934 msm_mpm_irq_extn_init();
Stepan Moskovchenkof441ca22010-12-01 19:31:16 -08001935 gic_init(0, GIC_PPI_START, MSM_QGIC_DIST_BASE,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001936 (void *)MSM_QGIC_CPU_BASE);
Stepan Moskovchenkof441ca22010-12-01 19:31:16 -08001937
1938 /* Edge trigger PPIs except AVS_SVICINT and AVS_SVICINTSWDONE */
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001939 writel_relaxed(0xFFFFD7FF, MSM_QGIC_DIST_BASE + GIC_DIST_CONFIG + 4);
Stepan Moskovchenkof441ca22010-12-01 19:31:16 -08001940
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001941 writel_relaxed(0x0000FFFF, MSM_QGIC_DIST_BASE + GIC_DIST_ENABLE_SET);
1942 mb();
Stepan Moskovchenko50ede4e2010-12-13 18:12:19 -08001943
Stepan Moskovchenkof441ca22010-12-01 19:31:16 -08001944 /* FIXME: Not installing AVS_SVICINT and AVS_SVICINTSWDONE yet
1945 * as they are configured as level, which does not play nice with
1946 * handle_percpu_irq.
1947 */
1948 for (i = GIC_PPI_START; i < GIC_SPI_START; i++) {
1949 if (i != AVS_SVICINT && i != AVS_SVICINTSWDONE)
Thomas Gleixner6845664a2011-03-24 13:25:22 +01001950 irq_set_handler(i, handle_percpu_irq);
Stepan Moskovchenkof441ca22010-12-01 19:31:16 -08001951 }
1952}
1953
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001954/* MSM8960 have 5 SDCC controllers */
1955enum sdcc_controllers {
1956 SDCC1,
1957 SDCC2,
1958 SDCC3,
1959 SDCC4,
1960 SDCC5,
1961 MAX_SDCC_CONTROLLER
1962};
1963
1964/* All SDCC controllers requires VDD/VCC voltage */
1965static struct msm_mmc_reg_data mmc_vdd_reg_data[MAX_SDCC_CONTROLLER] = {
1966 /* SDCC1 : eMMC card connected */
1967 [SDCC1] = {
1968 .name = "sdc_vdd",
1969 .set_voltage_sup = 1,
Subhash Jadavani99ba53a2011-08-01 16:04:18 +05301970 .high_vol_level = 2950000,
1971 .low_vol_level = 2950000,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001972 .hpm_uA = 200000, /* 200mA */
1973 },
1974 /* SDCC3 : External card slot connected */
1975 [SDCC3] = {
1976 .name = "sdc_vdd",
1977 .set_voltage_sup = 1,
Subhash Jadavani99ba53a2011-08-01 16:04:18 +05301978 .high_vol_level = 2950000,
1979 .low_vol_level = 2950000,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001980 .hpm_uA = 600000, /* 600mA */
1981 }
1982};
1983
1984/* Only slots having eMMC card will require VCCQ voltage */
1985static struct msm_mmc_reg_data mmc_vccq_reg_data[1] = {
1986 /* SDCC1 : eMMC card connected */
1987 [SDCC1] = {
1988 .name = "sdc_vccq",
1989 .set_voltage_sup = 1,
1990 .always_on = 1,
Subhash Jadavani99ba53a2011-08-01 16:04:18 +05301991 .high_vol_level = 1800000,
1992 .low_vol_level = 1800000,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001993 .hpm_uA = 200000, /* 200mA */
1994 }
1995};
1996
1997/* All SDCC controllers may require voting for VDD PAD voltage */
1998static struct msm_mmc_reg_data mmc_vddp_reg_data[MAX_SDCC_CONTROLLER] = {
1999 /* SDCC3 : External card slot connected */
2000 [SDCC3] = {
2001 .name = "sdc_vddp",
2002 .set_voltage_sup = 1,
Subhash Jadavani99ba53a2011-08-01 16:04:18 +05302003 .high_vol_level = 2950000,
2004 .low_vol_level = 1850000,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002005 .always_on = 1,
2006 .lpm_sup = 1,
2007 /* Max. Active current required is 16 mA */
2008 .hpm_uA = 16000,
2009 /*
2010 * Sleep current required is ~300 uA. But min. vote can be
2011 * in terms of mA (min. 1 mA). So let's vote for 2 mA
2012 * during sleep.
2013 */
2014 .lpm_uA = 2000,
2015 }
2016};
2017
2018static struct msm_mmc_slot_reg_data mmc_slot_vreg_data[MAX_SDCC_CONTROLLER] = {
2019 /* SDCC1 : eMMC card connected */
2020 [SDCC1] = {
2021 .vdd_data = &mmc_vdd_reg_data[SDCC1],
2022 .vccq_data = &mmc_vccq_reg_data[SDCC1],
2023 },
2024 /* SDCC3 : External card slot connected */
2025 [SDCC3] = {
2026 .vdd_data = &mmc_vdd_reg_data[SDCC3],
2027 .vddp_data = &mmc_vddp_reg_data[SDCC3],
2028 }
2029};
2030
2031/* SDC1 pad data */
2032static struct msm_mmc_pad_drv sdc1_pad_drv_on_cfg[] = {
2033 {TLMM_HDRV_SDC1_CLK, GPIO_CFG_16MA},
2034 {TLMM_HDRV_SDC1_CMD, GPIO_CFG_10MA},
2035 {TLMM_HDRV_SDC1_DATA, GPIO_CFG_10MA}
2036};
2037
2038static struct msm_mmc_pad_drv sdc1_pad_drv_off_cfg[] = {
2039 {TLMM_HDRV_SDC1_CLK, GPIO_CFG_2MA},
2040 {TLMM_HDRV_SDC1_CMD, GPIO_CFG_2MA},
2041 {TLMM_HDRV_SDC1_DATA, GPIO_CFG_2MA}
2042};
2043
2044static struct msm_mmc_pad_pull sdc1_pad_pull_on_cfg[] = {
2045 {TLMM_PULL_SDC1_CMD, GPIO_CFG_PULL_UP},
2046 {TLMM_PULL_SDC1_DATA, GPIO_CFG_PULL_UP}
2047};
2048
2049static struct msm_mmc_pad_pull sdc1_pad_pull_off_cfg[] = {
2050 {TLMM_PULL_SDC1_CMD, GPIO_CFG_PULL_DOWN},
2051 {TLMM_PULL_SDC1_DATA, GPIO_CFG_PULL_DOWN}
2052};
2053
2054/* SDC3 pad data */
2055static struct msm_mmc_pad_drv sdc3_pad_drv_on_cfg[] = {
2056 {TLMM_HDRV_SDC3_CLK, GPIO_CFG_8MA},
2057 {TLMM_HDRV_SDC3_CMD, GPIO_CFG_8MA},
2058 {TLMM_HDRV_SDC3_DATA, GPIO_CFG_8MA}
2059};
2060
2061static struct msm_mmc_pad_drv sdc3_pad_drv_off_cfg[] = {
2062 {TLMM_HDRV_SDC3_CLK, GPIO_CFG_2MA},
2063 {TLMM_HDRV_SDC3_CMD, GPIO_CFG_2MA},
2064 {TLMM_HDRV_SDC3_DATA, GPIO_CFG_2MA}
2065};
2066
2067static struct msm_mmc_pad_pull sdc3_pad_pull_on_cfg[] = {
2068 {TLMM_PULL_SDC3_CMD, GPIO_CFG_PULL_UP},
2069 {TLMM_PULL_SDC3_DATA, GPIO_CFG_PULL_UP}
2070};
2071
2072static struct msm_mmc_pad_pull sdc3_pad_pull_off_cfg[] = {
2073 {TLMM_PULL_SDC3_CMD, GPIO_CFG_PULL_DOWN},
2074 {TLMM_PULL_SDC3_DATA, GPIO_CFG_PULL_DOWN}
2075};
2076
2077struct msm_mmc_pad_pull_data mmc_pad_pull_data[MAX_SDCC_CONTROLLER] = {
2078 [SDCC1] = {
2079 .on = sdc1_pad_pull_on_cfg,
2080 .off = sdc1_pad_pull_off_cfg,
2081 .size = ARRAY_SIZE(sdc1_pad_pull_on_cfg)
2082 },
2083 [SDCC3] = {
2084 .on = sdc3_pad_pull_on_cfg,
2085 .off = sdc3_pad_pull_off_cfg,
2086 .size = ARRAY_SIZE(sdc3_pad_pull_on_cfg)
2087 },
2088};
2089
2090struct msm_mmc_pad_drv_data mmc_pad_drv_data[MAX_SDCC_CONTROLLER] = {
2091 [SDCC1] = {
2092 .on = sdc1_pad_drv_on_cfg,
2093 .off = sdc1_pad_drv_off_cfg,
2094 .size = ARRAY_SIZE(sdc1_pad_drv_on_cfg)
2095 },
2096 [SDCC3] = {
2097 .on = sdc3_pad_drv_on_cfg,
2098 .off = sdc3_pad_drv_off_cfg,
2099 .size = ARRAY_SIZE(sdc3_pad_drv_on_cfg)
2100 },
2101};
2102
2103struct msm_mmc_pad_data mmc_pad_data[MAX_SDCC_CONTROLLER] = {
2104 [SDCC1] = {
2105 .pull = &mmc_pad_pull_data[SDCC1],
2106 .drv = &mmc_pad_drv_data[SDCC1]
2107 },
2108 [SDCC3] = {
2109 .pull = &mmc_pad_pull_data[SDCC3],
2110 .drv = &mmc_pad_drv_data[SDCC3]
2111 },
2112};
2113
2114struct msm_mmc_pin_data mmc_slot_pin_data[MAX_SDCC_CONTROLLER] = {
2115 [SDCC1] = {
2116 .pad_data = &mmc_pad_data[SDCC1],
2117 },
2118 [SDCC3] = {
2119 .pad_data = &mmc_pad_data[SDCC3],
2120 },
2121};
2122
2123static unsigned int sdc1_sup_clk_rates[] = {
Subhash Jadavanib808efac2011-06-27 15:14:07 -07002124 400000, 24000000, 48000000, 96000000
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002125};
2126
2127static unsigned int sdc3_sup_clk_rates[] = {
2128 400000, 24000000, 48000000, 96000000
2129};
2130
2131#ifdef CONFIG_MMC_MSM_SDC1_SUPPORT
2132static struct mmc_platform_data msm8960_sdc1_data = {
2133 .ocr_mask = MMC_VDD_27_28 | MMC_VDD_28_29,
2134#ifdef CONFIG_MMC_MSM_SDC1_8_BIT_SUPPORT
2135 .mmc_bus_width = MMC_CAP_8_BIT_DATA,
2136#else
2137 .mmc_bus_width = MMC_CAP_4_BIT_DATA,
2138#endif
2139 .sup_clk_table = sdc1_sup_clk_rates,
2140 .sup_clk_cnt = ARRAY_SIZE(sdc1_sup_clk_rates),
2141 .nonremovable = 1,
2142 .sdcc_v4_sup = true,
2143 .vreg_data = &mmc_slot_vreg_data[SDCC1],
Subhash Jadavanib808efac2011-06-27 15:14:07 -07002144 .pin_data = &mmc_slot_pin_data[SDCC1],
2145 .uhs_caps = MMC_CAP_1_8V_DDR
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002146};
2147#endif
2148
2149#ifdef CONFIG_MMC_MSM_SDC3_SUPPORT
2150static struct mmc_platform_data msm8960_sdc3_data = {
2151 .ocr_mask = MMC_VDD_27_28 | MMC_VDD_28_29,
2152 .mmc_bus_width = MMC_CAP_4_BIT_DATA,
2153 .sup_clk_table = sdc3_sup_clk_rates,
2154 .sup_clk_cnt = ARRAY_SIZE(sdc3_sup_clk_rates),
2155 .wpswitch_gpio = PM8921_GPIO_PM_TO_SYS(16),
2156 .sdcc_v4_sup = true,
2157 .vreg_data = &mmc_slot_vreg_data[SDCC3],
2158 .pin_data = &mmc_slot_pin_data[SDCC3],
2159#ifdef CONFIG_MMC_MSM_CARD_HW_DETECTION
2160 .status_gpio = PM8921_GPIO_PM_TO_SYS(26),
2161 .status_irq = PM8921_GPIO_IRQ(PM8921_IRQ_BASE, 26),
2162 .irq_flags = IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING,
2163#endif
2164 .xpc_cap = 1,
2165 .uhs_caps = (MMC_CAP_UHS_SDR12 | MMC_CAP_UHS_SDR25 |
2166 MMC_CAP_UHS_SDR50 | MMC_CAP_UHS_DDR50 |
Subhash Jadavanib808efac2011-06-27 15:14:07 -07002167 MMC_CAP_MAX_CURRENT_600 | MMC_CAP_1_8V_DDR)
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002168};
2169#endif
2170
2171static void __init msm8960_init_mmc(void)
2172{
2173#ifdef CONFIG_MMC_MSM_SDC1_SUPPORT
2174 /* SDC1 : eMMC card connected */
2175 msm_add_sdcc(1, &msm8960_sdc1_data);
2176#endif
2177#ifdef CONFIG_MMC_MSM_SDC3_SUPPORT
2178 /* SDC3: External card slot */
2179 msm_add_sdcc(3, &msm8960_sdc3_data);
2180#endif
2181}
2182
2183static void __init msm8960_init_buses(void)
2184{
2185#ifdef CONFIG_MSM_BUS_SCALING
2186 msm_bus_apps_fabric_pdata.rpm_enabled = 1;
2187 msm_bus_sys_fabric_pdata.rpm_enabled = 1;
2188 msm_bus_mm_fabric_pdata.rpm_enabled = 1;
2189 msm_bus_sys_fpb_pdata.rpm_enabled = 1;
2190 msm_bus_cpss_fpb_pdata.rpm_enabled = 1;
2191 msm_bus_apps_fabric.dev.platform_data = &msm_bus_apps_fabric_pdata;
2192 msm_bus_sys_fabric.dev.platform_data = &msm_bus_sys_fabric_pdata;
2193 msm_bus_mm_fabric.dev.platform_data = &msm_bus_mm_fabric_pdata;
2194 msm_bus_sys_fpb.dev.platform_data = &msm_bus_sys_fpb_pdata;
2195 msm_bus_cpss_fpb.dev.platform_data = &msm_bus_cpss_fpb_pdata;
2196#endif
2197}
2198
2199static struct msm_spi_platform_data msm8960_qup_spi_gsbi1_pdata = {
2200 .max_clock_speed = 15060000,
2201};
2202
2203#ifdef CONFIG_USB_MSM_OTG_72K
2204static struct msm_otg_platform_data msm_otg_pdata;
2205#else
2206#define USB_5V_EN 42
2207static void msm_hsusb_vbus_power(bool on)
2208{
2209 int rc;
2210 static bool vbus_is_on;
2211 static struct regulator *mvs_otg_switch;
2212 struct pm_gpio param = {
2213 .direction = PM_GPIO_DIR_OUT,
2214 .output_buffer = PM_GPIO_OUT_BUF_CMOS,
2215 .output_value = 1,
2216 .pull = PM_GPIO_PULL_NO,
2217 .vin_sel = PM_GPIO_VIN_S4,
2218 .out_strength = PM_GPIO_STRENGTH_MED,
2219 .function = PM_GPIO_FUNC_NORMAL,
2220 };
2221
2222 if (vbus_is_on == on)
2223 return;
2224
2225 if (on) {
2226 mvs_otg_switch = regulator_get(&msm_device_otg.dev, "vbus_otg");
2227 if (IS_ERR(mvs_otg_switch)) {
2228 pr_err("Unable to get mvs_otg_switch\n");
2229 return;
2230 }
2231
2232 rc = gpio_request(PM8921_GPIO_PM_TO_SYS(USB_5V_EN),
2233 "usb_5v_en");
2234 if (rc < 0) {
2235 pr_err("failed to request usb_5v_en gpio\n");
2236 goto put_mvs_otg;
2237 }
2238
2239 if (regulator_enable(mvs_otg_switch)) {
2240 pr_err("unable to enable mvs_otg_switch\n");
2241 goto free_usb_5v_en;
2242 }
2243
2244 rc = pm8xxx_gpio_config(PM8921_GPIO_PM_TO_SYS(USB_5V_EN),
2245 &param);
2246 if (rc < 0) {
2247 pr_err("failed to configure usb_5v_en gpio\n");
2248 goto disable_mvs_otg;
2249 }
2250 vbus_is_on = true;
2251 return;
2252 }
2253disable_mvs_otg:
2254 regulator_disable(mvs_otg_switch);
2255free_usb_5v_en:
2256 gpio_free(PM8921_GPIO_PM_TO_SYS(USB_5V_EN));
2257put_mvs_otg:
2258 regulator_put(mvs_otg_switch);
2259 vbus_is_on = false;
2260}
2261
2262static struct msm_otg_platform_data msm_otg_pdata = {
2263 .mode = USB_OTG,
2264 .otg_control = OTG_PMIC_CONTROL,
2265 .phy_type = SNPS_28NM_INTEGRATED_PHY,
2266 .pclk_src_name = "dfab_usb_hs_clk",
2267 .pmic_id_irq = PM8921_USB_ID_IN_IRQ(PM8921_IRQ_BASE),
2268 .vbus_power = msm_hsusb_vbus_power,
2269};
2270#endif
2271
2272#define PID_MAGIC_ID 0x71432909
2273#define SERIAL_NUM_MAGIC_ID 0x61945374
2274#define SERIAL_NUMBER_LENGTH 127
2275#define DLOAD_USB_BASE_ADD 0x2A03F0C8
2276
2277struct magic_num_struct {
2278 uint32_t pid;
2279 uint32_t serial_num;
2280};
2281
2282struct dload_struct {
2283 uint32_t reserved1;
2284 uint32_t reserved2;
2285 uint32_t reserved3;
2286 uint16_t reserved4;
2287 uint16_t pid;
2288 char serial_number[SERIAL_NUMBER_LENGTH];
2289 uint16_t reserved5;
2290 struct magic_num_struct magic_struct;
2291};
2292
2293static int usb_diag_update_pid_and_serial_num(uint32_t pid, const char *snum)
2294{
2295 struct dload_struct __iomem *dload = 0;
2296
2297 dload = ioremap(DLOAD_USB_BASE_ADD, sizeof(*dload));
2298 if (!dload) {
2299 pr_err("%s: cannot remap I/O memory region: %08x\n",
2300 __func__, DLOAD_USB_BASE_ADD);
2301 return -ENXIO;
2302 }
2303
2304 pr_debug("%s: dload:%p pid:%x serial_num:%s\n",
2305 __func__, dload, pid, snum);
2306 /* update pid */
2307 dload->magic_struct.pid = PID_MAGIC_ID;
2308 dload->pid = pid;
2309
2310 /* update serial number */
2311 dload->magic_struct.serial_num = 0;
2312 if (!snum) {
2313 memset(dload->serial_number, 0, SERIAL_NUMBER_LENGTH);
2314 goto out;
2315 }
2316
2317 dload->magic_struct.serial_num = SERIAL_NUM_MAGIC_ID;
2318 strncpy(dload->serial_number, snum, SERIAL_NUMBER_LENGTH);
2319 dload->serial_number[SERIAL_NUMBER_LENGTH - 1] = '\0';
2320out:
2321 iounmap(dload);
2322 return 0;
2323}
2324
2325static struct android_usb_platform_data android_usb_pdata = {
2326 .update_pid_and_serial_num = usb_diag_update_pid_and_serial_num,
2327};
2328
2329struct platform_device android_usb_device = {
2330 .name = "android_usb",
2331 .id = -1,
2332 .dev = {
2333 .platform_data = &android_usb_pdata,
2334 },
2335};
2336
2337static uint8_t spm_wfi_cmd_sequence[] __initdata = {
2338 0x03, 0x0f,
2339};
2340
2341static uint8_t spm_power_collapse_without_rpm[] __initdata = {
2342 0x00, 0x24, 0x54, 0x10,
2343 0x09, 0x03, 0x01,
2344 0x10, 0x54, 0x30, 0x0C,
2345 0x24, 0x30, 0x0f,
2346};
2347
2348static uint8_t spm_power_collapse_with_rpm[] __initdata = {
2349 0x00, 0x24, 0x54, 0x10,
2350 0x09, 0x07, 0x01, 0x0B,
2351 0x10, 0x54, 0x30, 0x0C,
2352 0x24, 0x30, 0x0f,
2353};
2354
2355static struct msm_spm_seq_entry msm_spm_seq_list[] __initdata = {
2356 [0] = {
2357 .mode = MSM_SPM_MODE_CLOCK_GATING,
2358 .notify_rpm = false,
2359 .cmd = spm_wfi_cmd_sequence,
2360 },
2361 [1] = {
2362 .mode = MSM_SPM_MODE_POWER_COLLAPSE,
2363 .notify_rpm = false,
2364 .cmd = spm_power_collapse_without_rpm,
2365 },
2366 [2] = {
2367 .mode = MSM_SPM_MODE_POWER_COLLAPSE,
2368 .notify_rpm = true,
2369 .cmd = spm_power_collapse_with_rpm,
2370 },
2371};
2372
2373static struct msm_spm_platform_data msm_spm_data[] __initdata = {
2374 [0] = {
2375 .reg_base_addr = MSM_SAW0_BASE,
2376 .reg_init_values[MSM_SPM_REG_SAW2_SECURE] = 0x00,
2377 .reg_init_values[MSM_SPM_REG_SAW2_CFG] = 0x1F,
2378 .reg_init_values[MSM_SPM_REG_SAW2_VCTL] = 0x9C,
2379#if defined(CONFIG_MSM_AVS_HW)
2380 .reg_init_values[MSM_SPM_REG_SAW2_AVS_CTL] = 0x00,
2381 .reg_init_values[MSM_SPM_REG_SAW2_AVS_HYSTERESIS] = 0x00,
2382#endif
2383 .reg_init_values[MSM_SPM_REG_SAW2_SPM_CTL] = 0x01,
2384 .reg_init_values[MSM_SPM_REG_SAW2_PMIC_DLY] = 0x02020202,
2385 .reg_init_values[MSM_SPM_REG_SAW2_PMIC_DATA_0] = 0x0060009C,
2386 .reg_init_values[MSM_SPM_REG_SAW2_PMIC_DATA_1] = 0x0000001C,
2387 .vctl_timeout_us = 50,
2388 .num_modes = ARRAY_SIZE(msm_spm_seq_list),
2389 .modes = msm_spm_seq_list,
2390 },
2391 [1] = {
2392 .reg_base_addr = MSM_SAW1_BASE,
2393 .reg_init_values[MSM_SPM_REG_SAW2_SECURE] = 0x00,
2394 .reg_init_values[MSM_SPM_REG_SAW2_CFG] = 0x1F,
2395 .reg_init_values[MSM_SPM_REG_SAW2_VCTL] = 0x9C,
2396#if defined(CONFIG_MSM_AVS_HW)
2397 .reg_init_values[MSM_SPM_REG_SAW2_AVS_CTL] = 0x00,
2398 .reg_init_values[MSM_SPM_REG_SAW2_AVS_HYSTERESIS] = 0x00,
2399#endif
2400 .reg_init_values[MSM_SPM_REG_SAW2_SPM_CTL] = 0x01,
2401 .reg_init_values[MSM_SPM_REG_SAW2_PMIC_DLY] = 0x02020202,
2402 .reg_init_values[MSM_SPM_REG_SAW2_PMIC_DATA_0] = 0x0060009C,
2403 .reg_init_values[MSM_SPM_REG_SAW2_PMIC_DATA_1] = 0x0000001C,
2404 .vctl_timeout_us = 50,
2405 .num_modes = ARRAY_SIZE(msm_spm_seq_list),
2406 .modes = msm_spm_seq_list,
2407 },
2408};
2409
2410static uint8_t l2_spm_wfi_cmd_sequence[] __initdata = {
2411 0x00, 0x20, 0x03, 0x20,
2412 0x00, 0x0f,
2413};
2414
2415static uint8_t l2_spm_gdhs_cmd_sequence[] __initdata = {
2416 0x00, 0x20, 0x34, 0x64,
2417 0x48, 0x07, 0x48, 0x20,
2418 0x50, 0x64, 0x04, 0x34,
2419 0x50, 0x0f,
2420};
2421static uint8_t l2_spm_power_off_cmd_sequence[] __initdata = {
2422 0x00, 0x10, 0x34, 0x64,
2423 0x48, 0x07, 0x48, 0x10,
2424 0x50, 0x64, 0x04, 0x34,
2425 0x50, 0x0F,
2426};
2427
2428static struct msm_spm_seq_entry msm_spm_l2_seq_list[] __initdata = {
2429 [0] = {
2430 .mode = MSM_SPM_L2_MODE_RETENTION,
2431 .notify_rpm = false,
2432 .cmd = l2_spm_wfi_cmd_sequence,
2433 },
2434 [1] = {
2435 .mode = MSM_SPM_L2_MODE_GDHS,
2436 .notify_rpm = true,
2437 .cmd = l2_spm_gdhs_cmd_sequence,
2438 },
2439 [2] = {
2440 .mode = MSM_SPM_L2_MODE_POWER_COLLAPSE,
2441 .notify_rpm = true,
2442 .cmd = l2_spm_power_off_cmd_sequence,
2443 },
2444};
2445
2446
2447static struct msm_spm_platform_data msm_spm_l2_data[] __initdata = {
2448 [0] = {
2449 .reg_base_addr = MSM_SAW_L2_BASE,
2450 .reg_init_values[MSM_SPM_REG_SAW2_SECURE] = 0x00,
2451 .reg_init_values[MSM_SPM_REG_SAW2_SPM_CTL] = 0x00,
2452 .reg_init_values[MSM_SPM_REG_SAW2_PMIC_DLY] = 0x02020202,
2453 .reg_init_values[MSM_SPM_REG_SAW2_PMIC_DATA_0] = 0x00A000AE,
2454 .reg_init_values[MSM_SPM_REG_SAW2_PMIC_DATA_1] = 0x00A00020,
2455 .modes = msm_spm_l2_seq_list,
2456 .num_modes = ARRAY_SIZE(msm_spm_l2_seq_list),
2457 },
2458};
2459
2460#define CYTTSP_TS_GPIO_IRQ 11
2461#define CYTTSP_TS_SLEEP_GPIO 50
2462#define CYTTSP_TS_RESOUT_N_GPIO 52
2463
2464/*virtual key support */
2465static ssize_t tma340_vkeys_show(struct kobject *kobj,
2466 struct kobj_attribute *attr, char *buf)
2467{
2468 return snprintf(buf, 200,
2469 __stringify(EV_KEY) ":" __stringify(KEY_BACK) ":73:1120:97:97"
2470 ":" __stringify(EV_KEY) ":" __stringify(KEY_MENU) ":230:1120:97:97"
2471 ":" __stringify(EV_KEY) ":" __stringify(KEY_HOME) ":389:1120:97:97"
2472 ":" __stringify(EV_KEY) ":" __stringify(KEY_SEARCH) ":544:1120:97:97"
2473 "\n");
2474}
2475
2476static struct kobj_attribute tma340_vkeys_attr = {
2477 .attr = {
2478 .mode = S_IRUGO,
2479 },
2480 .show = &tma340_vkeys_show,
2481};
2482
2483static struct attribute *tma340_properties_attrs[] = {
2484 &tma340_vkeys_attr.attr,
2485 NULL
2486};
2487
2488static struct attribute_group tma340_properties_attr_group = {
2489 .attrs = tma340_properties_attrs,
2490};
2491
2492
2493static int cyttsp_platform_init(struct i2c_client *client)
2494{
2495 int rc = 0;
2496 static struct kobject *tma340_properties_kobj;
2497
2498 tma340_vkeys_attr.attr.name = "virtualkeys.cyttsp-i2c";
2499 tma340_properties_kobj = kobject_create_and_add("board_properties",
2500 NULL);
2501 if (tma340_properties_kobj)
2502 rc = sysfs_create_group(tma340_properties_kobj,
2503 &tma340_properties_attr_group);
2504 if (!tma340_properties_kobj || rc)
2505 pr_err("%s: failed to create board_properties\n",
2506 __func__);
2507
2508 return 0;
2509}
2510
2511static struct cyttsp_regulator regulator_data[] = {
2512 {
2513 .name = "vdd",
2514 .min_uV = CY_TMA300_VTG_MIN_UV,
2515 .max_uV = CY_TMA300_VTG_MAX_UV,
2516 .load_uA = CY_TMA300_CURR_24HZ_UA,
2517 },
2518 /* TODO: Remove after runtime PM is enabled in I2C driver */
2519 {
2520 .name = "vcc_i2c",
2521 .min_uV = CY_I2C_VTG_MIN_UV,
2522 .max_uV = CY_I2C_VTG_MAX_UV,
2523 .load_uA = CY_I2C_CURR_UA,
2524 },
2525};
2526
2527static struct cyttsp_platform_data cyttsp_pdata = {
2528 .panel_maxx = 634,
2529 .panel_maxy = 1166,
2530 .disp_maxx = 616,
2531 .disp_maxy = 1023,
2532 .disp_minx = 0,
2533 .disp_miny = 16,
2534 .flags = 0x01,
2535 .gen = CY_GEN3, /* or */
2536 .use_st = CY_USE_ST,
2537 .use_mt = CY_USE_MT,
2538 .use_hndshk = CY_SEND_HNDSHK,
2539 .use_trk_id = CY_USE_TRACKING_ID,
Anirudh Ghayal15187772011-06-22 17:39:41 +05302540 .use_sleep = 0,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002541 .use_gestures = CY_USE_GESTURES,
2542 .fw_fname = "cyttsp_8960_cdp.hex",
2543 /* activate up to 4 groups
2544 * and set active distance
2545 */
2546 .gest_set = CY_GEST_GRP1 | CY_GEST_GRP2 |
2547 CY_GEST_GRP3 | CY_GEST_GRP4 |
2548 CY_ACT_DIST,
2549 /* change act_intrvl to customize the Active power state
2550 * scanning/processing refresh interval for Operating mode
2551 */
2552 .act_intrvl = CY_ACT_INTRVL_DFLT,
2553 /* change tch_tmout to customize the touch timeout for the
2554 * Active power state for Operating mode
2555 */
2556 .tch_tmout = CY_TCH_TMOUT_DFLT,
2557 /* change lp_intrvl to customize the Low Power power state
2558 * scanning/processing refresh interval for Operating mode
2559 */
2560 .lp_intrvl = CY_LP_INTRVL_DFLT,
2561 .sleep_gpio = CYTTSP_TS_SLEEP_GPIO,
2562 .resout_gpio = CYTTSP_TS_RESOUT_N_GPIO,
2563 .irq_gpio = CYTTSP_TS_GPIO_IRQ,
2564 .regulator_info = regulator_data,
2565 .num_regulators = ARRAY_SIZE(regulator_data),
2566 .init = cyttsp_platform_init,
Mohan Pallaka49c37d62011-08-01 11:52:00 +05302567 .correct_fw_ver = 9,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002568};
2569
2570static struct i2c_board_info cyttsp_info[] __initdata = {
2571 {
2572 I2C_BOARD_INFO(CY_I2C_NAME, 0x24),
2573 .platform_data = &cyttsp_pdata,
2574#ifndef CY_USE_TIMER
2575 .irq = MSM_GPIO_TO_INT(CYTTSP_TS_GPIO_IRQ),
2576#endif /* CY_USE_TIMER */
2577 },
2578};
2579
2580static void gsbi_qup_i2c_gpio_config(int adap_id, int config_type)
2581{
2582}
2583
2584static struct msm_i2c_platform_data msm8960_i2c_qup_gsbi4_pdata = {
2585 .clk_freq = 100000,
2586 .src_clk_rate = 24000000,
2587 .clk = "gsbi_qup_clk",
2588 .pclk = "gsbi_pclk",
2589 .msm_i2c_config_gpio = gsbi_qup_i2c_gpio_config,
2590};
2591
2592static struct msm_i2c_platform_data msm8960_i2c_qup_gsbi3_pdata = {
2593 .clk_freq = 100000,
2594 .src_clk_rate = 24000000,
2595 .clk = "gsbi_qup_clk",
2596 .pclk = "gsbi_pclk",
2597 .msm_i2c_config_gpio = gsbi_qup_i2c_gpio_config,
2598};
2599
2600static struct msm_i2c_platform_data msm8960_i2c_qup_gsbi10_pdata = {
2601 .clk_freq = 100000,
2602 .src_clk_rate = 24000000,
2603 .clk = "gsbi_qup_clk",
2604 .pclk = "gsbi_pclk",
2605 .msm_i2c_config_gpio = gsbi_qup_i2c_gpio_config,
2606};
2607
2608static struct msm_i2c_platform_data msm8960_i2c_qup_gsbi12_pdata = {
2609 .clk_freq = 100000,
2610 .src_clk_rate = 24000000,
2611 .clk = "gsbi_qup_clk",
2612 .pclk = "gsbi_pclk",
2613 .msm_i2c_config_gpio = gsbi_qup_i2c_gpio_config,
2614};
2615
2616static struct msm_rpm_platform_data msm_rpm_data = {
2617 .reg_base_addrs = {
2618 [MSM_RPM_PAGE_STATUS] = MSM_RPM_BASE,
2619 [MSM_RPM_PAGE_CTRL] = MSM_RPM_BASE + 0x400,
2620 [MSM_RPM_PAGE_REQ] = MSM_RPM_BASE + 0x600,
2621 [MSM_RPM_PAGE_ACK] = MSM_RPM_BASE + 0xa00,
2622 },
2623
2624 .irq_ack = RPM_APCC_CPU0_GP_HIGH_IRQ,
2625 .irq_err = RPM_APCC_CPU0_GP_LOW_IRQ,
2626 .irq_vmpm = RPM_APCC_CPU0_GP_MEDIUM_IRQ,
2627 .msm_apps_ipc_rpm_reg = MSM_APCS_GCC_BASE + 0x008,
2628 .msm_apps_ipc_rpm_val = 4,
2629};
2630
2631static struct spi_board_info spi_board_info[] __initdata = {
2632 {
2633 .modalias = "ks8851",
2634 .irq = MSM_GPIO_TO_INT(KS8851_IRQ_GPIO),
2635 .max_speed_hz = 19200000,
2636 .bus_num = 0,
2637 .chip_select = 0,
2638 .mode = SPI_MODE_0,
2639 },
2640};
2641
2642static struct platform_device msm_device_saw_core0 = {
2643 .name = "saw-regulator",
2644 .id = 0,
2645 .dev = {
2646 .platform_data = &msm_saw_regulator_pdata_s5,
2647 },
2648};
2649
2650static struct platform_device msm_device_saw_core1 = {
2651 .name = "saw-regulator",
2652 .id = 1,
2653 .dev = {
2654 .platform_data = &msm_saw_regulator_pdata_s6,
2655 },
2656};
2657
2658#ifdef CONFIG_MSM_FAKE_BATTERY
2659static struct platform_device fish_battery_device = {
2660 .name = "fish_battery",
2661};
2662#endif
2663
2664struct platform_device msm8960_device_ext_5v_vreg __devinitdata = {
2665 .name = GPIO_REGULATOR_DEV_NAME,
2666 .id = PM8921_MPP_PM_TO_SYS(7),
2667 .dev = {
2668 .platform_data = &msm_gpio_regulator_pdata[GPIO_VREG_ID_EXT_5V],
2669 },
2670};
2671
2672struct platform_device msm8960_device_ext_l2_vreg __devinitdata = {
2673 .name = GPIO_REGULATOR_DEV_NAME,
2674 .id = 91,
2675 .dev = {
2676 .platform_data = &msm_gpio_regulator_pdata[GPIO_VREG_ID_EXT_L2],
2677 },
2678};
2679
2680static struct platform_device *common_devices[] __initdata = {
2681 &msm_device_dmov,
2682 &msm_device_smd,
2683 &msm8960_device_uart_gsbi5,
Mayank Rana9f51f582011-08-04 18:35:59 +05302684 &msm_device_uart_dm6,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002685 &msm_device_saw_core0,
2686 &msm_device_saw_core1,
2687 &msm8960_device_ext_5v_vreg,
2688 &msm8960_device_ext_l2_vreg,
2689 &msm8960_device_ssbi_pm8921,
2690 &msm8960_device_qup_spi_gsbi1,
2691 &msm8960_device_qup_i2c_gsbi3,
2692 &msm8960_device_qup_i2c_gsbi4,
2693 &msm8960_device_qup_i2c_gsbi10,
2694#ifndef CONFIG_MSM_DSPS
2695 &msm8960_device_qup_i2c_gsbi12,
2696#endif
2697 &msm_slim_ctrl,
2698 &msm_device_wcnss_wlan,
2699#if defined(CONFIG_CRYPTO_DEV_QCRYPTO) || \
2700 defined(CONFIG_CRYPTO_DEV_QCRYPTO_MODULE)
2701 &qcrypto_device,
2702#endif
2703
2704#if defined(CONFIG_CRYPTO_DEV_QCEDEV) || \
2705 defined(CONFIG_CRYPTO_DEV_QCEDEV_MODULE)
2706 &qcedev_device,
2707#endif
2708#ifdef CONFIG_MSM_ROTATOR
2709 &msm_rotator_device,
2710#endif
2711 &msm_device_sps,
2712#ifdef CONFIG_MSM_FAKE_BATTERY
2713 &fish_battery_device,
2714#endif
2715#ifdef CONFIG_ANDROID_PMEM
2716 &android_pmem_device,
2717 &android_pmem_adsp_device,
2718 &android_pmem_audio_device,
2719#endif
2720 &msm_fb_device,
2721 &msm_device_vidc,
2722 &msm_device_bam_dmux,
2723 &msm_fm_platform_init,
Mona Hossain9c430e32011-07-27 11:04:47 -07002724
2725#ifdef CONFIG_HW_RANDOM_MSM
2726 &msm_device_rng,
2727#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002728};
2729
Stepan Moskovchenkod056fca2011-01-27 12:12:07 -08002730static struct platform_device *sim_devices[] __initdata = {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002731 &msm_device_otg,
2732 &msm_device_gadget_peripheral,
2733 &msm_device_hsusb_host,
2734 &android_usb_device,
2735 &msm_device_vidc,
2736 &mipi_dsi_simulator_panel_device,
2737 &msm_bus_apps_fabric,
2738 &msm_bus_sys_fabric,
2739 &msm_bus_mm_fabric,
2740 &msm_bus_sys_fpb,
2741 &msm_bus_cpss_fpb,
2742 &msm_pcm,
2743 &msm_pcm_routing,
2744 &msm_cpudai0,
2745 &msm_cpudai1,
2746 &msm_cpudai_hdmi_rx,
2747 &msm_cpudai_bt_rx,
2748 &msm_cpudai_bt_tx,
2749 &msm_cpudai_fm_rx,
2750 &msm_cpudai_fm_tx,
2751 &msm_cpu_fe,
2752 &msm_stub_codec,
2753 &msm_voice,
2754 &msm_voip,
2755 &msm_lpa_pcm,
2756
2757#if defined(CONFIG_CRYPTO_DEV_QCRYPTO) || \
2758 defined(CONFIG_CRYPTO_DEV_QCRYPTO_MODULE)
2759 &qcrypto_device,
2760#endif
2761
2762#if defined(CONFIG_CRYPTO_DEV_QCEDEV) || \
2763 defined(CONFIG_CRYPTO_DEV_QCEDEV_MODULE)
2764 &qcedev_device,
2765#endif
2766
Stepan Moskovchenkod056fca2011-01-27 12:12:07 -08002767};
2768
2769static struct platform_device *rumi3_devices[] __initdata = {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002770 &msm_kgsl_3d0,
2771 &msm_kgsl_2d0,
2772 &msm_kgsl_2d1,
2773 &mipi_dsi_renesas_panel_device,
2774#ifdef CONFIG_MSM_GEMINI
2775 &msm8960_gemini_device,
2776#endif
Stepan Moskovchenkod056fca2011-01-27 12:12:07 -08002777};
2778
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002779static struct platform_device *cdp_devices[] __initdata = {
2780 &msm_device_otg,
2781 &msm_device_gadget_peripheral,
2782 &msm_device_hsusb_host,
2783 &android_usb_device,
2784 &msm_pcm,
2785 &msm_pcm_routing,
2786 &msm_cpudai0,
2787 &msm_cpudai1,
2788 &msm_cpudai_hdmi_rx,
2789 &msm_cpudai_bt_rx,
2790 &msm_cpudai_bt_tx,
2791 &msm_cpudai_fm_rx,
2792 &msm_cpudai_fm_tx,
2793 &msm_cpu_fe,
2794 &msm_stub_codec,
2795 &msm_kgsl_3d0,
2796#ifdef CONFIG_MSM_KGSL_2D
2797 &msm_kgsl_2d0,
2798 &msm_kgsl_2d1,
2799#endif
2800 &mipi_dsi_toshiba_panel_device,
2801#ifdef CONFIG_MSM_GEMINI
2802 &msm8960_gemini_device,
2803#endif
2804 &msm_voice,
2805 &msm_voip,
2806 &msm_lpa_pcm,
2807#ifdef CONFIG_FB_MSM_HDMI_MSM_PANEL
2808 &hdmi_msm_device,
2809#endif
2810 &msm_pcm_hostless,
2811 &msm_bus_apps_fabric,
2812 &msm_bus_sys_fabric,
2813 &msm_bus_mm_fabric,
2814 &msm_bus_sys_fpb,
2815 &msm_bus_cpss_fpb,
2816};
2817
2818static void __init msm8960_i2c_init(void)
2819{
2820 msm8960_device_qup_i2c_gsbi4.dev.platform_data =
2821 &msm8960_i2c_qup_gsbi4_pdata;
2822
2823 msm8960_device_qup_i2c_gsbi3.dev.platform_data =
2824 &msm8960_i2c_qup_gsbi3_pdata;
2825
2826 msm8960_device_qup_i2c_gsbi10.dev.platform_data =
2827 &msm8960_i2c_qup_gsbi10_pdata;
2828
2829 msm8960_device_qup_i2c_gsbi12.dev.platform_data =
2830 &msm8960_i2c_qup_gsbi12_pdata;
2831}
2832
2833static struct pm8xxx_irq_platform_data pm8xxx_irq_pdata __devinitdata = {
2834 .irq_base = PM8921_IRQ_BASE,
2835 .devirq = MSM_GPIO_TO_INT(104),
2836 .irq_trigger_flag = IRQF_TRIGGER_LOW,
2837};
2838
2839static struct pm8xxx_gpio_platform_data pm8xxx_gpio_pdata __devinitdata = {
2840 .gpio_base = PM8921_GPIO_PM_TO_SYS(1),
2841};
2842
2843static struct pm8xxx_mpp_platform_data pm8xxx_mpp_pdata __devinitdata = {
2844 .mpp_base = PM8921_MPP_PM_TO_SYS(1),
2845};
2846
2847static struct pm8xxx_rtc_platform_data pm8xxx_rtc_pdata __devinitdata = {
2848 .rtc_write_enable = false,
2849};
2850
2851static struct pm8xxx_pwrkey_platform_data pm8xxx_pwrkey_pdata = {
2852 .pull_up = 1,
2853 .kpd_trigger_delay_us = 970,
2854 .wakeup = 1,
2855};
2856
2857static const unsigned int keymap[] = {
2858 KEY(0, 0, KEY_VOLUMEUP),
2859 KEY(0, 1, KEY_VOLUMEDOWN),
2860 KEY(0, 2, KEY_CAMERA_SNAPSHOT),
2861 KEY(0, 3, KEY_CAMERA_FOCUS),
2862};
2863
2864static struct matrix_keymap_data keymap_data = {
2865 .keymap_size = ARRAY_SIZE(keymap),
2866 .keymap = keymap,
2867};
2868
2869static struct pm8xxx_keypad_platform_data keypad_data = {
2870 .input_name = "keypad_8960",
2871 .input_phys_device = "keypad_8960/input0",
2872 .num_rows = 1,
2873 .num_cols = 5,
2874 .rows_gpio_start = PM8921_GPIO_PM_TO_SYS(9),
2875 .cols_gpio_start = PM8921_GPIO_PM_TO_SYS(1),
2876 .debounce_ms = 15,
2877 .scan_delay_ms = 32,
2878 .row_hold_ns = 91500,
2879 .wakeup = 1,
2880 .keymap_data = &keymap_data,
2881};
2882
2883static const unsigned int keymap_sim[] = {
2884 KEY(0, 0, KEY_7),
2885 KEY(0, 1, KEY_DOWN),
2886 KEY(0, 2, KEY_UP),
2887 KEY(0, 3, KEY_RIGHT),
2888 KEY(0, 4, KEY_ENTER),
2889 KEY(0, 5, KEY_L),
2890 KEY(0, 6, KEY_BACK),
2891 KEY(0, 7, KEY_M),
2892
2893 KEY(1, 0, KEY_LEFT),
2894 KEY(1, 1, KEY_SEND),
2895 KEY(1, 2, KEY_1),
2896 KEY(1, 3, KEY_4),
2897 KEY(1, 4, KEY_CLEAR),
2898 KEY(1, 5, KEY_MSDOS),
2899 KEY(1, 6, KEY_SPACE),
2900 KEY(1, 7, KEY_COMMA),
2901
2902 KEY(2, 0, KEY_6),
2903 KEY(2, 1, KEY_5),
2904 KEY(2, 2, KEY_8),
2905 KEY(2, 3, KEY_3),
2906 KEY(2, 4, KEY_NUMERIC_STAR),
2907 KEY(2, 5, KEY_UP),
2908 KEY(2, 6, KEY_DOWN),
2909 KEY(2, 7, KEY_LEFTSHIFT),
2910
2911 KEY(3, 0, KEY_9),
2912 KEY(3, 1, KEY_NUMERIC_POUND),
2913 KEY(3, 2, KEY_0),
2914 KEY(3, 3, KEY_2),
2915 KEY(3, 4, KEY_SLEEP),
2916 KEY(3, 5, KEY_F1),
2917 KEY(3, 6, KEY_F2),
2918 KEY(3, 7, KEY_F3),
2919
2920 KEY(4, 0, KEY_BACK),
2921 KEY(4, 1, KEY_HOME),
2922 KEY(4, 2, KEY_MENU),
2923 KEY(4, 3, KEY_VOLUMEUP),
2924 KEY(4, 4, KEY_VOLUMEDOWN),
2925 KEY(4, 5, KEY_F4),
2926 KEY(4, 6, KEY_F5),
2927 KEY(4, 7, KEY_F6),
2928
2929 KEY(5, 0, KEY_R),
2930 KEY(5, 1, KEY_T),
2931 KEY(5, 2, KEY_Y),
2932 KEY(5, 3, KEY_LEFTALT),
2933 KEY(5, 4, KEY_KPENTER),
2934 KEY(5, 5, KEY_Q),
2935 KEY(5, 6, KEY_W),
2936 KEY(5, 7, KEY_E),
2937
2938 KEY(6, 0, KEY_F),
2939 KEY(6, 1, KEY_G),
2940 KEY(6, 2, KEY_H),
2941 KEY(6, 3, KEY_CAPSLOCK),
2942 KEY(6, 4, KEY_PAGEUP),
2943 KEY(6, 5, KEY_A),
2944 KEY(6, 6, KEY_S),
2945 KEY(6, 7, KEY_D),
2946
2947 KEY(7, 0, KEY_V),
2948 KEY(7, 1, KEY_B),
2949 KEY(7, 2, KEY_N),
2950 KEY(7, 3, KEY_MENU),
2951 KEY(7, 4, KEY_PAGEDOWN),
2952 KEY(7, 5, KEY_Z),
2953 KEY(7, 6, KEY_X),
2954 KEY(7, 7, KEY_C),
2955
2956 KEY(8, 0, KEY_P),
2957 KEY(8, 1, KEY_J),
2958 KEY(8, 2, KEY_K),
2959 KEY(8, 3, KEY_INSERT),
2960 KEY(8, 4, KEY_LINEFEED),
2961 KEY(8, 5, KEY_U),
2962 KEY(8, 6, KEY_I),
2963 KEY(8, 7, KEY_O),
2964
2965 KEY(9, 0, KEY_4),
2966 KEY(9, 1, KEY_5),
2967 KEY(9, 2, KEY_6),
2968 KEY(9, 3, KEY_7),
2969 KEY(9, 4, KEY_8),
2970 KEY(9, 5, KEY_1),
2971 KEY(9, 6, KEY_2),
2972 KEY(9, 7, KEY_3),
2973
2974 KEY(10, 0, KEY_F7),
2975 KEY(10, 1, KEY_F8),
2976 KEY(10, 2, KEY_F9),
2977 KEY(10, 3, KEY_F10),
2978 KEY(10, 4, KEY_FN),
2979 KEY(10, 5, KEY_9),
2980 KEY(10, 6, KEY_0),
2981 KEY(10, 7, KEY_DOT),
2982
2983 KEY(11, 0, KEY_LEFTCTRL),
2984 KEY(11, 1, KEY_F11),
2985 KEY(11, 2, KEY_ENTER),
2986 KEY(11, 3, KEY_SEARCH),
2987 KEY(11, 4, KEY_DELETE),
2988 KEY(11, 5, KEY_RIGHT),
2989 KEY(11, 6, KEY_LEFT),
2990 KEY(11, 7, KEY_RIGHTSHIFT),
2991 KEY(0, 0, KEY_VOLUMEUP),
2992 KEY(0, 1, KEY_VOLUMEDOWN),
2993 KEY(0, 2, KEY_CAMERA_SNAPSHOT),
2994 KEY(0, 3, KEY_CAMERA_FOCUS),
2995};
2996
2997static struct matrix_keymap_data keymap_data_sim = {
2998 .keymap_size = ARRAY_SIZE(keymap_sim),
2999 .keymap = keymap_sim,
3000};
3001
3002static struct pm8xxx_keypad_platform_data keypad_data_sim = {
3003 .input_name = "keypad_8960",
3004 .input_phys_device = "keypad_8960/input0",
3005 .num_rows = 12,
3006 .num_cols = 8,
3007 .rows_gpio_start = PM8921_GPIO_PM_TO_SYS(9),
3008 .cols_gpio_start = PM8921_GPIO_PM_TO_SYS(1),
3009 .debounce_ms = 15,
3010 .scan_delay_ms = 32,
3011 .row_hold_ns = 91500,
3012 .wakeup = 1,
3013 .keymap_data = &keymap_data_sim,
3014};
3015
3016static struct pm8921_charger_platform_data pm8921_chg_pdata __devinitdata = {
3017 .safety_time = 180,
3018 .update_time = 1,
3019 .max_voltage = 4200,
3020 .min_voltage = 3200,
3021 .resume_voltage = 4100,
3022 .term_current = 100,
3023};
3024
3025static struct pm8xxx_misc_platform_data pm8xxx_misc_pdata = {
3026 .priority = 0,
3027};
3028
3029static struct pm8921_bms_platform_data pm8921_bms_pdata __devinitdata = {
3030 .r_sense = 10,
3031 .i_test = 2500,
3032 .v_failure = 3000,
3033 .calib_delay_ms = 600000,
3034 .batt_data = &palladium_1500_data,
3035};
3036
3037static struct led_info pm8921_led_info[] = {
3038 [0] = {
3039 .name = "led:drv1",
3040 .flags = PM8XXX_ID_LED_1,
3041 },
3042};
3043
3044static struct led_platform_data pm8xxx_leds_pdata = {
3045 .num_leds = ARRAY_SIZE(pm8921_led_info),
3046 .leds = pm8921_led_info,
3047};
3048
3049static struct pm8921_platform_data pm8921_platform_data __devinitdata = {
3050 .irq_pdata = &pm8xxx_irq_pdata,
3051 .gpio_pdata = &pm8xxx_gpio_pdata,
3052 .mpp_pdata = &pm8xxx_mpp_pdata,
3053 .rtc_pdata = &pm8xxx_rtc_pdata,
3054 .pwrkey_pdata = &pm8xxx_pwrkey_pdata,
3055 .keypad_pdata = &keypad_data,
3056 .misc_pdata = &pm8xxx_misc_pdata,
3057 .regulator_pdatas = msm_pm8921_regulator_pdata,
3058 .charger_pdata = &pm8921_chg_pdata,
3059 .bms_pdata = &pm8921_bms_pdata,
3060 .adc_pdata = &pm8921_adc_pdata,
3061 .leds_pdata = &pm8xxx_leds_pdata,
3062};
3063
3064static struct msm_ssbi_platform_data msm8960_ssbi_pm8921_pdata __devinitdata = {
3065 .controller_type = MSM_SBI_CTRL_PMIC_ARBITER,
3066 .slave = {
3067 .name = "pm8921-core",
3068 .platform_data = &pm8921_platform_data,
3069 },
3070};
3071
3072static void msm8960_wcnss_init(void)
3073{
3074 int i, ret, j;
3075
3076 for (i = 0; i < ARRAY_SIZE(wcnss_5wire_interface); i++) {
3077 ret = gpio_request(wcnss_5wire_interface[i].gpio,
3078 "wcnss_5_wire");
3079 if (ret) {
3080 pr_err("wcnss_5_wire gpio %d failed: %d\n",
3081 wcnss_5wire_interface[i].gpio, ret);
3082 goto fail;
3083 }
3084 }
3085
3086 pr_info("%s: Iris 5-wire gpios configured\n", __func__);
3087
3088 return;
3089
3090fail:
3091 for (j = 0; j < i; j++)
3092 gpio_free(wcnss_5wire_interface[j].gpio);
3093}
3094
3095static int ethernet_init(void)
3096{
3097 int ret;
3098 ret = gpio_request(KS8851_IRQ_GPIO, "ks8851_irq");
3099 if (ret) {
3100 pr_err("ks8851 gpio_request failed: %d\n", ret);
3101 goto fail;
3102 }
3103
3104 ret = gpio_request(KS8851_RST_GPIO, "ks8851_rst");
3105 if (ret) {
3106 pr_err("ks8851 gpio_request failed: %d\n", ret);
3107 goto fail_rst;
3108 }
3109
3110 ret = gpio_request(FPGA_CS_GPIO, "fpga_cs");
3111 if (ret) {
3112 pr_err("ks8851 gpio_request failed: %d\n", ret);
3113 goto fail_cs;
3114 }
3115
3116 gpio_direction_output(FPGA_CS_GPIO, 1);
3117 gpio_direction_output(KS8851_RST_GPIO, 1);
3118 return 0;
3119fail_cs:
3120 gpio_free(KS8851_RST_GPIO);
3121fail_rst:
3122 gpio_free(KS8851_IRQ_GPIO);
3123fail:
3124 return ret;
3125}
3126
3127static struct msm_cpuidle_state msm_cstates[] __initdata = {
3128 {0, 0, "C0", "WFI",
3129 MSM_PM_SLEEP_MODE_WAIT_FOR_INTERRUPT},
3130
3131 {0, 1, "C1", "STANDALONE_POWER_COLLAPSE",
3132 MSM_PM_SLEEP_MODE_POWER_COLLAPSE_STANDALONE},
3133
3134 {0, 2, "C2", "POWER_COLLAPSE",
3135 MSM_PM_SLEEP_MODE_POWER_COLLAPSE},
3136
3137 {1, 0, "C0", "WFI",
3138 MSM_PM_SLEEP_MODE_WAIT_FOR_INTERRUPT},
3139
3140 {1, 1, "C1", "STANDALONE_POWER_COLLAPSE",
3141 MSM_PM_SLEEP_MODE_POWER_COLLAPSE_STANDALONE},
3142};
3143
3144static struct msm_pm_platform_data msm_pm_data[MSM_PM_SLEEP_MODE_NR * 2] = {
3145 [MSM_PM_MODE(0, MSM_PM_SLEEP_MODE_POWER_COLLAPSE)] = {
3146 .idle_supported = 1,
3147 .suspend_supported = 1,
3148 .idle_enabled = 0,
3149 .suspend_enabled = 0,
3150 .latency = 4000,
3151 .residency = 13000,
3152 },
3153
3154 [MSM_PM_MODE(0, MSM_PM_SLEEP_MODE_POWER_COLLAPSE_STANDALONE)] = {
3155 .idle_supported = 1,
3156 .suspend_supported = 1,
3157 .idle_enabled = 0,
3158 .suspend_enabled = 0,
3159 .latency = 500,
3160 .residency = 6000,
3161 },
3162
3163 [MSM_PM_MODE(0, MSM_PM_SLEEP_MODE_WAIT_FOR_INTERRUPT)] = {
3164 .idle_supported = 1,
3165 .suspend_supported = 1,
3166 .idle_enabled = 1,
3167 .suspend_enabled = 1,
3168 .latency = 2,
3169 .residency = 0,
3170 },
3171
3172 [MSM_PM_MODE(1, MSM_PM_SLEEP_MODE_POWER_COLLAPSE)] = {
3173 .idle_supported = 0,
3174 .suspend_supported = 1,
3175 .idle_enabled = 0,
3176 .suspend_enabled = 0,
3177 .latency = 600,
3178 .residency = 7200,
3179 },
3180
3181 [MSM_PM_MODE(1, MSM_PM_SLEEP_MODE_POWER_COLLAPSE_STANDALONE)] = {
3182 .idle_supported = 1,
3183 .suspend_supported = 1,
3184 .idle_enabled = 0,
3185 .suspend_enabled = 0,
3186 .latency = 500,
3187 .residency = 6000,
3188 },
3189
3190 [MSM_PM_MODE(1, MSM_PM_SLEEP_MODE_WAIT_FOR_INTERRUPT)] = {
3191 .idle_supported = 1,
3192 .suspend_supported = 0,
3193 .idle_enabled = 1,
3194 .suspend_enabled = 0,
3195 .latency = 2,
3196 .residency = 0,
3197 },
3198};
3199
3200static struct msm_rpmrs_level msm_rpmrs_levels[] __initdata = {
3201 {
3202 MSM_PM_SLEEP_MODE_WAIT_FOR_INTERRUPT,
3203 MSM_RPMRS_LIMITS(ON, ACTIVE, MAX, ACTIVE),
3204 true,
3205 1, 8000, 100000, 1,
3206 },
3207
3208 {
3209 MSM_PM_SLEEP_MODE_POWER_COLLAPSE_STANDALONE,
3210 MSM_RPMRS_LIMITS(ON, ACTIVE, MAX, ACTIVE),
3211 true,
3212 1500, 5000, 60100000, 3000,
3213 },
3214
3215 {
3216 MSM_PM_SLEEP_MODE_POWER_COLLAPSE,
3217 MSM_RPMRS_LIMITS(ON, GDHS, MAX, ACTIVE),
3218 false,
3219 1800, 5000, 60350000, 3500,
3220 },
3221
3222 {
3223 MSM_PM_SLEEP_MODE_POWER_COLLAPSE,
3224 MSM_RPMRS_LIMITS(ON, HSFS_OPEN, MAX, ACTIVE),
3225 false,
3226 2800, 2500, 65350000, 4800,
3227 },
3228
3229 {
3230 MSM_PM_SLEEP_MODE_POWER_COLLAPSE,
3231 MSM_RPMRS_LIMITS(OFF, GDHS, MAX, ACTIVE),
3232 false,
3233 3800, 4500, 67850000, 5500,
3234 },
3235
3236 {
3237 MSM_PM_SLEEP_MODE_POWER_COLLAPSE,
3238 MSM_RPMRS_LIMITS(OFF, HSFS_OPEN, MAX, ACTIVE),
3239 false,
3240 4800, 2000, 71850000, 6800,
3241 },
3242
3243 {
3244 MSM_PM_SLEEP_MODE_POWER_COLLAPSE,
3245 MSM_RPMRS_LIMITS(OFF, HSFS_OPEN, ACTIVE, RET_HIGH),
3246 false,
3247 6800, 500, 75850000, 8800,
3248 },
3249
3250 {
3251 MSM_PM_SLEEP_MODE_POWER_COLLAPSE,
3252 MSM_RPMRS_LIMITS(OFF, HSFS_OPEN, RET_HIGH, RET_LOW),
3253 false,
3254 7800, 0, 76350000, 9800,
3255 },
3256};
3257
3258#ifdef CONFIG_I2C
3259#define I2C_SURF 1
3260#define I2C_FFA (1 << 1)
3261#define I2C_RUMI (1 << 2)
3262#define I2C_SIM (1 << 3)
3263#define I2C_FLUID (1 << 4)
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003264
3265struct i2c_registry {
3266 u8 machs;
3267 int bus;
3268 struct i2c_board_info *info;
3269 int len;
3270};
3271
3272#ifdef CONFIG_MSM_CAMERA
3273static struct i2c_board_info msm_camera_boardinfo[] __initdata = {
3274#ifdef CONFIG_IMX074
3275 {
3276 I2C_BOARD_INFO("imx074", 0x1A),
3277 },
3278#endif
3279#ifdef CONFIG_OV2720
3280 {
3281 I2C_BOARD_INFO("ov2720", 0x6C),
3282 },
3283#endif
Kevin Chandfecce22011-07-13 10:52:41 -07003284 {
3285 I2C_BOARD_INFO("qs_mt9p017", 0x6C >> 1),
3286 },
Nishant Pandit474f2252011-07-23 23:17:56 +05303287#ifdef CONFIG_MSM_CAMERA_FLASH_SC628A
3288 {
3289 I2C_BOARD_INFO("sc628a", 0x6E),
3290 },
3291#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003292};
3293#endif
3294
3295/* Sensors DSPS platform data */
3296#ifdef CONFIG_MSM_DSPS
3297#define DSPS_PIL_GENERIC_NAME "dsps"
3298#endif /* CONFIG_MSM_DSPS */
3299
3300static void __init msm8960_init_dsps(void)
3301{
3302#ifdef CONFIG_MSM_DSPS
3303 struct msm_dsps_platform_data *pdata =
3304 msm_dsps_device.dev.platform_data;
3305 pdata->pil_name = DSPS_PIL_GENERIC_NAME;
3306 pdata->gpios = NULL;
3307 pdata->gpios_num = 0;
3308
3309 platform_device_register(&msm_dsps_device);
3310#endif /* CONFIG_MSM_DSPS */
3311}
3312
3313static struct i2c_registry msm8960_i2c_devices[] __initdata = {
3314#ifdef CONFIG_MSM_CAMERA
3315 {
3316 I2C_SURF | I2C_FFA | I2C_FLUID | I2C_RUMI,
3317 MSM_8960_GSBI4_QUP_I2C_BUS_ID,
3318 msm_camera_boardinfo,
3319 ARRAY_SIZE(msm_camera_boardinfo),
3320 },
3321#endif
3322 {
3323 I2C_SURF | I2C_FFA | I2C_FLUID,
3324 MSM_8960_GSBI3_QUP_I2C_BUS_ID,
3325 cyttsp_info,
3326 ARRAY_SIZE(cyttsp_info),
Rohit Vaswanicd2a59b2011-07-19 12:00:48 -07003327 },
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003328};
3329#endif /* CONFIG_I2C */
3330
3331static void __init register_i2c_devices(void)
3332{
3333#ifdef CONFIG_I2C
3334 u8 mach_mask = 0;
3335 int i;
3336
3337 /* Build the matching 'supported_machs' bitmask */
3338 if (machine_is_msm8960_cdp())
3339 mach_mask = I2C_SURF;
3340 else if (machine_is_msm8960_rumi3())
3341 mach_mask = I2C_RUMI;
3342 else if (machine_is_msm8960_sim())
3343 mach_mask = I2C_SIM;
Amy Maloche2d028032011-07-20 14:08:06 -07003344 else if (machine_is_msm8960_fluid())
3345 mach_mask = I2C_FLUID;
Amy Maloche1b0663f2011-08-02 16:46:22 -07003346 else if (machine_is_msm8960_mtp())
3347 mach_mask = I2C_FFA;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003348 else
3349 pr_err("unmatched machine ID in register_i2c_devices\n");
3350
3351 /* Run the array and install devices as appropriate */
3352 for (i = 0; i < ARRAY_SIZE(msm8960_i2c_devices); ++i) {
3353 if (msm8960_i2c_devices[i].machs & mach_mask)
3354 i2c_register_board_info(msm8960_i2c_devices[i].bus,
3355 msm8960_i2c_devices[i].info,
3356 msm8960_i2c_devices[i].len);
3357 }
3358#endif
3359}
3360
Stepan Moskovchenkod056fca2011-01-27 12:12:07 -08003361static void __init msm8960_sim_init(void)
3362{
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003363 if (socinfo_init() < 0)
3364 pr_err("socinfo_init() failed!\n");
3365
3366 BUG_ON(msm_rpm_init(&msm_rpm_data));
3367 BUG_ON(msm_rpmrs_levels_init(msm_rpmrs_levels,
3368 ARRAY_SIZE(msm_rpmrs_levels)));
3369 regulator_suppress_info_printing();
3370 msm8960_clock_init();
3371 msm8960_device_ssbi_pm8921.dev.platform_data =
3372 &msm8960_ssbi_pm8921_pdata;
3373 pm8921_platform_data.num_regulators = msm_pm8921_regulator_pdata_len;
3374 msm8960_device_qup_spi_gsbi1.dev.platform_data =
3375 &msm8960_qup_spi_gsbi1_pdata;
3376
3377 /* Simulator supports a QWERTY keypad */
3378 pm8921_platform_data.keypad_pdata = &keypad_data_sim;
3379
3380 msm_device_otg.dev.platform_data = &msm_otg_pdata;
3381 msm_device_gadget_peripheral.dev.parent = &msm_device_otg.dev;
3382 msm_device_hsusb_host.dev.parent = &msm_device_otg.dev;
3383 gpiomux_init();
3384 ethernet_init();
3385 msm8960_i2c_init();
3386 msm_spm_init(msm_spm_data, ARRAY_SIZE(msm_spm_data));
3387 msm_spm_l2_init(msm_spm_l2_data);
3388 msm8960_init_buses();
3389 platform_add_devices(common_devices, ARRAY_SIZE(common_devices));
3390 pm8921_gpio_mpp_init();
Stepan Moskovchenkod056fca2011-01-27 12:12:07 -08003391 platform_add_devices(sim_devices, ARRAY_SIZE(sim_devices));
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003392 msm_acpu_clock_init(&msm8960_acpu_clock_data);
3393
3394 msm8960_device_qup_spi_gsbi1.dev.platform_data =
3395 &msm8960_qup_spi_gsbi1_pdata;
3396 spi_register_board_info(spi_board_info, ARRAY_SIZE(spi_board_info));
3397
3398 msm8960_init_mmc();
3399 msm_fb_add_devices();
3400 slim_register_board_info(msm_slim_devices,
3401 ARRAY_SIZE(msm_slim_devices));
3402 msm_pm_set_platform_data(msm_pm_data, ARRAY_SIZE(msm_pm_data));
3403 msm_pm_set_rpm_wakeup_irq(RPM_APCC_CPU0_WAKE_UP_IRQ);
3404 msm_cpuidle_set_states(msm_cstates, ARRAY_SIZE(msm_cstates),
3405 msm_pm_data);
Stepan Moskovchenkod056fca2011-01-27 12:12:07 -08003406}
3407
3408static void __init msm8960_rumi3_init(void)
3409{
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003410 if (socinfo_init() < 0)
3411 pr_err("socinfo_init() failed!\n");
3412
3413 BUG_ON(msm_rpm_init(&msm_rpm_data));
3414 BUG_ON(msm_rpmrs_levels_init(msm_rpmrs_levels,
3415 ARRAY_SIZE(msm_rpmrs_levels)));
3416 regulator_suppress_info_printing();
3417 msm8960_clock_init_dummy();
3418 gpiomux_init();
3419 ethernet_init();
3420 msm8960_device_ssbi_pm8921.dev.platform_data =
3421 &msm8960_ssbi_pm8921_pdata;
3422 pm8921_platform_data.num_regulators = msm_pm8921_regulator_pdata_len;
3423 msm8960_device_qup_spi_gsbi1.dev.platform_data =
3424 &msm8960_qup_spi_gsbi1_pdata;
3425 spi_register_board_info(spi_board_info, ARRAY_SIZE(spi_board_info));
3426 msm8960_i2c_init();
3427 msm_spm_init(msm_spm_data, ARRAY_SIZE(msm_spm_data));
3428 msm_spm_l2_init(msm_spm_l2_data);
3429 platform_add_devices(common_devices, ARRAY_SIZE(common_devices));
3430 pm8921_gpio_mpp_init();
Stepan Moskovchenkod056fca2011-01-27 12:12:07 -08003431 platform_add_devices(rumi3_devices, ARRAY_SIZE(rumi3_devices));
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003432 msm8960_init_mmc();
3433
3434 register_i2c_devices();
3435 msm_fb_add_devices();
3436 slim_register_board_info(msm_slim_devices,
3437 ARRAY_SIZE(msm_slim_devices));
3438 msm_pm_set_platform_data(msm_pm_data, ARRAY_SIZE(msm_pm_data));
3439 msm_pm_set_rpm_wakeup_irq(RPM_APCC_CPU0_WAKE_UP_IRQ);
3440 msm_cpuidle_set_states(msm_cstates, ARRAY_SIZE(msm_cstates),
3441 msm_pm_data);
3442}
3443
3444static void __init msm8960_cdp_init(void)
3445{
3446 if (socinfo_init() < 0)
3447 pr_err("socinfo_init() failed!\n");
3448
3449 BUG_ON(msm_rpm_init(&msm_rpm_data));
3450 BUG_ON(msm_rpmrs_levels_init(msm_rpmrs_levels,
3451 ARRAY_SIZE(msm_rpmrs_levels)));
3452 regulator_suppress_info_printing();
3453 if (msm_xo_init())
3454 pr_err("Failed to initialize XO votes\n");
3455 msm8960_clock_init();
3456 msm_device_otg.dev.platform_data = &msm_otg_pdata;
3457 msm_device_gadget_peripheral.dev.parent = &msm_device_otg.dev;
3458 msm_device_hsusb_host.dev.parent = &msm_device_otg.dev;
3459 gpiomux_init();
3460 ethernet_init();
3461 msm8960_device_qup_spi_gsbi1.dev.platform_data =
3462 &msm8960_qup_spi_gsbi1_pdata;
3463 spi_register_board_info(spi_board_info, ARRAY_SIZE(spi_board_info));
3464 msm8960_device_ssbi_pm8921.dev.platform_data =
3465 &msm8960_ssbi_pm8921_pdata;
3466 pm8921_platform_data.num_regulators = msm_pm8921_regulator_pdata_len;
3467 msm8960_i2c_init();
3468 msm_spm_init(msm_spm_data, ARRAY_SIZE(msm_spm_data));
3469 msm_spm_l2_init(msm_spm_l2_data);
3470 msm8960_init_buses();
3471 platform_add_devices(msm_footswitch_devices,
3472 msm_num_footswitch_devices);
3473 platform_add_devices(common_devices, ARRAY_SIZE(common_devices));
3474 pm8921_gpio_mpp_init();
3475 platform_add_devices(cdp_devices, ARRAY_SIZE(cdp_devices));
3476 msm8960_init_cam();
3477 msm8960_init_mmc();
3478 msm_acpu_clock_init(&msm8960_acpu_clock_data);
3479 register_i2c_devices();
3480 msm8960_wcnss_init();
3481 msm_fb_add_devices();
3482 slim_register_board_info(msm_slim_devices,
3483 ARRAY_SIZE(msm_slim_devices));
3484 msm8960_init_dsps();
3485 msm_pm_set_platform_data(msm_pm_data, ARRAY_SIZE(msm_pm_data));
3486 msm_pm_set_rpm_wakeup_irq(RPM_APCC_CPU0_WAKE_UP_IRQ);
3487 msm_cpuidle_set_states(msm_cstates, ARRAY_SIZE(msm_cstates),
3488 msm_pm_data);
Larry Bassela7eadea2011-07-14 10:46:00 -07003489 change_memory_power = &msm8960_change_memory_power;
Stepan Moskovchenkod056fca2011-01-27 12:12:07 -08003490}
3491
Stepan Moskovchenkof441ca22010-12-01 19:31:16 -08003492MACHINE_START(MSM8960_SIM, "QCT MSM8960 SIMULATOR")
3493 .map_io = msm8960_map_io,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003494 .reserve = msm8960_reserve,
Stepan Moskovchenkof441ca22010-12-01 19:31:16 -08003495 .init_irq = msm8960_init_irq,
3496 .timer = &msm_timer,
Stepan Moskovchenkod056fca2011-01-27 12:12:07 -08003497 .init_machine = msm8960_sim_init,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003498 .init_early = msm8960_allocate_memory_regions,
Stepan Moskovchenkof441ca22010-12-01 19:31:16 -08003499MACHINE_END
Stepan Moskovchenko50ede4e2010-12-13 18:12:19 -08003500
3501MACHINE_START(MSM8960_RUMI3, "QCT MSM8960 RUMI3")
3502 .map_io = msm8960_map_io,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003503 .reserve = msm8960_reserve,
Stepan Moskovchenko50ede4e2010-12-13 18:12:19 -08003504 .init_irq = msm8960_init_irq,
3505 .timer = &msm_timer,
Stepan Moskovchenkod056fca2011-01-27 12:12:07 -08003506 .init_machine = msm8960_rumi3_init,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003507 .init_early = msm8960_allocate_memory_regions,
Stepan Moskovchenko50ede4e2010-12-13 18:12:19 -08003508MACHINE_END
3509
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003510MACHINE_START(MSM8960_CDP, "QCT MSM8960 CDP")
3511 .map_io = msm8960_map_io,
3512 .reserve = msm8960_reserve,
3513 .init_irq = msm8960_init_irq,
3514 .timer = &msm_timer,
3515 .init_machine = msm8960_cdp_init,
3516 .init_early = msm8960_allocate_memory_regions,
3517MACHINE_END
3518
3519MACHINE_START(MSM8960_MTP, "QCT MSM8960 MTP")
3520 .map_io = msm8960_map_io,
3521 .reserve = msm8960_reserve,
3522 .init_irq = msm8960_init_irq,
3523 .timer = &msm_timer,
3524 .init_machine = msm8960_cdp_init,
3525 .init_early = msm8960_allocate_memory_regions,
3526MACHINE_END
3527
3528MACHINE_START(MSM8960_FLUID, "QCT MSM8960 FLUID")
3529 .map_io = msm8960_map_io,
3530 .reserve = msm8960_reserve,
3531 .init_irq = msm8960_init_irq,
3532 .timer = &msm_timer,
3533 .init_machine = msm8960_cdp_init,
3534 .init_early = msm8960_allocate_memory_regions,
3535MACHINE_END
Amir Samuelov0d1f8ae2011-07-28 11:13:58 +03003536
3537MACHINE_START(MSM8960_LIQUID, "QCT MSM8960 LIQUID")
3538 .map_io = msm8960_map_io,
3539 .reserve = msm8960_reserve,
3540 .init_irq = msm8960_init_irq,
3541 .timer = &msm_timer,
3542 .init_machine = msm8960_cdp_init,
3543 .init_early = msm8960_allocate_memory_regions,
3544MACHINE_END