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Linus Torvalds1da177e2005-04-16 15:20:36 -07001#ifndef __ASM_SH_IRQ_H
2#define __ASM_SH_IRQ_H
3
Linus Torvalds1da177e2005-04-16 15:20:36 -07004#include <asm/machvec.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -07005
Paul Mundtbe782df2007-03-12 14:09:35 +09006/*
7 * A sane default based on a reasonable vector table size, platforms are
8 * advised to cap this at the hard limit that they're interested in
9 * through the machvec.
Linus Torvalds1da177e2005-04-16 15:20:36 -070010 */
Paul Mundtbe782df2007-03-12 14:09:35 +090011#define NR_IRQS 256
Linus Torvalds1da177e2005-04-16 15:20:36 -070012
Linus Torvalds1da177e2005-04-16 15:20:36 -070013/*
Jamie Lenehanea0f8fe2006-12-06 12:05:02 +090014 * Convert back and forth between INTEVT and IRQ values.
15 */
Paul Mundt3afb2092007-03-14 13:03:35 +090016#ifdef CONFIG_CPU_HAS_INTEVT
Jamie Lenehanea0f8fe2006-12-06 12:05:02 +090017#define evt2irq(evt) (((evt) >> 5) - 16)
18#define irq2evt(irq) (((irq) + 16) << 5)
Paul Mundt3afb2092007-03-14 13:03:35 +090019#else
20#define evt2irq(evt) (evt)
21#define irq2evt(irq) (irq)
22#endif
Jamie Lenehanea0f8fe2006-12-06 12:05:02 +090023
24/*
Linus Torvalds1da177e2005-04-16 15:20:36 -070025 * Simple Mask Register Support
26 */
27extern void make_maskreg_irq(unsigned int irq);
28extern unsigned short *irq_mask_register;
29
30/*
Paul Mundt0f08f332006-09-27 17:03:56 +090031 * PINT IRQs
32 */
33void init_IRQ_pint(void);
34
Jamie Lenehanea0f8fe2006-12-06 12:05:02 +090035/*
36 * The shift value is now the number of bits to shift, not the number of
37 * bits/4. This is to make it easier to read the value directly from the
38 * datasheets. The IPR address, addr, will be set from ipr_idx via the
39 * map_ipridx_to_addr function.
40 */
Jamie Lenehanbd71ab82006-10-31 12:35:02 +090041struct ipr_data {
42 unsigned int irq;
Jamie Lenehanea0f8fe2006-12-06 12:05:02 +090043 int ipr_idx; /* Index for the IPR registered */
44 int shift; /* Number of bits to shift the data */
Jamie Lenehanbd71ab82006-10-31 12:35:02 +090045 int priority; /* The priority */
Jamie Lenehanea0f8fe2006-12-06 12:05:02 +090046 unsigned int addr; /* Address of Interrupt Priority Register */
Jamie Lenehanbd71ab82006-10-31 12:35:02 +090047};
48
Paul Mundt0f08f332006-09-27 17:03:56 +090049/*
Jamie Lenehanea0f8fe2006-12-06 12:05:02 +090050 * Given an IPR IDX, map the value to an IPR register address.
51 */
52unsigned int map_ipridx_to_addr(int idx);
53
54/*
55 * Enable individual interrupt mode for external IPR IRQs.
56 */
57void ipr_irq_enable_irlm(void);
58
59/*
Linus Torvalds1da177e2005-04-16 15:20:36 -070060 * Function for "on chip support modules".
61 */
Jamie Lenehanea0f8fe2006-12-06 12:05:02 +090062void make_ipr_irq(struct ipr_data *table, unsigned int nr_irqs);
63void make_imask_irq(unsigned int irq);
64void init_IRQ_ipr(void);
Linus Torvalds1da177e2005-04-16 15:20:36 -070065
Paul Mundt525ccc42006-10-06 17:35:48 +090066struct intc2_data {
67 unsigned short irq;
68 unsigned char ipr_offset, ipr_shift;
69 unsigned char msk_offset, msk_shift;
70 unsigned char priority;
71};
Linus Torvalds1da177e2005-04-16 15:20:36 -070072
Paul Mundt66a74052006-10-20 15:30:55 +090073void make_intc2_irq(struct intc2_data *, unsigned int nr_irqs);
Paul Mundt525ccc42006-10-06 17:35:48 +090074void init_IRQ_intc2(void);
Paul Mundte5723e02006-09-27 17:38:11 +090075
Linus Torvalds1da177e2005-04-16 15:20:36 -070076static inline int generic_irq_demux(int irq)
77{
78 return irq;
79}
80
81#define irq_canonicalize(irq) (irq)
Paul Mundt9a7ef6d2006-11-20 13:55:34 +090082#define irq_demux(irq) sh_mv.mv_irq_demux(irq)
Linus Torvalds1da177e2005-04-16 15:20:36 -070083
Paul Mundta6a311392006-09-27 18:22:14 +090084#ifdef CONFIG_4KSTACKS
85extern void irq_ctx_init(int cpu);
86extern void irq_ctx_exit(int cpu);
87# define __ARCH_HAS_DO_SOFTIRQ
88#else
89# define irq_ctx_init(cpu) do { } while (0)
90# define irq_ctx_exit(cpu) do { } while (0)
91#endif
92
Linus Torvalds1da177e2005-04-16 15:20:36 -070093#endif /* __ASM_SH_IRQ_H */