blob: 12487898e008e9a0398e192bf43788d9f3f83dad [file] [log] [blame]
Kiran Kumar H Ndd128472011-12-01 09:35:34 -08001/* Copyright (c) 2009-2012, Code Aurora Forum. All rights reserved.
2 *
3 * This program is free software; you can redistribute it and/or modify
4 * it under the terms of the GNU General Public License version 2 and
5 * only version 2 as published by the Free Software Foundation.
6 *
7 * This program is distributed in the hope that it will be useful,
8 * but WITHOUT ANY WARRANTY; without even the implied warranty of
9 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
10 * GNU General Public License for more details.
11 *
12 */
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070013#ifndef __LINUX_MSM_CAMERA_H
14#define __LINUX_MSM_CAMERA_H
15
16#ifdef MSM_CAMERA_BIONIC
17#include <sys/types.h>
18#endif
Ankit Premrajka8c9bf5d2012-08-07 15:45:31 -070019#include <linux/videodev2.h>
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070020#include <linux/types.h>
21#include <linux/ioctl.h>
Philippe Gravel4a3b9422012-03-23 14:21:04 -070022#ifdef __KERNEL__
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070023#include <linux/cdev.h>
Philippe Gravel4a3b9422012-03-23 14:21:04 -070024#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070025#ifdef MSM_CAMERA_GCC
26#include <time.h>
27#else
28#include <linux/time.h>
29#endif
30
Ankit Premrajka3e90b9f2011-11-01 18:48:45 -070031#include <linux/ion.h>
Philippe Gravel4a3b9422012-03-23 14:21:04 -070032
Nishant Pandit5dd54422012-06-26 22:52:44 +053033#define BIT(nr) (1UL << (nr))
34
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070035#define MSM_CAM_IOCTL_MAGIC 'm'
36
37#define MSM_CAM_IOCTL_GET_SENSOR_INFO \
38 _IOR(MSM_CAM_IOCTL_MAGIC, 1, struct msm_camsensor_info *)
39
40#define MSM_CAM_IOCTL_REGISTER_PMEM \
41 _IOW(MSM_CAM_IOCTL_MAGIC, 2, struct msm_pmem_info *)
42
43#define MSM_CAM_IOCTL_UNREGISTER_PMEM \
44 _IOW(MSM_CAM_IOCTL_MAGIC, 3, unsigned)
45
46#define MSM_CAM_IOCTL_CTRL_COMMAND \
47 _IOW(MSM_CAM_IOCTL_MAGIC, 4, struct msm_ctrl_cmd *)
48
49#define MSM_CAM_IOCTL_CONFIG_VFE \
50 _IOW(MSM_CAM_IOCTL_MAGIC, 5, struct msm_camera_vfe_cfg_cmd *)
51
52#define MSM_CAM_IOCTL_GET_STATS \
53 _IOR(MSM_CAM_IOCTL_MAGIC, 6, struct msm_camera_stats_event_ctrl *)
54
55#define MSM_CAM_IOCTL_GETFRAME \
56 _IOR(MSM_CAM_IOCTL_MAGIC, 7, struct msm_camera_get_frame *)
57
58#define MSM_CAM_IOCTL_ENABLE_VFE \
59 _IOW(MSM_CAM_IOCTL_MAGIC, 8, struct camera_enable_cmd *)
60
61#define MSM_CAM_IOCTL_CTRL_CMD_DONE \
62 _IOW(MSM_CAM_IOCTL_MAGIC, 9, struct camera_cmd *)
63
64#define MSM_CAM_IOCTL_CONFIG_CMD \
65 _IOW(MSM_CAM_IOCTL_MAGIC, 10, struct camera_cmd *)
66
67#define MSM_CAM_IOCTL_DISABLE_VFE \
68 _IOW(MSM_CAM_IOCTL_MAGIC, 11, struct camera_enable_cmd *)
69
70#define MSM_CAM_IOCTL_PAD_REG_RESET2 \
71 _IOW(MSM_CAM_IOCTL_MAGIC, 12, struct camera_enable_cmd *)
72
73#define MSM_CAM_IOCTL_VFE_APPS_RESET \
74 _IOW(MSM_CAM_IOCTL_MAGIC, 13, struct camera_enable_cmd *)
75
76#define MSM_CAM_IOCTL_RELEASE_FRAME_BUFFER \
77 _IOW(MSM_CAM_IOCTL_MAGIC, 14, struct camera_enable_cmd *)
78
79#define MSM_CAM_IOCTL_RELEASE_STATS_BUFFER \
80 _IOW(MSM_CAM_IOCTL_MAGIC, 15, struct msm_stats_buf *)
81
82#define MSM_CAM_IOCTL_AXI_CONFIG \
83 _IOW(MSM_CAM_IOCTL_MAGIC, 16, struct msm_camera_vfe_cfg_cmd *)
84
85#define MSM_CAM_IOCTL_GET_PICTURE \
86 _IOW(MSM_CAM_IOCTL_MAGIC, 17, struct msm_frame *)
87
88#define MSM_CAM_IOCTL_SET_CROP \
89 _IOW(MSM_CAM_IOCTL_MAGIC, 18, struct crop_info *)
90
91#define MSM_CAM_IOCTL_PICT_PP \
92 _IOW(MSM_CAM_IOCTL_MAGIC, 19, uint8_t *)
93
94#define MSM_CAM_IOCTL_PICT_PP_DONE \
95 _IOW(MSM_CAM_IOCTL_MAGIC, 20, struct msm_snapshot_pp_status *)
96
97#define MSM_CAM_IOCTL_SENSOR_IO_CFG \
98 _IOW(MSM_CAM_IOCTL_MAGIC, 21, struct sensor_cfg_data *)
99
100#define MSM_CAM_IOCTL_FLASH_LED_CFG \
101 _IOW(MSM_CAM_IOCTL_MAGIC, 22, unsigned *)
102
103#define MSM_CAM_IOCTL_UNBLOCK_POLL_FRAME \
104 _IO(MSM_CAM_IOCTL_MAGIC, 23)
105
106#define MSM_CAM_IOCTL_CTRL_COMMAND_2 \
107 _IOW(MSM_CAM_IOCTL_MAGIC, 24, struct msm_ctrl_cmd *)
108
109#define MSM_CAM_IOCTL_AF_CTRL \
110 _IOR(MSM_CAM_IOCTL_MAGIC, 25, struct msm_ctrl_cmt_t *)
111
112#define MSM_CAM_IOCTL_AF_CTRL_DONE \
113 _IOW(MSM_CAM_IOCTL_MAGIC, 26, struct msm_ctrl_cmt_t *)
114
115#define MSM_CAM_IOCTL_CONFIG_VPE \
116 _IOW(MSM_CAM_IOCTL_MAGIC, 27, struct msm_camera_vpe_cfg_cmd *)
117
118#define MSM_CAM_IOCTL_AXI_VPE_CONFIG \
119 _IOW(MSM_CAM_IOCTL_MAGIC, 28, struct msm_camera_vpe_cfg_cmd *)
120
121#define MSM_CAM_IOCTL_STROBE_FLASH_CFG \
122 _IOW(MSM_CAM_IOCTL_MAGIC, 29, uint32_t *)
123
124#define MSM_CAM_IOCTL_STROBE_FLASH_CHARGE \
125 _IOW(MSM_CAM_IOCTL_MAGIC, 30, uint32_t *)
126
127#define MSM_CAM_IOCTL_STROBE_FLASH_RELEASE \
128 _IO(MSM_CAM_IOCTL_MAGIC, 31)
129
130#define MSM_CAM_IOCTL_FLASH_CTRL \
131 _IOW(MSM_CAM_IOCTL_MAGIC, 32, struct flash_ctrl_data *)
132
133#define MSM_CAM_IOCTL_ERROR_CONFIG \
134 _IOW(MSM_CAM_IOCTL_MAGIC, 33, uint32_t *)
135
136#define MSM_CAM_IOCTL_ABORT_CAPTURE \
137 _IO(MSM_CAM_IOCTL_MAGIC, 34)
138
139#define MSM_CAM_IOCTL_SET_FD_ROI \
140 _IOW(MSM_CAM_IOCTL_MAGIC, 35, struct fd_roi_info *)
141
142#define MSM_CAM_IOCTL_GET_CAMERA_INFO \
143 _IOR(MSM_CAM_IOCTL_MAGIC, 36, struct msm_camera_info *)
144
145#define MSM_CAM_IOCTL_UNBLOCK_POLL_PIC_FRAME \
146 _IO(MSM_CAM_IOCTL_MAGIC, 37)
147
148#define MSM_CAM_IOCTL_RELEASE_PIC_BUFFER \
149 _IOW(MSM_CAM_IOCTL_MAGIC, 38, struct camera_enable_cmd *)
150
151#define MSM_CAM_IOCTL_PUT_ST_FRAME \
152 _IOW(MSM_CAM_IOCTL_MAGIC, 39, struct msm_camera_st_frame *)
153
Mansoor Aftab5d418372011-07-26 17:01:26 -0700154#define MSM_CAM_IOCTL_V4L2_EVT_NOTIFY \
Ankit Premrajka8c9bf5d2012-08-07 15:45:31 -0700155 _IOW(MSM_CAM_IOCTL_MAGIC, 40, struct v4l2_event_and_payload)
Mansoor Aftab5d418372011-07-26 17:01:26 -0700156
Mingcheng Zhu9559ee42011-08-09 11:54:22 -0700157#define MSM_CAM_IOCTL_SET_MEM_MAP_INFO \
Kevin Chan94b4c832012-03-02 21:27:16 -0800158 _IOR(MSM_CAM_IOCTL_MAGIC, 41, struct msm_mem_map_info *)
Mingcheng Zhu9559ee42011-08-09 11:54:22 -0700159
Sreesudhan Ramakrish Ramkumara4b5f302011-09-12 16:23:22 -0700160#define MSM_CAM_IOCTL_ACTUATOR_IO_CFG \
Kevin Chan94b4c832012-03-02 21:27:16 -0800161 _IOW(MSM_CAM_IOCTL_MAGIC, 42, struct msm_actuator_cfg_data *)
Sreesudhan Ramakrish Ramkumara4b5f302011-09-12 16:23:22 -0700162
Mingcheng Zhu8e9f99e2011-08-26 16:33:32 -0700163#define MSM_CAM_IOCTL_MCTL_POST_PROC \
Kevin Chan94b4c832012-03-02 21:27:16 -0800164 _IOW(MSM_CAM_IOCTL_MAGIC, 43, struct msm_mctl_post_proc_cmd *)
Mingcheng Zhu8e9f99e2011-08-26 16:33:32 -0700165
166#define MSM_CAM_IOCTL_RESERVE_FREE_FRAME \
Kevin Chan94b4c832012-03-02 21:27:16 -0800167 _IOW(MSM_CAM_IOCTL_MAGIC, 44, struct msm_cam_evt_divert_frame *)
Mingcheng Zhu8e9f99e2011-08-26 16:33:32 -0700168
169#define MSM_CAM_IOCTL_RELEASE_FREE_FRAME \
Kevin Chan94b4c832012-03-02 21:27:16 -0800170 _IOR(MSM_CAM_IOCTL_MAGIC, 45, struct msm_cam_evt_divert_frame *)
Mingcheng Zhu8e9f99e2011-08-26 16:33:32 -0700171
Mingcheng Zhu8feaa3f2011-11-23 11:33:52 -0800172#define MSM_CAM_IOCTL_PICT_PP_DIVERT_DONE \
Kevin Chan94b4c832012-03-02 21:27:16 -0800173 _IOR(MSM_CAM_IOCTL_MAGIC, 46, struct msm_pp_frame *)
Mingcheng Zhu8feaa3f2011-11-23 11:33:52 -0800174
Rajakumar Govindaram6bc004a2011-12-05 20:58:19 -0800175#define MSM_CAM_IOCTL_SENSOR_V4l2_S_CTRL \
Kevin Chan94b4c832012-03-02 21:27:16 -0800176 _IOR(MSM_CAM_IOCTL_MAGIC, 47, struct v4l2_control)
Rajakumar Govindaram6bc004a2011-12-05 20:58:19 -0800177
178#define MSM_CAM_IOCTL_SENSOR_V4l2_QUERY_CTRL \
Kevin Chan94b4c832012-03-02 21:27:16 -0800179 _IOR(MSM_CAM_IOCTL_MAGIC, 48, struct v4l2_queryctrl)
Rajakumar Govindaram6bc004a2011-12-05 20:58:19 -0800180
Guruprasad Gaonkar4c7758f2011-12-16 17:30:00 -0800181#define MSM_CAM_IOCTL_GET_KERNEL_SYSTEM_TIME \
Kevin Chan94b4c832012-03-02 21:27:16 -0800182 _IOW(MSM_CAM_IOCTL_MAGIC, 49, struct timeval *)
Guruprasad Gaonkar4c7758f2011-12-16 17:30:00 -0800183
Kiran Kumar H Ndd128472011-12-01 09:35:34 -0800184#define MSM_CAM_IOCTL_SET_VFE_OUTPUT_TYPE \
Kevin Chan94b4c832012-03-02 21:27:16 -0800185 _IOW(MSM_CAM_IOCTL_MAGIC, 50, uint32_t *)
Kiran Kumar H Nc3cb9ea2012-01-06 15:11:10 -0800186
187#define MSM_CAM_IOCTL_MCTL_DIVERT_DONE \
Kevin Chan94b4c832012-03-02 21:27:16 -0800188 _IOR(MSM_CAM_IOCTL_MAGIC, 51, struct msm_cam_evt_divert_frame *)
Kiran Kumar H Nc3cb9ea2012-01-06 15:11:10 -0800189
Rajakumar Govindaram6627b362012-01-29 19:00:30 -0800190#define MSM_CAM_IOCTL_GET_ACTUATOR_INFO \
Kevin Chan94b4c832012-03-02 21:27:16 -0800191 _IOW(MSM_CAM_IOCTL_MAGIC, 52, struct msm_actuator_cfg_data *)
Rajakumar Govindaram6627b362012-01-29 19:00:30 -0800192
Jeyaprakash Soundrapandian734476b2012-05-03 20:08:15 -0700193#define MSM_CAM_IOCTL_EEPROM_IO_CFG \
194 _IOW(MSM_CAM_IOCTL_MAGIC, 53, struct msm_eeprom_cfg_data *)
195
Nishant Panditb2157c92012-04-25 01:09:28 +0530196#define MSM_CAM_IOCTL_ISPIF_IO_CFG \
197 _IOR(MSM_CAM_IOCTL_MAGIC, 54, struct ispif_cfg_data *)
198
Lakshmi Narayana Kalavala2db33842012-06-26 22:41:32 -0700199#define MSM_CAM_IOCTL_STATS_REQBUF \
200 _IOR(MSM_CAM_IOCTL_MAGIC, 55, struct msm_stats_reqbuf *)
201
202#define MSM_CAM_IOCTL_STATS_ENQUEUEBUF \
203 _IOR(MSM_CAM_IOCTL_MAGIC, 56, struct msm_stats_buf_info *)
204
205#define MSM_CAM_IOCTL_STATS_FLUSH_BUFQ \
206 _IOR(MSM_CAM_IOCTL_MAGIC, 57, struct msm_stats_flush_bufq *)
207
Ankit Premrajka4b3443f2012-06-11 14:06:31 -0700208#define MSM_CAM_IOCTL_SET_MCTL_SDEV \
209 _IOW(MSM_CAM_IOCTL_MAGIC, 58, struct msm_mctl_set_sdev_data *)
210
211#define MSM_CAM_IOCTL_UNSET_MCTL_SDEV \
212 _IOW(MSM_CAM_IOCTL_MAGIC, 59, struct msm_mctl_set_sdev_data *)
213
Kiran Kumar H N90785902012-07-05 13:59:38 -0700214#define MSM_CAM_IOCTL_GET_INST_HANDLE \
215 _IOR(MSM_CAM_IOCTL_MAGIC, 60, uint32_t *)
216
Lakshmi Narayana Kalavala58243db2012-07-24 00:06:27 -0700217#define MSM_CAM_IOCTL_STATS_UNREG_BUF \
218 _IOR(MSM_CAM_IOCTL_MAGIC, 61, struct msm_stats_flush_bufq *)
219
Sreesudhan Ramakrish Ramkumar254f7e72012-03-17 17:27:34 -0700220#define MSM_CAM_IOCTL_CSIC_IO_CFG \
221 _IOWR(MSM_CAM_IOCTL_MAGIC, 62, struct csic_cfg_data *)
222
223#define MSM_CAM_IOCTL_CSID_IO_CFG \
224 _IOWR(MSM_CAM_IOCTL_MAGIC, 63, struct csid_cfg_data *)
225
226#define MSM_CAM_IOCTL_CSIPHY_IO_CFG \
227 _IOR(MSM_CAM_IOCTL_MAGIC, 64, struct csiphy_cfg_data *)
Lakshmi Narayana Kalavala58243db2012-07-24 00:06:27 -0700228
Jack Wangb88c8c22012-07-26 11:33:36 -0700229#define MSM_CAM_IOCTL_OEM \
230 _IOW(MSM_CAM_IOCTL_MAGIC, 65, struct sensor_cfg_data *)
231
Ankit Premrajka8c9bf5d2012-08-07 15:45:31 -0700232struct v4l2_event_and_payload {
233 struct v4l2_event evt;
234 uint32_t payload_length;
235 uint32_t transaction_id;
236 void *payload;
237};
238
Lakshmi Narayana Kalavala2db33842012-06-26 22:41:32 -0700239struct msm_stats_reqbuf {
240 int num_buf; /* how many buffers requested */
241 int stats_type; /* stats type */
242};
243
244struct msm_stats_flush_bufq {
245 int stats_type; /* enum msm_stats_enum_type */
246};
247
Mingcheng Zhu8e9f99e2011-08-26 16:33:32 -0700248struct msm_mctl_pp_cmd {
249 int32_t id;
250 uint16_t length;
251 void *value;
252};
253
254struct msm_mctl_post_proc_cmd {
255 int32_t type;
256 struct msm_mctl_pp_cmd cmd;
257};
258
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700259#define MSM_CAMERA_LED_OFF 0
260#define MSM_CAMERA_LED_LOW 1
261#define MSM_CAMERA_LED_HIGH 2
Nishant Pandit474f2252011-07-23 23:17:56 +0530262#define MSM_CAMERA_LED_INIT 3
263#define MSM_CAMERA_LED_RELEASE 4
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700264
265#define MSM_CAMERA_STROBE_FLASH_NONE 0
266#define MSM_CAMERA_STROBE_FLASH_XENON 1
267
268#define MSM_MAX_CAMERA_SENSORS 5
269#define MAX_SENSOR_NAME 32
Rajakumar Govindaram6627b362012-01-29 19:00:30 -0800270#define MAX_CAM_NAME_SIZE 32
271#define MAX_ACT_MOD_NAME_SIZE 32
272#define MAX_ACT_NAME_SIZE 32
273#define NUM_ACTUATOR_DIR 2
274#define MAX_ACTUATOR_SCENARIO 8
275#define MAX_ACTUATOR_REGION 5
276#define MAX_ACTUATOR_INIT_SET 12
277#define MAX_ACTUATOR_TYPE_SIZE 32
278#define MAX_ACTUATOR_REG_TBL_SIZE 8
279
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700280
281#define MSM_MAX_CAMERA_CONFIGS 2
282
283#define PP_SNAP 0x01
284#define PP_RAW_SNAP ((0x01)<<1)
285#define PP_PREV ((0x01)<<2)
Ankit Premrajka70613ec2012-01-26 16:24:23 -0800286#define PP_THUMB ((0x01)<<3)
287#define PP_MASK (PP_SNAP|PP_RAW_SNAP|PP_PREV|PP_THUMB)
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700288
289#define MSM_CAM_CTRL_CMD_DONE 0
290#define MSM_CAM_SENSOR_VFE_CMD 1
291
Kiran Kumar H Nceea7622011-08-23 14:01:03 -0700292/* Should be same as VIDEO_MAX_PLANES in videodev2.h */
293#define MAX_PLANES 8
294
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700295/*****************************************************
296 * structure
297 *****************************************************/
298
299/* define five type of structures for userspace <==> kernel
300 * space communication:
301 * command 1 - 2 are from userspace ==> kernel
302 * command 3 - 4 are from kernel ==> userspace
303 *
304 * 1. control command: control command(from control thread),
305 * control status (from config thread);
306 */
307struct msm_ctrl_cmd {
308 uint16_t type;
309 uint16_t length;
310 void *value;
311 uint16_t status;
312 uint32_t timeout_ms;
313 int resp_fd; /* FIXME: to be used by the kernel, pass-through for now */
314 int vnode_id; /* video dev id. Can we overload resp_fd? */
Kevin Chan94b4c832012-03-02 21:27:16 -0800315 int queue_idx;
316 uint32_t evt_id;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700317 uint32_t stream_type; /* used to pass value to qcamera server */
Ankit Premrajkaf94bcc62011-08-22 15:23:53 -0700318 int config_ident; /*used as identifier for config node*/
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700319};
320
321struct msm_cam_evt_msg {
322 unsigned short type; /* 1 == event (RPC), 0 == message (adsp) */
323 unsigned short msg_id;
324 unsigned int len; /* size in, number of bytes out */
325 uint32_t frame_id;
326 void *data;
Ninad Mahimkaree55c192012-04-25 14:36:17 -0700327 struct timespec timestamp;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700328};
329
Kiran Kumar H Ncd7bc3b2011-10-12 16:14:48 -0700330struct msm_pp_frame_sp {
331 /* phy addr of the buffer */
332 unsigned long phy_addr;
333 uint32_t y_off;
334 uint32_t cbcr_off;
335 /* buffer length */
336 uint32_t length;
337 int32_t fd;
338 uint32_t addr_offset;
339 /* mapped addr */
340 unsigned long vaddr;
341};
342
343struct msm_pp_frame_mp {
344 /* phy addr of the plane */
345 unsigned long phy_addr;
346 /* offset of plane data */
347 uint32_t data_offset;
348 /* plane length */
349 uint32_t length;
350 int32_t fd;
351 uint32_t addr_offset;
352 /* mapped addr */
353 unsigned long vaddr;
354};
355
356struct msm_pp_frame {
357 uint32_t handle; /* stores vb cookie */
358 uint32_t frame_id;
Kevin Chan318d7cb2011-11-29 14:24:26 -0800359 unsigned short buf_idx;
Kiran Kumar H Ncd7bc3b2011-10-12 16:14:48 -0700360 int path;
361 unsigned short image_type;
362 unsigned short num_planes; /* 1 for sp */
363 struct timeval timestamp;
364 union {
365 struct msm_pp_frame_sp sp;
366 struct msm_pp_frame_mp mp[MAX_PLANES];
367 };
Ankit Premrajka70613ec2012-01-26 16:24:23 -0800368 int node_type;
Kiran Kumar H N90785902012-07-05 13:59:38 -0700369 uint32_t inst_handle;
Kiran Kumar H Ncd7bc3b2011-10-12 16:14:48 -0700370};
371
Kiran Kumar H N2e68e332012-08-07 21:07:30 -0700372struct msm_pp_crop {
373 uint32_t src_x;
374 uint32_t src_y;
375 uint32_t src_w;
376 uint32_t src_h;
377 uint32_t dst_x;
378 uint32_t dst_y;
379 uint32_t dst_w;
380 uint32_t dst_h;
381 uint8_t update_flag;
382};
383
384struct msm_mctl_pp_frame_cmd {
385 uint32_t cookie;
386 uint8_t vpe_output_action;
387 struct msm_pp_frame src_frame;
388 struct msm_pp_frame dest_frame;
389 struct msm_pp_crop crop;
390 int path;
391};
392
Mingcheng Zhu49505502011-07-19 20:44:36 -0700393struct msm_cam_evt_divert_frame {
Mingcheng Zhu5b04d352011-07-22 21:18:42 -0700394 unsigned short image_mode;
395 unsigned short op_mode;
Mingcheng Zhu49505502011-07-19 20:44:36 -0700396 unsigned short inst_idx;
397 unsigned short node_idx;
Kiran Kumar H Ncd7bc3b2011-10-12 16:14:48 -0700398 struct msm_pp_frame frame;
Mingcheng Zhu8e9f99e2011-08-26 16:33:32 -0700399 int do_pp;
Mingcheng Zhu49505502011-07-19 20:44:36 -0700400};
401
Kiran Kumar H N0b517802011-10-05 09:49:51 -0700402struct msm_mctl_pp_cmd_ack_event {
403 uint32_t cmd; /* VPE_CMD_ZOOM? */
404 int status; /* 0 done, < 0 err */
405 uint32_t cookie; /* daemon's cookie */
406};
407
408struct msm_mctl_pp_event_info {
409 int32_t event;
410 union {
411 struct msm_mctl_pp_cmd_ack_event ack;
412 };
413};
414
415struct msm_isp_event_ctrl {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700416 unsigned short resptype;
417 union {
418 struct msm_cam_evt_msg isp_msg;
419 struct msm_ctrl_cmd ctrl;
Kiran Kumar H N0b517802011-10-05 09:49:51 -0700420 struct msm_cam_evt_divert_frame div_frame;
421 struct msm_mctl_pp_event_info pp_event_info;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700422 } isp_data;
423};
424
Mingcheng Zhu8e9f99e2011-08-26 16:33:32 -0700425#define MSM_CAM_RESP_CTRL 0
426#define MSM_CAM_RESP_STAT_EVT_MSG 1
427#define MSM_CAM_RESP_STEREO_OP_1 2
428#define MSM_CAM_RESP_STEREO_OP_2 3
429#define MSM_CAM_RESP_V4L2 4
Mingcheng Zhu49505502011-07-19 20:44:36 -0700430#define MSM_CAM_RESP_DIV_FRAME_EVT_MSG 5
Mingcheng Zhu8e9f99e2011-08-26 16:33:32 -0700431#define MSM_CAM_RESP_DONE_EVENT 6
432#define MSM_CAM_RESP_MCTL_PP_EVENT 7
433#define MSM_CAM_RESP_MAX 8
Mingcheng Zhu49505502011-07-19 20:44:36 -0700434
Mingcheng Zhu270813a2011-08-10 17:23:18 -0700435#define MSM_CAM_APP_NOTIFY_EVENT 0
Kevin Chan4bb6ead2012-02-29 01:01:41 -0800436#define MSM_CAM_APP_NOTIFY_ERROR_EVENT 1
Mingcheng Zhu8e9f99e2011-08-26 16:33:32 -0700437
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700438/* this one is used to send ctrl/status up to config thread */
Mingcheng Zhu8e9f99e2011-08-26 16:33:32 -0700439
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700440struct msm_stats_event_ctrl {
441 /* 0 - ctrl_cmd from control thread,
442 * 1 - stats/event kernel,
443 * 2 - V4L control or read request */
444 int resptype;
445 int timeout_ms;
446 struct msm_ctrl_cmd ctrl_cmd;
447 /* struct vfe_event_t stats_event; */
448 struct msm_cam_evt_msg stats_event;
449};
450
451/* 2. config command: config command(from config thread); */
452struct msm_camera_cfg_cmd {
453 /* what to config:
454 * 1 - sensor config, 2 - vfe config */
455 uint16_t cfg_type;
456
457 /* sensor config type */
458 uint16_t cmd_type;
459 uint16_t queue;
460 uint16_t length;
461 void *value;
462};
463
464#define CMD_GENERAL 0
465#define CMD_AXI_CFG_OUT1 1
466#define CMD_AXI_CFG_SNAP_O1_AND_O2 2
467#define CMD_AXI_CFG_OUT2 3
468#define CMD_PICT_T_AXI_CFG 4
469#define CMD_PICT_M_AXI_CFG 5
470#define CMD_RAW_PICT_AXI_CFG 6
471
472#define CMD_FRAME_BUF_RELEASE 7
473#define CMD_PREV_BUF_CFG 8
474#define CMD_SNAP_BUF_RELEASE 9
475#define CMD_SNAP_BUF_CFG 10
476#define CMD_STATS_DISABLE 11
477#define CMD_STATS_AEC_AWB_ENABLE 12
478#define CMD_STATS_AF_ENABLE 13
479#define CMD_STATS_AEC_ENABLE 14
480#define CMD_STATS_AWB_ENABLE 15
481#define CMD_STATS_ENABLE 16
482
483#define CMD_STATS_AXI_CFG 17
484#define CMD_STATS_AEC_AXI_CFG 18
485#define CMD_STATS_AF_AXI_CFG 19
486#define CMD_STATS_AWB_AXI_CFG 20
487#define CMD_STATS_RS_AXI_CFG 21
488#define CMD_STATS_CS_AXI_CFG 22
489#define CMD_STATS_IHIST_AXI_CFG 23
490#define CMD_STATS_SKIN_AXI_CFG 24
491
492#define CMD_STATS_BUF_RELEASE 25
493#define CMD_STATS_AEC_BUF_RELEASE 26
494#define CMD_STATS_AF_BUF_RELEASE 27
495#define CMD_STATS_AWB_BUF_RELEASE 28
496#define CMD_STATS_RS_BUF_RELEASE 29
497#define CMD_STATS_CS_BUF_RELEASE 30
498#define CMD_STATS_IHIST_BUF_RELEASE 31
499#define CMD_STATS_SKIN_BUF_RELEASE 32
500
501#define UPDATE_STATS_INVALID 33
502#define CMD_AXI_CFG_SNAP_GEMINI 34
503#define CMD_AXI_CFG_SNAP 35
504#define CMD_AXI_CFG_PREVIEW 36
505#define CMD_AXI_CFG_VIDEO 37
506
507#define CMD_STATS_IHIST_ENABLE 38
508#define CMD_STATS_RS_ENABLE 39
509#define CMD_STATS_CS_ENABLE 40
510#define CMD_VPE 41
511#define CMD_AXI_CFG_VPE 42
512#define CMD_AXI_CFG_ZSL 43
513#define CMD_AXI_CFG_SNAP_VPE 44
514#define CMD_AXI_CFG_SNAP_THUMB_VPE 45
Lakshmi Narayana Kalavalabc315ea2012-07-24 09:55:48 -0700515
Alekhya,Monikafc81e102011-12-29 15:17:33 +0530516#define CMD_CONFIG_PING_ADDR 46
517#define CMD_CONFIG_PONG_ADDR 47
518#define CMD_CONFIG_FREE_BUF_ADDR 48
519#define CMD_AXI_CFG_ZSL_ALL_CHNLS 49
520#define CMD_AXI_CFG_VIDEO_ALL_CHNLS 50
Suresh Vankadara055cb8e2012-01-18 00:50:04 +0530521#define CMD_VFE_BUFFER_RELEASE 51
Kevin Chancf264862012-04-19 19:10:38 -0700522#define CMD_VFE_PROCESS_IRQ 52
Lakshmi Narayana Kalavalabc315ea2012-07-24 09:55:48 -0700523#define CMD_STATS_BG_ENABLE 53
524#define CMD_STATS_BF_ENABLE 54
525#define CMD_STATS_BHIST_ENABLE 55
526#define CMD_STATS_BG_BUF_RELEASE 56
527#define CMD_STATS_BF_BUF_RELEASE 57
528#define CMD_STATS_BHIST_BUF_RELEASE 58
Ankit Premrajka5d00d662012-07-30 09:42:26 -0700529#define CMD_VFE_PIX_SOF_COUNT_UPDATE 59
530#define CMD_VFE_COUNT_PIX_SOF_ENABLE 60
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700531
Nishant Pandit5dd54422012-06-26 22:52:44 +0530532#define CMD_AXI_CFG_PRIM BIT(8)
533#define CMD_AXI_CFG_PRIM_ALL_CHNLS BIT(9)
534#define CMD_AXI_CFG_SEC BIT(10)
535#define CMD_AXI_CFG_SEC_ALL_CHNLS BIT(11)
536#define CMD_AXI_CFG_TERT1 BIT(12)
537#define CMD_AXI_CFG_TERT2 BIT(13)
Kiran Kumar H Ndd128472011-12-01 09:35:34 -0800538
Azam Sadiq Pasha Kapatrala Syed7c815182012-05-31 19:28:09 -0700539#define CMD_AXI_START 0xE1
540#define CMD_AXI_STOP 0xE2
Shuzhen Wang109c2112012-07-23 17:28:11 -0700541#define CMD_AXI_RESET 0xE3
Nishant Panditd7785712012-07-31 19:09:11 +0530542#define CMD_AXI_ABORT 0xE4
543
Azam Sadiq Pasha Kapatrala Syed7c815182012-05-31 19:28:09 -0700544
Lakshmi Narayana Kalavalacd3d81e2012-07-31 13:04:03 -0700545
546#define AXI_CMD_PREVIEW BIT(0)
547#define AXI_CMD_CAPTURE BIT(1)
548#define AXI_CMD_RECORD BIT(2)
549#define AXI_CMD_ZSL BIT(3)
550#define AXI_CMD_RAW_CAPTURE BIT(4)
Lakshmi Narayana Kalavala3e8a1d12012-07-31 15:00:09 -0700551#define AXI_CMD_LIVESHOT BIT(5)
Lakshmi Narayana Kalavalacd3d81e2012-07-31 13:04:03 -0700552
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700553/* vfe config command: config command(from config thread)*/
554struct msm_vfe_cfg_cmd {
555 int cmd_type;
556 uint16_t length;
557 void *value;
558};
559
560struct msm_vpe_cfg_cmd {
561 int cmd_type;
562 uint16_t length;
563 void *value;
564};
565
566#define MAX_CAMERA_ENABLE_NAME_LEN 32
567struct camera_enable_cmd {
568 char name[MAX_CAMERA_ENABLE_NAME_LEN];
569};
570
571#define MSM_PMEM_OUTPUT1 0
572#define MSM_PMEM_OUTPUT2 1
573#define MSM_PMEM_OUTPUT1_OUTPUT2 2
574#define MSM_PMEM_THUMBNAIL 3
575#define MSM_PMEM_MAINIMG 4
576#define MSM_PMEM_RAW_MAINIMG 5
577#define MSM_PMEM_AEC_AWB 6
578#define MSM_PMEM_AF 7
579#define MSM_PMEM_AEC 8
580#define MSM_PMEM_AWB 9
581#define MSM_PMEM_RS 10
582#define MSM_PMEM_CS 11
583#define MSM_PMEM_IHIST 12
584#define MSM_PMEM_SKIN 13
585#define MSM_PMEM_VIDEO 14
586#define MSM_PMEM_PREVIEW 15
587#define MSM_PMEM_VIDEO_VPE 16
588#define MSM_PMEM_C2D 17
589#define MSM_PMEM_MAINIMG_VPE 18
590#define MSM_PMEM_THUMBNAIL_VPE 19
Lakshmi Narayana Kalavalabc315ea2012-07-24 09:55:48 -0700591#define MSM_PMEM_BAYER_GRID 20
592#define MSM_PMEM_BAYER_FOCUS 21
593#define MSM_PMEM_BAYER_HIST 22
594#define MSM_PMEM_MAX 23
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700595
596#define STAT_AEAW 0
597#define STAT_AEC 1
598#define STAT_AF 2
599#define STAT_AWB 3
600#define STAT_RS 4
601#define STAT_CS 5
602#define STAT_IHIST 6
603#define STAT_SKIN 7
Lakshmi Narayana Kalavalabc315ea2012-07-24 09:55:48 -0700604#define STAT_BG 8
605#define STAT_BF 9
606#define STAT_BHIST 10
607#define STAT_MAX 11
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700608
609#define FRAME_PREVIEW_OUTPUT1 0
610#define FRAME_PREVIEW_OUTPUT2 1
611#define FRAME_SNAPSHOT 2
612#define FRAME_THUMBNAIL 3
613#define FRAME_RAW_SNAPSHOT 4
614#define FRAME_MAX 5
615
Lakshmi Narayana Kalavala2db33842012-06-26 22:41:32 -0700616enum msm_stats_enum_type {
617 MSM_STATS_TYPE_AEC, /* legacy based AEC */
618 MSM_STATS_TYPE_AF, /* legacy based AF */
619 MSM_STATS_TYPE_AWB, /* legacy based AWB */
620 MSM_STATS_TYPE_RS, /* legacy based RS */
621 MSM_STATS_TYPE_CS, /* legacy based CS */
622 MSM_STATS_TYPE_IHIST, /* legacy based HIST */
623 MSM_STATS_TYPE_SKIN, /* legacy based SKIN */
624 MSM_STATS_TYPE_BG, /* Bayer Grids */
625 MSM_STATS_TYPE_BF, /* Bayer Focus */
626 MSM_STATS_TYPE_BHIST, /* Bayer Hist */
627 MSM_STATS_TYPE_AE_AW, /* legacy stats for vfe 2.x*/
Lakshmi Narayana Kalavala47e56572012-08-10 20:05:55 -0700628 MSM_STATS_TYPE_COMP, /* Composite stats */
Lakshmi Narayana Kalavala2db33842012-06-26 22:41:32 -0700629 MSM_STATS_TYPE_MAX /* MAX */
630};
631
632struct msm_stats_buf_info {
633 int type; /* msm_stats_enum_type */
634 int fd;
635 void *vaddr;
636 uint32_t offset;
637 uint32_t len;
638 uint32_t y_off;
639 uint32_t cbcr_off;
640 uint32_t planar0_off;
641 uint32_t planar1_off;
642 uint32_t planar2_off;
643 uint8_t active;
644 int buf_idx;
645};
646
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700647struct msm_pmem_info {
648 int type;
649 int fd;
650 void *vaddr;
651 uint32_t offset;
652 uint32_t len;
Kiran Kumar H N5a19c682011-07-23 11:34:34 -0700653 uint32_t y_off;
654 uint32_t cbcr_off;
Alekhya,Monikafc81e102011-12-29 15:17:33 +0530655 uint32_t planar0_off;
656 uint32_t planar1_off;
657 uint32_t planar2_off;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700658 uint8_t active;
659};
660
661struct outputCfg {
662 uint32_t height;
663 uint32_t width;
664
665 uint32_t window_height_firstline;
666 uint32_t window_height_lastline;
667};
668
Ankit Premrajka70613ec2012-01-26 16:24:23 -0800669#define VIDEO_NODE 0
670#define MCTL_NODE 1
671
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700672#define OUTPUT_1 0
673#define OUTPUT_2 1
674#define OUTPUT_1_AND_2 2 /* snapshot only */
675#define OUTPUT_1_AND_3 3 /* video */
676#define CAMIF_TO_AXI_VIA_OUTPUT_2 4
677#define OUTPUT_1_AND_CAMIF_TO_AXI_VIA_OUTPUT_2 5
678#define OUTPUT_2_AND_CAMIF_TO_AXI_VIA_OUTPUT_1 6
679#define OUTPUT_1_2_AND_3 7
Kiran Kumar H N4cff94a2011-10-17 11:37:33 -0700680#define OUTPUT_ALL_CHNLS 8
Alekhya,Monikafc81e102011-12-29 15:17:33 +0530681#define OUTPUT_VIDEO_ALL_CHNLS 9
682#define OUTPUT_ZSL_ALL_CHNLS 10
683#define LAST_AXI_OUTPUT_MODE_ENUM = OUTPUT_ZSL_ALL_CHNLS
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700684
Nishant Pandit5dd54422012-06-26 22:52:44 +0530685#define OUTPUT_PRIM BIT(8)
686#define OUTPUT_PRIM_ALL_CHNLS BIT(9)
687#define OUTPUT_SEC BIT(10)
688#define OUTPUT_SEC_ALL_CHNLS BIT(11)
689#define OUTPUT_TERT1 BIT(12)
690#define OUTPUT_TERT2 BIT(13)
691
Kiran Kumar H Ndd128472011-12-01 09:35:34 -0800692
693
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700694#define MSM_FRAME_PREV_1 0
695#define MSM_FRAME_PREV_2 1
696#define MSM_FRAME_ENC 2
697
Nishant Pandit5dd54422012-06-26 22:52:44 +0530698#define OUTPUT_TYPE_P BIT(0)
699#define OUTPUT_TYPE_T BIT(1)
700#define OUTPUT_TYPE_S BIT(2)
701#define OUTPUT_TYPE_V BIT(3)
702#define OUTPUT_TYPE_L BIT(4)
703#define OUTPUT_TYPE_ST_L BIT(5)
704#define OUTPUT_TYPE_ST_R BIT(6)
705#define OUTPUT_TYPE_ST_D BIT(7)
706#define OUTPUT_TYPE_R BIT(8)
707#define OUTPUT_TYPE_R1 BIT(9)
Lakshmi Narayana Kalavala47e56572012-08-10 20:05:55 -0700708#define OUTPUT_TYPE_SAEC BIT(10)
709#define OUTPUT_TYPE_SAFC BIT(11)
710#define OUTPUT_TYPE_SAWB BIT(12)
711#define OUTPUT_TYPE_IHST BIT(13)
712#define OUTPUT_TYPE_CSTA BIT(14)
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700713
714struct fd_roi_info {
715 void *info;
716 int info_len;
717};
718
Mingcheng Zhu9559ee42011-08-09 11:54:22 -0700719struct msm_mem_map_info {
720 uint32_t cookie;
721 uint32_t length;
Mingcheng Zhufe7abc02011-08-09 13:27:39 -0700722 uint32_t mem_type;
Mingcheng Zhu9559ee42011-08-09 11:54:22 -0700723};
724
Mingcheng Zhu49505502011-07-19 20:44:36 -0700725#define MSM_MEM_MMAP 0
726#define MSM_MEM_USERPTR 1
727#define MSM_PLANE_MAX 8
728#define MSM_PLANE_Y 0
729#define MSM_PLANE_UV 1
730
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700731struct msm_frame {
732 struct timespec ts;
733 int path;
734 int type;
735 unsigned long buffer;
736 uint32_t phy_offset;
Kiran Kumar H N5a19c682011-07-23 11:34:34 -0700737 uint32_t y_off;
738 uint32_t cbcr_off;
Alekhya,Monikafc81e102011-12-29 15:17:33 +0530739 uint32_t planar0_off;
740 uint32_t planar1_off;
741 uint32_t planar2_off;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700742 int fd;
743
744 void *cropinfo;
745 int croplen;
746 uint32_t error_code;
747 struct fd_roi_info roi_info;
748 uint32_t frame_id;
749 int stcam_quality_ind;
750 uint32_t stcam_conv_value;
Ankit Premrajka3e90b9f2011-11-01 18:48:45 -0700751
752 struct ion_allocation_data ion_alloc;
753 struct ion_fd_data fd_data;
Ankit Premrajkae2c9c0b2012-06-07 17:18:25 -0700754 int ion_dev_fd;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700755};
756
757enum msm_st_frame_packing {
758 SIDE_BY_SIDE_HALF,
759 SIDE_BY_SIDE_FULL,
760 TOP_DOWN_HALF,
761 TOP_DOWN_FULL,
762};
763
764struct msm_st_crop {
765 uint32_t in_w;
766 uint32_t in_h;
767 uint32_t out_w;
768 uint32_t out_h;
769};
770
771struct msm_st_half {
Alekhya,Monikafc81e102011-12-29 15:17:33 +0530772 uint32_t buf_p0_off;
773 uint32_t buf_p1_off;
774 uint32_t buf_p0_stride;
775 uint32_t buf_p1_stride;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700776 uint32_t pix_x_off;
777 uint32_t pix_y_off;
778 struct msm_st_crop stCropInfo;
779};
780
781struct msm_st_frame {
782 struct msm_frame buf_info;
783 int type;
784 enum msm_st_frame_packing packing;
785 struct msm_st_half L;
786 struct msm_st_half R;
787 int frame_id;
788};
789
790#define MSM_CAMERA_ERR_MASK (0xFFFFFFFF & 1)
791
792struct stats_buff {
793 unsigned long buff;
794 int fd;
795};
796
797struct msm_stats_buf {
Lakshmi Narayana Kalavala4ab97a92011-07-26 15:30:14 -0700798 uint8_t awb_ymin;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700799 struct stats_buff aec;
800 struct stats_buff awb;
801 struct stats_buff af;
802 struct stats_buff ihist;
803 struct stats_buff rs;
804 struct stats_buff cs;
805 struct stats_buff skin;
806 int type;
807 uint32_t status_bits;
808 unsigned long buffer;
809 int fd;
Ankit Premrajka073e0ca2012-03-06 12:26:08 -0800810 int length;
811 struct ion_handle *handle;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700812 uint32_t frame_id;
Lakshmi Narayana Kalavala2db33842012-06-26 22:41:32 -0700813 int buf_idx;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700814};
815#define MSM_V4L2_EXT_CAPTURE_MODE_DEFAULT 0
816/* video capture mode in VIDIOC_S_PARM */
817#define MSM_V4L2_EXT_CAPTURE_MODE_PREVIEW \
818 (MSM_V4L2_EXT_CAPTURE_MODE_DEFAULT+1)
819/* extendedmode for video recording in VIDIOC_S_PARM */
820#define MSM_V4L2_EXT_CAPTURE_MODE_VIDEO \
821 (MSM_V4L2_EXT_CAPTURE_MODE_DEFAULT+2)
822/* extendedmode for the full size main image in VIDIOC_S_PARM */
823#define MSM_V4L2_EXT_CAPTURE_MODE_MAIN (MSM_V4L2_EXT_CAPTURE_MODE_DEFAULT+3)
824/* extendedmode for the thumb nail image in VIDIOC_S_PARM */
825#define MSM_V4L2_EXT_CAPTURE_MODE_THUMBNAIL \
826 (MSM_V4L2_EXT_CAPTURE_MODE_DEFAULT+4)
Mingcheng Zhu51dbdc52012-08-19 22:01:09 -0700827/* ISP_PIX_OUTPUT1: no pp, directly send output1 buf to user */
828#define MSM_V4L2_EXT_CAPTURE_MODE_ISP_PIX_OUTPUT1 \
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700829 (MSM_V4L2_EXT_CAPTURE_MODE_DEFAULT+5)
Mingcheng Zhu51dbdc52012-08-19 22:01:09 -0700830/* ISP_PIX_OUTPUT2: no pp, directly send output2 buf to user */
831#define MSM_V4L2_EXT_CAPTURE_MODE_ISP_PIX_OUTPUT2 \
Nishant Pandit5dd54422012-06-26 22:52:44 +0530832 (MSM_V4L2_EXT_CAPTURE_MODE_DEFAULT+6)
Mingcheng Zhu51dbdc52012-08-19 22:01:09 -0700833/* raw image type */
834#define MSM_V4L2_EXT_CAPTURE_MODE_RAW \
Nishant Pandit5dd54422012-06-26 22:52:44 +0530835 (MSM_V4L2_EXT_CAPTURE_MODE_DEFAULT+7)
Mingcheng Zhu51dbdc52012-08-19 22:01:09 -0700836/* RDI dump */
837#define MSM_V4L2_EXT_CAPTURE_MODE_RDI \
Nishant Pandit5dd54422012-06-26 22:52:44 +0530838 (MSM_V4L2_EXT_CAPTURE_MODE_DEFAULT+8)
Mingcheng Zhu51dbdc52012-08-19 22:01:09 -0700839/* RDI dump 1 */
840#define MSM_V4L2_EXT_CAPTURE_MODE_RDI1 \
Mingcheng Zhu96458e22012-08-07 21:45:43 -0700841 (MSM_V4L2_EXT_CAPTURE_MODE_DEFAULT+9)
Mingcheng Zhu51dbdc52012-08-19 22:01:09 -0700842/* RDI dump 2 */
843#define MSM_V4L2_EXT_CAPTURE_MODE_RDI2 \
Mingcheng Zhu96458e22012-08-07 21:45:43 -0700844 (MSM_V4L2_EXT_CAPTURE_MODE_DEFAULT+10)
Mingcheng Zhu51dbdc52012-08-19 22:01:09 -0700845#define MSM_V4L2_EXT_CAPTURE_MODE_AEC \
Mingcheng Zhu96458e22012-08-07 21:45:43 -0700846 (MSM_V4L2_EXT_CAPTURE_MODE_DEFAULT+11)
Mingcheng Zhu51dbdc52012-08-19 22:01:09 -0700847#define MSM_V4L2_EXT_CAPTURE_MODE_AWB \
Mingcheng Zhu96458e22012-08-07 21:45:43 -0700848 (MSM_V4L2_EXT_CAPTURE_MODE_DEFAULT+12)
Mingcheng Zhu51dbdc52012-08-19 22:01:09 -0700849#define MSM_V4L2_EXT_CAPTURE_MODE_AF \
Mingcheng Zhu96458e22012-08-07 21:45:43 -0700850 (MSM_V4L2_EXT_CAPTURE_MODE_DEFAULT+13)
Mingcheng Zhu51dbdc52012-08-19 22:01:09 -0700851#define MSM_V4L2_EXT_CAPTURE_MODE_IHIST \
Mingcheng Zhu96458e22012-08-07 21:45:43 -0700852 (MSM_V4L2_EXT_CAPTURE_MODE_DEFAULT+14)
Mingcheng Zhu51dbdc52012-08-19 22:01:09 -0700853#define MSM_V4L2_EXT_CAPTURE_MODE_CS \
Lakshmi Narayana Kalavala47e56572012-08-10 20:05:55 -0700854 (MSM_V4L2_EXT_CAPTURE_MODE_DEFAULT+15)
Mingcheng Zhu51dbdc52012-08-19 22:01:09 -0700855#define MSM_V4L2_EXT_CAPTURE_MODE_RS \
856 (MSM_V4L2_EXT_CAPTURE_MODE_DEFAULT+16)
857#define MSM_V4L2_EXT_CAPTURE_MODE_CSTA \
858 (MSM_V4L2_EXT_CAPTURE_MODE_DEFAULT+17)
859#define MSM_V4L2_EXT_CAPTURE_MODE_MAX (MSM_V4L2_EXT_CAPTURE_MODE_DEFAULT+18)
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700860
861#define MSM_V4L2_PID_MOTION_ISO V4L2_CID_PRIVATE_BASE
862#define MSM_V4L2_PID_EFFECT (V4L2_CID_PRIVATE_BASE+1)
863#define MSM_V4L2_PID_HJR (V4L2_CID_PRIVATE_BASE+2)
864#define MSM_V4L2_PID_LED_MODE (V4L2_CID_PRIVATE_BASE+3)
865#define MSM_V4L2_PID_PREP_SNAPSHOT (V4L2_CID_PRIVATE_BASE+4)
866#define MSM_V4L2_PID_EXP_METERING (V4L2_CID_PRIVATE_BASE+5)
867#define MSM_V4L2_PID_ISO (V4L2_CID_PRIVATE_BASE+6)
868#define MSM_V4L2_PID_CAM_MODE (V4L2_CID_PRIVATE_BASE+7)
869#define MSM_V4L2_PID_LUMA_ADAPTATION (V4L2_CID_PRIVATE_BASE+8)
870#define MSM_V4L2_PID_BEST_SHOT (V4L2_CID_PRIVATE_BASE+9)
871#define MSM_V4L2_PID_FOCUS_MODE (V4L2_CID_PRIVATE_BASE+10)
872#define MSM_V4L2_PID_BL_DETECTION (V4L2_CID_PRIVATE_BASE+11)
873#define MSM_V4L2_PID_SNOW_DETECTION (V4L2_CID_PRIVATE_BASE+12)
874#define MSM_V4L2_PID_CTRL_CMD (V4L2_CID_PRIVATE_BASE+13)
875#define MSM_V4L2_PID_EVT_SUB_INFO (V4L2_CID_PRIVATE_BASE+14)
Mingcheng Zhu5b04d352011-07-22 21:18:42 -0700876#define MSM_V4L2_PID_STROBE_FLASH (V4L2_CID_PRIVATE_BASE+15)
Kiran Kumar H N90785902012-07-05 13:59:38 -0700877#define MSM_V4L2_PID_INST_HANDLE (V4L2_CID_PRIVATE_BASE+16)
Mingcheng Zhu5b04d352011-07-22 21:18:42 -0700878#define MSM_V4L2_PID_MMAP_INST (V4L2_CID_PRIVATE_BASE+17)
Kiran Kumar H Nc3cb9ea2012-01-06 15:11:10 -0800879#define MSM_V4L2_PID_PP_PLANE_INFO (V4L2_CID_PRIVATE_BASE+18)
880#define MSM_V4L2_PID_MAX MSM_V4L2_PID_PP_PLANE_INFO
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700881
882/* camera operation mode for video recording - two frame output queues */
883#define MSM_V4L2_CAM_OP_DEFAULT 0
884/* camera operation mode for video recording - two frame output queues */
885#define MSM_V4L2_CAM_OP_PREVIEW (MSM_V4L2_CAM_OP_DEFAULT+1)
886/* camera operation mode for video recording - two frame output queues */
887#define MSM_V4L2_CAM_OP_VIDEO (MSM_V4L2_CAM_OP_DEFAULT+2)
888/* camera operation mode for standard shapshot - two frame output queues */
889#define MSM_V4L2_CAM_OP_CAPTURE (MSM_V4L2_CAM_OP_DEFAULT+3)
890/* camera operation mode for zsl shapshot - three output queues */
891#define MSM_V4L2_CAM_OP_ZSL (MSM_V4L2_CAM_OP_DEFAULT+4)
892/* camera operation mode for raw snapshot - one frame output queue */
893#define MSM_V4L2_CAM_OP_RAW (MSM_V4L2_CAM_OP_DEFAULT+5)
Jignesh Mehta6cf8a742012-02-04 23:40:50 -0800894/* camera operation mode for jpeg snapshot - one frame output queue */
895#define MSM_V4L2_CAM_OP_JPEG_CAPTURE (MSM_V4L2_CAM_OP_DEFAULT+6)
896
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700897
898#define MSM_V4L2_VID_CAP_TYPE 0
899#define MSM_V4L2_STREAM_ON 1
900#define MSM_V4L2_STREAM_OFF 2
901#define MSM_V4L2_SNAPSHOT 3
902#define MSM_V4L2_QUERY_CTRL 4
903#define MSM_V4L2_GET_CTRL 5
904#define MSM_V4L2_SET_CTRL 6
905#define MSM_V4L2_QUERY 7
906#define MSM_V4L2_GET_CROP 8
907#define MSM_V4L2_SET_CROP 9
908#define MSM_V4L2_OPEN 10
909#define MSM_V4L2_CLOSE 11
910#define MSM_V4L2_SET_CTRL_CMD 12
911#define MSM_V4L2_EVT_SUB_MASK 13
Ankit Premrajka8c9bf5d2012-08-07 15:45:31 -0700912#define MSM_V4L2_PRIVATE_CMD 14
913#define MSM_V4L2_MAX 15
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700914#define V4L2_CAMERA_EXIT 43
915
916struct crop_info {
917 void *info;
918 int len;
919};
920
921struct msm_postproc {
922 int ftnum;
923 struct msm_frame fthumnail;
924 int fmnum;
925 struct msm_frame fmain;
926};
927
928struct msm_snapshot_pp_status {
929 void *status;
930};
931
932#define CFG_SET_MODE 0
933#define CFG_SET_EFFECT 1
934#define CFG_START 2
935#define CFG_PWR_UP 3
936#define CFG_PWR_DOWN 4
937#define CFG_WRITE_EXPOSURE_GAIN 5
938#define CFG_SET_DEFAULT_FOCUS 6
939#define CFG_MOVE_FOCUS 7
940#define CFG_REGISTER_TO_REAL_GAIN 8
941#define CFG_REAL_TO_REGISTER_GAIN 9
942#define CFG_SET_FPS 10
943#define CFG_SET_PICT_FPS 11
944#define CFG_SET_BRIGHTNESS 12
945#define CFG_SET_CONTRAST 13
946#define CFG_SET_ZOOM 14
947#define CFG_SET_EXPOSURE_MODE 15
948#define CFG_SET_WB 16
949#define CFG_SET_ANTIBANDING 17
950#define CFG_SET_EXP_GAIN 18
951#define CFG_SET_PICT_EXP_GAIN 19
952#define CFG_SET_LENS_SHADING 20
953#define CFG_GET_PICT_FPS 21
954#define CFG_GET_PREV_L_PF 22
955#define CFG_GET_PREV_P_PL 23
956#define CFG_GET_PICT_L_PF 24
957#define CFG_GET_PICT_P_PL 25
958#define CFG_GET_AF_MAX_STEPS 26
959#define CFG_GET_PICT_MAX_EXP_LC 27
960#define CFG_SEND_WB_INFO 28
961#define CFG_SENSOR_INIT 29
962#define CFG_GET_3D_CALI_DATA 30
963#define CFG_GET_CALIB_DATA 31
Kevin Chana980f392011-08-01 20:55:00 -0700964#define CFG_GET_OUTPUT_INFO 32
Jeyaprakash Soundrapandian734476b2012-05-03 20:08:15 -0700965#define CFG_GET_EEPROM_INFO 33
966#define CFG_GET_EEPROM_DATA 34
967#define CFG_SET_ACTUATOR_INFO 35
968#define CFG_GET_ACTUATOR_INFO 36
Su Liu6c3bb322012-02-14 02:15:05 +0530969/* TBD: QRD */
Jeyaprakash Soundrapandian734476b2012-05-03 20:08:15 -0700970#define CFG_SET_SATURATION 37
971#define CFG_SET_SHARPNESS 38
972#define CFG_SET_TOUCHAEC 39
973#define CFG_SET_AUTO_FOCUS 40
974#define CFG_SET_AUTOFLASH 41
975#define CFG_SET_EXPOSURE_COMPENSATION 42
976#define CFG_SET_ISO 43
Nishant Panditb2157c92012-04-25 01:09:28 +0530977#define CFG_START_STREAM 44
978#define CFG_STOP_STREAM 45
979#define CFG_GET_CSI_PARAMS 46
Jack Wangb88c8c22012-07-26 11:33:36 -0700980#define CFG_POWER_UP 47
981#define CFG_POWER_DOWN 48
982#define CFG_WRITE_I2C_ARRAY 49
983#define CFG_READ_I2C_ARRAY 50
984#define CFG_PCLK_CHANGE 51
985#define CFG_CONFIG_VREG_ARRAY 52
986#define CFG_CONFIG_CLK_ARRAY 53
987#define CFG_GPIO_OP 54
988#define CFG_MAX 55
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700989
990
991#define MOVE_NEAR 0
992#define MOVE_FAR 1
993
994#define SENSOR_PREVIEW_MODE 0
995#define SENSOR_SNAPSHOT_MODE 1
996#define SENSOR_RAW_SNAPSHOT_MODE 2
997#define SENSOR_HFR_60FPS_MODE 3
998#define SENSOR_HFR_90FPS_MODE 4
999#define SENSOR_HFR_120FPS_MODE 5
1000
1001#define SENSOR_QTR_SIZE 0
1002#define SENSOR_FULL_SIZE 1
1003#define SENSOR_QVGA_SIZE 2
1004#define SENSOR_INVALID_SIZE 3
1005
1006#define CAMERA_EFFECT_OFF 0
1007#define CAMERA_EFFECT_MONO 1
1008#define CAMERA_EFFECT_NEGATIVE 2
1009#define CAMERA_EFFECT_SOLARIZE 3
1010#define CAMERA_EFFECT_SEPIA 4
1011#define CAMERA_EFFECT_POSTERIZE 5
1012#define CAMERA_EFFECT_WHITEBOARD 6
1013#define CAMERA_EFFECT_BLACKBOARD 7
1014#define CAMERA_EFFECT_AQUA 8
Yonggui Maoc0055a12011-09-29 19:31:47 -07001015#define CAMERA_EFFECT_EMBOSS 9
1016#define CAMERA_EFFECT_SKETCH 10
1017#define CAMERA_EFFECT_NEON 11
1018#define CAMERA_EFFECT_MAX 12
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001019
Taniya Dasa9bdb012011-09-08 11:21:33 +05301020/* QRD */
1021#define CAMERA_EFFECT_BW 10
1022#define CAMERA_EFFECT_BLUISH 12
1023#define CAMERA_EFFECT_REDDISH 13
1024#define CAMERA_EFFECT_GREENISH 14
1025
1026/* QRD */
1027#define CAMERA_ANTIBANDING_OFF 0
1028#define CAMERA_ANTIBANDING_50HZ 2
1029#define CAMERA_ANTIBANDING_60HZ 1
1030#define CAMERA_ANTIBANDING_AUTO 3
1031
1032#define CAMERA_CONTRAST_LV0 0
1033#define CAMERA_CONTRAST_LV1 1
1034#define CAMERA_CONTRAST_LV2 2
1035#define CAMERA_CONTRAST_LV3 3
1036#define CAMERA_CONTRAST_LV4 4
1037#define CAMERA_CONTRAST_LV5 5
1038#define CAMERA_CONTRAST_LV6 6
1039#define CAMERA_CONTRAST_LV7 7
1040#define CAMERA_CONTRAST_LV8 8
1041#define CAMERA_CONTRAST_LV9 9
1042
1043#define CAMERA_BRIGHTNESS_LV0 0
1044#define CAMERA_BRIGHTNESS_LV1 1
1045#define CAMERA_BRIGHTNESS_LV2 2
1046#define CAMERA_BRIGHTNESS_LV3 3
1047#define CAMERA_BRIGHTNESS_LV4 4
1048#define CAMERA_BRIGHTNESS_LV5 5
1049#define CAMERA_BRIGHTNESS_LV6 6
1050#define CAMERA_BRIGHTNESS_LV7 7
1051#define CAMERA_BRIGHTNESS_LV8 8
1052
1053
1054#define CAMERA_SATURATION_LV0 0
1055#define CAMERA_SATURATION_LV1 1
1056#define CAMERA_SATURATION_LV2 2
1057#define CAMERA_SATURATION_LV3 3
1058#define CAMERA_SATURATION_LV4 4
1059#define CAMERA_SATURATION_LV5 5
1060#define CAMERA_SATURATION_LV6 6
1061#define CAMERA_SATURATION_LV7 7
1062#define CAMERA_SATURATION_LV8 8
1063
1064#define CAMERA_SHARPNESS_LV0 0
1065#define CAMERA_SHARPNESS_LV1 3
1066#define CAMERA_SHARPNESS_LV2 6
1067#define CAMERA_SHARPNESS_LV3 9
1068#define CAMERA_SHARPNESS_LV4 12
1069#define CAMERA_SHARPNESS_LV5 15
1070#define CAMERA_SHARPNESS_LV6 18
1071#define CAMERA_SHARPNESS_LV7 21
1072#define CAMERA_SHARPNESS_LV8 24
1073#define CAMERA_SHARPNESS_LV9 27
1074#define CAMERA_SHARPNESS_LV10 30
1075
1076#define CAMERA_SETAE_AVERAGE 0
1077#define CAMERA_SETAE_CENWEIGHT 1
1078
Taniya Dasa9bdb012011-09-08 11:21:33 +05301079#define CAMERA_WB_AUTO 1 /* This list must match aeecamera.h */
1080#define CAMERA_WB_CUSTOM 2
1081#define CAMERA_WB_INCANDESCENT 3
1082#define CAMERA_WB_FLUORESCENT 4
1083#define CAMERA_WB_DAYLIGHT 5
1084#define CAMERA_WB_CLOUDY_DAYLIGHT 6
1085#define CAMERA_WB_TWILIGHT 7
1086#define CAMERA_WB_SHADE 8
1087
1088#define CAMERA_EXPOSURE_COMPENSATION_LV0 12
1089#define CAMERA_EXPOSURE_COMPENSATION_LV1 6
1090#define CAMERA_EXPOSURE_COMPENSATION_LV2 0
1091#define CAMERA_EXPOSURE_COMPENSATION_LV3 -6
1092#define CAMERA_EXPOSURE_COMPENSATION_LV4 -12
1093
Rajakumar Govindaram6bc004a2011-12-05 20:58:19 -08001094enum msm_v4l2_saturation_level {
1095 MSM_V4L2_SATURATION_L0,
1096 MSM_V4L2_SATURATION_L1,
1097 MSM_V4L2_SATURATION_L2,
1098 MSM_V4L2_SATURATION_L3,
1099 MSM_V4L2_SATURATION_L4,
1100 MSM_V4L2_SATURATION_L5,
1101 MSM_V4L2_SATURATION_L6,
1102 MSM_V4L2_SATURATION_L7,
1103 MSM_V4L2_SATURATION_L8,
1104 MSM_V4L2_SATURATION_L9,
1105 MSM_V4L2_SATURATION_L10,
1106};
1107
Suresh Vankadara212d9722012-05-30 15:51:20 +05301108enum msm_v4l2_contrast_level {
1109 MSM_V4L2_CONTRAST_L0,
1110 MSM_V4L2_CONTRAST_L1,
1111 MSM_V4L2_CONTRAST_L2,
1112 MSM_V4L2_CONTRAST_L3,
1113 MSM_V4L2_CONTRAST_L4,
1114 MSM_V4L2_CONTRAST_L5,
1115 MSM_V4L2_CONTRAST_L6,
1116 MSM_V4L2_CONTRAST_L7,
1117 MSM_V4L2_CONTRAST_L8,
1118 MSM_V4L2_CONTRAST_L9,
1119 MSM_V4L2_CONTRAST_L10,
1120};
1121
1122
Rajakumar Govindaram6bc004a2011-12-05 20:58:19 -08001123enum msm_v4l2_exposure_level {
1124 MSM_V4L2_EXPOSURE_N2,
1125 MSM_V4L2_EXPOSURE_N1,
1126 MSM_V4L2_EXPOSURE_D,
1127 MSM_V4L2_EXPOSURE_P1,
1128 MSM_V4L2_EXPOSURE_P2,
1129};
1130
1131enum msm_v4l2_sharpness_level {
1132 MSM_V4L2_SHARPNESS_L0,
1133 MSM_V4L2_SHARPNESS_L1,
1134 MSM_V4L2_SHARPNESS_L2,
1135 MSM_V4L2_SHARPNESS_L3,
1136 MSM_V4L2_SHARPNESS_L4,
1137 MSM_V4L2_SHARPNESS_L5,
1138 MSM_V4L2_SHARPNESS_L6,
1139};
1140
1141enum msm_v4l2_expo_metering_mode {
1142 MSM_V4L2_EXP_FRAME_AVERAGE,
1143 MSM_V4L2_EXP_CENTER_WEIGHTED,
1144 MSM_V4L2_EXP_SPOT_METERING,
1145};
1146
1147enum msm_v4l2_iso_mode {
1148 MSM_V4L2_ISO_AUTO = 0,
1149 MSM_V4L2_ISO_DEBLUR,
1150 MSM_V4L2_ISO_100,
1151 MSM_V4L2_ISO_200,
1152 MSM_V4L2_ISO_400,
1153 MSM_V4L2_ISO_800,
1154 MSM_V4L2_ISO_1600,
1155};
1156
1157enum msm_v4l2_wb_mode {
Suresh Vankadara212d9722012-05-30 15:51:20 +05301158 MSM_V4L2_WB_OFF,
1159 MSM_V4L2_WB_AUTO ,
Rajakumar Govindaram6bc004a2011-12-05 20:58:19 -08001160 MSM_V4L2_WB_CUSTOM,
1161 MSM_V4L2_WB_INCANDESCENT,
1162 MSM_V4L2_WB_FLUORESCENT,
1163 MSM_V4L2_WB_DAYLIGHT,
1164 MSM_V4L2_WB_CLOUDY_DAYLIGHT,
Suresh Vankadara212d9722012-05-30 15:51:20 +05301165};
1166
1167enum msm_v4l2_special_effect {
1168 MSM_V4L2_EFFECT_OFF,
1169 MSM_V4L2_EFFECT_MONO,
1170 MSM_V4L2_EFFECT_NEGATIVE,
1171 MSM_V4L2_EFFECT_SOLARIZE,
1172 MSM_V4L2_EFFECT_SEPIA,
1173 MSM_V4L2_EFFECT_POSTERAIZE,
1174 MSM_V4L2_EFFECT_WHITEBOARD,
1175 MSM_V4L2_EFFECT_BLACKBOARD,
1176 MSM_V4L2_EFFECT_AQUA,
1177 MSM_V4L2_EFFECT_EMBOSS,
1178 MSM_V4L2_EFFECT_SKETCH,
1179 MSM_V4L2_EFFECT_NEON,
1180 MSM_V4L2_EFFECT_MAX,
Rajakumar Govindaram6bc004a2011-12-05 20:58:19 -08001181};
1182
1183enum msm_v4l2_power_line_frequency {
1184 MSM_V4L2_POWER_LINE_OFF,
1185 MSM_V4L2_POWER_LINE_60HZ,
1186 MSM_V4L2_POWER_LINE_50HZ,
1187 MSM_V4L2_POWER_LINE_AUTO,
1188};
Taniya Dasa9bdb012011-09-08 11:21:33 +05301189
Su Liu6c3bb322012-02-14 02:15:05 +05301190#define CAMERA_ISO_TYPE_AUTO 0
1191#define CAMEAR_ISO_TYPE_HJR 1
1192#define CAMEAR_ISO_TYPE_100 2
1193#define CAMERA_ISO_TYPE_200 3
1194#define CAMERA_ISO_TYPE_400 4
1195#define CAMEAR_ISO_TYPE_800 5
1196#define CAMERA_ISO_TYPE_1600 6
1197
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001198struct sensor_pict_fps {
1199 uint16_t prevfps;
1200 uint16_t pictfps;
1201};
1202
1203struct exp_gain_cfg {
1204 uint16_t gain;
1205 uint32_t line;
1206};
1207
1208struct focus_cfg {
1209 int32_t steps;
1210 int dir;
1211};
1212
1213struct fps_cfg {
1214 uint16_t f_mult;
1215 uint16_t fps_div;
1216 uint32_t pict_fps_div;
1217};
1218struct wb_info_cfg {
1219 uint16_t red_gain;
1220 uint16_t green_gain;
1221 uint16_t blue_gain;
1222};
1223struct sensor_3d_exp_cfg {
1224 uint16_t gain;
1225 uint32_t line;
1226 uint16_t r_gain;
1227 uint16_t b_gain;
1228 uint16_t gr_gain;
1229 uint16_t gb_gain;
1230 uint16_t gain_adjust;
1231};
1232struct sensor_3d_cali_data_t{
1233 unsigned char left_p_matrix[3][4][8];
1234 unsigned char right_p_matrix[3][4][8];
1235 unsigned char square_len[8];
1236 unsigned char focal_len[8];
1237 unsigned char pixel_pitch[8];
1238 uint16_t left_r;
1239 uint16_t left_b;
1240 uint16_t left_gb;
1241 uint16_t left_af_far;
1242 uint16_t left_af_mid;
1243 uint16_t left_af_short;
1244 uint16_t left_af_5um;
1245 uint16_t left_af_50up;
1246 uint16_t left_af_50down;
1247 uint16_t right_r;
1248 uint16_t right_b;
1249 uint16_t right_gb;
1250 uint16_t right_af_far;
1251 uint16_t right_af_mid;
1252 uint16_t right_af_short;
1253 uint16_t right_af_5um;
1254 uint16_t right_af_50up;
1255 uint16_t right_af_50down;
1256};
1257struct sensor_init_cfg {
1258 uint8_t prev_res;
1259 uint8_t pict_res;
1260};
1261
1262struct sensor_calib_data {
1263 /* Color Related Measurements */
1264 uint16_t r_over_g;
1265 uint16_t b_over_g;
1266 uint16_t gr_over_gb;
1267
1268 /* Lens Related Measurements */
1269 uint16_t macro_2_inf;
1270 uint16_t inf_2_macro;
1271 uint16_t stroke_amt;
1272 uint16_t af_pos_1m;
1273 uint16_t af_pos_inf;
1274};
1275
Kevin Chana980f392011-08-01 20:55:00 -07001276enum msm_sensor_resolution_t {
Kevin Chan36e2bdc2011-08-30 17:21:21 -07001277 MSM_SENSOR_RES_FULL,
1278 MSM_SENSOR_RES_QTR,
Kevin Chana980f392011-08-01 20:55:00 -07001279 MSM_SENSOR_RES_2,
1280 MSM_SENSOR_RES_3,
1281 MSM_SENSOR_RES_4,
1282 MSM_SENSOR_RES_5,
1283 MSM_SENSOR_RES_6,
1284 MSM_SENSOR_RES_7,
1285 MSM_SENSOR_INVALID_RES,
1286};
1287
1288struct msm_sensor_output_info_t {
1289 uint16_t x_output;
1290 uint16_t y_output;
1291 uint16_t line_length_pclk;
1292 uint16_t frame_length_lines;
Kevin Chane30d3692011-10-14 16:11:01 -07001293 uint32_t vt_pixel_clk;
1294 uint32_t op_pixel_clk;
Kevin Chan272f6602011-10-18 14:20:03 -07001295 uint16_t binning_factor;
Kevin Chana980f392011-08-01 20:55:00 -07001296};
1297
1298struct sensor_output_info_t {
1299 struct msm_sensor_output_info_t *output_info;
1300 uint16_t num_info;
1301};
1302
Jack Wangb88c8c22012-07-26 11:33:36 -07001303struct msm_sensor_exp_gain_info_t {
1304 uint16_t coarse_int_time_addr;
1305 uint16_t global_gain_addr;
1306 uint16_t vert_offset;
1307};
1308
1309struct msm_sensor_output_reg_addr_t {
1310 uint16_t x_output;
1311 uint16_t y_output;
1312 uint16_t line_length_pclk;
1313 uint16_t frame_length_lines;
1314};
1315
1316struct sensor_driver_params_type {
1317 struct msm_camera_i2c_reg_setting *init_settings;
1318 uint16_t init_settings_size;
1319 struct msm_camera_i2c_reg_setting *mode_settings;
1320 uint16_t mode_settings_size;
1321 struct msm_sensor_output_reg_addr_t *sensor_output_reg_addr;
1322 struct msm_camera_i2c_reg_setting *start_settings;
1323 struct msm_camera_i2c_reg_setting *stop_settings;
1324 struct msm_camera_i2c_reg_setting *groupon_settings;
1325 struct msm_camera_i2c_reg_setting *groupoff_settings;
1326 struct msm_sensor_exp_gain_info_t *sensor_exp_gain_info;
1327 struct msm_sensor_output_info_t *output_info;
1328};
1329
Taniya Dasa9bdb012011-09-08 11:21:33 +05301330struct mirror_flip {
1331 int32_t x_mirror;
1332 int32_t y_flip;
1333};
1334
1335struct cord {
1336 uint32_t x;
1337 uint32_t y;
1338};
1339
Jeyaprakash Soundrapandian734476b2012-05-03 20:08:15 -07001340struct msm_eeprom_data_t {
1341 void *eeprom_data;
1342 uint16_t index;
1343};
1344
Nishant Panditb2157c92012-04-25 01:09:28 +05301345struct msm_camera_csid_vc_cfg {
1346 uint8_t cid;
1347 uint8_t dt;
1348 uint8_t decode_format;
1349};
1350
1351struct csi_lane_params_t {
Kevin Chanbdcf7ef2012-08-24 08:33:33 -07001352 uint16_t csi_lane_assign;
Nishant Panditb2157c92012-04-25 01:09:28 +05301353 uint8_t csi_lane_mask;
1354 uint8_t csi_if;
Sreesudhan Ramakrish Ramkumar254f7e72012-03-17 17:27:34 -07001355 uint8_t csid_core[2];
Sreesudhan Ramakrish Ramkumar4f9d27f2012-08-28 23:51:38 -07001356 uint8_t csi_phy_sel;
Sreesudhan Ramakrish Ramkumar254f7e72012-03-17 17:27:34 -07001357};
1358
1359struct msm_camera_csid_lut_params {
1360 uint8_t num_cid;
1361 struct msm_camera_csid_vc_cfg *vc_cfg;
1362};
1363
1364struct msm_camera_csid_params {
1365 uint8_t lane_cnt;
1366 uint16_t lane_assign;
1367 uint8_t phy_sel;
1368 struct msm_camera_csid_lut_params lut_params;
1369};
1370
1371struct msm_camera_csiphy_params {
1372 uint8_t lane_cnt;
1373 uint8_t settle_cnt;
1374 uint16_t lane_mask;
1375 uint8_t combo_mode;
1376};
1377
1378struct msm_camera_csi2_params {
1379 struct msm_camera_csid_params csid_params;
1380 struct msm_camera_csiphy_params csiphy_params;
1381};
1382
1383enum msm_camera_csi_data_format {
1384 CSI_8BIT,
1385 CSI_10BIT,
1386 CSI_12BIT,
1387};
1388
1389struct msm_camera_csi_params {
1390 enum msm_camera_csi_data_format data_format;
1391 uint8_t lane_cnt;
1392 uint8_t lane_assign;
1393 uint8_t settle_cnt;
1394 uint8_t dpcm_scheme;
1395};
1396
1397enum csic_cfg_type_t {
1398 CSIC_INIT,
1399 CSIC_CFG,
1400};
1401
1402struct csic_cfg_data {
1403 enum csic_cfg_type_t cfgtype;
1404 struct msm_camera_csi_params *csic_params;
1405};
1406
1407enum csid_cfg_type_t {
1408 CSID_INIT,
1409 CSID_CFG,
1410};
1411
1412struct csid_cfg_data {
1413 enum csid_cfg_type_t cfgtype;
1414 union {
1415 uint32_t csid_version;
1416 struct msm_camera_csid_params *csid_params;
1417 } cfg;
1418};
1419
1420enum csiphy_cfg_type_t {
1421 CSIPHY_INIT,
1422 CSIPHY_CFG,
1423};
1424
1425struct csiphy_cfg_data {
1426 enum csiphy_cfg_type_t cfgtype;
1427 struct msm_camera_csiphy_params *csiphy_params;
Nishant Panditb2157c92012-04-25 01:09:28 +05301428};
1429
1430#define CSI_EMBED_DATA 0x12
1431#define CSI_RESERVED_DATA_0 0x13
1432#define CSI_YUV422_8 0x1E
1433#define CSI_RAW8 0x2A
1434#define CSI_RAW10 0x2B
1435#define CSI_RAW12 0x2C
1436
1437#define CSI_DECODE_6BIT 0
1438#define CSI_DECODE_8BIT 1
1439#define CSI_DECODE_10BIT 2
1440#define CSI_DECODE_DPCM_10_8_10 5
1441
Sreesudhan Ramakrish Ramkumard8123212012-06-30 13:15:27 -07001442#define ISPIF_STREAM(intf, action, vfe) (((intf)<<ISPIF_S_STREAM_SHIFT)+\
1443 (action)+((vfe)<<ISPIF_VFE_INTF_SHIFT))
1444#define ISPIF_ON_FRAME_BOUNDARY (0x01 << 0)
1445#define ISPIF_OFF_FRAME_BOUNDARY (0x01 << 1)
1446#define ISPIF_OFF_IMMEDIATELY (0x01 << 2)
1447#define ISPIF_S_STREAM_SHIFT 4
1448#define ISPIF_VFE_INTF_SHIFT 12
Nishant Panditb2157c92012-04-25 01:09:28 +05301449
1450#define PIX_0 (0x01 << 0)
1451#define RDI_0 (0x01 << 1)
1452#define PIX_1 (0x01 << 2)
1453#define RDI_1 (0x01 << 3)
Sreesudhan Ramakrish Ramkumard8123212012-06-30 13:15:27 -07001454#define RDI_2 (0x01 << 4)
Nishant Panditb2157c92012-04-25 01:09:28 +05301455
Sreesudhan Ramakrish Ramkumard8123212012-06-30 13:15:27 -07001456enum msm_ispif_vfe_intf {
1457 VFE0,
1458 VFE1,
1459 VFE_MAX,
1460};
Nishant Panditb2157c92012-04-25 01:09:28 +05301461
1462enum msm_ispif_intftype {
1463 PIX0,
1464 RDI0,
1465 PIX1,
1466 RDI1,
Nishant Panditb2157c92012-04-25 01:09:28 +05301467 RDI2,
1468 INTF_MAX,
1469};
1470
1471enum msm_ispif_vc {
1472 VC0,
1473 VC1,
1474 VC2,
1475 VC3,
1476};
1477
1478enum msm_ispif_cid {
1479 CID0,
1480 CID1,
1481 CID2,
1482 CID3,
1483 CID4,
1484 CID5,
1485 CID6,
1486 CID7,
1487 CID8,
1488 CID9,
1489 CID10,
1490 CID11,
1491 CID12,
1492 CID13,
1493 CID14,
1494 CID15,
1495};
1496
1497struct msm_ispif_params {
1498 uint8_t intftype;
1499 uint16_t cid_mask;
1500 uint8_t csid;
Sreesudhan Ramakrish Ramkumard8123212012-06-30 13:15:27 -07001501 uint8_t vfe_intf;
Nishant Panditb2157c92012-04-25 01:09:28 +05301502};
1503
1504struct msm_ispif_params_list {
1505 uint32_t len;
1506 struct msm_ispif_params params[4];
1507};
1508
1509enum ispif_cfg_type_t {
1510 ISPIF_INIT,
1511 ISPIF_SET_CFG,
1512 ISPIF_SET_ON_FRAME_BOUNDARY,
1513 ISPIF_SET_OFF_FRAME_BOUNDARY,
1514 ISPIF_SET_OFF_IMMEDIATELY,
1515 ISPIF_RELEASE,
1516};
1517
1518struct ispif_cfg_data {
1519 enum ispif_cfg_type_t cfgtype;
1520 union {
1521 uint32_t csid_version;
1522 int cmd;
1523 struct msm_ispif_params_list ispif_params;
1524 } cfg;
1525};
1526
Jack Wangb88c8c22012-07-26 11:33:36 -07001527enum msm_camera_i2c_reg_addr_type {
1528 MSM_CAMERA_I2C_BYTE_ADDR = 1,
1529 MSM_CAMERA_I2C_WORD_ADDR,
1530};
1531
1532struct msm_camera_i2c_reg_array {
1533 uint16_t reg_addr;
1534 uint16_t reg_data;
1535};
1536
1537enum msm_camera_i2c_data_type {
1538 MSM_CAMERA_I2C_BYTE_DATA = 1,
1539 MSM_CAMERA_I2C_WORD_DATA,
1540 MSM_CAMERA_I2C_SET_BYTE_MASK,
1541 MSM_CAMERA_I2C_UNSET_BYTE_MASK,
1542 MSM_CAMERA_I2C_SET_WORD_MASK,
1543 MSM_CAMERA_I2C_UNSET_WORD_MASK,
1544 MSM_CAMERA_I2C_SET_BYTE_WRITE_MASK_DATA,
1545};
1546
1547struct msm_camera_i2c_reg_setting {
1548 struct msm_camera_i2c_reg_array *reg_setting;
1549 uint16_t size;
1550 enum msm_camera_i2c_reg_addr_type addr_type;
1551 enum msm_camera_i2c_data_type data_type;
1552 uint16_t delay;
1553};
1554
1555enum oem_setting_type {
1556 I2C_READ = 1,
1557 I2C_WRITE,
1558 GPIO_OP,
1559 EEPROM_READ,
1560 VREG_SET,
1561 CLK_SET,
1562};
1563
1564struct sensor_oem_setting {
1565 enum oem_setting_type type;
1566 void *data;
1567};
1568
1569enum camera_vreg_type {
1570 REG_LDO,
1571 REG_VS,
1572 REG_GPIO,
1573};
1574
1575struct camera_vreg_t {
1576 const char *reg_name;
1577 enum camera_vreg_type type;
1578 int min_voltage;
1579 int max_voltage;
1580 int op_mode;
1581 uint32_t delay;
1582};
1583
1584struct msm_camera_vreg_setting {
1585 struct camera_vreg_t *cam_vreg;
1586 uint16_t num_vreg;
1587 uint8_t enable;
1588};
1589
1590struct msm_cam_clk_info {
1591 const char *clk_name;
1592 long clk_rate;
1593 uint32_t delay;
1594};
1595
1596struct msm_cam_clk_setting {
1597 struct msm_cam_clk_info *clk_info;
1598 uint16_t num_clk_info;
1599 uint8_t enable;
1600};
1601
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001602struct sensor_cfg_data {
1603 int cfgtype;
1604 int mode;
1605 int rs;
1606 uint8_t max_steps;
1607
1608 union {
1609 int8_t effect;
1610 uint8_t lens_shading;
1611 uint16_t prevl_pf;
1612 uint16_t prevp_pl;
1613 uint16_t pictl_pf;
1614 uint16_t pictp_pl;
1615 uint32_t pict_max_exp_lc;
1616 uint16_t p_fps;
Su Liu6c3bb322012-02-14 02:15:05 +05301617 uint8_t iso_type;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001618 struct sensor_init_cfg init_info;
1619 struct sensor_pict_fps gfps;
1620 struct exp_gain_cfg exp_gain;
1621 struct focus_cfg focus;
1622 struct fps_cfg fps;
1623 struct wb_info_cfg wb_info;
1624 struct sensor_3d_exp_cfg sensor_3d_exp;
1625 struct sensor_calib_data calib_info;
Kevin Chana980f392011-08-01 20:55:00 -07001626 struct sensor_output_info_t output_info;
Jeyaprakash Soundrapandian734476b2012-05-03 20:08:15 -07001627 struct msm_eeprom_data_t eeprom_data;
Nishant Panditb2157c92012-04-25 01:09:28 +05301628 struct csi_lane_params_t csi_lane_params;
Taniya Dasa9bdb012011-09-08 11:21:33 +05301629 /* QRD */
1630 uint16_t antibanding;
1631 uint8_t contrast;
1632 uint8_t saturation;
1633 uint8_t sharpness;
1634 int8_t brightness;
1635 int ae_mode;
1636 uint8_t wb_val;
1637 int8_t exp_compensation;
Jack Wangb88c8c22012-07-26 11:33:36 -07001638 uint32_t pclk;
Taniya Dasa9bdb012011-09-08 11:21:33 +05301639 struct cord aec_cord;
1640 int is_autoflash;
1641 struct mirror_flip mirror_flip;
Jack Wangb88c8c22012-07-26 11:33:36 -07001642 void *setting;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001643 } cfg;
1644};
1645
Jack Wangb88c8c22012-07-26 11:33:36 -07001646enum gpio_operation_type {
1647 GPIO_REQUEST,
1648 GPIO_FREE,
1649 GPIO_SET_DIRECTION_OUTPUT,
1650 GPIO_SET_DIRECTION_INPUT,
1651 GPIO_GET_VALUE,
1652 GPIO_SET_VALUE,
1653};
1654
1655struct msm_cam_gpio_operation {
1656 enum gpio_operation_type op_type;
1657 unsigned address;
1658 int value;
1659 const char *tag;
1660};
1661
Rajakumar Govindaram6627b362012-01-29 19:00:30 -08001662struct damping_params_t {
1663 uint32_t damping_step;
1664 uint32_t damping_delay;
1665 uint32_t hw_params;
1666};
1667
1668enum actuator_type {
1669 ACTUATOR_VCM,
1670 ACTUATOR_PIEZO,
1671};
1672
1673enum msm_actuator_data_type {
1674 MSM_ACTUATOR_BYTE_DATA = 1,
1675 MSM_ACTUATOR_WORD_DATA,
1676};
1677
1678enum msm_actuator_addr_type {
1679 MSM_ACTUATOR_BYTE_ADDR = 1,
1680 MSM_ACTUATOR_WORD_ADDR,
1681};
1682
1683enum msm_actuator_write_type {
1684 MSM_ACTUATOR_WRITE_HW_DAMP,
1685 MSM_ACTUATOR_WRITE_DAC,
1686};
1687
1688struct msm_actuator_reg_params_t {
1689 enum msm_actuator_write_type reg_write_type;
1690 uint32_t hw_mask;
1691 uint16_t reg_addr;
1692 uint16_t hw_shift;
1693 uint16_t data_shift;
1694};
1695
1696struct reg_settings_t {
1697 uint16_t reg_addr;
1698 uint16_t reg_data;
1699};
1700
1701struct region_params_t {
1702 /* [0] = ForwardDirection Macro boundary
1703 [1] = ReverseDirection Inf boundary
1704 */
1705 uint16_t step_bound[2];
1706 uint16_t code_per_step;
1707};
1708
Sreesudhan Ramakrish Ramkumara4b5f302011-09-12 16:23:22 -07001709struct msm_actuator_move_params_t {
1710 int8_t dir;
Rajakumar Govindaram6627b362012-01-29 19:00:30 -08001711 int8_t sign_dir;
1712 int16_t dest_step_pos;
Sreesudhan Ramakrish Ramkumara4b5f302011-09-12 16:23:22 -07001713 int32_t num_steps;
Rajakumar Govindaram6627b362012-01-29 19:00:30 -08001714 struct damping_params_t *ringing_params;
1715};
1716
1717struct msm_actuator_tuning_params_t {
1718 int16_t initial_code;
1719 uint16_t pwd_step;
1720 uint16_t region_size;
1721 uint32_t total_steps;
1722 struct region_params_t *region_params;
1723};
1724
1725struct msm_actuator_params_t {
1726 enum actuator_type act_type;
1727 uint8_t reg_tbl_size;
1728 uint16_t data_size;
1729 uint16_t init_setting_size;
1730 uint32_t i2c_addr;
1731 enum msm_actuator_addr_type i2c_addr_type;
1732 enum msm_actuator_data_type i2c_data_type;
1733 struct msm_actuator_reg_params_t *reg_tbl_params;
1734 struct reg_settings_t *init_settings;
Sreesudhan Ramakrish Ramkumara4b5f302011-09-12 16:23:22 -07001735};
1736
1737struct msm_actuator_set_info_t {
Rajakumar Govindaram6627b362012-01-29 19:00:30 -08001738 struct msm_actuator_params_t actuator_params;
1739 struct msm_actuator_tuning_params_t af_tuning_params;
Sreesudhan Ramakrish Ramkumara4b5f302011-09-12 16:23:22 -07001740};
1741
Sreesudhan Ramakrish Ramkumar5f4b3442011-09-08 14:56:35 -07001742struct msm_actuator_get_info_t {
1743 uint32_t focal_length_num;
1744 uint32_t focal_length_den;
1745 uint32_t f_number_num;
1746 uint32_t f_number_den;
1747 uint32_t f_pix_num;
1748 uint32_t f_pix_den;
1749 uint32_t total_f_dist_num;
1750 uint32_t total_f_dist_den;
Jeyaprakash Soundrapandian04592002012-02-08 10:29:50 -08001751 uint32_t hor_view_angle_num;
1752 uint32_t hor_view_angle_den;
1753 uint32_t ver_view_angle_num;
1754 uint32_t ver_view_angle_den;
Sreesudhan Ramakrish Ramkumar5f4b3442011-09-08 14:56:35 -07001755};
1756
Rajakumar Govindaram6627b362012-01-29 19:00:30 -08001757enum af_camera_name {
1758 ACTUATOR_MAIN_CAM_0,
1759 ACTUATOR_MAIN_CAM_1,
1760 ACTUATOR_MAIN_CAM_2,
1761 ACTUATOR_MAIN_CAM_3,
1762 ACTUATOR_MAIN_CAM_4,
1763 ACTUATOR_MAIN_CAM_5,
1764 ACTUATOR_WEB_CAM_0,
1765 ACTUATOR_WEB_CAM_1,
1766 ACTUATOR_WEB_CAM_2,
1767};
1768
Sreesudhan Ramakrish Ramkumara4b5f302011-09-12 16:23:22 -07001769struct msm_actuator_cfg_data {
1770 int cfgtype;
Sreesudhan Ramakrish Ramkumar5f4b3442011-09-08 14:56:35 -07001771 uint8_t is_af_supported;
Sreesudhan Ramakrish Ramkumara4b5f302011-09-12 16:23:22 -07001772 union {
1773 struct msm_actuator_move_params_t move;
Sreesudhan Ramakrish Ramkumar5f4b3442011-09-08 14:56:35 -07001774 struct msm_actuator_set_info_t set_info;
1775 struct msm_actuator_get_info_t get_info;
Rajakumar Govindaram6627b362012-01-29 19:00:30 -08001776 enum af_camera_name cam_name;
Sreesudhan Ramakrish Ramkumara4b5f302011-09-12 16:23:22 -07001777 } cfg;
1778};
1779
Jeyaprakash Soundrapandian734476b2012-05-03 20:08:15 -07001780struct msm_eeprom_support {
1781 uint16_t is_supported;
1782 uint16_t size;
1783 uint16_t index;
1784 uint16_t qvalue;
1785};
1786
1787struct msm_calib_wb {
1788 uint16_t r_over_g;
1789 uint16_t b_over_g;
1790 uint16_t gr_over_gb;
1791};
1792
1793struct msm_calib_af {
1794 uint16_t macro_dac;
1795 uint16_t inf_dac;
1796 uint16_t start_dac;
1797};
1798
1799struct msm_calib_lsc {
1800 uint16_t r_gain[221];
1801 uint16_t b_gain[221];
1802 uint16_t gr_gain[221];
1803 uint16_t gb_gain[221];
1804};
1805
1806struct pixel_t {
1807 int x;
1808 int y;
1809};
1810
1811struct msm_calib_dpc {
1812 uint16_t validcount;
1813 struct pixel_t snapshot_coord[128];
1814 struct pixel_t preview_coord[128];
1815 struct pixel_t video_coord[128];
1816};
1817
Jack Wangb88c8c22012-07-26 11:33:36 -07001818struct msm_calib_raw {
1819 uint8_t *data;
1820 uint32_t size;
1821};
1822
Jeyaprakash Soundrapandian734476b2012-05-03 20:08:15 -07001823struct msm_camera_eeprom_info_t {
1824 struct msm_eeprom_support af;
1825 struct msm_eeprom_support wb;
1826 struct msm_eeprom_support lsc;
1827 struct msm_eeprom_support dpc;
Jack Wangb88c8c22012-07-26 11:33:36 -07001828 struct msm_eeprom_support raw;
Jeyaprakash Soundrapandian734476b2012-05-03 20:08:15 -07001829};
1830
1831struct msm_eeprom_cfg_data {
1832 int cfgtype;
1833 uint8_t is_eeprom_supported;
1834 union {
1835 struct msm_eeprom_data_t get_data;
1836 struct msm_camera_eeprom_info_t get_info;
1837 } cfg;
1838};
1839
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001840struct sensor_large_data {
1841 int cfgtype;
1842 union {
1843 struct sensor_3d_cali_data_t sensor_3d_cali_data;
1844 } data;
1845};
1846
1847enum sensor_type_t {
1848 BAYER,
1849 YUV,
1850 JPEG_SOC,
1851};
1852
1853enum flash_type {
1854 LED_FLASH,
1855 STROBE_FLASH,
1856};
1857
1858enum strobe_flash_ctrl_type {
1859 STROBE_FLASH_CTRL_INIT,
1860 STROBE_FLASH_CTRL_CHARGE,
1861 STROBE_FLASH_CTRL_RELEASE
1862};
1863
1864struct strobe_flash_ctrl_data {
1865 enum strobe_flash_ctrl_type type;
1866 int charge_en;
1867};
1868
1869struct msm_camera_info {
1870 int num_cameras;
1871 uint8_t has_3d_support[MSM_MAX_CAMERA_SENSORS];
1872 uint8_t is_internal_cam[MSM_MAX_CAMERA_SENSORS];
1873 uint32_t s_mount_angle[MSM_MAX_CAMERA_SENSORS];
1874 const char *video_dev_name[MSM_MAX_CAMERA_SENSORS];
1875 enum sensor_type_t sensor_type[MSM_MAX_CAMERA_SENSORS];
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001876};
1877
1878struct msm_cam_config_dev_info {
1879 int num_config_nodes;
1880 const char *config_dev_name[MSM_MAX_CAMERA_CONFIGS];
Ankit Premrajkaf94bcc62011-08-22 15:23:53 -07001881 int config_dev_id[MSM_MAX_CAMERA_CONFIGS];
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001882};
1883
Kiran Kumar H Nc3cb9ea2012-01-06 15:11:10 -08001884struct msm_mctl_node_info {
1885 int num_mctl_nodes;
1886 const char *mctl_node_name[MSM_MAX_CAMERA_SENSORS];
1887};
1888
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001889struct flash_ctrl_data {
1890 int flashtype;
1891 union {
1892 int led_state;
1893 struct strobe_flash_ctrl_data strobe_ctrl;
1894 } ctrl_data;
1895};
1896
1897#define GET_NAME 0
1898#define GET_PREVIEW_LINE_PER_FRAME 1
1899#define GET_PREVIEW_PIXELS_PER_LINE 2
1900#define GET_SNAPSHOT_LINE_PER_FRAME 3
1901#define GET_SNAPSHOT_PIXELS_PER_LINE 4
1902#define GET_SNAPSHOT_FPS 5
1903#define GET_SNAPSHOT_MAX_EP_LINE_CNT 6
1904
1905struct msm_camsensor_info {
1906 char name[MAX_SENSOR_NAME];
1907 uint8_t flash_enabled;
Sreesudhan Ramakrish Ramkumara2688822012-04-05 20:22:50 -07001908 uint8_t strobe_flash_enabled;
1909 uint8_t actuator_enabled;
Nishant Panditb2157c92012-04-25 01:09:28 +05301910 uint8_t ispif_supported;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001911 int8_t total_steps;
1912 uint8_t support_3d;
Mingcheng Zhuc85b8ad2012-03-08 17:47:17 -08001913 enum flash_type flashtype;
1914 enum sensor_type_t sensor_type;
1915 uint32_t pxlcode; /* enum v4l2_mbus_pixelcode */
1916 uint32_t camera_type; /* msm_camera_type */
1917 int mount_angle;
1918 uint32_t max_width;
1919 uint32_t max_height;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001920};
Kiran Kumar H Nceea7622011-08-23 14:01:03 -07001921
1922#define V4L2_SINGLE_PLANE 0
1923#define V4L2_MULTI_PLANE_Y 0
1924#define V4L2_MULTI_PLANE_CBCR 1
1925#define V4L2_MULTI_PLANE_CB 1
1926#define V4L2_MULTI_PLANE_CR 2
1927
1928struct plane_data {
1929 int plane_id;
1930 uint32_t offset;
1931 unsigned long size;
1932};
1933
1934struct img_plane_info {
1935 uint32_t width;
1936 uint32_t height;
1937 uint32_t pixelformat;
1938 uint8_t buffer_type; /*Single/Multi planar*/
1939 uint8_t output_port;
1940 uint32_t ext_mode;
1941 uint8_t num_planes;
1942 struct plane_data plane[MAX_PLANES];
Mingcheng Zhu996be182011-10-16 16:04:23 -07001943 uint32_t sp_y_offset;
Kiran Kumar H N90785902012-07-05 13:59:38 -07001944 uint32_t inst_handle;
Kiran Kumar H Nceea7622011-08-23 14:01:03 -07001945};
1946
Kevin Chan210061f2012-02-14 20:56:16 -08001947#define QCAMERA_NAME "qcamera"
Ankit Premrajka4b3443f2012-06-11 14:06:31 -07001948#define QCAMERA_SERVER_NAME "qcamera_server"
Kevin Chan210061f2012-02-14 20:56:16 -08001949#define QCAMERA_DEVICE_GROUP_ID 1
1950#define QCAMERA_VNODE_GROUP_ID 2
1951
Ankit Premrajka4b3443f2012-06-11 14:06:31 -07001952enum msm_cam_subdev_type {
1953 CSIPHY_DEV,
1954 CSID_DEV,
1955 CSIC_DEV,
1956 ISPIF_DEV,
1957 VFE_DEV,
1958 AXI_DEV,
1959 VPE_DEV,
1960 SENSOR_DEV,
1961 ACTUATOR_DEV,
1962 EEPROM_DEV,
1963 GESTURE_DEV,
1964 IRQ_ROUTER_DEV,
1965 CPP_DEV,
Sreesudhan Ramakrish Ramkumarc842b612012-05-21 17:23:24 -07001966 CCI_DEV,
Ankit Premrajka4b3443f2012-06-11 14:06:31 -07001967};
1968
1969struct msm_mctl_set_sdev_data {
1970 uint32_t revision;
1971 enum msm_cam_subdev_type sdev_type;
1972};
1973
Kevin Chan94b4c832012-03-02 21:27:16 -08001974#define MSM_CAM_V4L2_IOCTL_GET_CAMERA_INFO \
Kevin Chan41a38702012-06-06 22:25:41 -07001975 _IOWR('V', BASE_VIDIOC_PRIVATE + 1, struct msm_camera_v4l2_ioctl_t)
Kevin Chan94b4c832012-03-02 21:27:16 -08001976
1977#define MSM_CAM_V4L2_IOCTL_GET_CONFIG_INFO \
Kevin Chan41a38702012-06-06 22:25:41 -07001978 _IOWR('V', BASE_VIDIOC_PRIVATE + 2, struct msm_camera_v4l2_ioctl_t)
Kevin Chan94b4c832012-03-02 21:27:16 -08001979
1980#define MSM_CAM_V4L2_IOCTL_GET_MCTL_INFO \
Kevin Chan41a38702012-06-06 22:25:41 -07001981 _IOWR('V', BASE_VIDIOC_PRIVATE + 3, struct msm_camera_v4l2_ioctl_t)
Kevin Chan94b4c832012-03-02 21:27:16 -08001982
1983#define MSM_CAM_V4L2_IOCTL_CTRL_CMD_DONE \
Kevin Chan41a38702012-06-06 22:25:41 -07001984 _IOWR('V', BASE_VIDIOC_PRIVATE + 4, struct msm_camera_v4l2_ioctl_t)
Kevin Chan94b4c832012-03-02 21:27:16 -08001985
1986#define MSM_CAM_V4L2_IOCTL_GET_EVENT_PAYLOAD \
Kevin Chan41a38702012-06-06 22:25:41 -07001987 _IOWR('V', BASE_VIDIOC_PRIVATE + 5, struct msm_camera_v4l2_ioctl_t)
Kevin Chan94b4c832012-03-02 21:27:16 -08001988
Sunid Wilson4584b5f2012-04-13 12:48:25 -07001989#define MSM_CAM_IOCTL_SEND_EVENT \
1990 _IOWR('V', BASE_VIDIOC_PRIVATE + 6, struct v4l2_event)
1991
Kiran Kumar H N64bd23c2012-05-25 12:06:21 -07001992#define MSM_CAM_V4L2_IOCTL_CFG_VPE \
1993 _IOWR('V', BASE_VIDIOC_PRIVATE + 7, struct msm_vpe_cfg_cmd)
1994
Kevin Chan41a38702012-06-06 22:25:41 -07001995#define MSM_CAM_V4L2_IOCTL_PRIVATE_S_CTRL \
1996 _IOWR('V', BASE_VIDIOC_PRIVATE + 8, struct msm_camera_v4l2_ioctl_t)
1997
Kiran Kumar H N90785902012-07-05 13:59:38 -07001998#define MSM_CAM_V4L2_IOCTL_PRIVATE_G_CTRL \
1999 _IOWR('V', BASE_VIDIOC_PRIVATE + 9, struct msm_camera_v4l2_ioctl_t)
2000
Ankit Premrajka8c9bf5d2012-08-07 15:45:31 -07002001#define MSM_CAM_V4L2_IOCTL_PRIVATE_GENERAL \
2002 _IOW('V', BASE_VIDIOC_PRIVATE + 10, struct msm_camera_v4l2_ioctl_t)
2003
Ankit Premrajka4b3443f2012-06-11 14:06:31 -07002004#define VIDIOC_MSM_VPE_INIT \
2005 _IO('V', BASE_VIDIOC_PRIVATE + 15)
2006
2007#define VIDIOC_MSM_VPE_RELEASE \
2008 _IO('V', BASE_VIDIOC_PRIVATE + 16)
2009
2010#define VIDIOC_MSM_VPE_CFG \
2011 _IOWR('V', BASE_VIDIOC_PRIVATE + 17, struct msm_mctl_pp_params *)
2012
2013#define VIDIOC_MSM_AXI_INIT \
2014 _IO('V', BASE_VIDIOC_PRIVATE + 18)
2015
2016#define VIDIOC_MSM_AXI_RELEASE \
2017 _IO('V', BASE_VIDIOC_PRIVATE + 19)
2018
2019#define VIDIOC_MSM_AXI_CFG \
2020 _IOWR('V', BASE_VIDIOC_PRIVATE + 20, void *)
2021
2022#define VIDIOC_MSM_AXI_IRQ \
2023 _IOWR('V', BASE_VIDIOC_PRIVATE + 21, void *)
2024
2025#define VIDIOC_MSM_AXI_BUF_CFG \
2026 _IOWR('V', BASE_VIDIOC_PRIVATE + 22, void *)
2027
Ankit Premrajka5d00d662012-07-30 09:42:26 -07002028#define VIDIOC_MSM_AXI_RDI_COUNT_UPDATE \
2029 _IOWR('V', BASE_VIDIOC_PRIVATE + 23, struct rdi_count_msg)
2030
Ankit Premrajka4b3443f2012-06-11 14:06:31 -07002031#define VIDIOC_MSM_VFE_INIT \
Ankit Premrajka5d00d662012-07-30 09:42:26 -07002032 _IO('V', BASE_VIDIOC_PRIVATE + 24)
Ankit Premrajka4b3443f2012-06-11 14:06:31 -07002033
2034#define VIDIOC_MSM_VFE_RELEASE \
Ankit Premrajka5d00d662012-07-30 09:42:26 -07002035 _IO('V', BASE_VIDIOC_PRIVATE + 25)
Ankit Premrajka4b3443f2012-06-11 14:06:31 -07002036
Kevin Chan94b4c832012-03-02 21:27:16 -08002037struct msm_camera_v4l2_ioctl_t {
Kevin Chan41a38702012-06-06 22:25:41 -07002038 uint32_t id;
Kevin Chan41a38702012-06-06 22:25:41 -07002039 uint32_t len;
Ankit Premrajka8c9bf5d2012-08-07 15:45:31 -07002040 uint32_t trans_code;
2041 void __user *ioctl_ptr;
Kevin Chan94b4c832012-03-02 21:27:16 -08002042};
2043
Lakshmi Narayana Kalavalacd3d81e2012-07-31 13:04:03 -07002044struct msm_camera_vfe_params_t {
2045 uint32_t operation_mode;
2046 uint32_t capture_count;
2047 uint32_t skip_abort;
Nishant Panditd7785712012-07-31 19:09:11 +05302048 uint8_t stop_immediately;
Lakshmi Narayana Kalavalacd3d81e2012-07-31 13:04:03 -07002049 uint16_t port_info;
Lakshmi Narayana Kalavala3e8a1d12012-07-31 15:00:09 -07002050 uint32_t inst_handle;
Lakshmi Narayana Kalavalacd3d81e2012-07-31 13:04:03 -07002051 uint16_t cmd_type;
2052};
2053
Kiran Kumar H Nb4a278e2012-06-18 19:25:47 -07002054enum msm_camss_irq_idx {
2055 CAMERA_SS_IRQ_0,
2056 CAMERA_SS_IRQ_1,
2057 CAMERA_SS_IRQ_2,
2058 CAMERA_SS_IRQ_3,
2059 CAMERA_SS_IRQ_4,
2060 CAMERA_SS_IRQ_5,
2061 CAMERA_SS_IRQ_6,
2062 CAMERA_SS_IRQ_7,
2063 CAMERA_SS_IRQ_8,
2064 CAMERA_SS_IRQ_9,
2065 CAMERA_SS_IRQ_10,
2066 CAMERA_SS_IRQ_11,
2067 CAMERA_SS_IRQ_12,
2068 CAMERA_SS_IRQ_MAX
2069};
2070
2071enum msm_cam_hw_idx {
2072 MSM_CAM_HW_MICRO,
2073 MSM_CAM_HW_CCI,
2074 MSM_CAM_HW_CSI0,
2075 MSM_CAM_HW_CSI1,
2076 MSM_CAM_HW_CSI2,
2077 MSM_CAM_HW_CSI3,
2078 MSM_CAM_HW_ISPIF,
2079 MSM_CAM_HW_CPP,
2080 MSM_CAM_HW_VFE0,
2081 MSM_CAM_HW_VFE1,
2082 MSM_CAM_HW_JPEG0,
2083 MSM_CAM_HW_JPEG1,
2084 MSM_CAM_HW_JPEG2,
2085 MSM_CAM_HW_MAX
2086};
2087
2088struct msm_camera_irq_cfg {
2089 /* Bit mask of all the camera hardwares that needs to
2090 * be composited into a single IRQ to the MSM.
2091 * Current usage: (may be updated based on hw changes)
2092 * Bits 31:13 - Reserved.
2093 * Bits 12:0
2094 * 12 - MSM_CAM_HW_JPEG2
2095 * 11 - MSM_CAM_HW_JPEG1
2096 * 10 - MSM_CAM_HW_JPEG0
2097 * 9 - MSM_CAM_HW_VFE1
2098 * 8 - MSM_CAM_HW_VFE0
2099 * 7 - MSM_CAM_HW_CPP
2100 * 6 - MSM_CAM_HW_ISPIF
2101 * 5 - MSM_CAM_HW_CSI3
2102 * 4 - MSM_CAM_HW_CSI2
2103 * 3 - MSM_CAM_HW_CSI1
2104 * 2 - MSM_CAM_HW_CSI0
2105 * 1 - MSM_CAM_HW_CCI
2106 * 0 - MSM_CAM_HW_MICRO
2107 */
2108 uint32_t cam_hw_mask;
2109 uint8_t irq_idx;
2110 uint8_t num_hwcore;
2111};
2112
2113#define MSM_IRQROUTER_CFG_COMPIRQ \
2114 _IOWR('V', BASE_VIDIOC_PRIVATE, void __user *)
2115
Kevin Chan73ec7282012-06-07 01:32:00 -07002116#define MAX_NUM_CPP_STRIPS 8
2117
2118enum msm_cpp_frame_type {
2119 MSM_CPP_OFFLINE_FRAME,
2120 MSM_CPP_REALTIME_FRAME,
2121};
2122
2123struct msm_cpp_frame_strip_info {
2124 int scale_v_en;
2125 int scale_h_en;
2126
2127 int upscale_v_en;
2128 int upscale_h_en;
2129
2130 int src_start_x;
2131 int src_end_x;
2132 int src_start_y;
2133 int src_end_y;
2134
2135 /* Padding is required for upscaler because it does not
2136 * pad internally like other blocks, also needed for rotation
2137 * rotation expects all the blocks in the stripe to be the same size
2138 * Padding is done such that all the extra padded pixels
2139 * are on the right and bottom
2140 */
2141 int pad_bottom;
2142 int pad_top;
2143 int pad_right;
2144 int pad_left;
2145
2146 int v_init_phase;
2147 int h_init_phase;
2148 int h_phase_step;
2149 int v_phase_step;
2150
2151 int prescale_crop_width_first_pixel;
2152 int prescale_crop_width_last_pixel;
2153 int prescale_crop_height_first_line;
2154 int prescale_crop_height_last_line;
2155
2156 int postscale_crop_height_first_line;
2157 int postscale_crop_height_last_line;
2158 int postscale_crop_width_first_pixel;
2159 int postscale_crop_width_last_pixel;
2160
2161 int dst_start_x;
2162 int dst_end_x;
2163 int dst_start_y;
2164 int dst_end_y;
2165
2166 int bytes_per_pixel;
2167 unsigned int source_address;
2168 unsigned int destination_address;
2169 unsigned int src_stride;
2170 unsigned int dst_stride;
2171 int rotate_270;
2172 int horizontal_flip;
2173 int vertical_flip;
2174 int scale_output_width;
2175 int scale_output_height;
2176};
2177
2178struct msm_cpp_frame_info_t {
2179 int32_t frame_id;
2180 uint32_t inst_id;
2181 uint32_t client_id;
2182 enum msm_cpp_frame_type frame_type;
2183 uint32_t num_strips;
2184 struct msm_cpp_frame_strip_info *strip_info;
2185};
2186
Lakshmi Narayana Kalavalabc315ea2012-07-24 09:55:48 -07002187struct msm_ver_num_info {
2188 uint32_t main;
2189 uint32_t minor;
2190 uint32_t rev;
2191};
2192
Kevin Chan73ec7282012-06-07 01:32:00 -07002193#define VIDIOC_MSM_CPP_CFG \
2194 _IOWR('V', BASE_VIDIOC_PRIVATE, struct msm_camera_v4l2_ioctl_t)
2195
2196#define VIDIOC_MSM_CPP_GET_EVENTPAYLOAD \
2197 _IOWR('V', BASE_VIDIOC_PRIVATE + 1, struct msm_camera_v4l2_ioctl_t)
2198
2199#define VIDIOC_MSM_CPP_GET_INST_INFO \
2200 _IOWR('V', BASE_VIDIOC_PRIVATE + 2, struct msm_camera_v4l2_ioctl_t)
2201
2202#define V4L2_EVENT_CPP_FRAME_DONE (V4L2_EVENT_PRIVATE_START + 0)
2203
Kiran Kumar H N90785902012-07-05 13:59:38 -07002204/* Instance Handle - inst_handle
2205 * Data bundle containing the information about where
2206 * to get a buffer for a particular camera instance.
2207 * This is a bitmask containing the following data:
2208 * Buffer Handle Bitmask:
2209 * ------------------------------------
2210 * Bits : Purpose
2211 * ------------------------------------
Mingcheng Zhu86ec84f2012-09-08 21:20:51 -07002212 * 31 : is Dev ID valid?
2213 * 30 - 24 : Dev ID.
Kiran Kumar H N90785902012-07-05 13:59:38 -07002214 * 23 : is Image mode valid?
2215 * 22 - 16 : Image mode.
2216 * 15 : is MCTL PP inst idx valid?
2217 * 14 - 8 : MCTL PP inst idx.
2218 * 7 : is Video inst idx valid?
2219 * 6 - 0 : Video inst idx.
2220 */
Mingcheng Zhu86ec84f2012-09-08 21:20:51 -07002221#define CLR_DEVID_MODE(handle) (handle &= 0x00FFFFFF)
2222#define SET_DEVID_MODE(handle, data) \
2223 (handle |= ((0x1 << 31) | ((data & 0x7F) << 24)))
2224#define GET_DEVID_MODE(handle) \
2225 ((handle & 0x80000000) ? ((handle & 0x7F000000) >> 24) : 0xFF)
2226
Kiran Kumar H N90785902012-07-05 13:59:38 -07002227#define CLR_IMG_MODE(handle) (handle &= 0xFF00FFFF)
2228#define SET_IMG_MODE(handle, data) \
2229 (handle |= ((0x1 << 23) | ((data & 0x7F) << 16)))
2230#define GET_IMG_MODE(handle) \
2231 ((handle & 0x800000) ? ((handle & 0x7F0000) >> 16) : 0xFF)
2232
2233#define CLR_MCTLPP_INST_IDX(handle) (handle &= 0xFFFF00FF)
2234#define SET_MCTLPP_INST_IDX(handle, data) \
2235 (handle |= ((0x1 << 15) | ((data & 0x7F) << 8)))
2236#define GET_MCTLPP_INST_IDX(handle) \
2237 ((handle & 0x8000) ? ((handle & 0x7F00) >> 8) : 0xFF)
2238
2239#define CLR_VIDEO_INST_IDX(handle) (handle &= 0xFFFFFF00)
2240#define GET_VIDEO_INST_IDX(handle) \
2241 ((handle & 0x80) ? (handle & 0x7F) : 0xFF)
2242#define SET_VIDEO_INST_IDX(handle, data) \
2243 (handle |= (0x1 << 7) | (data & 0x7F))
2244
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002245#endif /* __LINUX_MSM_CAMERA_H */