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gerrit-public.fairphone.software / kernel / msm / a7776ec625c8ca90d050953946a5b72eaf41c21c / . / arch / arm / boot / dts / at91sam9g45.dtsi
blob: 587a1913c062a9d44ac71623918cc5bcc1211997 [file] [log] [blame]
Nicolas Ferre49fe2ba2011-10-10 18:29:24 +0200[diff] [blame]1/*
2 * at91sam9g45.dtsi - Device Tree Include file for AT91SAM9G45 family SoC
3 * applies to AT91SAM9G45, AT91SAM9M10,
4 * AT91SAM9G46, AT91SAM9M11 SoC
5 *
6 * Copyright (C) 2011 Atmel,
7 * 2011 Nicolas Ferre <nicolas.ferre@atmel.com>
8 *
9 * Licensed under GPLv2 or later.
10 */
11
12/include/ "skeleton.dtsi"
13
14/ {
15 model = "Atmel AT91SAM9G45 family SoC";
16 compatible = "atmel,at91sam9g45";
17 interrupt-parent = <&aic>;
18
19 aliases {
20 serial0 = &dbgu;
21 serial1 = &usart0;
22 serial2 = &usart1;
23 serial3 = &usart2;
24 serial4 = &usart3;
Nicolas Ferre21f81872012-02-11 15:41:40 +0100[diff] [blame]25 gpio0 = &pioA;
26 gpio1 = &pioB;
27 gpio2 = &pioC;
28 gpio3 = &pioD;
29 gpio4 = &pioE;
Nicolas Ferre3a61a5d2012-01-19 10:13:40 +0100[diff] [blame]30 tcb0 = &tcb0;
31 tcb1 = &tcb1;
Nicolas Ferre49fe2ba2011-10-10 18:29:24 +0200[diff] [blame]32 };
33 cpus {
34 cpu@0 {
35 compatible = "arm,arm926ejs";
36 };
37 };
38
39 memory@70000000 {
40 reg = <0x70000000 0x10000000>;
41 };
42
43 ahb {
44 compatible = "simple-bus";
45 #address-cells = <1>;
46 #size-cells = <1>;
47 ranges;
48
49 apb {
50 compatible = "simple-bus";
51 #address-cells = <1>;
52 #size-cells = <1>;
53 ranges;
54
55 aic: interrupt-controller@fffff000 {
Nicolas Ferree2615012011-11-22 22:26:09 +0100[diff] [blame]56 #interrupt-cells = <2>;
Nicolas Ferre49fe2ba2011-10-10 18:29:24 +0200[diff] [blame]57 compatible = "atmel,at91rm9200-aic";
58 interrupt-controller;
59 interrupt-parent;
60 reg = <0xfffff000 0x200>;
61 };
62
Jean-Christophe PLAGNIOL-VILLARDa7776ec2012-03-02 20:54:37 +0800[diff] [blame^]63 ramc0: ramc@ffffe400 {
64 compatible = "atmel,at91sam9g45-ddramc";
65 reg = <0xffffe400 0x200
66 0xffffe600 0x200>;
67 };
68
Jean-Christophe PLAGNIOL-VILLARDeb5e76f2012-03-02 20:44:23 +0800[diff] [blame]69 pmc: pmc@fffffc00 {
70 compatible = "atmel,at91rm9200-pmc";
71 reg = <0xfffffc00 0x100>;
72 };
73
Jean-Christophe PLAGNIOL-VILLARDc8082d32012-03-03 03:16:27 +0800[diff] [blame]74 rstc@fffffd00 {
75 compatible = "atmel,at91sam9g45-rstc";
76 reg = <0xfffffd00 0x10>;
77 };
78
Jean-Christophe PLAGNIOL-VILLARD23fa6482012-02-27 11:19:34 +0100[diff] [blame]79 pit: timer@fffffd30 {
80 compatible = "atmel,at91sam9260-pit";
81 reg = <0xfffffd30 0xf>;
82 interrupts = <1 4>;
83 };
84
Nicolas Ferre3a61a5d2012-01-19 10:13:40 +0100[diff] [blame]85
86 tcb0: timer@fff7c000 {
87 compatible = "atmel,at91rm9200-tcb";
88 reg = <0xfff7c000 0x100>;
89 interrupts = <18 4>;
90 };
91
92 tcb1: timer@fffd4000 {
93 compatible = "atmel,at91rm9200-tcb";
94 reg = <0xfffd4000 0x100>;
95 interrupts = <18 4>;
96 };
97
Nicolas Ferre49fe2ba2011-10-10 18:29:24 +0200[diff] [blame]98 dma: dma-controller@ffffec00 {
99 compatible = "atmel,at91sam9g45-dma";
100 reg = <0xffffec00 0x200>;
Nicolas Ferree2615012011-11-22 22:26:09 +0100[diff] [blame]101 interrupts = <21 4>;
Nicolas Ferre49fe2ba2011-10-10 18:29:24 +0200[diff] [blame]102 };
103
Nicolas Ferre21f81872012-02-11 15:41:40 +0100[diff] [blame]104 pioA: gpio@fffff200 {
105 compatible = "atmel,at91rm9200-gpio";
106 reg = <0xfffff200 0x100>;
107 interrupts = <2 4>;
108 #gpio-cells = <2>;
109 gpio-controller;
110 interrupt-controller;
111 };
112
113 pioB: gpio@fffff400 {
114 compatible = "atmel,at91rm9200-gpio";
115 reg = <0xfffff400 0x100>;
116 interrupts = <3 4>;
117 #gpio-cells = <2>;
118 gpio-controller;
119 interrupt-controller;
120 };
121
122 pioC: gpio@fffff600 {
123 compatible = "atmel,at91rm9200-gpio";
124 reg = <0xfffff600 0x100>;
125 interrupts = <4 4>;
126 #gpio-cells = <2>;
127 gpio-controller;
128 interrupt-controller;
129 };
130
131 pioD: gpio@fffff800 {
132 compatible = "atmel,at91rm9200-gpio";
133 reg = <0xfffff800 0x100>;
134 interrupts = <5 4>;
135 #gpio-cells = <2>;
136 gpio-controller;
137 interrupt-controller;
138 };
139
140 pioE: gpio@fffffa00 {
141 compatible = "atmel,at91rm9200-gpio";
142 reg = <0xfffffa00 0x100>;
143 interrupts = <5 4>;
144 #gpio-cells = <2>;
145 gpio-controller;
146 interrupt-controller;
147 };
148
Nicolas Ferre49fe2ba2011-10-10 18:29:24 +0200[diff] [blame]149 dbgu: serial@ffffee00 {
150 compatible = "atmel,at91sam9260-usart";
151 reg = <0xffffee00 0x200>;
Nicolas Ferree2615012011-11-22 22:26:09 +0100[diff] [blame]152 interrupts = <1 4>;
Nicolas Ferre49fe2ba2011-10-10 18:29:24 +0200[diff] [blame]153 status = "disabled";
154 };
155
156 usart0: serial@fff8c000 {
157 compatible = "atmel,at91sam9260-usart";
158 reg = <0xfff8c000 0x200>;
Nicolas Ferree2615012011-11-22 22:26:09 +0100[diff] [blame]159 interrupts = <7 4>;
Nicolas Ferre49fe2ba2011-10-10 18:29:24 +0200[diff] [blame]160 atmel,use-dma-rx;
161 atmel,use-dma-tx;
162 status = "disabled";
163 };
164
165 usart1: serial@fff90000 {
166 compatible = "atmel,at91sam9260-usart";
167 reg = <0xfff90000 0x200>;
Nicolas Ferree2615012011-11-22 22:26:09 +0100[diff] [blame]168 interrupts = <8 4>;
Nicolas Ferre49fe2ba2011-10-10 18:29:24 +0200[diff] [blame]169 atmel,use-dma-rx;
170 atmel,use-dma-tx;
171 status = "disabled";
172 };
173
174 usart2: serial@fff94000 {
175 compatible = "atmel,at91sam9260-usart";
176 reg = <0xfff94000 0x200>;
Nicolas Ferree2615012011-11-22 22:26:09 +0100[diff] [blame]177 interrupts = <9 4>;
Nicolas Ferre49fe2ba2011-10-10 18:29:24 +0200[diff] [blame]178 atmel,use-dma-rx;
179 atmel,use-dma-tx;
180 status = "disabled";
181 };
182
183 usart3: serial@fff98000 {
184 compatible = "atmel,at91sam9260-usart";
185 reg = <0xfff98000 0x200>;
Nicolas Ferree2615012011-11-22 22:26:09 +0100[diff] [blame]186 interrupts = <10 4>;
Nicolas Ferre49fe2ba2011-10-10 18:29:24 +0200[diff] [blame]187 atmel,use-dma-rx;
188 atmel,use-dma-tx;
189 status = "disabled";
190 };
Nicolas Ferre0d4f99d2011-12-05 18:03:05 +0100[diff] [blame]191
192 macb0: ethernet@fffbc000 {
193 compatible = "cdns,at32ap7000-macb", "cdns,macb";
194 reg = <0xfffbc000 0x100>;
Nicolas Ferree2615012011-11-22 22:26:09 +0100[diff] [blame]195 interrupts = <25 4>;
Nicolas Ferre0d4f99d2011-12-05 18:03:05 +0100[diff] [blame]196 status = "disabled";
197 };
Nicolas Ferre49fe2ba2011-10-10 18:29:24 +0200[diff] [blame]198 };
Jean-Christophe PLAGNIOL-VILLARDd6a01662012-01-26 02:11:06 +0800[diff] [blame]199
200 nand0: nand@40000000 {
201 compatible = "atmel,at91rm9200-nand";
202 #address-cells = <1>;
203 #size-cells = <1>;
204 reg = <0x40000000 0x10000000
205 0xffffe200 0x200
206 >;
207 atmel,nand-addr-offset = <21>;
208 atmel,nand-cmd-offset = <22>;
209 gpios = <&pioC 8 0
210 &pioC 14 0
211 0
212 >;
213 status = "disabled";
214 };
Nicolas Ferre49fe2ba2011-10-10 18:29:24 +0200[diff] [blame]215 };
Jean-Christophe PLAGNIOL-VILLARD8f24bda2012-02-05 18:32:37 +0800[diff] [blame]216
217 i2c@0 {
218 compatible = "i2c-gpio";
219 gpios = <&pioA 20 0 /* sda */
220 &pioA 21 0 /* scl */
221 >;
222 i2c-gpio,sda-open-drain;
223 i2c-gpio,scl-open-drain;
224 i2c-gpio,delay-us = <5>; /* ~100 kHz */
225 #address-cells = <1>;
226 #size-cells = <0>;
227 status = "disabled";
228 };
Nicolas Ferre49fe2ba2011-10-10 18:29:24 +0200[diff] [blame]229};