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Linus Torvalds1da177e2005-04-16 15:20:36 -07001/*
2 * drivers/mtd/nand/edb7312.c
3 *
David Woodhouse151e7652006-05-14 01:51:54 +01004 * Copyright (C) 2002 Marius Gröger (mag@sysgo.de)
Linus Torvalds1da177e2005-04-16 15:20:36 -07005 *
6 * Derived from drivers/mtd/nand/autcpu12.c
7 * Copyright (c) 2001 Thomas Gleixner (gleixner@autronix.de)
8 *
Linus Torvalds1da177e2005-04-16 15:20:36 -07009 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
12 *
13 * Overview:
14 * This is a device driver for the NAND flash device found on the
15 * CLEP7312 board which utilizes the Toshiba TC58V64AFT part. This is
16 * a 64Mibit (8MiB x 8 bits) NAND flash device.
17 */
18
19#include <linux/slab.h>
20#include <linux/module.h>
21#include <linux/init.h>
22#include <linux/mtd/mtd.h>
23#include <linux/mtd/nand.h>
24#include <linux/mtd/partitions.h>
25#include <asm/io.h>
Russell Kinga09e64f2008-08-05 16:14:15 +010026#include <mach/hardware.h> /* for CLPS7111_VIRT_BASE */
Linus Torvalds1da177e2005-04-16 15:20:36 -070027#include <asm/sizes.h>
28#include <asm/hardware/clps7111.h>
29
30/*
31 * MTD structure for EDB7312 board
32 */
33static struct mtd_info *ep7312_mtd = NULL;
34
35/*
36 * Values specific to the EDB7312 board (used with EP7312 processor)
37 */
38#define EP7312_FIO_PBASE 0x10000000 /* Phys address of flash */
39#define EP7312_PXDR 0x0001 /*
40 * IO offset to Port B data register
41 * where the CLE, ALE and NCE pins
42 * are wired to.
43 */
44#define EP7312_PXDDR 0x0041 /*
45 * IO offset to Port B data direction
46 * register so we can control the IO
47 * lines.
48 */
49
50/*
51 * Module stuff
52 */
53
54static unsigned long ep7312_fio_pbase = EP7312_FIO_PBASE;
David Woodhousee0c7d762006-05-13 18:07:53 +010055static void __iomem *ep7312_pxdr = (void __iomem *)EP7312_PXDR;
56static void __iomem *ep7312_pxddr = (void __iomem *)EP7312_PXDDR;
Linus Torvalds1da177e2005-04-16 15:20:36 -070057
58#ifdef CONFIG_MTD_PARTITIONS
59/*
60 * Define static partitions for flash device
61 */
62static struct mtd_partition partition_info[] = {
David Woodhousee0c7d762006-05-13 18:07:53 +010063 {.name = "EP7312 Nand Flash",
64 .offset = 0,
65 .size = 8 * 1024 * 1024}
Linus Torvalds1da177e2005-04-16 15:20:36 -070066};
David Woodhousee0c7d762006-05-13 18:07:53 +010067
Linus Torvalds1da177e2005-04-16 15:20:36 -070068#define NUM_PARTITIONS 1
69
70#endif
71
Thomas Gleixner61b03bd2005-11-07 11:15:49 +000072/*
Linus Torvalds1da177e2005-04-16 15:20:36 -070073 * hardware specific access to control-lines
Thomas Gleixner7abd3ef2006-05-23 23:25:53 +020074 *
Roland Stigge9d7b4b52007-07-18 14:56:11 +020075 * NAND_NCE: bit 0 -> bit 6 (bit 7 = 1)
Thomas Gleixner7abd3ef2006-05-23 23:25:53 +020076 * NAND_CLE: bit 1 -> bit 4
77 * NAND_ALE: bit 2 -> bit 5
Linus Torvalds1da177e2005-04-16 15:20:36 -070078 */
Thomas Gleixner7abd3ef2006-05-23 23:25:53 +020079static void ep7312_hwcontrol(struct mtd_info *mtd, int cmd, unsigned int ctrl)
Linus Torvalds1da177e2005-04-16 15:20:36 -070080{
Thomas Gleixner7abd3ef2006-05-23 23:25:53 +020081 struct nand_chip *chip = mtd->priv;
Thomas Gleixner61b03bd2005-11-07 11:15:49 +000082
Thomas Gleixner7abd3ef2006-05-23 23:25:53 +020083 if (ctrl & NAND_CTRL_CHANGE) {
Roland Stigge9d7b4b52007-07-18 14:56:11 +020084 unsigned char bits = 0x80;
Thomas Gleixner61b03bd2005-11-07 11:15:49 +000085
Roland Stigge9d7b4b52007-07-18 14:56:11 +020086 bits |= (ctrl & (NAND_CLE | NAND_ALE)) << 3;
87 bits |= (ctrl & NAND_NCE) ? 0x00 : 0x40;
Thomas Gleixner61b03bd2005-11-07 11:15:49 +000088
Roland Stigge9d7b4b52007-07-18 14:56:11 +020089 clps_writeb((clps_readb(ep7312_pxdr) & 0xF0) | bits,
Thomas Gleixner7abd3ef2006-05-23 23:25:53 +020090 ep7312_pxdr);
Linus Torvalds1da177e2005-04-16 15:20:36 -070091 }
Thomas Gleixner7abd3ef2006-05-23 23:25:53 +020092 if (cmd != NAND_CMD_NONE)
93 writeb(cmd, chip->IO_ADDR_W);
Linus Torvalds1da177e2005-04-16 15:20:36 -070094}
95
96/*
97 * read device ready pin
98 */
99static int ep7312_device_ready(struct mtd_info *mtd)
100{
101 return 1;
102}
David Woodhousee0c7d762006-05-13 18:07:53 +0100103
Linus Torvalds1da177e2005-04-16 15:20:36 -0700104#ifdef CONFIG_MTD_PARTITIONS
105const char *part_probes[] = { "cmdlinepart", NULL };
106#endif
107
108/*
109 * Main initialization routine
110 */
David Woodhousee0c7d762006-05-13 18:07:53 +0100111static int __init ep7312_init(void)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700112{
113 struct nand_chip *this;
114 const char *part_type = 0;
115 int mtd_parts_nb = 0;
116 struct mtd_partition *mtd_parts = 0;
David Woodhousee0c7d762006-05-13 18:07:53 +0100117 void __iomem *ep7312_fio_base;
Thomas Gleixner61b03bd2005-11-07 11:15:49 +0000118
Linus Torvalds1da177e2005-04-16 15:20:36 -0700119 /* Allocate memory for MTD device structure and private data */
David Woodhousee0c7d762006-05-13 18:07:53 +0100120 ep7312_mtd = kmalloc(sizeof(struct mtd_info) + sizeof(struct nand_chip), GFP_KERNEL);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700121 if (!ep7312_mtd) {
122 printk("Unable to allocate EDB7312 NAND MTD device structure.\n");
123 return -ENOMEM;
124 }
Thomas Gleixner61b03bd2005-11-07 11:15:49 +0000125
Joe Perches8e87d782008-02-03 17:22:34 +0200126 /* map physical address */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700127 ep7312_fio_base = ioremap(ep7312_fio_pbase, SZ_1K);
David Woodhousee0c7d762006-05-13 18:07:53 +0100128 if (!ep7312_fio_base) {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700129 printk("ioremap EDB7312 NAND flash failed\n");
130 kfree(ep7312_mtd);
131 return -EIO;
132 }
Thomas Gleixner61b03bd2005-11-07 11:15:49 +0000133
Linus Torvalds1da177e2005-04-16 15:20:36 -0700134 /* Get pointer to private data */
David Woodhousee0c7d762006-05-13 18:07:53 +0100135 this = (struct nand_chip *)(&ep7312_mtd[1]);
Thomas Gleixner61b03bd2005-11-07 11:15:49 +0000136
Linus Torvalds1da177e2005-04-16 15:20:36 -0700137 /* Initialize structures */
David Woodhousee0c7d762006-05-13 18:07:53 +0100138 memset(ep7312_mtd, 0, sizeof(struct mtd_info));
139 memset(this, 0, sizeof(struct nand_chip));
Thomas Gleixner61b03bd2005-11-07 11:15:49 +0000140
Linus Torvalds1da177e2005-04-16 15:20:36 -0700141 /* Link the private data with the MTD structure */
142 ep7312_mtd->priv = this;
David Woodhouse552d9202006-05-14 01:20:46 +0100143 ep7312_mtd->owner = THIS_MODULE;
Thomas Gleixner61b03bd2005-11-07 11:15:49 +0000144
Linus Torvalds1da177e2005-04-16 15:20:36 -0700145 /*
146 * Set GPIO Port B control register so that the pins are configured
147 * to be outputs for controlling the NAND flash.
148 */
149 clps_writeb(0xf0, ep7312_pxddr);
Thomas Gleixner61b03bd2005-11-07 11:15:49 +0000150
Linus Torvalds1da177e2005-04-16 15:20:36 -0700151 /* insert callbacks */
152 this->IO_ADDR_R = ep7312_fio_base;
153 this->IO_ADDR_W = ep7312_fio_base;
Thomas Gleixner7abd3ef2006-05-23 23:25:53 +0200154 this->cmd_ctrl = ep7312_hwcontrol;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700155 this->dev_ready = ep7312_device_ready;
156 /* 15 us command delay time */
157 this->chip_delay = 15;
Thomas Gleixner61b03bd2005-11-07 11:15:49 +0000158
Linus Torvalds1da177e2005-04-16 15:20:36 -0700159 /* Scan to find existence of the device */
David Woodhousee0c7d762006-05-13 18:07:53 +0100160 if (nand_scan(ep7312_mtd, 1)) {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700161 iounmap((void *)ep7312_fio_base);
David Woodhousee0c7d762006-05-13 18:07:53 +0100162 kfree(ep7312_mtd);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700163 return -ENXIO;
164 }
Linus Torvalds1da177e2005-04-16 15:20:36 -0700165#ifdef CONFIG_MTD_PARTITIONS
166 ep7312_mtd->name = "edb7312-nand";
David Woodhousee0c7d762006-05-13 18:07:53 +0100167 mtd_parts_nb = parse_mtd_partitions(ep7312_mtd, part_probes, &mtd_parts, 0);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700168 if (mtd_parts_nb > 0)
169 part_type = "command line";
170 else
171 mtd_parts_nb = 0;
172#endif
173 if (mtd_parts_nb == 0) {
174 mtd_parts = partition_info;
175 mtd_parts_nb = NUM_PARTITIONS;
176 part_type = "static";
177 }
Thomas Gleixner61b03bd2005-11-07 11:15:49 +0000178
Linus Torvalds1da177e2005-04-16 15:20:36 -0700179 /* Register the partitions */
180 printk(KERN_NOTICE "Using %s partition definition\n", part_type);
181 add_mtd_partitions(ep7312_mtd, mtd_parts, mtd_parts_nb);
Thomas Gleixner61b03bd2005-11-07 11:15:49 +0000182
Linus Torvalds1da177e2005-04-16 15:20:36 -0700183 /* Return happy */
184 return 0;
185}
David Woodhousee0c7d762006-05-13 18:07:53 +0100186
Linus Torvalds1da177e2005-04-16 15:20:36 -0700187module_init(ep7312_init);
188
189/*
190 * Clean up routine
191 */
David Woodhousee0c7d762006-05-13 18:07:53 +0100192static void __exit ep7312_cleanup(void)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700193{
David Woodhousee0c7d762006-05-13 18:07:53 +0100194 struct nand_chip *this = (struct nand_chip *)&ep7312_mtd[1];
Thomas Gleixner61b03bd2005-11-07 11:15:49 +0000195
Linus Torvalds1da177e2005-04-16 15:20:36 -0700196 /* Release resources, unregister device */
David Woodhousee0c7d762006-05-13 18:07:53 +0100197 nand_release(ap7312_mtd);
Thomas Gleixner61b03bd2005-11-07 11:15:49 +0000198
Amol Lad25f0c652006-09-21 18:12:43 +0530199 /* Release io resource */
Amol Lad76a50272006-10-02 09:48:23 +0100200 iounmap(this->IO_ADDR_R);
Amol Lad25f0c652006-09-21 18:12:43 +0530201
Linus Torvalds1da177e2005-04-16 15:20:36 -0700202 /* Free the MTD device structure */
David Woodhousee0c7d762006-05-13 18:07:53 +0100203 kfree(ep7312_mtd);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700204}
David Woodhousee0c7d762006-05-13 18:07:53 +0100205
Linus Torvalds1da177e2005-04-16 15:20:36 -0700206module_exit(ep7312_cleanup);
207
208MODULE_LICENSE("GPL");
209MODULE_AUTHOR("Marius Groeger <mag@sysgo.de>");
210MODULE_DESCRIPTION("MTD map driver for Cogent EDB7312 board");