Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (C) 2008 Google, Inc. |
| 3 | * Copyright (c) 2008-2011, Code Aurora Forum. All rights reserved. |
| 4 | * |
| 5 | * This software is licensed under the terms of the GNU General Public |
| 6 | * License version 2, as published by the Free Software Foundation, and |
| 7 | * may be copied, distributed, and modified under those terms. |
| 8 | * |
| 9 | * This program is distributed in the hope that it will be useful, |
| 10 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 11 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 12 | * GNU General Public License for more details. |
| 13 | * |
| 14 | */ |
| 15 | |
| 16 | #include <linux/kernel.h> |
| 17 | #include <linux/platform_device.h> |
| 18 | |
| 19 | #include <linux/dma-mapping.h> |
| 20 | #include <asm/clkdev.h> |
| 21 | #include <mach/irqs.h> |
| 22 | #include <mach/msm_iomap.h> |
| 23 | #include <mach/dma.h> |
| 24 | #include <mach/board.h> |
| 25 | |
| 26 | #include "devices.h" |
| 27 | #include "smd_private.h" |
| 28 | |
| 29 | #include <asm/mach/flash.h> |
| 30 | |
| 31 | #include <asm/mach/mmc.h> |
| 32 | #include <mach/msm_hsusb.h> |
| 33 | #include <mach/usbdiag.h> |
| 34 | #include <mach/usb_gadget_fserial.h> |
| 35 | #include <mach/rpc_hsusb.h> |
| 36 | |
| 37 | #include "clock-pcom.h" |
| 38 | |
| 39 | static struct resource resources_uart1[] = { |
| 40 | { |
| 41 | .start = INT_UART1, |
| 42 | .end = INT_UART1, |
| 43 | .flags = IORESOURCE_IRQ, |
| 44 | }, |
| 45 | { |
| 46 | .start = MSM_UART1_PHYS, |
| 47 | .end = MSM_UART1_PHYS + MSM_UART1_SIZE - 1, |
| 48 | .flags = IORESOURCE_MEM, |
| 49 | }, |
| 50 | }; |
| 51 | |
| 52 | static struct resource resources_uart2[] = { |
| 53 | { |
| 54 | .start = INT_UART2, |
| 55 | .end = INT_UART2, |
| 56 | .flags = IORESOURCE_IRQ, |
| 57 | }, |
| 58 | { |
| 59 | .start = MSM_UART2_PHYS, |
| 60 | .end = MSM_UART2_PHYS + MSM_UART2_SIZE - 1, |
| 61 | .flags = IORESOURCE_MEM, |
| 62 | }, |
| 63 | }; |
| 64 | |
| 65 | static struct resource resources_uart3[] = { |
| 66 | { |
| 67 | .start = INT_UART3, |
| 68 | .end = INT_UART3, |
| 69 | .flags = IORESOURCE_IRQ, |
| 70 | }, |
| 71 | { |
| 72 | .start = MSM_UART3_PHYS, |
| 73 | .end = MSM_UART3_PHYS + MSM_UART3_SIZE - 1, |
| 74 | .flags = IORESOURCE_MEM, |
| 75 | }, |
| 76 | }; |
| 77 | |
| 78 | struct platform_device msm_device_uart1 = { |
| 79 | .name = "msm_serial", |
| 80 | .id = 0, |
| 81 | .num_resources = ARRAY_SIZE(resources_uart1), |
| 82 | .resource = resources_uart1, |
| 83 | }; |
| 84 | |
| 85 | struct platform_device msm_device_uart2 = { |
| 86 | .name = "msm_serial", |
| 87 | .id = 1, |
| 88 | .num_resources = ARRAY_SIZE(resources_uart2), |
| 89 | .resource = resources_uart2, |
| 90 | }; |
| 91 | |
| 92 | struct platform_device msm_device_uart3 = { |
| 93 | .name = "msm_serial", |
| 94 | .id = 2, |
| 95 | .num_resources = ARRAY_SIZE(resources_uart3), |
| 96 | .resource = resources_uart3, |
| 97 | }; |
| 98 | |
| 99 | #define MSM_UART1DM_PHYS 0xA0200000 |
| 100 | #define MSM_UART2DM_PHYS 0xA0300000 |
| 101 | static struct resource msm_uart1_dm_resources[] = { |
| 102 | { |
| 103 | .start = MSM_UART1DM_PHYS, |
| 104 | .end = MSM_UART1DM_PHYS + PAGE_SIZE - 1, |
| 105 | .flags = IORESOURCE_MEM, |
| 106 | }, |
| 107 | { |
| 108 | .start = INT_UART1DM_IRQ, |
| 109 | .end = INT_UART1DM_IRQ, |
| 110 | .flags = IORESOURCE_IRQ, |
| 111 | }, |
| 112 | { |
| 113 | .start = INT_UART1DM_RX, |
| 114 | .end = INT_UART1DM_RX, |
| 115 | .flags = IORESOURCE_IRQ, |
| 116 | }, |
| 117 | { |
| 118 | .start = DMOV_HSUART1_TX_CHAN, |
| 119 | .end = DMOV_HSUART1_RX_CHAN, |
| 120 | .name = "uartdm_channels", |
| 121 | .flags = IORESOURCE_DMA, |
| 122 | }, |
| 123 | { |
| 124 | .start = DMOV_HSUART1_TX_CRCI, |
| 125 | .end = DMOV_HSUART1_RX_CRCI, |
| 126 | .name = "uartdm_crci", |
| 127 | .flags = IORESOURCE_DMA, |
| 128 | }, |
| 129 | }; |
| 130 | |
| 131 | static u64 msm_uart_dm1_dma_mask = DMA_BIT_MASK(32); |
| 132 | |
| 133 | struct platform_device msm_device_uart_dm1 = { |
| 134 | .name = "msm_serial_hs", |
| 135 | .id = 0, |
| 136 | .num_resources = ARRAY_SIZE(msm_uart1_dm_resources), |
| 137 | .resource = msm_uart1_dm_resources, |
| 138 | .dev = { |
| 139 | .dma_mask = &msm_uart_dm1_dma_mask, |
| 140 | .coherent_dma_mask = DMA_BIT_MASK(32), |
| 141 | }, |
| 142 | }; |
| 143 | |
| 144 | static struct resource msm_uart2_dm_resources[] = { |
| 145 | { |
| 146 | .start = MSM_UART2DM_PHYS, |
| 147 | .end = MSM_UART2DM_PHYS + PAGE_SIZE - 1, |
| 148 | .flags = IORESOURCE_MEM, |
| 149 | }, |
| 150 | { |
| 151 | .start = INT_UART2DM_IRQ, |
| 152 | .end = INT_UART2DM_IRQ, |
| 153 | .flags = IORESOURCE_IRQ, |
| 154 | }, |
| 155 | { |
| 156 | .start = INT_UART2DM_RX, |
| 157 | .end = INT_UART2DM_RX, |
| 158 | .flags = IORESOURCE_IRQ, |
| 159 | }, |
| 160 | { |
| 161 | .start = DMOV_HSUART2_TX_CHAN, |
| 162 | .end = DMOV_HSUART2_RX_CHAN, |
| 163 | .name = "uartdm_channels", |
| 164 | .flags = IORESOURCE_DMA, |
| 165 | }, |
| 166 | { |
| 167 | .start = DMOV_HSUART2_TX_CRCI, |
| 168 | .end = DMOV_HSUART2_RX_CRCI, |
| 169 | .name = "uartdm_crci", |
| 170 | .flags = IORESOURCE_DMA, |
| 171 | }, |
| 172 | }; |
| 173 | |
| 174 | static u64 msm_uart_dm2_dma_mask = DMA_BIT_MASK(32); |
| 175 | |
| 176 | struct platform_device msm_device_uart_dm2 = { |
| 177 | .name = "msm_serial_hs", |
| 178 | .id = 1, |
| 179 | .num_resources = ARRAY_SIZE(msm_uart2_dm_resources), |
| 180 | .resource = msm_uart2_dm_resources, |
| 181 | .dev = { |
| 182 | .dma_mask = &msm_uart_dm2_dma_mask, |
| 183 | .coherent_dma_mask = DMA_BIT_MASK(32), |
| 184 | }, |
| 185 | }; |
| 186 | |
| 187 | #define MSM_I2C_SIZE SZ_4K |
| 188 | #define MSM_I2C_PHYS 0xA9900000 |
| 189 | static struct resource resources_i2c[] = { |
| 190 | { |
| 191 | .start = MSM_I2C_PHYS, |
| 192 | .end = MSM_I2C_PHYS + MSM_I2C_SIZE - 1, |
| 193 | .flags = IORESOURCE_MEM, |
| 194 | }, |
| 195 | { |
| 196 | .start = INT_PWB_I2C, |
| 197 | .end = INT_PWB_I2C, |
| 198 | .flags = IORESOURCE_IRQ, |
| 199 | }, |
| 200 | }; |
| 201 | |
| 202 | struct platform_device msm_device_i2c = { |
| 203 | .name = "msm_i2c", |
| 204 | .id = 0, |
| 205 | .num_resources = ARRAY_SIZE(resources_i2c), |
| 206 | .resource = resources_i2c, |
| 207 | }; |
| 208 | |
| 209 | #define MSM_HSUSB_PHYS 0xA0800000 |
| 210 | static struct resource resources_hsusb_otg[] = { |
| 211 | { |
| 212 | .start = MSM_HSUSB_PHYS, |
| 213 | .end = MSM_HSUSB_PHYS + SZ_1K - 1, |
| 214 | .flags = IORESOURCE_MEM, |
| 215 | }, |
| 216 | { |
| 217 | .start = INT_USB_HS, |
| 218 | .end = INT_USB_HS, |
| 219 | .flags = IORESOURCE_IRQ, |
| 220 | }, |
| 221 | }; |
| 222 | |
| 223 | static u64 dma_mask = 0xffffffffULL; |
| 224 | struct platform_device msm_device_hsusb_otg = { |
| 225 | .name = "msm_hsusb_otg", |
| 226 | .id = -1, |
| 227 | .num_resources = ARRAY_SIZE(resources_hsusb_otg), |
| 228 | .resource = resources_hsusb_otg, |
| 229 | .dev = { |
| 230 | .dma_mask = &dma_mask, |
| 231 | .coherent_dma_mask = 0xffffffffULL, |
| 232 | }, |
| 233 | }; |
| 234 | |
| 235 | static struct resource resources_hsusb_peripheral[] = { |
| 236 | { |
| 237 | .start = MSM_HSUSB_PHYS, |
| 238 | .end = MSM_HSUSB_PHYS + SZ_1K - 1, |
| 239 | .flags = IORESOURCE_MEM, |
| 240 | }, |
| 241 | { |
| 242 | .start = INT_USB_HS, |
| 243 | .end = INT_USB_HS, |
| 244 | .flags = IORESOURCE_IRQ, |
| 245 | }, |
| 246 | }; |
| 247 | |
| 248 | static struct resource resources_gadget_peripheral[] = { |
| 249 | { |
| 250 | .start = MSM_HSUSB_PHYS, |
| 251 | .end = MSM_HSUSB_PHYS + SZ_1K - 1, |
| 252 | .flags = IORESOURCE_MEM, |
| 253 | }, |
| 254 | { |
| 255 | .start = INT_USB_HS, |
| 256 | .end = INT_USB_HS, |
| 257 | .flags = IORESOURCE_IRQ, |
| 258 | }, |
| 259 | }; |
| 260 | |
| 261 | struct platform_device msm_device_hsusb_peripheral = { |
| 262 | .name = "msm_hsusb_peripheral", |
| 263 | .id = -1, |
| 264 | .num_resources = ARRAY_SIZE(resources_hsusb_peripheral), |
| 265 | .resource = resources_hsusb_peripheral, |
| 266 | .dev = { |
| 267 | .dma_mask = &dma_mask, |
| 268 | .coherent_dma_mask = 0xffffffffULL, |
| 269 | }, |
| 270 | }; |
| 271 | |
| 272 | struct platform_device msm_device_gadget_peripheral = { |
| 273 | .name = "msm_hsusb", |
| 274 | .id = -1, |
| 275 | .num_resources = ARRAY_SIZE(resources_gadget_peripheral), |
| 276 | .resource = resources_gadget_peripheral, |
| 277 | .dev = { |
| 278 | .dma_mask = &dma_mask, |
| 279 | .coherent_dma_mask = 0xffffffffULL, |
| 280 | }, |
| 281 | }; |
| 282 | |
| 283 | static struct resource resources_hsusb_host[] = { |
| 284 | { |
| 285 | .start = MSM_HSUSB_PHYS, |
| 286 | .end = MSM_HSUSB_PHYS + SZ_1K - 1, |
| 287 | .flags = IORESOURCE_MEM, |
| 288 | }, |
| 289 | { |
| 290 | .start = INT_USB_HS, |
| 291 | .end = INT_USB_HS, |
| 292 | .flags = IORESOURCE_IRQ, |
| 293 | }, |
| 294 | }; |
| 295 | |
| 296 | struct platform_device msm_device_hsusb_host = { |
| 297 | .name = "msm_hsusb_host", |
| 298 | .id = 0, |
| 299 | .num_resources = ARRAY_SIZE(resources_hsusb_host), |
| 300 | .resource = resources_hsusb_host, |
| 301 | .dev = { |
| 302 | .dma_mask = &dma_mask, |
| 303 | .coherent_dma_mask = 0xffffffffULL, |
| 304 | }, |
| 305 | }; |
| 306 | |
| 307 | static struct platform_device *msm_host_devices[] = { |
| 308 | &msm_device_hsusb_host, |
| 309 | }; |
| 310 | |
| 311 | int msm_add_host(unsigned int host, struct msm_usb_host_platform_data *plat) |
| 312 | { |
| 313 | struct platform_device *pdev; |
| 314 | |
| 315 | pdev = msm_host_devices[host]; |
| 316 | if (!pdev) |
| 317 | return -ENODEV; |
| 318 | pdev->dev.platform_data = plat; |
| 319 | return platform_device_register(pdev); |
| 320 | } |
| 321 | |
| 322 | #ifdef CONFIG_USB_ANDROID_DIAG |
| 323 | struct usb_diag_platform_data usb_diag_pdata = { |
| 324 | .ch_name = DIAG_LEGACY, |
| 325 | .update_pid_and_serial_num = usb_diag_update_pid_and_serial_num, |
| 326 | }; |
| 327 | |
| 328 | struct platform_device usb_diag_device = { |
| 329 | .name = "usb_diag", |
| 330 | .id = -1, |
| 331 | .dev = { |
| 332 | .platform_data = &usb_diag_pdata, |
| 333 | }, |
| 334 | }; |
| 335 | #endif |
| 336 | |
| 337 | #ifdef CONFIG_USB_F_SERIAL |
| 338 | static struct usb_gadget_fserial_platform_data fserial_pdata = { |
| 339 | .no_ports = 2, |
| 340 | }; |
| 341 | |
| 342 | struct platform_device usb_gadget_fserial_device = { |
| 343 | .name = "usb_fserial", |
| 344 | .id = -1, |
| 345 | .dev = { |
| 346 | .platform_data = &fserial_pdata, |
| 347 | }, |
| 348 | }; |
| 349 | #endif |
| 350 | |
| 351 | #define MSM_NAND_PHYS 0xA0A00000 |
| 352 | static struct resource resources_nand[] = { |
| 353 | [0] = { |
| 354 | .name = "msm_nand_dmac", |
| 355 | .start = DMOV_NAND_CHAN, |
| 356 | .end = DMOV_NAND_CHAN, |
| 357 | .flags = IORESOURCE_DMA, |
| 358 | }, |
| 359 | [1] = { |
| 360 | .name = "msm_nand_phys", |
| 361 | .start = MSM_NAND_PHYS, |
| 362 | .end = MSM_NAND_PHYS + 0x7FF, |
| 363 | .flags = IORESOURCE_MEM, |
| 364 | }, |
| 365 | }; |
| 366 | |
| 367 | static struct resource resources_otg[] = { |
| 368 | { |
| 369 | .start = MSM_HSUSB_PHYS, |
| 370 | .end = MSM_HSUSB_PHYS + SZ_1K - 1, |
| 371 | .flags = IORESOURCE_MEM, |
| 372 | }, |
| 373 | { |
| 374 | .start = INT_USB_HS, |
| 375 | .end = INT_USB_HS, |
| 376 | .flags = IORESOURCE_IRQ, |
| 377 | }, |
| 378 | }; |
| 379 | |
| 380 | struct platform_device msm_device_otg = { |
| 381 | .name = "msm_otg", |
| 382 | .id = -1, |
| 383 | .num_resources = ARRAY_SIZE(resources_otg), |
| 384 | .resource = resources_otg, |
| 385 | .dev = { |
| 386 | .coherent_dma_mask = 0xffffffffULL, |
| 387 | }, |
| 388 | }; |
| 389 | |
| 390 | struct flash_platform_data msm_nand_data = { |
| 391 | .parts = NULL, |
| 392 | .nr_parts = 0, |
| 393 | }; |
| 394 | |
| 395 | struct platform_device msm_device_nand = { |
| 396 | .name = "msm_nand", |
| 397 | .id = -1, |
| 398 | .num_resources = ARRAY_SIZE(resources_nand), |
| 399 | .resource = resources_nand, |
| 400 | .dev = { |
| 401 | .platform_data = &msm_nand_data, |
| 402 | }, |
| 403 | }; |
| 404 | |
| 405 | struct platform_device msm_device_smd = { |
| 406 | .name = "msm_smd", |
| 407 | .id = -1, |
| 408 | }; |
| 409 | |
Jeff Ohlstein | 905f1ce | 2011-09-07 18:50:18 -0700 | [diff] [blame] | 410 | static struct resource msm_dmov_resource[] = { |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 411 | { |
| 412 | .start = INT_ADM_AARM, |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 413 | .flags = IORESOURCE_IRQ, |
| 414 | }, |
Jeff Ohlstein | 905f1ce | 2011-09-07 18:50:18 -0700 | [diff] [blame] | 415 | { |
| 416 | .start = 0xA9700000, |
| 417 | .end = 0xA9700000 + SZ_4K - 1, |
| 418 | .flags = IORESOURCE_MEM, |
| 419 | }, |
| 420 | }; |
| 421 | |
| 422 | static struct msm_dmov_pdata msm_dmov_pdata = { |
| 423 | .sd = 3, |
| 424 | .sd_size = 0x400, |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 425 | }; |
| 426 | |
| 427 | struct platform_device msm_device_dmov = { |
| 428 | .name = "msm_dmov", |
| 429 | .id = -1, |
| 430 | .resource = msm_dmov_resource, |
| 431 | .num_resources = ARRAY_SIZE(msm_dmov_resource), |
Jeff Ohlstein | 905f1ce | 2011-09-07 18:50:18 -0700 | [diff] [blame] | 432 | .dev = { |
| 433 | .platform_data = &msm_dmov_pdata, |
| 434 | }, |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 435 | }; |
| 436 | |
| 437 | #define MSM_SDC1_BASE 0xA0400000 |
| 438 | #define MSM_SDC2_BASE 0xA0500000 |
| 439 | #define MSM_SDC3_BASE 0xA0600000 |
| 440 | #define MSM_SDC4_BASE 0xA0700000 |
| 441 | static struct resource resources_sdc1[] = { |
| 442 | { |
| 443 | .start = MSM_SDC1_BASE, |
| 444 | .end = MSM_SDC1_BASE + SZ_4K - 1, |
| 445 | .flags = IORESOURCE_MEM, |
| 446 | }, |
| 447 | { |
| 448 | .start = INT_SDC1_0, |
| 449 | .end = INT_SDC1_1, |
| 450 | .flags = IORESOURCE_IRQ, |
| 451 | }, |
| 452 | { |
Krishna Konda | 25786ec | 2011-07-25 16:21:36 -0700 | [diff] [blame] | 453 | .name = "sdcc_dma_chnl", |
| 454 | .start = DMOV_SDC1_CHAN, |
| 455 | .end = DMOV_SDC1_CHAN, |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 456 | .flags = IORESOURCE_DMA, |
| 457 | }, |
Krishna Konda | 25786ec | 2011-07-25 16:21:36 -0700 | [diff] [blame] | 458 | { |
| 459 | .name = "sdcc_dma_crci", |
| 460 | .start = DMOV_SDC1_CRCI, |
| 461 | .end = DMOV_SDC1_CRCI, |
| 462 | .flags = IORESOURCE_DMA, |
| 463 | } |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 464 | }; |
| 465 | |
| 466 | static struct resource resources_sdc2[] = { |
| 467 | { |
| 468 | .start = MSM_SDC2_BASE, |
| 469 | .end = MSM_SDC2_BASE + SZ_4K - 1, |
| 470 | .flags = IORESOURCE_MEM, |
| 471 | }, |
| 472 | { |
| 473 | .start = INT_SDC2_0, |
| 474 | .end = INT_SDC2_1, |
| 475 | .flags = IORESOURCE_IRQ, |
| 476 | }, |
| 477 | { |
Krishna Konda | 25786ec | 2011-07-25 16:21:36 -0700 | [diff] [blame] | 478 | .name = "sdcc_dma_chnl", |
| 479 | .start = DMOV_SDC2_CHAN, |
| 480 | .end = DMOV_SDC2_CHAN, |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 481 | .flags = IORESOURCE_DMA, |
| 482 | }, |
Krishna Konda | 25786ec | 2011-07-25 16:21:36 -0700 | [diff] [blame] | 483 | { |
| 484 | .name = "sdcc_dma_crci", |
| 485 | .start = DMOV_SDC2_CRCI, |
| 486 | .end = DMOV_SDC2_CRCI, |
| 487 | .flags = IORESOURCE_DMA, |
| 488 | } |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 489 | }; |
| 490 | |
| 491 | static struct resource resources_sdc3[] = { |
| 492 | { |
| 493 | .start = MSM_SDC3_BASE, |
| 494 | .end = MSM_SDC3_BASE + SZ_4K - 1, |
| 495 | .flags = IORESOURCE_MEM, |
| 496 | }, |
| 497 | { |
| 498 | .start = INT_SDC3_0, |
| 499 | .end = INT_SDC3_1, |
| 500 | .flags = IORESOURCE_IRQ, |
| 501 | }, |
| 502 | { |
Krishna Konda | 25786ec | 2011-07-25 16:21:36 -0700 | [diff] [blame] | 503 | .name = "sdcc_dma_chnl", |
| 504 | .start = DMOV_SDC3_CHAN, |
| 505 | .end = DMOV_SDC3_CHAN, |
| 506 | .flags = IORESOURCE_DMA, |
| 507 | }, |
| 508 | { |
| 509 | .name = "sdcc_dma_crci", |
| 510 | .start = DMOV_SDC3_CRCI, |
| 511 | .end = DMOV_SDC3_CRCI, |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 512 | .flags = IORESOURCE_DMA, |
| 513 | }, |
| 514 | }; |
| 515 | |
| 516 | static struct resource resources_sdc4[] = { |
| 517 | { |
| 518 | .start = MSM_SDC4_BASE, |
| 519 | .end = MSM_SDC4_BASE + SZ_4K - 1, |
| 520 | .flags = IORESOURCE_MEM, |
| 521 | }, |
| 522 | { |
| 523 | .start = INT_SDC4_0, |
| 524 | .end = INT_SDC4_1, |
| 525 | .flags = IORESOURCE_IRQ, |
| 526 | }, |
| 527 | { |
Krishna Konda | 25786ec | 2011-07-25 16:21:36 -0700 | [diff] [blame] | 528 | .name = "sdcc_dma_chnl", |
| 529 | .start = DMOV_SDC4_CHAN, |
| 530 | .end = DMOV_SDC4_CHAN, |
| 531 | .flags = IORESOURCE_DMA, |
| 532 | }, |
| 533 | { |
| 534 | .name = "sdcc_dma_crci", |
| 535 | .start = DMOV_SDC4_CRCI, |
| 536 | .end = DMOV_SDC4_CRCI, |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 537 | .flags = IORESOURCE_DMA, |
| 538 | }, |
| 539 | }; |
| 540 | |
| 541 | struct platform_device msm_device_sdc1 = { |
| 542 | .name = "msm_sdcc", |
| 543 | .id = 1, |
| 544 | .num_resources = ARRAY_SIZE(resources_sdc1), |
| 545 | .resource = resources_sdc1, |
| 546 | .dev = { |
| 547 | .coherent_dma_mask = 0xffffffff, |
| 548 | }, |
| 549 | }; |
| 550 | |
| 551 | struct platform_device msm_device_sdc2 = { |
| 552 | .name = "msm_sdcc", |
| 553 | .id = 2, |
| 554 | .num_resources = ARRAY_SIZE(resources_sdc2), |
| 555 | .resource = resources_sdc2, |
| 556 | .dev = { |
| 557 | .coherent_dma_mask = 0xffffffff, |
| 558 | }, |
| 559 | }; |
| 560 | |
| 561 | struct platform_device msm_device_sdc3 = { |
| 562 | .name = "msm_sdcc", |
| 563 | .id = 3, |
| 564 | .num_resources = ARRAY_SIZE(resources_sdc3), |
| 565 | .resource = resources_sdc3, |
| 566 | .dev = { |
| 567 | .coherent_dma_mask = 0xffffffff, |
| 568 | }, |
| 569 | }; |
| 570 | |
| 571 | struct platform_device msm_device_sdc4 = { |
| 572 | .name = "msm_sdcc", |
| 573 | .id = 4, |
| 574 | .num_resources = ARRAY_SIZE(resources_sdc4), |
| 575 | .resource = resources_sdc4, |
| 576 | .dev = { |
| 577 | .coherent_dma_mask = 0xffffffff, |
| 578 | }, |
| 579 | }; |
| 580 | |
| 581 | static struct platform_device *msm_sdcc_devices[] __initdata = { |
| 582 | &msm_device_sdc1, |
| 583 | &msm_device_sdc2, |
| 584 | &msm_device_sdc3, |
| 585 | &msm_device_sdc4, |
| 586 | }; |
| 587 | |
| 588 | int __init msm_add_sdcc(unsigned int controller, struct mmc_platform_data *plat) |
| 589 | { |
| 590 | struct platform_device *pdev; |
| 591 | |
| 592 | if (controller < 1 || controller > 4) |
| 593 | return -EINVAL; |
| 594 | |
| 595 | pdev = msm_sdcc_devices[controller-1]; |
| 596 | pdev->dev.platform_data = plat; |
| 597 | return platform_device_register(pdev); |
| 598 | } |
| 599 | |
| 600 | #define RAMFS_INFO_MAGICNUMBER 0x654D4D43 |
| 601 | #define RAMFS_INFO_VERSION 0x00000001 |
| 602 | #define RAMFS_MODEMSTORAGE_ID 0x4D454653 |
| 603 | |
| 604 | static struct resource rmt_storage_resources[] = { |
| 605 | { |
| 606 | .flags = IORESOURCE_MEM, |
| 607 | }, |
| 608 | }; |
| 609 | |
| 610 | static struct platform_device rmt_storage_device = { |
| 611 | .name = "rmt_storage", |
| 612 | .id = -1, |
| 613 | .num_resources = ARRAY_SIZE(rmt_storage_resources), |
| 614 | .resource = rmt_storage_resources, |
| 615 | }; |
| 616 | |
| 617 | struct shared_ramfs_entry { |
| 618 | uint32_t client_id; /* Client id to uniquely identify a client */ |
| 619 | uint32_t base_addr; /* Base address of shared RAMFS memory */ |
| 620 | uint32_t size; /* Size of the shared RAMFS memory */ |
| 621 | uint32_t reserved; /* Reserved attribute for future use */ |
| 622 | }; |
| 623 | struct shared_ramfs_table { |
| 624 | uint32_t magic_id; /* Identify RAMFS details in SMEM */ |
| 625 | uint32_t version; /* Version of shared_ramfs_table */ |
| 626 | uint32_t entries; /* Total number of valid entries */ |
| 627 | struct shared_ramfs_entry ramfs_entry[3]; /* List all entries */ |
| 628 | }; |
| 629 | |
| 630 | int __init rmt_storage_add_ramfs(void) |
| 631 | { |
| 632 | struct shared_ramfs_table *ramfs_table; |
| 633 | struct shared_ramfs_entry *ramfs_entry; |
| 634 | int index; |
| 635 | |
| 636 | ramfs_table = smem_alloc(SMEM_SEFS_INFO, |
| 637 | sizeof(struct shared_ramfs_table)); |
| 638 | |
| 639 | if (!ramfs_table) { |
| 640 | printk(KERN_WARNING "%s: No RAMFS table in SMEM\n", __func__); |
| 641 | return -ENOENT; |
| 642 | } |
| 643 | |
| 644 | if ((ramfs_table->magic_id != (u32) RAMFS_INFO_MAGICNUMBER) || |
| 645 | (ramfs_table->version != (u32) RAMFS_INFO_VERSION)) { |
| 646 | printk(KERN_WARNING "%s: Magic / Version mismatch:, " |
| 647 | "magic_id=%#x, format_version=%#x\n", __func__, |
| 648 | ramfs_table->magic_id, ramfs_table->version); |
| 649 | return -ENOENT; |
| 650 | } |
| 651 | |
| 652 | for (index = 0; index < ramfs_table->entries; index++) { |
| 653 | ramfs_entry = &ramfs_table->ramfs_entry[index]; |
| 654 | |
| 655 | /* Find a match for the Modem Storage RAMFS area */ |
| 656 | if (ramfs_entry->client_id == (u32) RAMFS_MODEMSTORAGE_ID) { |
| 657 | printk(KERN_INFO "%s: RAMFS Info (from SMEM): " |
| 658 | "Baseaddr = 0x%08x, Size = 0x%08x\n", __func__, |
| 659 | ramfs_entry->base_addr, ramfs_entry->size); |
| 660 | |
| 661 | rmt_storage_resources[0].start = ramfs_entry->base_addr; |
| 662 | rmt_storage_resources[0].end = ramfs_entry->base_addr + |
| 663 | ramfs_entry->size - 1; |
| 664 | platform_device_register(&rmt_storage_device); |
| 665 | return 0; |
| 666 | } |
| 667 | } |
| 668 | return -ENOENT; |
| 669 | } |
| 670 | |
| 671 | #if defined(CONFIG_FB_MSM_MDP40) |
| 672 | #define MDP_BASE 0xA3F00000 |
| 673 | #define PMDH_BASE 0xAD600000 |
| 674 | #define EMDH_BASE 0xAD700000 |
| 675 | #define TVENC_BASE 0xAD400000 |
| 676 | #else |
| 677 | #define MDP_BASE 0xAA200000 |
| 678 | #define PMDH_BASE 0xAA600000 |
| 679 | #define EMDH_BASE 0xAA700000 |
| 680 | #define TVENC_BASE 0xAA400000 |
| 681 | #endif |
| 682 | |
| 683 | static struct resource msm_mdp_resources[] = { |
| 684 | { |
| 685 | .name = "mdp", |
| 686 | .start = MDP_BASE, |
| 687 | .end = MDP_BASE + 0x000F0000 - 1, |
| 688 | .flags = IORESOURCE_MEM, |
| 689 | }, |
| 690 | { |
| 691 | .start = INT_MDP, |
| 692 | .end = INT_MDP, |
| 693 | .flags = IORESOURCE_IRQ, |
| 694 | }, |
| 695 | }; |
| 696 | |
| 697 | static struct resource msm_mddi_resources[] = { |
| 698 | { |
| 699 | .name = "pmdh", |
| 700 | .start = PMDH_BASE, |
| 701 | .end = PMDH_BASE + PAGE_SIZE - 1, |
| 702 | .flags = IORESOURCE_MEM, |
| 703 | } |
| 704 | }; |
| 705 | |
| 706 | static struct resource msm_mddi_ext_resources[] = { |
| 707 | { |
| 708 | .name = "emdh", |
| 709 | .start = EMDH_BASE, |
| 710 | .end = EMDH_BASE + PAGE_SIZE - 1, |
| 711 | .flags = IORESOURCE_MEM, |
| 712 | } |
| 713 | }; |
| 714 | |
| 715 | static struct resource msm_ebi2_lcd_resources[] = { |
| 716 | { |
| 717 | .name = "base", |
| 718 | .start = 0xa0d00000, |
| 719 | .end = 0xa0d00000 + PAGE_SIZE - 1, |
| 720 | .flags = IORESOURCE_MEM, |
| 721 | }, |
| 722 | { |
| 723 | .name = "lcd01", |
| 724 | .start = 0x98000000, |
| 725 | .end = 0x98000000 + 0x80000 - 1, |
| 726 | .flags = IORESOURCE_MEM, |
| 727 | }, |
| 728 | { |
| 729 | .name = "lcd02", |
| 730 | .start = 0x9c000000, |
| 731 | .end = 0x9c000000 + 0x80000 - 1, |
| 732 | .flags = IORESOURCE_MEM, |
| 733 | }, |
| 734 | }; |
| 735 | |
| 736 | static struct resource msm_tvenc_resources[] = { |
| 737 | { |
| 738 | .name = "tvenc", |
| 739 | .start = TVENC_BASE, |
| 740 | .end = TVENC_BASE + PAGE_SIZE - 1, |
| 741 | .flags = IORESOURCE_MEM, |
| 742 | } |
| 743 | }; |
| 744 | |
| 745 | static struct platform_device msm_mdp_device = { |
| 746 | .name = "mdp", |
| 747 | .id = 0, |
| 748 | .num_resources = ARRAY_SIZE(msm_mdp_resources), |
| 749 | .resource = msm_mdp_resources, |
| 750 | }; |
| 751 | |
| 752 | static struct platform_device msm_mddi_device = { |
| 753 | .name = "mddi", |
| 754 | .id = 0, |
| 755 | .num_resources = ARRAY_SIZE(msm_mddi_resources), |
| 756 | .resource = msm_mddi_resources, |
| 757 | }; |
| 758 | |
| 759 | static struct platform_device msm_mddi_ext_device = { |
| 760 | .name = "mddi_ext", |
| 761 | .id = 0, |
| 762 | .num_resources = ARRAY_SIZE(msm_mddi_ext_resources), |
| 763 | .resource = msm_mddi_ext_resources, |
| 764 | }; |
| 765 | |
| 766 | static struct platform_device msm_ebi2_lcd_device = { |
| 767 | .name = "ebi2_lcd", |
| 768 | .id = 0, |
| 769 | .num_resources = ARRAY_SIZE(msm_ebi2_lcd_resources), |
| 770 | .resource = msm_ebi2_lcd_resources, |
| 771 | }; |
| 772 | |
| 773 | static struct platform_device msm_lcdc_device = { |
| 774 | .name = "lcdc", |
| 775 | .id = 0, |
| 776 | }; |
| 777 | |
| 778 | static struct platform_device msm_tvenc_device = { |
| 779 | .name = "tvenc", |
| 780 | .id = 0, |
| 781 | .num_resources = ARRAY_SIZE(msm_tvenc_resources), |
| 782 | .resource = msm_tvenc_resources, |
| 783 | }; |
| 784 | |
| 785 | /* TSIF begin */ |
| 786 | #if defined(CONFIG_TSIF) || defined(CONFIG_TSIF_MODULE) |
| 787 | |
| 788 | #define MSM_TSIF_PHYS (0xa0100000) |
| 789 | #define MSM_TSIF_SIZE (0x200) |
| 790 | |
| 791 | static struct resource tsif_resources[] = { |
| 792 | [0] = { |
| 793 | .flags = IORESOURCE_IRQ, |
| 794 | .start = INT_TSIF_IRQ, |
| 795 | .end = INT_TSIF_IRQ, |
| 796 | }, |
| 797 | [1] = { |
| 798 | .flags = IORESOURCE_MEM, |
| 799 | .start = MSM_TSIF_PHYS, |
| 800 | .end = MSM_TSIF_PHYS + MSM_TSIF_SIZE - 1, |
| 801 | }, |
| 802 | [2] = { |
| 803 | .flags = IORESOURCE_DMA, |
| 804 | .start = DMOV_TSIF_CHAN, |
| 805 | .end = DMOV_TSIF_CRCI, |
| 806 | }, |
| 807 | }; |
| 808 | |
| 809 | static void tsif_release(struct device *dev) |
| 810 | { |
| 811 | dev_info(dev, "release\n"); |
| 812 | } |
| 813 | |
| 814 | struct platform_device msm_device_tsif = { |
| 815 | .name = "msm_tsif", |
| 816 | .id = 0, |
| 817 | .num_resources = ARRAY_SIZE(tsif_resources), |
| 818 | .resource = tsif_resources, |
| 819 | .dev = { |
| 820 | .release = tsif_release, |
| 821 | }, |
| 822 | }; |
| 823 | #endif /* defined(CONFIG_TSIF) || defined(CONFIG_TSIF_MODULE) */ |
| 824 | /* TSIF end */ |
| 825 | |
| 826 | #define MSM_TSSC_PHYS 0xAA300000 |
| 827 | static struct resource resources_tssc[] = { |
| 828 | { |
| 829 | .start = MSM_TSSC_PHYS, |
| 830 | .end = MSM_TSSC_PHYS + SZ_4K - 1, |
| 831 | .name = "tssc", |
| 832 | .flags = IORESOURCE_MEM, |
| 833 | }, |
| 834 | { |
| 835 | .start = INT_TCHSCRN1, |
| 836 | .end = INT_TCHSCRN1, |
| 837 | .name = "tssc1", |
| 838 | .flags = IORESOURCE_IRQ | IRQF_TRIGGER_RISING, |
| 839 | }, |
| 840 | { |
| 841 | .start = INT_TCHSCRN2, |
| 842 | .end = INT_TCHSCRN2, |
| 843 | .name = "tssc2", |
| 844 | .flags = IORESOURCE_IRQ | IRQF_TRIGGER_RISING, |
| 845 | }, |
| 846 | }; |
| 847 | |
| 848 | struct platform_device msm_device_tssc = { |
| 849 | .name = "msm_touchscreen", |
| 850 | .id = 0, |
| 851 | .num_resources = ARRAY_SIZE(resources_tssc), |
| 852 | .resource = resources_tssc, |
| 853 | }; |
| 854 | |
| 855 | static void __init msm_register_device(struct platform_device *pdev, void *data) |
| 856 | { |
| 857 | int ret; |
| 858 | |
| 859 | pdev->dev.platform_data = data; |
| 860 | |
| 861 | ret = platform_device_register(pdev); |
| 862 | if (ret) |
| 863 | dev_err(&pdev->dev, |
| 864 | "%s: platform_device_register() failed = %d\n", |
| 865 | __func__, ret); |
| 866 | } |
| 867 | |
| 868 | void __init msm_fb_register_device(char *name, void *data) |
| 869 | { |
| 870 | if (!strncmp(name, "mdp", 3)) |
| 871 | msm_register_device(&msm_mdp_device, data); |
| 872 | else if (!strncmp(name, "pmdh", 4)) |
| 873 | msm_register_device(&msm_mddi_device, data); |
| 874 | else if (!strncmp(name, "emdh", 4)) |
| 875 | msm_register_device(&msm_mddi_ext_device, data); |
| 876 | else if (!strncmp(name, "ebi2", 4)) |
| 877 | msm_register_device(&msm_ebi2_lcd_device, data); |
| 878 | else if (!strncmp(name, "tvenc", 5)) |
| 879 | msm_register_device(&msm_tvenc_device, data); |
| 880 | else if (!strncmp(name, "lcdc", 4)) |
| 881 | msm_register_device(&msm_lcdc_device, data); |
| 882 | else |
| 883 | printk(KERN_ERR "%s: unknown device! %s\n", __func__, name); |
| 884 | } |
| 885 | |
| 886 | static struct platform_device msm_camera_device = { |
| 887 | .name = "msm_camera", |
| 888 | .id = 0, |
| 889 | }; |
| 890 | |
| 891 | void __init msm_camera_register_device(void *res, uint32_t num, |
| 892 | void *data) |
| 893 | { |
| 894 | msm_camera_device.num_resources = num; |
| 895 | msm_camera_device.resource = res; |
| 896 | |
| 897 | msm_register_device(&msm_camera_device, data); |
| 898 | } |
| 899 | |
| 900 | static DEFINE_CLK_PCOM(adm_clk, ADM_CLK, 0); |
| 901 | static DEFINE_CLK_PCOM(adsp_clk, ADSP_CLK, 0); |
| 902 | static DEFINE_CLK_PCOM(ebi1_clk, EBI1_CLK, CLK_MIN); |
| 903 | static DEFINE_CLK_PCOM(ebi2_clk, EBI2_CLK, 0); |
| 904 | static DEFINE_CLK_PCOM(ecodec_clk, ECODEC_CLK, 0); |
| 905 | static DEFINE_CLK_PCOM(gp_clk, GP_CLK, 0); |
| 906 | static DEFINE_CLK_PCOM(i2c_clk, I2C_CLK, 0); |
| 907 | static DEFINE_CLK_PCOM(icodec_rx_clk, ICODEC_RX_CLK, 0); |
| 908 | static DEFINE_CLK_PCOM(icodec_tx_clk, ICODEC_TX_CLK, 0); |
| 909 | static DEFINE_CLK_PCOM(imem_clk, IMEM_CLK, OFF); |
| 910 | static DEFINE_CLK_PCOM(mdc_clk, MDC_CLK, 0); |
| 911 | static DEFINE_CLK_PCOM(pmdh_clk, PMDH_CLK, OFF | CLK_MINMAX); |
| 912 | static DEFINE_CLK_PCOM(mdp_clk, MDP_CLK, OFF); |
| 913 | static DEFINE_CLK_PCOM(mdp_lcdc_pclk_clk, MDP_LCDC_PCLK_CLK, 0); |
| 914 | static DEFINE_CLK_PCOM(mdp_lcdc_pad_pclk_clk, MDP_LCDC_PAD_PCLK_CLK, 0); |
| 915 | static DEFINE_CLK_PCOM(mdp_vsync_clk, MDP_VSYNC_CLK, OFF); |
| 916 | static DEFINE_CLK_PCOM(pbus_clk, PBUS_CLK, CLK_MIN); |
| 917 | static DEFINE_CLK_PCOM(pcm_clk, PCM_CLK, 0); |
| 918 | static DEFINE_CLK_PCOM(sdac_clk, SDAC_CLK, OFF); |
| 919 | static DEFINE_CLK_PCOM(sdc1_clk, SDC1_CLK, OFF); |
| 920 | static DEFINE_CLK_PCOM(sdc1_p_clk, SDC1_P_CLK, OFF); |
| 921 | static DEFINE_CLK_PCOM(sdc2_clk, SDC2_CLK, OFF); |
| 922 | static DEFINE_CLK_PCOM(sdc2_p_clk, SDC2_P_CLK, OFF); |
| 923 | static DEFINE_CLK_PCOM(sdc3_clk, SDC3_CLK, OFF); |
| 924 | static DEFINE_CLK_PCOM(sdc3_p_clk, SDC3_P_CLK, OFF); |
| 925 | static DEFINE_CLK_PCOM(sdc4_clk, SDC4_CLK, OFF); |
| 926 | static DEFINE_CLK_PCOM(sdc4_p_clk, SDC4_P_CLK, OFF); |
| 927 | static DEFINE_CLK_PCOM(uart1_clk, UART1_CLK, OFF); |
| 928 | static DEFINE_CLK_PCOM(uart2_clk, UART2_CLK, 0); |
| 929 | static DEFINE_CLK_PCOM(uart3_clk, UART3_CLK, OFF); |
| 930 | static DEFINE_CLK_PCOM(uart1dm_clk, UART1DM_CLK, OFF); |
| 931 | static DEFINE_CLK_PCOM(uart2dm_clk, UART2DM_CLK, 0); |
| 932 | static DEFINE_CLK_PCOM(usb_hs_clk, USB_HS_CLK, OFF); |
| 933 | static DEFINE_CLK_PCOM(usb_hs_p_clk, USB_HS_P_CLK, OFF); |
| 934 | static DEFINE_CLK_PCOM(usb_otg_clk, USB_OTG_CLK, 0); |
| 935 | static DEFINE_CLK_PCOM(vdc_clk, VDC_CLK, OFF | CLK_MIN); |
| 936 | static DEFINE_CLK_PCOM(vfe_clk, VFE_CLK, OFF); |
| 937 | static DEFINE_CLK_PCOM(vfe_mdc_clk, VFE_MDC_CLK, OFF); |
| 938 | |
| 939 | struct clk_lookup msm_clocks_7x25[] = { |
Matt Wagantall | e1a8606 | 2011-08-18 17:46:10 -0700 | [diff] [blame] | 940 | CLK_LOOKUP("core_clk", adm_clk.c, "msm_dmov"), |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 941 | CLK_LOOKUP("adsp_clk", adsp_clk.c, NULL), |
| 942 | CLK_LOOKUP("ebi1_clk", ebi1_clk.c, NULL), |
| 943 | CLK_LOOKUP("ebi2_clk", ebi2_clk.c, NULL), |
| 944 | CLK_LOOKUP("ecodec_clk", ecodec_clk.c, NULL), |
Matt Wagantall | b86ad26 | 2011-10-24 19:50:29 -0700 | [diff] [blame^] | 945 | CLK_LOOKUP("core_clk", gp_clk.c, NULL), |
Matt Wagantall | ac29485 | 2011-08-17 15:44:58 -0700 | [diff] [blame] | 946 | CLK_LOOKUP("core_clk", i2c_clk.c, "msm_i2c.0"), |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 947 | CLK_LOOKUP("icodec_rx_clk", icodec_rx_clk.c, NULL), |
| 948 | CLK_LOOKUP("icodec_tx_clk", icodec_tx_clk.c, NULL), |
Matt Wagantall | 9dc0163 | 2011-08-17 18:55:04 -0700 | [diff] [blame] | 949 | CLK_LOOKUP("mem_clk", imem_clk.c, NULL), |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 950 | CLK_LOOKUP("mdc_clk", mdc_clk.c, NULL), |
| 951 | CLK_LOOKUP("mddi_clk", pmdh_clk.c, NULL), |
| 952 | CLK_LOOKUP("mdp_clk", mdp_clk.c, NULL), |
| 953 | CLK_LOOKUP("mdp_lcdc_pclk_clk", mdp_lcdc_pclk_clk.c, NULL), |
| 954 | CLK_LOOKUP("mdp_lcdc_pad_pclk_clk", mdp_lcdc_pad_pclk_clk.c, NULL), |
| 955 | CLK_LOOKUP("mdp_vsync_clk", mdp_vsync_clk.c, NULL), |
| 956 | CLK_LOOKUP("pbus_clk", pbus_clk.c, NULL), |
| 957 | CLK_LOOKUP("pcm_clk", pcm_clk.c, NULL), |
| 958 | CLK_LOOKUP("sdac_clk", sdac_clk.c, NULL), |
Matt Wagantall | 37ce384 | 2011-08-17 16:00:36 -0700 | [diff] [blame] | 959 | CLK_LOOKUP("core_clk", sdc1_clk.c, "msm_sdcc.1"), |
| 960 | CLK_LOOKUP("iface_clk", sdc1_p_clk.c, "msm_sdcc.1"), |
| 961 | CLK_LOOKUP("core_clk", sdc2_clk.c, "msm_sdcc.2"), |
| 962 | CLK_LOOKUP("iface_clk", sdc2_p_clk.c, "msm_sdcc.2"), |
| 963 | CLK_LOOKUP("core_clk", sdc3_clk.c, "msm_sdcc.3"), |
| 964 | CLK_LOOKUP("iface_clk", sdc3_p_clk.c, "msm_sdcc.3"), |
| 965 | CLK_LOOKUP("core_clk", sdc4_clk.c, "msm_sdcc.4"), |
| 966 | CLK_LOOKUP("iface_clk", sdc4_p_clk.c, "msm_sdcc.4"), |
Matt Wagantall | e252237 | 2011-08-17 14:52:21 -0700 | [diff] [blame] | 967 | CLK_LOOKUP("core_clk", uart1_clk.c, "msm_serial.0"), |
| 968 | CLK_LOOKUP("core_clk", uart2_clk.c, "msm_serial.1"), |
| 969 | CLK_LOOKUP("core_clk", uart3_clk.c, "msm_serial.2"), |
| 970 | CLK_LOOKUP("core_clk", uart1dm_clk.c, "msm_serial_hs.0"), |
| 971 | CLK_LOOKUP("core_clk", uart2dm_clk.c, "msm_serial_hs.1"), |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 972 | CLK_LOOKUP("usb_hs_clk", usb_hs_clk.c, NULL), |
| 973 | CLK_LOOKUP("usb_hs_pclk", usb_hs_p_clk.c, NULL), |
| 974 | CLK_LOOKUP("usb_otg_clk", usb_otg_clk.c, NULL), |
| 975 | CLK_LOOKUP("vdc_clk", vdc_clk.c, NULL), |
| 976 | CLK_LOOKUP("vfe_clk", vfe_clk.c, NULL), |
| 977 | CLK_LOOKUP("vfe_mdc_clk", vfe_mdc_clk.c, NULL), |
| 978 | }; |
| 979 | |
| 980 | unsigned msm_num_clocks_7x25 = ARRAY_SIZE(msm_clocks_7x25); |
| 981 | |