Ralf Baechle | 38b18f7 | 2005-02-03 14:28:23 +0000 | [diff] [blame] | 1 | config SIBYTE_SB1250 |
| 2 | bool |
| 3 | select HW_HAS_PCI |
Ralf Baechle | ca6f549 | 2007-03-09 12:17:32 +0000 | [diff] [blame] | 4 | select SIBYTE_ENABLE_LDT_IF_PCI |
Ralf Baechle | 38b18f7 | 2005-02-03 14:28:23 +0000 | [diff] [blame] | 5 | select SIBYTE_SB1xxx_SOC |
Ralf Baechle | e73ea27 | 2006-06-04 11:51:46 +0100 | [diff] [blame] | 6 | select SYS_SUPPORTS_SMP |
Ralf Baechle | 38b18f7 | 2005-02-03 14:28:23 +0000 | [diff] [blame] | 7 | |
| 8 | config SIBYTE_BCM1120 |
| 9 | bool |
| 10 | select SIBYTE_BCM112X |
Ralf Baechle | bb9b813 | 2007-03-09 15:59:56 +0000 | [diff] [blame^] | 11 | select SIBYTE_HAS_ZBUS_PROFILING |
Ralf Baechle | 38b18f7 | 2005-02-03 14:28:23 +0000 | [diff] [blame] | 12 | select SIBYTE_SB1xxx_SOC |
| 13 | |
| 14 | config SIBYTE_BCM1125 |
| 15 | bool |
| 16 | select HW_HAS_PCI |
| 17 | select SIBYTE_BCM112X |
Ralf Baechle | bb9b813 | 2007-03-09 15:59:56 +0000 | [diff] [blame^] | 18 | select SIBYTE_HAS_ZBUS_PROFILING |
Ralf Baechle | 38b18f7 | 2005-02-03 14:28:23 +0000 | [diff] [blame] | 19 | select SIBYTE_SB1xxx_SOC |
| 20 | |
| 21 | config SIBYTE_BCM1125H |
| 22 | bool |
| 23 | select HW_HAS_PCI |
| 24 | select SIBYTE_BCM112X |
Ralf Baechle | ca6f549 | 2007-03-09 12:17:32 +0000 | [diff] [blame] | 25 | select SIBYTE_ENABLE_LDT_IF_PCI |
Ralf Baechle | bb9b813 | 2007-03-09 15:59:56 +0000 | [diff] [blame^] | 26 | select SIBYTE_HAS_ZBUS_PROFILING |
Ralf Baechle | 38b18f7 | 2005-02-03 14:28:23 +0000 | [diff] [blame] | 27 | select SIBYTE_SB1xxx_SOC |
| 28 | |
| 29 | config SIBYTE_BCM112X |
| 30 | bool |
| 31 | select SIBYTE_SB1xxx_SOC |
Ralf Baechle | bb9b813 | 2007-03-09 15:59:56 +0000 | [diff] [blame^] | 32 | select SIBYTE_HAS_ZBUS_PROFILING |
Ralf Baechle | 38b18f7 | 2005-02-03 14:28:23 +0000 | [diff] [blame] | 33 | |
Andrew Isaacson | f137e46 | 2005-10-19 23:56:38 -0700 | [diff] [blame] | 34 | config SIBYTE_BCM1x80 |
| 35 | bool |
| 36 | select HW_HAS_PCI |
| 37 | select SIBYTE_SB1xxx_SOC |
Ralf Baechle | e73ea27 | 2006-06-04 11:51:46 +0100 | [diff] [blame] | 38 | select SYS_SUPPORTS_SMP |
Andrew Isaacson | f137e46 | 2005-10-19 23:56:38 -0700 | [diff] [blame] | 39 | |
| 40 | config SIBYTE_BCM1x55 |
| 41 | bool |
| 42 | select HW_HAS_PCI |
| 43 | select SIBYTE_SB1xxx_SOC |
Ralf Baechle | bb9b813 | 2007-03-09 15:59:56 +0000 | [diff] [blame^] | 44 | select SIBYTE_HAS_ZBUS_PROFILING |
Ralf Baechle | e73ea27 | 2006-06-04 11:51:46 +0100 | [diff] [blame] | 45 | select SYS_SUPPORTS_SMP |
Andrew Isaacson | f137e46 | 2005-10-19 23:56:38 -0700 | [diff] [blame] | 46 | |
Ralf Baechle | 38b18f7 | 2005-02-03 14:28:23 +0000 | [diff] [blame] | 47 | config SIBYTE_SB1xxx_SOC |
| 48 | bool |
| 49 | depends on EXPERIMENTAL |
| 50 | select DMA_COHERENT |
| 51 | select SIBYTE_CFE |
| 52 | select SWAP_IO_SPACE |
| 53 | select SYS_SUPPORTS_32BIT_KERNEL |
| 54 | select SYS_SUPPORTS_64BIT_KERNEL |
| 55 | |
| 56 | choice |
| 57 | prompt "SiByte SOC Stepping" |
| 58 | depends on SIBYTE_SB1xxx_SOC |
| 59 | |
| 60 | config CPU_SB1_PASS_1 |
| 61 | bool "1250 Pass1" |
| 62 | depends on SIBYTE_SB1250 |
| 63 | select CPU_HAS_PREFETCH |
| 64 | |
| 65 | config CPU_SB1_PASS_2_1250 |
| 66 | bool "1250 An" |
| 67 | depends on SIBYTE_SB1250 |
| 68 | select CPU_SB1_PASS_2 |
| 69 | help |
| 70 | Also called BCM1250 Pass 2 |
| 71 | |
| 72 | config CPU_SB1_PASS_2_2 |
| 73 | bool "1250 Bn" |
| 74 | depends on SIBYTE_SB1250 |
| 75 | select CPU_HAS_PREFETCH |
| 76 | help |
| 77 | Also called BCM1250 Pass 2.2 |
| 78 | |
| 79 | config CPU_SB1_PASS_4 |
| 80 | bool "1250 Cn" |
| 81 | depends on SIBYTE_SB1250 |
| 82 | select CPU_HAS_PREFETCH |
| 83 | help |
| 84 | Also called BCM1250 Pass 3 |
| 85 | |
| 86 | config CPU_SB1_PASS_2_112x |
| 87 | bool "112x Hybrid" |
| 88 | depends on SIBYTE_BCM112X |
| 89 | select CPU_SB1_PASS_2 |
| 90 | |
| 91 | config CPU_SB1_PASS_3 |
| 92 | bool "112x An" |
| 93 | depends on SIBYTE_BCM112X |
| 94 | select CPU_HAS_PREFETCH |
| 95 | |
| 96 | endchoice |
| 97 | |
| 98 | config CPU_SB1_PASS_2 |
| 99 | bool |
| 100 | |
| 101 | config SIBYTE_HAS_LDT |
| 102 | bool |
Ralf Baechle | ca6f549 | 2007-03-09 12:17:32 +0000 | [diff] [blame] | 103 | |
| 104 | config SIBYTE_ENABLE_LDT_IF_PCI |
| 105 | bool |
| 106 | select SIBYTE_HAS_LDT if PCI |
Ralf Baechle | 38b18f7 | 2005-02-03 14:28:23 +0000 | [diff] [blame] | 107 | |
| 108 | config SIMULATION |
| 109 | bool "Running under simulation" |
| 110 | depends on SIBYTE_SB1xxx_SOC |
| 111 | help |
| 112 | Build a kernel suitable for running under the GDB simulator. |
| 113 | Primarily adjusts the kernel's notion of time. |
| 114 | |
Ralf Baechle | 7760763 | 2005-11-10 16:32:14 +0000 | [diff] [blame] | 115 | config SB1_CEX_ALWAYS_FATAL |
Andrew Isaacson | a4b5bd9 | 2005-10-19 23:57:40 -0700 | [diff] [blame] | 116 | bool "All cache exceptions considered fatal (no recovery attempted)" |
| 117 | depends on SIBYTE_SB1xxx_SOC |
| 118 | |
Ralf Baechle | 7760763 | 2005-11-10 16:32:14 +0000 | [diff] [blame] | 119 | config SB1_CERR_STALL |
Andrew Isaacson | a4b5bd9 | 2005-10-19 23:57:40 -0700 | [diff] [blame] | 120 | bool "Stall (rather than panic) on fatal cache error" |
| 121 | depends on SIBYTE_SB1xxx_SOC |
| 122 | |
Ralf Baechle | 38b18f7 | 2005-02-03 14:28:23 +0000 | [diff] [blame] | 123 | config SIBYTE_CFE |
| 124 | bool "Booting from CFE" |
| 125 | depends on SIBYTE_SB1xxx_SOC |
Ralf Baechle | 36a8853 | 2007-03-01 11:56:43 +0000 | [diff] [blame] | 126 | select SYS_HAS_EARLY_PRINTK |
Ralf Baechle | 38b18f7 | 2005-02-03 14:28:23 +0000 | [diff] [blame] | 127 | help |
| 128 | Make use of the CFE API for enumerating available memory, |
| 129 | controlling secondary CPUs, and possibly console output. |
| 130 | |
| 131 | config SIBYTE_CFE_CONSOLE |
| 132 | bool "Use firmware console" |
| 133 | depends on SIBYTE_CFE |
| 134 | help |
| 135 | Use the CFE API's console write routines during boot. Other console |
| 136 | options (VT console, sb1250 duart console, etc.) should not be |
| 137 | configured. |
| 138 | |
| 139 | config SIBYTE_STANDALONE |
| 140 | bool |
| 141 | depends on SIBYTE_SB1xxx_SOC && !SIBYTE_CFE |
Ralf Baechle | 36a8853 | 2007-03-01 11:56:43 +0000 | [diff] [blame] | 142 | select SYS_HAS_EARLY_PRINTK |
Ralf Baechle | 38b18f7 | 2005-02-03 14:28:23 +0000 | [diff] [blame] | 143 | default y |
| 144 | |
| 145 | config SIBYTE_STANDALONE_RAM_SIZE |
| 146 | int "Memory size (in megabytes)" |
| 147 | depends on SIBYTE_STANDALONE |
| 148 | default "32" |
| 149 | |
| 150 | config SIBYTE_BUS_WATCHER |
| 151 | bool "Support for Bus Watcher statistics" |
| 152 | depends on SIBYTE_SB1xxx_SOC |
| 153 | help |
| 154 | Handle and keep statistics on the bus error interrupts (COR_ECC, |
| 155 | BAD_ECC, IO_BUS). |
| 156 | |
| 157 | config SIBYTE_BW_TRACE |
| 158 | bool "Capture bus trace before bus error" |
| 159 | depends on SIBYTE_BUS_WATCHER |
| 160 | help |
| 161 | Run a continuous bus trace, dumping the raw data as soon as |
| 162 | a ZBbus error is detected. Cannot work if ZBbus profiling |
| 163 | is turned on, and also will interfere with JTAG-based trace |
| 164 | buffer activity. Raw buffer data is dumped to console, and |
| 165 | must be processed off-line. |
| 166 | |
| 167 | config SIBYTE_SB1250_PROF |
| 168 | bool "Support for SB1/SOC profiling - SB1/SCD perf counters" |
| 169 | depends on SIBYTE_SB1xxx_SOC |
| 170 | |
| 171 | config SIBYTE_TBPROF |
Ralf Baechle | bb9b813 | 2007-03-09 15:59:56 +0000 | [diff] [blame^] | 172 | tristate "Support for ZBbus profiling" |
| 173 | depends on SIBYTE_HAS_ZBUS_PROFILING |
| 174 | |
| 175 | config SIBYTE_HAS_ZBUS_PROFILING |
| 176 | bool |