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Linus Torvalds1da177e2005-04-16 15:20:36 -07001/*
Linus Torvalds1da177e2005-04-16 15:20:36 -07002 * Copyright (C) 1998-1999 Andrzej Krzysztofowicz, Author and Maintainer
3 * Copyright (C) 1998-2000 Andre Hedrick <andre@linux-ide.org>
4 * Copyright (C) 2003 Red Hat Inc <alan@redhat.com>
Sergei Shtylyov07af4272007-03-03 17:48:53 +01005 * Copyright (C) 2006-2007 MontaVista Software, Inc. <source@mvista.com>
Linus Torvalds1da177e2005-04-16 15:20:36 -07006 *
7 * May be copied or modified under the terms of the GNU General Public License
8 *
Bartlomiej Zolnierkiewicz2be564b2008-02-01 23:09:30 +01009 * Documentation:
Linus Torvalds1da177e2005-04-16 15:20:36 -070010 *
Linus Torvalds1da177e2005-04-16 15:20:36 -070011 * Publically available from Intel web site. Errata documentation
12 * is also publically available. As an aide to anyone hacking on this
13 * driver the list of errata that are relevant is below.going back to
14 * PIIX4. Older device documentation is now a bit tricky to find.
15 *
16 * Errata of note:
17 *
18 * Unfixable
19 * PIIX4 errata #9 - Only on ultra obscure hw
20 * ICH3 errata #13 - Not observed to affect real hw
21 * by Intel
22 *
23 * Things we must deal with
24 * PIIX4 errata #10 - BM IDE hang with non UDMA
25 * (must stop/start dma to recover)
26 * 440MX errata #15 - As PIIX4 errata #10
27 * PIIX4 errata #15 - Must not read control registers
28 * during a PIO transfer
29 * 440MX errata #13 - As PIIX4 errata #15
30 * ICH2 errata #21 - DMA mode 0 doesn't work right
31 * ICH0/1 errata #55 - As ICH2 errata #21
32 * ICH2 spec c #9 - Extra operations needed to handle
33 * drive hotswap [NOT YET SUPPORTED]
34 * ICH2 spec c #20 - IDE PRD must not cross a 64K boundary
35 * and must be dword aligned
36 * ICH2 spec c #24 - UDMA mode 4,5 t85/86 should be 6ns not 3.3
37 *
38 * Should have been BIOS fixed:
39 * 450NX: errata #19 - DMA hangs on old 450NX
40 * 450NX: errata #20 - DMA hangs on old 450NX
41 * 450NX: errata #25 - Corruption with DMA on old 450NX
42 * ICH3 errata #15 - IDE deadlock under high load
43 * (BIOS must set dev 31 fn 0 bit 23)
44 * ICH3 errata #18 - Don't use native mode
45 */
46
Linus Torvalds1da177e2005-04-16 15:20:36 -070047#include <linux/types.h>
48#include <linux/module.h>
49#include <linux/kernel.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070050#include <linux/pci.h>
51#include <linux/hdreg.h>
52#include <linux/ide.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070053#include <linux/init.h>
54
55#include <asm/io.h>
56
Bartlomiej Zolnierkiewiczced3ec82008-07-24 22:53:32 +020057#define DRV_NAME "piix"
58
Linus Torvalds1da177e2005-04-16 15:20:36 -070059static int no_piix_dma;
60
61/**
Bartlomiej Zolnierkiewicz88b2b322007-10-13 17:47:51 +020062 * piix_set_pio_mode - set host controller for PIO mode
63 * @drive: drive
64 * @pio: PIO mode number
Linus Torvalds1da177e2005-04-16 15:20:36 -070065 *
Sergei Shtylyov07af4272007-03-03 17:48:53 +010066 * Set the interface PIO mode based upon the settings done by AMI BIOS.
Linus Torvalds1da177e2005-04-16 15:20:36 -070067 */
Bartlomiej Zolnierkiewicz88b2b322007-10-13 17:47:51 +020068
69static void piix_set_pio_mode(ide_drive_t *drive, const u8 pio)
Linus Torvalds1da177e2005-04-16 15:20:36 -070070{
71 ide_hwif_t *hwif = HWIF(drive);
Bartlomiej Zolnierkiewicz36501652008-02-01 23:09:31 +010072 struct pci_dev *dev = to_pci_dev(hwif->dev);
Sergei Shtylyov30dfd122007-02-07 18:18:28 +010073 int is_slave = drive->dn & 1;
Linus Torvalds1da177e2005-04-16 15:20:36 -070074 int master_port = hwif->channel ? 0x42 : 0x40;
75 int slave_port = 0x44;
76 unsigned long flags;
77 u16 master_data;
78 u8 slave_data;
Alan Cox4fb0f762006-06-26 00:26:12 -070079 static DEFINE_SPINLOCK(tune_lock);
Alan Cox5ac24692006-10-03 01:14:23 -070080 int control = 0;
Alan Cox4fb0f762006-06-26 00:26:12 -070081
Sergei Shtylyov30dfd122007-02-07 18:18:28 +010082 /* ISP RTC */
Alan Cox5ac24692006-10-03 01:14:23 -070083 static const u8 timings[][2]= {
84 { 0, 0 },
85 { 0, 0 },
86 { 1, 0 },
87 { 2, 1 },
88 { 2, 3 }, };
Linus Torvalds1da177e2005-04-16 15:20:36 -070089
Alan Cox4fb0f762006-06-26 00:26:12 -070090 /*
91 * Master vs slave is synchronized above us but the slave register is
92 * shared by the two hwifs so the corner case of two slave timeouts in
93 * parallel must be locked.
94 */
95 spin_lock_irqsave(&tune_lock, flags);
Linus Torvalds1da177e2005-04-16 15:20:36 -070096 pci_read_config_word(dev, master_port, &master_data);
Alan Cox5ac24692006-10-03 01:14:23 -070097
Sergei Shtylyov30dfd122007-02-07 18:18:28 +010098 if (pio > 1)
Alan Cox5ac24692006-10-03 01:14:23 -070099 control |= 1; /* Programmable timing on */
100 if (drive->media == ide_disk)
101 control |= 4; /* Prefetch, post write */
Sergei Shtylyov30dfd122007-02-07 18:18:28 +0100102 if (pio > 2)
Alan Cox5ac24692006-10-03 01:14:23 -0700103 control |= 2; /* IORDY */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700104 if (is_slave) {
Sergei Shtylyov30dfd122007-02-07 18:18:28 +0100105 master_data |= 0x4000;
106 master_data &= ~0x0070;
Alan Cox5ac24692006-10-03 01:14:23 -0700107 if (pio > 1) {
Sergei Shtylyov07af4272007-03-03 17:48:53 +0100108 /* Set PPE, IE and TIME */
109 master_data |= control << 4;
Alan Cox5ac24692006-10-03 01:14:23 -0700110 }
Linus Torvalds1da177e2005-04-16 15:20:36 -0700111 pci_read_config_byte(dev, slave_port, &slave_data);
Sergei Shtylyov07af4272007-03-03 17:48:53 +0100112 slave_data &= hwif->channel ? 0x0f : 0xf0;
113 slave_data |= ((timings[pio][0] << 2) | timings[pio][1]) <<
114 (hwif->channel ? 4 : 0);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700115 } else {
Sergei Shtylyov30dfd122007-02-07 18:18:28 +0100116 master_data &= ~0x3307;
Alan Cox5ac24692006-10-03 01:14:23 -0700117 if (pio > 1) {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700118 /* enable PPE, IE and TIME */
Sergei Shtylyov07af4272007-03-03 17:48:53 +0100119 master_data |= control;
Alan Cox5ac24692006-10-03 01:14:23 -0700120 }
Sergei Shtylyov07af4272007-03-03 17:48:53 +0100121 master_data |= (timings[pio][0] << 12) | (timings[pio][1] << 8);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700122 }
123 pci_write_config_word(dev, master_port, master_data);
124 if (is_slave)
125 pci_write_config_byte(dev, slave_port, slave_data);
Alan Cox4fb0f762006-06-26 00:26:12 -0700126 spin_unlock_irqrestore(&tune_lock, flags);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700127}
128
129/**
Bartlomiej Zolnierkiewicz88b2b322007-10-13 17:47:51 +0200130 * piix_set_dma_mode - set host controller for DMA mode
131 * @drive: drive
132 * @speed: DMA mode
Sergei Shtylyov07af4272007-03-03 17:48:53 +0100133 *
Bartlomiej Zolnierkiewicz88b2b322007-10-13 17:47:51 +0200134 * Set a PIIX host controller to the desired DMA mode. This involves
135 * programming the right timing data into the PCI configuration space.
Sergei Shtylyov07af4272007-03-03 17:48:53 +0100136 */
Bartlomiej Zolnierkiewicz26bcb872007-10-11 23:54:00 +0200137
Bartlomiej Zolnierkiewicz88b2b322007-10-13 17:47:51 +0200138static void piix_set_dma_mode(ide_drive_t *drive, const u8 speed)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700139{
140 ide_hwif_t *hwif = HWIF(drive);
Bartlomiej Zolnierkiewicz36501652008-02-01 23:09:31 +0100141 struct pci_dev *dev = to_pci_dev(hwif->dev);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700142 u8 maslave = hwif->channel ? 0x42 : 0x40;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700143 int a_speed = 3 << (drive->dn * 4);
144 int u_flag = 1 << drive->dn;
145 int v_flag = 0x01 << drive->dn;
146 int w_flag = 0x10 << drive->dn;
147 int u_speed = 0;
148 int sitre;
149 u16 reg4042, reg4a;
Bartlomiej Zolnierkiewicz1c54a932007-10-16 22:29:56 +0200150 u8 reg48, reg54, reg55;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700151
152 pci_read_config_word(dev, maslave, &reg4042);
153 sitre = (reg4042 & 0x4000) ? 1 : 0;
154 pci_read_config_byte(dev, 0x48, &reg48);
155 pci_read_config_word(dev, 0x4a, &reg4a);
156 pci_read_config_byte(dev, 0x54, &reg54);
157 pci_read_config_byte(dev, 0x55, &reg55);
158
Linus Torvalds1da177e2005-04-16 15:20:36 -0700159 if (speed >= XFER_UDMA_0) {
Bartlomiej Zolnierkiewicz4db90a12008-01-25 22:17:18 +0100160 u8 udma = speed - XFER_UDMA_0;
161
162 u_speed = min_t(u8, 2 - (udma & 1), udma) << (drive->dn * 4);
163
Linus Torvalds1da177e2005-04-16 15:20:36 -0700164 if (!(reg48 & u_flag))
165 pci_write_config_byte(dev, 0x48, reg48 | u_flag);
166 if (speed == XFER_UDMA_5) {
167 pci_write_config_byte(dev, 0x55, (u8) reg55|w_flag);
168 } else {
169 pci_write_config_byte(dev, 0x55, (u8) reg55 & ~w_flag);
170 }
171 if ((reg4a & a_speed) != u_speed)
172 pci_write_config_word(dev, 0x4a, (reg4a & ~a_speed) | u_speed);
173 if (speed > XFER_UDMA_2) {
174 if (!(reg54 & v_flag))
175 pci_write_config_byte(dev, 0x54, reg54 | v_flag);
176 } else
177 pci_write_config_byte(dev, 0x54, reg54 & ~v_flag);
178 } else {
Bartlomiej Zolnierkiewicz8c91abf2007-10-16 22:29:54 +0200179 const u8 mwdma_to_pio[] = { 0, 3, 4 };
Bartlomiej Zolnierkiewicz1c54a932007-10-16 22:29:56 +0200180 u8 pio;
Bartlomiej Zolnierkiewicz8c91abf2007-10-16 22:29:54 +0200181
Linus Torvalds1da177e2005-04-16 15:20:36 -0700182 if (reg48 & u_flag)
183 pci_write_config_byte(dev, 0x48, reg48 & ~u_flag);
184 if (reg4a & a_speed)
185 pci_write_config_word(dev, 0x4a, reg4a & ~a_speed);
186 if (reg54 & v_flag)
187 pci_write_config_byte(dev, 0x54, reg54 & ~v_flag);
188 if (reg55 & w_flag)
189 pci_write_config_byte(dev, 0x55, (u8) reg55 & ~w_flag);
Bartlomiej Zolnierkiewicz8c91abf2007-10-16 22:29:54 +0200190
191 if (speed >= XFER_MW_DMA_0)
192 pio = mwdma_to_pio[speed - XFER_MW_DMA_0];
193 else
194 pio = 2; /* only SWDMA2 is allowed */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700195
Bartlomiej Zolnierkiewicz1c54a932007-10-16 22:29:56 +0200196 piix_set_pio_mode(drive, pio);
197 }
Linus Torvalds1da177e2005-04-16 15:20:36 -0700198}
199
200/**
Bartlomiej Zolnierkiewicz40d2dd72007-10-19 00:30:10 +0200201 * init_chipset_ich - set up the ICH chipset
Albert Leef0dd8712007-02-17 02:40:21 +0100202 * @dev: PCI device to set up
203 * @name: Name of the device
204 *
Bartlomiej Zolnierkiewicz40d2dd72007-10-19 00:30:10 +0200205 * Initialize the PCI device as required. For the ICH this turns
206 * out to be nice and simple.
Albert Leef0dd8712007-02-17 02:40:21 +0100207 */
208
Bartlomiej Zolnierkiewicz40d2dd72007-10-19 00:30:10 +0200209static unsigned int __devinit init_chipset_ich(struct pci_dev *dev, const char *name)
Albert Leef0dd8712007-02-17 02:40:21 +0100210{
Bartlomiej Zolnierkiewicz40d2dd72007-10-19 00:30:10 +0200211 u32 extra = 0;
212
213 pci_read_config_dword(dev, 0x54, &extra);
214 pci_write_config_dword(dev, 0x54, extra | 0x400);
Albert Leef0dd8712007-02-17 02:40:21 +0100215
216 return 0;
217}
218
219/**
220 * piix_dma_clear_irq - clear BMDMA status
221 * @drive: IDE drive to clear
222 *
223 * Called from ide_intr() for PIO interrupts
224 * to clear BMDMA status as needed by ICHx
225 */
226static void piix_dma_clear_irq(ide_drive_t *drive)
227{
228 ide_hwif_t *hwif = HWIF(drive);
229 u8 dma_stat;
230
231 /* clear the INTR & ERROR bits */
Bartlomiej Zolnierkiewiczcab7f8e2008-07-23 19:55:51 +0200232 dma_stat = inb(hwif->dma_base + ATA_DMA_STATUS);
Albert Leef0dd8712007-02-17 02:40:21 +0100233 /* Should we force the bit as well ? */
Bartlomiej Zolnierkiewiczcab7f8e2008-07-23 19:55:51 +0200234 outb(dma_stat, hwif->dma_base + ATA_DMA_STATUS);
Albert Leef0dd8712007-02-17 02:40:21 +0100235}
236
Bartlomiej Zolnierkiewicz72076262007-07-09 23:17:58 +0200237struct ich_laptop {
238 u16 device;
239 u16 subvendor;
240 u16 subdevice;
241};
242
243/*
244 * List of laptops that use short cables rather than 80 wire
245 */
246
247static const struct ich_laptop ich_laptop[] = {
248 /* devid, subvendor, subdev */
sebdeg@ngi.itafda5e42007-11-05 21:42:25 +0100249 { 0x27DF, 0x1025, 0x0102 }, /* ICH7 on Acer 5602aWLMi */
Bartlomiej Zolnierkiewicz72076262007-07-09 23:17:58 +0200250 { 0x27DF, 0x0005, 0x0280 }, /* ICH7 on Acer 5602WLMi */
251 { 0x27DF, 0x1025, 0x0110 }, /* ICH7 on Acer 3682WLMi */
252 { 0x27DF, 0x1043, 0x1267 }, /* ICH7 on Asus W5F */
Bartlomiej Zolnierkiewiczdd0fd402007-11-27 21:35:56 +0100253 { 0x27DF, 0x103C, 0x30A1 }, /* ICH7 on HP Compaq nc2400 */
Bartlomiej Zolnierkiewicz72076262007-07-09 23:17:58 +0200254 { 0x24CA, 0x1025, 0x0061 }, /* ICH4 on Acer Aspire 2023WLMi */
Bartlomiej Zolnierkiewicz1fa5a402008-04-28 23:44:43 +0200255 { 0x2653, 0x1043, 0x82D8 }, /* ICH6M on Asus Eee 701 */
Bartlomiej Zolnierkiewicz72076262007-07-09 23:17:58 +0200256 /* end marker */
257 { 0, }
258};
259
Bartlomiej Zolnierkiewicz49521f92007-07-09 23:17:58 +0200260static u8 __devinit piix_cable_detect(ide_hwif_t *hwif)
Bartlomiej Zolnierkiewicz74594fd2007-02-17 02:40:23 +0100261{
Bartlomiej Zolnierkiewicz36501652008-02-01 23:09:31 +0100262 struct pci_dev *pdev = to_pci_dev(hwif->dev);
Bartlomiej Zolnierkiewicz72076262007-07-09 23:17:58 +0200263 const struct ich_laptop *lap = &ich_laptop[0];
Bartlomiej Zolnierkiewicz74594fd2007-02-17 02:40:23 +0100264 u8 reg54h = 0, mask = hwif->channel ? 0xc0 : 0x30;
265
Bartlomiej Zolnierkiewicz72076262007-07-09 23:17:58 +0200266 /* check for specials */
267 while (lap->device) {
268 if (lap->device == pdev->device &&
269 lap->subvendor == pdev->subsystem_vendor &&
270 lap->subdevice == pdev->subsystem_device) {
271 return ATA_CBL_PATA40_SHORT;
272 }
273 lap++;
274 }
275
276 pci_read_config_byte(pdev, 0x54, &reg54h);
Bartlomiej Zolnierkiewicz74594fd2007-02-17 02:40:23 +0100277
Bartlomiej Zolnierkiewicz49521f92007-07-09 23:17:58 +0200278 return (reg54h & mask) ? ATA_CBL_PATA80 : ATA_CBL_PATA40;
Bartlomiej Zolnierkiewicz74594fd2007-02-17 02:40:23 +0100279}
280
Albert Leef0dd8712007-02-17 02:40:21 +0100281/**
Linus Torvalds1da177e2005-04-16 15:20:36 -0700282 * init_hwif_piix - fill in the hwif for the PIIX
283 * @hwif: IDE interface
284 *
285 * Set up the ide_hwif_t for the PIIX interface according to the
286 * capabilities of the hardware.
287 */
288
289static void __devinit init_hwif_piix(ide_hwif_t *hwif)
290{
Linus Torvalds1da177e2005-04-16 15:20:36 -0700291 if (!hwif->dma_base)
292 return;
293
Bartlomiej Zolnierkiewicz74594fd2007-02-17 02:40:23 +0100294 if (no_piix_dma)
295 hwif->ultra_mask = hwif->mwdma_mask = hwif->swdma_mask = 0;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700296}
297
Bartlomiej Zolnierkiewicz40d2dd72007-10-19 00:30:10 +0200298static void __devinit init_hwif_ich(ide_hwif_t *hwif)
299{
300 init_hwif_piix(hwif);
301
302 /* ICHx need to clear the BMDMA status for all interrupts */
303 if (hwif->dma_base)
304 hwif->ide_dma_clear_irq = &piix_dma_clear_irq;
305}
306
Bartlomiej Zolnierkiewiczac95bee2008-04-26 22:25:14 +0200307static const struct ide_port_ops piix_port_ops = {
308 .set_pio_mode = piix_set_pio_mode,
309 .set_dma_mode = piix_set_dma_mode,
310 .cable_detect = piix_cable_detect,
311};
312
Bartlomiej Zolnierkiewicz3985ee32007-10-19 00:30:11 +0200313#ifndef CONFIG_IA64
Bartlomiej Zolnierkiewicz5e71d9c2008-04-26 17:36:35 +0200314 #define IDE_HFLAGS_PIIX IDE_HFLAG_LEGACY_IRQS
Bartlomiej Zolnierkiewicz3985ee32007-10-19 00:30:11 +0200315#else
Bartlomiej Zolnierkiewicz5e71d9c2008-04-26 17:36:35 +0200316 #define IDE_HFLAGS_PIIX 0
Bartlomiej Zolnierkiewicz3985ee32007-10-19 00:30:11 +0200317#endif
318
Bartlomiej Zolnierkiewiczced3ec82008-07-24 22:53:32 +0200319#define DECLARE_PIIX_DEV(udma) \
Linus Torvalds1da177e2005-04-16 15:20:36 -0700320 { \
Bartlomiej Zolnierkiewiczced3ec82008-07-24 22:53:32 +0200321 .name = DRV_NAME, \
Linus Torvalds1da177e2005-04-16 15:20:36 -0700322 .init_hwif = init_hwif_piix, \
Linus Torvalds1da177e2005-04-16 15:20:36 -0700323 .enablebits = {{0x41,0x80,0x80}, {0x43,0x80,0x80}}, \
Bartlomiej Zolnierkiewiczac95bee2008-04-26 22:25:14 +0200324 .port_ops = &piix_port_ops, \
Bartlomiej Zolnierkiewicz3985ee32007-10-19 00:30:11 +0200325 .host_flags = IDE_HFLAGS_PIIX, \
Bartlomiej Zolnierkiewicz4099d142007-07-20 01:11:59 +0200326 .pio_mask = ATA_PIO4, \
Bartlomiej Zolnierkiewicz5f8b6c32007-10-19 00:30:07 +0200327 .swdma_mask = ATA_SWDMA2_ONLY, \
328 .mwdma_mask = ATA_MWDMA12_ONLY, \
Bartlomiej Zolnierkiewicz18137202007-05-10 00:01:07 +0200329 .udma_mask = udma, \
Linus Torvalds1da177e2005-04-16 15:20:36 -0700330 }
331
Bartlomiej Zolnierkiewiczced3ec82008-07-24 22:53:32 +0200332#define DECLARE_ICH_DEV(udma) \
Bartlomiej Zolnierkiewicz40d2dd72007-10-19 00:30:10 +0200333 { \
Bartlomiej Zolnierkiewiczced3ec82008-07-24 22:53:32 +0200334 .name = DRV_NAME, \
Bartlomiej Zolnierkiewicz40d2dd72007-10-19 00:30:10 +0200335 .init_chipset = init_chipset_ich, \
336 .init_hwif = init_hwif_ich, \
337 .enablebits = {{0x41,0x80,0x80}, {0x43,0x80,0x80}}, \
Bartlomiej Zolnierkiewiczac95bee2008-04-26 22:25:14 +0200338 .port_ops = &piix_port_ops, \
Bartlomiej Zolnierkiewicz3985ee32007-10-19 00:30:11 +0200339 .host_flags = IDE_HFLAGS_PIIX, \
Bartlomiej Zolnierkiewicz40d2dd72007-10-19 00:30:10 +0200340 .pio_mask = ATA_PIO4, \
341 .swdma_mask = ATA_SWDMA2_ONLY, \
342 .mwdma_mask = ATA_MWDMA12_ONLY, \
343 .udma_mask = udma, \
344 }
345
Bartlomiej Zolnierkiewicz85620432007-10-20 00:32:34 +0200346static const struct ide_port_info piix_pci_info[] __devinitdata = {
Bartlomiej Zolnierkiewiczced3ec82008-07-24 22:53:32 +0200347 /* 0: MPIIX */
Sergei Shtylyovd2872232007-02-07 18:18:25 +0100348 { /*
349 * MPIIX actually has only a single IDE channel mapped to
350 * the primary or secondary ports depending on the value
351 * of the bit 14 of the IDETIM register at offset 0x6c
352 */
Bartlomiej Zolnierkiewiczced3ec82008-07-24 22:53:32 +0200353 .name = DRV_NAME,
Sergei Shtylyovd2872232007-02-07 18:18:25 +0100354 .enablebits = {{0x6d,0xc0,0x80}, {0x6d,0xc0,0xc0}},
Bartlomiej Zolnierkiewicz47b68782007-10-19 00:30:06 +0200355 .host_flags = IDE_HFLAG_ISA_PORTS | IDE_HFLAG_NO_DMA |
Bartlomiej Zolnierkiewicz3985ee32007-10-19 00:30:11 +0200356 IDE_HFLAGS_PIIX,
Bartlomiej Zolnierkiewicz4099d142007-07-20 01:11:59 +0200357 .pio_mask = ATA_PIO4,
Bartlomiej Zolnierkiewicz3985ee32007-10-19 00:30:11 +0200358 /* This is a painful system best to let it self tune for now */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700359 },
Bartlomiej Zolnierkiewiczced3ec82008-07-24 22:53:32 +0200360 /* 1: PIIXa/PIIXb/PIIX3 */
361 DECLARE_PIIX_DEV(0x00), /* no udma */
362 /* 2: PIIX4 */
363 DECLARE_PIIX_DEV(ATA_UDMA2),
364 /* 3: ICH0 */
365 DECLARE_ICH_DEV(ATA_UDMA2),
366 /* 4: ICH */
367 DECLARE_ICH_DEV(ATA_UDMA4),
368 /* 5: PIIX4 */
369 DECLARE_PIIX_DEV(ATA_UDMA4),
370 /* 6: ICH[2-7]/ICH[2-3]M/C-ICH/ICH5-SATA/ESB2/ICH8M */
371 DECLARE_ICH_DEV(ATA_UDMA5),
Linus Torvalds1da177e2005-04-16 15:20:36 -0700372};
373
374/**
375 * piix_init_one - called when a PIIX is found
376 * @dev: the piix device
377 * @id: the matching pci id
378 *
379 * Called when the PCI registration layer (or the IDE initialization)
380 * finds a device matching our IDE device tables.
381 */
382
383static int __devinit piix_init_one(struct pci_dev *dev, const struct pci_device_id *id)
384{
Bartlomiej Zolnierkiewicz6cdf6eb2008-07-24 22:53:14 +0200385 return ide_pci_init_one(dev, &piix_pci_info[id->driver_data], NULL);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700386}
387
388/**
389 * piix_check_450nx - Check for problem 450NX setup
390 *
391 * Check for the present of 450NX errata #19 and errata #25. If
392 * they are found, disable use of DMA IDE
393 */
394
395static void __devinit piix_check_450nx(void)
396{
397 struct pci_dev *pdev = NULL;
398 u16 cfg;
Alan Cox1424e502006-09-30 23:27:28 -0700399 while((pdev=pci_get_device(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82454NX, pdev))!=NULL)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700400 {
401 /* Look for 450NX PXB. Check for problem configurations
402 A PCI quirk checks bit 6 already */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700403 pci_read_config_word(pdev, 0x41, &cfg);
404 /* Only on the original revision: IDE DMA can hang */
Auke Kok44c10132007-06-08 15:46:36 -0700405 if (pdev->revision == 0x00)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700406 no_piix_dma = 1;
407 /* On all revisions below 5 PXB bus lock must be disabled for IDE */
Auke Kok44c10132007-06-08 15:46:36 -0700408 else if (cfg & (1<<14) && pdev->revision < 5)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700409 no_piix_dma = 2;
410 }
411 if(no_piix_dma)
Bartlomiej Zolnierkiewiczced3ec82008-07-24 22:53:32 +0200412 printk(KERN_WARNING DRV_NAME ": 450NX errata present, disabling IDE DMA.\n");
Linus Torvalds1da177e2005-04-16 15:20:36 -0700413 if(no_piix_dma == 2)
Bartlomiej Zolnierkiewiczced3ec82008-07-24 22:53:32 +0200414 printk(KERN_WARNING DRV_NAME ": A BIOS update may resolve this.\n");
Linus Torvalds1da177e2005-04-16 15:20:36 -0700415}
416
Bartlomiej Zolnierkiewicz9cbcc5e2007-10-16 22:29:56 +0200417static const struct pci_device_id piix_pci_tbl[] = {
Bartlomiej Zolnierkiewiczced3ec82008-07-24 22:53:32 +0200418 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_82371FB_0), 1 },
419 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_82371FB_1), 1 },
420 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_82371MX), 0 },
421 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_82371SB_1), 1 },
422 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_82371AB), 2 },
423 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_82801AB_1), 3 },
424 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_82443MX_1), 2 },
425 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_82801AA_1), 4 },
426 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_82372FB_1), 5 },
427 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_82451NX), 2 },
428 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_82801BA_9), 6 },
429 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_82801BA_8), 6 },
430 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_82801CA_10), 6 },
431 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_82801CA_11), 6 },
432 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_82801DB_11), 6 },
433 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_82801EB_11), 6 },
434 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_82801E_11), 6 },
435 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_82801DB_10), 6 },
Linus Torvalds1da177e2005-04-16 15:20:36 -0700436#ifdef CONFIG_BLK_DEV_IDE_SATA
Bartlomiej Zolnierkiewiczced3ec82008-07-24 22:53:32 +0200437 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_82801EB_1), 6 },
Linus Torvalds1da177e2005-04-16 15:20:36 -0700438#endif
Bartlomiej Zolnierkiewiczced3ec82008-07-24 22:53:32 +0200439 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_ESB_2), 6 },
440 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_ICH6_19), 6 },
441 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_ICH7_21), 6 },
442 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_82801DB_1), 6 },
443 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_ESB2_18), 6 },
444 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_ICH8_6), 6 },
Linus Torvalds1da177e2005-04-16 15:20:36 -0700445 { 0, },
446};
447MODULE_DEVICE_TABLE(pci, piix_pci_tbl);
448
449static struct pci_driver driver = {
450 .name = "PIIX_IDE",
451 .id_table = piix_pci_tbl,
452 .probe = piix_init_one,
Bartlomiej Zolnierkiewiczda8c3e02008-07-24 22:53:24 +0200453 .remove = ide_pci_remove,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700454};
455
456static int __init piix_ide_init(void)
457{
458 piix_check_450nx();
459 return ide_pci_register_driver(&driver);
460}
461
Bartlomiej Zolnierkiewiczda8c3e02008-07-24 22:53:24 +0200462static void __exit piix_ide_exit(void)
463{
464 pci_unregister_driver(&driver);
465}
466
Linus Torvalds1da177e2005-04-16 15:20:36 -0700467module_init(piix_ide_init);
Bartlomiej Zolnierkiewiczda8c3e02008-07-24 22:53:24 +0200468module_exit(piix_ide_exit);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700469
470MODULE_AUTHOR("Andre Hedrick, Andrzej Krzysztofowicz");
471MODULE_DESCRIPTION("PCI driver module for Intel PIIX IDE");
472MODULE_LICENSE("GPL");