blob: 0894bba9fadef0e1c33f738149aafc015a9828a8 [file] [log] [blame]
Kuninori Morimoto287c1292009-05-26 07:04:52 +00001/*
2 * linux/arch/sh/boards/se/7724/setup.c
3 *
4 * Copyright (C) 2009 Renesas Solutions Corp.
5 *
6 * Kuninori Morimoto <morimoto.kuninori@renesas.com>
7 *
8 * This file is subject to the terms and conditions of the GNU General Public
9 * License. See the file "COPYING" in the main directory of this archive
10 * for more details.
11 */
12
13#include <linux/init.h>
14#include <linux/device.h>
15#include <linux/interrupt.h>
16#include <linux/platform_device.h>
17#include <linux/mtd/physmap.h>
18#include <linux/delay.h>
19#include <linux/smc91x.h>
20#include <linux/gpio.h>
21#include <linux/input.h>
Magnus Damm9731f4a2009-07-03 09:40:03 +000022#include <linux/usb/r8a66597.h>
Kuninori Morimoto287c1292009-05-26 07:04:52 +000023#include <video/sh_mobile_lcdc.h>
24#include <media/sh_mobile_ceu.h>
Kuninori Morimoto3e9ad522009-08-21 01:24:54 +000025#include <sound/sh_fsi.h>
Kuninori Morimoto287c1292009-05-26 07:04:52 +000026#include <asm/io.h>
27#include <asm/heartbeat.h>
Kuninori Morimotoa80cad92009-06-26 07:05:39 +000028#include <asm/sh_eth.h>
29#include <asm/clock.h>
Kuninori Morimoto287c1292009-05-26 07:04:52 +000030#include <asm/sh_keysc.h>
31#include <cpu/sh7724.h>
32#include <mach-se/mach/se7724.h>
33
34/*
35 * SWx 1234 5678
36 * ------------------------------------
37 * SW31 : 1001 1100 : default
38 * SW32 : 0111 1111 : use on board flash
39 *
40 * SW41 : abxx xxxx -> a = 0 : Analog monitor
41 * 1 : Digital monitor
42 * b = 0 : VGA
Kuninori Morimoto4f324312009-08-03 04:52:03 +000043 * 1 : 720p
44 */
45
46/*
47 * about 720p
48 *
49 * When you use 1280 x 720 lcdc output,
50 * you should change OSC6 lcdc clock from 25.175MHz to 74.25MHz,
51 * and change SW41 to use 720p
Kuninori Morimoto287c1292009-05-26 07:04:52 +000052 */
53
54/* Heartbeat */
55static struct heartbeat_data heartbeat_data = {
56 .regsize = 16,
57};
58
59static struct resource heartbeat_resources[] = {
60 [0] = {
61 .start = PA_LED,
62 .end = PA_LED,
63 .flags = IORESOURCE_MEM,
64 },
65};
66
67static struct platform_device heartbeat_device = {
68 .name = "heartbeat",
69 .id = -1,
70 .dev = {
71 .platform_data = &heartbeat_data,
72 },
73 .num_resources = ARRAY_SIZE(heartbeat_resources),
74 .resource = heartbeat_resources,
75};
76
77/* LAN91C111 */
78static struct smc91x_platdata smc91x_info = {
79 .flags = SMC91X_USE_16BIT | SMC91X_NOWAIT,
80};
81
82static struct resource smc91x_eth_resources[] = {
83 [0] = {
84 .name = "SMC91C111" ,
85 .start = 0x1a300300,
86 .end = 0x1a30030f,
87 .flags = IORESOURCE_MEM,
88 },
89 [1] = {
90 .start = IRQ0_SMC,
91 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
92 },
93};
94
95static struct platform_device smc91x_eth_device = {
96 .name = "smc91x",
97 .num_resources = ARRAY_SIZE(smc91x_eth_resources),
98 .resource = smc91x_eth_resources,
99 .dev = {
100 .platform_data = &smc91x_info,
101 },
102};
103
104/* MTD */
105static struct mtd_partition nor_flash_partitions[] = {
106 {
107 .name = "uboot",
108 .offset = 0,
109 .size = (1 * 1024 * 1024),
110 .mask_flags = MTD_WRITEABLE, /* Read-only */
111 }, {
112 .name = "kernel",
113 .offset = MTDPART_OFS_APPEND,
114 .size = (2 * 1024 * 1024),
115 }, {
116 .name = "free-area",
117 .offset = MTDPART_OFS_APPEND,
118 .size = MTDPART_SIZ_FULL,
119 },
120};
121
122static struct physmap_flash_data nor_flash_data = {
123 .width = 2,
124 .parts = nor_flash_partitions,
125 .nr_parts = ARRAY_SIZE(nor_flash_partitions),
126};
127
128static struct resource nor_flash_resources[] = {
129 [0] = {
130 .name = "NOR Flash",
131 .start = 0x00000000,
132 .end = 0x01ffffff,
133 .flags = IORESOURCE_MEM,
134 }
135};
136
137static struct platform_device nor_flash_device = {
138 .name = "physmap-flash",
139 .resource = nor_flash_resources,
140 .num_resources = ARRAY_SIZE(nor_flash_resources),
141 .dev = {
142 .platform_data = &nor_flash_data,
143 },
144};
145
146/* LCDC */
147static struct sh_mobile_lcdc_info lcdc_info = {
148 .clock_source = LCDC_CLK_EXTERNAL,
149 .ch[0] = {
150 .chan = LCDC_CHAN_MAINLCD,
151 .bpp = 16,
152 .clock_divider = 1,
153 .lcd_cfg = {
154 .name = "LB070WV1",
155 .sync = 0, /* hsync and vsync are active low */
156 },
157 .lcd_size_cfg = { /* 7.0 inch */
158 .width = 152,
159 .height = 91,
160 },
161 .board_cfg = {
162 },
163 }
164};
165
166static struct resource lcdc_resources[] = {
167 [0] = {
168 .name = "LCDC",
169 .start = 0xfe940000,
Phil Edworthya6f15ad2009-09-15 12:00:30 +0000170 .end = 0xfe942fff,
Kuninori Morimoto287c1292009-05-26 07:04:52 +0000171 .flags = IORESOURCE_MEM,
172 },
173 [1] = {
174 .start = 106,
175 .flags = IORESOURCE_IRQ,
176 },
177};
178
179static struct platform_device lcdc_device = {
180 .name = "sh_mobile_lcdc_fb",
181 .num_resources = ARRAY_SIZE(lcdc_resources),
182 .resource = lcdc_resources,
183 .dev = {
184 .platform_data = &lcdc_info,
185 },
Magnus Dammdf47cd02009-07-31 07:48:29 +0000186 .archdata = {
187 .hwblk_id = HWBLK_LCDC,
188 },
Kuninori Morimoto287c1292009-05-26 07:04:52 +0000189};
190
191/* CEU0 */
192static struct sh_mobile_ceu_info sh_mobile_ceu0_info = {
193 .flags = SH_CEU_FLAG_USE_8BIT_BUS,
194};
195
196static struct resource ceu0_resources[] = {
197 [0] = {
198 .name = "CEU0",
199 .start = 0xfe910000,
200 .end = 0xfe91009f,
201 .flags = IORESOURCE_MEM,
202 },
203 [1] = {
204 .start = 52,
205 .flags = IORESOURCE_IRQ,
206 },
207 [2] = {
208 /* place holder for contiguous memory */
209 },
210};
211
212static struct platform_device ceu0_device = {
213 .name = "sh_mobile_ceu",
214 .id = 0, /* "ceu0" clock */
215 .num_resources = ARRAY_SIZE(ceu0_resources),
216 .resource = ceu0_resources,
217 .dev = {
218 .platform_data = &sh_mobile_ceu0_info,
219 },
Magnus Dammdf47cd02009-07-31 07:48:29 +0000220 .archdata = {
221 .hwblk_id = HWBLK_CEU0,
222 },
Kuninori Morimoto287c1292009-05-26 07:04:52 +0000223};
224
225/* CEU1 */
226static struct sh_mobile_ceu_info sh_mobile_ceu1_info = {
227 .flags = SH_CEU_FLAG_USE_8BIT_BUS,
228};
229
230static struct resource ceu1_resources[] = {
231 [0] = {
232 .name = "CEU1",
233 .start = 0xfe914000,
234 .end = 0xfe91409f,
235 .flags = IORESOURCE_MEM,
236 },
237 [1] = {
238 .start = 63,
239 .flags = IORESOURCE_IRQ,
240 },
241 [2] = {
242 /* place holder for contiguous memory */
243 },
244};
245
246static struct platform_device ceu1_device = {
247 .name = "sh_mobile_ceu",
248 .id = 1, /* "ceu1" clock */
249 .num_resources = ARRAY_SIZE(ceu1_resources),
250 .resource = ceu1_resources,
251 .dev = {
252 .platform_data = &sh_mobile_ceu1_info,
253 },
Magnus Dammdf47cd02009-07-31 07:48:29 +0000254 .archdata = {
255 .hwblk_id = HWBLK_CEU1,
256 },
Kuninori Morimoto287c1292009-05-26 07:04:52 +0000257};
258
Kuninori Morimoto3e9ad522009-08-21 01:24:54 +0000259/* FSI */
260/*
261 * FSI-A use external clock which came from ak464x.
262 * So, we should change parent of fsi
263 */
264#define FCLKACR 0xa4150008
265static void fsimck_init(struct clk *clk)
266{
267 u32 status = ctrl_inl(clk->enable_reg);
268
269 /* use external clock */
270 status &= ~0x000000ff;
271 status |= 0x00000080;
272 ctrl_outl(status, clk->enable_reg);
273}
274
275static struct clk_ops fsimck_clk_ops = {
276 .init = fsimck_init,
277};
278
279static struct clk fsimcka_clk = {
280 .name = "fsimcka_clk",
281 .id = -1,
282 .ops = &fsimck_clk_ops,
283 .enable_reg = (void __iomem *)FCLKACR,
284 .rate = 0, /* unknown */
285};
286
287struct sh_fsi_platform_info fsi_info = {
288 .porta_flags = SH_FSI_BRS_INV |
289 SH_FSI_OUT_SLAVE_MODE |
290 SH_FSI_IN_SLAVE_MODE |
291 SH_FSI_OFMT(PCM) |
292 SH_FSI_IFMT(PCM),
293};
294
295static struct resource fsi_resources[] = {
296 [0] = {
297 .name = "FSI",
298 .start = 0xFE3C0000,
299 .end = 0xFE3C021d,
300 .flags = IORESOURCE_MEM,
301 },
302 [1] = {
303 .start = 108,
304 .flags = IORESOURCE_IRQ,
305 },
306};
307
308static struct platform_device fsi_device = {
309 .name = "sh_fsi",
310 .id = 0,
311 .num_resources = ARRAY_SIZE(fsi_resources),
312 .resource = fsi_resources,
313 .dev = {
314 .platform_data = &fsi_info,
315 },
Kuninori Morimotod53bd802009-11-09 11:12:49 +0900316 .archdata = {
317 .hwblk_id = HWBLK_SPU, /* FSI needs SPU hwblk */
318 },
Kuninori Morimoto3e9ad522009-08-21 01:24:54 +0000319};
320
Magnus Damm9747e78b2009-08-15 02:53:34 +0000321/* KEYSC in SoC (Needs SW33-2 set to ON) */
Kuninori Morimoto287c1292009-05-26 07:04:52 +0000322static struct sh_keysc_info keysc_info = {
323 .mode = SH_KEYSC_MODE_1,
324 .scan_timing = 10,
325 .delay = 50,
326 .keycodes = {
327 KEY_1, KEY_2, KEY_3, KEY_4, KEY_5,
328 KEY_6, KEY_7, KEY_8, KEY_9, KEY_A,
329 KEY_B, KEY_C, KEY_D, KEY_E, KEY_F,
330 KEY_G, KEY_H, KEY_I, KEY_K, KEY_L,
331 KEY_M, KEY_N, KEY_O, KEY_P, KEY_Q,
332 KEY_R, KEY_S, KEY_T, KEY_U, KEY_V,
333 },
334};
335
336static struct resource keysc_resources[] = {
337 [0] = {
Magnus Damm9747e78b2009-08-15 02:53:34 +0000338 .name = "KEYSC",
339 .start = 0x044b0000,
340 .end = 0x044b000f,
Kuninori Morimoto287c1292009-05-26 07:04:52 +0000341 .flags = IORESOURCE_MEM,
342 },
343 [1] = {
Magnus Damm9747e78b2009-08-15 02:53:34 +0000344 .start = 79,
Kuninori Morimoto287c1292009-05-26 07:04:52 +0000345 .flags = IORESOURCE_IRQ,
346 },
347};
348
349static struct platform_device keysc_device = {
350 .name = "sh_keysc",
351 .id = 0, /* "keysc0" clock */
352 .num_resources = ARRAY_SIZE(keysc_resources),
353 .resource = keysc_resources,
354 .dev = {
355 .platform_data = &keysc_info,
356 },
Magnus Dammdf47cd02009-07-31 07:48:29 +0000357 .archdata = {
358 .hwblk_id = HWBLK_KEYSC,
359 },
Kuninori Morimoto287c1292009-05-26 07:04:52 +0000360};
361
Kuninori Morimotoa80cad92009-06-26 07:05:39 +0000362/* SH Eth */
363static struct resource sh_eth_resources[] = {
364 [0] = {
365 .start = SH_ETH_ADDR,
366 .end = SH_ETH_ADDR + 0x1FC,
367 .flags = IORESOURCE_MEM,
368 },
369 [1] = {
370 .start = 91,
371 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
372 },
373};
374
375struct sh_eth_plat_data sh_eth_plat = {
376 .phy = 0x1f, /* SMSC LAN8187 */
377 .edmac_endian = EDMAC_LITTLE_ENDIAN,
378};
379
380static struct platform_device sh_eth_device = {
381 .name = "sh-eth",
382 .id = 0,
383 .dev = {
384 .platform_data = &sh_eth_plat,
385 },
386 .num_resources = ARRAY_SIZE(sh_eth_resources),
387 .resource = sh_eth_resources,
Magnus Dammdf47cd02009-07-31 07:48:29 +0000388 .archdata = {
389 .hwblk_id = HWBLK_ETHER,
390 },
Kuninori Morimotoa80cad92009-06-26 07:05:39 +0000391};
392
Magnus Damm9731f4a2009-07-03 09:40:03 +0000393static struct r8a66597_platdata sh7724_usb0_host_data = {
Magnus Damm719a72b2009-07-17 14:59:55 +0000394 .on_chip = 1,
Magnus Damm9731f4a2009-07-03 09:40:03 +0000395};
396
397static struct resource sh7724_usb0_host_resources[] = {
398 [0] = {
399 .start = 0xa4d80000,
Kuninori Morimoto1bc265d2009-08-19 00:12:15 +0000400 .end = 0xa4d80124 - 1,
Magnus Damm9731f4a2009-07-03 09:40:03 +0000401 .flags = IORESOURCE_MEM,
402 },
403 [1] = {
404 .start = 65,
405 .end = 65,
406 .flags = IORESOURCE_IRQ | IRQF_TRIGGER_LOW,
407 },
408};
409
410static struct platform_device sh7724_usb0_host_device = {
411 .name = "r8a66597_hcd",
412 .id = 0,
413 .dev = {
414 .dma_mask = NULL, /* not use dma */
415 .coherent_dma_mask = 0xffffffff,
416 .platform_data = &sh7724_usb0_host_data,
417 },
418 .num_resources = ARRAY_SIZE(sh7724_usb0_host_resources),
419 .resource = sh7724_usb0_host_resources,
Magnus Dammdf47cd02009-07-31 07:48:29 +0000420 .archdata = {
421 .hwblk_id = HWBLK_USB0,
422 },
Magnus Damm9731f4a2009-07-03 09:40:03 +0000423};
424
Magnus Dammf8f8c072009-08-19 09:52:02 +0000425static struct r8a66597_platdata sh7724_usb1_gadget_data = {
426 .on_chip = 1,
427};
428
429static struct resource sh7724_usb1_gadget_resources[] = {
430 [0] = {
431 .start = 0xa4d90000,
432 .end = 0xa4d90123,
433 .flags = IORESOURCE_MEM,
434 },
435 [1] = {
436 .start = 66,
437 .end = 66,
438 .flags = IORESOURCE_IRQ | IRQF_TRIGGER_LOW,
439 },
440};
441
442static struct platform_device sh7724_usb1_gadget_device = {
443 .name = "r8a66597_udc",
444 .id = 1, /* USB1 */
445 .dev = {
446 .dma_mask = NULL, /* not use dma */
447 .coherent_dma_mask = 0xffffffff,
448 .platform_data = &sh7724_usb1_gadget_data,
449 },
450 .num_resources = ARRAY_SIZE(sh7724_usb1_gadget_resources),
451 .resource = sh7724_usb1_gadget_resources,
452};
453
Kuninori Morimoto287c1292009-05-26 07:04:52 +0000454static struct platform_device *ms7724se_devices[] __initdata = {
455 &heartbeat_device,
456 &smc91x_eth_device,
457 &lcdc_device,
458 &nor_flash_device,
459 &ceu0_device,
460 &ceu1_device,
461 &keysc_device,
Kuninori Morimotoa80cad92009-06-26 07:05:39 +0000462 &sh_eth_device,
Magnus Damm9731f4a2009-07-03 09:40:03 +0000463 &sh7724_usb0_host_device,
Magnus Dammf8f8c072009-08-19 09:52:02 +0000464 &sh7724_usb1_gadget_device,
Kuninori Morimoto3e9ad522009-08-21 01:24:54 +0000465 &fsi_device,
Kuninori Morimoto287c1292009-05-26 07:04:52 +0000466};
467
Kuninori Morimotoa80cad92009-06-26 07:05:39 +0000468#define EEPROM_OP 0xBA206000
469#define EEPROM_ADR 0xBA206004
470#define EEPROM_DATA 0xBA20600C
471#define EEPROM_STAT 0xBA206010
472#define EEPROM_STRT 0xBA206014
473static int __init sh_eth_is_eeprom_ready(void)
474{
475 int t = 10000;
476
477 while (t--) {
478 if (!ctrl_inw(EEPROM_STAT))
479 return 1;
480 cpu_relax();
481 }
482
483 printk(KERN_ERR "ms7724se can not access to eeprom\n");
484 return 0;
485}
486
487static void __init sh_eth_init(void)
488{
489 int i;
490 u16 mac[3];
491
492 /* check EEPROM status */
493 if (!sh_eth_is_eeprom_ready())
494 return;
495
496 /* read MAC addr from EEPROM */
497 for (i = 0 ; i < 3 ; i++) {
498 ctrl_outw(0x0, EEPROM_OP); /* read */
499 ctrl_outw(i*2, EEPROM_ADR);
500 ctrl_outw(0x1, EEPROM_STRT);
501 if (!sh_eth_is_eeprom_ready())
502 return;
503
504 mac[i] = ctrl_inw(EEPROM_DATA);
505 mac[i] = ((mac[i] & 0xFF) << 8) | (mac[i] >> 8); /* swap */
506 }
507
508 /* reset sh-eth */
509 ctrl_outl(0x1, SH_ETH_ADDR + 0x0);
510
511 /* set MAC addr */
512 ctrl_outl(((mac[0] << 16) | (mac[1])), SH_ETH_MAHR);
513 ctrl_outl((mac[2]), SH_ETH_MALR);
514}
515
Kuninori Morimoto287c1292009-05-26 07:04:52 +0000516#define SW4140 0xBA201000
517#define FPGA_OUT 0xBA200400
518#define PORT_HIZA 0xA4050158
Magnus Damm9731f4a2009-07-03 09:40:03 +0000519#define PORT_MSELCRB 0xA4050182
Kuninori Morimoto287c1292009-05-26 07:04:52 +0000520
521#define SW41_A 0x0100
522#define SW41_B 0x0200
523#define SW41_C 0x0400
524#define SW41_D 0x0800
525#define SW41_E 0x1000
526#define SW41_F 0x2000
527#define SW41_G 0x4000
528#define SW41_H 0x8000
Magnus Damm9731f4a2009-07-03 09:40:03 +0000529
Kuninori Morimoto287c1292009-05-26 07:04:52 +0000530static int __init devices_setup(void)
531{
532 u16 sw = ctrl_inw(SW4140); /* select camera, monitor */
Kuninori Morimoto3e9ad522009-08-21 01:24:54 +0000533 struct clk *fsia_clk;
Kuninori Morimoto287c1292009-05-26 07:04:52 +0000534
535 /* Reset Release */
536 ctrl_outw(ctrl_inw(FPGA_OUT) &
537 ~((1 << 1) | /* LAN */
538 (1 << 6) | /* VIDEO DAC */
Kuninori Morimoto3e9ad522009-08-21 01:24:54 +0000539 (1 << 7) | /* AK4643 */
Kuninori Morimotoa80cad92009-06-26 07:05:39 +0000540 (1 << 12) | /* USB0 */
541 (1 << 14)), /* RMII */
Kuninori Morimoto287c1292009-05-26 07:04:52 +0000542 FPGA_OUT);
543
Magnus Damm9731f4a2009-07-03 09:40:03 +0000544 /* turn on USB clocks, use external clock */
545 ctrl_outw((ctrl_inw(PORT_MSELCRB) & ~0xc000) | 0x8000, PORT_MSELCRB);
546
Magnus Damm7766e162009-08-06 15:03:43 +0000547#ifdef CONFIG_PM
548 /* Let LED9 show STATUS2 */
549 gpio_request(GPIO_FN_STATUS2, NULL);
550
551 /* Lit LED10 show STATUS0 */
552 gpio_request(GPIO_FN_STATUS0, NULL);
553
554 /* Lit LED11 show PDSTATUS */
555 gpio_request(GPIO_FN_PDSTATUS, NULL);
556#else
557 /* Lit LED9 */
558 gpio_request(GPIO_PTJ6, NULL);
559 gpio_direction_output(GPIO_PTJ6, 1);
560 gpio_export(GPIO_PTJ6, 0);
561
562 /* Lit LED10 */
563 gpio_request(GPIO_PTJ5, NULL);
564 gpio_direction_output(GPIO_PTJ5, 1);
565 gpio_export(GPIO_PTJ5, 0);
566
567 /* Lit LED11 */
568 gpio_request(GPIO_PTJ7, NULL);
569 gpio_direction_output(GPIO_PTJ7, 1);
570 gpio_export(GPIO_PTJ7, 0);
571#endif
572
Magnus Damm9731f4a2009-07-03 09:40:03 +0000573 /* enable USB0 port */
574 ctrl_outw(0x0600, 0xa40501d4);
575
Magnus Dammf8f8c072009-08-19 09:52:02 +0000576 /* enable USB1 port */
577 ctrl_outw(0x0600, 0xa4050192);
578
Kuninori Morimoto287c1292009-05-26 07:04:52 +0000579 /* enable IRQ 0,1,2 */
580 gpio_request(GPIO_FN_INTC_IRQ0, NULL);
581 gpio_request(GPIO_FN_INTC_IRQ1, NULL);
582 gpio_request(GPIO_FN_INTC_IRQ2, NULL);
583
584 /* enable SCIFA3 */
585 gpio_request(GPIO_FN_SCIF3_I_SCK, NULL);
586 gpio_request(GPIO_FN_SCIF3_I_RXD, NULL);
587 gpio_request(GPIO_FN_SCIF3_I_TXD, NULL);
588 gpio_request(GPIO_FN_SCIF3_I_CTS, NULL);
589 gpio_request(GPIO_FN_SCIF3_I_RTS, NULL);
590
591 /* enable LCDC */
592 gpio_request(GPIO_FN_LCDD23, NULL);
593 gpio_request(GPIO_FN_LCDD22, NULL);
594 gpio_request(GPIO_FN_LCDD21, NULL);
595 gpio_request(GPIO_FN_LCDD20, NULL);
596 gpio_request(GPIO_FN_LCDD19, NULL);
597 gpio_request(GPIO_FN_LCDD18, NULL);
598 gpio_request(GPIO_FN_LCDD17, NULL);
599 gpio_request(GPIO_FN_LCDD16, NULL);
600 gpio_request(GPIO_FN_LCDD15, NULL);
601 gpio_request(GPIO_FN_LCDD14, NULL);
602 gpio_request(GPIO_FN_LCDD13, NULL);
603 gpio_request(GPIO_FN_LCDD12, NULL);
604 gpio_request(GPIO_FN_LCDD11, NULL);
605 gpio_request(GPIO_FN_LCDD10, NULL);
606 gpio_request(GPIO_FN_LCDD9, NULL);
607 gpio_request(GPIO_FN_LCDD8, NULL);
608 gpio_request(GPIO_FN_LCDD7, NULL);
609 gpio_request(GPIO_FN_LCDD6, NULL);
610 gpio_request(GPIO_FN_LCDD5, NULL);
611 gpio_request(GPIO_FN_LCDD4, NULL);
612 gpio_request(GPIO_FN_LCDD3, NULL);
613 gpio_request(GPIO_FN_LCDD2, NULL);
614 gpio_request(GPIO_FN_LCDD1, NULL);
615 gpio_request(GPIO_FN_LCDD0, NULL);
616 gpio_request(GPIO_FN_LCDDISP, NULL);
617 gpio_request(GPIO_FN_LCDHSYN, NULL);
618 gpio_request(GPIO_FN_LCDDCK, NULL);
619 gpio_request(GPIO_FN_LCDVSYN, NULL);
620 gpio_request(GPIO_FN_LCDDON, NULL);
621 gpio_request(GPIO_FN_LCDVEPWC, NULL);
622 gpio_request(GPIO_FN_LCDVCPWC, NULL);
623 gpio_request(GPIO_FN_LCDRD, NULL);
624 gpio_request(GPIO_FN_LCDLCLK, NULL);
625 ctrl_outw((ctrl_inw(PORT_HIZA) & ~0x0001), PORT_HIZA);
626
627 /* enable CEU0 */
628 gpio_request(GPIO_FN_VIO0_D15, NULL);
629 gpio_request(GPIO_FN_VIO0_D14, NULL);
630 gpio_request(GPIO_FN_VIO0_D13, NULL);
631 gpio_request(GPIO_FN_VIO0_D12, NULL);
632 gpio_request(GPIO_FN_VIO0_D11, NULL);
633 gpio_request(GPIO_FN_VIO0_D10, NULL);
634 gpio_request(GPIO_FN_VIO0_D9, NULL);
635 gpio_request(GPIO_FN_VIO0_D8, NULL);
636 gpio_request(GPIO_FN_VIO0_D7, NULL);
637 gpio_request(GPIO_FN_VIO0_D6, NULL);
638 gpio_request(GPIO_FN_VIO0_D5, NULL);
639 gpio_request(GPIO_FN_VIO0_D4, NULL);
640 gpio_request(GPIO_FN_VIO0_D3, NULL);
641 gpio_request(GPIO_FN_VIO0_D2, NULL);
642 gpio_request(GPIO_FN_VIO0_D1, NULL);
643 gpio_request(GPIO_FN_VIO0_D0, NULL);
644 gpio_request(GPIO_FN_VIO0_VD, NULL);
645 gpio_request(GPIO_FN_VIO0_CLK, NULL);
646 gpio_request(GPIO_FN_VIO0_FLD, NULL);
647 gpio_request(GPIO_FN_VIO0_HD, NULL);
Magnus Damm84f75972009-07-01 04:55:35 +0000648 platform_resource_setup_memory(&ceu0_device, "ceu0", 4 << 20);
Kuninori Morimoto287c1292009-05-26 07:04:52 +0000649
650 /* enable CEU1 */
651 gpio_request(GPIO_FN_VIO1_D7, NULL);
652 gpio_request(GPIO_FN_VIO1_D6, NULL);
653 gpio_request(GPIO_FN_VIO1_D5, NULL);
654 gpio_request(GPIO_FN_VIO1_D4, NULL);
655 gpio_request(GPIO_FN_VIO1_D3, NULL);
656 gpio_request(GPIO_FN_VIO1_D2, NULL);
657 gpio_request(GPIO_FN_VIO1_D1, NULL);
658 gpio_request(GPIO_FN_VIO1_D0, NULL);
659 gpio_request(GPIO_FN_VIO1_FLD, NULL);
660 gpio_request(GPIO_FN_VIO1_HD, NULL);
661 gpio_request(GPIO_FN_VIO1_VD, NULL);
662 gpio_request(GPIO_FN_VIO1_CLK, NULL);
Magnus Damm84f75972009-07-01 04:55:35 +0000663 platform_resource_setup_memory(&ceu1_device, "ceu1", 4 << 20);
Kuninori Morimoto287c1292009-05-26 07:04:52 +0000664
665 /* KEYSC */
666 gpio_request(GPIO_FN_KEYOUT5_IN5, NULL);
667 gpio_request(GPIO_FN_KEYOUT4_IN6, NULL);
668 gpio_request(GPIO_FN_KEYIN4, NULL);
669 gpio_request(GPIO_FN_KEYIN3, NULL);
670 gpio_request(GPIO_FN_KEYIN2, NULL);
671 gpio_request(GPIO_FN_KEYIN1, NULL);
672 gpio_request(GPIO_FN_KEYIN0, NULL);
673 gpio_request(GPIO_FN_KEYOUT3, NULL);
674 gpio_request(GPIO_FN_KEYOUT2, NULL);
675 gpio_request(GPIO_FN_KEYOUT1, NULL);
676 gpio_request(GPIO_FN_KEYOUT0, NULL);
677
Kuninori Morimoto3e9ad522009-08-21 01:24:54 +0000678 /* enable FSI */
679 gpio_request(GPIO_FN_FSIMCKB, NULL);
680 gpio_request(GPIO_FN_FSIMCKA, NULL);
681 gpio_request(GPIO_FN_FSIOASD, NULL);
682 gpio_request(GPIO_FN_FSIIABCK, NULL);
683 gpio_request(GPIO_FN_FSIIALRCK, NULL);
684 gpio_request(GPIO_FN_FSIOABCK, NULL);
685 gpio_request(GPIO_FN_FSIOALRCK, NULL);
686 gpio_request(GPIO_FN_CLKAUDIOAO, NULL);
687 gpio_request(GPIO_FN_FSIIBSD, NULL);
688 gpio_request(GPIO_FN_FSIOBSD, NULL);
689 gpio_request(GPIO_FN_FSIIBBCK, NULL);
690 gpio_request(GPIO_FN_FSIIBLRCK, NULL);
691 gpio_request(GPIO_FN_FSIOBBCK, NULL);
692 gpio_request(GPIO_FN_FSIOBLRCK, NULL);
693 gpio_request(GPIO_FN_CLKAUDIOBO, NULL);
694 gpio_request(GPIO_FN_FSIIASD, NULL);
695
696 /* change parent of FSI A */
697 fsia_clk = clk_get(NULL, "fsia_clk");
698 clk_register(&fsimcka_clk);
699 clk_set_parent(fsia_clk, &fsimcka_clk);
700 clk_set_rate(fsia_clk, 11000);
701 clk_set_rate(&fsimcka_clk, 11000);
702 clk_put(fsia_clk);
703
Kuninori Morimotoa80cad92009-06-26 07:05:39 +0000704 /*
705 * enable SH-Eth
706 *
707 * please remove J33 pin from your board !!
708 *
709 * ms7724 board should not use GPIO_FN_LNKSTA pin
710 * So, This time PTX5 is set to input pin
711 */
712 gpio_request(GPIO_FN_RMII_RXD0, NULL);
713 gpio_request(GPIO_FN_RMII_RXD1, NULL);
714 gpio_request(GPIO_FN_RMII_TXD0, NULL);
715 gpio_request(GPIO_FN_RMII_TXD1, NULL);
716 gpio_request(GPIO_FN_RMII_REF_CLK, NULL);
717 gpio_request(GPIO_FN_RMII_TX_EN, NULL);
718 gpio_request(GPIO_FN_RMII_RX_ER, NULL);
719 gpio_request(GPIO_FN_RMII_CRS_DV, NULL);
720 gpio_request(GPIO_FN_MDIO, NULL);
721 gpio_request(GPIO_FN_MDC, NULL);
722 gpio_request(GPIO_PTX5, NULL);
723 gpio_direction_input(GPIO_PTX5);
724 sh_eth_init();
725
Kuninori Morimoto287c1292009-05-26 07:04:52 +0000726 if (sw & SW41_B) {
Kuninori Morimoto4f324312009-08-03 04:52:03 +0000727 /* 720p */
728 lcdc_info.ch[0].lcd_cfg.xres = 1280;
729 lcdc_info.ch[0].lcd_cfg.yres = 720;
730 lcdc_info.ch[0].lcd_cfg.left_margin = 220;
731 lcdc_info.ch[0].lcd_cfg.right_margin = 110;
732 lcdc_info.ch[0].lcd_cfg.hsync_len = 40;
733 lcdc_info.ch[0].lcd_cfg.upper_margin = 20;
734 lcdc_info.ch[0].lcd_cfg.lower_margin = 5;
735 lcdc_info.ch[0].lcd_cfg.vsync_len = 5;
Kuninori Morimoto287c1292009-05-26 07:04:52 +0000736 } else {
737 /* VGA */
738 lcdc_info.ch[0].lcd_cfg.xres = 640;
739 lcdc_info.ch[0].lcd_cfg.yres = 480;
740 lcdc_info.ch[0].lcd_cfg.left_margin = 105;
741 lcdc_info.ch[0].lcd_cfg.right_margin = 50;
742 lcdc_info.ch[0].lcd_cfg.hsync_len = 96;
743 lcdc_info.ch[0].lcd_cfg.upper_margin = 33;
744 lcdc_info.ch[0].lcd_cfg.lower_margin = 10;
745 lcdc_info.ch[0].lcd_cfg.vsync_len = 2;
746 }
747
748 if (sw & SW41_A) {
749 /* Digital monitor */
750 lcdc_info.ch[0].interface_type = RGB18;
751 lcdc_info.ch[0].flags = 0;
752 } else {
753 /* Analog monitor */
754 lcdc_info.ch[0].interface_type = RGB24;
755 lcdc_info.ch[0].flags = LCDC_FLAGS_DWPOL;
756 }
757
758 return platform_add_devices(ms7724se_devices,
Kuninori Morimotoa80cad92009-06-26 07:05:39 +0000759 ARRAY_SIZE(ms7724se_devices));
Kuninori Morimoto287c1292009-05-26 07:04:52 +0000760}
761device_initcall(devices_setup);
762
763static struct sh_machine_vector mv_ms7724se __initmv = {
764 .mv_name = "ms7724se",
765 .mv_init_irq = init_se7724_IRQ,
766 .mv_nr_irqs = SE7724_FPGA_IRQ_BASE + SE7724_FPGA_IRQ_NR,
767};