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Vimal Singhc2798e92010-02-15 10:03:33 -08001/*
2 * board-sdp-flash.c
3 * Modified from mach-omap2/board-3430sdp-flash.c
4 *
5 * Copyright (C) 2009 Nokia Corporation
6 * Copyright (C) 2009 Texas Instruments
7 *
8 * Vimal Singh <vimalsingh@ti.com>
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
13 */
14
15#include <linux/kernel.h>
16#include <linux/platform_device.h>
17#include <linux/mtd/physmap.h>
18#include <linux/io.h>
19
20#include <plat/gpmc.h>
21#include <plat/nand.h>
22#include <plat/onenand.h>
23#include <plat/tc.h>
Manjunath Kondaiah G04aeae72010-10-08 09:58:35 -070024
25#include "board-flash.h"
Vimal Singhc2798e92010-02-15 10:03:33 -080026
27#define REG_FPGA_REV 0x10
28#define REG_FPGA_DIP_SWITCH_INPUT2 0x60
29#define MAX_SUPPORTED_GPMC_CONFIG 3
30
31#define DEBUG_BASE 0x08000000 /* debug board */
32
Vimal Singhc2798e92010-02-15 10:03:33 -080033/* various memory sizes */
34#define FLASH_SIZE_SDPV1 SZ_64M /* NOR flash (64 Meg aligned) */
35#define FLASH_SIZE_SDPV2 SZ_128M /* NOR flash (256 Meg aligned) */
36
Sukumar Ghorai13d6b732010-07-09 14:27:47 +000037static struct physmap_flash_data board_nor_data = {
Vimal Singhc2798e92010-02-15 10:03:33 -080038 .width = 2,
39};
40
Sukumar Ghorai13d6b732010-07-09 14:27:47 +000041static struct resource board_nor_resource = {
Vimal Singhc2798e92010-02-15 10:03:33 -080042 .flags = IORESOURCE_MEM,
43};
44
Sukumar Ghorai13d6b732010-07-09 14:27:47 +000045static struct platform_device board_nor_device = {
Vimal Singhc2798e92010-02-15 10:03:33 -080046 .name = "physmap-flash",
47 .id = 0,
48 .dev = {
Sukumar Ghorai13d6b732010-07-09 14:27:47 +000049 .platform_data = &board_nor_data,
Vimal Singhc2798e92010-02-15 10:03:33 -080050 },
51 .num_resources = 1,
Sukumar Ghorai13d6b732010-07-09 14:27:47 +000052 .resource = &board_nor_resource,
Vimal Singhc2798e92010-02-15 10:03:33 -080053};
54
55static void
Sukumar Ghorai13d6b732010-07-09 14:27:47 +000056__init board_nor_init(struct mtd_partition *nor_parts, u8 nr_parts, u8 cs)
Vimal Singhc2798e92010-02-15 10:03:33 -080057{
58 int err;
59
Sukumar Ghorai13d6b732010-07-09 14:27:47 +000060 board_nor_data.parts = nor_parts;
61 board_nor_data.nr_parts = nr_parts;
Vimal Singhc2798e92010-02-15 10:03:33 -080062
63 /* Configure start address and size of NOR device */
64 if (omap_rev() >= OMAP3430_REV_ES1_0) {
65 err = gpmc_cs_request(cs, FLASH_SIZE_SDPV2 - 1,
Sukumar Ghorai13d6b732010-07-09 14:27:47 +000066 (unsigned long *)&board_nor_resource.start);
67 board_nor_resource.end = board_nor_resource.start
Vimal Singhc2798e92010-02-15 10:03:33 -080068 + FLASH_SIZE_SDPV2 - 1;
69 } else {
70 err = gpmc_cs_request(cs, FLASH_SIZE_SDPV1 - 1,
Sukumar Ghorai13d6b732010-07-09 14:27:47 +000071 (unsigned long *)&board_nor_resource.start);
72 board_nor_resource.end = board_nor_resource.start
Vimal Singhc2798e92010-02-15 10:03:33 -080073 + FLASH_SIZE_SDPV1 - 1;
74 }
75 if (err < 0) {
76 printk(KERN_ERR "NOR: Can't request GPMC CS\n");
77 return;
78 }
Sukumar Ghorai13d6b732010-07-09 14:27:47 +000079 if (platform_device_register(&board_nor_device) < 0)
Vimal Singhc2798e92010-02-15 10:03:33 -080080 printk(KERN_ERR "Unable to register NOR device\n");
81}
82
83#if defined(CONFIG_MTD_ONENAND_OMAP2) || \
84 defined(CONFIG_MTD_ONENAND_OMAP2_MODULE)
85static struct omap_onenand_platform_data board_onenand_data = {
86 .dma_channel = -1, /* disable DMA in OMAP OneNAND driver */
87};
88
89static void
Sukumar Ghorai13d6b732010-07-09 14:27:47 +000090__init board_onenand_init(struct mtd_partition *onenand_parts,
91 u8 nr_parts, u8 cs)
Vimal Singhc2798e92010-02-15 10:03:33 -080092{
93 board_onenand_data.cs = cs;
Sukumar Ghorai13d6b732010-07-09 14:27:47 +000094 board_onenand_data.parts = onenand_parts;
95 board_onenand_data.nr_parts = nr_parts;
Vimal Singhc2798e92010-02-15 10:03:33 -080096
97 gpmc_onenand_init(&board_onenand_data);
98}
99#else
100static void
Sukumar Ghorai13d6b732010-07-09 14:27:47 +0000101__init board_onenand_init(struct mtd_partition *nor_parts, u8 nr_parts, u8 cs)
Vimal Singhc2798e92010-02-15 10:03:33 -0800102{
103}
104#endif /* CONFIG_MTD_ONENAND_OMAP2 || CONFIG_MTD_ONENAND_OMAP2_MODULE */
105
106#if defined(CONFIG_MTD_NAND_OMAP2) || \
107 defined(CONFIG_MTD_NAND_OMAP2_MODULE)
108
109/* Note that all values in this struct are in nanoseconds */
110static struct gpmc_timings nand_timings = {
111
112 .sync_clk = 0,
113
114 .cs_on = 0,
115 .cs_rd_off = 36,
116 .cs_wr_off = 36,
117
118 .adv_on = 6,
119 .adv_rd_off = 24,
120 .adv_wr_off = 36,
121
122 .we_off = 30,
123 .oe_off = 48,
124
125 .access = 54,
126 .rd_cycle = 72,
127 .wr_cycle = 72,
128
129 .wr_access = 30,
130 .wr_data_mux_bus = 0,
131};
132
Sukumar Ghorai13d6b732010-07-09 14:27:47 +0000133static struct omap_nand_platform_data board_nand_data = {
Vimal Singhc2798e92010-02-15 10:03:33 -0800134 .nand_setup = NULL,
135 .gpmc_t = &nand_timings,
136 .dma_channel = -1, /* disable DMA in OMAP NAND driver */
137 .dev_ready = NULL,
138 .devsize = 0, /* '0' for 8-bit, '1' for 16-bit device */
139};
140
Sukumar Ghorai13d6b732010-07-09 14:27:47 +0000141void
Sukumar Ghoraid5ce2b62011-01-28 15:42:03 +0530142__init board_nand_init(struct mtd_partition *nand_parts,
143 u8 nr_parts, u8 cs, int nand_type)
Vimal Singhc2798e92010-02-15 10:03:33 -0800144{
Sukumar Ghorai13d6b732010-07-09 14:27:47 +0000145 board_nand_data.cs = cs;
146 board_nand_data.parts = nand_parts;
Sukumar Ghoraid5ce2b62011-01-28 15:42:03 +0530147 board_nand_data.nr_parts = nr_parts;
148 board_nand_data.devsize = nand_type;
Vimal Singhc2798e92010-02-15 10:03:33 -0800149
Sukumar Ghorai13d6b732010-07-09 14:27:47 +0000150 gpmc_nand_init(&board_nand_data);
Vimal Singhc2798e92010-02-15 10:03:33 -0800151}
152#else
Sukumar Ghorai13d6b732010-07-09 14:27:47 +0000153void
154__init board_nand_init(struct mtd_partition *nand_parts, u8 nr_parts, u8 cs)
Vimal Singhc2798e92010-02-15 10:03:33 -0800155{
156}
157#endif /* CONFIG_MTD_NAND_OMAP2 || CONFIG_MTD_NAND_OMAP2_MODULE */
158
159/**
160 * get_gpmc0_type - Reads the FPGA DIP_SWITCH_INPUT_REGISTER2 to get
161 * the various cs values.
162 */
163static u8 get_gpmc0_type(void)
164{
165 u8 cs = 0;
166 void __iomem *fpga_map_addr;
167
168 fpga_map_addr = ioremap(DEBUG_BASE, 4096);
169 if (!fpga_map_addr)
170 return -ENOMEM;
171
172 if (!(__raw_readw(fpga_map_addr + REG_FPGA_REV)))
173 /* we dont have an DEBUG FPGA??? */
174 /* Depend on #defines!! default to strata boot return param */
175 goto unmap;
176
177 /* S8-DIP-OFF = 1, S8-DIP-ON = 0 */
178 cs = __raw_readw(fpga_map_addr + REG_FPGA_DIP_SWITCH_INPUT2) & 0xf;
179
180 /* ES2.0 SDP's onwards 4 dip switches are provided for CS */
181 if (omap_rev() >= OMAP3430_REV_ES1_0)
182 /* change (S8-1:4=DS-2:0) to (S8-4:1=DS-2:0) */
183 cs = ((cs & 8) >> 3) | ((cs & 4) >> 1) |
184 ((cs & 2) << 1) | ((cs & 1) << 3);
185 else
186 /* change (S8-1:3=DS-2:0) to (S8-3:1=DS-2:0) */
187 cs = ((cs & 4) >> 2) | (cs & 2) | ((cs & 1) << 2);
188unmap:
189 iounmap(fpga_map_addr);
190 return cs;
191}
192
193/**
194 * sdp3430_flash_init - Identify devices connected to GPMC and register.
195 *
196 * @return - void.
197 */
Sukumar Ghorai13d6b732010-07-09 14:27:47 +0000198void board_flash_init(struct flash_partitions partition_info[],
Sukumar Ghoraid5ce2b62011-01-28 15:42:03 +0530199 char chip_sel_board[][GPMC_CS_NUM], int nand_type)
Vimal Singhc2798e92010-02-15 10:03:33 -0800200{
201 u8 cs = 0;
202 u8 norcs = GPMC_CS_NUM + 1;
203 u8 nandcs = GPMC_CS_NUM + 1;
204 u8 onenandcs = GPMC_CS_NUM + 1;
205 u8 idx;
206 unsigned char *config_sel = NULL;
207
208 /* REVISIT: Is this return correct idx for 2430 SDP?
209 * for which cs configuration matches for 2430 SDP?
210 */
211 idx = get_gpmc0_type();
212 if (idx >= MAX_SUPPORTED_GPMC_CONFIG) {
213 printk(KERN_ERR "%s: Invalid chip select: %d\n", __func__, cs);
214 return;
215 }
Sukumar Ghorai13d6b732010-07-09 14:27:47 +0000216 config_sel = (unsigned char *)(chip_sel_board[idx]);
Vimal Singhc2798e92010-02-15 10:03:33 -0800217
218 while (cs < GPMC_CS_NUM) {
219 switch (config_sel[cs]) {
220 case PDC_NOR:
221 if (norcs > GPMC_CS_NUM)
222 norcs = cs;
223 break;
224 case PDC_NAND:
225 if (nandcs > GPMC_CS_NUM)
226 nandcs = cs;
227 break;
228 case PDC_ONENAND:
229 if (onenandcs > GPMC_CS_NUM)
230 onenandcs = cs;
231 break;
232 };
233 cs++;
234 }
235
236 if (norcs > GPMC_CS_NUM)
Thomas Weber31849482010-03-25 20:21:54 +0000237 printk(KERN_INFO "NOR: Unable to find configuration "
238 "in GPMC\n");
Vimal Singhc2798e92010-02-15 10:03:33 -0800239 else
Sukumar Ghorai13d6b732010-07-09 14:27:47 +0000240 board_nor_init(partition_info[0].parts,
241 partition_info[0].nr_parts, norcs);
Vimal Singhc2798e92010-02-15 10:03:33 -0800242
243 if (onenandcs > GPMC_CS_NUM)
244 printk(KERN_INFO "OneNAND: Unable to find configuration "
Thomas Weber31849482010-03-25 20:21:54 +0000245 "in GPMC\n");
Vimal Singhc2798e92010-02-15 10:03:33 -0800246 else
Sukumar Ghorai13d6b732010-07-09 14:27:47 +0000247 board_onenand_init(partition_info[1].parts,
248 partition_info[1].nr_parts, onenandcs);
Vimal Singhc2798e92010-02-15 10:03:33 -0800249
250 if (nandcs > GPMC_CS_NUM)
251 printk(KERN_INFO "NAND: Unable to find configuration "
Thomas Weber31849482010-03-25 20:21:54 +0000252 "in GPMC\n");
Vimal Singhc2798e92010-02-15 10:03:33 -0800253 else
Sukumar Ghorai13d6b732010-07-09 14:27:47 +0000254 board_nand_init(partition_info[2].parts,
Sukumar Ghoraid5ce2b62011-01-28 15:42:03 +0530255 partition_info[2].nr_parts, nandcs, nand_type);
Vimal Singhc2798e92010-02-15 10:03:33 -0800256}