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Pratik Patel17f3b822011-11-21 12:41:47 -08001/* Copyright (c) 2011-2012, Code Aurora Forum. All rights reserved.
Pratik Patel7831c082011-06-08 21:44:37 -07002 *
3 * This program is free software; you can redistribute it and/or modify
4 * it under the terms of the GNU General Public License version 2 and
5 * only version 2 as published by the Free Software Foundation.
6 *
7 * This program is distributed in the hope that it will be useful,
8 * but WITHOUT ANY WARRANTY; without even the implied warranty of
9 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
10 * GNU General Public License for more details.
11 */
12
13#ifndef _ARCH_ARM_MACH_MSM_QDSS_H_
14#define _ARCH_ARM_MACH_MSM_QDSS_H_
15
Pratik Patelcf418622011-09-22 11:15:11 -070016#include <linux/bitops.h>
17
Pratik Patel17f3b822011-11-21 12:41:47 -080018/* Coresight management registers (0xF00-0xFCC)
19 * 0xFA0 - 0xFA4: Management registers in PFTv1.0
20 * Trace registers in PFTv1.1
21 */
Pratik Patel7831c082011-06-08 21:44:37 -070022#define CS_ITCTRL (0xF00)
23#define CS_CLAIMSET (0xFA0)
24#define CS_CLAIMCLR (0xFA4)
25#define CS_LAR (0xFB0)
26#define CS_LSR (0xFB4)
27#define CS_AUTHSTATUS (0xFB8)
28#define CS_DEVID (0xFC8)
29#define CS_DEVTYPE (0xFCC)
30/* Peripheral id registers (0xFD0-0xFEC) */
31#define CS_PIDR4 (0xFD0)
32#define CS_PIDR5 (0xFD4)
33#define CS_PIDR6 (0xFD8)
34#define CS_PIDR7 (0xFDC)
35#define CS_PIDR0 (0xFE0)
36#define CS_PIDR1 (0xFE4)
37#define CS_PIDR2 (0xFE8)
38#define CS_PIDR3 (0xFEC)
39/* Component id registers (0xFF0-0xFFC) */
40#define CS_CIDR0 (0xFF0)
41#define CS_CIDR1 (0xFF4)
42#define CS_CIDR2 (0xFF8)
43#define CS_CIDR3 (0xFFC)
44
Pratik Patel17f3b822011-11-21 12:41:47 -080045/* DBGv7 with baseline CP14 registers implemented */
46#define ARM_DEBUG_ARCH_V7B (0x3)
47/* DBGv7 with all CP14 registers implemented */
48#define ARM_DEBUG_ARCH_V7 (0x4)
49#define ARM_DEBUG_ARCH_V7_1 (0x5)
50#define ETM_ARCH_V3_3 (0x23)
51#define PFT_ARCH_V1_1 (0x31)
Pratik Patel7831c082011-06-08 21:44:37 -070052
Pratik Patel17f3b822011-11-21 12:41:47 -080053#define TIMEOUT_US (100)
54#define OSLOCK_MAGIC (0xC5ACCE55)
55#define CS_UNLOCK_MAGIC (0xC5ACCE55)
Pratik Patel7831c082011-06-08 21:44:37 -070056
57#define BM(lsb, msb) ((BIT(msb) - BIT(lsb)) + BIT(msb))
58#define BMVAL(val, lsb, msb) ((val & BM(lsb, msb)) >> lsb)
59#define BVAL(val, n) ((val & BIT(n)) >> n)
60
Pratik Patel59e29942011-12-27 10:31:33 -080061int etb_init(void);
62void etb_exit(void);
63int tpiu_init(void);
64void tpiu_exit(void);
65int funnel_init(void);
66void funnel_exit(void);
67int ptm_init(void);
68void ptm_exit(void);
69
Pratik Patel7831c082011-06-08 21:44:37 -070070void etb_enable(void);
71void etb_disable(void);
72void etb_dump(void);
73void tpiu_disable(void);
74void funnel_enable(uint8_t id, uint32_t port_mask);
75void funnel_disable(uint8_t id, uint32_t port_mask);
Pratik Patel74929432011-12-26 12:03:41 -080076int qdss_clk_enable(void);
77void qdss_clk_disable(void);
Pratik Patel7831c082011-06-08 21:44:37 -070078
Pratik Patel17f3b822011-11-21 12:41:47 -080079#ifdef CONFIG_MSM_JTAG
80extern void msm_jtag_save_state(void);
81extern void msm_jtag_restore_state(void);
Pratik Patelfd6f56a2011-10-10 17:47:55 -070082#else
Pratik Patel17f3b822011-11-21 12:41:47 -080083static inline void msm_jtag_save_state(void) {}
84static inline void msm_jtag_restore_state(void) {}
Pratik Patele5771792011-09-17 18:33:54 -070085#endif
86
Pratik Patel7831c082011-06-08 21:44:37 -070087#endif