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Pavankumar Kondetie0c201f2010-12-07 17:53:55 +05301/*
2 * Copyright (C) 2007 Google, Inc.
3 * Author: Brian Swetland <swetland@google.com>
4 *
5 * This software is licensed under the terms of the GNU General Public
6 * License version 2, as published by the Free Software Foundation, and
7 * may be copied, distributed, and modified under those terms.
8 *
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
13 *
14 */
15
16#ifndef __LINUX_USB_GADGET_MSM72K_UDC_H__
17#define __LINUX_USB_GADGET_MSM72K_UDC_H__
18
Pavankumar Kondetie0c201f2010-12-07 17:53:55 +053019#define USB_AHBBURST (MSM_USB_BASE + 0x0090)
20#define USB_AHBMODE (MSM_USB_BASE + 0x0098)
Amit Blay1572b492012-11-27 16:45:32 +020021#define USB_GENCONFIG (MSM_USB_BASE + 0x009C)
Vamsi Krishna1a1684b2013-03-02 16:14:52 -080022#define USB_GENCONFIG2 (MSM_USB_BASE + 0x00A0)
Pavankumar Kondetie0c201f2010-12-07 17:53:55 +053023#define USB_CAPLENGTH (MSM_USB_BASE + 0x0100) /* 8 bit */
Vamsi Krishnafce1bd22012-08-17 17:12:26 -070024#define USB_HS_GPTIMER_BASE (MSM_USB_BASE + 0x80)
Pavankumar Kondetie0c201f2010-12-07 17:53:55 +053025
Vamsi Krishna1a1684b2013-03-02 16:14:52 -080026#define GENCFG2_SESS_VLD_CTRL_EN BIT(7)
27
Pavankumar Kondetie0c201f2010-12-07 17:53:55 +053028#define USB_USBCMD (MSM_USB_BASE + 0x0140)
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070029#define USB_USBSTS (MSM_USB_BASE + 0x0144)
Pavankumar Kondetie0c201f2010-12-07 17:53:55 +053030#define USB_PORTSC (MSM_USB_BASE + 0x0184)
31#define USB_OTGSC (MSM_USB_BASE + 0x01A4)
32#define USB_USBMODE (MSM_USB_BASE + 0x01A8)
Pavankumar Kondeti04aebcb2011-05-04 10:19:49 +053033#define USB_PHY_CTRL (MSM_USB_BASE + 0x0240)
Vijayavardhan Vennapusa1f5da0b2013-01-08 20:03:57 +053034#define USB_PHY_CTRL2 (MSM_USB_BASE + 0x0278)
Pavankumar Kondetie0c201f2010-12-07 17:53:55 +053035
Vamsi Krishna1a1684b2013-03-02 16:14:52 -080036#define USBCMD_RESET 2
37#define USBCMD_SESS_VLD_CTRL BIT(25)
38
Pavankumar Kondetie0c201f2010-12-07 17:53:55 +053039#define USB_USBINTR (MSM_USB_BASE + 0x0148)
Hemant Kumar8fdc3982012-08-21 12:22:27 -070040#define USB_FRINDEX (MSM_USB_BASE + 0x014C)
Pavankumar Kondetie0c201f2010-12-07 17:53:55 +053041
42#define PORTSC_PHCD (1 << 23) /* phy suspend mode */
43#define PORTSC_PTS_MASK (3 << 30)
44#define PORTSC_PTS_ULPI (3 << 30)
Pavankumar Kondeti9ec21d32012-05-07 15:50:23 +053045#define PORTSC_LS (3 << 10)
46#define PORTSC_LS_DM (1 << 10)
Vijayavardhan Vennapusaa3152032012-03-05 16:29:30 +053047#define PORTSC_CSC (1 << 1)
48#define PORTSC_CCS (1 << 0)
Pavankumar Kondetie0c201f2010-12-07 17:53:55 +053049
50#define USB_ULPI_VIEWPORT (MSM_USB_BASE + 0x0170)
51#define ULPI_RUN (1 << 30)
52#define ULPI_WRITE (1 << 29)
53#define ULPI_READ (0 << 29)
Vijayavardhan Vennapusa39025fe2011-10-15 05:55:10 +053054#define ULPI_SYNC_STATE (1 << 27)
Pavankumar Kondetie0c201f2010-12-07 17:53:55 +053055#define ULPI_ADDR(n) (((n) & 255) << 16)
56#define ULPI_DATA(n) ((n) & 255)
57#define ULPI_DATA_READ(n) (((n) >> 8) & 255)
58
Amit Blay1572b492012-11-27 16:45:32 +020059#define GENCONFIG_BAM_DISABLE (1 << 13)
60
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070061/* synopsys 28nm phy registers */
62#define ULPI_PWR_CLK_MNG_REG 0x88
63#define OTG_COMP_DISABLE BIT(0)
64
Vamsi Krishna1a1684b2013-03-02 16:14:52 -080065/* ulpi manual dp registers */
66#define ULPI_MISC_A 0x96
67#define ULPI_MISC_A_VBUSVLDEXT BIT(0)
68#define ULPI_MISC_A_VBUSVLDEXTSEL BIT(1)
69
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070070#define PHY_ALT_INT (1 << 28) /* PHY alternate interrupt */
Pavankumar Kondeti87c01042010-12-07 17:53:58 +053071#define ASYNC_INTR_CTRL (1 << 29) /* Enable async interrupt */
72#define ULPI_STP_CTRL (1 << 30) /* Block communication with PHY */
Pavankumar Kondeti04aebcb2011-05-04 10:19:49 +053073#define PHY_RETEN (1 << 1) /* PHY retention enable/disable */
Amit Blay58b31472011-11-18 09:39:39 +020074#define PHY_IDHV_INTEN (1 << 8) /* PHY ID HV interrupt */
75#define PHY_OTGSESSVLDHV_INTEN (1 << 9) /* PHY Session Valid HV int. */
Pavankumar Kondeti87c01042010-12-07 17:53:58 +053076
Vijayavardhan Vennapusaa3152032012-03-05 16:29:30 +053077#define STS_PCI (1 << 2) /* R/WC - Port Change Detect */
78#define STS_URI (1 << 6) /* R/WC - RESET recv'd */
79#define STS_SLI (1 << 8) /* R/WC - suspend state entered */
80
Pavankumar Kondetie0c201f2010-12-07 17:53:55 +053081/* OTG definitions */
82#define OTGSC_INTSTS_MASK (0x7f << 16)
Pavankumar Kondetiaa449e12011-11-04 11:09:26 +053083#define OTGSC_IDPU (1 << 5)
Vijayavardhan Vennapusaa3152032012-03-05 16:29:30 +053084#define OTGSC_INTR_MASK (0x7f << 24)
85#define OTGSC_HADP (1 << 6)
Pavankumar Kondetie0c201f2010-12-07 17:53:55 +053086#define OTGSC_ID (1 << 8)
87#define OTGSC_BSV (1 << 11)
88#define OTGSC_IDIS (1 << 16)
89#define OTGSC_BSVIS (1 << 19)
90#define OTGSC_IDIE (1 << 24)
91#define OTGSC_BSVIE (1 << 27)
Vijayavardhan Vennapusaa3152032012-03-05 16:29:30 +053092#define OTGSC_DPIE (1 << 30)
93#define OTGSC_DPIS (1 << 22)
94
95/* OTG interrupt status mask */
96#define OTG_USBSTS_MASK (STS_PCI | STS_URI | STS_SLI | PHY_ALT_INT)
97#define OTG_OTGSTS_MASK (OTGSC_IDIS | OTGSC_BSVIS | OTGSC_DPIS)
Pavankumar Kondetie0c201f2010-12-07 17:53:55 +053098
99#endif /* __LINUX_USB_GADGET_MSM72K_UDC_H__ */