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Duy Truong790f06d2013-02-13 16:38:12 -08001/* Copyright (c) 2011-2012, The Linux Foundation. All rights reserved.
Kiran Kumar H Ndd128472011-12-01 09:35:34 -08002 *
3 * This program is free software; you can redistribute it and/or modify
4 * it under the terms of the GNU General Public License version 2 and
5 * only version 2 as published by the Free Software Foundation.
6 *
7 * This program is distributed in the hope that it will be useful,
8 * but WITHOUT ANY WARRANTY; without even the implied warranty of
9 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
10 * GNU General Public License for more details.
11 *
12 */
Shuzhen Wangce650862011-08-17 15:27:01 -070013#ifndef __MSM_ISP_H__
14#define __MSM_ISP_H__
15
Kiran Kumar H Ndd128472011-12-01 09:35:34 -080016#define BIT(nr) (1UL << (nr))
17
Shuzhen Wangce650862011-08-17 15:27:01 -070018/* ISP message IDs */
19#define MSG_ID_RESET_ACK 0
20#define MSG_ID_START_ACK 1
21#define MSG_ID_STOP_ACK 2
22#define MSG_ID_UPDATE_ACK 3
23#define MSG_ID_OUTPUT_P 4
24#define MSG_ID_OUTPUT_T 5
25#define MSG_ID_OUTPUT_S 6
26#define MSG_ID_OUTPUT_V 7
27#define MSG_ID_SNAPSHOT_DONE 8
28#define MSG_ID_STATS_AEC 9
29#define MSG_ID_STATS_AF 10
30#define MSG_ID_STATS_AWB 11
31#define MSG_ID_STATS_RS 12
32#define MSG_ID_STATS_CS 13
33#define MSG_ID_STATS_IHIST 14
34#define MSG_ID_STATS_SKIN 15
35#define MSG_ID_EPOCH1 16
36#define MSG_ID_EPOCH2 17
37#define MSG_ID_SYNC_TIMER0_DONE 18
38#define MSG_ID_SYNC_TIMER1_DONE 19
39#define MSG_ID_SYNC_TIMER2_DONE 20
40#define MSG_ID_ASYNC_TIMER0_DONE 21
41#define MSG_ID_ASYNC_TIMER1_DONE 22
42#define MSG_ID_ASYNC_TIMER2_DONE 23
43#define MSG_ID_ASYNC_TIMER3_DONE 24
44#define MSG_ID_AE_OVERFLOW 25
45#define MSG_ID_AF_OVERFLOW 26
46#define MSG_ID_AWB_OVERFLOW 27
47#define MSG_ID_RS_OVERFLOW 28
48#define MSG_ID_CS_OVERFLOW 29
49#define MSG_ID_IHIST_OVERFLOW 30
50#define MSG_ID_SKIN_OVERFLOW 31
51#define MSG_ID_AXI_ERROR 32
52#define MSG_ID_CAMIF_OVERFLOW 33
53#define MSG_ID_VIOLATION 34
54#define MSG_ID_CAMIF_ERROR 35
55#define MSG_ID_BUS_OVERFLOW 36
56#define MSG_ID_SOF_ACK 37
57#define MSG_ID_STOP_REC_ACK 38
Suresh Vankadara055cb8e2012-01-18 00:50:04 +053058#define MSG_ID_STATS_AWB_AEC 39
Kiran Kumar H Ndd128472011-12-01 09:35:34 -080059#define MSG_ID_OUTPUT_PRIMARY 40
60#define MSG_ID_OUTPUT_SECONDARY 41
Shuzhen Wang74768242011-09-02 17:38:01 -070061#define MSG_ID_STATS_COMPOSITE 42
Nishant Pandit28feb3d2012-04-26 23:56:22 +053062#define MSG_ID_OUTPUT_TERTIARY1 43
Kiran Kumar H N1bc7b222012-06-23 16:28:11 -070063#define MSG_ID_STOP_LS_ACK 44
Nishant Pandit5dd54422012-06-26 22:52:44 +053064#define MSG_ID_OUTPUT_TERTIARY2 45
Lakshmi Narayana Kalavalabc315ea2012-07-24 09:55:48 -070065#define MSG_ID_STATS_BG 46
66#define MSG_ID_STATS_BF 47
67#define MSG_ID_STATS_BHIST 48
Shuzhen Wang196a27c2012-07-23 23:01:52 -070068#define MSG_ID_RDI0_UPDATE_ACK 49
69#define MSG_ID_RDI1_UPDATE_ACK 50
70#define MSG_ID_RDI2_UPDATE_ACK 51
Nishant Panditd7785712012-07-31 19:09:11 +053071#define MSG_ID_PIX0_UPDATE_ACK 52
72#define MSG_ID_PREV_STOP_ACK 53
Peter Liuefc12252012-09-13 12:19:13 -070073#define MSG_ID_STATS_BE 54
Nishant Panditd7785712012-07-31 19:09:11 +053074
Shuzhen Wangce650862011-08-17 15:27:01 -070075
76/* ISP command IDs */
77#define VFE_CMD_DUMMY_0 0
78#define VFE_CMD_SET_CLK 1
79#define VFE_CMD_RESET 2
80#define VFE_CMD_START 3
81#define VFE_CMD_TEST_GEN_START 4
82#define VFE_CMD_OPERATION_CFG 5
83#define VFE_CMD_AXI_OUT_CFG 6
84#define VFE_CMD_CAMIF_CFG 7
85#define VFE_CMD_AXI_INPUT_CFG 8
86#define VFE_CMD_BLACK_LEVEL_CFG 9
Ujwal Pateledcbdcc2011-08-24 09:14:14 -070087#define VFE_CMD_MESH_ROLL_OFF_CFG 10
Shuzhen Wangce650862011-08-17 15:27:01 -070088#define VFE_CMD_DEMUX_CFG 11
89#define VFE_CMD_FOV_CFG 12
90#define VFE_CMD_MAIN_SCALER_CFG 13
91#define VFE_CMD_WB_CFG 14
92#define VFE_CMD_COLOR_COR_CFG 15
93#define VFE_CMD_RGB_G_CFG 16
94#define VFE_CMD_LA_CFG 17
95#define VFE_CMD_CHROMA_EN_CFG 18
96#define VFE_CMD_CHROMA_SUP_CFG 19
97#define VFE_CMD_MCE_CFG 20
98#define VFE_CMD_SK_ENHAN_CFG 21
99#define VFE_CMD_ASF_CFG 22
100#define VFE_CMD_S2Y_CFG 23
101#define VFE_CMD_S2CbCr_CFG 24
102#define VFE_CMD_CHROMA_SUBS_CFG 25
103#define VFE_CMD_OUT_CLAMP_CFG 26
104#define VFE_CMD_FRAME_SKIP_CFG 27
105#define VFE_CMD_DUMMY_1 28
106#define VFE_CMD_DUMMY_2 29
107#define VFE_CMD_DUMMY_3 30
108#define VFE_CMD_UPDATE 31
109#define VFE_CMD_BL_LVL_UPDATE 32
110#define VFE_CMD_DEMUX_UPDATE 33
111#define VFE_CMD_FOV_UPDATE 34
112#define VFE_CMD_MAIN_SCALER_UPDATE 35
113#define VFE_CMD_WB_UPDATE 36
114#define VFE_CMD_COLOR_COR_UPDATE 37
115#define VFE_CMD_RGB_G_UPDATE 38
116#define VFE_CMD_LA_UPDATE 39
117#define VFE_CMD_CHROMA_EN_UPDATE 40
118#define VFE_CMD_CHROMA_SUP_UPDATE 41
119#define VFE_CMD_MCE_UPDATE 42
120#define VFE_CMD_SK_ENHAN_UPDATE 43
121#define VFE_CMD_S2CbCr_UPDATE 44
122#define VFE_CMD_S2Y_UPDATE 45
123#define VFE_CMD_ASF_UPDATE 46
124#define VFE_CMD_FRAME_SKIP_UPDATE 47
125#define VFE_CMD_CAMIF_FRAME_UPDATE 48
126#define VFE_CMD_STATS_AF_UPDATE 49
127#define VFE_CMD_STATS_AE_UPDATE 50
128#define VFE_CMD_STATS_AWB_UPDATE 51
129#define VFE_CMD_STATS_RS_UPDATE 52
130#define VFE_CMD_STATS_CS_UPDATE 53
131#define VFE_CMD_STATS_SKIN_UPDATE 54
132#define VFE_CMD_STATS_IHIST_UPDATE 55
133#define VFE_CMD_DUMMY_4 56
134#define VFE_CMD_EPOCH1_ACK 57
135#define VFE_CMD_EPOCH2_ACK 58
136#define VFE_CMD_START_RECORDING 59
137#define VFE_CMD_STOP_RECORDING 60
138#define VFE_CMD_DUMMY_5 61
139#define VFE_CMD_DUMMY_6 62
140#define VFE_CMD_CAPTURE 63
141#define VFE_CMD_DUMMY_7 64
142#define VFE_CMD_STOP 65
143#define VFE_CMD_GET_HW_VERSION 66
144#define VFE_CMD_GET_FRAME_SKIP_COUNTS 67
145#define VFE_CMD_OUTPUT1_BUFFER_ENQ 68
146#define VFE_CMD_OUTPUT2_BUFFER_ENQ 69
147#define VFE_CMD_OUTPUT3_BUFFER_ENQ 70
148#define VFE_CMD_JPEG_OUT_BUF_ENQ 71
149#define VFE_CMD_RAW_OUT_BUF_ENQ 72
150#define VFE_CMD_RAW_IN_BUF_ENQ 73
151#define VFE_CMD_STATS_AF_ENQ 74
152#define VFE_CMD_STATS_AE_ENQ 75
153#define VFE_CMD_STATS_AWB_ENQ 76
154#define VFE_CMD_STATS_RS_ENQ 77
155#define VFE_CMD_STATS_CS_ENQ 78
156#define VFE_CMD_STATS_SKIN_ENQ 79
157#define VFE_CMD_STATS_IHIST_ENQ 80
158#define VFE_CMD_DUMMY_8 81
159#define VFE_CMD_JPEG_ENC_CFG 82
160#define VFE_CMD_DUMMY_9 83
161#define VFE_CMD_STATS_AF_START 84
162#define VFE_CMD_STATS_AF_STOP 85
163#define VFE_CMD_STATS_AE_START 86
164#define VFE_CMD_STATS_AE_STOP 87
165#define VFE_CMD_STATS_AWB_START 88
166#define VFE_CMD_STATS_AWB_STOP 89
167#define VFE_CMD_STATS_RS_START 90
168#define VFE_CMD_STATS_RS_STOP 91
169#define VFE_CMD_STATS_CS_START 92
170#define VFE_CMD_STATS_CS_STOP 93
171#define VFE_CMD_STATS_SKIN_START 94
172#define VFE_CMD_STATS_SKIN_STOP 95
173#define VFE_CMD_STATS_IHIST_START 96
174#define VFE_CMD_STATS_IHIST_STOP 97
175#define VFE_CMD_DUMMY_10 98
176#define VFE_CMD_SYNC_TIMER_SETTING 99
177#define VFE_CMD_ASYNC_TIMER_SETTING 100
178#define VFE_CMD_LIVESHOT 101
179#define VFE_CMD_LA_SETUP 102
180#define VFE_CMD_LINEARIZATION_CFG 103
181#define VFE_CMD_DEMOSAICV3 104
182#define VFE_CMD_DEMOSAICV3_ABCC_CFG 105
183#define VFE_CMD_DEMOSAICV3_DBCC_CFG 106
184#define VFE_CMD_DEMOSAICV3_DBPC_CFG 107
185#define VFE_CMD_DEMOSAICV3_ABF_CFG 108
186#define VFE_CMD_DEMOSAICV3_ABCC_UPDATE 109
187#define VFE_CMD_DEMOSAICV3_DBCC_UPDATE 110
188#define VFE_CMD_DEMOSAICV3_DBPC_UPDATE 111
189#define VFE_CMD_XBAR_CFG 112
Ujwal Patel1fe4c9c2011-10-07 12:19:52 -0700190#define VFE_CMD_MODULE_CFG 113
Shuzhen Wangce650862011-08-17 15:27:01 -0700191#define VFE_CMD_ZSL 114
192#define VFE_CMD_LINEARIZATION_UPDATE 115
193#define VFE_CMD_DEMOSAICV3_ABF_UPDATE 116
194#define VFE_CMD_CLF_CFG 117
195#define VFE_CMD_CLF_LUMA_UPDATE 118
196#define VFE_CMD_CLF_CHROMA_UPDATE 119
Ujwal Pateledcbdcc2011-08-24 09:14:14 -0700197#define VFE_CMD_PCA_ROLL_OFF_CFG 120
198#define VFE_CMD_PCA_ROLL_OFF_UPDATE 121
Ujwal Patel6e4308d2011-10-25 11:24:52 -0700199#define VFE_CMD_GET_REG_DUMP 122
200#define VFE_CMD_GET_LINEARIZATON_TABLE 123
201#define VFE_CMD_GET_MESH_ROLLOFF_TABLE 124
202#define VFE_CMD_GET_PCA_ROLLOFF_TABLE 125
203#define VFE_CMD_GET_RGB_G_TABLE 126
204#define VFE_CMD_GET_LA_TABLE 127
Azam Sadiq Pasha Kapatrala Syed5156dd42011-10-27 19:30:13 -0700205#define VFE_CMD_DEMOSAICV3_UPDATE 128
Suresh Vankadara055cb8e2012-01-18 00:50:04 +0530206#define VFE_CMD_ACTIVE_REGION_CFG 129
207#define VFE_CMD_COLOR_PROCESSING_CONFIG 130
208#define VFE_CMD_STATS_WB_AEC_CONFIG 131
209#define VFE_CMD_STATS_WB_AEC_UPDATE 132
210#define VFE_CMD_Y_GAMMA_CONFIG 133
211#define VFE_CMD_SCALE_OUTPUT1_CONFIG 134
212#define VFE_CMD_SCALE_OUTPUT2_CONFIG 135
Kiran Kumar H Ndd128472011-12-01 09:35:34 -0800213#define VFE_CMD_CAPTURE_RAW 136
214#define VFE_CMD_STOP_LIVESHOT 137
Sandeep Kodimelac6f78672012-03-07 10:44:04 +0530215#define VFE_CMD_RECONFIG_VFE 138
Lakshmi Narayana Kalavala2db33842012-06-26 22:41:32 -0700216#define VFE_CMD_STATS_REQBUF 139
217#define VFE_CMD_STATS_ENQUEUEBUF 140
218#define VFE_CMD_STATS_FLUSH_BUFQ 141
Lakshmi Narayana Kalavala58243db2012-07-24 00:06:27 -0700219#define VFE_CMD_STATS_UNREGBUF 142
Lakshmi Narayana Kalavalabc315ea2012-07-24 09:55:48 -0700220#define VFE_CMD_STATS_BG_START 143
221#define VFE_CMD_STATS_BG_STOP 144
222#define VFE_CMD_STATS_BF_START 145
223#define VFE_CMD_STATS_BF_STOP 146
224#define VFE_CMD_STATS_BHIST_START 147
225#define VFE_CMD_STATS_BHIST_STOP 148
Shuzhen Wang5c190ad2012-07-09 16:30:51 -0700226#define VFE_CMD_RESET_2 149
Kevin Chan99430572012-07-22 02:23:43 -0700227#define VFE_CMD_FOV_ENC_CFG 150
228#define VFE_CMD_FOV_VIEW_CFG 151
229#define VFE_CMD_FOV_ENC_UPDATE 152
230#define VFE_CMD_FOV_VIEW_UPDATE 153
231#define VFE_CMD_SCALER_ENC_CFG 154
232#define VFE_CMD_SCALER_VIEW_CFG 155
233#define VFE_CMD_SCALER_ENC_UPDATE 156
234#define VFE_CMD_SCALER_VIEW_UPDATE 157
235#define VFE_CMD_COLORXFORM_ENC_CFG 158
236#define VFE_CMD_COLORXFORM_VIEW_CFG 159
237#define VFE_CMD_COLORXFORM_ENC_UPDATE 160
238#define VFE_CMD_COLORXFORM_VIEW_UPDATE 161
239#define VFE_CMD_TEST_GEN_CFG 162
Peter Liuefc12252012-09-13 12:19:13 -0700240#define VFE_CMD_STATS_BE_START 163
241#define VFE_CMD_STATS_BE_STOP 164
Shuzhen Wang6b0f3322011-08-26 12:14:43 -0700242struct msm_isp_cmd {
243 int32_t id;
244 uint16_t length;
245 void *value;
246};
247
Mingcheng Zhu8e9f99e2011-08-26 16:33:32 -0700248#define VPE_CMD_DUMMY_0 0
249#define VPE_CMD_INIT 1
250#define VPE_CMD_DEINIT 2
251#define VPE_CMD_ENABLE 3
252#define VPE_CMD_DISABLE 4
253#define VPE_CMD_RESET 5
254#define VPE_CMD_FLUSH 6
255#define VPE_CMD_OPERATION_MODE_CFG 7
256#define VPE_CMD_INPUT_PLANE_CFG 8
257#define VPE_CMD_OUTPUT_PLANE_CFG 9
258#define VPE_CMD_INPUT_PLANE_UPDATE 10
259#define VPE_CMD_SCALE_CFG_TYPE 11
Mingcheng Zhu8e9f99e2011-08-26 16:33:32 -0700260#define VPE_CMD_ZOOM 13
Kevin Chan318d7cb2011-11-29 14:24:26 -0800261#define VPE_CMD_MAX 14
Mingcheng Zhu8e9f99e2011-08-26 16:33:32 -0700262
263#define MSM_PP_CMD_TYPE_NOT_USED 0 /* not used */
264#define MSM_PP_CMD_TYPE_VPE 1 /* VPE cmd */
265#define MSM_PP_CMD_TYPE_MCTL 2 /* MCTL cmd */
266
267#define MCTL_CMD_DUMMY_0 0 /* not used */
268#define MCTL_CMD_GET_FRAME_BUFFER 1 /* reserve a free frame buffer */
269#define MCTL_CMD_PUT_FRAME_BUFFER 2 /* return the free frame buffer */
270#define MCTL_CMD_DIVERT_FRAME_PP_PATH 3 /* divert frame for pp */
Mingcheng Zhu8e9f99e2011-08-26 16:33:32 -0700271
272/* event typese sending to MCTL PP module */
273#define MCTL_PP_EVENT_NOTUSED 0
274#define MCTL_PP_EVENT_CMD_ACK 1
275
Kiran Kumar H N8f68c592012-01-06 15:11:47 -0800276#define VPE_OPERATION_MODE_CFG_LEN 4
Mingcheng Zhu8e9f99e2011-08-26 16:33:32 -0700277#define VPE_INPUT_PLANE_CFG_LEN 24
Kiran Kumar H N8f68c592012-01-06 15:11:47 -0800278#define VPE_OUTPUT_PLANE_CFG_LEN 20
Mingcheng Zhu8e9f99e2011-08-26 16:33:32 -0700279#define VPE_INPUT_PLANE_UPDATE_LEN 12
280#define VPE_SCALER_CONFIG_LEN 260
281#define VPE_DIS_OFFSET_CFG_LEN 12
282
Jignesh Mehtabde84242012-02-16 13:21:22 -0800283
284#define CAPTURE_WIDTH 1280
285#define IMEM_Y_SIZE (CAPTURE_WIDTH*16)
286#define IMEM_CBCR_SIZE (CAPTURE_WIDTH*8)
287
288#define IMEM_Y_PING_OFFSET 0x2E000000
289#define IMEM_CBCR_PING_OFFSET (IMEM_Y_PING_OFFSET + IMEM_Y_SIZE)
290
291#define IMEM_Y_PONG_OFFSET (IMEM_CBCR_PING_OFFSET + IMEM_CBCR_SIZE)
292#define IMEM_CBCR_PONG_OFFSET (IMEM_Y_PONG_OFFSET + IMEM_Y_SIZE)
293
Jignesh Mehta6cf8a742012-02-04 23:40:50 -0800294
Mingcheng Zhu8e9f99e2011-08-26 16:33:32 -0700295struct msm_vpe_op_mode_cfg {
296 uint8_t op_mode_cfg[VPE_OPERATION_MODE_CFG_LEN];
297};
298
299struct msm_vpe_input_plane_cfg {
300 uint8_t input_plane_cfg[VPE_INPUT_PLANE_CFG_LEN];
301};
302
303struct msm_vpe_output_plane_cfg {
304 uint8_t output_plane_cfg[VPE_OUTPUT_PLANE_CFG_LEN];
305};
306
307struct msm_vpe_input_plane_update_cfg {
308 uint8_t input_plane_update_cfg[VPE_INPUT_PLANE_UPDATE_LEN];
309};
310
311struct msm_vpe_scaler_cfg {
312 uint8_t scaler_cfg[VPE_SCALER_CONFIG_LEN];
313};
314
Mingcheng Zhu8e9f99e2011-08-26 16:33:32 -0700315struct msm_vpe_flush_frame_buffer {
316 uint32_t src_buf_handle;
317 uint32_t dest_buf_handle;
318 int path;
319};
320
321struct msm_mctl_pp_frame_buffer {
322 uint32_t buf_handle;
323 int path;
324};
325struct msm_mctl_pp_divert_pp {
326 int path;
Mingcheng Zhu8feaa3f2011-11-23 11:33:52 -0800327 int enable;
Mingcheng Zhu8e9f99e2011-08-26 16:33:32 -0700328};
329struct msm_vpe_clock_rate {
330 uint32_t rate;
331};
Kiran Kumar H N2e68e332012-08-07 21:07:30 -0700332
Mingcheng Zhu8e9f99e2011-08-26 16:33:32 -0700333#define MSM_MCTL_PP_VPE_FRAME_ACK (1<<0)
334#define MSM_MCTL_PP_VPE_FRAME_TO_APP (1<<1)
335
Nishant Pandit5dd54422012-06-26 22:52:44 +0530336#define VFE_OUTPUTS_MAIN_AND_PREVIEW BIT(0)
337#define VFE_OUTPUTS_MAIN_AND_VIDEO BIT(1)
338#define VFE_OUTPUTS_MAIN_AND_THUMB BIT(2)
339#define VFE_OUTPUTS_THUMB_AND_MAIN BIT(3)
340#define VFE_OUTPUTS_PREVIEW_AND_VIDEO BIT(4)
341#define VFE_OUTPUTS_VIDEO_AND_PREVIEW BIT(5)
342#define VFE_OUTPUTS_PREVIEW BIT(6)
343#define VFE_OUTPUTS_VIDEO BIT(7)
344#define VFE_OUTPUTS_RAW BIT(8)
345#define VFE_OUTPUTS_JPEG_AND_THUMB BIT(9)
346#define VFE_OUTPUTS_THUMB_AND_JPEG BIT(10)
347#define VFE_OUTPUTS_RDI0 BIT(11)
348#define VFE_OUTPUTS_RDI1 BIT(12)
Kiran Kumar H Ndd128472011-12-01 09:35:34 -0800349
Kevin Chan2df27e62012-06-15 00:06:54 -0700350struct msm_frame_info {
Kiran Kumar H N90785902012-07-05 13:59:38 -0700351 uint32_t inst_handle;
Kevin Chan2df27e62012-06-15 00:06:54 -0700352 uint32_t path;
353};
354
Mingcheng Zhu8e9f99e2011-08-26 16:33:32 -0700355#endif /*__MSM_ISP_H__*/
356