blob: cafadcbcdf38acd7ff9224bc0ad674795db35013 [file] [log] [blame]
Linus Torvalds1da177e2005-04-16 15:20:36 -07001/* $Id: init.c,v 1.209 2002/02/09 19:49:31 davem Exp $
2 * arch/sparc64/mm/init.c
3 *
4 * Copyright (C) 1996-1999 David S. Miller (davem@caip.rutgers.edu)
5 * Copyright (C) 1997-1999 Jakub Jelinek (jj@sunsite.mff.cuni.cz)
6 */
7
David S. Millerc4bce902006-02-11 21:57:54 -08008#include <linux/module.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -07009#include <linux/kernel.h>
10#include <linux/sched.h>
11#include <linux/string.h>
12#include <linux/init.h>
13#include <linux/bootmem.h>
14#include <linux/mm.h>
15#include <linux/hugetlb.h>
16#include <linux/slab.h>
17#include <linux/initrd.h>
18#include <linux/swap.h>
19#include <linux/pagemap.h>
Randy Dunlapc9cf5522006-06-27 02:53:52 -070020#include <linux/poison.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070021#include <linux/fs.h>
22#include <linux/seq_file.h>
Prasanna S Panchamukhi05e14cb2005-09-06 15:19:30 -070023#include <linux/kprobes.h>
David S. Miller1ac4f5e2005-09-21 21:49:32 -070024#include <linux/cache.h>
David S. Miller13edad72005-09-29 17:58:26 -070025#include <linux/sort.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070026
27#include <asm/head.h>
28#include <asm/system.h>
29#include <asm/page.h>
30#include <asm/pgalloc.h>
31#include <asm/pgtable.h>
32#include <asm/oplib.h>
33#include <asm/iommu.h>
34#include <asm/io.h>
35#include <asm/uaccess.h>
36#include <asm/mmu_context.h>
37#include <asm/tlbflush.h>
38#include <asm/dma.h>
39#include <asm/starfire.h>
40#include <asm/tlb.h>
41#include <asm/spitfire.h>
42#include <asm/sections.h>
David S. Miller517af332006-02-01 15:55:21 -080043#include <asm/tsb.h>
David S. Miller481295f2006-02-07 21:51:08 -080044#include <asm/hypervisor.h>
David S. Miller372b07b2006-06-21 15:35:28 -070045#include <asm/prom.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070046
47extern void device_scan(void);
48
David S. Miller9cc3a1a2006-02-21 20:51:13 -080049#define MAX_PHYS_ADDRESS (1UL << 42UL)
50#define KPTE_BITMAP_CHUNK_SZ (256UL * 1024UL * 1024UL)
51#define KPTE_BITMAP_BYTES \
52 ((MAX_PHYS_ADDRESS / KPTE_BITMAP_CHUNK_SZ) / 8)
53
54unsigned long kern_linear_pte_xor[2] __read_mostly;
55
56/* A bitmap, one bit for every 256MB of physical memory. If the bit
57 * is clear, we should use a 4MB page (via kern_linear_pte_xor[0]) else
58 * if set we should use a 256MB page (via kern_linear_pte_xor[1]).
59 */
60unsigned long kpte_linear_bitmap[KPTE_BITMAP_BYTES / sizeof(unsigned long)];
61
David S. Millerd1acb422007-03-16 17:20:28 -070062#ifndef CONFIG_DEBUG_PAGEALLOC
David S. Millerd7744a02006-02-21 22:31:11 -080063/* A special kernel TSB for 4MB and 256MB linear mappings. */
64struct tsb swapper_4m_tsb[KERNEL_TSB4M_NENTRIES];
David S. Millerd1acb422007-03-16 17:20:28 -070065#endif
David S. Millerd7744a02006-02-21 22:31:11 -080066
David S. Miller13edad72005-09-29 17:58:26 -070067#define MAX_BANKS 32
David S. Miller10147572005-09-28 21:46:43 -070068
David S. Miller13edad72005-09-29 17:58:26 -070069static struct linux_prom64_registers pavail[MAX_BANKS] __initdata;
70static struct linux_prom64_registers pavail_rescan[MAX_BANKS] __initdata;
71static int pavail_ents __initdata;
72static int pavail_rescan_ents __initdata;
David S. Miller10147572005-09-28 21:46:43 -070073
David S. Miller13edad72005-09-29 17:58:26 -070074static int cmp_p64(const void *a, const void *b)
75{
76 const struct linux_prom64_registers *x = a, *y = b;
77
78 if (x->phys_addr > y->phys_addr)
79 return 1;
80 if (x->phys_addr < y->phys_addr)
81 return -1;
82 return 0;
83}
84
85static void __init read_obp_memory(const char *property,
86 struct linux_prom64_registers *regs,
87 int *num_ents)
88{
89 int node = prom_finddevice("/memory");
90 int prop_size = prom_getproplen(node, property);
91 int ents, ret, i;
92
93 ents = prop_size / sizeof(struct linux_prom64_registers);
94 if (ents > MAX_BANKS) {
95 prom_printf("The machine has more %s property entries than "
96 "this kernel can support (%d).\n",
97 property, MAX_BANKS);
98 prom_halt();
99 }
100
101 ret = prom_getproperty(node, property, (char *) regs, prop_size);
102 if (ret == -1) {
103 prom_printf("Couldn't get %s property from /memory.\n");
104 prom_halt();
105 }
106
David S. Miller13edad72005-09-29 17:58:26 -0700107 /* Sanitize what we got from the firmware, by page aligning
108 * everything.
109 */
110 for (i = 0; i < ents; i++) {
111 unsigned long base, size;
112
113 base = regs[i].phys_addr;
114 size = regs[i].reg_size;
115
116 size &= PAGE_MASK;
117 if (base & ~PAGE_MASK) {
118 unsigned long new_base = PAGE_ALIGN(base);
119
120 size -= new_base - base;
121 if ((long) size < 0L)
122 size = 0UL;
123 base = new_base;
124 }
David S. Miller0015d3d2007-03-15 00:06:34 -0700125 if (size == 0UL) {
126 /* If it is empty, simply get rid of it.
127 * This simplifies the logic of the other
128 * functions that process these arrays.
129 */
130 memmove(&regs[i], &regs[i + 1],
131 (ents - i - 1) * sizeof(regs[0]));
132 i--;
133 ents--;
134 continue;
135 }
David S. Miller13edad72005-09-29 17:58:26 -0700136 regs[i].phys_addr = base;
137 regs[i].reg_size = size;
138 }
David S. Miller486ad102006-06-22 00:00:00 -0700139
David S. Miller486ad102006-06-22 00:00:00 -0700140 *num_ents = ents;
141
David S. Millerc9c10832005-10-12 12:22:46 -0700142 sort(regs, ents, sizeof(struct linux_prom64_registers),
David S. Miller13edad72005-09-29 17:58:26 -0700143 cmp_p64, NULL);
144}
Linus Torvalds1da177e2005-04-16 15:20:36 -0700145
David S. Miller2bdb3cb2005-09-22 01:08:57 -0700146unsigned long *sparc64_valid_addr_bitmap __read_mostly;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700147
David S. Millerd1112012006-03-08 02:16:07 -0800148/* Kernel physical address base and size in bytes. */
David S. Miller1ac4f5e2005-09-21 21:49:32 -0700149unsigned long kern_base __read_mostly;
150unsigned long kern_size __read_mostly;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700151
Linus Torvalds1da177e2005-04-16 15:20:36 -0700152/* Initial ramdisk setup */
153extern unsigned long sparc_ramdisk_image64;
154extern unsigned int sparc_ramdisk_image;
155extern unsigned int sparc_ramdisk_size;
156
David S. Miller1ac4f5e2005-09-21 21:49:32 -0700157struct page *mem_map_zero __read_mostly;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700158
David S. Miller0835ae02005-10-04 15:23:20 -0700159unsigned int sparc64_highest_unlocked_tlb_ent __read_mostly;
160
161unsigned long sparc64_kern_pri_context __read_mostly;
162unsigned long sparc64_kern_pri_nuc_bits __read_mostly;
163unsigned long sparc64_kern_sec_context __read_mostly;
164
Linus Torvalds1da177e2005-04-16 15:20:36 -0700165int bigkernel = 0;
166
Christoph Lametere18b8902006-12-06 20:33:20 -0800167struct kmem_cache *pgtable_cache __read_mostly;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700168
Christoph Lametere18b8902006-12-06 20:33:20 -0800169static void zero_ctor(void *addr, struct kmem_cache *cache, unsigned long flags)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700170{
David S. Miller3c936462006-01-31 18:30:27 -0800171 clear_page(addr);
172}
173
David S. Miller9b4006d2006-03-18 18:12:42 -0800174extern void tsb_cache_init(void);
175
David S. Miller3c936462006-01-31 18:30:27 -0800176void pgtable_cache_init(void)
177{
178 pgtable_cache = kmem_cache_create("pgtable_cache",
179 PAGE_SIZE, PAGE_SIZE,
180 SLAB_HWCACHE_ALIGN |
181 SLAB_MUST_HWCACHE_ALIGN,
182 zero_ctor,
183 NULL);
184 if (!pgtable_cache) {
David S. Miller9b4006d2006-03-18 18:12:42 -0800185 prom_printf("Could not create pgtable_cache\n");
David S. Miller3c936462006-01-31 18:30:27 -0800186 prom_halt();
Linus Torvalds1da177e2005-04-16 15:20:36 -0700187 }
David S. Miller9b4006d2006-03-18 18:12:42 -0800188 tsb_cache_init();
Linus Torvalds1da177e2005-04-16 15:20:36 -0700189}
190
191#ifdef CONFIG_DEBUG_DCFLUSH
192atomic_t dcpage_flushes = ATOMIC_INIT(0);
193#ifdef CONFIG_SMP
194atomic_t dcpage_flushes_xcall = ATOMIC_INIT(0);
195#endif
196#endif
197
David S. Miller7a591cf2006-02-26 19:44:50 -0800198inline void flush_dcache_page_impl(struct page *page)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700199{
David S. Miller7a591cf2006-02-26 19:44:50 -0800200 BUG_ON(tlb_type == hypervisor);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700201#ifdef CONFIG_DEBUG_DCFLUSH
202 atomic_inc(&dcpage_flushes);
203#endif
204
205#ifdef DCACHE_ALIASING_POSSIBLE
206 __flush_dcache_page(page_address(page),
207 ((tlb_type == spitfire) &&
208 page_mapping(page) != NULL));
209#else
210 if (page_mapping(page) != NULL &&
211 tlb_type == spitfire)
212 __flush_icache_page(__pa(page_address(page)));
213#endif
214}
215
216#define PG_dcache_dirty PG_arch_1
David S. Miller17b0e192006-03-08 15:57:03 -0800217#define PG_dcache_cpu_shift 24UL
218#define PG_dcache_cpu_mask (256UL - 1UL)
David S. Miller48b0e542005-07-27 16:08:44 -0700219
220#if NR_CPUS > 256
221#error D-cache dirty tracking and thread_info->cpu need fixing for > 256 cpus
222#endif
Linus Torvalds1da177e2005-04-16 15:20:36 -0700223
224#define dcache_dirty_cpu(page) \
David S. Miller48b0e542005-07-27 16:08:44 -0700225 (((page)->flags >> PG_dcache_cpu_shift) & PG_dcache_cpu_mask)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700226
227static __inline__ void set_dcache_dirty(struct page *page, int this_cpu)
228{
229 unsigned long mask = this_cpu;
David S. Miller48b0e542005-07-27 16:08:44 -0700230 unsigned long non_cpu_bits;
231
232 non_cpu_bits = ~(PG_dcache_cpu_mask << PG_dcache_cpu_shift);
233 mask = (mask << PG_dcache_cpu_shift) | (1UL << PG_dcache_dirty);
234
Linus Torvalds1da177e2005-04-16 15:20:36 -0700235 __asm__ __volatile__("1:\n\t"
236 "ldx [%2], %%g7\n\t"
237 "and %%g7, %1, %%g1\n\t"
238 "or %%g1, %0, %%g1\n\t"
239 "casx [%2], %%g7, %%g1\n\t"
240 "cmp %%g7, %%g1\n\t"
David S. Millerb445e262005-06-27 15:42:04 -0700241 "membar #StoreLoad | #StoreStore\n\t"
Linus Torvalds1da177e2005-04-16 15:20:36 -0700242 "bne,pn %%xcc, 1b\n\t"
David S. Millerb445e262005-06-27 15:42:04 -0700243 " nop"
Linus Torvalds1da177e2005-04-16 15:20:36 -0700244 : /* no outputs */
245 : "r" (mask), "r" (non_cpu_bits), "r" (&page->flags)
246 : "g1", "g7");
247}
248
249static __inline__ void clear_dcache_dirty_cpu(struct page *page, unsigned long cpu)
250{
251 unsigned long mask = (1UL << PG_dcache_dirty);
252
253 __asm__ __volatile__("! test_and_clear_dcache_dirty\n"
254 "1:\n\t"
255 "ldx [%2], %%g7\n\t"
David S. Miller48b0e542005-07-27 16:08:44 -0700256 "srlx %%g7, %4, %%g1\n\t"
Linus Torvalds1da177e2005-04-16 15:20:36 -0700257 "and %%g1, %3, %%g1\n\t"
258 "cmp %%g1, %0\n\t"
259 "bne,pn %%icc, 2f\n\t"
260 " andn %%g7, %1, %%g1\n\t"
261 "casx [%2], %%g7, %%g1\n\t"
262 "cmp %%g7, %%g1\n\t"
David S. Millerb445e262005-06-27 15:42:04 -0700263 "membar #StoreLoad | #StoreStore\n\t"
Linus Torvalds1da177e2005-04-16 15:20:36 -0700264 "bne,pn %%xcc, 1b\n\t"
David S. Millerb445e262005-06-27 15:42:04 -0700265 " nop\n"
Linus Torvalds1da177e2005-04-16 15:20:36 -0700266 "2:"
267 : /* no outputs */
268 : "r" (cpu), "r" (mask), "r" (&page->flags),
David S. Miller48b0e542005-07-27 16:08:44 -0700269 "i" (PG_dcache_cpu_mask),
270 "i" (PG_dcache_cpu_shift)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700271 : "g1", "g7");
272}
273
David S. Miller517af332006-02-01 15:55:21 -0800274static inline void tsb_insert(struct tsb *ent, unsigned long tag, unsigned long pte)
275{
276 unsigned long tsb_addr = (unsigned long) ent;
277
David S. Miller3b3ab2e2006-02-17 09:54:42 -0800278 if (tlb_type == cheetah_plus || tlb_type == hypervisor)
David S. Miller517af332006-02-01 15:55:21 -0800279 tsb_addr = __pa(tsb_addr);
280
281 __tsb_insert(tsb_addr, tag, pte);
282}
283
David S. Millerc4bce902006-02-11 21:57:54 -0800284unsigned long _PAGE_ALL_SZ_BITS __read_mostly;
285unsigned long _PAGE_SZBITS __read_mostly;
286
Linus Torvalds1da177e2005-04-16 15:20:36 -0700287void update_mmu_cache(struct vm_area_struct *vma, unsigned long address, pte_t pte)
288{
David S. Millerbd407912006-01-31 18:31:38 -0800289 struct mm_struct *mm;
David S. Miller74ae9982006-03-05 18:26:24 -0800290 struct tsb *tsb;
David S. Miller7a1ac522006-03-16 02:02:32 -0800291 unsigned long tag, flags;
David S. Millerdcc1e8d2006-03-22 00:49:59 -0800292 unsigned long tsb_index, tsb_hash_shift;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700293
David S. Miller7a591cf2006-02-26 19:44:50 -0800294 if (tlb_type != hypervisor) {
295 unsigned long pfn = pte_pfn(pte);
296 unsigned long pg_flags;
297 struct page *page;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700298
David S. Miller7a591cf2006-02-26 19:44:50 -0800299 if (pfn_valid(pfn) &&
300 (page = pfn_to_page(pfn), page_mapping(page)) &&
301 ((pg_flags = page->flags) & (1UL << PG_dcache_dirty))) {
302 int cpu = ((pg_flags >> PG_dcache_cpu_shift) &
303 PG_dcache_cpu_mask);
304 int this_cpu = get_cpu();
Linus Torvalds1da177e2005-04-16 15:20:36 -0700305
David S. Miller7a591cf2006-02-26 19:44:50 -0800306 /* This is just to optimize away some function calls
307 * in the SMP case.
308 */
309 if (cpu == this_cpu)
310 flush_dcache_page_impl(page);
311 else
312 smp_flush_dcache_page_impl(page, cpu);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700313
David S. Miller7a591cf2006-02-26 19:44:50 -0800314 clear_dcache_dirty_cpu(page, cpu);
315
316 put_cpu();
317 }
Linus Torvalds1da177e2005-04-16 15:20:36 -0700318 }
David S. Millerbd407912006-01-31 18:31:38 -0800319
320 mm = vma->vm_mm;
David S. Miller7a1ac522006-03-16 02:02:32 -0800321
David S. Millerdcc1e8d2006-03-22 00:49:59 -0800322 tsb_index = MM_TSB_BASE;
323 tsb_hash_shift = PAGE_SHIFT;
324
David S. Miller7a1ac522006-03-16 02:02:32 -0800325 spin_lock_irqsave(&mm->context.lock, flags);
326
David S. Millerdcc1e8d2006-03-22 00:49:59 -0800327#ifdef CONFIG_HUGETLB_PAGE
328 if (mm->context.tsb_block[MM_TSB_HUGE].tsb != NULL) {
329 if ((tlb_type == hypervisor &&
330 (pte_val(pte) & _PAGE_SZALL_4V) == _PAGE_SZHUGE_4V) ||
331 (tlb_type != hypervisor &&
332 (pte_val(pte) & _PAGE_SZALL_4U) == _PAGE_SZHUGE_4U)) {
333 tsb_index = MM_TSB_HUGE;
334 tsb_hash_shift = HPAGE_SHIFT;
335 }
336 }
337#endif
338
339 tsb = mm->context.tsb_block[tsb_index].tsb;
340 tsb += ((address >> tsb_hash_shift) &
341 (mm->context.tsb_block[tsb_index].tsb_nentries - 1UL));
David S. Miller74ae9982006-03-05 18:26:24 -0800342 tag = (address >> 22UL);
343 tsb_insert(tsb, tag, pte_val(pte));
David S. Miller7a1ac522006-03-16 02:02:32 -0800344
345 spin_unlock_irqrestore(&mm->context.lock, flags);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700346}
347
348void flush_dcache_page(struct page *page)
349{
David S. Millera9546f52005-04-17 18:03:09 -0700350 struct address_space *mapping;
351 int this_cpu;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700352
David S. Miller7a591cf2006-02-26 19:44:50 -0800353 if (tlb_type == hypervisor)
354 return;
355
David S. Millera9546f52005-04-17 18:03:09 -0700356 /* Do not bother with the expensive D-cache flush if it
357 * is merely the zero page. The 'bigcore' testcase in GDB
358 * causes this case to run millions of times.
359 */
360 if (page == ZERO_PAGE(0))
361 return;
362
363 this_cpu = get_cpu();
364
365 mapping = page_mapping(page);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700366 if (mapping && !mapping_mapped(mapping)) {
David S. Millera9546f52005-04-17 18:03:09 -0700367 int dirty = test_bit(PG_dcache_dirty, &page->flags);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700368 if (dirty) {
David S. Millera9546f52005-04-17 18:03:09 -0700369 int dirty_cpu = dcache_dirty_cpu(page);
370
Linus Torvalds1da177e2005-04-16 15:20:36 -0700371 if (dirty_cpu == this_cpu)
372 goto out;
373 smp_flush_dcache_page_impl(page, dirty_cpu);
374 }
375 set_dcache_dirty(page, this_cpu);
376 } else {
377 /* We could delay the flush for the !page_mapping
378 * case too. But that case is for exec env/arg
379 * pages and those are %99 certainly going to get
380 * faulted into the tlb (and thus flushed) anyways.
381 */
382 flush_dcache_page_impl(page);
383 }
384
385out:
386 put_cpu();
387}
388
Prasanna S Panchamukhi05e14cb2005-09-06 15:19:30 -0700389void __kprobes flush_icache_range(unsigned long start, unsigned long end)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700390{
David S. Millera43fe0e2006-02-04 03:10:53 -0800391 /* Cheetah and Hypervisor platform cpus have coherent I-cache. */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700392 if (tlb_type == spitfire) {
393 unsigned long kaddr;
394
David S. Millera94aa252007-03-15 15:50:11 -0700395 /* This code only runs on Spitfire cpus so this is
396 * why we can assume _PAGE_PADDR_4U.
397 */
398 for (kaddr = start; kaddr < end; kaddr += PAGE_SIZE) {
399 unsigned long paddr, mask = _PAGE_PADDR_4U;
400
401 if (kaddr >= PAGE_OFFSET)
402 paddr = kaddr & mask;
403 else {
404 pgd_t *pgdp = pgd_offset_k(kaddr);
405 pud_t *pudp = pud_offset(pgdp, kaddr);
406 pmd_t *pmdp = pmd_offset(pudp, kaddr);
407 pte_t *ptep = pte_offset_kernel(pmdp, kaddr);
408
409 paddr = pte_val(*ptep) & mask;
410 }
411 __flush_icache_page(paddr);
412 }
Linus Torvalds1da177e2005-04-16 15:20:36 -0700413 }
414}
415
Linus Torvalds1da177e2005-04-16 15:20:36 -0700416void show_mem(void)
417{
David S. Miller5be4a962007-03-15 16:00:29 -0700418 unsigned long total = 0, reserved = 0;
419 unsigned long shared = 0, cached = 0;
420 pg_data_t *pgdat;
421
David S. Miller28256ca2007-03-15 15:56:07 -0700422 printk(KERN_INFO "Mem-info:\n");
Linus Torvalds1da177e2005-04-16 15:20:36 -0700423 show_free_areas();
David S. Miller28256ca2007-03-15 15:56:07 -0700424 printk(KERN_INFO "Free swap: %6ldkB\n",
Linus Torvalds1da177e2005-04-16 15:20:36 -0700425 nr_swap_pages << (PAGE_SHIFT-10));
David S. Miller5be4a962007-03-15 16:00:29 -0700426 for_each_online_pgdat(pgdat) {
427 unsigned long i, flags;
428
429 pgdat_resize_lock(pgdat, &flags);
430 for (i = 0; i < pgdat->node_spanned_pages; i++) {
431 struct page *page = pgdat_page_nr(pgdat, i);
432 total++;
433 if (PageReserved(page))
434 reserved++;
435 else if (PageSwapCache(page))
436 cached++;
437 else if (page_count(page))
438 shared += page_count(page) - 1;
439 }
440 pgdat_resize_unlock(pgdat, &flags);
441 }
442
443 printk(KERN_INFO "%lu pages of RAM\n", total);
444 printk(KERN_INFO "%lu reserved pages\n", reserved);
445 printk(KERN_INFO "%lu pages shared\n", shared);
446 printk(KERN_INFO "%lu pages swap cached\n", cached);
447
448 printk(KERN_INFO "%lu pages dirty\n",
449 global_page_state(NR_FILE_DIRTY));
450 printk(KERN_INFO "%lu pages writeback\n",
451 global_page_state(NR_WRITEBACK));
452 printk(KERN_INFO "%lu pages mapped\n",
453 global_page_state(NR_FILE_MAPPED));
454 printk(KERN_INFO "%lu pages slab\n",
455 global_page_state(NR_SLAB_RECLAIMABLE) +
456 global_page_state(NR_SLAB_UNRECLAIMABLE));
457 printk(KERN_INFO "%lu pages pagetables\n",
458 global_page_state(NR_PAGETABLE));
Linus Torvalds1da177e2005-04-16 15:20:36 -0700459}
460
461void mmu_info(struct seq_file *m)
462{
463 if (tlb_type == cheetah)
464 seq_printf(m, "MMU Type\t: Cheetah\n");
465 else if (tlb_type == cheetah_plus)
466 seq_printf(m, "MMU Type\t: Cheetah+\n");
467 else if (tlb_type == spitfire)
468 seq_printf(m, "MMU Type\t: Spitfire\n");
David S. Millera43fe0e2006-02-04 03:10:53 -0800469 else if (tlb_type == hypervisor)
470 seq_printf(m, "MMU Type\t: Hypervisor (sun4v)\n");
Linus Torvalds1da177e2005-04-16 15:20:36 -0700471 else
472 seq_printf(m, "MMU Type\t: ???\n");
473
474#ifdef CONFIG_DEBUG_DCFLUSH
475 seq_printf(m, "DCPageFlushes\t: %d\n",
476 atomic_read(&dcpage_flushes));
477#ifdef CONFIG_SMP
478 seq_printf(m, "DCPageFlushesXC\t: %d\n",
479 atomic_read(&dcpage_flushes_xcall));
480#endif /* CONFIG_SMP */
481#endif /* CONFIG_DEBUG_DCFLUSH */
482}
483
David S. Millera94aa252007-03-15 15:50:11 -0700484struct linux_prom_translation {
485 unsigned long virt;
486 unsigned long size;
487 unsigned long data;
488};
489
490/* Exported for kernel TLB miss handling in ktlb.S */
491struct linux_prom_translation prom_trans[512] __read_mostly;
492unsigned int prom_trans_ents __read_mostly;
493
Linus Torvalds1da177e2005-04-16 15:20:36 -0700494/* Exported for SMP bootup purposes. */
495unsigned long kern_locked_tte_data;
496
David S. Miller405599b2005-09-22 00:12:35 -0700497/* The obp translations are saved based on 8k pagesize, since obp can
498 * use a mixture of pagesizes. Misses to the LOW_OBP_ADDRESS ->
David S. Miller74bf4312006-01-31 18:29:18 -0800499 * HI_OBP_ADDRESS range are handled in ktlb.S.
David S. Miller405599b2005-09-22 00:12:35 -0700500 */
David S. Miller5085b4a2005-09-22 00:45:41 -0700501static inline int in_obp_range(unsigned long vaddr)
502{
503 return (vaddr >= LOW_OBP_ADDRESS &&
504 vaddr < HI_OBP_ADDRESS);
505}
506
David S. Millerc9c10832005-10-12 12:22:46 -0700507static int cmp_ptrans(const void *a, const void *b)
David S. Miller405599b2005-09-22 00:12:35 -0700508{
David S. Millerc9c10832005-10-12 12:22:46 -0700509 const struct linux_prom_translation *x = a, *y = b;
David S. Miller405599b2005-09-22 00:12:35 -0700510
David S. Millerc9c10832005-10-12 12:22:46 -0700511 if (x->virt > y->virt)
512 return 1;
513 if (x->virt < y->virt)
514 return -1;
515 return 0;
David S. Miller405599b2005-09-22 00:12:35 -0700516}
517
David S. Millerc9c10832005-10-12 12:22:46 -0700518/* Read OBP translations property into 'prom_trans[]'. */
David S. Miller9ad98c52005-10-05 15:12:00 -0700519static void __init read_obp_translations(void)
David S. Miller405599b2005-09-22 00:12:35 -0700520{
David S. Millerc9c10832005-10-12 12:22:46 -0700521 int n, node, ents, first, last, i;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700522
523 node = prom_finddevice("/virtual-memory");
524 n = prom_getproplen(node, "translations");
David S. Miller405599b2005-09-22 00:12:35 -0700525 if (unlikely(n == 0 || n == -1)) {
David S. Millerb206fc42005-09-21 22:31:13 -0700526 prom_printf("prom_mappings: Couldn't get size.\n");
Linus Torvalds1da177e2005-04-16 15:20:36 -0700527 prom_halt();
528 }
David S. Miller405599b2005-09-22 00:12:35 -0700529 if (unlikely(n > sizeof(prom_trans))) {
530 prom_printf("prom_mappings: Size %Zd is too big.\n", n);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700531 prom_halt();
532 }
David S. Miller405599b2005-09-22 00:12:35 -0700533
David S. Millerb206fc42005-09-21 22:31:13 -0700534 if ((n = prom_getproperty(node, "translations",
David S. Miller405599b2005-09-22 00:12:35 -0700535 (char *)&prom_trans[0],
536 sizeof(prom_trans))) == -1) {
David S. Millerb206fc42005-09-21 22:31:13 -0700537 prom_printf("prom_mappings: Couldn't get property.\n");
538 prom_halt();
539 }
David S. Miller9ad98c52005-10-05 15:12:00 -0700540
David S. Millerb206fc42005-09-21 22:31:13 -0700541 n = n / sizeof(struct linux_prom_translation);
David S. Miller9ad98c52005-10-05 15:12:00 -0700542
David S. Millerc9c10832005-10-12 12:22:46 -0700543 ents = n;
544
545 sort(prom_trans, ents, sizeof(struct linux_prom_translation),
546 cmp_ptrans, NULL);
547
548 /* Now kick out all the non-OBP entries. */
549 for (i = 0; i < ents; i++) {
550 if (in_obp_range(prom_trans[i].virt))
551 break;
552 }
553 first = i;
554 for (; i < ents; i++) {
555 if (!in_obp_range(prom_trans[i].virt))
556 break;
557 }
558 last = i;
559
560 for (i = 0; i < (last - first); i++) {
561 struct linux_prom_translation *src = &prom_trans[i + first];
562 struct linux_prom_translation *dest = &prom_trans[i];
563
564 *dest = *src;
565 }
566 for (; i < ents; i++) {
567 struct linux_prom_translation *dest = &prom_trans[i];
568 dest->virt = dest->size = dest->data = 0x0UL;
569 }
570
571 prom_trans_ents = last - first;
572
573 if (tlb_type == spitfire) {
574 /* Clear diag TTE bits. */
575 for (i = 0; i < prom_trans_ents; i++)
576 prom_trans[i].data &= ~0x0003fe0000000000UL;
577 }
David S. Miller405599b2005-09-22 00:12:35 -0700578}
Linus Torvalds1da177e2005-04-16 15:20:36 -0700579
David S. Millerd82ace72006-02-09 02:52:44 -0800580static void __init hypervisor_tlb_lock(unsigned long vaddr,
581 unsigned long pte,
582 unsigned long mmu)
583{
David S. Miller164c2202006-02-09 22:57:21 -0800584 register unsigned long func asm("%o5");
585 register unsigned long arg0 asm("%o0");
586 register unsigned long arg1 asm("%o1");
587 register unsigned long arg2 asm("%o2");
588 register unsigned long arg3 asm("%o3");
David S. Millerd82ace72006-02-09 02:52:44 -0800589
590 func = HV_FAST_MMU_MAP_PERM_ADDR;
591 arg0 = vaddr;
592 arg1 = 0;
593 arg2 = pte;
594 arg3 = mmu;
595 __asm__ __volatile__("ta 0x80"
596 : "=&r" (func), "=&r" (arg0),
597 "=&r" (arg1), "=&r" (arg2),
598 "=&r" (arg3)
599 : "0" (func), "1" (arg0), "2" (arg1),
600 "3" (arg2), "4" (arg3));
David S. Miller12e126a2006-02-17 14:40:30 -0800601 if (arg0 != 0) {
602 prom_printf("hypervisor_tlb_lock[%lx:%lx:%lx:%lx]: "
603 "errors with %lx\n", vaddr, 0, pte, mmu, arg0);
604 prom_halt();
605 }
David S. Millerd82ace72006-02-09 02:52:44 -0800606}
607
David S. Millerc4bce902006-02-11 21:57:54 -0800608static unsigned long kern_large_tte(unsigned long paddr);
609
David S. Miller898cf0e2005-09-23 11:59:44 -0700610static void __init remap_kernel(void)
David S. Miller405599b2005-09-22 00:12:35 -0700611{
612 unsigned long phys_page, tte_vaddr, tte_data;
David S. Miller405599b2005-09-22 00:12:35 -0700613 int tlb_ent = sparc64_highest_locked_tlbent();
614
Linus Torvalds1da177e2005-04-16 15:20:36 -0700615 tte_vaddr = (unsigned long) KERNBASE;
David S. Millerbff06d52005-09-22 20:11:33 -0700616 phys_page = (prom_boot_mapping_phys_low >> 22UL) << 22UL;
David S. Millerc4bce902006-02-11 21:57:54 -0800617 tte_data = kern_large_tte(phys_page);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700618
619 kern_locked_tte_data = tte_data;
620
David S. Millerd82ace72006-02-09 02:52:44 -0800621 /* Now lock us into the TLBs via Hypervisor or OBP. */
622 if (tlb_type == hypervisor) {
623 hypervisor_tlb_lock(tte_vaddr, tte_data, HV_MMU_DMMU);
624 hypervisor_tlb_lock(tte_vaddr, tte_data, HV_MMU_IMMU);
625 if (bigkernel) {
626 tte_vaddr += 0x400000;
627 tte_data += 0x400000;
628 hypervisor_tlb_lock(tte_vaddr, tte_data, HV_MMU_DMMU);
629 hypervisor_tlb_lock(tte_vaddr, tte_data, HV_MMU_IMMU);
630 }
631 } else {
632 prom_dtlb_load(tlb_ent, tte_data, tte_vaddr);
633 prom_itlb_load(tlb_ent, tte_data, tte_vaddr);
634 if (bigkernel) {
635 tlb_ent -= 1;
636 prom_dtlb_load(tlb_ent,
637 tte_data + 0x400000,
638 tte_vaddr + 0x400000);
639 prom_itlb_load(tlb_ent,
640 tte_data + 0x400000,
641 tte_vaddr + 0x400000);
642 }
643 sparc64_highest_unlocked_tlb_ent = tlb_ent - 1;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700644 }
David S. Miller0835ae02005-10-04 15:23:20 -0700645 if (tlb_type == cheetah_plus) {
646 sparc64_kern_pri_context = (CTX_CHEETAH_PLUS_CTX0 |
647 CTX_CHEETAH_PLUS_NUC);
648 sparc64_kern_pri_nuc_bits = CTX_CHEETAH_PLUS_NUC;
649 sparc64_kern_sec_context = CTX_CHEETAH_PLUS_CTX0;
650 }
David S. Miller405599b2005-09-22 00:12:35 -0700651}
Linus Torvalds1da177e2005-04-16 15:20:36 -0700652
David S. Miller405599b2005-09-22 00:12:35 -0700653
David S. Millerc9c10832005-10-12 12:22:46 -0700654static void __init inherit_prom_mappings(void)
David S. Miller9ad98c52005-10-05 15:12:00 -0700655{
656 read_obp_translations();
David S. Miller405599b2005-09-22 00:12:35 -0700657
658 /* Now fixup OBP's idea about where we really are mapped. */
659 prom_printf("Remapping the kernel... ");
660 remap_kernel();
Linus Torvalds1da177e2005-04-16 15:20:36 -0700661 prom_printf("done.\n");
Linus Torvalds1da177e2005-04-16 15:20:36 -0700662}
663
Linus Torvalds1da177e2005-04-16 15:20:36 -0700664void prom_world(int enter)
665{
Linus Torvalds1da177e2005-04-16 15:20:36 -0700666 if (!enter)
667 set_fs((mm_segment_t) { get_thread_current_ds() });
668
David S. Miller3487d1d2006-01-31 18:33:25 -0800669 __asm__ __volatile__("flushw");
Linus Torvalds1da177e2005-04-16 15:20:36 -0700670}
671
672#ifdef DCACHE_ALIASING_POSSIBLE
673void __flush_dcache_range(unsigned long start, unsigned long end)
674{
675 unsigned long va;
676
677 if (tlb_type == spitfire) {
678 int n = 0;
679
680 for (va = start; va < end; va += 32) {
681 spitfire_put_dcache_tag(va & 0x3fe0, 0x0);
682 if (++n >= 512)
683 break;
684 }
David S. Millera43fe0e2006-02-04 03:10:53 -0800685 } else if (tlb_type == cheetah || tlb_type == cheetah_plus) {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700686 start = __pa(start);
687 end = __pa(end);
688 for (va = start; va < end; va += 32)
689 __asm__ __volatile__("stxa %%g0, [%0] %1\n\t"
690 "membar #Sync"
691 : /* no outputs */
692 : "r" (va),
693 "i" (ASI_DCACHE_INVALIDATE));
694 }
695}
696#endif /* DCACHE_ALIASING_POSSIBLE */
697
David S. Miller85f1e1f2007-03-15 17:51:26 -0700698/* get_new_mmu_context() uses "cache + 1". */
699DEFINE_SPINLOCK(ctx_alloc_lock);
700unsigned long tlb_context_cache = CTX_FIRST_VERSION - 1;
701#define MAX_CTX_NR (1UL << CTX_NR_BITS)
702#define CTX_BMAP_SLOTS BITS_TO_LONGS(MAX_CTX_NR)
703DECLARE_BITMAP(mmu_context_bmap, MAX_CTX_NR);
704
Linus Torvalds1da177e2005-04-16 15:20:36 -0700705/* Caller does TLB context flushing on local CPU if necessary.
706 * The caller also ensures that CTX_VALID(mm->context) is false.
707 *
708 * We must be careful about boundary cases so that we never
709 * let the user have CTX 0 (nucleus) or we ever use a CTX
710 * version of zero (and thus NO_CONTEXT would not be caught
711 * by version mis-match tests in mmu_context.h).
David S. Millera0663a72006-02-23 14:19:28 -0800712 *
713 * Always invoked with interrupts disabled.
Linus Torvalds1da177e2005-04-16 15:20:36 -0700714 */
715void get_new_mmu_context(struct mm_struct *mm)
716{
717 unsigned long ctx, new_ctx;
718 unsigned long orig_pgsz_bits;
David S. Millera77754b2006-03-06 19:59:50 -0800719 unsigned long flags;
David S. Millera0663a72006-02-23 14:19:28 -0800720 int new_version;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700721
David S. Millera77754b2006-03-06 19:59:50 -0800722 spin_lock_irqsave(&ctx_alloc_lock, flags);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700723 orig_pgsz_bits = (mm->context.sparc64_ctx_val & CTX_PGSZ_MASK);
724 ctx = (tlb_context_cache + 1) & CTX_NR_MASK;
725 new_ctx = find_next_zero_bit(mmu_context_bmap, 1 << CTX_NR_BITS, ctx);
David S. Millera0663a72006-02-23 14:19:28 -0800726 new_version = 0;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700727 if (new_ctx >= (1 << CTX_NR_BITS)) {
728 new_ctx = find_next_zero_bit(mmu_context_bmap, ctx, 1);
729 if (new_ctx >= ctx) {
730 int i;
731 new_ctx = (tlb_context_cache & CTX_VERSION_MASK) +
732 CTX_FIRST_VERSION;
733 if (new_ctx == 1)
734 new_ctx = CTX_FIRST_VERSION;
735
736 /* Don't call memset, for 16 entries that's just
737 * plain silly...
738 */
739 mmu_context_bmap[0] = 3;
740 mmu_context_bmap[1] = 0;
741 mmu_context_bmap[2] = 0;
742 mmu_context_bmap[3] = 0;
743 for (i = 4; i < CTX_BMAP_SLOTS; i += 4) {
744 mmu_context_bmap[i + 0] = 0;
745 mmu_context_bmap[i + 1] = 0;
746 mmu_context_bmap[i + 2] = 0;
747 mmu_context_bmap[i + 3] = 0;
748 }
David S. Millera0663a72006-02-23 14:19:28 -0800749 new_version = 1;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700750 goto out;
751 }
752 }
753 mmu_context_bmap[new_ctx>>6] |= (1UL << (new_ctx & 63));
754 new_ctx |= (tlb_context_cache & CTX_VERSION_MASK);
755out:
756 tlb_context_cache = new_ctx;
757 mm->context.sparc64_ctx_val = new_ctx | orig_pgsz_bits;
David S. Millera77754b2006-03-06 19:59:50 -0800758 spin_unlock_irqrestore(&ctx_alloc_lock, flags);
David S. Millera0663a72006-02-23 14:19:28 -0800759
760 if (unlikely(new_version))
761 smp_new_mmu_context_version();
Linus Torvalds1da177e2005-04-16 15:20:36 -0700762}
763
David S. Millerd1112012006-03-08 02:16:07 -0800764/* Find a free area for the bootmem map, avoiding the kernel image
765 * and the initial ramdisk.
766 */
767static unsigned long __init choose_bootmap_pfn(unsigned long start_pfn,
768 unsigned long end_pfn)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700769{
David S. Millerd1112012006-03-08 02:16:07 -0800770 unsigned long avoid_start, avoid_end, bootmap_size;
771 int i;
772
David S. Miller39964652007-03-15 19:36:53 -0700773 bootmap_size = bootmem_bootmap_pages(end_pfn - start_pfn);
774 bootmap_size <<= PAGE_SHIFT;
David S. Millerd1112012006-03-08 02:16:07 -0800775
776 avoid_start = avoid_end = 0;
777#ifdef CONFIG_BLK_DEV_INITRD
778 avoid_start = initrd_start;
779 avoid_end = PAGE_ALIGN(initrd_end);
780#endif
781
782#ifdef CONFIG_DEBUG_BOOTMEM
783 prom_printf("choose_bootmap_pfn: kern[%lx:%lx] avoid[%lx:%lx]\n",
784 kern_base, PAGE_ALIGN(kern_base + kern_size),
785 avoid_start, avoid_end);
786#endif
787 for (i = 0; i < pavail_ents; i++) {
788 unsigned long start, end;
789
790 start = pavail[i].phys_addr;
791 end = start + pavail[i].reg_size;
792
793 while (start < end) {
794 if (start >= kern_base &&
795 start < PAGE_ALIGN(kern_base + kern_size)) {
796 start = PAGE_ALIGN(kern_base + kern_size);
797 continue;
798 }
799 if (start >= avoid_start && start < avoid_end) {
800 start = avoid_end;
801 continue;
802 }
803
804 if ((end - start) < bootmap_size)
805 break;
806
807 if (start < kern_base &&
808 (start + bootmap_size) > kern_base) {
809 start = PAGE_ALIGN(kern_base + kern_size);
810 continue;
811 }
812
813 if (start < avoid_start &&
814 (start + bootmap_size) > avoid_start) {
815 start = avoid_end;
816 continue;
817 }
818
819 /* OK, it doesn't overlap anything, use it. */
820#ifdef CONFIG_DEBUG_BOOTMEM
821 prom_printf("choose_bootmap_pfn: Using %lx [%lx]\n",
822 start >> PAGE_SHIFT, start);
823#endif
824 return start >> PAGE_SHIFT;
825 }
826 }
827
828 prom_printf("Cannot find free area for bootmap, aborting.\n");
829 prom_halt();
830}
831
David S. Miller6fc5bae2006-12-28 21:00:23 -0800832static void __init trim_pavail(unsigned long *cur_size_p,
833 unsigned long *end_of_phys_p)
834{
835 unsigned long to_trim = *cur_size_p - cmdline_memory_size;
836 unsigned long avoid_start, avoid_end;
837 int i;
838
839 to_trim = PAGE_ALIGN(to_trim);
840
841 avoid_start = avoid_end = 0;
842#ifdef CONFIG_BLK_DEV_INITRD
843 avoid_start = initrd_start;
844 avoid_end = PAGE_ALIGN(initrd_end);
845#endif
846
847 /* Trim some pavail[] entries in order to satisfy the
848 * requested "mem=xxx" kernel command line specification.
849 *
850 * We must not trim off the kernel image area nor the
851 * initial ramdisk range (if any). Also, we must not trim
852 * any pavail[] entry down to zero in order to preserve
853 * the invariant that all pavail[] entries have a non-zero
854 * size which is assumed by all of the code in here.
855 */
856 for (i = 0; i < pavail_ents; i++) {
857 unsigned long start, end, kern_end;
858 unsigned long trim_low, trim_high, n;
859
860 kern_end = PAGE_ALIGN(kern_base + kern_size);
861
862 trim_low = start = pavail[i].phys_addr;
863 trim_high = end = start + pavail[i].reg_size;
864
865 if (kern_base >= start &&
866 kern_base < end) {
867 trim_low = kern_base;
868 if (kern_end >= end)
869 continue;
870 }
871 if (kern_end >= start &&
872 kern_end < end) {
873 trim_high = kern_end;
874 }
875 if (avoid_start &&
876 avoid_start >= start &&
877 avoid_start < end) {
878 if (trim_low > avoid_start)
879 trim_low = avoid_start;
880 if (avoid_end >= end)
881 continue;
882 }
883 if (avoid_end &&
884 avoid_end >= start &&
885 avoid_end < end) {
886 if (trim_high < avoid_end)
887 trim_high = avoid_end;
888 }
889
890 if (trim_high <= trim_low)
891 continue;
892
893 if (trim_low == start && trim_high == end) {
894 /* Whole chunk is available for trimming.
895 * Trim all except one page, in order to keep
896 * entry non-empty.
897 */
898 n = (end - start) - PAGE_SIZE;
899 if (n > to_trim)
900 n = to_trim;
901
902 if (n) {
903 pavail[i].phys_addr += n;
904 pavail[i].reg_size -= n;
905 to_trim -= n;
906 }
907 } else {
908 n = (trim_low - start);
909 if (n > to_trim)
910 n = to_trim;
911
912 if (n) {
913 pavail[i].phys_addr += n;
914 pavail[i].reg_size -= n;
915 to_trim -= n;
916 }
917 if (to_trim) {
918 n = end - trim_high;
919 if (n > to_trim)
920 n = to_trim;
921 if (n) {
922 pavail[i].reg_size -= n;
923 to_trim -= n;
924 }
925 }
926 }
927
928 if (!to_trim)
929 break;
930 }
931
932 /* Recalculate. */
933 *cur_size_p = 0UL;
934 for (i = 0; i < pavail_ents; i++) {
935 *end_of_phys_p = pavail[i].phys_addr +
936 pavail[i].reg_size;
937 *cur_size_p += pavail[i].reg_size;
938 }
939}
940
David S. Millerf1cfdb52007-03-15 22:52:18 -0700941/* About pages_avail, this is the value we will use to calculate
942 * the zholes_size[] argument given to free_area_init_node(). The
943 * page allocator uses this to calculate nr_kernel_pages,
944 * nr_all_pages and zone->present_pages. On NUMA it is used
945 * to calculate zone->min_unmapped_pages and zone->min_slab_pages.
946 *
947 * So this number should really be set to what the page allocator
948 * actually ends up with. This means:
949 * 1) It should include bootmem map pages, we'll release those.
950 * 2) It should not include the kernel image, except for the
951 * __init sections which we will also release.
952 * 3) It should include the initrd image, since we'll release
953 * that too.
954 */
David S. Millerd1112012006-03-08 02:16:07 -0800955static unsigned long __init bootmem_init(unsigned long *pages_avail,
956 unsigned long phys_base)
957{
958 unsigned long bootmap_size, end_pfn;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700959 unsigned long end_of_phys_memory = 0UL;
960 unsigned long bootmap_pfn, bytes_avail, size;
961 int i;
962
963#ifdef CONFIG_DEBUG_BOOTMEM
David S. Miller13edad72005-09-29 17:58:26 -0700964 prom_printf("bootmem_init: Scan pavail, ");
Linus Torvalds1da177e2005-04-16 15:20:36 -0700965#endif
966
967 bytes_avail = 0UL;
David S. Miller13edad72005-09-29 17:58:26 -0700968 for (i = 0; i < pavail_ents; i++) {
969 end_of_phys_memory = pavail[i].phys_addr +
970 pavail[i].reg_size;
971 bytes_avail += pavail[i].reg_size;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700972 }
973
David S. Miller6fc5bae2006-12-28 21:00:23 -0800974 /* Determine the location of the initial ramdisk before trying
975 * to honor the "mem=xxx" command line argument. We must know
976 * where the kernel image and the ramdisk image are so that we
977 * do not trim those two areas from the physical memory map.
978 */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700979
980#ifdef CONFIG_BLK_DEV_INITRD
981 /* Now have to check initial ramdisk, so that bootmap does not overwrite it */
982 if (sparc_ramdisk_image || sparc_ramdisk_image64) {
983 unsigned long ramdisk_image = sparc_ramdisk_image ?
984 sparc_ramdisk_image : sparc_ramdisk_image64;
David S. Miller715a0ec2006-09-26 23:14:21 -0700985 ramdisk_image -= KERNBASE;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700986 initrd_start = ramdisk_image + phys_base;
987 initrd_end = initrd_start + sparc_ramdisk_size;
988 if (initrd_end > end_of_phys_memory) {
989 printk(KERN_CRIT "initrd extends beyond end of memory "
990 "(0x%016lx > 0x%016lx)\ndisabling initrd\n",
991 initrd_end, end_of_phys_memory);
992 initrd_start = 0;
David S. Millerd1112012006-03-08 02:16:07 -0800993 initrd_end = 0;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700994 }
995 }
996#endif
David S. Miller6fc5bae2006-12-28 21:00:23 -0800997
998 if (cmdline_memory_size &&
999 bytes_avail > cmdline_memory_size)
1000 trim_pavail(&bytes_avail,
1001 &end_of_phys_memory);
1002
1003 *pages_avail = bytes_avail >> PAGE_SHIFT;
1004
1005 end_pfn = end_of_phys_memory >> PAGE_SHIFT;
1006
Linus Torvalds1da177e2005-04-16 15:20:36 -07001007 /* Initialize the boot-time allocator. */
1008 max_pfn = max_low_pfn = end_pfn;
David S. Millerd1112012006-03-08 02:16:07 -08001009 min_low_pfn = (phys_base >> PAGE_SHIFT);
1010
1011 bootmap_pfn = choose_bootmap_pfn(min_low_pfn, end_pfn);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001012
1013#ifdef CONFIG_DEBUG_BOOTMEM
1014 prom_printf("init_bootmem(min[%lx], bootmap[%lx], max[%lx])\n",
1015 min_low_pfn, bootmap_pfn, max_low_pfn);
1016#endif
David S. Millerd1112012006-03-08 02:16:07 -08001017 bootmap_size = init_bootmem_node(NODE_DATA(0), bootmap_pfn,
David S. Miller17b0e192006-03-08 15:57:03 -08001018 min_low_pfn, end_pfn);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001019
Linus Torvalds1da177e2005-04-16 15:20:36 -07001020 /* Now register the available physical memory with the
1021 * allocator.
1022 */
David S. Miller13edad72005-09-29 17:58:26 -07001023 for (i = 0; i < pavail_ents; i++) {
Linus Torvalds1da177e2005-04-16 15:20:36 -07001024#ifdef CONFIG_DEBUG_BOOTMEM
David S. Miller13edad72005-09-29 17:58:26 -07001025 prom_printf("free_bootmem(pavail:%d): base[%lx] size[%lx]\n",
1026 i, pavail[i].phys_addr, pavail[i].reg_size);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001027#endif
David S. Miller13edad72005-09-29 17:58:26 -07001028 free_bootmem(pavail[i].phys_addr, pavail[i].reg_size);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001029 }
1030
1031#ifdef CONFIG_BLK_DEV_INITRD
1032 if (initrd_start) {
1033 size = initrd_end - initrd_start;
1034
1035 /* Resert the initrd image area. */
1036#ifdef CONFIG_DEBUG_BOOTMEM
1037 prom_printf("reserve_bootmem(initrd): base[%llx] size[%lx]\n",
1038 initrd_start, initrd_end);
1039#endif
1040 reserve_bootmem(initrd_start, size);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001041
1042 initrd_start += PAGE_OFFSET;
1043 initrd_end += PAGE_OFFSET;
1044 }
1045#endif
1046 /* Reserve the kernel text/data/bss. */
1047#ifdef CONFIG_DEBUG_BOOTMEM
1048 prom_printf("reserve_bootmem(kernel): base[%lx] size[%lx]\n", kern_base, kern_size);
1049#endif
1050 reserve_bootmem(kern_base, kern_size);
1051 *pages_avail -= PAGE_ALIGN(kern_size) >> PAGE_SHIFT;
1052
David S. Millerf1cfdb52007-03-15 22:52:18 -07001053 /* Add back in the initmem pages. */
1054 size = ((unsigned long)(__init_end) & PAGE_MASK) -
1055 PAGE_ALIGN((unsigned long)__init_begin);
1056 *pages_avail += size >> PAGE_SHIFT;
1057
Linus Torvalds1da177e2005-04-16 15:20:36 -07001058 /* Reserve the bootmem map. We do not account for it
1059 * in pages_avail because we will release that memory
1060 * in free_all_bootmem.
1061 */
1062 size = bootmap_size;
1063#ifdef CONFIG_DEBUG_BOOTMEM
1064 prom_printf("reserve_bootmem(bootmap): base[%lx] size[%lx]\n",
1065 (bootmap_pfn << PAGE_SHIFT), size);
1066#endif
1067 reserve_bootmem((bootmap_pfn << PAGE_SHIFT), size);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001068
David S. Millerd1112012006-03-08 02:16:07 -08001069 for (i = 0; i < pavail_ents; i++) {
1070 unsigned long start_pfn, end_pfn;
1071
1072 start_pfn = pavail[i].phys_addr >> PAGE_SHIFT;
1073 end_pfn = (start_pfn + (pavail[i].reg_size >> PAGE_SHIFT));
1074#ifdef CONFIG_DEBUG_BOOTMEM
1075 prom_printf("memory_present(0, %lx, %lx)\n",
1076 start_pfn, end_pfn);
1077#endif
1078 memory_present(0, start_pfn, end_pfn);
1079 }
1080
1081 sparse_init();
1082
Linus Torvalds1da177e2005-04-16 15:20:36 -07001083 return end_pfn;
1084}
1085
David S. Miller9cc3a1a2006-02-21 20:51:13 -08001086static struct linux_prom64_registers pall[MAX_BANKS] __initdata;
1087static int pall_ents __initdata;
1088
David S. Miller56425302005-09-25 16:46:57 -07001089#ifdef CONFIG_DEBUG_PAGEALLOC
1090static unsigned long kernel_map_range(unsigned long pstart, unsigned long pend, pgprot_t prot)
1091{
1092 unsigned long vstart = PAGE_OFFSET + pstart;
1093 unsigned long vend = PAGE_OFFSET + pend;
1094 unsigned long alloc_bytes = 0UL;
1095
1096 if ((vstart & ~PAGE_MASK) || (vend & ~PAGE_MASK)) {
David S. Miller13edad72005-09-29 17:58:26 -07001097 prom_printf("kernel_map: Unaligned physmem[%lx:%lx]\n",
David S. Miller56425302005-09-25 16:46:57 -07001098 vstart, vend);
1099 prom_halt();
1100 }
1101
1102 while (vstart < vend) {
1103 unsigned long this_end, paddr = __pa(vstart);
1104 pgd_t *pgd = pgd_offset_k(vstart);
1105 pud_t *pud;
1106 pmd_t *pmd;
1107 pte_t *pte;
1108
1109 pud = pud_offset(pgd, vstart);
1110 if (pud_none(*pud)) {
1111 pmd_t *new;
1112
1113 new = __alloc_bootmem(PAGE_SIZE, PAGE_SIZE, PAGE_SIZE);
1114 alloc_bytes += PAGE_SIZE;
1115 pud_populate(&init_mm, pud, new);
1116 }
1117
1118 pmd = pmd_offset(pud, vstart);
1119 if (!pmd_present(*pmd)) {
1120 pte_t *new;
1121
1122 new = __alloc_bootmem(PAGE_SIZE, PAGE_SIZE, PAGE_SIZE);
1123 alloc_bytes += PAGE_SIZE;
1124 pmd_populate_kernel(&init_mm, pmd, new);
1125 }
1126
1127 pte = pte_offset_kernel(pmd, vstart);
1128 this_end = (vstart + PMD_SIZE) & PMD_MASK;
1129 if (this_end > vend)
1130 this_end = vend;
1131
1132 while (vstart < this_end) {
1133 pte_val(*pte) = (paddr | pgprot_val(prot));
1134
1135 vstart += PAGE_SIZE;
1136 paddr += PAGE_SIZE;
1137 pte++;
1138 }
1139 }
1140
1141 return alloc_bytes;
1142}
1143
David S. Miller56425302005-09-25 16:46:57 -07001144extern unsigned int kvmap_linear_patch[1];
David S. Miller9cc3a1a2006-02-21 20:51:13 -08001145#endif /* CONFIG_DEBUG_PAGEALLOC */
1146
1147static void __init mark_kpte_bitmap(unsigned long start, unsigned long end)
1148{
1149 const unsigned long shift_256MB = 28;
1150 const unsigned long mask_256MB = ((1UL << shift_256MB) - 1UL);
1151 const unsigned long size_256MB = (1UL << shift_256MB);
1152
1153 while (start < end) {
1154 long remains;
1155
David S. Millerf7c00332006-03-05 22:18:50 -08001156 remains = end - start;
1157 if (remains < size_256MB)
1158 break;
1159
David S. Miller9cc3a1a2006-02-21 20:51:13 -08001160 if (start & mask_256MB) {
1161 start = (start + size_256MB) & ~mask_256MB;
1162 continue;
1163 }
1164
David S. Miller9cc3a1a2006-02-21 20:51:13 -08001165 while (remains >= size_256MB) {
1166 unsigned long index = start >> shift_256MB;
1167
1168 __set_bit(index, kpte_linear_bitmap);
1169
1170 start += size_256MB;
1171 remains -= size_256MB;
1172 }
1173 }
1174}
David S. Miller56425302005-09-25 16:46:57 -07001175
1176static void __init kernel_physical_mapping_init(void)
1177{
David S. Miller9cc3a1a2006-02-21 20:51:13 -08001178 unsigned long i;
1179#ifdef CONFIG_DEBUG_PAGEALLOC
1180 unsigned long mem_alloced = 0UL;
1181#endif
David S. Miller56425302005-09-25 16:46:57 -07001182
David S. Miller13edad72005-09-29 17:58:26 -07001183 read_obp_memory("reg", &pall[0], &pall_ents);
1184
1185 for (i = 0; i < pall_ents; i++) {
David S. Miller56425302005-09-25 16:46:57 -07001186 unsigned long phys_start, phys_end;
1187
David S. Miller13edad72005-09-29 17:58:26 -07001188 phys_start = pall[i].phys_addr;
1189 phys_end = phys_start + pall[i].reg_size;
David S. Miller9cc3a1a2006-02-21 20:51:13 -08001190
1191 mark_kpte_bitmap(phys_start, phys_end);
1192
1193#ifdef CONFIG_DEBUG_PAGEALLOC
David S. Miller56425302005-09-25 16:46:57 -07001194 mem_alloced += kernel_map_range(phys_start, phys_end,
1195 PAGE_KERNEL);
David S. Miller9cc3a1a2006-02-21 20:51:13 -08001196#endif
David S. Miller56425302005-09-25 16:46:57 -07001197 }
1198
David S. Miller9cc3a1a2006-02-21 20:51:13 -08001199#ifdef CONFIG_DEBUG_PAGEALLOC
David S. Miller56425302005-09-25 16:46:57 -07001200 printk("Allocated %ld bytes for kernel page tables.\n",
1201 mem_alloced);
1202
1203 kvmap_linear_patch[0] = 0x01000000; /* nop */
1204 flushi(&kvmap_linear_patch[0]);
1205
1206 __flush_tlb_all();
David S. Miller9cc3a1a2006-02-21 20:51:13 -08001207#endif
David S. Miller56425302005-09-25 16:46:57 -07001208}
1209
David S. Miller9cc3a1a2006-02-21 20:51:13 -08001210#ifdef CONFIG_DEBUG_PAGEALLOC
David S. Miller56425302005-09-25 16:46:57 -07001211void kernel_map_pages(struct page *page, int numpages, int enable)
1212{
1213 unsigned long phys_start = page_to_pfn(page) << PAGE_SHIFT;
1214 unsigned long phys_end = phys_start + (numpages * PAGE_SIZE);
1215
1216 kernel_map_range(phys_start, phys_end,
1217 (enable ? PAGE_KERNEL : __pgprot(0)));
1218
David S. Miller74bf4312006-01-31 18:29:18 -08001219 flush_tsb_kernel_range(PAGE_OFFSET + phys_start,
1220 PAGE_OFFSET + phys_end);
1221
David S. Miller56425302005-09-25 16:46:57 -07001222 /* we should perform an IPI and flush all tlbs,
1223 * but that can deadlock->flush only current cpu.
1224 */
1225 __flush_tlb_kernel_range(PAGE_OFFSET + phys_start,
1226 PAGE_OFFSET + phys_end);
1227}
1228#endif
1229
David S. Miller10147572005-09-28 21:46:43 -07001230unsigned long __init find_ecache_flush_span(unsigned long size)
1231{
David S. Miller13edad72005-09-29 17:58:26 -07001232 int i;
David S. Miller10147572005-09-28 21:46:43 -07001233
David S. Miller13edad72005-09-29 17:58:26 -07001234 for (i = 0; i < pavail_ents; i++) {
1235 if (pavail[i].reg_size >= size)
1236 return pavail[i].phys_addr;
David S. Miller10147572005-09-28 21:46:43 -07001237 }
1238
1239 return ~0UL;
1240}
1241
David S. Miller517af332006-02-01 15:55:21 -08001242static void __init tsb_phys_patch(void)
1243{
David S. Millerd257d5d2006-02-06 23:44:37 -08001244 struct tsb_ldquad_phys_patch_entry *pquad;
David S. Miller517af332006-02-01 15:55:21 -08001245 struct tsb_phys_patch_entry *p;
1246
David S. Millerd257d5d2006-02-06 23:44:37 -08001247 pquad = &__tsb_ldquad_phys_patch;
1248 while (pquad < &__tsb_ldquad_phys_patch_end) {
1249 unsigned long addr = pquad->addr;
1250
1251 if (tlb_type == hypervisor)
1252 *(unsigned int *) addr = pquad->sun4v_insn;
1253 else
1254 *(unsigned int *) addr = pquad->sun4u_insn;
1255 wmb();
1256 __asm__ __volatile__("flush %0"
1257 : /* no outputs */
1258 : "r" (addr));
1259
1260 pquad++;
1261 }
1262
David S. Miller517af332006-02-01 15:55:21 -08001263 p = &__tsb_phys_patch;
1264 while (p < &__tsb_phys_patch_end) {
1265 unsigned long addr = p->addr;
1266
1267 *(unsigned int *) addr = p->insn;
1268 wmb();
1269 __asm__ __volatile__("flush %0"
1270 : /* no outputs */
1271 : "r" (addr));
1272
1273 p++;
1274 }
1275}
1276
David S. Miller490384e2006-02-11 14:41:18 -08001277/* Don't mark as init, we give this to the Hypervisor. */
David S. Millerd1acb422007-03-16 17:20:28 -07001278#ifndef CONFIG_DEBUG_PAGEALLOC
1279#define NUM_KTSB_DESCR 2
1280#else
1281#define NUM_KTSB_DESCR 1
1282#endif
1283static struct hv_tsb_descr ktsb_descr[NUM_KTSB_DESCR];
David S. Miller490384e2006-02-11 14:41:18 -08001284extern struct tsb swapper_tsb[KERNEL_TSB_NENTRIES];
1285
1286static void __init sun4v_ktsb_init(void)
1287{
1288 unsigned long ktsb_pa;
1289
David S. Millerd7744a02006-02-21 22:31:11 -08001290 /* First KTSB for PAGE_SIZE mappings. */
David S. Miller490384e2006-02-11 14:41:18 -08001291 ktsb_pa = kern_base + ((unsigned long)&swapper_tsb[0] - KERNBASE);
1292
1293 switch (PAGE_SIZE) {
1294 case 8 * 1024:
1295 default:
1296 ktsb_descr[0].pgsz_idx = HV_PGSZ_IDX_8K;
1297 ktsb_descr[0].pgsz_mask = HV_PGSZ_MASK_8K;
1298 break;
1299
1300 case 64 * 1024:
1301 ktsb_descr[0].pgsz_idx = HV_PGSZ_IDX_64K;
1302 ktsb_descr[0].pgsz_mask = HV_PGSZ_MASK_64K;
1303 break;
1304
1305 case 512 * 1024:
1306 ktsb_descr[0].pgsz_idx = HV_PGSZ_IDX_512K;
1307 ktsb_descr[0].pgsz_mask = HV_PGSZ_MASK_512K;
1308 break;
1309
1310 case 4 * 1024 * 1024:
1311 ktsb_descr[0].pgsz_idx = HV_PGSZ_IDX_4MB;
1312 ktsb_descr[0].pgsz_mask = HV_PGSZ_MASK_4MB;
1313 break;
1314 };
1315
David S. Miller3f19a842006-02-17 12:03:20 -08001316 ktsb_descr[0].assoc = 1;
David S. Miller490384e2006-02-11 14:41:18 -08001317 ktsb_descr[0].num_ttes = KERNEL_TSB_NENTRIES;
1318 ktsb_descr[0].ctx_idx = 0;
1319 ktsb_descr[0].tsb_base = ktsb_pa;
1320 ktsb_descr[0].resv = 0;
1321
David S. Millerd1acb422007-03-16 17:20:28 -07001322#ifndef CONFIG_DEBUG_PAGEALLOC
David S. Millerd7744a02006-02-21 22:31:11 -08001323 /* Second KTSB for 4MB/256MB mappings. */
1324 ktsb_pa = (kern_base +
1325 ((unsigned long)&swapper_4m_tsb[0] - KERNBASE));
1326
1327 ktsb_descr[1].pgsz_idx = HV_PGSZ_IDX_4MB;
1328 ktsb_descr[1].pgsz_mask = (HV_PGSZ_MASK_4MB |
1329 HV_PGSZ_MASK_256MB);
1330 ktsb_descr[1].assoc = 1;
1331 ktsb_descr[1].num_ttes = KERNEL_TSB4M_NENTRIES;
1332 ktsb_descr[1].ctx_idx = 0;
1333 ktsb_descr[1].tsb_base = ktsb_pa;
1334 ktsb_descr[1].resv = 0;
David S. Millerd1acb422007-03-16 17:20:28 -07001335#endif
David S. Miller490384e2006-02-11 14:41:18 -08001336}
1337
1338void __cpuinit sun4v_ktsb_register(void)
1339{
1340 register unsigned long func asm("%o5");
1341 register unsigned long arg0 asm("%o0");
1342 register unsigned long arg1 asm("%o1");
1343 unsigned long pa;
1344
1345 pa = kern_base + ((unsigned long)&ktsb_descr[0] - KERNBASE);
1346
1347 func = HV_FAST_MMU_TSB_CTX0;
David S. Millerd1acb422007-03-16 17:20:28 -07001348 arg0 = NUM_KTSB_DESCR;
David S. Miller490384e2006-02-11 14:41:18 -08001349 arg1 = pa;
1350 __asm__ __volatile__("ta %6"
1351 : "=&r" (func), "=&r" (arg0), "=&r" (arg1)
1352 : "0" (func), "1" (arg0), "2" (arg1),
1353 "i" (HV_FAST_TRAP));
1354}
1355
Linus Torvalds1da177e2005-04-16 15:20:36 -07001356/* paging_init() sets up the page tables */
1357
1358extern void cheetah_ecache_flush_init(void);
David S. Millerd257d5d2006-02-06 23:44:37 -08001359extern void sun4v_patch_tlb_handlers(void);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001360
1361static unsigned long last_valid_pfn;
David S. Miller56425302005-09-25 16:46:57 -07001362pgd_t swapper_pg_dir[2048];
Linus Torvalds1da177e2005-04-16 15:20:36 -07001363
David S. Millerc4bce902006-02-11 21:57:54 -08001364static void sun4u_pgprot_init(void);
1365static void sun4v_pgprot_init(void);
1366
Linus Torvalds1da177e2005-04-16 15:20:36 -07001367void __init paging_init(void)
1368{
David S. Millerd1112012006-03-08 02:16:07 -08001369 unsigned long end_pfn, pages_avail, shift, phys_base;
David S. Miller0836a0e2005-09-28 21:38:08 -07001370 unsigned long real_end, i;
1371
David S. Miller481295f2006-02-07 21:51:08 -08001372 kern_base = (prom_boot_mapping_phys_low >> 22UL) << 22UL;
1373 kern_size = (unsigned long)&_end - (unsigned long)KERNBASE;
1374
David S. Millerd7744a02006-02-21 22:31:11 -08001375 /* Invalidate both kernel TSBs. */
David S. Miller8b234272006-02-17 18:01:02 -08001376 memset(swapper_tsb, 0x40, sizeof(swapper_tsb));
David S. Millerd1acb422007-03-16 17:20:28 -07001377#ifndef CONFIG_DEBUG_PAGEALLOC
David S. Millerd7744a02006-02-21 22:31:11 -08001378 memset(swapper_4m_tsb, 0x40, sizeof(swapper_4m_tsb));
David S. Millerd1acb422007-03-16 17:20:28 -07001379#endif
David S. Miller8b234272006-02-17 18:01:02 -08001380
David S. Millerc4bce902006-02-11 21:57:54 -08001381 if (tlb_type == hypervisor)
1382 sun4v_pgprot_init();
1383 else
1384 sun4u_pgprot_init();
1385
David S. Millerd257d5d2006-02-06 23:44:37 -08001386 if (tlb_type == cheetah_plus ||
1387 tlb_type == hypervisor)
David S. Miller517af332006-02-01 15:55:21 -08001388 tsb_phys_patch();
1389
David S. Miller490384e2006-02-11 14:41:18 -08001390 if (tlb_type == hypervisor) {
David S. Millerd257d5d2006-02-06 23:44:37 -08001391 sun4v_patch_tlb_handlers();
David S. Miller490384e2006-02-11 14:41:18 -08001392 sun4v_ktsb_init();
1393 }
David S. Millerd257d5d2006-02-06 23:44:37 -08001394
David S. Miller13edad72005-09-29 17:58:26 -07001395 /* Find available physical memory... */
1396 read_obp_memory("available", &pavail[0], &pavail_ents);
David S. Miller0836a0e2005-09-28 21:38:08 -07001397
1398 phys_base = 0xffffffffffffffffUL;
David S. Miller13edad72005-09-29 17:58:26 -07001399 for (i = 0; i < pavail_ents; i++)
1400 phys_base = min(phys_base, pavail[i].phys_addr);
David S. Miller0836a0e2005-09-28 21:38:08 -07001401
Linus Torvalds1da177e2005-04-16 15:20:36 -07001402 set_bit(0, mmu_context_bmap);
1403
David S. Miller2bdb3cb2005-09-22 01:08:57 -07001404 shift = kern_base + PAGE_OFFSET - ((unsigned long)KERNBASE);
1405
Linus Torvalds1da177e2005-04-16 15:20:36 -07001406 real_end = (unsigned long)_end;
1407 if ((real_end > ((unsigned long)KERNBASE + 0x400000)))
1408 bigkernel = 1;
David S. Miller2bdb3cb2005-09-22 01:08:57 -07001409 if ((real_end > ((unsigned long)KERNBASE + 0x800000))) {
1410 prom_printf("paging_init: Kernel > 8MB, too large.\n");
1411 prom_halt();
Linus Torvalds1da177e2005-04-16 15:20:36 -07001412 }
David S. Miller2bdb3cb2005-09-22 01:08:57 -07001413
1414 /* Set kernel pgd to upper alias so physical page computations
Linus Torvalds1da177e2005-04-16 15:20:36 -07001415 * work.
1416 */
1417 init_mm.pgd += ((shift) / (sizeof(pgd_t)));
1418
David S. Miller56425302005-09-25 16:46:57 -07001419 memset(swapper_low_pmd_dir, 0, sizeof(swapper_low_pmd_dir));
Linus Torvalds1da177e2005-04-16 15:20:36 -07001420
1421 /* Now can init the kernel/bad page tables. */
1422 pud_set(pud_offset(&swapper_pg_dir[0], 0),
David S. Miller56425302005-09-25 16:46:57 -07001423 swapper_low_pmd_dir + (shift / sizeof(pgd_t)));
Linus Torvalds1da177e2005-04-16 15:20:36 -07001424
David S. Millerc9c10832005-10-12 12:22:46 -07001425 inherit_prom_mappings();
David S. Miller5085b4a2005-09-22 00:45:41 -07001426
David S. Millera8b900d2006-01-31 18:33:37 -08001427 /* Ok, we can use our TLB miss and window trap handlers safely. */
1428 setup_tba();
Linus Torvalds1da177e2005-04-16 15:20:36 -07001429
David S. Millerc9c10832005-10-12 12:22:46 -07001430 __flush_tlb_all();
David S. Miller9ad98c52005-10-05 15:12:00 -07001431
David S. Miller490384e2006-02-11 14:41:18 -08001432 if (tlb_type == hypervisor)
1433 sun4v_ktsb_register();
1434
David S. Miller2bdb3cb2005-09-22 01:08:57 -07001435 /* Setup bootmem... */
1436 pages_avail = 0;
David S. Millerd1112012006-03-08 02:16:07 -08001437 last_valid_pfn = end_pfn = bootmem_init(&pages_avail, phys_base);
1438
David S. Miller17b0e192006-03-08 15:57:03 -08001439 max_mapnr = last_valid_pfn;
David S. Miller2bdb3cb2005-09-22 01:08:57 -07001440
David S. Miller56425302005-09-25 16:46:57 -07001441 kernel_physical_mapping_init();
David S. Miller56425302005-09-25 16:46:57 -07001442
David S. Miller372b07b2006-06-21 15:35:28 -07001443 prom_build_devicetree();
1444
Linus Torvalds1da177e2005-04-16 15:20:36 -07001445 {
1446 unsigned long zones_size[MAX_NR_ZONES];
1447 unsigned long zholes_size[MAX_NR_ZONES];
Linus Torvalds1da177e2005-04-16 15:20:36 -07001448 int znum;
1449
1450 for (znum = 0; znum < MAX_NR_ZONES; znum++)
1451 zones_size[znum] = zholes_size[znum] = 0;
1452
David S. Miller1b51d3a2007-02-12 00:13:31 -08001453 zones_size[ZONE_NORMAL] = end_pfn;
1454 zholes_size[ZONE_NORMAL] = end_pfn - pages_avail;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001455
1456 free_area_init_node(0, &contig_page_data, zones_size,
David S. Miller17b0e192006-03-08 15:57:03 -08001457 __pa(PAGE_OFFSET) >> PAGE_SHIFT,
1458 zholes_size);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001459 }
1460
1461 device_scan();
1462}
1463
Linus Torvalds1da177e2005-04-16 15:20:36 -07001464static void __init taint_real_pages(void)
1465{
Linus Torvalds1da177e2005-04-16 15:20:36 -07001466 int i;
1467
David S. Miller13edad72005-09-29 17:58:26 -07001468 read_obp_memory("available", &pavail_rescan[0], &pavail_rescan_ents);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001469
David S. Miller13edad72005-09-29 17:58:26 -07001470 /* Find changes discovered in the physmem available rescan and
Linus Torvalds1da177e2005-04-16 15:20:36 -07001471 * reserve the lost portions in the bootmem maps.
1472 */
David S. Miller13edad72005-09-29 17:58:26 -07001473 for (i = 0; i < pavail_ents; i++) {
Linus Torvalds1da177e2005-04-16 15:20:36 -07001474 unsigned long old_start, old_end;
1475
David S. Miller13edad72005-09-29 17:58:26 -07001476 old_start = pavail[i].phys_addr;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001477 old_end = old_start +
David S. Miller13edad72005-09-29 17:58:26 -07001478 pavail[i].reg_size;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001479 while (old_start < old_end) {
1480 int n;
1481
David S. Millerc2a5a462006-06-22 00:01:56 -07001482 for (n = 0; n < pavail_rescan_ents; n++) {
Linus Torvalds1da177e2005-04-16 15:20:36 -07001483 unsigned long new_start, new_end;
1484
David S. Miller13edad72005-09-29 17:58:26 -07001485 new_start = pavail_rescan[n].phys_addr;
1486 new_end = new_start +
1487 pavail_rescan[n].reg_size;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001488
1489 if (new_start <= old_start &&
1490 new_end >= (old_start + PAGE_SIZE)) {
David S. Miller13edad72005-09-29 17:58:26 -07001491 set_bit(old_start >> 22,
1492 sparc64_valid_addr_bitmap);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001493 goto do_next_page;
1494 }
1495 }
1496 reserve_bootmem(old_start, PAGE_SIZE);
1497
1498 do_next_page:
1499 old_start += PAGE_SIZE;
1500 }
1501 }
1502}
1503
David S. Millerc2a5a462006-06-22 00:01:56 -07001504int __init page_in_phys_avail(unsigned long paddr)
1505{
1506 int i;
1507
1508 paddr &= PAGE_MASK;
1509
1510 for (i = 0; i < pavail_rescan_ents; i++) {
1511 unsigned long start, end;
1512
1513 start = pavail_rescan[i].phys_addr;
1514 end = start + pavail_rescan[i].reg_size;
1515
1516 if (paddr >= start && paddr < end)
1517 return 1;
1518 }
1519 if (paddr >= kern_base && paddr < (kern_base + kern_size))
1520 return 1;
1521#ifdef CONFIG_BLK_DEV_INITRD
1522 if (paddr >= __pa(initrd_start) &&
1523 paddr < __pa(PAGE_ALIGN(initrd_end)))
1524 return 1;
1525#endif
1526
1527 return 0;
1528}
1529
Linus Torvalds1da177e2005-04-16 15:20:36 -07001530void __init mem_init(void)
1531{
1532 unsigned long codepages, datapages, initpages;
1533 unsigned long addr, last;
1534 int i;
1535
1536 i = last_valid_pfn >> ((22 - PAGE_SHIFT) + 6);
1537 i += 1;
David S. Miller2bdb3cb2005-09-22 01:08:57 -07001538 sparc64_valid_addr_bitmap = (unsigned long *) alloc_bootmem(i << 3);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001539 if (sparc64_valid_addr_bitmap == NULL) {
1540 prom_printf("mem_init: Cannot alloc valid_addr_bitmap.\n");
1541 prom_halt();
1542 }
1543 memset(sparc64_valid_addr_bitmap, 0, i << 3);
1544
1545 addr = PAGE_OFFSET + kern_base;
1546 last = PAGE_ALIGN(kern_size) + addr;
1547 while (addr < last) {
1548 set_bit(__pa(addr) >> 22, sparc64_valid_addr_bitmap);
1549 addr += PAGE_SIZE;
1550 }
1551
1552 taint_real_pages();
1553
Linus Torvalds1da177e2005-04-16 15:20:36 -07001554 high_memory = __va(last_valid_pfn << PAGE_SHIFT);
1555
1556#ifdef CONFIG_DEBUG_BOOTMEM
1557 prom_printf("mem_init: Calling free_all_bootmem().\n");
1558#endif
David S. Millerf1cfdb52007-03-15 22:52:18 -07001559
1560 /* We subtract one to account for the mem_map_zero page
1561 * allocated below.
1562 */
Linus Torvalds1da177e2005-04-16 15:20:36 -07001563 totalram_pages = num_physpages = free_all_bootmem() - 1;
1564
1565 /*
1566 * Set up the zero page, mark it reserved, so that page count
1567 * is not manipulated when freeing the page from user ptes.
1568 */
1569 mem_map_zero = alloc_pages(GFP_KERNEL|__GFP_ZERO, 0);
1570 if (mem_map_zero == NULL) {
1571 prom_printf("paging_init: Cannot alloc zero page.\n");
1572 prom_halt();
1573 }
1574 SetPageReserved(mem_map_zero);
1575
1576 codepages = (((unsigned long) _etext) - ((unsigned long) _start));
1577 codepages = PAGE_ALIGN(codepages) >> PAGE_SHIFT;
1578 datapages = (((unsigned long) _edata) - ((unsigned long) _etext));
1579 datapages = PAGE_ALIGN(datapages) >> PAGE_SHIFT;
1580 initpages = (((unsigned long) __init_end) - ((unsigned long) __init_begin));
1581 initpages = PAGE_ALIGN(initpages) >> PAGE_SHIFT;
1582
Christoph Lameter96177292007-02-10 01:43:03 -08001583 printk("Memory: %luk available (%ldk kernel code, %ldk data, %ldk init) [%016lx,%016lx]\n",
Linus Torvalds1da177e2005-04-16 15:20:36 -07001584 nr_free_pages() << (PAGE_SHIFT-10),
1585 codepages << (PAGE_SHIFT-10),
1586 datapages << (PAGE_SHIFT-10),
1587 initpages << (PAGE_SHIFT-10),
1588 PAGE_OFFSET, (last_valid_pfn << PAGE_SHIFT));
1589
1590 if (tlb_type == cheetah || tlb_type == cheetah_plus)
1591 cheetah_ecache_flush_init();
1592}
1593
David S. Miller898cf0e2005-09-23 11:59:44 -07001594void free_initmem(void)
Linus Torvalds1da177e2005-04-16 15:20:36 -07001595{
1596 unsigned long addr, initend;
1597
1598 /*
1599 * The init section is aligned to 8k in vmlinux.lds. Page align for >8k pagesizes.
1600 */
1601 addr = PAGE_ALIGN((unsigned long)(__init_begin));
1602 initend = (unsigned long)(__init_end) & PAGE_MASK;
1603 for (; addr < initend; addr += PAGE_SIZE) {
1604 unsigned long page;
1605 struct page *p;
1606
1607 page = (addr +
1608 ((unsigned long) __va(kern_base)) -
1609 ((unsigned long) KERNBASE));
Randy Dunlapc9cf5522006-06-27 02:53:52 -07001610 memset((void *)addr, POISON_FREE_INITMEM, PAGE_SIZE);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001611 p = virt_to_page(page);
1612
1613 ClearPageReserved(p);
Nick Piggin7835e982006-03-22 00:08:40 -08001614 init_page_count(p);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001615 __free_page(p);
1616 num_physpages++;
1617 totalram_pages++;
1618 }
1619}
1620
1621#ifdef CONFIG_BLK_DEV_INITRD
1622void free_initrd_mem(unsigned long start, unsigned long end)
1623{
1624 if (start < end)
1625 printk ("Freeing initrd memory: %ldk freed\n", (end - start) >> 10);
1626 for (; start < end; start += PAGE_SIZE) {
1627 struct page *p = virt_to_page(start);
1628
1629 ClearPageReserved(p);
Nick Piggin7835e982006-03-22 00:08:40 -08001630 init_page_count(p);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001631 __free_page(p);
1632 num_physpages++;
1633 totalram_pages++;
1634 }
1635}
1636#endif
David S. Millerc4bce902006-02-11 21:57:54 -08001637
David S. Millerc4bce902006-02-11 21:57:54 -08001638#define _PAGE_CACHE_4U (_PAGE_CP_4U | _PAGE_CV_4U)
1639#define _PAGE_CACHE_4V (_PAGE_CP_4V | _PAGE_CV_4V)
1640#define __DIRTY_BITS_4U (_PAGE_MODIFIED_4U | _PAGE_WRITE_4U | _PAGE_W_4U)
1641#define __DIRTY_BITS_4V (_PAGE_MODIFIED_4V | _PAGE_WRITE_4V | _PAGE_W_4V)
1642#define __ACCESS_BITS_4U (_PAGE_ACCESSED_4U | _PAGE_READ_4U | _PAGE_R)
1643#define __ACCESS_BITS_4V (_PAGE_ACCESSED_4V | _PAGE_READ_4V | _PAGE_R)
1644
1645pgprot_t PAGE_KERNEL __read_mostly;
1646EXPORT_SYMBOL(PAGE_KERNEL);
1647
1648pgprot_t PAGE_KERNEL_LOCKED __read_mostly;
1649pgprot_t PAGE_COPY __read_mostly;
David S. Miller0f159522006-02-18 12:43:16 -08001650
1651pgprot_t PAGE_SHARED __read_mostly;
1652EXPORT_SYMBOL(PAGE_SHARED);
1653
David S. Millerc4bce902006-02-11 21:57:54 -08001654pgprot_t PAGE_EXEC __read_mostly;
1655unsigned long pg_iobits __read_mostly;
1656
1657unsigned long _PAGE_IE __read_mostly;
David S. Miller987c74f2006-06-25 01:34:43 -07001658EXPORT_SYMBOL(_PAGE_IE);
David S. Millerb2bef442006-02-23 01:55:55 -08001659
David S. Millerc4bce902006-02-11 21:57:54 -08001660unsigned long _PAGE_E __read_mostly;
David S. Millerb2bef442006-02-23 01:55:55 -08001661EXPORT_SYMBOL(_PAGE_E);
1662
David S. Millerc4bce902006-02-11 21:57:54 -08001663unsigned long _PAGE_CACHE __read_mostly;
David S. Millerb2bef442006-02-23 01:55:55 -08001664EXPORT_SYMBOL(_PAGE_CACHE);
David S. Millerc4bce902006-02-11 21:57:54 -08001665
1666static void prot_init_common(unsigned long page_none,
1667 unsigned long page_shared,
1668 unsigned long page_copy,
1669 unsigned long page_readonly,
1670 unsigned long page_exec_bit)
1671{
1672 PAGE_COPY = __pgprot(page_copy);
David S. Miller0f159522006-02-18 12:43:16 -08001673 PAGE_SHARED = __pgprot(page_shared);
David S. Millerc4bce902006-02-11 21:57:54 -08001674
1675 protection_map[0x0] = __pgprot(page_none);
1676 protection_map[0x1] = __pgprot(page_readonly & ~page_exec_bit);
1677 protection_map[0x2] = __pgprot(page_copy & ~page_exec_bit);
1678 protection_map[0x3] = __pgprot(page_copy & ~page_exec_bit);
1679 protection_map[0x4] = __pgprot(page_readonly);
1680 protection_map[0x5] = __pgprot(page_readonly);
1681 protection_map[0x6] = __pgprot(page_copy);
1682 protection_map[0x7] = __pgprot(page_copy);
1683 protection_map[0x8] = __pgprot(page_none);
1684 protection_map[0x9] = __pgprot(page_readonly & ~page_exec_bit);
1685 protection_map[0xa] = __pgprot(page_shared & ~page_exec_bit);
1686 protection_map[0xb] = __pgprot(page_shared & ~page_exec_bit);
1687 protection_map[0xc] = __pgprot(page_readonly);
1688 protection_map[0xd] = __pgprot(page_readonly);
1689 protection_map[0xe] = __pgprot(page_shared);
1690 protection_map[0xf] = __pgprot(page_shared);
1691}
1692
1693static void __init sun4u_pgprot_init(void)
1694{
1695 unsigned long page_none, page_shared, page_copy, page_readonly;
1696 unsigned long page_exec_bit;
1697
1698 PAGE_KERNEL = __pgprot (_PAGE_PRESENT_4U | _PAGE_VALID |
1699 _PAGE_CACHE_4U | _PAGE_P_4U |
1700 __ACCESS_BITS_4U | __DIRTY_BITS_4U |
1701 _PAGE_EXEC_4U);
1702 PAGE_KERNEL_LOCKED = __pgprot (_PAGE_PRESENT_4U | _PAGE_VALID |
1703 _PAGE_CACHE_4U | _PAGE_P_4U |
1704 __ACCESS_BITS_4U | __DIRTY_BITS_4U |
1705 _PAGE_EXEC_4U | _PAGE_L_4U);
1706 PAGE_EXEC = __pgprot(_PAGE_EXEC_4U);
1707
1708 _PAGE_IE = _PAGE_IE_4U;
1709 _PAGE_E = _PAGE_E_4U;
1710 _PAGE_CACHE = _PAGE_CACHE_4U;
1711
1712 pg_iobits = (_PAGE_VALID | _PAGE_PRESENT_4U | __DIRTY_BITS_4U |
1713 __ACCESS_BITS_4U | _PAGE_E_4U);
1714
David S. Millerd1acb422007-03-16 17:20:28 -07001715#ifdef CONFIG_DEBUG_PAGEALLOC
1716 kern_linear_pte_xor[0] = (_PAGE_VALID | _PAGE_SZBITS_4U) ^
1717 0xfffff80000000000;
1718#else
David S. Miller9cc3a1a2006-02-21 20:51:13 -08001719 kern_linear_pte_xor[0] = (_PAGE_VALID | _PAGE_SZ4MB_4U) ^
David S. Millerc4bce902006-02-11 21:57:54 -08001720 0xfffff80000000000;
David S. Millerd1acb422007-03-16 17:20:28 -07001721#endif
David S. Miller9cc3a1a2006-02-21 20:51:13 -08001722 kern_linear_pte_xor[0] |= (_PAGE_CP_4U | _PAGE_CV_4U |
1723 _PAGE_P_4U | _PAGE_W_4U);
1724
1725 /* XXX Should use 256MB on Panther. XXX */
1726 kern_linear_pte_xor[1] = kern_linear_pte_xor[0];
David S. Millerc4bce902006-02-11 21:57:54 -08001727
1728 _PAGE_SZBITS = _PAGE_SZBITS_4U;
1729 _PAGE_ALL_SZ_BITS = (_PAGE_SZ4MB_4U | _PAGE_SZ512K_4U |
1730 _PAGE_SZ64K_4U | _PAGE_SZ8K_4U |
1731 _PAGE_SZ32MB_4U | _PAGE_SZ256MB_4U);
1732
1733
1734 page_none = _PAGE_PRESENT_4U | _PAGE_ACCESSED_4U | _PAGE_CACHE_4U;
1735 page_shared = (_PAGE_VALID | _PAGE_PRESENT_4U | _PAGE_CACHE_4U |
1736 __ACCESS_BITS_4U | _PAGE_WRITE_4U | _PAGE_EXEC_4U);
1737 page_copy = (_PAGE_VALID | _PAGE_PRESENT_4U | _PAGE_CACHE_4U |
1738 __ACCESS_BITS_4U | _PAGE_EXEC_4U);
1739 page_readonly = (_PAGE_VALID | _PAGE_PRESENT_4U | _PAGE_CACHE_4U |
1740 __ACCESS_BITS_4U | _PAGE_EXEC_4U);
1741
1742 page_exec_bit = _PAGE_EXEC_4U;
1743
1744 prot_init_common(page_none, page_shared, page_copy, page_readonly,
1745 page_exec_bit);
1746}
1747
1748static void __init sun4v_pgprot_init(void)
1749{
1750 unsigned long page_none, page_shared, page_copy, page_readonly;
1751 unsigned long page_exec_bit;
1752
1753 PAGE_KERNEL = __pgprot (_PAGE_PRESENT_4V | _PAGE_VALID |
1754 _PAGE_CACHE_4V | _PAGE_P_4V |
1755 __ACCESS_BITS_4V | __DIRTY_BITS_4V |
1756 _PAGE_EXEC_4V);
1757 PAGE_KERNEL_LOCKED = PAGE_KERNEL;
1758 PAGE_EXEC = __pgprot(_PAGE_EXEC_4V);
1759
1760 _PAGE_IE = _PAGE_IE_4V;
1761 _PAGE_E = _PAGE_E_4V;
1762 _PAGE_CACHE = _PAGE_CACHE_4V;
1763
David S. Millerd1acb422007-03-16 17:20:28 -07001764#ifdef CONFIG_DEBUG_PAGEALLOC
1765 kern_linear_pte_xor[0] = (_PAGE_VALID | _PAGE_SZBITS_4V) ^
1766 0xfffff80000000000;
1767#else
David S. Miller9cc3a1a2006-02-21 20:51:13 -08001768 kern_linear_pte_xor[0] = (_PAGE_VALID | _PAGE_SZ4MB_4V) ^
David S. Millerc4bce902006-02-11 21:57:54 -08001769 0xfffff80000000000;
David S. Millerd1acb422007-03-16 17:20:28 -07001770#endif
David S. Miller9cc3a1a2006-02-21 20:51:13 -08001771 kern_linear_pte_xor[0] |= (_PAGE_CP_4V | _PAGE_CV_4V |
1772 _PAGE_P_4V | _PAGE_W_4V);
1773
David S. Millerd1acb422007-03-16 17:20:28 -07001774#ifdef CONFIG_DEBUG_PAGEALLOC
1775 kern_linear_pte_xor[1] = (_PAGE_VALID | _PAGE_SZBITS_4V) ^
1776 0xfffff80000000000;
1777#else
David S. Miller9cc3a1a2006-02-21 20:51:13 -08001778 kern_linear_pte_xor[1] = (_PAGE_VALID | _PAGE_SZ256MB_4V) ^
1779 0xfffff80000000000;
David S. Millerd1acb422007-03-16 17:20:28 -07001780#endif
David S. Miller9cc3a1a2006-02-21 20:51:13 -08001781 kern_linear_pte_xor[1] |= (_PAGE_CP_4V | _PAGE_CV_4V |
1782 _PAGE_P_4V | _PAGE_W_4V);
David S. Millerc4bce902006-02-11 21:57:54 -08001783
1784 pg_iobits = (_PAGE_VALID | _PAGE_PRESENT_4V | __DIRTY_BITS_4V |
1785 __ACCESS_BITS_4V | _PAGE_E_4V);
1786
1787 _PAGE_SZBITS = _PAGE_SZBITS_4V;
1788 _PAGE_ALL_SZ_BITS = (_PAGE_SZ16GB_4V | _PAGE_SZ2GB_4V |
1789 _PAGE_SZ256MB_4V | _PAGE_SZ32MB_4V |
1790 _PAGE_SZ4MB_4V | _PAGE_SZ512K_4V |
1791 _PAGE_SZ64K_4V | _PAGE_SZ8K_4V);
1792
1793 page_none = _PAGE_PRESENT_4V | _PAGE_ACCESSED_4V | _PAGE_CACHE_4V;
1794 page_shared = (_PAGE_VALID | _PAGE_PRESENT_4V | _PAGE_CACHE_4V |
1795 __ACCESS_BITS_4V | _PAGE_WRITE_4V | _PAGE_EXEC_4V);
1796 page_copy = (_PAGE_VALID | _PAGE_PRESENT_4V | _PAGE_CACHE_4V |
1797 __ACCESS_BITS_4V | _PAGE_EXEC_4V);
1798 page_readonly = (_PAGE_VALID | _PAGE_PRESENT_4V | _PAGE_CACHE_4V |
1799 __ACCESS_BITS_4V | _PAGE_EXEC_4V);
1800
1801 page_exec_bit = _PAGE_EXEC_4V;
1802
1803 prot_init_common(page_none, page_shared, page_copy, page_readonly,
1804 page_exec_bit);
1805}
1806
1807unsigned long pte_sz_bits(unsigned long sz)
1808{
1809 if (tlb_type == hypervisor) {
1810 switch (sz) {
1811 case 8 * 1024:
1812 default:
1813 return _PAGE_SZ8K_4V;
1814 case 64 * 1024:
1815 return _PAGE_SZ64K_4V;
1816 case 512 * 1024:
1817 return _PAGE_SZ512K_4V;
1818 case 4 * 1024 * 1024:
1819 return _PAGE_SZ4MB_4V;
1820 };
1821 } else {
1822 switch (sz) {
1823 case 8 * 1024:
1824 default:
1825 return _PAGE_SZ8K_4U;
1826 case 64 * 1024:
1827 return _PAGE_SZ64K_4U;
1828 case 512 * 1024:
1829 return _PAGE_SZ512K_4U;
1830 case 4 * 1024 * 1024:
1831 return _PAGE_SZ4MB_4U;
1832 };
1833 }
1834}
1835
1836pte_t mk_pte_io(unsigned long page, pgprot_t prot, int space, unsigned long page_size)
1837{
1838 pte_t pte;
David S. Millercf627152006-02-12 21:10:07 -08001839
1840 pte_val(pte) = page | pgprot_val(pgprot_noncached(prot));
David S. Millerc4bce902006-02-11 21:57:54 -08001841 pte_val(pte) |= (((unsigned long)space) << 32);
1842 pte_val(pte) |= pte_sz_bits(page_size);
David S. Millercf627152006-02-12 21:10:07 -08001843
David S. Millerc4bce902006-02-11 21:57:54 -08001844 return pte;
1845}
1846
David S. Millerc4bce902006-02-11 21:57:54 -08001847static unsigned long kern_large_tte(unsigned long paddr)
1848{
1849 unsigned long val;
1850
1851 val = (_PAGE_VALID | _PAGE_SZ4MB_4U |
1852 _PAGE_CP_4U | _PAGE_CV_4U | _PAGE_P_4U |
1853 _PAGE_EXEC_4U | _PAGE_L_4U | _PAGE_W_4U);
1854 if (tlb_type == hypervisor)
1855 val = (_PAGE_VALID | _PAGE_SZ4MB_4V |
1856 _PAGE_CP_4V | _PAGE_CV_4V | _PAGE_P_4V |
1857 _PAGE_EXEC_4V | _PAGE_W_4V);
1858
1859 return val | paddr;
1860}
1861
David S. Millerc4bce902006-02-11 21:57:54 -08001862/* If not locked, zap it. */
1863void __flush_tlb_all(void)
1864{
1865 unsigned long pstate;
1866 int i;
1867
1868 __asm__ __volatile__("flushw\n\t"
1869 "rdpr %%pstate, %0\n\t"
1870 "wrpr %0, %1, %%pstate"
1871 : "=r" (pstate)
1872 : "i" (PSTATE_IE));
1873 if (tlb_type == spitfire) {
1874 for (i = 0; i < 64; i++) {
1875 /* Spitfire Errata #32 workaround */
1876 /* NOTE: Always runs on spitfire, so no
1877 * cheetah+ page size encodings.
1878 */
1879 __asm__ __volatile__("stxa %0, [%1] %2\n\t"
1880 "flush %%g6"
1881 : /* No outputs */
1882 : "r" (0),
1883 "r" (PRIMARY_CONTEXT), "i" (ASI_DMMU));
1884
1885 if (!(spitfire_get_dtlb_data(i) & _PAGE_L_4U)) {
1886 __asm__ __volatile__("stxa %%g0, [%0] %1\n\t"
1887 "membar #Sync"
1888 : /* no outputs */
1889 : "r" (TLB_TAG_ACCESS), "i" (ASI_DMMU));
1890 spitfire_put_dtlb_data(i, 0x0UL);
1891 }
1892
1893 /* Spitfire Errata #32 workaround */
1894 /* NOTE: Always runs on spitfire, so no
1895 * cheetah+ page size encodings.
1896 */
1897 __asm__ __volatile__("stxa %0, [%1] %2\n\t"
1898 "flush %%g6"
1899 : /* No outputs */
1900 : "r" (0),
1901 "r" (PRIMARY_CONTEXT), "i" (ASI_DMMU));
1902
1903 if (!(spitfire_get_itlb_data(i) & _PAGE_L_4U)) {
1904 __asm__ __volatile__("stxa %%g0, [%0] %1\n\t"
1905 "membar #Sync"
1906 : /* no outputs */
1907 : "r" (TLB_TAG_ACCESS), "i" (ASI_IMMU));
1908 spitfire_put_itlb_data(i, 0x0UL);
1909 }
1910 }
1911 } else if (tlb_type == cheetah || tlb_type == cheetah_plus) {
1912 cheetah_flush_dtlb_all();
1913 cheetah_flush_itlb_all();
1914 }
1915 __asm__ __volatile__("wrpr %0, 0, %%pstate"
1916 : : "r" (pstate));
1917}
David S. Miller88d70792006-03-18 19:16:23 -08001918
1919#ifdef CONFIG_MEMORY_HOTPLUG
1920
1921void online_page(struct page *page)
1922{
1923 ClearPageReserved(page);
Nick Pigginfcab1e52006-03-23 07:48:16 +01001924 init_page_count(page);
1925 __free_page(page);
David S. Miller88d70792006-03-18 19:16:23 -08001926 totalram_pages++;
1927 num_physpages++;
1928}
1929
1930int remove_memory(u64 start, u64 size)
1931{
1932 return -EINVAL;
1933}
1934
1935#endif /* CONFIG_MEMORY_HOTPLUG */