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Adrian Salido-Moreno45228942012-08-13 16:19:18 -07001Qualcomm MDSS MDP
2
3MDSS is Mobile Display SubSystem which implements Linux framebuffer APIs to
4drive user interface to different panel interfaces. MDP driver is the core of
5MDSS which manage all data paths to different panel interfaces.
6
7Required properties
8- compatible : Must be "qcom,mdss_mdp"
9- reg : offset and length of the register set for the device.
10- reg-names : names to refer to register sets related to this device
11- interrupts : Interrupt associated with MDSS.
12- vdd-supply : Phandle for vdd regulator device node.
Adrian Salido-Moreno2a228652012-10-01 11:17:33 -070013- qcom,max-clk-rate: Specify maximum MDP core clock rate in hz that this
14 device supports.
Sree Sesha Aravind Vadrevu8be4b982013-01-04 14:09:20 -080015- qcom,mdss-pipe-vig-off: Array of offset for MDP source surface pipes of
16 type VIG, the offsets are calculated from
17 register "mdp_phys" defined in reg property.
18 The number of offsets defined here should
19 reflect the amount of VIG pipes that can be
20 active in MDP for this configuration.
21- qcom,mdss-pipe-vig-fetch-id: Array of shared memory pool fetch ids
22 corresponding to the VIG pipe offsets defined in
23 previous property, the amount of fetch ids
24 defined should match the number of offsets
25 defined in property: qcom,mdss-pipe-vig-off
Ujwal Patel04e5bd32013-08-22 20:47:30 -070026- qcom,mdss-pipe-vig-xin-id: Array of VBIF clients ids (xins) corresponding
27 to the respective VIG pipes. Number of xin ids
28 defined should match the number of offsets
29 defined in property: qcom,mdss-pipe-vig-off
Sree Sesha Aravind Vadrevu8be4b982013-01-04 14:09:20 -080030- qcom,mdss-pipe-rgb-off: Array of offsets for MDP source surface pipes of
31 type RGB, the offsets are calculated from
32 register "mdp_phys" defined in reg property.
33 The number of offsets defined here should
34 reflect the amount of RGB pipes that can be
35 active in MDP for this configuration.
36- qcom,mdss-pipe-rgb-fetch-id: Array of shared memory pool fetch ids
37 corresponding to the RGB pipe offsets defined in
38 previous property, the amount of fetch ids
39 defined should match the number of offsets
40 defined in property: qcom,mdss-pipe-rgb-off
Ujwal Patel04e5bd32013-08-22 20:47:30 -070041- qcom,mdss-pipe-rgb-xin-id: Array of VBIF clients ids (xins) corresponding
42 to the respective RGB pipes. Number of xin ids
43 defined should match the number of offsets
44 defined in property: qcom,mdss-pipe-rgb-off
Sree Sesha Aravind Vadrevu8be4b982013-01-04 14:09:20 -080045- qcom,mdss-pipe-dma-off: Array of offsets for MDP source surface pipes of
46 type DMA, the offsets are calculated from
47 register "mdp_phys" defined in reg property.
48 The number of offsets defined here should
49 reflect the amount of DMA pipes that can be
50 active in MDP for this configuration.
51- qcom,mdss-pipe-dma-fetch-id: Array of shared memory pool fetch ids
52 corresponding to the DMA pipe offsets defined in
53 previous property, the amount of fetch ids
54 defined should match the number of offsets
55 defined in property: qcom,mdss-pipe-dma-off
Ujwal Patel04e5bd32013-08-22 20:47:30 -070056- qcom,mdss-pipe-dma-xin-id: Array of VBIF clients ids (xins) corresponding
57 to the respective DMA pipes. Number of xin ids
58 defined should match the number of offsets
59 defined in property: qcom,mdss-pipe-dma-off
Sree Sesha Aravind Vadrevu6dc413b2013-02-27 17:02:04 -080060- qcom,mdss-smp-data: Array of shared memory pool data. There should
61 be only two values in this property. The first
62 value corresponds to the number of smp blocks
63 and the second is the size of each block
64 present in the mdss hardware.
Sree Sesha Aravind Vadrevu8be4b982013-01-04 14:09:20 -080065- qcom,mdss-ctl-off: Array of offset addresses for the available ctl
66 hw blocks within MDP, these offsets are
67 calculated from register "mdp_phys" defined in
68 reg property. The number of ctl offsets defined
69 here should reflect the number of control paths
70 that can be configured concurrently on MDP for
71 this configuration.
72- qcom,mdss-wb-off: Array of offset addresses for the progammable
73 writeback blocks within MDP. The number of
74 offsets defined should match the number of ctl
75 blocks defined in property: qcom,mdss-ctl-off
76- qcom,mdss-mixer-intf-off: Array of offset addresses for the available
77 mixer blocks that can drive data to panel
78 interfaces.
79 These offsets are be calculated from register
80 "mdp_phys" defined in reg property.
81 The number of offsets defined should reflect the
82 amount of mixers that can drive data to a panel
83 interface.
84- qcom,mdss-dspp-off: Array of offset addresses for the available dspp
85 blocks. These offsets are calculated from
86 regsiter "mdp_phys" defined in reg property.
87 The number of dspp blocks should match the
88 number of mixers driving data to interface
89 defined in property: qcom,mdss-mixer-intf-off
Siddhartha Agrawal98f415c2013-03-26 16:58:01 -070090- qcom,mdss-pingpong-off: Array of offset addresses for the available
91 pingpong blocks. These offsets are calculated
92 from regsiter "mdp_phys" defined in reg property.
93 The number of pingpong blocks should match the
94 number of mixers driving data to interface
95 defined in property: qcom,mdss-mixer-intf-off
Sree Sesha Aravind Vadrevu8be4b982013-01-04 14:09:20 -080096- qcom,mdss-mixer-wb-off: Array of offset addresses for the available
97 mixer blocks that can be drive data to writeback
98 block. These offsets will be calculated from
99 register "mdp_phys" defined in reg property.
100 The number of writeback mixer offsets defined
101 should reflect the number of mixers that can
102 drive data to a writeback block.
Adrian Salido-Moreno26045502013-02-05 22:46:01 -0800103- qcom,mdss-intf-off: Array of offset addresses for the available MDP
104 video interface blocks that can drive data to a
105 panel controller through timing engine.
106 The offsets are calculated from "mdp_phys"
107 defined in reg property. The number of offsets
108 defiend should reflect the number of progammable
Manoj Raob182d132013-06-19 17:37:50 -0700109 interface blocks available in hardware.
110- qcom,mdss-pref-prim-intf: A string which indicates the configured hardware
111 interface between MDP and the primary panel.
112 Individual panel controller drivers initialize
113 hardware based on this property.
114 Based on the interfaces supported at present,
115 possible values are:
116 - "dsi"
117 - "edp"
118 - "hdmi"
Adrian Salido-Moreno4fe81062012-12-04 21:05:03 -0800119
Ujwal Patel0386fbe2013-08-19 11:14:06 -0700120Bus Scaling Data:
121- qcom,msm-bus,name: String property describing MDSS client.
122- qcom,msm-bus,num-cases: This is the the number of Bus Scaling use cases
123 defined in the vectors property. This must be
124 set to <3> for MDSS driver where use-case 0 is
125 used to take off MDSS BW votes from the system.
126 And use-case 1 & 2 are used in ping-pong fashion
127 to generate run-time BW requests.
128- qcom,msm-bus,active-only: A boolean flag indicating if it is active only.
129- qcom,msm-bus,num-paths: This represents the number of paths in each
130 Bus Scaling Usecase. This value depends on
131 how many number of AXI master ports are
132 dedicated to MDSS for particular chipset.
133- qcom,msm-bus,vectors-KBps: * A series of 4 cell properties, with a format
134 of (src, dst, ab, ib) which is defined at
135 Documentation/devicetree/bindings/arm/msm/msm_bus.txt
136 * Current values of src & dst are defined at
137 arch/arm/mach-msm/msm_bus_board.h
138 src values allowed for MDSS are:
139 22 = MSM_BUS_MASTER_MDP_PORT0
140 23 = MSM_BUS_MASTER_MDP_PORT1
141 dst values allowed for MDSS are:
142 512 = MSM_BUS_SLAVE_EBI_CH0
143 ab: Represents aggregated bandwidth.
144 ib: Represents instantaneous bandwidth.
145 * Total number of 4 cell properties will be
146 (number of use-cases * number of paths).
147 * These values will be overridden by the driver
148 based on the run-time requirements. So initial
149 ab and ib values defined here are random and
150 bare no logic except for the use-case 0 where ab
151 and ib values needs to be 0.
152
Huaibin Yang45e31872013-12-09 16:48:24 -0800153- qcom,mdss-prefill-outstanding-buffer-bytes: The size of mdp outstanding buffer
154 in bytes. The buffer is filled during prefill
155 time and the buffer size shall be included in
156 prefill bandwidth calculation.
157- qcom,mdss-prefill-y-buffer-bytes: The size of mdp y plane buffer in bytes. The
158 buffer is filled during prefill time when format
159 is YUV and the buffer size shall be included in
160 prefill bandwidth calculation.
161- qcom,mdss-prefill-scaler-buffer-lines-bilinear: The value indicates how many lines
162 of scaler line buffer need to be filled during
163 prefill time. If bilinear scalar is enabled, then this
164 number of lines is used to determine how many bytes
165 of scaler buffer to be included in prefill bandwidth
166 calculation.
167- qcom,mdss-prefill-scaler-buffer-lines-caf: The value indicates how many lines of
168 of scaler line buffer need to be filled during
169 prefill time. If CAF mode filter is enabled, then
170 this number of lines is used to determine how many
171 bytes of scaler buffer to be included in prefill
172 bandwidth calculation.
173- qcom,mdss-prefill-post-scaler-buffer: The size of post scaler buffer in bytes.
174 The buffer is used to smooth the output of the
175 scaler. If the buffer is present in h/w, it is
176 filled during prefill time and the number of bytes
177 shall be included in prefill bandwidth calculation.
178- qcom,mdss-prefill-pingpong-buffer-pixels: The size of pingpong buffer in pixels.
179 The buffer is used to keep pixels flowing to the
180 panel interface. If the vertical start position of a
181 layer is in the beginning of the active area, pingpong
182 buffer must be filled during prefill time to generate
183 starting lines. The number of bytes to be filled is
184 determined by the line width, starting position,
185 byte per pixel and scaling ratio, this number shall be
186 included in prefill bandwidth calculation.
187- qcom,mdss-prefill-fbc-lines: The value indicates how many lines are required to fill
188 fbc buffer during prefill time if FBC (Frame Buffer
189 Compressor) is enabled. The number of bytes to be filled
190 is determined by the line width, bytes per pixel and
191 scaling ratio, this number shall be included in prefill bandwidth
192 calculation.
Adrian Salido-Morenoe2e742b2013-02-07 01:54:14 -0800193Optional properties:
Chandan Uddaraju29b95f42013-08-27 20:03:14 -0700194- vdd-cx-supply : Phandle for vdd CX regulator device node.
Ujwal Patel954bbbc92013-08-07 21:52:15 -0700195- batfet-supply : Phandle for battery FET regulator device node.
Adrian Salido-Morenoe2e742b2013-02-07 01:54:14 -0800196- qcom,vbif-settings : Array with key-value pairs of constant VBIF register
197 settings used to setup MDSS QoS for optimum performance.
198 The key used should be offset from "vbif_phys" register
199 defined in reg property.
200- qcom,mdp-settings : Array with key-value pairs of constant MDP register
201 settings used to setup MDSS QoS for best performance.
202 The key used should be offset from "mdp_phys" register
203 defined in reg property.
Aravind Venkateswaranc0163532013-03-18 14:17:12 -0700204- qcom,mdss-rot-block-size: The size of a memory block (in pixels) to be used
205 by the rotator. If this property is not specified,
206 then a default value of 128 pixels would be used.
Sree Sesha Aravind Vadrevu10c4d772013-03-28 13:11:12 -0700207- qcom,mdss-has-bwc: Boolean property to indicate the presence of bandwidth
208 compression feature in the rotator.
Sree Sesha Aravind Vadrevu05d4d222013-04-01 14:31:28 -0700209- qcom,mdss-has-decimation: Boolean property to indicate the presence of
210 decimation feature in fetch.
Carl Vanderlipace4b4b2013-04-24 10:09:49 -0700211- qcom,mdss-ad-off: Array of offset addresses for the available
212 Assertive Display (AD) blocks. These offsets
213 are calculated from the register "mdp_phys"
214 defined in reg property. The number of AD
215 offsets should be less than or equal to the
216 number of mixers driving interfaces defined in
217 property: qcom,mdss-mixer-intf-off. Assumes
218 that AD blocks are aligned with the mixer
219 offsets as well (i.e. the first mixer offset
220 corresponds to the same pathway as the first
221 AD offset).
Sree Sesha Aravind Vadrevuc6deb392013-06-07 15:50:49 -0700222- qcom,mdss-has-wfd-blk: Boolean property to indicate the presence of dedicated
223 writeback wfd block in MDSS as opposed to writeback
224 block that is shared between rotator and wfd.
Krishna Chaitanya Parimif7aca912014-02-10 15:26:06 +0530225- qcom,mdss-no-lut-read: Boolean property to indicate reading of LUT is
226 not supported.
Mayank Chopra710652b2013-06-12 15:58:04 +0530227- qcom,mdss-smp-mb-per-pipe: Maximum number of shared memory pool blocks
228 restricted for a source surface pipe. If this
229 property is not specified, no such restriction
230 would be applied.
Ujwal Patel0ced4ec2013-09-02 14:33:41 -0700231- qcom,mdss-pipe-rgb-fixed-mmb: Array of indexes describing fixed Memory Macro
232 Blocks (MMBs) for rgb pipes. First value denotes
233 total numbers of MMBs per pipe while values, if
234 any, following first one denotes indexes of MMBs
235 to that RGB pipe.
Sree Sesha Aravind Vadrevu30e930e2013-11-19 10:44:57 -0800236- qcom,max-bandwidth-low-kbps: This value indicates the max bandwidth in KB
237 that can be supported without underflow.
238 This is a low bandwidth threshold which should
239 be applied in most scenarios to be safe from
240 underflows when unable to satisfy bandwith
241 requirements.
242- qcom,max-bandwidth-high-kbps: This value indicates the max bandwidth in KB
243 that can be supported without underflow.
244 This is a high bandwidth threshold which can be
245 applied in scenarios where panel interface can
246 be more tolerant to memory latency such as
247 command mode panels.
Jayant Shekhar83ddc7c2014-01-08 19:32:23 +0530248- qcom,mdss-rotator-ot-limit: This integer value indicates maximum number of pending
249 writes that can be allowed from rotator client. Default
250 value is 16 which is the maximum. This value can be
251 used to reduce the pending writes limit dynamically
252 and can be tuned to match performance requirements
253 depending upon system state.
Ujwal Patel5427d0d2013-10-15 11:27:11 -0700254
255Fudge Factors: Fudge factors are used to boost demand for
256 resources like bus bandswidth, clk rate etc. to
257 overcome system inefficiencies and avoid any
258 glitches. These fudge factors are expressed in
259 terms of numerator and denominator. First value
260 is numerator followed by denominator. They all
261 are optional but highly recommended.
262 Ex:
263 x = value to be fudged
264 a = numerator, default value is 1
265 b = denominator, default value is 1
266 FUDGE(x, a, b) = ((x * a) / b)
267- qcom,mdss-ib-factor: This fudge factor is applied to calculated ib
268 values in default conditions.
Ujwal Patel5427d0d2013-10-15 11:27:11 -0700269- qcom,mdss-clk-factor: This fudge factor is applied to calculated mdp
270 clk rate in default conditions.
Shalabh Jaine397ee22013-07-12 11:52:37 -0700271- qcom,mdss-highest-bank-bit: Property to indicate tile format as opposed to usual
272 linear format. The value tells the GPU highest memory
273 bank bit used.
Ujwal Patel5427d0d2013-10-15 11:27:11 -0700274
Adrian Salido-Moreno4fe81062012-12-04 21:05:03 -0800275Optional subnodes:
276Child nodes representing the frame buffer virtual devices.
277
278Subnode properties:
279- compatible : Must be "qcom,mdss-fb"
280- cell-index : Index representing frame buffer
Sree Sesha Aravind Vadrevu465accd2013-04-17 18:33:47 -0700281- qcom,mdss-mixer-swap: A boolean property that indicates if the mixer muxes
282 need to be swapped based on the target panel.
283 By default the property is not defined.
Huaibin Yang581fc632013-06-13 17:05:23 -0700284- qcom,mdss-fb-split: Array of splitted framebuffer size. There should
285 be only two values in this property. The values
286 correspond to the left and right size respectively.
287 MDP muxes two mixer output together before sending to
288 the panel interface and these values are used to set
289 each mixer width, so the sum of these two values
290 should be equal to the panel x-resolution.
Adrian Salido-Moreno4fe81062012-12-04 21:05:03 -0800291
Huaibin Yang581fc632013-06-13 17:05:23 -0700292 Note that if the sum of two values is not equal to
293 x-resolution or this subnode itself is not defined
294 in device tree there are two cases: 1)split is not
295 enabled if framebuffer size is less than max mixer
296 width; 2) the defaut even split is enabled if frambuffer
297 size is greater than max mixer width.
Siddhartha Agrawale6de0482013-07-18 16:30:27 -0700298- qcom,memblock-reserve: Specifies the memory location and the size reserved
299 for the framebuffer used to display the splash screen.
300 This property is required whenever the continuous splash
301 screen feature is enabled for the corresponding
302 framebuffer device.
Dhaval Patel3df53d02014-01-14 13:02:18 -0800303- qcom,mdss-fb-splash-logo-enabled: The boolean entry enables the framebuffer
304 driver to display the splash logo image.
305 It is independent of continuous splash
306 screen feature and has no relation with
307 qcom,cont-splash-enabled entry present in
308 panel configuration.
Adrian Salido-Moreno4fe81062012-12-04 21:05:03 -0800309
Adrian Salido-Moreno45228942012-08-13 16:19:18 -0700310Example:
Manoj Rao702a0432013-08-12 22:58:27 -0700311 mdss_mdp: qcom,mdss_mdp@fd900000 {
Adrian Salido-Moreno45228942012-08-13 16:19:18 -0700312 compatible = "qcom,mdss_mdp";
313 reg = <0xfd900000 0x22100>,
314 <0xfd924000 0x1000>;
315 reg-names = "mdp_phys", "vbif_phys";
316 interrupts = <0 72 0>;
317 vdd-supply = <&gdsc_mdss>;
Chandan Uddaraju29b95f42013-08-27 20:03:14 -0700318 vdd-cx-supply = <&pm8841_s2_corner>;
Ujwal Patel954bbbc92013-08-07 21:52:15 -0700319 batfet-supply = <&pm8941_chg_batif>;
Sree Sesha Aravind Vadrevu30e930e2013-11-19 10:44:57 -0800320
321 qcom,max-bandwidth-low-kbps = <2300000>;
322 qcom,max-bandwidth-high-kbps = <3000000>;
323
Ujwal Patel0386fbe2013-08-19 11:14:06 -0700324 /* Bus Scale Settings */
325 qcom,msm-bus,name = "mdss_mdp";
326 qcom,msm-bus,num-cases = <3>;
327 qcom,msm-bus,num-paths = <2>;
328 qcom,msm-bus,vectors-KBps =
329 <22 512 0 0>, <23 512 0 0>,
330 <22 512 0 6400000>, <23 512 0 6400000>,
331 <22 512 0 6400000>, <23 512 0 6400000>;
332
Ujwal Patel5427d0d2013-10-15 11:27:11 -0700333 /* Fudge factors */
334 qcom,mdss-ab-factor = <2 1>; /* 2 times */
335 qcom,mdss-ib-factor = <3 2>; /* 1.5 times */
Ujwal Patel5427d0d2013-10-15 11:27:11 -0700336 qcom,mdss-clk-factor = <5 4>; /* 1.25 times */
337
Adrian Salido-Moreno2a228652012-10-01 11:17:33 -0700338 qcom,max-clk-rate = <320000000>;
Adrian Salido-Morenoe2e742b2013-02-07 01:54:14 -0800339 qcom,vbif-settings = <0x0004 0x00000001>,
340 <0x00D8 0x00000707>;
341 qcom,mdp-settings = <0x02E0 0x000000AA>,
342 <0x02E4 0x00000055>;
Sree Sesha Aravind Vadrevu8be4b982013-01-04 14:09:20 -0800343 qcom,mdss-pipe-vig-off = <0x00001200 0x00001600
344 0x00001A00>;
345 qcom,mdss-pipe-rgb-off = <0x00001E00 0x00002200
346 0x00002600>;
347 qcom,mdss-pipe-dma-off = <0x00002A00 0x00002E00>;
348 qcom,mdss-pipe-vig-fetch-id = <1 4 7>;
349 qcom,mdss-pipe-rgb-fetch-id = <16 17 18>;
350 qcom,mdss-pipe-dma-fetch-id = <10 13>;
Ujwal Patel0ced4ec2013-09-02 14:33:41 -0700351 qcom,mdss-pipe-rgb-fixed-mmb = <2 0 1>,
352 <2 2 3>,
353 <2 4 5>,
354 <2 6 7>;
Ujwal Patel04e5bd32013-08-22 20:47:30 -0700355
356 qcom,mdss-pipe-vig-xin-id = <0 4 8>;
357 qcom,mdss-pipe-rgb-xin-id = <1 5 9>;
358 qcom,mdss-pipe-dma-xin-id = <2 10>;
359
Sree Sesha Aravind Vadrevu6dc413b2013-02-27 17:02:04 -0800360 qcom,mdss-smp-data = <22 4096>;
Aravind Venkateswaranc0163532013-03-18 14:17:12 -0700361 qcom,mdss-rot-block-size = <64>;
Jayant Shekhar83ddc7c2014-01-08 19:32:23 +0530362 qcom,mdss-rotator-ot-limit = <2>;
Mayank Chopra710652b2013-06-12 15:58:04 +0530363 qcom,mdss-smp-mb-per-pipe = <2>;
Manoj Raob182d132013-06-19 17:37:50 -0700364 qcom,mdss-pref-prim-intf = "dsi";
Sree Sesha Aravind Vadrevu10c4d772013-03-28 13:11:12 -0700365 qcom,mdss-has-bwc;
Sree Sesha Aravind Vadrevu05d4d222013-04-01 14:31:28 -0700366 qcom,mdss-has-decimation;
Sree Sesha Aravind Vadrevuc6deb392013-06-07 15:50:49 -0700367 qcom,mdss-has-wfd-blk;
Krishna Chaitanya Parimif7aca912014-02-10 15:26:06 +0530368 qcom,mdss-no-lut-read;
Sree Sesha Aravind Vadrevu05d4d222013-04-01 14:31:28 -0700369
Sree Sesha Aravind Vadrevu8be4b982013-01-04 14:09:20 -0800370 qcom,mdss-ctl-off = <0x00000600 0x00000700 0x00000800
371 0x00000900 0x0000A00>;
372 qcom,mdss-mixer-intf-off = <0x00003200 0x00003600
373 0x00003A00>;
374 qcom,mdss-mixer-wb-off = <0x00003E00 0x00004200>;
375 qcom,mdss-dspp-off = <0x00004600 0x00004A00 0x00004E00>;
Siddhartha Agrawal98f415c2013-03-26 16:58:01 -0700376 qcom,mdss-pingpong-off = <0x00012D00 0x00012E00 0x00012F00>;
Sree Sesha Aravind Vadrevu8be4b982013-01-04 14:09:20 -0800377 qcom,mdss-wb-off = <0x00011100 0x00013100 0x00015100
378 0x00017100 0x00019100>;
Adrian Salido-Moreno26045502013-02-05 22:46:01 -0800379 qcom,mdss-intf-off = <0x00021100 0x00021300
380 0x00021500 0x00021700>;
Sree Sesha Aravind Vadrevu8be4b982013-01-04 14:09:20 -0800381
Huaibin Yang45e31872013-12-09 16:48:24 -0800382 /* buffer parameters to calculate prefill bandwidth */
383 qcom,mdss-prefill-outstanding-buffer-bytes = <1024>;
384 qcom,mdss-prefill-y-buffer-bytes = <4096>;
385 qcom,mdss-prefill-scaler-buffer-lines-bilinear = <2>;
386 qcom,mdss-prefill-scaler-buffer-lines-caf = <4>;
387 qcom,mdss-prefill-post-scaler-buffer-pixels = <2048>;
388 qcom,mdss-prefill-pingpong-buffer-pixels = <5120>;
389 qcom,mdss-prefill-fbc-lines = <2>;
390
Adrian Salido-Moreno4fe81062012-12-04 21:05:03 -0800391 mdss_fb0: qcom,mdss_fb_primary {
392 cell-index = <0>;
393 compatible = "qcom,mdss-fb";
Sree Sesha Aravind Vadrevu465accd2013-04-17 18:33:47 -0700394 qcom,mdss-mixer-swap;
Huaibin Yang581fc632013-06-13 17:05:23 -0700395 qcom,mdss-fb-split = <480 240>
Dhaval Patel3df53d02014-01-14 13:02:18 -0800396 qcom,mdss-fb-splash-logo-enabled:
Adrian Salido-Moreno4fe81062012-12-04 21:05:03 -0800397 };
Adrian Salido-Moreno45228942012-08-13 16:19:18 -0700398 };
399