Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (C) 2011 The Android Open Source Project |
| 3 | * |
| 4 | * Licensed under the Apache License, Version 2.0 (the "License"); |
| 5 | * you may not use this file except in compliance with the License. |
| 6 | * You may obtain a copy of the License at |
| 7 | * |
| 8 | * http://www.apache.org/licenses/LICENSE-2.0 |
| 9 | * |
| 10 | * Unless required by applicable law or agreed to in writing, software |
| 11 | * distributed under the License is distributed on an "AS IS" BASIS, |
| 12 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. |
| 13 | * See the License for the specific language governing permissions and |
| 14 | * limitations under the License. |
| 15 | */ |
| 16 | |
Andreas Gampe | 0b9203e | 2015-01-22 20:39:27 -0800 | [diff] [blame] | 17 | #include "mir_to_lir-inl.h" |
| 18 | |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 19 | #include "dex/compiler_ir.h" |
Andreas Gampe | 0b9203e | 2015-01-22 20:39:27 -0800 | [diff] [blame] | 20 | #include "dex/mir_graph.h" |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 21 | #include "invoke_type.h" |
| 22 | |
| 23 | namespace art { |
| 24 | |
| 25 | /* This file contains target-independent codegen and support. */ |
| 26 | |
| 27 | /* |
| 28 | * Load an immediate value into a fixed or temp register. Target |
| 29 | * register is clobbered, and marked in_use. |
| 30 | */ |
buzbee | 2700f7e | 2014-03-07 09:46:20 -0800 | [diff] [blame] | 31 | LIR* Mir2Lir::LoadConstant(RegStorage r_dest, int value) { |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 32 | if (IsTemp(r_dest)) { |
| 33 | Clobber(r_dest); |
| 34 | MarkInUse(r_dest); |
| 35 | } |
| 36 | return LoadConstantNoClobber(r_dest, value); |
| 37 | } |
| 38 | |
| 39 | /* |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 40 | * Load a Dalvik register into a physical register. Take care when |
| 41 | * using this routine, as it doesn't perform any bookkeeping regarding |
| 42 | * register liveness. That is the responsibility of the caller. |
| 43 | */ |
buzbee | 2700f7e | 2014-03-07 09:46:20 -0800 | [diff] [blame] | 44 | void Mir2Lir::LoadValueDirect(RegLocation rl_src, RegStorage r_dest) { |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 45 | rl_src = UpdateLoc(rl_src); |
| 46 | if (rl_src.location == kLocPhysReg) { |
buzbee | 2700f7e | 2014-03-07 09:46:20 -0800 | [diff] [blame] | 47 | OpRegCopy(r_dest, rl_src.reg); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 48 | } else if (IsInexpensiveConstant(rl_src)) { |
buzbee | 695d13a | 2014-04-19 13:32:20 -0700 | [diff] [blame] | 49 | // On 64-bit targets, will sign extend. Make sure constant reference is always NULL. |
| 50 | DCHECK(!rl_src.ref || (mir_graph_->ConstantValue(rl_src) == 0)); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 51 | LoadConstantNoClobber(r_dest, mir_graph_->ConstantValue(rl_src)); |
| 52 | } else { |
| 53 | DCHECK((rl_src.location == kLocDalvikFrame) || |
| 54 | (rl_src.location == kLocCompilerTemp)); |
Vladimir Marko | 8dea81c | 2014-06-06 14:50:36 +0100 | [diff] [blame] | 55 | ScopedMemRefType mem_ref_type(this, ResourceMask::kDalvikReg); |
buzbee | 695d13a | 2014-04-19 13:32:20 -0700 | [diff] [blame] | 56 | if (rl_src.ref) { |
Chao-ying Fu | a77ee51 | 2014-07-01 17:43:41 -0700 | [diff] [blame] | 57 | LoadRefDisp(TargetPtrReg(kSp), SRegOffset(rl_src.s_reg_low), r_dest, kNotVolatile); |
buzbee | 695d13a | 2014-04-19 13:32:20 -0700 | [diff] [blame] | 58 | } else { |
Chao-ying Fu | a77ee51 | 2014-07-01 17:43:41 -0700 | [diff] [blame] | 59 | Load32Disp(TargetPtrReg(kSp), SRegOffset(rl_src.s_reg_low), r_dest); |
buzbee | 695d13a | 2014-04-19 13:32:20 -0700 | [diff] [blame] | 60 | } |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 61 | } |
| 62 | } |
| 63 | |
| 64 | /* |
| 65 | * Similar to LoadValueDirect, but clobbers and allocates the target |
| 66 | * register. Should be used when loading to a fixed register (for example, |
| 67 | * loading arguments to an out of line call. |
| 68 | */ |
buzbee | 2700f7e | 2014-03-07 09:46:20 -0800 | [diff] [blame] | 69 | void Mir2Lir::LoadValueDirectFixed(RegLocation rl_src, RegStorage r_dest) { |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 70 | Clobber(r_dest); |
| 71 | MarkInUse(r_dest); |
| 72 | LoadValueDirect(rl_src, r_dest); |
| 73 | } |
| 74 | |
| 75 | /* |
| 76 | * Load a Dalvik register pair into a physical register[s]. Take care when |
| 77 | * using this routine, as it doesn't perform any bookkeeping regarding |
| 78 | * register liveness. That is the responsibility of the caller. |
| 79 | */ |
buzbee | 2700f7e | 2014-03-07 09:46:20 -0800 | [diff] [blame] | 80 | void Mir2Lir::LoadValueDirectWide(RegLocation rl_src, RegStorage r_dest) { |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 81 | rl_src = UpdateLocWide(rl_src); |
| 82 | if (rl_src.location == kLocPhysReg) { |
buzbee | 2700f7e | 2014-03-07 09:46:20 -0800 | [diff] [blame] | 83 | OpRegCopyWide(r_dest, rl_src.reg); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 84 | } else if (IsInexpensiveConstant(rl_src)) { |
buzbee | 2700f7e | 2014-03-07 09:46:20 -0800 | [diff] [blame] | 85 | LoadConstantWide(r_dest, mir_graph_->ConstantValueWide(rl_src)); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 86 | } else { |
| 87 | DCHECK((rl_src.location == kLocDalvikFrame) || |
| 88 | (rl_src.location == kLocCompilerTemp)); |
Vladimir Marko | 8dea81c | 2014-06-06 14:50:36 +0100 | [diff] [blame] | 89 | ScopedMemRefType mem_ref_type(this, ResourceMask::kDalvikReg); |
Chao-ying Fu | a77ee51 | 2014-07-01 17:43:41 -0700 | [diff] [blame] | 90 | LoadBaseDisp(TargetPtrReg(kSp), SRegOffset(rl_src.s_reg_low), r_dest, k64, kNotVolatile); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 91 | } |
| 92 | } |
| 93 | |
| 94 | /* |
| 95 | * Similar to LoadValueDirect, but clobbers and allocates the target |
| 96 | * registers. Should be used when loading to a fixed registers (for example, |
| 97 | * loading arguments to an out of line call. |
| 98 | */ |
buzbee | 2700f7e | 2014-03-07 09:46:20 -0800 | [diff] [blame] | 99 | void Mir2Lir::LoadValueDirectWideFixed(RegLocation rl_src, RegStorage r_dest) { |
| 100 | Clobber(r_dest); |
| 101 | MarkInUse(r_dest); |
| 102 | LoadValueDirectWide(rl_src, r_dest); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 103 | } |
| 104 | |
Brian Carlstrom | 2ce745c | 2013-07-17 17:44:30 -0700 | [diff] [blame] | 105 | RegLocation Mir2Lir::LoadValue(RegLocation rl_src, RegisterClass op_kind) { |
buzbee | a0cd2d7 | 2014-06-01 09:33:49 -0700 | [diff] [blame] | 106 | DCHECK(!rl_src.ref || op_kind == kRefReg); |
Vladimir Marko | 0dc242d | 2014-05-12 16:22:14 +0100 | [diff] [blame] | 107 | rl_src = UpdateLoc(rl_src); |
| 108 | if (rl_src.location == kLocPhysReg) { |
| 109 | if (!RegClassMatches(op_kind, rl_src.reg)) { |
| 110 | // Wrong register class, realloc, copy and transfer ownership. |
| 111 | RegStorage new_reg = AllocTypedTemp(rl_src.fp, op_kind); |
| 112 | OpRegCopy(new_reg, rl_src.reg); |
Serguei Katkov | 02c637e | 2014-10-29 13:48:02 +0600 | [diff] [blame] | 113 | // Clobber the old regs and free it. |
Vladimir Marko | 0dc242d | 2014-05-12 16:22:14 +0100 | [diff] [blame] | 114 | Clobber(rl_src.reg); |
Serguei Katkov | 02c637e | 2014-10-29 13:48:02 +0600 | [diff] [blame] | 115 | FreeTemp(rl_src.reg); |
buzbee | 082833c | 2014-05-17 23:16:26 -0700 | [diff] [blame] | 116 | // ...and mark the new one live. |
Vladimir Marko | 0dc242d | 2014-05-12 16:22:14 +0100 | [diff] [blame] | 117 | rl_src.reg = new_reg; |
buzbee | 082833c | 2014-05-17 23:16:26 -0700 | [diff] [blame] | 118 | MarkLive(rl_src); |
Vladimir Marko | 0dc242d | 2014-05-12 16:22:14 +0100 | [diff] [blame] | 119 | } |
| 120 | return rl_src; |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 121 | } |
Vladimir Marko | 0dc242d | 2014-05-12 16:22:14 +0100 | [diff] [blame] | 122 | |
| 123 | DCHECK_NE(rl_src.s_reg_low, INVALID_SREG); |
| 124 | rl_src.reg = AllocTypedTemp(rl_src.fp, op_kind); |
| 125 | LoadValueDirect(rl_src, rl_src.reg); |
| 126 | rl_src.location = kLocPhysReg; |
| 127 | MarkLive(rl_src); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 128 | return rl_src; |
| 129 | } |
| 130 | |
Brian Carlstrom | 2ce745c | 2013-07-17 17:44:30 -0700 | [diff] [blame] | 131 | void Mir2Lir::StoreValue(RegLocation rl_dest, RegLocation rl_src) { |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 132 | /* |
| 133 | * Sanity checking - should never try to store to the same |
| 134 | * ssa name during the compilation of a single instruction |
| 135 | * without an intervening ClobberSReg(). |
| 136 | */ |
| 137 | if (kIsDebugBuild) { |
| 138 | DCHECK((live_sreg_ == INVALID_SREG) || |
| 139 | (rl_dest.s_reg_low != live_sreg_)); |
| 140 | live_sreg_ = rl_dest.s_reg_low; |
| 141 | } |
| 142 | LIR* def_start; |
| 143 | LIR* def_end; |
| 144 | DCHECK(!rl_dest.wide); |
| 145 | DCHECK(!rl_src.wide); |
| 146 | rl_src = UpdateLoc(rl_src); |
| 147 | rl_dest = UpdateLoc(rl_dest); |
| 148 | if (rl_src.location == kLocPhysReg) { |
buzbee | 2700f7e | 2014-03-07 09:46:20 -0800 | [diff] [blame] | 149 | if (IsLive(rl_src.reg) || |
| 150 | IsPromoted(rl_src.reg) || |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 151 | (rl_dest.location == kLocPhysReg)) { |
| 152 | // Src is live/promoted or Dest has assigned reg. |
Andreas Gampe | 4b537a8 | 2014-06-30 22:24:53 -0700 | [diff] [blame] | 153 | rl_dest = EvalLoc(rl_dest, rl_dest.ref || rl_src.ref ? kRefReg : kAnyReg, false); |
buzbee | 2700f7e | 2014-03-07 09:46:20 -0800 | [diff] [blame] | 154 | OpRegCopy(rl_dest.reg, rl_src.reg); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 155 | } else { |
| 156 | // Just re-assign the registers. Dest gets Src's regs |
Bill Buzbee | 00e1ec6 | 2014-02-27 23:44:13 +0000 | [diff] [blame] | 157 | rl_dest.reg = rl_src.reg; |
buzbee | 2700f7e | 2014-03-07 09:46:20 -0800 | [diff] [blame] | 158 | Clobber(rl_src.reg); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 159 | } |
| 160 | } else { |
| 161 | // Load Src either into promoted Dest or temps allocated for Dest |
Andreas Gampe | 4b537a8 | 2014-06-30 22:24:53 -0700 | [diff] [blame] | 162 | rl_dest = EvalLoc(rl_dest, rl_dest.ref ? kRefReg : kAnyReg, false); |
buzbee | 2700f7e | 2014-03-07 09:46:20 -0800 | [diff] [blame] | 163 | LoadValueDirect(rl_src, rl_dest.reg); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 164 | } |
| 165 | |
| 166 | // Dest is now live and dirty (until/if we flush it to home location) |
buzbee | 091cc40 | 2014-03-31 10:14:40 -0700 | [diff] [blame] | 167 | MarkLive(rl_dest); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 168 | MarkDirty(rl_dest); |
| 169 | |
| 170 | |
| 171 | ResetDefLoc(rl_dest); |
buzbee | 091cc40 | 2014-03-31 10:14:40 -0700 | [diff] [blame] | 172 | if (IsDirty(rl_dest.reg) && LiveOut(rl_dest.s_reg_low)) { |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 173 | def_start = last_lir_insn_; |
Ian Rogers | e98297b | 2014-06-22 07:47:53 +0000 | [diff] [blame] | 174 | ScopedMemRefType mem_ref_type(this, ResourceMask::kDalvikReg); |
Andreas Gampe | 2073e75 | 2014-06-23 15:39:00 +0000 | [diff] [blame] | 175 | if (rl_dest.ref) { |
Chao-ying Fu | a77ee51 | 2014-07-01 17:43:41 -0700 | [diff] [blame] | 176 | StoreRefDisp(TargetPtrReg(kSp), SRegOffset(rl_dest.s_reg_low), rl_dest.reg, kNotVolatile); |
Andreas Gampe | 2073e75 | 2014-06-23 15:39:00 +0000 | [diff] [blame] | 177 | } else { |
Chao-ying Fu | a77ee51 | 2014-07-01 17:43:41 -0700 | [diff] [blame] | 178 | Store32Disp(TargetPtrReg(kSp), SRegOffset(rl_dest.s_reg_low), rl_dest.reg); |
Andreas Gampe | 2073e75 | 2014-06-23 15:39:00 +0000 | [diff] [blame] | 179 | } |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 180 | MarkClean(rl_dest); |
| 181 | def_end = last_lir_insn_; |
| 182 | if (!rl_dest.ref) { |
| 183 | // Exclude references from store elimination |
| 184 | MarkDef(rl_dest, def_start, def_end); |
| 185 | } |
| 186 | } |
| 187 | } |
| 188 | |
Brian Carlstrom | 2ce745c | 2013-07-17 17:44:30 -0700 | [diff] [blame] | 189 | RegLocation Mir2Lir::LoadValueWide(RegLocation rl_src, RegisterClass op_kind) { |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 190 | DCHECK(rl_src.wide); |
Vladimir Marko | 0dc242d | 2014-05-12 16:22:14 +0100 | [diff] [blame] | 191 | rl_src = UpdateLocWide(rl_src); |
| 192 | if (rl_src.location == kLocPhysReg) { |
| 193 | if (!RegClassMatches(op_kind, rl_src.reg)) { |
| 194 | // Wrong register class, realloc, copy and transfer ownership. |
| 195 | RegStorage new_regs = AllocTypedTempWide(rl_src.fp, op_kind); |
| 196 | OpRegCopyWide(new_regs, rl_src.reg); |
Serguei Katkov | 02c637e | 2014-10-29 13:48:02 +0600 | [diff] [blame] | 197 | // Clobber the old regs and free it. |
Vladimir Marko | 0dc242d | 2014-05-12 16:22:14 +0100 | [diff] [blame] | 198 | Clobber(rl_src.reg); |
Serguei Katkov | 02c637e | 2014-10-29 13:48:02 +0600 | [diff] [blame] | 199 | FreeTemp(rl_src.reg); |
buzbee | 082833c | 2014-05-17 23:16:26 -0700 | [diff] [blame] | 200 | // ...and mark the new ones live. |
Vladimir Marko | 0dc242d | 2014-05-12 16:22:14 +0100 | [diff] [blame] | 201 | rl_src.reg = new_regs; |
buzbee | 082833c | 2014-05-17 23:16:26 -0700 | [diff] [blame] | 202 | MarkLive(rl_src); |
Vladimir Marko | 0dc242d | 2014-05-12 16:22:14 +0100 | [diff] [blame] | 203 | } |
| 204 | return rl_src; |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 205 | } |
Vladimir Marko | 0dc242d | 2014-05-12 16:22:14 +0100 | [diff] [blame] | 206 | |
| 207 | DCHECK_NE(rl_src.s_reg_low, INVALID_SREG); |
| 208 | DCHECK_NE(GetSRegHi(rl_src.s_reg_low), INVALID_SREG); |
| 209 | rl_src.reg = AllocTypedTempWide(rl_src.fp, op_kind); |
| 210 | LoadValueDirectWide(rl_src, rl_src.reg); |
| 211 | rl_src.location = kLocPhysReg; |
| 212 | MarkLive(rl_src); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 213 | return rl_src; |
| 214 | } |
| 215 | |
Brian Carlstrom | 2ce745c | 2013-07-17 17:44:30 -0700 | [diff] [blame] | 216 | void Mir2Lir::StoreValueWide(RegLocation rl_dest, RegLocation rl_src) { |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 217 | /* |
| 218 | * Sanity checking - should never try to store to the same |
| 219 | * ssa name during the compilation of a single instruction |
| 220 | * without an intervening ClobberSReg(). |
| 221 | */ |
| 222 | if (kIsDebugBuild) { |
| 223 | DCHECK((live_sreg_ == INVALID_SREG) || |
| 224 | (rl_dest.s_reg_low != live_sreg_)); |
| 225 | live_sreg_ = rl_dest.s_reg_low; |
| 226 | } |
| 227 | LIR* def_start; |
| 228 | LIR* def_end; |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 229 | DCHECK(rl_dest.wide); |
| 230 | DCHECK(rl_src.wide); |
Alexei Zavjalov | c17ebe8 | 2014-02-26 10:38:23 +0700 | [diff] [blame] | 231 | rl_src = UpdateLocWide(rl_src); |
| 232 | rl_dest = UpdateLocWide(rl_dest); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 233 | if (rl_src.location == kLocPhysReg) { |
buzbee | 2700f7e | 2014-03-07 09:46:20 -0800 | [diff] [blame] | 234 | if (IsLive(rl_src.reg) || |
| 235 | IsPromoted(rl_src.reg) || |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 236 | (rl_dest.location == kLocPhysReg)) { |
buzbee | 30adc73 | 2014-05-09 15:10:18 -0700 | [diff] [blame] | 237 | /* |
| 238 | * If src reg[s] are tied to the original Dalvik vreg via liveness or promotion, we |
| 239 | * can't repurpose them. Similarly, if the dest reg[s] are tied to Dalvik vregs via |
| 240 | * promotion, we can't just re-assign. In these cases, we have to copy. |
| 241 | */ |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 242 | rl_dest = EvalLoc(rl_dest, kAnyReg, false); |
buzbee | 2700f7e | 2014-03-07 09:46:20 -0800 | [diff] [blame] | 243 | OpRegCopyWide(rl_dest.reg, rl_src.reg); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 244 | } else { |
| 245 | // Just re-assign the registers. Dest gets Src's regs |
Bill Buzbee | 00e1ec6 | 2014-02-27 23:44:13 +0000 | [diff] [blame] | 246 | rl_dest.reg = rl_src.reg; |
buzbee | 2700f7e | 2014-03-07 09:46:20 -0800 | [diff] [blame] | 247 | Clobber(rl_src.reg); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 248 | } |
| 249 | } else { |
| 250 | // Load Src either into promoted Dest or temps allocated for Dest |
| 251 | rl_dest = EvalLoc(rl_dest, kAnyReg, false); |
buzbee | 2700f7e | 2014-03-07 09:46:20 -0800 | [diff] [blame] | 252 | LoadValueDirectWide(rl_src, rl_dest.reg); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 253 | } |
| 254 | |
| 255 | // Dest is now live and dirty (until/if we flush it to home location) |
buzbee | 091cc40 | 2014-03-31 10:14:40 -0700 | [diff] [blame] | 256 | MarkLive(rl_dest); |
| 257 | MarkWide(rl_dest.reg); |
| 258 | MarkDirty(rl_dest); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 259 | |
| 260 | ResetDefLocWide(rl_dest); |
buzbee | 091cc40 | 2014-03-31 10:14:40 -0700 | [diff] [blame] | 261 | if (IsDirty(rl_dest.reg) && (LiveOut(rl_dest.s_reg_low) || |
| 262 | LiveOut(GetSRegHi(rl_dest.s_reg_low)))) { |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 263 | def_start = last_lir_insn_; |
| 264 | DCHECK_EQ((mir_graph_->SRegToVReg(rl_dest.s_reg_low)+1), |
| 265 | mir_graph_->SRegToVReg(GetSRegHi(rl_dest.s_reg_low))); |
Vladimir Marko | 8dea81c | 2014-06-06 14:50:36 +0100 | [diff] [blame] | 266 | ScopedMemRefType mem_ref_type(this, ResourceMask::kDalvikReg); |
Chao-ying Fu | a77ee51 | 2014-07-01 17:43:41 -0700 | [diff] [blame] | 267 | StoreBaseDisp(TargetPtrReg(kSp), SRegOffset(rl_dest.s_reg_low), rl_dest.reg, k64, kNotVolatile); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 268 | MarkClean(rl_dest); |
| 269 | def_end = last_lir_insn_; |
| 270 | MarkDefWide(rl_dest, def_start, def_end); |
| 271 | } |
| 272 | } |
| 273 | |
Mark Mendell | feb2b4e | 2014-01-28 12:59:49 -0800 | [diff] [blame] | 274 | void Mir2Lir::StoreFinalValue(RegLocation rl_dest, RegLocation rl_src) { |
| 275 | DCHECK_EQ(rl_src.location, kLocPhysReg); |
| 276 | |
| 277 | if (rl_dest.location == kLocPhysReg) { |
buzbee | 2700f7e | 2014-03-07 09:46:20 -0800 | [diff] [blame] | 278 | OpRegCopy(rl_dest.reg, rl_src.reg); |
Mark Mendell | feb2b4e | 2014-01-28 12:59:49 -0800 | [diff] [blame] | 279 | } else { |
| 280 | // Just re-assign the register. Dest gets Src's reg. |
Mark Mendell | feb2b4e | 2014-01-28 12:59:49 -0800 | [diff] [blame] | 281 | rl_dest.location = kLocPhysReg; |
Bill Buzbee | 00e1ec6 | 2014-02-27 23:44:13 +0000 | [diff] [blame] | 282 | rl_dest.reg = rl_src.reg; |
buzbee | 2700f7e | 2014-03-07 09:46:20 -0800 | [diff] [blame] | 283 | Clobber(rl_src.reg); |
Mark Mendell | feb2b4e | 2014-01-28 12:59:49 -0800 | [diff] [blame] | 284 | } |
| 285 | |
| 286 | // Dest is now live and dirty (until/if we flush it to home location) |
buzbee | 091cc40 | 2014-03-31 10:14:40 -0700 | [diff] [blame] | 287 | MarkLive(rl_dest); |
Mark Mendell | feb2b4e | 2014-01-28 12:59:49 -0800 | [diff] [blame] | 288 | MarkDirty(rl_dest); |
| 289 | |
| 290 | |
| 291 | ResetDefLoc(rl_dest); |
buzbee | 091cc40 | 2014-03-31 10:14:40 -0700 | [diff] [blame] | 292 | if (IsDirty(rl_dest.reg) && LiveOut(rl_dest.s_reg_low)) { |
Mark Mendell | feb2b4e | 2014-01-28 12:59:49 -0800 | [diff] [blame] | 293 | LIR *def_start = last_lir_insn_; |
Vladimir Marko | 8dea81c | 2014-06-06 14:50:36 +0100 | [diff] [blame] | 294 | ScopedMemRefType mem_ref_type(this, ResourceMask::kDalvikReg); |
Chao-ying Fu | a77ee51 | 2014-07-01 17:43:41 -0700 | [diff] [blame] | 295 | Store32Disp(TargetPtrReg(kSp), SRegOffset(rl_dest.s_reg_low), rl_dest.reg); |
Mark Mendell | feb2b4e | 2014-01-28 12:59:49 -0800 | [diff] [blame] | 296 | MarkClean(rl_dest); |
| 297 | LIR *def_end = last_lir_insn_; |
| 298 | if (!rl_dest.ref) { |
| 299 | // Exclude references from store elimination |
| 300 | MarkDef(rl_dest, def_start, def_end); |
| 301 | } |
| 302 | } |
| 303 | } |
| 304 | |
Mark Mendell | e02d48f | 2014-01-15 11:19:23 -0800 | [diff] [blame] | 305 | void Mir2Lir::StoreFinalValueWide(RegLocation rl_dest, RegLocation rl_src) { |
Mark Mendell | e02d48f | 2014-01-15 11:19:23 -0800 | [diff] [blame] | 306 | DCHECK(rl_dest.wide); |
| 307 | DCHECK(rl_src.wide); |
| 308 | DCHECK_EQ(rl_src.location, kLocPhysReg); |
| 309 | |
| 310 | if (rl_dest.location == kLocPhysReg) { |
buzbee | 2700f7e | 2014-03-07 09:46:20 -0800 | [diff] [blame] | 311 | OpRegCopyWide(rl_dest.reg, rl_src.reg); |
Mark Mendell | e02d48f | 2014-01-15 11:19:23 -0800 | [diff] [blame] | 312 | } else { |
| 313 | // Just re-assign the registers. Dest gets Src's regs. |
Mark Mendell | e02d48f | 2014-01-15 11:19:23 -0800 | [diff] [blame] | 314 | rl_dest.location = kLocPhysReg; |
Bill Buzbee | 00e1ec6 | 2014-02-27 23:44:13 +0000 | [diff] [blame] | 315 | rl_dest.reg = rl_src.reg; |
buzbee | 091cc40 | 2014-03-31 10:14:40 -0700 | [diff] [blame] | 316 | Clobber(rl_src.reg); |
Mark Mendell | e02d48f | 2014-01-15 11:19:23 -0800 | [diff] [blame] | 317 | } |
| 318 | |
| 319 | // Dest is now live and dirty (until/if we flush it to home location). |
buzbee | 091cc40 | 2014-03-31 10:14:40 -0700 | [diff] [blame] | 320 | MarkLive(rl_dest); |
| 321 | MarkWide(rl_dest.reg); |
| 322 | MarkDirty(rl_dest); |
Mark Mendell | e02d48f | 2014-01-15 11:19:23 -0800 | [diff] [blame] | 323 | |
| 324 | ResetDefLocWide(rl_dest); |
buzbee | 091cc40 | 2014-03-31 10:14:40 -0700 | [diff] [blame] | 325 | if (IsDirty(rl_dest.reg) && (LiveOut(rl_dest.s_reg_low) || |
| 326 | LiveOut(GetSRegHi(rl_dest.s_reg_low)))) { |
Mark Mendell | e02d48f | 2014-01-15 11:19:23 -0800 | [diff] [blame] | 327 | LIR *def_start = last_lir_insn_; |
| 328 | DCHECK_EQ((mir_graph_->SRegToVReg(rl_dest.s_reg_low)+1), |
| 329 | mir_graph_->SRegToVReg(GetSRegHi(rl_dest.s_reg_low))); |
Vladimir Marko | 8dea81c | 2014-06-06 14:50:36 +0100 | [diff] [blame] | 330 | ScopedMemRefType mem_ref_type(this, ResourceMask::kDalvikReg); |
Chao-ying Fu | a77ee51 | 2014-07-01 17:43:41 -0700 | [diff] [blame] | 331 | StoreBaseDisp(TargetPtrReg(kSp), SRegOffset(rl_dest.s_reg_low), rl_dest.reg, k64, kNotVolatile); |
Mark Mendell | e02d48f | 2014-01-15 11:19:23 -0800 | [diff] [blame] | 332 | MarkClean(rl_dest); |
| 333 | LIR *def_end = last_lir_insn_; |
| 334 | MarkDefWide(rl_dest, def_start, def_end); |
| 335 | } |
| 336 | } |
| 337 | |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 338 | /* Utilities to load the current Method* */ |
buzbee | 2700f7e | 2014-03-07 09:46:20 -0800 | [diff] [blame] | 339 | void Mir2Lir::LoadCurrMethodDirect(RegStorage r_tgt) { |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 340 | LoadValueDirectFixed(mir_graph_->GetMethodLoc(), r_tgt); |
| 341 | } |
| 342 | |
Vladimir Marko | 20f8559 | 2015-03-19 10:07:02 +0000 | [diff] [blame^] | 343 | RegStorage Mir2Lir::LoadCurrMethodWithHint(RegStorage r_hint) { |
| 344 | // If the method is promoted to a register, return that register, otherwise load it to r_hint. |
| 345 | // (Replacement for LoadCurrMethod() usually used when LockCallTemps() is in effect.) |
| 346 | DCHECK(r_hint.Valid()); |
| 347 | RegLocation rl_method = mir_graph_->GetMethodLoc(); |
| 348 | if (rl_method.location == kLocPhysReg) { |
| 349 | DCHECK(!IsTemp(rl_method.reg)); |
| 350 | return rl_method.reg; |
| 351 | } else { |
| 352 | LoadCurrMethodDirect(r_hint); |
| 353 | return r_hint; |
| 354 | } |
| 355 | } |
| 356 | |
Brian Carlstrom | 2ce745c | 2013-07-17 17:44:30 -0700 | [diff] [blame] | 357 | RegLocation Mir2Lir::LoadCurrMethod() { |
buzbee | a0cd2d7 | 2014-06-01 09:33:49 -0700 | [diff] [blame] | 358 | return LoadValue(mir_graph_->GetMethodLoc(), kRefReg); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 359 | } |
| 360 | |
Mark Mendell | e02d48f | 2014-01-15 11:19:23 -0800 | [diff] [blame] | 361 | RegLocation Mir2Lir::ForceTemp(RegLocation loc) { |
| 362 | DCHECK(!loc.wide); |
| 363 | DCHECK(loc.location == kLocPhysReg); |
buzbee | 091cc40 | 2014-03-31 10:14:40 -0700 | [diff] [blame] | 364 | DCHECK(!loc.reg.IsFloat()); |
buzbee | 2700f7e | 2014-03-07 09:46:20 -0800 | [diff] [blame] | 365 | if (IsTemp(loc.reg)) { |
| 366 | Clobber(loc.reg); |
Mark Mendell | e02d48f | 2014-01-15 11:19:23 -0800 | [diff] [blame] | 367 | } else { |
buzbee | 2700f7e | 2014-03-07 09:46:20 -0800 | [diff] [blame] | 368 | RegStorage temp_low = AllocTemp(); |
| 369 | OpRegCopy(temp_low, loc.reg); |
| 370 | loc.reg = temp_low; |
Mark Mendell | e02d48f | 2014-01-15 11:19:23 -0800 | [diff] [blame] | 371 | } |
| 372 | |
| 373 | // Ensure that this doesn't represent the original SR any more. |
| 374 | loc.s_reg_low = INVALID_SREG; |
| 375 | return loc; |
| 376 | } |
| 377 | |
| 378 | RegLocation Mir2Lir::ForceTempWide(RegLocation loc) { |
| 379 | DCHECK(loc.wide); |
| 380 | DCHECK(loc.location == kLocPhysReg); |
buzbee | 091cc40 | 2014-03-31 10:14:40 -0700 | [diff] [blame] | 381 | DCHECK(!loc.reg.IsFloat()); |
Chao-ying Fu | e0ccdc0 | 2014-06-06 17:32:37 -0700 | [diff] [blame] | 382 | |
| 383 | if (!loc.reg.IsPair()) { |
| 384 | if (IsTemp(loc.reg)) { |
| 385 | Clobber(loc.reg); |
| 386 | } else { |
| 387 | RegStorage temp = AllocTempWide(); |
| 388 | OpRegCopy(temp, loc.reg); |
| 389 | loc.reg = temp; |
| 390 | } |
Mark Mendell | e02d48f | 2014-01-15 11:19:23 -0800 | [diff] [blame] | 391 | } else { |
Chao-ying Fu | e0ccdc0 | 2014-06-06 17:32:37 -0700 | [diff] [blame] | 392 | if (IsTemp(loc.reg.GetLow())) { |
| 393 | Clobber(loc.reg.GetLow()); |
| 394 | } else { |
| 395 | RegStorage temp_low = AllocTemp(); |
| 396 | OpRegCopy(temp_low, loc.reg.GetLow()); |
| 397 | loc.reg.SetLowReg(temp_low.GetReg()); |
| 398 | } |
| 399 | if (IsTemp(loc.reg.GetHigh())) { |
| 400 | Clobber(loc.reg.GetHigh()); |
| 401 | } else { |
| 402 | RegStorage temp_high = AllocTemp(); |
| 403 | OpRegCopy(temp_high, loc.reg.GetHigh()); |
| 404 | loc.reg.SetHighReg(temp_high.GetReg()); |
| 405 | } |
Mark Mendell | e02d48f | 2014-01-15 11:19:23 -0800 | [diff] [blame] | 406 | } |
| 407 | |
| 408 | // Ensure that this doesn't represent the original SR any more. |
| 409 | loc.s_reg_low = INVALID_SREG; |
| 410 | return loc; |
| 411 | } |
| 412 | |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 413 | } // namespace art |