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gerrit-public.fairphone.software / platform / art / 38a3a0c4ef36fca004582cb6787b10b6c1f2fc8d / . / src / compiler / dataflow.cc
blob: 16065abc80fd1ddc68c603a094539bf808d95e6a [file] [log] [blame]
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1/*
2 * Copyright (C) 2011 The Android Open Source Project
3 *
4 * Licensed under the Apache License, Version 2.0 (the "License");
5 * you may not use this file except in compliance with the License.
6 * You may obtain a copy of the License at
7 *
8 * http://www.apache.org/licenses/LICENSE-2.0
9 *
10 * Unless required by applicable law or agreed to in writing, software
11 * distributed under the License is distributed on an "AS IS" BASIS,
12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
13 * See the License for the specific language governing permissions and
14 * limitations under the License.
15 */
16
buzbeeeaf09bc2012-11-15 14:51:41 -0800[diff] [blame]17#include "compiler_internals.h"
buzbeeefc63692012-11-14 16:31:52 -0800[diff] [blame]18#include "dataflow.h"
buzbee2502e002012-12-31 16:05:53 -0800[diff] [blame]19#include "bb_opt.h"
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]20
Elliott Hughes11d1b0c2012-01-23 16:57:47 -0800[diff] [blame]21namespace art {
22
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]23/*
24 * Main table containing data flow attributes for each bytecode. The
25 * first kNumPackedOpcodes entries are for Dalvik bytecode
26 * instructions, where extended opcode at the MIR level are appended
27 * afterwards.
28 *
29 * TODO - many optimization flags are incomplete - they will only limit the
30 * scope of optimizations but will not cause mis-optimizations.
31 */
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]32const int oat_data_flow_attributes[kMirOpLast] = {
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]33 // 00 NOP
34 DF_NOP,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]35
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]36 // 01 MOVE vA, vB
37 DF_DA | DF_UB | DF_IS_MOVE,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]38
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]39 // 02 MOVE_FROM16 vAA, vBBBB
40 DF_DA | DF_UB | DF_IS_MOVE,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]41
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]42 // 03 MOVE_16 vAAAA, vBBBB
43 DF_DA | DF_UB | DF_IS_MOVE,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]44
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]45 // 04 MOVE_WIDE vA, vB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]46 DF_DA | DF_A_WIDE | DF_UB | DF_B_WIDE | DF_IS_MOVE,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]47
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]48 // 05 MOVE_WIDE_FROM16 vAA, vBBBB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]49 DF_DA | DF_A_WIDE | DF_UB | DF_B_WIDE | DF_IS_MOVE,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]50
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]51 // 06 MOVE_WIDE_16 vAAAA, vBBBB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]52 DF_DA | DF_A_WIDE | DF_UB | DF_B_WIDE | DF_IS_MOVE,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]53
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]54 // 07 MOVE_OBJECT vA, vB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]55 DF_DA | DF_UB | DF_NULL_TRANSFER_0 | DF_IS_MOVE | DF_REF_A | DF_REF_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]56
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]57 // 08 MOVE_OBJECT_FROM16 vAA, vBBBB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]58 DF_DA | DF_UB | DF_NULL_TRANSFER_0 | DF_IS_MOVE | DF_REF_A | DF_REF_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]59
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]60 // 09 MOVE_OBJECT_16 vAAAA, vBBBB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]61 DF_DA | DF_UB | DF_NULL_TRANSFER_0 | DF_IS_MOVE | DF_REF_A | DF_REF_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]62
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]63 // 0A MOVE_RESULT vAA
64 DF_DA,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]65
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]66 // 0B MOVE_RESULT_WIDE vAA
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]67 DF_DA | DF_A_WIDE,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]68
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]69 // 0C MOVE_RESULT_OBJECT vAA
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]70 DF_DA | DF_REF_A,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]71
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]72 // 0D MOVE_EXCEPTION vAA
buzbee2a83e8f2012-07-13 16:42:30 -0700[diff] [blame]73 DF_DA | DF_REF_A,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]74
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]75 // 0E RETURN_VOID
76 DF_NOP,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]77
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]78 // 0F RETURN vAA
79 DF_UA,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]80
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]81 // 10 RETURN_WIDE vAA
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]82 DF_UA | DF_A_WIDE,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]83
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]84 // 11 RETURN_OBJECT vAA
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]85 DF_UA | DF_REF_A,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]86
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]87 // 12 CONST_4 vA, #+B
88 DF_DA | DF_SETS_CONST,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]89
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]90 // 13 CONST_16 vAA, #+BBBB
91 DF_DA | DF_SETS_CONST,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]92
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]93 // 14 CONST vAA, #+BBBBBBBB
94 DF_DA | DF_SETS_CONST,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]95
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]96 // 15 CONST_HIGH16 VAA, #+BBBB0000
97 DF_DA | DF_SETS_CONST,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]98
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]99 // 16 CONST_WIDE_16 vAA, #+BBBB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]100 DF_DA | DF_A_WIDE | DF_SETS_CONST,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]101
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]102 // 17 CONST_WIDE_32 vAA, #+BBBBBBBB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]103 DF_DA | DF_A_WIDE | DF_SETS_CONST,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]104
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]105 // 18 CONST_WIDE vAA, #+BBBBBBBBBBBBBBBB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]106 DF_DA | DF_A_WIDE | DF_SETS_CONST,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]107
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]108 // 19 CONST_WIDE_HIGH16 vAA, #+BBBB000000000000
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]109 DF_DA | DF_A_WIDE | DF_SETS_CONST,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]110
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]111 // 1A CONST_STRING vAA, string@BBBB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]112 DF_DA | DF_REF_A,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]113
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]114 // 1B CONST_STRING_JUMBO vAA, string@BBBBBBBB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]115 DF_DA | DF_REF_A,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]116
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]117 // 1C CONST_CLASS vAA, type@BBBB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]118 DF_DA | DF_REF_A,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]119
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]120 // 1D MONITOR_ENTER vAA
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]121 DF_UA | DF_NULL_CHK_0 | DF_REF_A,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]122
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]123 // 1E MONITOR_EXIT vAA
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]124 DF_UA | DF_NULL_CHK_0 | DF_REF_A,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]125
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]126 // 1F CHK_CAST vAA, type@BBBB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]127 DF_UA | DF_REF_A | DF_UMS,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]128
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]129 // 20 INSTANCE_OF vA, vB, type@CCCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]130 DF_DA | DF_UB | DF_CORE_A | DF_REF_B | DF_UMS,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]131
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]132 // 21 ARRAY_LENGTH vA, vB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]133 DF_DA | DF_UB | DF_NULL_CHK_0 | DF_CORE_A | DF_REF_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]134
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]135 // 22 NEW_INSTANCE vAA, type@BBBB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]136 DF_DA | DF_NON_NULL_DST | DF_REF_A | DF_UMS,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]137
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]138 // 23 NEW_ARRAY vA, vB, type@CCCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]139 DF_DA | DF_UB | DF_NON_NULL_DST | DF_REF_A | DF_CORE_B | DF_UMS,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]140
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]141 // 24 FILLED_NEW_ARRAY {vD, vE, vF, vG, vA}
142 DF_FORMAT_35C | DF_NON_NULL_RET | DF_UMS,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]143
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]144 // 25 FILLED_NEW_ARRAY_RANGE {vCCCC .. vNNNN}, type@BBBB
145 DF_FORMAT_3RC | DF_NON_NULL_RET | DF_UMS,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]146
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]147 // 26 FILL_ARRAY_DATA vAA, +BBBBBBBB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]148 DF_UA | DF_REF_A | DF_UMS,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]149
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]150 // 27 THROW vAA
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]151 DF_UA | DF_REF_A | DF_UMS,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]152
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]153 // 28 GOTO
154 DF_NOP,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]155
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]156 // 29 GOTO_16
157 DF_NOP,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]158
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]159 // 2A GOTO_32
160 DF_NOP,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]161
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]162 // 2B PACKED_SWITCH vAA, +BBBBBBBB
163 DF_UA,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]164
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]165 // 2C SPARSE_SWITCH vAA, +BBBBBBBB
166 DF_UA,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]167
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]168 // 2D CMPL_FLOAT vAA, vBB, vCC
169 DF_DA | DF_UB | DF_UC | DF_FP_B | DF_FP_C | DF_CORE_A,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]170
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]171 // 2E CMPG_FLOAT vAA, vBB, vCC
172 DF_DA | DF_UB | DF_UC | DF_FP_B | DF_FP_C | DF_CORE_A,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]173
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]174 // 2F CMPL_DOUBLE vAA, vBB, vCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]175 DF_DA | DF_UB | DF_B_WIDE | DF_UC | DF_C_WIDE | DF_FP_B | DF_FP_C | DF_CORE_A,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]176
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]177 // 30 CMPG_DOUBLE vAA, vBB, vCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]178 DF_DA | DF_UB | DF_B_WIDE | DF_UC | DF_C_WIDE | DF_FP_B | DF_FP_C | DF_CORE_A,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]179
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]180 // 31 CMP_LONG vAA, vBB, vCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]181 DF_DA | DF_UB | DF_B_WIDE | DF_UC | DF_C_WIDE | DF_CORE_A | DF_CORE_B | DF_CORE_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]182
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]183 // 32 IF_EQ vA, vB, +CCCC
buzbee2a83e8f2012-07-13 16:42:30 -0700[diff] [blame]184 DF_UA | DF_UB,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]185
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]186 // 33 IF_NE vA, vB, +CCCC
buzbee2a83e8f2012-07-13 16:42:30 -0700[diff] [blame]187 DF_UA | DF_UB,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]188
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]189 // 34 IF_LT vA, vB, +CCCC
buzbee2a83e8f2012-07-13 16:42:30 -0700[diff] [blame]190 DF_UA | DF_UB,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]191
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]192 // 35 IF_GE vA, vB, +CCCC
buzbee2a83e8f2012-07-13 16:42:30 -0700[diff] [blame]193 DF_UA | DF_UB,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]194
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]195 // 36 IF_GT vA, vB, +CCCC
buzbee2a83e8f2012-07-13 16:42:30 -0700[diff] [blame]196 DF_UA | DF_UB,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]197
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]198 // 37 IF_LE vA, vB, +CCCC
buzbee2a83e8f2012-07-13 16:42:30 -0700[diff] [blame]199 DF_UA | DF_UB,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]200
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]201 // 38 IF_EQZ vAA, +BBBB
buzbee2a83e8f2012-07-13 16:42:30 -0700[diff] [blame]202 DF_UA,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]203
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]204 // 39 IF_NEZ vAA, +BBBB
buzbee2a83e8f2012-07-13 16:42:30 -0700[diff] [blame]205 DF_UA,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]206
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]207 // 3A IF_LTZ vAA, +BBBB
buzbee2a83e8f2012-07-13 16:42:30 -0700[diff] [blame]208 DF_UA,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]209
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]210 // 3B IF_GEZ vAA, +BBBB
buzbee2a83e8f2012-07-13 16:42:30 -0700[diff] [blame]211 DF_UA,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]212
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]213 // 3C IF_GTZ vAA, +BBBB
buzbee2a83e8f2012-07-13 16:42:30 -0700[diff] [blame]214 DF_UA,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]215
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]216 // 3D IF_LEZ vAA, +BBBB
buzbee2a83e8f2012-07-13 16:42:30 -0700[diff] [blame]217 DF_UA,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]218
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]219 // 3E UNUSED_3E
220 DF_NOP,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]221
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]222 // 3F UNUSED_3F
223 DF_NOP,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]224
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]225 // 40 UNUSED_40
226 DF_NOP,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]227
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]228 // 41 UNUSED_41
229 DF_NOP,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]230
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]231 // 42 UNUSED_42
232 DF_NOP,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]233
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]234 // 43 UNUSED_43
235 DF_NOP,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]236
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]237 // 44 AGET vAA, vBB, vCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]238 DF_DA | DF_UB | DF_UC | DF_NULL_CHK_0 | DF_RANGE_CHK_1 | DF_REF_B | DF_CORE_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]239
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]240 // 45 AGET_WIDE vAA, vBB, vCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]241 DF_DA | DF_A_WIDE | DF_UB | DF_UC | DF_NULL_CHK_0 | DF_RANGE_CHK_1 | DF_REF_B | DF_CORE_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]242
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]243 // 46 AGET_OBJECT vAA, vBB, vCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]244 DF_DA | DF_UB | DF_UC | DF_NULL_CHK_0 | DF_RANGE_CHK_1 | DF_REF_A | DF_REF_B | DF_CORE_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]245
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]246 // 47 AGET_BOOLEAN vAA, vBB, vCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]247 DF_DA | DF_UB | DF_UC | DF_NULL_CHK_0 | DF_RANGE_CHK_1 | DF_REF_B | DF_CORE_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]248
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]249 // 48 AGET_BYTE vAA, vBB, vCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]250 DF_DA | DF_UB | DF_UC | DF_NULL_CHK_0 | DF_RANGE_CHK_1 | DF_REF_B | DF_CORE_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]251
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]252 // 49 AGET_CHAR vAA, vBB, vCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]253 DF_DA | DF_UB | DF_UC | DF_NULL_CHK_0 | DF_RANGE_CHK_1 | DF_REF_B | DF_CORE_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]254
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]255 // 4A AGET_SHORT vAA, vBB, vCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]256 DF_DA | DF_UB | DF_UC | DF_NULL_CHK_0 | DF_RANGE_CHK_1 | DF_REF_B | DF_CORE_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]257
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]258 // 4B APUT vAA, vBB, vCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]259 DF_UA | DF_UB | DF_UC | DF_NULL_CHK_1 | DF_RANGE_CHK_2 | DF_REF_B | DF_CORE_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]260
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]261 // 4C APUT_WIDE vAA, vBB, vCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]262 DF_UA | DF_A_WIDE | DF_UB | DF_UC | DF_NULL_CHK_2 | DF_RANGE_CHK_3 | DF_REF_B | DF_CORE_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]263
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]264 // 4D APUT_OBJECT vAA, vBB, vCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]265 DF_UA | DF_UB | DF_UC | DF_NULL_CHK_1 | DF_RANGE_CHK_2 | DF_REF_A | DF_REF_B | DF_CORE_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]266
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]267 // 4E APUT_BOOLEAN vAA, vBB, vCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]268 DF_UA | DF_UB | DF_UC | DF_NULL_CHK_1 | DF_RANGE_CHK_2 | DF_REF_B | DF_CORE_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]269
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]270 // 4F APUT_BYTE vAA, vBB, vCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]271 DF_UA | DF_UB | DF_UC | DF_NULL_CHK_1 | DF_RANGE_CHK_2 | DF_REF_B | DF_CORE_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]272
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]273 // 50 APUT_CHAR vAA, vBB, vCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]274 DF_UA | DF_UB | DF_UC | DF_NULL_CHK_1 | DF_RANGE_CHK_2 | DF_REF_B | DF_CORE_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]275
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]276 // 51 APUT_SHORT vAA, vBB, vCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]277 DF_UA | DF_UB | DF_UC | DF_NULL_CHK_1 | DF_RANGE_CHK_2 | DF_REF_B | DF_CORE_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]278
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]279 // 52 IGET vA, vB, field@CCCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]280 DF_DA | DF_UB | DF_NULL_CHK_0 | DF_REF_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]281
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]282 // 53 IGET_WIDE vA, vB, field@CCCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]283 DF_DA | DF_A_WIDE | DF_UB | DF_NULL_CHK_0 | DF_REF_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]284
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]285 // 54 IGET_OBJECT vA, vB, field@CCCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]286 DF_DA | DF_UB | DF_NULL_CHK_0 | DF_REF_A | DF_REF_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]287
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]288 // 55 IGET_BOOLEAN vA, vB, field@CCCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]289 DF_DA | DF_UB | DF_NULL_CHK_0 | DF_REF_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]290
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]291 // 56 IGET_BYTE vA, vB, field@CCCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]292 DF_DA | DF_UB | DF_NULL_CHK_0 | DF_REF_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]293
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]294 // 57 IGET_CHAR vA, vB, field@CCCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]295 DF_DA | DF_UB | DF_NULL_CHK_0 | DF_REF_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]296
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]297 // 58 IGET_SHORT vA, vB, field@CCCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]298 DF_DA | DF_UB | DF_NULL_CHK_0 | DF_REF_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]299
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]300 // 59 IPUT vA, vB, field@CCCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]301 DF_UA | DF_UB | DF_NULL_CHK_1 | DF_REF_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]302
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]303 // 5A IPUT_WIDE vA, vB, field@CCCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]304 DF_UA | DF_A_WIDE | DF_UB | DF_NULL_CHK_2 | DF_REF_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]305
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]306 // 5B IPUT_OBJECT vA, vB, field@CCCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]307 DF_UA | DF_UB | DF_NULL_CHK_1 | DF_REF_A | DF_REF_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]308
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]309 // 5C IPUT_BOOLEAN vA, vB, field@CCCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]310 DF_UA | DF_UB | DF_NULL_CHK_1 | DF_REF_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]311
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]312 // 5D IPUT_BYTE vA, vB, field@CCCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]313 DF_UA | DF_UB | DF_NULL_CHK_1 | DF_REF_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]314
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]315 // 5E IPUT_CHAR vA, vB, field@CCCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]316 DF_UA | DF_UB | DF_NULL_CHK_1 | DF_REF_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]317
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]318 // 5F IPUT_SHORT vA, vB, field@CCCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]319 DF_UA | DF_UB | DF_NULL_CHK_1 | DF_REF_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]320
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]321 // 60 SGET vAA, field@BBBB
322 DF_DA | DF_UMS,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]323
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]324 // 61 SGET_WIDE vAA, field@BBBB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]325 DF_DA | DF_A_WIDE | DF_UMS,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]326
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]327 // 62 SGET_OBJECT vAA, field@BBBB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]328 DF_DA | DF_REF_A | DF_UMS,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]329
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]330 // 63 SGET_BOOLEAN vAA, field@BBBB
331 DF_DA | DF_UMS,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]332
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]333 // 64 SGET_BYTE vAA, field@BBBB
334 DF_DA | DF_UMS,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]335
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]336 // 65 SGET_CHAR vAA, field@BBBB
337 DF_DA | DF_UMS,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]338
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]339 // 66 SGET_SHORT vAA, field@BBBB
340 DF_DA | DF_UMS,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]341
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]342 // 67 SPUT vAA, field@BBBB
343 DF_UA | DF_UMS,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]344
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]345 // 68 SPUT_WIDE vAA, field@BBBB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]346 DF_UA | DF_A_WIDE | DF_UMS,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]347
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]348 // 69 SPUT_OBJECT vAA, field@BBBB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]349 DF_UA | DF_REF_A | DF_UMS,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]350
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]351 // 6A SPUT_BOOLEAN vAA, field@BBBB
352 DF_UA | DF_UMS,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]353
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]354 // 6B SPUT_BYTE vAA, field@BBBB
355 DF_UA | DF_UMS,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]356
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]357 // 6C SPUT_CHAR vAA, field@BBBB
358 DF_UA | DF_UMS,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]359
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]360 // 6D SPUT_SHORT vAA, field@BBBB
361 DF_UA | DF_UMS,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]362
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]363 // 6E INVOKE_VIRTUAL {vD, vE, vF, vG, vA}
364 DF_FORMAT_35C | DF_NULL_CHK_OUT0 | DF_UMS,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]365
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]366 // 6F INVOKE_SUPER {vD, vE, vF, vG, vA}
367 DF_FORMAT_35C | DF_NULL_CHK_OUT0 | DF_UMS,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]368
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]369 // 70 INVOKE_DIRECT {vD, vE, vF, vG, vA}
370 DF_FORMAT_35C | DF_NULL_CHK_OUT0 | DF_UMS,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]371
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]372 // 71 INVOKE_STATIC {vD, vE, vF, vG, vA}
373 DF_FORMAT_35C | DF_UMS,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]374
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]375 // 72 INVOKE_INTERFACE {vD, vE, vF, vG, vA}
376 DF_FORMAT_35C | DF_UMS,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]377
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]378 // 73 UNUSED_73
379 DF_NOP,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]380
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]381 // 74 INVOKE_VIRTUAL_RANGE {vCCCC .. vNNNN}
382 DF_FORMAT_3RC | DF_NULL_CHK_OUT0 | DF_UMS,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]383
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]384 // 75 INVOKE_SUPER_RANGE {vCCCC .. vNNNN}
385 DF_FORMAT_3RC | DF_NULL_CHK_OUT0 | DF_UMS,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]386
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]387 // 76 INVOKE_DIRECT_RANGE {vCCCC .. vNNNN}
388 DF_FORMAT_3RC | DF_NULL_CHK_OUT0 | DF_UMS,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]389
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]390 // 77 INVOKE_STATIC_RANGE {vCCCC .. vNNNN}
391 DF_FORMAT_3RC | DF_UMS,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]392
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]393 // 78 INVOKE_INTERFACE_RANGE {vCCCC .. vNNNN}
394 DF_FORMAT_3RC | DF_UMS,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]395
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]396 // 79 UNUSED_79
397 DF_NOP,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]398
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]399 // 7A UNUSED_7A
400 DF_NOP,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]401
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]402 // 7B NEG_INT vA, vB
403 DF_DA | DF_UB | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]404
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]405 // 7C NOT_INT vA, vB
406 DF_DA | DF_UB | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]407
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]408 // 7D NEG_LONG vA, vB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]409 DF_DA | DF_A_WIDE | DF_UB | DF_B_WIDE | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]410
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]411 // 7E NOT_LONG vA, vB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]412 DF_DA | DF_A_WIDE | DF_UB | DF_B_WIDE | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]413
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]414 // 7F NEG_FLOAT vA, vB
415 DF_DA | DF_UB | DF_FP_A | DF_FP_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]416
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]417 // 80 NEG_DOUBLE vA, vB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]418 DF_DA | DF_A_WIDE | DF_UB | DF_B_WIDE | DF_FP_A | DF_FP_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]419
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]420 // 81 INT_TO_LONG vA, vB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]421 DF_DA | DF_A_WIDE | DF_UB | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]422
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]423 // 82 INT_TO_FLOAT vA, vB
424 DF_DA | DF_UB | DF_FP_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]425
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]426 // 83 INT_TO_DOUBLE vA, vB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]427 DF_DA | DF_A_WIDE | DF_UB | DF_FP_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]428
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]429 // 84 LONG_TO_INT vA, vB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]430 DF_DA | DF_UB | DF_B_WIDE | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]431
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]432 // 85 LONG_TO_FLOAT vA, vB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]433 DF_DA | DF_UB | DF_B_WIDE | DF_FP_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]434
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]435 // 86 LONG_TO_DOUBLE vA, vB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]436 DF_DA | DF_A_WIDE | DF_UB | DF_B_WIDE | DF_FP_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]437
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]438 // 87 FLOAT_TO_INT vA, vB
439 DF_DA | DF_UB | DF_FP_B | DF_CORE_A,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]440
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]441 // 88 FLOAT_TO_LONG vA, vB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]442 DF_DA | DF_A_WIDE | DF_UB | DF_FP_B | DF_CORE_A,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]443
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]444 // 89 FLOAT_TO_DOUBLE vA, vB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]445 DF_DA | DF_A_WIDE | DF_UB | DF_FP_A | DF_FP_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]446
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]447 // 8A DOUBLE_TO_INT vA, vB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]448 DF_DA | DF_UB | DF_B_WIDE | DF_FP_B | DF_CORE_A,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]449
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]450 // 8B DOUBLE_TO_LONG vA, vB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]451 DF_DA | DF_A_WIDE | DF_UB | DF_B_WIDE | DF_FP_B | DF_CORE_A,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]452
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]453 // 8C DOUBLE_TO_FLOAT vA, vB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]454 DF_DA | DF_UB | DF_B_WIDE | DF_FP_A | DF_FP_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]455
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]456 // 8D INT_TO_BYTE vA, vB
457 DF_DA | DF_UB | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]458
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]459 // 8E INT_TO_CHAR vA, vB
460 DF_DA | DF_UB | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]461
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]462 // 8F INT_TO_SHORT vA, vB
463 DF_DA | DF_UB | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]464
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]465 // 90 ADD_INT vAA, vBB, vCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]466 DF_DA | DF_UB | DF_UC | DF_CORE_A | DF_CORE_B | DF_CORE_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]467
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]468 // 91 SUB_INT vAA, vBB, vCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]469 DF_DA | DF_UB | DF_UC | DF_CORE_A | DF_CORE_B | DF_CORE_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]470
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]471 // 92 MUL_INT vAA, vBB, vCC
472 DF_DA | DF_UB | DF_UC | DF_CORE_A | DF_CORE_B | DF_CORE_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]473
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]474 // 93 DIV_INT vAA, vBB, vCC
475 DF_DA | DF_UB | DF_UC | DF_CORE_A | DF_CORE_B | DF_CORE_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]476
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]477 // 94 REM_INT vAA, vBB, vCC
478 DF_DA | DF_UB | DF_UC | DF_CORE_A | DF_CORE_B | DF_CORE_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]479
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]480 // 95 AND_INT vAA, vBB, vCC
481 DF_DA | DF_UB | DF_UC | DF_CORE_A | DF_CORE_B | DF_CORE_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]482
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]483 // 96 OR_INT vAA, vBB, vCC
484 DF_DA | DF_UB | DF_UC | DF_CORE_A | DF_CORE_B | DF_CORE_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]485
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]486 // 97 XOR_INT vAA, vBB, vCC
487 DF_DA | DF_UB | DF_UC | DF_CORE_A | DF_CORE_B | DF_CORE_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]488
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]489 // 98 SHL_INT vAA, vBB, vCC
490 DF_DA | DF_UB | DF_UC | DF_CORE_A | DF_CORE_B | DF_CORE_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]491
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]492 // 99 SHR_INT vAA, vBB, vCC
493 DF_DA | DF_UB | DF_UC | DF_CORE_A | DF_CORE_B | DF_CORE_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]494
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]495 // 9A USHR_INT vAA, vBB, vCC
496 DF_DA | DF_UB | DF_UC | DF_CORE_A | DF_CORE_B | DF_CORE_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]497
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]498 // 9B ADD_LONG vAA, vBB, vCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]499 DF_DA | DF_A_WIDE | DF_UB | DF_B_WIDE | DF_UC | DF_C_WIDE | DF_CORE_A | DF_CORE_B | DF_CORE_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]500
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]501 // 9C SUB_LONG vAA, vBB, vCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]502 DF_DA | DF_A_WIDE | DF_UB | DF_B_WIDE | DF_UC | DF_C_WIDE | DF_CORE_A | DF_CORE_B | DF_CORE_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]503
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]504 // 9D MUL_LONG vAA, vBB, vCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]505 DF_DA | DF_A_WIDE | DF_UB | DF_B_WIDE | DF_UC | DF_C_WIDE | DF_CORE_A | DF_CORE_B | DF_CORE_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]506
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]507 // 9E DIV_LONG vAA, vBB, vCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]508 DF_DA | DF_A_WIDE | DF_UB | DF_B_WIDE | DF_UC | DF_C_WIDE | DF_CORE_A | DF_CORE_B | DF_CORE_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]509
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]510 // 9F REM_LONG vAA, vBB, vCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]511 DF_DA | DF_A_WIDE | DF_UB | DF_B_WIDE | DF_UC | DF_C_WIDE | DF_CORE_A | DF_CORE_B | DF_CORE_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]512
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]513 // A0 AND_LONG vAA, vBB, vCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]514 DF_DA | DF_A_WIDE | DF_UB | DF_B_WIDE | DF_UC | DF_C_WIDE | DF_CORE_A | DF_CORE_B | DF_CORE_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]515
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]516 // A1 OR_LONG vAA, vBB, vCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]517 DF_DA | DF_A_WIDE | DF_UB | DF_B_WIDE | DF_UC | DF_C_WIDE | DF_CORE_A | DF_CORE_B | DF_CORE_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]518
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]519 // A2 XOR_LONG vAA, vBB, vCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]520 DF_DA | DF_A_WIDE | DF_UB | DF_B_WIDE | DF_UC | DF_C_WIDE | DF_CORE_A | DF_CORE_B | DF_CORE_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]521
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]522 // A3 SHL_LONG vAA, vBB, vCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]523 DF_DA | DF_A_WIDE | DF_UB | DF_B_WIDE | DF_UC | DF_CORE_A | DF_CORE_B | DF_CORE_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]524
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]525 // A4 SHR_LONG vAA, vBB, vCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]526 DF_DA | DF_A_WIDE | DF_UB | DF_B_WIDE | DF_UC | DF_CORE_A | DF_CORE_B | DF_CORE_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]527
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]528 // A5 USHR_LONG vAA, vBB, vCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]529 DF_DA | DF_A_WIDE | DF_UB | DF_B_WIDE | DF_UC | DF_CORE_A | DF_CORE_B | DF_CORE_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]530
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]531 // A6 ADD_FLOAT vAA, vBB, vCC
532 DF_DA | DF_UB | DF_UC | DF_FP_A | DF_FP_B | DF_FP_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]533
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]534 // A7 SUB_FLOAT vAA, vBB, vCC
535 DF_DA | DF_UB | DF_UC | DF_FP_A | DF_FP_B | DF_FP_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]536
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]537 // A8 MUL_FLOAT vAA, vBB, vCC
538 DF_DA | DF_UB | DF_UC | DF_FP_A | DF_FP_B | DF_FP_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]539
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]540 // A9 DIV_FLOAT vAA, vBB, vCC
541 DF_DA | DF_UB | DF_UC | DF_FP_A | DF_FP_B | DF_FP_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]542
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]543 // AA REM_FLOAT vAA, vBB, vCC
544 DF_DA | DF_UB | DF_UC | DF_FP_A | DF_FP_B | DF_FP_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]545
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]546 // AB ADD_DOUBLE vAA, vBB, vCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]547 DF_DA | DF_A_WIDE | DF_UB | DF_B_WIDE | DF_UC | DF_C_WIDE | DF_FP_A | DF_FP_B | DF_FP_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]548
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]549 // AC SUB_DOUBLE vAA, vBB, vCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]550 DF_DA | DF_A_WIDE | DF_UB | DF_B_WIDE | DF_UC | DF_C_WIDE | DF_FP_A | DF_FP_B | DF_FP_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]551
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]552 // AD MUL_DOUBLE vAA, vBB, vCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]553 DF_DA | DF_A_WIDE | DF_UB | DF_B_WIDE | DF_UC | DF_C_WIDE | DF_FP_A | DF_FP_B | DF_FP_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]554
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]555 // AE DIV_DOUBLE vAA, vBB, vCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]556 DF_DA | DF_A_WIDE | DF_UB | DF_B_WIDE | DF_UC | DF_C_WIDE | DF_FP_A | DF_FP_B | DF_FP_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]557
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]558 // AF REM_DOUBLE vAA, vBB, vCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]559 DF_DA | DF_A_WIDE | DF_UB | DF_B_WIDE | DF_UC | DF_C_WIDE | DF_FP_A | DF_FP_B | DF_FP_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]560
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]561 // B0 ADD_INT_2ADDR vA, vB
562 DF_DA | DF_UA | DF_UB | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]563
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]564 // B1 SUB_INT_2ADDR vA, vB
565 DF_DA | DF_UA | DF_UB | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]566
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]567 // B2 MUL_INT_2ADDR vA, vB
568 DF_DA | DF_UA | DF_UB | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]569
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]570 // B3 DIV_INT_2ADDR vA, vB
571 DF_DA | DF_UA | DF_UB | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]572
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]573 // B4 REM_INT_2ADDR vA, vB
574 DF_DA | DF_UA | DF_UB | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]575
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]576 // B5 AND_INT_2ADDR vA, vB
577 DF_DA | DF_UA | DF_UB | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]578
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]579 // B6 OR_INT_2ADDR vA, vB
580 DF_DA | DF_UA | DF_UB | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]581
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]582 // B7 XOR_INT_2ADDR vA, vB
583 DF_DA | DF_UA | DF_UB | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]584
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]585 // B8 SHL_INT_2ADDR vA, vB
586 DF_DA | DF_UA | DF_UB | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]587
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]588 // B9 SHR_INT_2ADDR vA, vB
589 DF_DA | DF_UA | DF_UB | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]590
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]591 // BA USHR_INT_2ADDR vA, vB
592 DF_DA | DF_UA | DF_UB | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]593
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]594 // BB ADD_LONG_2ADDR vA, vB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]595 DF_DA | DF_A_WIDE | DF_UA | DF_UB | DF_B_WIDE | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]596
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]597 // BC SUB_LONG_2ADDR vA, vB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]598 DF_DA | DF_A_WIDE | DF_UA | DF_UB | DF_B_WIDE | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]599
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]600 // BD MUL_LONG_2ADDR vA, vB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]601 DF_DA | DF_A_WIDE | DF_UA | DF_UB | DF_B_WIDE | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]602
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]603 // BE DIV_LONG_2ADDR vA, vB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]604 DF_DA | DF_A_WIDE | DF_UA | DF_UB | DF_B_WIDE | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]605
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]606 // BF REM_LONG_2ADDR vA, vB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]607 DF_DA | DF_A_WIDE | DF_UA | DF_UB | DF_B_WIDE | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]608
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]609 // C0 AND_LONG_2ADDR vA, vB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]610 DF_DA | DF_A_WIDE | DF_UA | DF_UB | DF_B_WIDE | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]611
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]612 // C1 OR_LONG_2ADDR vA, vB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]613 DF_DA | DF_A_WIDE | DF_UA | DF_UB | DF_B_WIDE | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]614
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]615 // C2 XOR_LONG_2ADDR vA, vB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]616 DF_DA | DF_A_WIDE | DF_UA | DF_UB | DF_B_WIDE | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]617
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]618 // C3 SHL_LONG_2ADDR vA, vB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]619 DF_DA | DF_A_WIDE | DF_UA | DF_UB | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]620
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]621 // C4 SHR_LONG_2ADDR vA, vB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]622 DF_DA | DF_A_WIDE | DF_UA | DF_UB | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]623
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]624 // C5 USHR_LONG_2ADDR vA, vB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]625 DF_DA | DF_A_WIDE | DF_UA | DF_UB | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]626
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]627 // C6 ADD_FLOAT_2ADDR vA, vB
628 DF_DA | DF_UA | DF_UB | DF_FP_A | DF_FP_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]629
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]630 // C7 SUB_FLOAT_2ADDR vA, vB
631 DF_DA | DF_UA | DF_UB | DF_FP_A | DF_FP_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]632
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]633 // C8 MUL_FLOAT_2ADDR vA, vB
634 DF_DA | DF_UA | DF_UB | DF_FP_A | DF_FP_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]635
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]636 // C9 DIV_FLOAT_2ADDR vA, vB
637 DF_DA | DF_UA | DF_UB | DF_FP_A | DF_FP_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]638
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]639 // CA REM_FLOAT_2ADDR vA, vB
640 DF_DA | DF_UA | DF_UB | DF_FP_A | DF_FP_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]641
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]642 // CB ADD_DOUBLE_2ADDR vA, vB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]643 DF_DA | DF_A_WIDE | DF_UA | DF_UB | DF_B_WIDE | DF_FP_A | DF_FP_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]644
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]645 // CC SUB_DOUBLE_2ADDR vA, vB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]646 DF_DA | DF_A_WIDE | DF_UA | DF_UB | DF_B_WIDE | DF_FP_A | DF_FP_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]647
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]648 // CD MUL_DOUBLE_2ADDR vA, vB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]649 DF_DA | DF_A_WIDE | DF_UA | DF_UB | DF_B_WIDE | DF_FP_A | DF_FP_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]650
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]651 // CE DIV_DOUBLE_2ADDR vA, vB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]652 DF_DA | DF_A_WIDE | DF_UA | DF_UB | DF_B_WIDE | DF_FP_A | DF_FP_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]653
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]654 // CF REM_DOUBLE_2ADDR vA, vB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]655 DF_DA | DF_A_WIDE | DF_UA | DF_UB | DF_B_WIDE | DF_FP_A | DF_FP_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]656
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]657 // D0 ADD_INT_LIT16 vA, vB, #+CCCC
658 DF_DA | DF_UB | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]659
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]660 // D1 RSUB_INT vA, vB, #+CCCC
661 DF_DA | DF_UB | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]662
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]663 // D2 MUL_INT_LIT16 vA, vB, #+CCCC
664 DF_DA | DF_UB | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]665
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]666 // D3 DIV_INT_LIT16 vA, vB, #+CCCC
667 DF_DA | DF_UB | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]668
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]669 // D4 REM_INT_LIT16 vA, vB, #+CCCC
670 DF_DA | DF_UB | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]671
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]672 // D5 AND_INT_LIT16 vA, vB, #+CCCC
673 DF_DA | DF_UB | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]674
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]675 // D6 OR_INT_LIT16 vA, vB, #+CCCC
676 DF_DA | DF_UB | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]677
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]678 // D7 XOR_INT_LIT16 vA, vB, #+CCCC
679 DF_DA | DF_UB | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]680
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]681 // D8 ADD_INT_LIT8 vAA, vBB, #+CC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]682 DF_DA | DF_UB | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]683
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]684 // D9 RSUB_INT_LIT8 vAA, vBB, #+CC
685 DF_DA | DF_UB | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]686
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]687 // DA MUL_INT_LIT8 vAA, vBB, #+CC
688 DF_DA | DF_UB | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]689
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]690 // DB DIV_INT_LIT8 vAA, vBB, #+CC
691 DF_DA | DF_UB | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]692
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]693 // DC REM_INT_LIT8 vAA, vBB, #+CC
694 DF_DA | DF_UB | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]695
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]696 // DD AND_INT_LIT8 vAA, vBB, #+CC
697 DF_DA | DF_UB | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]698
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]699 // DE OR_INT_LIT8 vAA, vBB, #+CC
700 DF_DA | DF_UB | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]701
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]702 // DF XOR_INT_LIT8 vAA, vBB, #+CC
703 DF_DA | DF_UB | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]704
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]705 // E0 SHL_INT_LIT8 vAA, vBB, #+CC
706 DF_DA | DF_UB | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]707
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]708 // E1 SHR_INT_LIT8 vAA, vBB, #+CC
709 DF_DA | DF_UB | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]710
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]711 // E2 USHR_INT_LIT8 vAA, vBB, #+CC
712 DF_DA | DF_UB | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]713
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]714 // E3 IGET_VOLATILE
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]715 DF_DA | DF_UB | DF_NULL_CHK_0 | DF_REF_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]716
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]717 // E4 IPUT_VOLATILE
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]718 DF_UA | DF_UB | DF_NULL_CHK_1 | DF_REF_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]719
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]720 // E5 SGET_VOLATILE
721 DF_DA | DF_UMS,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]722
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]723 // E6 SPUT_VOLATILE
724 DF_UA | DF_UMS,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]725
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]726 // E7 IGET_OBJECT_VOLATILE
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]727 DF_DA | DF_UB | DF_NULL_CHK_0 | DF_REF_A | DF_REF_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]728
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]729 // E8 IGET_WIDE_VOLATILE
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]730 DF_DA | DF_A_WIDE | DF_UB | DF_NULL_CHK_0 | DF_REF_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]731
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]732 // E9 IPUT_WIDE_VOLATILE
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]733 DF_UA | DF_A_WIDE | DF_UB | DF_NULL_CHK_2 | DF_REF_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]734
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]735 // EA SGET_WIDE_VOLATILE
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]736 DF_DA | DF_A_WIDE | DF_UMS,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]737
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]738 // EB SPUT_WIDE_VOLATILE
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]739 DF_UA | DF_A_WIDE | DF_UMS,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]740
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]741 // EC BREAKPOINT
742 DF_NOP,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]743
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]744 // ED THROW_VERIFICATION_ERROR
745 DF_NOP | DF_UMS,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]746
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]747 // EE EXECUTE_INLINE
748 DF_FORMAT_35C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]749
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]750 // EF EXECUTE_INLINE_RANGE
751 DF_FORMAT_3RC,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]752
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]753 // F0 INVOKE_OBJECT_INIT_RANGE
754 DF_NOP | DF_NULL_CHK_0,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]755
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]756 // F1 RETURN_VOID_BARRIER
757 DF_NOP,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]758
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]759 // F2 IGET_QUICK
760 DF_DA | DF_UB | DF_NULL_CHK_0,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]761
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]762 // F3 IGET_WIDE_QUICK
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]763 DF_DA | DF_A_WIDE | DF_UB | DF_NULL_CHK_0,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]764
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]765 // F4 IGET_OBJECT_QUICK
766 DF_DA | DF_UB | DF_NULL_CHK_0,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]767
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]768 // F5 IPUT_QUICK
769 DF_UA | DF_UB | DF_NULL_CHK_1,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]770
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]771 // F6 IPUT_WIDE_QUICK
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]772 DF_UA | DF_A_WIDE | DF_UB | DF_NULL_CHK_2,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]773
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]774 // F7 IPUT_OBJECT_QUICK
775 DF_UA | DF_UB | DF_NULL_CHK_1,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]776
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]777 // F8 INVOKE_VIRTUAL_QUICK
778 DF_FORMAT_35C | DF_NULL_CHK_OUT0 | DF_UMS,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]779
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]780 // F9 INVOKE_VIRTUAL_QUICK_RANGE
781 DF_FORMAT_3RC | DF_NULL_CHK_OUT0 | DF_UMS,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]782
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]783 // FA INVOKE_SUPER_QUICK
784 DF_FORMAT_35C | DF_NULL_CHK_OUT0 | DF_UMS,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]785
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]786 // FB INVOKE_SUPER_QUICK_RANGE
787 DF_FORMAT_3RC | DF_NULL_CHK_OUT0 | DF_UMS,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]788
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]789 // FC IPUT_OBJECT_VOLATILE
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]790 DF_UA | DF_UB | DF_NULL_CHK_1 | DF_REF_A | DF_REF_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]791
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]792 // FD SGET_OBJECT_VOLATILE
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]793 DF_DA | DF_REF_A | DF_UMS,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]794
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]795 // FE SPUT_OBJECT_VOLATILE
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]796 DF_UA | DF_REF_A | DF_UMS,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]797
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]798 // FF UNUSED_FF
799 DF_NOP,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]800
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]801 // Beginning of extended MIR opcodes
802 // 100 MIR_PHI
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]803 DF_DA | DF_NULL_TRANSFER_N,
buzbee84fd6932012-03-29 16:44:16 -0700[diff] [blame]804
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]805 // 101 MIR_COPY
806 DF_DA | DF_UB | DF_IS_MOVE,
buzbee84fd6932012-03-29 16:44:16 -0700[diff] [blame]807
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]808 // 102 MIR_FUSED_CMPL_FLOAT
809 DF_UA | DF_UB | DF_FP_A | DF_FP_B,
buzbee84fd6932012-03-29 16:44:16 -0700[diff] [blame]810
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]811 // 103 MIR_FUSED_CMPG_FLOAT
812 DF_UA | DF_UB | DF_FP_A | DF_FP_B,
buzbee84fd6932012-03-29 16:44:16 -0700[diff] [blame]813
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]814 // 104 MIR_FUSED_CMPL_DOUBLE
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]815 DF_UA | DF_A_WIDE | DF_UB | DF_B_WIDE | DF_FP_A | DF_FP_B,
buzbee84fd6932012-03-29 16:44:16 -0700[diff] [blame]816
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]817 // 105 MIR_FUSED_CMPG_DOUBLE
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]818 DF_UA | DF_A_WIDE | DF_UB | DF_B_WIDE | DF_FP_A | DF_FP_B,
buzbee84fd6932012-03-29 16:44:16 -0700[diff] [blame]819
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]820 // 106 MIR_FUSED_CMP_LONG
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]821 DF_UA | DF_A_WIDE | DF_UB | DF_B_WIDE | DF_CORE_A | DF_CORE_B,
buzbee84fd6932012-03-29 16:44:16 -0700[diff] [blame]822
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]823 // 107 MIR_NOP
824 DF_NOP,
buzbee84fd6932012-03-29 16:44:16 -0700[diff] [blame]825
Bill Buzbeec9f40dd2012-08-15 11:35:25 -0700[diff] [blame]826 // 108 MIR_NULL_CHECK
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]827 0,
buzbee84fd6932012-03-29 16:44:16 -0700[diff] [blame]828
Bill Buzbeec9f40dd2012-08-15 11:35:25 -0700[diff] [blame]829 // 109 MIR_RANGE_CHECK
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]830 0,
buzbee84fd6932012-03-29 16:44:16 -0700[diff] [blame]831
Bill Buzbeec9f40dd2012-08-15 11:35:25 -0700[diff] [blame]832 // 110 MIR_DIV_ZERO_CHECK
833 0,
834
835 // 111 MIR_CHECK
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]836 0,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]837};
838
buzbeee1965672012-03-11 18:39:19 -0700[diff] [blame]839/* Return the base virtual register for a SSA name */
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]840int SRegToVReg(const CompilationUnit* cu, int ssa_reg)
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]841{
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]842 DCHECK_LT(ssa_reg, static_cast<int>(cu->ssa_base_vregs->num_used));
843 return GET_ELEM_N(cu->ssa_base_vregs, int, ssa_reg);
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]844}
845
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]846int SRegToSubscript(const CompilationUnit* cu, int ssa_reg)
buzbeee1965672012-03-11 18:39:19 -0700[diff] [blame]847{
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]848 DCHECK(ssa_reg < static_cast<int>(cu->ssa_subscripts->num_used));
849 return GET_ELEM_N(cu->ssa_subscripts, int, ssa_reg);
buzbeee1965672012-03-11 18:39:19 -0700[diff] [blame]850}
851
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]852static int GetSSAUseCount(CompilationUnit* cu, int s_reg)
buzbee84fd6932012-03-29 16:44:16 -0700[diff] [blame]853{
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]854 DCHECK(s_reg < static_cast<int>(cu->raw_use_counts.num_used));
855 return cu->raw_use_counts.elem_list[s_reg];
buzbee84fd6932012-03-29 16:44:16 -0700[diff] [blame]856}
857
buzbeea169e1d2012-12-05 14:26:44 -0800[diff] [blame]858static std::string GetSSAName(const CompilationUnit* cu, int ssa_reg)
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]859{
buzbeea169e1d2012-12-05 14:26:44 -0800[diff] [blame]860 return StringPrintf("v%d_%d", SRegToVReg(cu, ssa_reg), SRegToSubscript(cu, ssa_reg));
861}
862
863// Similar to GetSSAName, but if ssa name represents an immediate show that as well.
864static std::string GetSSANameWithConst(const CompilationUnit* cu, int ssa_reg, bool singles_only)
865{
buzbeed8506212012-12-20 14:15:05 -0800[diff] [blame]866 if (cu->reg_location == NULL) {
buzbee2502e002012-12-31 16:05:53 -0800[diff] [blame]867 // Pre-SSA - just use the standard name
868 return GetSSAName(cu, ssa_reg);
buzbeed8506212012-12-20 14:15:05 -0800[diff] [blame]869 }
buzbeea169e1d2012-12-05 14:26:44 -0800[diff] [blame]870 if (cu->reg_location[ssa_reg].is_const) {
871 if (!singles_only && cu->reg_location[ssa_reg].wide) {
872 int64_t immval = cu->constant_values[ssa_reg + 1];
873 immval = (immval << 32) | cu->constant_values[ssa_reg];
874 return StringPrintf("v%d_%d#0x%llx", SRegToVReg(cu, ssa_reg),
875 SRegToSubscript(cu, ssa_reg), immval);
876 } else {
877 int32_t immval = cu->constant_values[ssa_reg];
878 return StringPrintf("v%d_%d#0x%x", SRegToVReg(cu, ssa_reg),
879 SRegToSubscript(cu, ssa_reg), immval);
880 }
881 } else {
882 return StringPrintf("v%d_%d", SRegToVReg(cu, ssa_reg), SRegToSubscript(cu, ssa_reg));
883 }
884}
885
886
887char* GetDalvikDisassembly(CompilationUnit* cu, const MIR* mir)
888{
889 DecodedInstruction insn = mir->dalvikInsn;
Bill Buzbeec9f40dd2012-08-15 11:35:25 -0700[diff] [blame]890 std::string str;
buzbeea169e1d2012-12-05 14:26:44 -0800[diff] [blame]891 int flags = 0;
Bill Buzbeec9f40dd2012-08-15 11:35:25 -0700[diff] [blame]892 int opcode = insn.opcode;
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]893 char* ret;
buzbeea169e1d2012-12-05 14:26:44 -0800[diff] [blame]894 bool nop = false;
895 SSARepresentation* ssa_rep = mir->ssa_rep;
896 Instruction::Format dalvik_format = Instruction::k10x; // Default to no-operand format
897 int defs = (ssa_rep != NULL) ? ssa_rep->num_defs : 0;
898 int uses = (ssa_rep != NULL) ? ssa_rep->num_uses : 0;
899
900 // Handle special cases.
901 if ((opcode == kMirOpCheck) || (opcode == kMirOpCheckPart2)) {
902 str.append(extended_mir_op_names[opcode - kMirOpFirst]);
903 str.append(": ");
904 // Recover the original Dex instruction
905 insn = mir->meta.throw_insn->dalvikInsn;
906 ssa_rep = mir->meta.throw_insn->ssa_rep;
907 defs = ssa_rep->num_defs;
908 uses = ssa_rep->num_uses;
909 opcode = insn.opcode;
910 } else if (opcode == kMirOpNop) {
911 str.append("[");
912 insn.opcode = mir->meta.original_opcode;
913 opcode = mir->meta.original_opcode;
914 nop = true;
915 }
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]916
Bill Buzbeec9f40dd2012-08-15 11:35:25 -0700[diff] [blame]917 if (opcode >= kMirOpFirst) {
buzbeea169e1d2012-12-05 14:26:44 -0800[diff] [blame]918 str.append(extended_mir_op_names[opcode - kMirOpFirst]);
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]919 } else {
buzbeea169e1d2012-12-05 14:26:44 -0800[diff] [blame]920 dalvik_format = Instruction::FormatOf(insn.opcode);
Ian Rogersa75a0132012-09-28 11:41:42 -0700[diff] [blame]921 flags = Instruction::FlagsOf(insn.opcode);
buzbeea169e1d2012-12-05 14:26:44 -0800[diff] [blame]922 str.append(Instruction::Name(insn.opcode));
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]923 }
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]924
buzbeea169e1d2012-12-05 14:26:44 -0800[diff] [blame]925 if (opcode == kMirOpPhi) {
926 int* incoming = reinterpret_cast<int*>(insn.vB);
927 str.append(StringPrintf(" %s = (%s",
928 GetSSANameWithConst(cu, ssa_rep->defs[0], true).c_str(),
929 GetSSANameWithConst(cu, ssa_rep->uses[0], true).c_str()));
930 str.append(StringPrintf(":%d",incoming[0]));
931 int i;
932 for (i = 1; i < uses; i++) {
933 str.append(StringPrintf(", %s:%d",
934 GetSSANameWithConst(cu, ssa_rep->uses[i], true).c_str(),
935 incoming[i]));
936 }
937 str.append(")");
938 } else if (flags & Instruction::kBranch) {
939 // For branches, decode the instructions to print out the branch targets.
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]940 int offset = 0;
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]941 switch (dalvik_format) {
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]942 case Instruction::k21t:
buzbeea169e1d2012-12-05 14:26:44 -0800[diff] [blame]943 str.append(StringPrintf(" %s,", GetSSANameWithConst(cu, ssa_rep->uses[0], false).c_str()));
buzbeecbd6d442012-11-17 14:11:25 -0800[diff] [blame]944 offset = insn.vB;
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]945 break;
946 case Instruction::k22t:
buzbeea169e1d2012-12-05 14:26:44 -0800[diff] [blame]947 str.append(StringPrintf(" %s, %s,", GetSSANameWithConst(cu, ssa_rep->uses[0], false).c_str(),
buzbeed8506212012-12-20 14:15:05 -0800[diff] [blame]948 GetSSANameWithConst(cu, ssa_rep->uses[1], false).c_str()));
buzbeecbd6d442012-11-17 14:11:25 -0800[diff] [blame]949 offset = insn.vC;
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]950 break;
951 case Instruction::k10t:
952 case Instruction::k20t:
953 case Instruction::k30t:
buzbeecbd6d442012-11-17 14:11:25 -0800[diff] [blame]954 offset = insn.vA;
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]955 break;
956 default:
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]957 LOG(FATAL) << "Unexpected branch format " << dalvik_format << " from " << insn.opcode;
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]958 }
buzbeea169e1d2012-12-05 14:26:44 -0800[diff] [blame]959 str.append(StringPrintf(" 0x%x (%c%x)", mir->offset + offset,
960 offset > 0 ? '+' : '-', offset > 0 ? offset : -offset));
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]961 } else {
buzbeea169e1d2012-12-05 14:26:44 -0800[diff] [blame]962 // For invokes-style formats, treat wide regs as a pair of singles
963 bool show_singles = ((dalvik_format == Instruction::k35c) ||
964 (dalvik_format == Instruction::k3rc));
965 if (defs != 0) {
966 str.append(StringPrintf(" %s", GetSSANameWithConst(cu, ssa_rep->defs[0], false).c_str()));
967 if (uses != 0) {
968 str.append(", ");
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]969 }
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]970 }
buzbeea169e1d2012-12-05 14:26:44 -0800[diff] [blame]971 for (int i = 0; i < uses; i++) {
972 str.append(
973 StringPrintf(" %s", GetSSANameWithConst(cu, ssa_rep->uses[i], show_singles).c_str()));
buzbeed8506212012-12-20 14:15:05 -0800[diff] [blame]974 if (!show_singles && (cu->reg_location != NULL) && cu->reg_location[i].wide) {
buzbeea169e1d2012-12-05 14:26:44 -0800[diff] [blame]975 // For the listing, skip the high sreg.
976 i++;
977 }
978 if (i != (uses -1)) {
979 str.append(",");
980 }
981 }
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]982 switch (dalvik_format) {
buzbeea169e1d2012-12-05 14:26:44 -0800[diff] [blame]983 case Instruction::k11n: // Add one immediate from vB
984 case Instruction::k21s:
985 case Instruction::k31i:
986 case Instruction::k21h:
987 str.append(StringPrintf(", #%d", insn.vB));
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]988 break;
buzbeea169e1d2012-12-05 14:26:44 -0800[diff] [blame]989 case Instruction::k51l: // Add one wide immediate
990 str.append(StringPrintf(", #%lld", insn.vB_wide));
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]991 break;
buzbeea169e1d2012-12-05 14:26:44 -0800[diff] [blame]992 case Instruction::k21c: // One register, one string/type/method index
993 case Instruction::k31c:
994 str.append(StringPrintf(", index #%d", insn.vB));
995 break;
996 case Instruction::k22c: // Two registers, one string/type/method index
997 str.append(StringPrintf(", index #%d", insn.vC));
998 break;
999 case Instruction::k22s: // Add one immediate from vC
1000 case Instruction::k22b:
1001 str.append(StringPrintf(", #%d", insn.vC));
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1002 break;
1003 default:
buzbeea169e1d2012-12-05 14:26:44 -0800[diff] [blame]1004 ; // Nothing left to print
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1005 }
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1006 }
buzbeea169e1d2012-12-05 14:26:44 -0800[diff] [blame]1007 if (nop) {
1008 str.append("]--optimized away");
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1009 }
Bill Buzbeec9f40dd2012-08-15 11:35:25 -0700[diff] [blame]1010 int length = str.length() + 1;
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1011 ret = static_cast<char*>(NewMem(cu, length, false, kAllocDFInfo));
Bill Buzbeec9f40dd2012-08-15 11:35:25 -0700[diff] [blame]1012 strncpy(ret, str.c_str(), length);
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1013 return ret;
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1014}
1015
1016/* Any register that is used before being defined is considered live-in */
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1017static void HandleLiveInUse(CompilationUnit* cu, ArenaBitVector* use_v, ArenaBitVector* def_v,
1018 ArenaBitVector* live_in_v, int dalvik_reg_id)
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1019{
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1020 SetBit(cu, use_v, dalvik_reg_id);
1021 if (!IsBitSet(def_v, dalvik_reg_id)) {
1022 SetBit(cu, live_in_v, dalvik_reg_id);
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1023 }
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1024}
1025
1026/* Mark a reg as being defined */
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1027static void HandleDef(CompilationUnit* cu, ArenaBitVector* def_v, int dalvik_reg_id)
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1028{
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1029 SetBit(cu, def_v, dalvik_reg_id);
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1030}
1031
1032/*
1033 * Find out live-in variables for natural loops. Variables that are live-in in
1034 * the main loop body are considered to be defined in the entry block.
1035 */
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1036bool FindLocalLiveIn(CompilationUnit* cu, BasicBlock* bb)
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1037{
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1038 MIR* mir;
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1039 ArenaBitVector *use_v, *def_v, *live_in_v;
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1040
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1041 if (bb->data_flow_info == NULL) return false;
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1042
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1043 use_v = bb->data_flow_info->use_v =
1044 AllocBitVector(cu, cu->num_dalvik_registers, false, kBitMapUse);
1045 def_v = bb->data_flow_info->def_v =
1046 AllocBitVector(cu, cu->num_dalvik_registers, false, kBitMapDef);
1047 live_in_v = bb->data_flow_info->live_in_v =
1048 AllocBitVector(cu, cu->num_dalvik_registers, false,
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1049 kBitMapLiveIn);
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1050
buzbee28c9a832012-11-21 15:39:13 -0800[diff] [blame]1051 for (mir = bb->first_mir_insn; mir != NULL; mir = mir->next) {
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1052 int df_attributes = oat_data_flow_attributes[mir->dalvikInsn.opcode];
1053 DecodedInstruction *d_insn = &mir->dalvikInsn;
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1054
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1055 if (df_attributes & DF_HAS_USES) {
1056 if (df_attributes & DF_UA) {
1057 HandleLiveInUse(cu, use_v, def_v, live_in_v, d_insn->vA);
1058 if (df_attributes & DF_A_WIDE) {
1059 HandleLiveInUse(cu, use_v, def_v, live_in_v, d_insn->vA+1);
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]1060 }
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1061 }
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1062 if (df_attributes & DF_UB) {
1063 HandleLiveInUse(cu, use_v, def_v, live_in_v, d_insn->vB);
1064 if (df_attributes & DF_B_WIDE) {
1065 HandleLiveInUse(cu, use_v, def_v, live_in_v, d_insn->vB+1);
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]1066 }
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1067 }
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1068 if (df_attributes & DF_UC) {
1069 HandleLiveInUse(cu, use_v, def_v, live_in_v, d_insn->vC);
1070 if (df_attributes & DF_C_WIDE) {
1071 HandleLiveInUse(cu, use_v, def_v, live_in_v, d_insn->vC+1);
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]1072 }
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1073 }
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1074 }
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1075 if (df_attributes & DF_FORMAT_35C) {
1076 for (unsigned int i = 0; i < d_insn->vA; i++) {
1077 HandleLiveInUse(cu, use_v, def_v, live_in_v, d_insn->arg[i]);
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1078 }
1079 }
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1080 if (df_attributes & DF_FORMAT_3RC) {
1081 for (unsigned int i = 0; i < d_insn->vA; i++) {
1082 HandleLiveInUse(cu, use_v, def_v, live_in_v, d_insn->vC+i);
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1083 }
1084 }
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1085 if (df_attributes & DF_HAS_DEFS) {
1086 HandleDef(cu, def_v, d_insn->vA);
1087 if (df_attributes & DF_A_WIDE) {
1088 HandleDef(cu, def_v, d_insn->vA+1);
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1089 }
1090 }
1091 }
1092 return true;
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1093}
1094
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1095static int AddNewSReg(CompilationUnit* cu, int v_reg)
buzbeee1965672012-03-11 18:39:19 -0700[diff] [blame]1096{
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1097 // Compiler temps always have a subscript of 0
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1098 int subscript = (v_reg < 0) ? 0 : ++cu->ssa_last_defs[v_reg];
1099 int ssa_reg = cu->num_ssa_regs++;
1100 InsertGrowableList(cu, cu->ssa_base_vregs, v_reg);
1101 InsertGrowableList(cu, cu->ssa_subscripts, subscript);
1102 std::string ssa_name = GetSSAName(cu, ssa_reg);
1103 char* name = static_cast<char*>(NewMem(cu, ssa_name.length() + 1, false, kAllocDFInfo));
1104 strncpy(name, ssa_name.c_str(), ssa_name.length() + 1);
1105 InsertGrowableList(cu, cu->ssa_strings, reinterpret_cast<uintptr_t>(name));
1106 DCHECK_EQ(cu->ssa_base_vregs->num_used, cu->ssa_subscripts->num_used);
1107 return ssa_reg;
buzbeee1965672012-03-11 18:39:19 -0700[diff] [blame]1108}
1109
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1110/* Find out the latest SSA register for a given Dalvik register */
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1111static void HandleSSAUse(CompilationUnit* cu, int* uses, int dalvik_reg, int reg_index)
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1112{
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1113 DCHECK((dalvik_reg >= 0) && (dalvik_reg < cu->num_dalvik_registers));
1114 uses[reg_index] = cu->vreg_to_ssa_map[dalvik_reg];
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1115}
1116
1117/* Setup a new SSA register for a given Dalvik register */
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1118static void HandleSSADef(CompilationUnit* cu, int* defs, int dalvik_reg, int reg_index)
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1119{
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1120 DCHECK((dalvik_reg >= 0) && (dalvik_reg < cu->num_dalvik_registers));
1121 int ssa_reg = AddNewSReg(cu, dalvik_reg);
1122 cu->vreg_to_ssa_map[dalvik_reg] = ssa_reg;
1123 defs[reg_index] = ssa_reg;
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1124}
1125
buzbeeec5adf32011-09-11 15:25:43 -0700[diff] [blame]1126/* Look up new SSA names for format_35c instructions */
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1127static void DataFlowSSAFormat35C(CompilationUnit* cu, MIR* mir)
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1128{
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1129 DecodedInstruction *d_insn = &mir->dalvikInsn;
1130 int num_uses = d_insn->vA;
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1131 int i;
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1132
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1133 mir->ssa_rep->num_uses = num_uses;
1134 mir->ssa_rep->uses = static_cast<int*>(NewMem(cu, sizeof(int) * num_uses, true, kAllocDFInfo));
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1135 // NOTE: will be filled in during type & size inference pass
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1136 mir->ssa_rep->fp_use = static_cast<bool*>(NewMem(cu, sizeof(bool) * num_uses, true,
buzbeecbd6d442012-11-17 14:11:25 -0800[diff] [blame]1137 kAllocDFInfo));
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1138
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1139 for (i = 0; i < num_uses; i++) {
1140 HandleSSAUse(cu, mir->ssa_rep->uses, d_insn->arg[i], i);
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1141 }
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1142}
1143
buzbeeec5adf32011-09-11 15:25:43 -0700[diff] [blame]1144/* Look up new SSA names for format_3rc instructions */
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1145static void DataFlowSSAFormat3RC(CompilationUnit* cu, MIR* mir)
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1146{
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1147 DecodedInstruction *d_insn = &mir->dalvikInsn;
1148 int num_uses = d_insn->vA;
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1149 int i;
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1150
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1151 mir->ssa_rep->num_uses = num_uses;
1152 mir->ssa_rep->uses = static_cast<int*>(NewMem(cu, sizeof(int) * num_uses, true, kAllocDFInfo));
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1153 // NOTE: will be filled in during type & size inference pass
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1154 mir->ssa_rep->fp_use = static_cast<bool*>(NewMem(cu, sizeof(bool) * num_uses, true,
buzbeecbd6d442012-11-17 14:11:25 -0800[diff] [blame]1155 kAllocDFInfo));
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1156
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1157 for (i = 0; i < num_uses; i++) {
1158 HandleSSAUse(cu, mir->ssa_rep->uses, d_insn->vC+i, i);
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1159 }
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1160}
1161
1162/* Entry function to convert a block into SSA representation */
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1163bool DoSSAConversion(CompilationUnit* cu, BasicBlock* bb)
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1164{
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1165 MIR* mir;
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1166
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1167 if (bb->data_flow_info == NULL) return false;
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1168
buzbee28c9a832012-11-21 15:39:13 -0800[diff] [blame]1169 for (mir = bb->first_mir_insn; mir != NULL; mir = mir->next) {
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1170 mir->ssa_rep = static_cast<struct SSARepresentation *>(NewMem(cu, sizeof(SSARepresentation),
buzbeecbd6d442012-11-17 14:11:25 -0800[diff] [blame]1171 true, kAllocDFInfo));
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1172
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1173 int df_attributes = oat_data_flow_attributes[mir->dalvikInsn.opcode];
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1174
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1175 // If not a pseudo-op, note non-leaf or can throw
1176 if (static_cast<int>(mir->dalvikInsn.opcode) <
1177 static_cast<int>(kNumPackedOpcodes)) {
Ian Rogersa75a0132012-09-28 11:41:42 -0700[diff] [blame]1178 int flags = Instruction::FlagsOf(mir->dalvikInsn.opcode);
buzbeecefd1872011-09-09 09:59:52 -0700[diff] [blame]1179
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1180 if (flags & Instruction::kThrow) {
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1181 cu->attrs &= ~METHOD_IS_THROW_FREE;
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1182 }
buzbeecefd1872011-09-09 09:59:52 -0700[diff] [blame]1183
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1184 if (flags & Instruction::kInvoke) {
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1185 cu->attrs &= ~METHOD_IS_LEAF;
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1186 }
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1187 }
1188
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1189 int num_uses = 0;
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1190
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1191 if (df_attributes & DF_FORMAT_35C) {
1192 DataFlowSSAFormat35C(cu, mir);
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1193 continue;
buzbee5abfa3e2012-01-31 17:01:43 -0800[diff] [blame]1194 }
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1195
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1196 if (df_attributes & DF_FORMAT_3RC) {
1197 DataFlowSSAFormat3RC(cu, mir);
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1198 continue;
1199 }
1200
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1201 if (df_attributes & DF_HAS_USES) {
1202 if (df_attributes & DF_UA) {
1203 num_uses++;
1204 if (df_attributes & DF_A_WIDE) {
1205 num_uses ++;
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]1206 }
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1207 }
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1208 if (df_attributes & DF_UB) {
1209 num_uses++;
1210 if (df_attributes & DF_B_WIDE) {
1211 num_uses ++;
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]1212 }
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1213 }
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1214 if (df_attributes & DF_UC) {
1215 num_uses++;
1216 if (df_attributes & DF_C_WIDE) {
1217 num_uses ++;
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]1218 }
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1219 }
1220 }
1221
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1222 if (num_uses) {
1223 mir->ssa_rep->num_uses = num_uses;
1224 mir->ssa_rep->uses = static_cast<int*>(NewMem(cu, sizeof(int) * num_uses, false,
buzbeecbd6d442012-11-17 14:11:25 -0800[diff] [blame]1225 kAllocDFInfo));
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1226 mir->ssa_rep->fp_use = static_cast<bool*>(NewMem(cu, sizeof(bool) * num_uses, false,
buzbeecbd6d442012-11-17 14:11:25 -0800[diff] [blame]1227 kAllocDFInfo));
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1228 }
1229
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1230 int num_defs = 0;
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1231
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1232 if (df_attributes & DF_HAS_DEFS) {
1233 num_defs++;
1234 if (df_attributes & DF_A_WIDE) {
1235 num_defs++;
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1236 }
1237 }
1238
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1239 if (num_defs) {
1240 mir->ssa_rep->num_defs = num_defs;
1241 mir->ssa_rep->defs = static_cast<int*>(NewMem(cu, sizeof(int) * num_defs, false,
buzbeecbd6d442012-11-17 14:11:25 -0800[diff] [blame]1242 kAllocDFInfo));
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1243 mir->ssa_rep->fp_def = static_cast<bool*>(NewMem(cu, sizeof(bool) * num_defs, false,
buzbeecbd6d442012-11-17 14:11:25 -0800[diff] [blame]1244 kAllocDFInfo));
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1245 }
1246
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1247 DecodedInstruction *d_insn = &mir->dalvikInsn;
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1248
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1249 if (df_attributes & DF_HAS_USES) {
1250 num_uses = 0;
1251 if (df_attributes & DF_UA) {
1252 mir->ssa_rep->fp_use[num_uses] = df_attributes & DF_FP_A;
1253 HandleSSAUse(cu, mir->ssa_rep->uses, d_insn->vA, num_uses++);
1254 if (df_attributes & DF_A_WIDE) {
1255 mir->ssa_rep->fp_use[num_uses] = df_attributes & DF_FP_A;
1256 HandleSSAUse(cu, mir->ssa_rep->uses, d_insn->vA+1, num_uses++);
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]1257 }
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1258 }
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1259 if (df_attributes & DF_UB) {
1260 mir->ssa_rep->fp_use[num_uses] = df_attributes & DF_FP_B;
1261 HandleSSAUse(cu, mir->ssa_rep->uses, d_insn->vB, num_uses++);
1262 if (df_attributes & DF_B_WIDE) {
1263 mir->ssa_rep->fp_use[num_uses] = df_attributes & DF_FP_B;
1264 HandleSSAUse(cu, mir->ssa_rep->uses, d_insn->vB+1, num_uses++);
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]1265 }
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1266 }
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1267 if (df_attributes & DF_UC) {
1268 mir->ssa_rep->fp_use[num_uses] = df_attributes & DF_FP_C;
1269 HandleSSAUse(cu, mir->ssa_rep->uses, d_insn->vC, num_uses++);
1270 if (df_attributes & DF_C_WIDE) {
1271 mir->ssa_rep->fp_use[num_uses] = df_attributes & DF_FP_C;
1272 HandleSSAUse(cu, mir->ssa_rep->uses, d_insn->vC+1, num_uses++);
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]1273 }
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1274 }
1275 }
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1276 if (df_attributes & DF_HAS_DEFS) {
1277 mir->ssa_rep->fp_def[0] = df_attributes & DF_FP_A;
1278 HandleSSADef(cu, mir->ssa_rep->defs, d_insn->vA, 0);
1279 if (df_attributes & DF_A_WIDE) {
1280 mir->ssa_rep->fp_def[1] = df_attributes & DF_FP_A;
1281 HandleSSADef(cu, mir->ssa_rep->defs, d_insn->vA+1, 1);
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1282 }
1283 }
1284 }
1285
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1286 if (!cu->disable_dataflow) {
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1287 /*
1288 * Take a snapshot of Dalvik->SSA mapping at the end of each block. The
1289 * input to PHI nodes can be derived from the snapshot of all
1290 * predecessor blocks.
1291 */
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1292 bb->data_flow_info->vreg_to_ssa_map =
1293 static_cast<int*>(NewMem(cu, sizeof(int) * cu->num_dalvik_registers, false,
buzbeecbd6d442012-11-17 14:11:25 -0800[diff] [blame]1294 kAllocDFInfo));
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1295
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1296 memcpy(bb->data_flow_info->vreg_to_ssa_map, cu->vreg_to_ssa_map,
1297 sizeof(int) * cu->num_dalvik_registers);
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1298 }
1299 return true;
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1300}
1301
1302/* Setup a constant value for opcodes thare have the DF_SETS_CONST attribute */
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1303static void SetConstant(CompilationUnit* cu, int ssa_reg, int value)
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1304{
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1305 SetBit(cu, cu->is_constant_v, ssa_reg);
1306 cu->constant_values[ssa_reg] = value;
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1307}
1308
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1309bool DoConstantPropogation(CompilationUnit* cu, BasicBlock* bb)
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1310{
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1311 MIR* mir;
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1312 ArenaBitVector *is_constant_v = cu->is_constant_v;
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1313
buzbee28c9a832012-11-21 15:39:13 -0800[diff] [blame]1314 for (mir = bb->first_mir_insn; mir != NULL; mir = mir->next) {
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1315 int df_attributes = oat_data_flow_attributes[mir->dalvikInsn.opcode];
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1316
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1317 DecodedInstruction *d_insn = &mir->dalvikInsn;
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1318
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1319 if (!(df_attributes & DF_HAS_DEFS)) continue;
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1320
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1321 /* Handle instructions that set up constants directly */
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1322 if (df_attributes & DF_SETS_CONST) {
1323 if (df_attributes & DF_DA) {
1324 switch (d_insn->opcode) {
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1325 case Instruction::CONST_4:
1326 case Instruction::CONST_16:
1327 case Instruction::CONST:
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1328 SetConstant(cu, mir->ssa_rep->defs[0], d_insn->vB);
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1329 break;
1330 case Instruction::CONST_HIGH16:
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1331 SetConstant(cu, mir->ssa_rep->defs[0], d_insn->vB << 16);
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1332 break;
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]1333 case Instruction::CONST_WIDE_16:
1334 case Instruction::CONST_WIDE_32:
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1335 SetConstant(cu, mir->ssa_rep->defs[0], d_insn->vB);
1336 SetConstant(cu, mir->ssa_rep->defs[1], 0);
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]1337 break;
1338 case Instruction::CONST_WIDE:
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1339 SetConstant(cu, mir->ssa_rep->defs[0], static_cast<int>(d_insn->vB_wide));
1340 SetConstant(cu, mir->ssa_rep->defs[1], static_cast<int>(d_insn->vB_wide >> 32));
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]1341 break;
1342 case Instruction::CONST_WIDE_HIGH16:
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1343 SetConstant(cu, mir->ssa_rep->defs[0], 0);
1344 SetConstant(cu, mir->ssa_rep->defs[1], d_insn->vB << 16);
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]1345 break;
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1346 default:
1347 break;
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]1348 }
buzbee2cfc6392012-05-07 14:51:40 -0700[diff] [blame]1349 }
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1350 /* Handle instructions that set up constants directly */
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1351 } else if (df_attributes & DF_IS_MOVE) {
buzbee2cfc6392012-05-07 14:51:40 -0700[diff] [blame]1352 int i;
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1353
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1354 for (i = 0; i < mir->ssa_rep->num_uses; i++) {
1355 if (!IsBitSet(is_constant_v, mir->ssa_rep->uses[i])) break;
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1356 }
1357 /* Move a register holding a constant to another register */
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1358 if (i == mir->ssa_rep->num_uses) {
1359 SetConstant(cu, mir->ssa_rep->defs[0],
1360 cu->constant_values[mir->ssa_rep->uses[0]]);
1361 if (df_attributes & DF_A_WIDE) {
1362 SetConstant(cu, mir->ssa_rep->defs[1],
1363 cu->constant_values[mir->ssa_rep->uses[1]]);
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1364 }
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1365 }
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1366 }
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1367 }
1368 /* TODO: implement code to handle arithmetic operations */
1369 return true;
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1370}
1371
1372/* Setup the basic data structures for SSA conversion */
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1373void CompilerInitializeSSAConversion(CompilationUnit* cu)
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1374{
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1375 int i;
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1376 int num_dalvik_reg = cu->num_dalvik_registers;
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1377
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1378 cu->ssa_base_vregs =
1379 static_cast<GrowableList*>(NewMem(cu, sizeof(GrowableList), false, kAllocDFInfo));
1380 cu->ssa_subscripts =
1381 static_cast<GrowableList*>(NewMem(cu, sizeof(GrowableList), false, kAllocDFInfo));
1382 cu->ssa_strings =
1383 static_cast<GrowableList*>(NewMem(cu, sizeof(GrowableList), false, kAllocDFInfo));
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1384 // Create the ssa mappings, estimating the max size
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1385 CompilerInitGrowableList(cu, cu->ssa_base_vregs,
1386 num_dalvik_reg + cu->def_count + 128,
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1387 kListSSAtoDalvikMap);
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1388 CompilerInitGrowableList(cu, cu->ssa_subscripts,
1389 num_dalvik_reg + cu->def_count + 128,
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1390 kListSSAtoDalvikMap);
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1391 CompilerInitGrowableList(cu, cu->ssa_strings,
1392 num_dalvik_reg + cu->def_count + 128,
buzbee2cfc6392012-05-07 14:51:40 -0700[diff] [blame]1393 kListSSAtoDalvikMap);
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1394 /*
1395 * Initial number of SSA registers is equal to the number of Dalvik
1396 * registers.
1397 */
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1398 cu->num_ssa_regs = num_dalvik_reg;
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1399
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1400 /*
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1401 * Initialize the SSA2Dalvik map list. For the first num_dalvik_reg elements,
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1402 * the subscript is 0 so we use the ENCODE_REG_SUB macro to encode the value
1403 * into "(0 << 16) | i"
1404 */
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1405 for (i = 0; i < num_dalvik_reg; i++) {
1406 InsertGrowableList(cu, cu->ssa_base_vregs, i);
1407 InsertGrowableList(cu, cu->ssa_subscripts, 0);
1408 std::string ssa_name = GetSSAName(cu, i);
1409 char* name = static_cast<char*>(NewMem(cu, ssa_name.length() + 1, true, kAllocDFInfo));
1410 strncpy(name, ssa_name.c_str(), ssa_name.length() + 1);
1411 InsertGrowableList(cu, cu->ssa_strings, reinterpret_cast<uintptr_t>(name));
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1412 }
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1413
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1414 /*
1415 * Initialize the DalvikToSSAMap map. There is one entry for each
1416 * Dalvik register, and the SSA names for those are the same.
1417 */
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1418 cu->vreg_to_ssa_map =
1419 static_cast<int*>(NewMem(cu, sizeof(int) * num_dalvik_reg, false, kAllocDFInfo));
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1420 /* Keep track of the higest def for each dalvik reg */
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1421 cu->ssa_last_defs =
1422 static_cast<int*>(NewMem(cu, sizeof(int) * num_dalvik_reg, false, kAllocDFInfo));
buzbeef0cde542011-09-13 14:55:02 -0700[diff] [blame]1423
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1424 for (i = 0; i < num_dalvik_reg; i++) {
1425 cu->vreg_to_ssa_map[i] = i;
1426 cu->ssa_last_defs[i] = 0;
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1427 }
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1428
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1429 /* Add ssa reg for Method* */
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1430 cu->method_sreg = AddNewSReg(cu, SSA_METHOD_BASEREG);
buzbeee1965672012-03-11 18:39:19 -0700[diff] [blame]1431
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1432 /*
1433 * Allocate the BasicBlockDataFlow structure for the entry and code blocks
1434 */
1435 GrowableListIterator iterator;
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1436
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1437 GrowableListIteratorInit(&cu->block_list, &iterator);
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1438
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1439 while (true) {
buzbee52a77fc2012-11-20 19:50:46 -0800[diff] [blame]1440 BasicBlock* bb = reinterpret_cast<BasicBlock*>(GrowableListIteratorNext(&iterator));
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1441 if (bb == NULL) break;
1442 if (bb->hidden == true) continue;
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1443 if (bb->block_type == kDalvikByteCode ||
1444 bb->block_type == kEntryBlock ||
1445 bb->block_type == kExitBlock) {
1446 bb->data_flow_info = static_cast<BasicBlockDataFlow*>(NewMem(cu, sizeof(BasicBlockDataFlow),
buzbeecbd6d442012-11-17 14:11:25 -0800[diff] [blame]1447 true, kAllocDFInfo));
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1448 }
1449 }
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1450}
1451
1452/* Clear the visited flag for each BB */
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1453bool ClearVisitedFlag(struct CompilationUnit* cu, struct BasicBlock* bb)
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1454{
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1455 bb->visited = false;
1456 return true;
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1457}
1458
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1459void DataFlowAnalysisDispatcher(CompilationUnit* cu,
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1460 bool (*func)(CompilationUnit*, BasicBlock*),
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1461 DataFlowAnalysisMode dfa_mode,
1462 bool is_iterative)
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1463{
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1464 bool change = true;
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1465
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1466 while (change) {
1467 change = false;
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1468
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1469 switch (dfa_mode) {
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1470 /* Scan all blocks and perform the operations specified in func */
1471 case kAllNodes:
1472 {
1473 GrowableListIterator iterator;
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1474 GrowableListIteratorInit(&cu->block_list, &iterator);
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1475 while (true) {
buzbee52a77fc2012-11-20 19:50:46 -0800[diff] [blame]1476 BasicBlock* bb = reinterpret_cast<BasicBlock*>(GrowableListIteratorNext(&iterator));
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1477 if (bb == NULL) break;
1478 if (bb->hidden == true) continue;
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1479 change |= (*func)(cu, bb);
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1480 }
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1481 }
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1482 break;
1483 /* Scan reachable blocks and perform the ops specified in func. */
1484 case kReachableNodes:
1485 {
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1486 int num_reachable_blocks = cu->num_reachable_blocks;
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1487 int idx;
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1488 const GrowableList *block_list = &cu->block_list;
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1489
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1490 for (idx = 0; idx < num_reachable_blocks; idx++) {
1491 int block_idx = cu->dfs_order.elem_list[idx];
buzbeecbd6d442012-11-17 14:11:25 -0800[diff] [blame]1492 BasicBlock* bb =
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1493 reinterpret_cast<BasicBlock*>( GrowableListGetElement(block_list, block_idx));
1494 change |= (*func)(cu, bb);
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1495 }
1496 }
1497 break;
1498
1499 /* Scan reachable blocks by pre-order dfs and invoke func on each. */
1500 case kPreOrderDFSTraversal:
1501 {
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1502 int num_reachable_blocks = cu->num_reachable_blocks;
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1503 int idx;
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1504 const GrowableList *block_list = &cu->block_list;
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1505
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1506 for (idx = 0; idx < num_reachable_blocks; idx++) {
1507 int dfs_idx = cu->dfs_order.elem_list[idx];
buzbeecbd6d442012-11-17 14:11:25 -0800[diff] [blame]1508 BasicBlock* bb =
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1509 reinterpret_cast<BasicBlock*>(GrowableListGetElement(block_list, dfs_idx));
1510 change |= (*func)(cu, bb);
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1511 }
1512 }
1513 break;
1514 /* Scan reachable blocks post-order dfs and invoke func on each. */
1515 case kPostOrderDFSTraversal:
1516 {
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1517 int num_reachable_blocks = cu->num_reachable_blocks;
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1518 int idx;
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1519 const GrowableList *block_list = &cu->block_list;
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1520
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1521 for (idx = num_reachable_blocks - 1; idx >= 0; idx--) {
1522 int dfs_idx = cu->dfs_order.elem_list[idx];
buzbeecbd6d442012-11-17 14:11:25 -0800[diff] [blame]1523 BasicBlock* bb =
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1524 reinterpret_cast<BasicBlock *>( GrowableListGetElement(block_list, dfs_idx));
1525 change |= (*func)(cu, bb);
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1526 }
1527 }
1528 break;
1529 /* Scan reachable post-order dom tree and invoke func on each. */
1530 case kPostOrderDOMTraversal:
1531 {
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1532 int num_reachable_blocks = cu->num_reachable_blocks;
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1533 int idx;
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1534 const GrowableList *block_list = &cu->block_list;
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1535
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1536 for (idx = 0; idx < num_reachable_blocks; idx++) {
1537 int dom_idx = cu->dom_post_order_traversal.elem_list[idx];
buzbeecbd6d442012-11-17 14:11:25 -0800[diff] [blame]1538 BasicBlock* bb =
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1539 reinterpret_cast<BasicBlock*>( GrowableListGetElement(block_list, dom_idx));
1540 change |= (*func)(cu, bb);
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1541 }
1542 }
1543 break;
1544 /* Scan reachable blocks reverse post-order dfs, invoke func on each */
1545 case kReversePostOrderTraversal:
1546 {
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1547 int num_reachable_blocks = cu->num_reachable_blocks;
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1548 int idx;
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1549 const GrowableList *block_list = &cu->block_list;
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1550
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1551 for (idx = num_reachable_blocks - 1; idx >= 0; idx--) {
1552 int rev_idx = cu->dfs_post_order.elem_list[idx];
buzbeecbd6d442012-11-17 14:11:25 -0800[diff] [blame]1553 BasicBlock* bb =
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1554 reinterpret_cast<BasicBlock*>(GrowableListGetElement(block_list, rev_idx));
1555 change |= (*func)(cu, bb);
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1556 }
1557 }
1558 break;
1559 default:
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1560 LOG(FATAL) << "Unknown traversal mode: " << dfa_mode;
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1561 }
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1562 /* If is_iterative is false, exit the loop after the first iteration */
1563 change &= is_iterative;
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1564 }
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1565}
buzbee43a36422011-09-14 14:00:13 -0700[diff] [blame]1566
buzbeee1965672012-03-11 18:39:19 -0700[diff] [blame]1567/* Advance to next strictly dominated MIR node in an extended basic block */
buzbee2502e002012-12-31 16:05:53 -0800[diff] [blame]1568static MIR* AdvanceMIR(CompilationUnit* cu, BasicBlock** p_bb, MIR* mir)
1569{
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1570 BasicBlock* bb = *p_bb;
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1571 if (mir != NULL) {
1572 mir = mir->next;
1573 if (mir == NULL) {
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1574 bb = bb->fall_through;
1575 if ((bb == NULL) || bb->predecessors->num_used != 1) {
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1576 mir = NULL;
1577 } else {
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1578 *p_bb = bb;
1579 mir = bb->first_mir_insn;
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1580 }
buzbeee1965672012-03-11 18:39:19 -0700[diff] [blame]1581 }
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1582 }
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1583 return mir;
buzbeee1965672012-03-11 18:39:19 -0700[diff] [blame]1584}
1585
buzbeefc9e6fa2012-03-23 15:14:29 -0700[diff] [blame]1586/*
1587 * To be used at an invoke mir. If the logically next mir node represents
1588 * a move-result, return it. Else, return NULL. If a move-result exists,
1589 * it is required to immediately follow the invoke with no intervening
1590 * opcodes or incoming arcs. However, if the result of the invoke is not
1591 * used, a move-result may not be present.
1592 */
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1593MIR* FindMoveResult(CompilationUnit* cu, BasicBlock* bb, MIR* mir)
buzbeefc9e6fa2012-03-23 15:14:29 -0700[diff] [blame]1594{
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1595 BasicBlock* tbb = bb;
buzbee2502e002012-12-31 16:05:53 -0800[diff] [blame]1596 mir = AdvanceMIR(cu, &tbb, mir);
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1597 while (mir != NULL) {
Bill Buzbeec9f40dd2012-08-15 11:35:25 -0700[diff] [blame]1598 int opcode = mir->dalvikInsn.opcode;
buzbee15bf9802012-06-12 17:49:27 -0700[diff] [blame]1599 if ((mir->dalvikInsn.opcode == Instruction::MOVE_RESULT) ||
buzbee52ed7762012-06-13 23:43:14 -0700[diff] [blame]1600 (mir->dalvikInsn.opcode == Instruction::MOVE_RESULT_OBJECT) ||
buzbee15bf9802012-06-12 17:49:27 -0700[diff] [blame]1601 (mir->dalvikInsn.opcode == Instruction::MOVE_RESULT_WIDE)) {
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1602 break;
1603 }
1604 // Keep going if pseudo op, otherwise terminate
Bill Buzbeec9f40dd2012-08-15 11:35:25 -0700[diff] [blame]1605 if (opcode < kNumPackedOpcodes) {
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1606 mir = NULL;
1607 } else {
buzbee2502e002012-12-31 16:05:53 -0800[diff] [blame]1608 mir = AdvanceMIR(cu, &tbb, mir);
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1609 }
1610 }
1611 return mir;
buzbeefc9e6fa2012-03-23 15:14:29 -0700[diff] [blame]1612}
1613
buzbee2502e002012-12-31 16:05:53 -0800[diff] [blame]1614static BasicBlock* NextDominatedBlock(CompilationUnit* cu, BasicBlock* bb)
buzbee239c4e72012-03-16 08:42:29 -0700[diff] [blame]1615{
buzbee2502e002012-12-31 16:05:53 -0800[diff] [blame]1616 DCHECK((bb->block_type == kEntryBlock) || (bb->block_type == kDalvikByteCode)
1617 || (bb->block_type == kExitBlock));
1618 bb = bb->fall_through;
1619 if (bb == NULL || (bb->predecessors->num_used != 1)) {
1620 return NULL;
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1621 }
buzbee2502e002012-12-31 16:05:53 -0800[diff] [blame]1622 DCHECK((bb->block_type == kDalvikByteCode) || (bb->block_type == kExitBlock));
1623 return bb;
buzbee239c4e72012-03-16 08:42:29 -0700[diff] [blame]1624}
1625
buzbee2502e002012-12-31 16:05:53 -0800[diff] [blame]1626/* Do some MIR-level extended basic block optimizations */
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1627static bool BasicBlockOpt(CompilationUnit* cu, BasicBlock* bb)
buzbeee1965672012-03-11 18:39:19 -0700[diff] [blame]1628{
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1629 int num_temps = 0;
buzbee2502e002012-12-31 16:05:53 -0800[diff] [blame]1630 BBOpt bb_opt(cu);
1631 while (bb != NULL) {
1632 for (MIR* mir = bb->first_mir_insn; mir != NULL; mir = mir->next) {
1633 // TUNING: use the returned value number for CSE.
1634 bb_opt.GetValueNumber(mir);
1635 // Look for interesting opcodes, skip otherwise
1636 Instruction::Code opcode = mir->dalvikInsn.opcode;
1637 switch (opcode) {
1638 case Instruction::CMPL_FLOAT:
1639 case Instruction::CMPL_DOUBLE:
1640 case Instruction::CMPG_FLOAT:
1641 case Instruction::CMPG_DOUBLE:
1642 case Instruction::CMP_LONG:
1643 if (cu->gen_bitcode) {
1644 // Bitcode doesn't allow this optimization.
1645 break;
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1646 }
buzbee2502e002012-12-31 16:05:53 -0800[diff] [blame]1647 if (mir->next != NULL) {
1648 MIR* mir_next = mir->next;
1649 Instruction::Code br_opcode = mir_next->dalvikInsn.opcode;
1650 ConditionCode ccode = kCondNv;
1651 switch(br_opcode) {
1652 case Instruction::IF_EQZ:
1653 ccode = kCondEq;
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1654 break;
buzbee2502e002012-12-31 16:05:53 -0800[diff] [blame]1655 case Instruction::IF_NEZ:
1656 ccode = kCondNe;
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1657 break;
buzbee2502e002012-12-31 16:05:53 -0800[diff] [blame]1658 case Instruction::IF_LTZ:
1659 ccode = kCondLt;
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1660 break;
buzbee2502e002012-12-31 16:05:53 -0800[diff] [blame]1661 case Instruction::IF_GEZ:
1662 ccode = kCondGe;
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1663 break;
buzbee2502e002012-12-31 16:05:53 -0800[diff] [blame]1664 case Instruction::IF_GTZ:
1665 ccode = kCondGt;
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1666 break;
buzbee2502e002012-12-31 16:05:53 -0800[diff] [blame]1667 case Instruction::IF_LEZ:
1668 ccode = kCondLe;
1669 break;
1670 default:
1671 break;
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1672 }
buzbee2502e002012-12-31 16:05:53 -0800[diff] [blame]1673 // Make sure result of cmp is used by next insn and nowhere else
1674 if ((ccode != kCondNv) &&
1675 (mir->ssa_rep->defs[0] == mir_next->ssa_rep->uses[0]) &&
1676 (GetSSAUseCount(cu, mir->ssa_rep->defs[0]) == 1)) {
1677 mir_next->dalvikInsn.arg[0] = ccode;
1678 switch(opcode) {
1679 case Instruction::CMPL_FLOAT:
1680 mir_next->dalvikInsn.opcode =
1681 static_cast<Instruction::Code>(kMirOpFusedCmplFloat);
1682 break;
1683 case Instruction::CMPL_DOUBLE:
1684 mir_next->dalvikInsn.opcode =
1685 static_cast<Instruction::Code>(kMirOpFusedCmplDouble);
1686 break;
1687 case Instruction::CMPG_FLOAT:
1688 mir_next->dalvikInsn.opcode =
1689 static_cast<Instruction::Code>(kMirOpFusedCmpgFloat);
1690 break;
1691 case Instruction::CMPG_DOUBLE:
1692 mir_next->dalvikInsn.opcode =
1693 static_cast<Instruction::Code>(kMirOpFusedCmpgDouble);
1694 break;
1695 case Instruction::CMP_LONG:
1696 mir_next->dalvikInsn.opcode =
1697 static_cast<Instruction::Code>(kMirOpFusedCmpLong);
1698 break;
1699 default: LOG(ERROR) << "Unexpected opcode: " << opcode;
1700 }
1701 mir->dalvikInsn.opcode = static_cast<Instruction::Code>(kMirOpNop);
1702 mir_next->ssa_rep->num_uses = mir->ssa_rep->num_uses;
1703 mir_next->ssa_rep->uses = mir->ssa_rep->uses;
1704 mir_next->ssa_rep->fp_use = mir->ssa_rep->fp_use;
1705 mir_next->ssa_rep->num_defs = 0;
1706 mir->ssa_rep->num_uses = 0;
1707 mir->ssa_rep->num_defs = 0;
1708 }
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1709 }
buzbee2502e002012-12-31 16:05:53 -0800[diff] [blame]1710 break;
1711 default:
1712 break;
1713 }
buzbeee1965672012-03-11 18:39:19 -0700[diff] [blame]1714 }
buzbee2502e002012-12-31 16:05:53 -0800[diff] [blame]1715 bb = NextDominatedBlock(cu, bb);
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1716 }
buzbeee1965672012-03-11 18:39:19 -0700[diff] [blame]1717
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1718 if (num_temps > cu->num_compiler_temps) {
1719 cu->num_compiler_temps = num_temps;
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1720 }
1721 return true;
buzbeee1965672012-03-11 18:39:19 -0700[diff] [blame]1722}
1723
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1724static bool NullCheckEliminationInit(struct CompilationUnit* cu, struct BasicBlock* bb)
buzbee43a36422011-09-14 14:00:13 -0700[diff] [blame]1725{
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1726 if (bb->data_flow_info == NULL) return false;
1727 bb->data_flow_info->ending_null_check_v =
1728 AllocBitVector(cu, cu->num_ssa_regs, false, kBitMapNullCheck);
1729 ClearAllBits(bb->data_flow_info->ending_null_check_v);
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1730 return true;
buzbee43a36422011-09-14 14:00:13 -0700[diff] [blame]1731}
1732
buzbeed1643e42012-09-05 14:06:51 -0700[diff] [blame]1733/* Collect stats on number of checks removed */
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1734static bool CountChecks( struct CompilationUnit* cu, struct BasicBlock* bb)
buzbeed1643e42012-09-05 14:06:51 -0700[diff] [blame]1735{
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1736 if (bb->data_flow_info == NULL) return false;
buzbee28c9a832012-11-21 15:39:13 -0800[diff] [blame]1737 for (MIR* mir = bb->first_mir_insn; mir != NULL; mir = mir->next) {
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1738 if (mir->ssa_rep == NULL) {
buzbeed1643e42012-09-05 14:06:51 -0700[diff] [blame]1739 continue;
1740 }
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1741 int df_attributes = oat_data_flow_attributes[mir->dalvikInsn.opcode];
1742 if (df_attributes & DF_HAS_NULL_CHKS) {
1743 cu->checkstats->null_checks++;
1744 if (mir->optimization_flags & MIR_IGNORE_NULL_CHECK) {
1745 cu->checkstats->null_checks_eliminated++;
buzbeed1643e42012-09-05 14:06:51 -0700[diff] [blame]1746 }
1747 }
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1748 if (df_attributes & DF_HAS_RANGE_CHKS) {
1749 cu->checkstats->range_checks++;
1750 if (mir->optimization_flags & MIR_IGNORE_RANGE_CHECK) {
1751 cu->checkstats->range_checks_eliminated++;
buzbeed1643e42012-09-05 14:06:51 -0700[diff] [blame]1752 }
1753 }
1754 }
1755 return false;
1756}
1757
buzbee0967a252012-09-14 10:43:54 -0700[diff] [blame]1758/* Try to make common case the fallthrough path */
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1759static bool LayoutBlocks(struct CompilationUnit* cu, struct BasicBlock* bb)
buzbee0967a252012-09-14 10:43:54 -0700[diff] [blame]1760{
1761 // TODO: For now, just looking for direct throws. Consider generalizing for profile feedback
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1762 if (!bb->explicit_throw) {
buzbee0967a252012-09-14 10:43:54 -0700[diff] [blame]1763 return false;
1764 }
1765 BasicBlock* walker = bb;
1766 while (true) {
1767 // Check termination conditions
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1768 if ((walker->block_type == kEntryBlock) || (walker->predecessors->num_used != 1)) {
buzbee0967a252012-09-14 10:43:54 -0700[diff] [blame]1769 break;
1770 }
1771 BasicBlock* prev = GET_ELEM_N(walker->predecessors, BasicBlock*, 0);
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1772 if (prev->conditional_branch) {
1773 if (prev->fall_through == walker) {
buzbee0967a252012-09-14 10:43:54 -0700[diff] [blame]1774 // Already done - return
1775 break;
1776 }
1777 DCHECK_EQ(walker, prev->taken);
1778 // Got one. Flip it and exit
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1779 Instruction::Code opcode = prev->last_mir_insn->dalvikInsn.opcode;
buzbee0967a252012-09-14 10:43:54 -0700[diff] [blame]1780 switch (opcode) {
1781 case Instruction::IF_EQ: opcode = Instruction::IF_NE; break;
1782 case Instruction::IF_NE: opcode = Instruction::IF_EQ; break;
1783 case Instruction::IF_LT: opcode = Instruction::IF_GE; break;
1784 case Instruction::IF_GE: opcode = Instruction::IF_LT; break;
1785 case Instruction::IF_GT: opcode = Instruction::IF_LE; break;
1786 case Instruction::IF_LE: opcode = Instruction::IF_GT; break;
1787 case Instruction::IF_EQZ: opcode = Instruction::IF_NEZ; break;
1788 case Instruction::IF_NEZ: opcode = Instruction::IF_EQZ; break;
1789 case Instruction::IF_LTZ: opcode = Instruction::IF_GEZ; break;
1790 case Instruction::IF_GEZ: opcode = Instruction::IF_LTZ; break;
1791 case Instruction::IF_GTZ: opcode = Instruction::IF_LEZ; break;
1792 case Instruction::IF_LEZ: opcode = Instruction::IF_GTZ; break;
buzbeecbd6d442012-11-17 14:11:25 -0800[diff] [blame]1793 default: LOG(FATAL) << "Unexpected opcode " << opcode;
buzbee0967a252012-09-14 10:43:54 -0700[diff] [blame]1794 }
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1795 prev->last_mir_insn->dalvikInsn.opcode = opcode;
1796 BasicBlock* t_bb = prev->taken;
1797 prev->taken = prev->fall_through;
1798 prev->fall_through = t_bb;
buzbee0967a252012-09-14 10:43:54 -0700[diff] [blame]1799 break;
1800 }
1801 walker = prev;
1802 }
1803 return false;
1804}
1805
buzbeed1643e42012-09-05 14:06:51 -0700[diff] [blame]1806/* Combine any basic blocks terminated by instructions that we now know can't throw */
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1807static bool CombineBlocks(struct CompilationUnit* cu, struct BasicBlock* bb)
buzbeed1643e42012-09-05 14:06:51 -0700[diff] [blame]1808{
1809 // Loop here to allow combining a sequence of blocks
1810 while (true) {
1811 // Check termination conditions
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1812 if ((bb->first_mir_insn == NULL)
1813 || (bb->data_flow_info == NULL)
1814 || (bb->block_type == kExceptionHandling)
1815 || (bb->block_type == kExitBlock)
1816 || (bb->block_type == kDead)
1817 || ((bb->taken == NULL) || (bb->taken->block_type != kExceptionHandling))
1818 || (bb->successor_block_list.block_list_type != kNotUsed)
1819 || (static_cast<int>(bb->last_mir_insn->dalvikInsn.opcode) != kMirOpCheck)) {
buzbeed1643e42012-09-05 14:06:51 -0700[diff] [blame]1820 break;
1821 }
1822
1823 // Test the kMirOpCheck instruction
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1824 MIR* mir = bb->last_mir_insn;
buzbeed1643e42012-09-05 14:06:51 -0700[diff] [blame]1825 // Grab the attributes from the paired opcode
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1826 MIR* throw_insn = mir->meta.throw_insn;
1827 int df_attributes = oat_data_flow_attributes[throw_insn->dalvikInsn.opcode];
1828 bool can_combine = true;
1829 if (df_attributes & DF_HAS_NULL_CHKS) {
1830 can_combine &= ((throw_insn->optimization_flags & MIR_IGNORE_NULL_CHECK) != 0);
buzbee0967a252012-09-14 10:43:54 -0700[diff] [blame]1831 }
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1832 if (df_attributes & DF_HAS_RANGE_CHKS) {
1833 can_combine &= ((throw_insn->optimization_flags & MIR_IGNORE_RANGE_CHECK) != 0);
buzbee0967a252012-09-14 10:43:54 -0700[diff] [blame]1834 }
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1835 if (!can_combine) {
buzbeed1643e42012-09-05 14:06:51 -0700[diff] [blame]1836 break;
1837 }
1838 // OK - got one. Combine
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1839 BasicBlock* bb_next = bb->fall_through;
1840 DCHECK(!bb_next->catch_entry);
1841 DCHECK_EQ(bb_next->predecessors->num_used, 1U);
1842 MIR* t_mir = bb->last_mir_insn->prev;
buzbeed1643e42012-09-05 14:06:51 -0700[diff] [blame]1843 // Overwrite the kOpCheck insn with the paired opcode
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1844 DCHECK_EQ(bb_next->first_mir_insn, throw_insn);
1845 *bb->last_mir_insn = *throw_insn;
1846 bb->last_mir_insn->prev = t_mir;
buzbeed1643e42012-09-05 14:06:51 -0700[diff] [blame]1847 // Use the successor info from the next block
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1848 bb->successor_block_list = bb_next->successor_block_list;
buzbeed1643e42012-09-05 14:06:51 -0700[diff] [blame]1849 // Use the ending block linkage from the next block
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1850 bb->fall_through = bb_next->fall_through;
1851 bb->taken->block_type = kDead; // Kill the unused exception block
1852 bb->taken = bb_next->taken;
buzbeed1643e42012-09-05 14:06:51 -0700[diff] [blame]1853 // Include the rest of the instructions
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1854 bb->last_mir_insn = bb_next->last_mir_insn;
buzbeed1643e42012-09-05 14:06:51 -0700[diff] [blame]1855
1856 /*
1857 * NOTE: we aren't updating all dataflow info here. Should either make sure this pass
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1858 * happens after uses of i_dominated, dom_frontier or update the dataflow info here.
buzbeed1643e42012-09-05 14:06:51 -0700[diff] [blame]1859 */
1860
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1861 // Kill bb_next and remap now-dead id to parent
1862 bb_next->block_type = kDead;
1863 cu->block_id_map.Overwrite(bb_next->id, bb->id);
buzbeed1643e42012-09-05 14:06:51 -0700[diff] [blame]1864
1865 // Now, loop back and see if we can keep going
1866 }
1867 return false;
1868}
1869
buzbee43a36422011-09-14 14:00:13 -0700[diff] [blame]1870/* Eliminate unnecessary null checks for a basic block. */
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1871static bool EliminateNullChecks( struct CompilationUnit* cu, struct BasicBlock* bb)
buzbee43a36422011-09-14 14:00:13 -0700[diff] [blame]1872{
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1873 if (bb->data_flow_info == NULL) return false;
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1874
1875 /*
1876 * Set initial state. Be conservative with catch
1877 * blocks and start with no assumptions about null check
1878 * status (except for "this").
1879 */
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1880 if ((bb->block_type == kEntryBlock) | bb->catch_entry) {
1881 ClearAllBits(cu->temp_ssa_register_v);
1882 if ((cu->access_flags & kAccStatic) == 0) {
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1883 // If non-static method, mark "this" as non-null
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1884 int this_reg = cu->num_dalvik_registers - cu->num_ins;
1885 SetBit(cu, cu->temp_ssa_register_v, this_reg);
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1886 }
1887 } else {
1888 // Starting state is intesection of all incoming arcs
1889 GrowableListIterator iter;
buzbee52a77fc2012-11-20 19:50:46 -0800[diff] [blame]1890 GrowableListIteratorInit(bb->predecessors, &iter);
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1891 BasicBlock* pred_bb = reinterpret_cast<BasicBlock*>(GrowableListIteratorNext(&iter));
1892 DCHECK(pred_bb != NULL);
1893 CopyBitVector(cu->temp_ssa_register_v,
1894 pred_bb->data_flow_info->ending_null_check_v);
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1895 while (true) {
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1896 pred_bb = reinterpret_cast<BasicBlock*>(GrowableListIteratorNext(&iter));
1897 if (!pred_bb) break;
1898 if ((pred_bb->data_flow_info == NULL) ||
1899 (pred_bb->data_flow_info->ending_null_check_v == NULL)) {
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1900 continue;
1901 }
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1902 IntersectBitVectors(cu->temp_ssa_register_v,
1903 cu->temp_ssa_register_v,
1904 pred_bb->data_flow_info->ending_null_check_v);
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1905 }
1906 }
1907
1908 // Walk through the instruction in the block, updating as necessary
buzbee28c9a832012-11-21 15:39:13 -0800[diff] [blame]1909 for (MIR* mir = bb->first_mir_insn; mir != NULL; mir = mir->next) {
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1910 if (mir->ssa_rep == NULL) {
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1911 continue;
1912 }
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1913 int df_attributes = oat_data_flow_attributes[mir->dalvikInsn.opcode];
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1914
1915 // Mark target of NEW* as non-null
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1916 if (df_attributes & DF_NON_NULL_DST) {
1917 SetBit(cu, cu->temp_ssa_register_v, mir->ssa_rep->defs[0]);
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1918 }
1919
1920 // Mark non-null returns from invoke-style NEW*
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1921 if (df_attributes & DF_NON_NULL_RET) {
1922 MIR* next_mir = mir->next;
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1923 // Next should be an MOVE_RESULT_OBJECT
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1924 if (next_mir &&
1925 next_mir->dalvikInsn.opcode == Instruction::MOVE_RESULT_OBJECT) {
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1926 // Mark as null checked
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1927 SetBit(cu, cu->temp_ssa_register_v, next_mir->ssa_rep->defs[0]);
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1928 } else {
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1929 if (next_mir) {
1930 LOG(WARNING) << "Unexpected opcode following new: " << next_mir->dalvikInsn.opcode;
1931 } else if (bb->fall_through) {
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1932 // Look in next basic block
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1933 struct BasicBlock* next_bb = bb->fall_through;
buzbee28c9a832012-11-21 15:39:13 -0800[diff] [blame]1934 for (MIR* tmir = next_bb->first_mir_insn; tmir != NULL;
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1935 tmir =tmir->next) {
buzbeecbd6d442012-11-17 14:11:25 -0800[diff] [blame]1936 if (static_cast<int>(tmir->dalvikInsn.opcode) >= static_cast<int>(kMirOpFirst)) {
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1937 continue;
1938 }
1939 // First non-pseudo should be MOVE_RESULT_OBJECT
1940 if (tmir->dalvikInsn.opcode == Instruction::MOVE_RESULT_OBJECT) {
1941 // Mark as null checked
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1942 SetBit(cu, cu->temp_ssa_register_v, tmir->ssa_rep->defs[0]);
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1943 } else {
buzbeecbd6d442012-11-17 14:11:25 -0800[diff] [blame]1944 LOG(WARNING) << "Unexpected op after new: " << tmir->dalvikInsn.opcode;
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1945 }
1946 break;
1947 }
1948 }
1949 }
1950 }
buzbee5abfa3e2012-01-31 17:01:43 -0800[diff] [blame]1951
buzbee43a36422011-09-14 14:00:13 -0700[diff] [blame]1952 /*
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1953 * Propagate nullcheck state on register copies (including
1954 * Phi pseudo copies. For the latter, nullcheck state is
1955 * the "and" of all the Phi's operands.
buzbee43a36422011-09-14 14:00:13 -0700[diff] [blame]1956 */
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1957 if (df_attributes & (DF_NULL_TRANSFER_0 | DF_NULL_TRANSFER_N)) {
1958 int tgt_sreg = mir->ssa_rep->defs[0];
1959 int operands = (df_attributes & DF_NULL_TRANSFER_0) ? 1 :
1960 mir->ssa_rep->num_uses;
1961 bool null_checked = true;
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1962 for (int i = 0; i < operands; i++) {
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1963 null_checked &= IsBitSet(cu->temp_ssa_register_v,
1964 mir->ssa_rep->uses[i]);
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1965 }
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1966 if (null_checked) {
1967 SetBit(cu, cu->temp_ssa_register_v, tgt_sreg);
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1968 }
buzbee43a36422011-09-14 14:00:13 -0700[diff] [blame]1969 }
1970
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1971 // Already nullchecked?
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1972 if ((df_attributes & DF_HAS_NULL_CHKS) && !(mir->optimization_flags & MIR_IGNORE_NULL_CHECK)) {
1973 int src_idx;
1974 if (df_attributes & DF_NULL_CHK_1) {
1975 src_idx = 1;
1976 } else if (df_attributes & DF_NULL_CHK_2) {
1977 src_idx = 2;
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1978 } else {
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1979 src_idx = 0;
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1980 }
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1981 int src_sreg = mir->ssa_rep->uses[src_idx];
1982 if (IsBitSet(cu->temp_ssa_register_v, src_sreg)) {
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1983 // Eliminate the null check
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1984 mir->optimization_flags |= MIR_IGNORE_NULL_CHECK;
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1985 } else {
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1986 // Mark s_reg as null-checked
1987 SetBit(cu, cu->temp_ssa_register_v, src_sreg);
buzbee43a36422011-09-14 14:00:13 -0700[diff] [blame]1988 }
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1989 }
1990 }
buzbee43a36422011-09-14 14:00:13 -0700[diff] [blame]1991
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1992 // Did anything change?
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1993 bool res = CompareBitVectors(bb->data_flow_info->ending_null_check_v,
1994 cu->temp_ssa_register_v);
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1995 if (res) {
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1996 CopyBitVector(bb->data_flow_info->ending_null_check_v,
1997 cu->temp_ssa_register_v);
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1998 }
1999 return res;
buzbee43a36422011-09-14 14:00:13 -0700[diff] [blame]2000}
2001
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2002void NullCheckElimination(CompilationUnit *cu)
buzbee43a36422011-09-14 14:00:13 -0700[diff] [blame]2003{
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2004 if (!(cu->disable_opt & (1 << kNullCheckElimination))) {
2005 DCHECK(cu->temp_ssa_register_v != NULL);
2006 DataFlowAnalysisDispatcher(cu, NullCheckEliminationInit, kAllNodes,
2007 false /* is_iterative */);
2008 DataFlowAnalysisDispatcher(cu, EliminateNullChecks,
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2009 kPreOrderDFSTraversal,
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2010 true /* is_iterative */);
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2011 }
buzbee43a36422011-09-14 14:00:13 -0700[diff] [blame]2012}
Elliott Hughes11d1b0c2012-01-23 16:57:47 -0800[diff] [blame]2013
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2014void BasicBlockCombine(CompilationUnit* cu)
buzbeed1643e42012-09-05 14:06:51 -0700[diff] [blame]2015{
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2016 DataFlowAnalysisDispatcher(cu, CombineBlocks, kPreOrderDFSTraversal, false);
buzbeed1643e42012-09-05 14:06:51 -0700[diff] [blame]2017}
2018
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2019void CodeLayout(CompilationUnit* cu)
buzbee0967a252012-09-14 10:43:54 -0700[diff] [blame]2020{
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2021 DataFlowAnalysisDispatcher(cu, LayoutBlocks, kAllNodes, false);
buzbee0967a252012-09-14 10:43:54 -0700[diff] [blame]2022}
2023
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2024void DumpCheckStats(CompilationUnit *cu)
buzbeed1643e42012-09-05 14:06:51 -0700[diff] [blame]2025{
buzbeecbd6d442012-11-17 14:11:25 -0800[diff] [blame]2026 Checkstats* stats =
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2027 static_cast<Checkstats*>(NewMem(cu, sizeof(Checkstats), true, kAllocDFInfo));
2028 cu->checkstats = stats;
2029 DataFlowAnalysisDispatcher(cu, CountChecks, kAllNodes, false /* is_iterative */);
2030 if (stats->null_checks > 0) {
2031 float eliminated = static_cast<float>(stats->null_checks_eliminated);
2032 float checks = static_cast<float>(stats->null_checks);
2033 LOG(INFO) << "Null Checks: " << PrettyMethod(cu->method_idx, *cu->dex_file) << " "
2034 << stats->null_checks_eliminated << " of " << stats->null_checks << " -> "
buzbeecbd6d442012-11-17 14:11:25 -0800[diff] [blame]2035 << (eliminated/checks) * 100.0 << "%";
buzbeed1643e42012-09-05 14:06:51 -0700[diff] [blame]2036 }
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2037 if (stats->range_checks > 0) {
2038 float eliminated = static_cast<float>(stats->range_checks_eliminated);
2039 float checks = static_cast<float>(stats->range_checks);
2040 LOG(INFO) << "Range Checks: " << PrettyMethod(cu->method_idx, *cu->dex_file) << " "
2041 << stats->range_checks_eliminated << " of " << stats->range_checks << " -> "
buzbeecbd6d442012-11-17 14:11:25 -0800[diff] [blame]2042 << (eliminated/checks) * 100.0 << "%";
buzbeed1643e42012-09-05 14:06:51 -0700[diff] [blame]2043 }
2044}
2045
buzbee2502e002012-12-31 16:05:53 -0800[diff] [blame]2046bool BuildExtendedBBList(struct CompilationUnit* cu, struct BasicBlock* bb)
2047{
2048 if (bb->visited) return false;
2049 if (!((bb->block_type == kEntryBlock) || (bb->block_type == kDalvikByteCode)
2050 || (bb->block_type == kExitBlock))) {
2051 // Ignore special blocks
2052 bb->visited = true;
2053 return false;
2054 }
2055 // Must be head of extended basic block.
2056 if (cu->verbose) {
2057 LOG(INFO) << "Extended bb head " << bb->id;
2058 }
2059 cu->extended_basic_blocks.push_back(bb);
2060 // Visit blocks strictly dominated by this head.
2061 while (bb != NULL) {
2062 bb->visited = true;
2063 bb = NextDominatedBlock(cu, bb);
2064 if (cu->verbose && (bb != NULL)) {
2065 LOG(INFO) << "...added bb " << bb->id;
2066 }
2067 }
2068 return false; // Not iterative - return value will be ignored
2069}
2070
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2071void BasicBlockOptimization(CompilationUnit *cu)
buzbeee1965672012-03-11 18:39:19 -0700[diff] [blame]2072{
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2073 if (!(cu->disable_opt & (1 << kBBOpt))) {
2074 CompilerInitGrowableList(cu, &cu->compiler_temps, 6, kListMisc);
2075 DCHECK_EQ(cu->num_compiler_temps, 0);
buzbee2502e002012-12-31 16:05:53 -0800[diff] [blame]2076 // Mark all blocks as not visited
2077 DataFlowAnalysisDispatcher(cu, ClearVisitedFlag,
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2078 kAllNodes, false /* is_iterative */);
buzbee2502e002012-12-31 16:05:53 -0800[diff] [blame]2079 DataFlowAnalysisDispatcher(cu, BuildExtendedBBList,
2080 kPreOrderDFSTraversal,
2081 false /* is_iterative */);
2082 // Perform extended basic block optimizations.
2083 for (unsigned int i = 0; i < cu->extended_basic_blocks.size(); i++) {
2084 BasicBlockOpt(cu, cu->extended_basic_blocks[i]);
2085 }
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2086 }
buzbeee1965672012-03-11 18:39:19 -0700[diff] [blame]2087}
2088
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2089static void AddLoopHeader(CompilationUnit* cu, BasicBlock* header,
2090 BasicBlock* back_edge)
buzbee239c4e72012-03-16 08:42:29 -0700[diff] [blame]2091{
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2092 GrowableListIterator iter;
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2093 GrowableListIteratorInit(&cu->loop_headers, &iter);
buzbee52a77fc2012-11-20 19:50:46 -0800[diff] [blame]2094 for (LoopInfo* loop = reinterpret_cast<LoopInfo*>(GrowableListIteratorNext(&iter));
2095 (loop != NULL); loop = reinterpret_cast<LoopInfo*>(GrowableListIteratorNext(&iter))) {
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2096 if (loop->header == header) {
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2097 InsertGrowableList(cu, &loop->incoming_back_edges,
2098 reinterpret_cast<uintptr_t>(back_edge));
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2099 return;
buzbee239c4e72012-03-16 08:42:29 -0700[diff] [blame]2100 }
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2101 }
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2102 LoopInfo* info = static_cast<LoopInfo*>(NewMem(cu, sizeof(LoopInfo), true, kAllocDFInfo));
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2103 info->header = header;
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2104 CompilerInitGrowableList(cu, &info->incoming_back_edges, 2, kListMisc);
2105 InsertGrowableList(cu, &info->incoming_back_edges, reinterpret_cast<uintptr_t>(back_edge));
2106 InsertGrowableList(cu, &cu->loop_headers, reinterpret_cast<uintptr_t>(info));
buzbee239c4e72012-03-16 08:42:29 -0700[diff] [blame]2107}
2108
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2109static bool FindBackEdges(struct CompilationUnit* cu, struct BasicBlock* bb)
buzbee239c4e72012-03-16 08:42:29 -0700[diff] [blame]2110{
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2111 if ((bb->data_flow_info == NULL) || (bb->last_mir_insn == NULL)) {
buzbee239c4e72012-03-16 08:42:29 -0700[diff] [blame]2112 return false;
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2113 }
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2114 Instruction::Code opcode = bb->last_mir_insn->dalvikInsn.opcode;
Ian Rogersa75a0132012-09-28 11:41:42 -0700[diff] [blame]2115 if (Instruction::FlagsOf(opcode) & Instruction::kBranch) {
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2116 if (bb->taken && (bb->taken->start_offset <= bb->start_offset)) {
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2117 DCHECK(bb->dominators != NULL);
buzbee52a77fc2012-11-20 19:50:46 -0800[diff] [blame]2118 if (IsBitSet(bb->dominators, bb->taken->id)) {
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2119 if (cu->verbose) {
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2120 LOG(INFO) << "Loop backedge from 0x"
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2121 << std::hex << bb->last_mir_insn->offset
2122 << " to 0x" << std::hex << bb->taken->start_offset;
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2123 }
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2124 AddLoopHeader(cu, bb->taken, bb);
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2125 }
2126 }
2127 }
2128 return false;
buzbee239c4e72012-03-16 08:42:29 -0700[diff] [blame]2129}
2130
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2131static void AddBlocksToLoop(CompilationUnit* cu, ArenaBitVector* blocks,
2132 BasicBlock* bb, int head_id)
buzbee239c4e72012-03-16 08:42:29 -0700[diff] [blame]2133{
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2134 if (!IsBitSet(bb->dominators, head_id) ||
buzbee52a77fc2012-11-20 19:50:46 -0800[diff] [blame]2135 IsBitSet(blocks, bb->id)) {
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2136 return;
2137 }
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2138 SetBit(cu, blocks, bb->id);
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2139 GrowableListIterator iter;
buzbee52a77fc2012-11-20 19:50:46 -0800[diff] [blame]2140 GrowableListIteratorInit(bb->predecessors, &iter);
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2141 BasicBlock* pred_bb;
buzbee28c9a832012-11-21 15:39:13 -0800[diff] [blame]2142 for (pred_bb = reinterpret_cast<BasicBlock*>(GrowableListIteratorNext(&iter)); pred_bb != NULL;
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2143 pred_bb = reinterpret_cast<BasicBlock*>(GrowableListIteratorNext(&iter))) {
2144 AddBlocksToLoop(cu, blocks, pred_bb, head_id);
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2145 }
buzbee239c4e72012-03-16 08:42:29 -0700[diff] [blame]2146}
2147
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2148static void DumpLoops(CompilationUnit *cu)
buzbee239c4e72012-03-16 08:42:29 -0700[diff] [blame]2149{
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2150 GrowableListIterator iter;
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2151 GrowableListIteratorInit(&cu->loop_headers, &iter);
buzbee52a77fc2012-11-20 19:50:46 -0800[diff] [blame]2152 for (LoopInfo* loop = reinterpret_cast<LoopInfo*>(GrowableListIteratorNext(&iter));
2153 (loop != NULL); loop = reinterpret_cast<LoopInfo*>(GrowableListIteratorNext(&iter))) {
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2154 LOG(INFO) << "Loop head block id " << loop->header->id
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2155 << ", offset 0x" << std::hex << loop->header->start_offset
2156 << ", Depth: " << loop->header->nesting_depth;
buzbee239c4e72012-03-16 08:42:29 -0700[diff] [blame]2157 GrowableListIterator iter;
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2158 GrowableListIteratorInit(&loop->incoming_back_edges, &iter);
2159 BasicBlock* edge_bb;
buzbee28c9a832012-11-21 15:39:13 -0800[diff] [blame]2160 for (edge_bb = reinterpret_cast<BasicBlock*>(GrowableListIteratorNext(&iter)); edge_bb != NULL;
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2161 edge_bb = reinterpret_cast<BasicBlock*>(GrowableListIteratorNext(&iter))) {
2162 LOG(INFO) << " Backedge block id " << edge_bb->id
2163 << ", offset 0x" << std::hex << edge_bb->start_offset;
2164 ArenaBitVectorIterator b_iter;
2165 BitVectorIteratorInit(loop->blocks, &b_iter);
2166 for (int bb_id = BitVectorIteratorNext(&b_iter); bb_id != -1;
2167 bb_id = BitVectorIteratorNext(&b_iter)) {
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2168 BasicBlock *bb;
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2169 bb = reinterpret_cast<BasicBlock*>(GrowableListGetElement(&cu->block_list, bb_id));
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2170 LOG(INFO) << " (" << bb->id << ", 0x" << std::hex
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2171 << bb->start_offset << ")";
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2172 }
buzbee239c4e72012-03-16 08:42:29 -0700[diff] [blame]2173 }
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2174 }
buzbee239c4e72012-03-16 08:42:29 -0700[diff] [blame]2175}
2176
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2177void LoopDetection(CompilationUnit *cu)
buzbee239c4e72012-03-16 08:42:29 -0700[diff] [blame]2178{
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2179 if (cu->disable_opt & (1 << kPromoteRegs)) {
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2180 return;
2181 }
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2182 CompilerInitGrowableList(cu, &cu->loop_headers, 6, kListMisc);
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2183 // Find the loop headers
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2184 DataFlowAnalysisDispatcher(cu, FindBackEdges, kAllNodes, false /* is_iterative */);
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2185 GrowableListIterator iter;
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2186 GrowableListIteratorInit(&cu->loop_headers, &iter);
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2187 // Add blocks to each header
buzbee52a77fc2012-11-20 19:50:46 -0800[diff] [blame]2188 for (LoopInfo* loop = reinterpret_cast<LoopInfo*>(GrowableListIteratorNext(&iter));
buzbee28c9a832012-11-21 15:39:13 -0800[diff] [blame]2189 loop != NULL; loop = reinterpret_cast<LoopInfo*>(GrowableListIteratorNext(&iter))) {
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2190 loop->blocks = AllocBitVector(cu, cu->num_blocks, true,
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2191 kBitMapMisc);
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2192 SetBit(cu, loop->blocks, loop->header->id);
buzbee239c4e72012-03-16 08:42:29 -0700[diff] [blame]2193 GrowableListIterator iter;
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2194 GrowableListIteratorInit(&loop->incoming_back_edges, &iter);
2195 BasicBlock* edge_bb;
buzbee28c9a832012-11-21 15:39:13 -0800[diff] [blame]2196 for (edge_bb = reinterpret_cast<BasicBlock*>(GrowableListIteratorNext(&iter)); edge_bb != NULL;
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2197 edge_bb = reinterpret_cast<BasicBlock*>(GrowableListIteratorNext(&iter))) {
2198 AddBlocksToLoop(cu, loop->blocks, edge_bb, loop->header->id);
buzbee239c4e72012-03-16 08:42:29 -0700[diff] [blame]2199 }
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2200 }
2201 // Compute the nesting depth of each header
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2202 GrowableListIteratorInit(&cu->loop_headers, &iter);
buzbee52a77fc2012-11-20 19:50:46 -0800[diff] [blame]2203 for (LoopInfo* loop = reinterpret_cast<LoopInfo*>(GrowableListIteratorNext(&iter));
buzbee28c9a832012-11-21 15:39:13 -0800[diff] [blame]2204 loop != NULL; loop = reinterpret_cast<LoopInfo*>(GrowableListIteratorNext(&iter))) {
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2205 GrowableListIterator iter2;
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2206 GrowableListIteratorInit(&cu->loop_headers, &iter2);
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2207 LoopInfo* loop2;
buzbee52a77fc2012-11-20 19:50:46 -0800[diff] [blame]2208 for (loop2 = reinterpret_cast<LoopInfo*>(GrowableListIteratorNext(&iter2));
buzbee28c9a832012-11-21 15:39:13 -0800[diff] [blame]2209 loop2 != NULL; loop2 = reinterpret_cast<LoopInfo*>(GrowableListIteratorNext(&iter2))) {
buzbee52a77fc2012-11-20 19:50:46 -0800[diff] [blame]2210 if (IsBitSet(loop2->blocks, loop->header->id)) {
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2211 loop->header->nesting_depth++;
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2212 }
buzbee239c4e72012-03-16 08:42:29 -0700[diff] [blame]2213 }
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2214 }
2215 // Assign nesting depth to each block in all loops
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2216 GrowableListIteratorInit(&cu->loop_headers, &iter);
buzbee52a77fc2012-11-20 19:50:46 -0800[diff] [blame]2217 for (LoopInfo* loop = reinterpret_cast<LoopInfo*>(GrowableListIteratorNext(&iter));
2218 (loop != NULL); loop = reinterpret_cast<LoopInfo*>(GrowableListIteratorNext(&iter))) {
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2219 ArenaBitVectorIterator b_iter;
2220 BitVectorIteratorInit(loop->blocks, &b_iter);
2221 for (int bb_id = BitVectorIteratorNext(&b_iter); bb_id != -1;
2222 bb_id = BitVectorIteratorNext(&b_iter)) {
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2223 BasicBlock *bb;
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2224 bb = reinterpret_cast<BasicBlock*>(GrowableListGetElement(&cu->block_list, bb_id));
2225 bb->nesting_depth = std::max(bb->nesting_depth,
2226 loop->header->nesting_depth);
buzbee239c4e72012-03-16 08:42:29 -0700[diff] [blame]2227 }
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2228 }
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2229 if (cu->verbose) {
2230 DumpLoops(cu);
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2231 }
buzbee239c4e72012-03-16 08:42:29 -0700[diff] [blame]2232}
2233
2234/*
buzbee9c044ce2012-03-18 13:24:07 -0700[diff] [blame]2235 * This function will make a best guess at whether the invoke will
2236 * end up using Method*. It isn't critical to get it exactly right,
2237 * and attempting to do would involve more complexity than it's
2238 * worth.
2239 */
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2240static bool InvokeUsesMethodStar(CompilationUnit* cu, MIR* mir)
buzbee9c044ce2012-03-18 13:24:07 -0700[diff] [blame]2241{
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2242 InvokeType type;
2243 Instruction::Code opcode = mir->dalvikInsn.opcode;
2244 switch (opcode) {
2245 case Instruction::INVOKE_STATIC:
2246 case Instruction::INVOKE_STATIC_RANGE:
2247 type = kStatic;
2248 break;
2249 case Instruction::INVOKE_DIRECT:
2250 case Instruction::INVOKE_DIRECT_RANGE:
2251 type = kDirect;
2252 break;
2253 case Instruction::INVOKE_VIRTUAL:
2254 case Instruction::INVOKE_VIRTUAL_RANGE:
2255 type = kVirtual;
2256 break;
2257 case Instruction::INVOKE_INTERFACE:
2258 case Instruction::INVOKE_INTERFACE_RANGE:
2259 return false;
2260 case Instruction::INVOKE_SUPER_RANGE:
2261 case Instruction::INVOKE_SUPER:
2262 type = kSuper;
2263 break;
2264 default:
buzbeecbd6d442012-11-17 14:11:25 -0800[diff] [blame]2265 LOG(WARNING) << "Unexpected invoke op: " << opcode;
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2266 return false;
2267 }
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2268 OatCompilationUnit m_unit(cu->class_loader, cu->class_linker,
TDYa127dc5daa02013-01-09 21:31:37 +0800[diff] [blame]2269 *cu->dex_file, cu->code_item,
2270 cu->class_def_idx, cu->method_idx,
2271 cu->access_flags);
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2272 // TODO: add a flag so we don't counts the stats for this twice
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2273 uint32_t dex_method_idx = mir->dalvikInsn.vB;
2274 int vtable_idx;
2275 uintptr_t direct_code;
2276 uintptr_t direct_method;
2277 bool fast_path =
2278 cu->compiler->ComputeInvokeInfo(dex_method_idx, &m_unit, type,
2279 vtable_idx, direct_code,
2280 direct_method) &&
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2281 !SLOW_INVOKE_PATH;
2282 return (((type == kDirect) || (type == kStatic)) &&
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2283 fast_path && ((direct_code == 0) || (direct_method == 0)));
buzbee9c044ce2012-03-18 13:24:07 -0700[diff] [blame]2284}
2285
2286/*
buzbee239c4e72012-03-16 08:42:29 -0700[diff] [blame]2287 * Count uses, weighting by loop nesting depth. This code only
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2288 * counts explicitly used s_regs. A later phase will add implicit
buzbee239c4e72012-03-16 08:42:29 -0700[diff] [blame]2289 * counts for things such as Method*, null-checked references, etc.
2290 */
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2291static bool CountUses(struct CompilationUnit* cu, struct BasicBlock* bb)
buzbee239c4e72012-03-16 08:42:29 -0700[diff] [blame]2292{
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2293 if (bb->block_type != kDalvikByteCode) {
buzbee239c4e72012-03-16 08:42:29 -0700[diff] [blame]2294 return false;
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2295 }
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2296 for (MIR* mir = bb->first_mir_insn; (mir != NULL); mir = mir->next) {
2297 if (mir->ssa_rep == NULL) {
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2298 continue;
2299 }
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2300 uint32_t weight = std::min(16U, static_cast<uint32_t>(bb->nesting_depth));
2301 for (int i = 0; i < mir->ssa_rep->num_uses; i++) {
2302 int s_reg = mir->ssa_rep->uses[i];
2303 DCHECK_LT(s_reg, static_cast<int>(cu->use_counts.num_used));
2304 cu->raw_use_counts.elem_list[s_reg]++;
2305 cu->use_counts.elem_list[s_reg] += (1 << weight);
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2306 }
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2307 if (!(cu->disable_opt & (1 << kPromoteCompilerTemps))) {
2308 int df_attributes = oat_data_flow_attributes[mir->dalvikInsn.opcode];
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2309 // Implicit use of Method* ? */
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2310 if (df_attributes & DF_UMS) {
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2311 /*
2312 * Some invokes will not use Method* - need to perform test similar
buzbee52a77fc2012-11-20 19:50:46 -0800[diff] [blame]2313 * to that found in GenInvoke() to decide whether to count refs
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2314 * for Method* on invoke-class opcodes.
buzbee52a77fc2012-11-20 19:50:46 -0800[diff] [blame]2315 * TODO: refactor for common test here, save results for GenInvoke
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2316 */
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2317 int uses_method_star = true;
2318 if ((df_attributes & (DF_FORMAT_35C | DF_FORMAT_3RC)) &&
2319 !(df_attributes & DF_NON_NULL_RET)) {
2320 uses_method_star &= InvokeUsesMethodStar(cu, mir);
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2321 }
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2322 if (uses_method_star) {
2323 cu->raw_use_counts.elem_list[cu->method_sreg]++;
2324 cu->use_counts.elem_list[cu->method_sreg] += (1 << weight);
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2325 }
2326 }
2327 }
2328 }
2329 return false;
buzbee239c4e72012-03-16 08:42:29 -0700[diff] [blame]2330}
2331
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2332void MethodUseCount(CompilationUnit *cu)
buzbee239c4e72012-03-16 08:42:29 -0700[diff] [blame]2333{
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2334 CompilerInitGrowableList(cu, &cu->use_counts, cu->num_ssa_regs + 32, kListMisc);
2335 CompilerInitGrowableList(cu, &cu->raw_use_counts, cu->num_ssa_regs + 32, kListMisc);
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2336 // Initialize list
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2337 for (int i = 0; i < cu->num_ssa_regs; i++) {
2338 InsertGrowableList(cu, &cu->use_counts, 0);
2339 InsertGrowableList(cu, &cu->raw_use_counts, 0);
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2340 }
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2341 if (cu->disable_opt & (1 << kPromoteRegs)) {
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2342 return;
2343 }
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2344 DataFlowAnalysisDispatcher(cu, CountUses,
2345 kAllNodes, false /* is_iterative */);
buzbee239c4e72012-03-16 08:42:29 -0700[diff] [blame]2346}
2347
Elliott Hughes11d1b0c2012-01-23 16:57:47 -0800[diff] [blame]2348} // namespace art