blob: 0167891b34a2038b1802221d519db70b23afa0f6 [file] [log] [blame]
Anton Kirilov5ec62182016-10-13 20:16:02 +01001/*
2 * Copyright (C) 2016 The Android Open Source Project
3 *
4 * Licensed under the Apache License, Version 2.0 (the "License");
5 * you may not use this file except in compliance with the License.
6 * You may obtain a copy of the License at
7 *
8 * http://www.apache.org/licenses/LICENSE-2.0
9 *
10 * Unless required by applicable law or agreed to in writing, software
11 * distributed under the License is distributed on an "AS IS" BASIS,
12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
13 * See the License for the specific language governing permissions and
14 * limitations under the License.
15 */
16
17#include "intrinsics_arm_vixl.h"
18
19#include "arch/arm/instruction_set_features_arm.h"
20#include "code_generator_arm_vixl.h"
21#include "common_arm.h"
22#include "lock_word.h"
23#include "mirror/array-inl.h"
24
25#include "aarch32/constants-aarch32.h"
26
27namespace art {
28namespace arm {
29
30#define __ assembler->GetVIXLAssembler()->
31
32using helpers::DRegisterFrom;
33using helpers::HighRegisterFrom;
34using helpers::InputDRegisterAt;
35using helpers::InputRegisterAt;
36using helpers::InputSRegisterAt;
37using helpers::InputVRegisterAt;
38using helpers::Int32ConstantFrom;
39using helpers::LocationFrom;
40using helpers::LowRegisterFrom;
41using helpers::LowSRegisterFrom;
42using helpers::OutputDRegister;
xueliang.zhongc032e742016-03-28 16:44:32 +010043using helpers::OutputSRegister;
Anton Kirilov5ec62182016-10-13 20:16:02 +010044using helpers::OutputRegister;
45using helpers::OutputVRegister;
46using helpers::RegisterFrom;
47using helpers::SRegisterFrom;
xueliang.zhongc032e742016-03-28 16:44:32 +010048using helpers::DRegisterFromS;
Anton Kirilov5ec62182016-10-13 20:16:02 +010049
50using namespace vixl::aarch32; // NOLINT(build/namespaces)
51
Artem Serov0fb37192016-12-06 18:13:40 +000052using vixl::ExactAssemblyScope;
53using vixl::CodeBufferCheckScope;
54
Anton Kirilov5ec62182016-10-13 20:16:02 +010055ArmVIXLAssembler* IntrinsicCodeGeneratorARMVIXL::GetAssembler() {
56 return codegen_->GetAssembler();
57}
58
59ArenaAllocator* IntrinsicCodeGeneratorARMVIXL::GetAllocator() {
60 return codegen_->GetGraph()->GetArena();
61}
62
63// Default slow-path for fallback (calling the managed code to handle the intrinsic) in an
64// intrinsified call. This will copy the arguments into the positions for a regular call.
65//
66// Note: The actual parameters are required to be in the locations given by the invoke's location
67// summary. If an intrinsic modifies those locations before a slowpath call, they must be
68// restored!
69//
70// Note: If an invoke wasn't sharpened, we will put down an invoke-virtual here. That's potentially
71// sub-optimal (compared to a direct pointer call), but this is a slow-path.
72
73class IntrinsicSlowPathARMVIXL : public SlowPathCodeARMVIXL {
74 public:
75 explicit IntrinsicSlowPathARMVIXL(HInvoke* invoke)
76 : SlowPathCodeARMVIXL(invoke), invoke_(invoke) {}
77
78 Location MoveArguments(CodeGenerator* codegen) {
Artem Serovd4cc5b22016-11-04 11:19:09 +000079 InvokeDexCallingConventionVisitorARMVIXL calling_convention_visitor;
Anton Kirilov5ec62182016-10-13 20:16:02 +010080 IntrinsicVisitor::MoveArguments(invoke_, codegen, &calling_convention_visitor);
81 return calling_convention_visitor.GetMethodLocation();
82 }
83
84 void EmitNativeCode(CodeGenerator* codegen) OVERRIDE {
85 ArmVIXLAssembler* assembler = down_cast<ArmVIXLAssembler*>(codegen->GetAssembler());
86 __ Bind(GetEntryLabel());
87
88 SaveLiveRegisters(codegen, invoke_->GetLocations());
89
90 Location method_loc = MoveArguments(codegen);
91
92 if (invoke_->IsInvokeStaticOrDirect()) {
93 codegen->GenerateStaticOrDirectCall(invoke_->AsInvokeStaticOrDirect(), method_loc);
94 } else {
95 codegen->GenerateVirtualCall(invoke_->AsInvokeVirtual(), method_loc);
96 }
97 codegen->RecordPcInfo(invoke_, invoke_->GetDexPc(), this);
98
99 // Copy the result back to the expected output.
100 Location out = invoke_->GetLocations()->Out();
101 if (out.IsValid()) {
102 DCHECK(out.IsRegister()); // TODO: Replace this when we support output in memory.
103 DCHECK(!invoke_->GetLocations()->GetLiveRegisters()->ContainsCoreRegister(out.reg()));
104 codegen->MoveFromReturnRegister(out, invoke_->GetType());
105 }
106
107 RestoreLiveRegisters(codegen, invoke_->GetLocations());
108 __ B(GetExitLabel());
109 }
110
111 const char* GetDescription() const OVERRIDE { return "IntrinsicSlowPath"; }
112
113 private:
114 // The instruction where this slow path is happening.
115 HInvoke* const invoke_;
116
117 DISALLOW_COPY_AND_ASSIGN(IntrinsicSlowPathARMVIXL);
118};
119
Roland Levillain9cc0ea82017-03-16 11:25:59 +0000120// Compute base address for the System.arraycopy intrinsic in `base`.
121static void GenSystemArrayCopyBaseAddress(ArmVIXLAssembler* assembler,
122 Primitive::Type type,
123 const vixl32::Register& array,
124 const Location& pos,
125 const vixl32::Register& base) {
126 // This routine is only used by the SystemArrayCopy intrinsic at the
127 // moment. We can allow Primitive::kPrimNot as `type` to implement
128 // the SystemArrayCopyChar intrinsic.
129 DCHECK_EQ(type, Primitive::kPrimNot);
130 const int32_t element_size = Primitive::ComponentSize(type);
131 const uint32_t element_size_shift = Primitive::ComponentSizeShift(type);
132 const uint32_t data_offset = mirror::Array::DataOffset(element_size).Uint32Value();
133
134 if (pos.IsConstant()) {
135 int32_t constant = Int32ConstantFrom(pos);
136 __ Add(base, array, element_size * constant + data_offset);
137 } else {
138 __ Add(base, array, Operand(RegisterFrom(pos), vixl32::LSL, element_size_shift));
139 __ Add(base, base, data_offset);
140 }
141}
142
143// Compute end address for the System.arraycopy intrinsic in `end`.
144static void GenSystemArrayCopyEndAddress(ArmVIXLAssembler* assembler,
145 Primitive::Type type,
146 const Location& copy_length,
147 const vixl32::Register& base,
148 const vixl32::Register& end) {
149 // This routine is only used by the SystemArrayCopy intrinsic at the
150 // moment. We can allow Primitive::kPrimNot as `type` to implement
151 // the SystemArrayCopyChar intrinsic.
152 DCHECK_EQ(type, Primitive::kPrimNot);
153 const int32_t element_size = Primitive::ComponentSize(type);
154 const uint32_t element_size_shift = Primitive::ComponentSizeShift(type);
155
156 if (copy_length.IsConstant()) {
157 int32_t constant = Int32ConstantFrom(copy_length);
158 __ Add(end, base, element_size * constant);
159 } else {
160 __ Add(end, base, Operand(RegisterFrom(copy_length), vixl32::LSL, element_size_shift));
161 }
162}
163
Anton Kirilov5ec62182016-10-13 20:16:02 +0100164// Slow path implementing the SystemArrayCopy intrinsic copy loop with read barriers.
165class ReadBarrierSystemArrayCopySlowPathARMVIXL : public SlowPathCodeARMVIXL {
166 public:
167 explicit ReadBarrierSystemArrayCopySlowPathARMVIXL(HInstruction* instruction)
168 : SlowPathCodeARMVIXL(instruction) {
169 DCHECK(kEmitCompilerReadBarrier);
170 DCHECK(kUseBakerReadBarrier);
171 }
172
173 void EmitNativeCode(CodeGenerator* codegen) OVERRIDE {
174 CodeGeneratorARMVIXL* arm_codegen = down_cast<CodeGeneratorARMVIXL*>(codegen);
175 ArmVIXLAssembler* assembler = arm_codegen->GetAssembler();
176 LocationSummary* locations = instruction_->GetLocations();
177 DCHECK(locations->CanCall());
178 DCHECK(instruction_->IsInvokeStaticOrDirect())
179 << "Unexpected instruction in read barrier arraycopy slow path: "
180 << instruction_->DebugName();
181 DCHECK(instruction_->GetLocations()->Intrinsified());
182 DCHECK_EQ(instruction_->AsInvoke()->GetIntrinsic(), Intrinsics::kSystemArrayCopy);
183
Roland Levillain9cc0ea82017-03-16 11:25:59 +0000184 Primitive::Type type = Primitive::kPrimNot;
185 const int32_t element_size = Primitive::ComponentSize(type);
Anton Kirilov5ec62182016-10-13 20:16:02 +0100186
187 vixl32::Register dest = InputRegisterAt(instruction_, 2);
188 Location dest_pos = locations->InAt(3);
189 vixl32::Register src_curr_addr = RegisterFrom(locations->GetTemp(0));
190 vixl32::Register dst_curr_addr = RegisterFrom(locations->GetTemp(1));
191 vixl32::Register src_stop_addr = RegisterFrom(locations->GetTemp(2));
192 vixl32::Register tmp = RegisterFrom(locations->GetTemp(3));
193
194 __ Bind(GetEntryLabel());
195 // Compute the base destination address in `dst_curr_addr`.
Roland Levillain9cc0ea82017-03-16 11:25:59 +0000196 GenSystemArrayCopyBaseAddress(assembler, type, dest, dest_pos, dst_curr_addr);
Anton Kirilov5ec62182016-10-13 20:16:02 +0100197
198 vixl32::Label loop;
199 __ Bind(&loop);
200 __ Ldr(tmp, MemOperand(src_curr_addr, element_size, PostIndex));
201 assembler->MaybeUnpoisonHeapReference(tmp);
202 // TODO: Inline the mark bit check before calling the runtime?
203 // tmp = ReadBarrier::Mark(tmp);
204 // No need to save live registers; it's taken care of by the
205 // entrypoint. Also, there is no need to update the stack mask,
206 // as this runtime call will not trigger a garbage collection.
207 // (See ReadBarrierMarkSlowPathARM::EmitNativeCode for more
208 // explanations.)
209 DCHECK(!tmp.IsSP());
210 DCHECK(!tmp.IsLR());
211 DCHECK(!tmp.IsPC());
212 // IP is used internally by the ReadBarrierMarkRegX entry point
213 // as a temporary (and not preserved). It thus cannot be used by
214 // any live register in this slow path.
215 DCHECK(!src_curr_addr.Is(ip));
216 DCHECK(!dst_curr_addr.Is(ip));
217 DCHECK(!src_stop_addr.Is(ip));
218 DCHECK(!tmp.Is(ip));
219 DCHECK(tmp.IsRegister()) << tmp;
Roland Levillain9cc0ea82017-03-16 11:25:59 +0000220 // TODO: Load the entrypoint once before the loop, instead of
221 // loading it at every iteration.
Anton Kirilov5ec62182016-10-13 20:16:02 +0100222 int32_t entry_point_offset =
223 CodeGenerator::GetReadBarrierMarkEntryPointsOffset<kArmPointerSize>(tmp.GetCode());
224 // This runtime call does not require a stack map.
225 arm_codegen->InvokeRuntimeWithoutRecordingPcInfo(entry_point_offset, instruction_, this);
226 assembler->MaybePoisonHeapReference(tmp);
227 __ Str(tmp, MemOperand(dst_curr_addr, element_size, PostIndex));
228 __ Cmp(src_curr_addr, src_stop_addr);
Artem Serov517d9f62016-12-12 15:51:15 +0000229 __ B(ne, &loop, /* far_target */ false);
Anton Kirilov5ec62182016-10-13 20:16:02 +0100230 __ B(GetExitLabel());
231 }
232
233 const char* GetDescription() const OVERRIDE {
234 return "ReadBarrierSystemArrayCopySlowPathARMVIXL";
235 }
236
237 private:
238 DISALLOW_COPY_AND_ASSIGN(ReadBarrierSystemArrayCopySlowPathARMVIXL);
239};
240
241IntrinsicLocationsBuilderARMVIXL::IntrinsicLocationsBuilderARMVIXL(CodeGeneratorARMVIXL* codegen)
242 : arena_(codegen->GetGraph()->GetArena()),
Nicolas Geoffray331605a2017-03-01 11:01:41 +0000243 codegen_(codegen),
Anton Kirilov5ec62182016-10-13 20:16:02 +0100244 assembler_(codegen->GetAssembler()),
245 features_(codegen->GetInstructionSetFeatures()) {}
246
247bool IntrinsicLocationsBuilderARMVIXL::TryDispatch(HInvoke* invoke) {
248 Dispatch(invoke);
249 LocationSummary* res = invoke->GetLocations();
250 if (res == nullptr) {
251 return false;
252 }
253 return res->Intrinsified();
254}
255
256static void CreateFPToIntLocations(ArenaAllocator* arena, HInvoke* invoke) {
257 LocationSummary* locations = new (arena) LocationSummary(invoke,
258 LocationSummary::kNoCall,
259 kIntrinsified);
260 locations->SetInAt(0, Location::RequiresFpuRegister());
261 locations->SetOut(Location::RequiresRegister());
262}
263
264static void CreateIntToFPLocations(ArenaAllocator* arena, HInvoke* invoke) {
265 LocationSummary* locations = new (arena) LocationSummary(invoke,
266 LocationSummary::kNoCall,
267 kIntrinsified);
268 locations->SetInAt(0, Location::RequiresRegister());
269 locations->SetOut(Location::RequiresFpuRegister());
270}
271
272static void MoveFPToInt(LocationSummary* locations, bool is64bit, ArmVIXLAssembler* assembler) {
273 Location input = locations->InAt(0);
274 Location output = locations->Out();
275 if (is64bit) {
276 __ Vmov(LowRegisterFrom(output), HighRegisterFrom(output), DRegisterFrom(input));
277 } else {
278 __ Vmov(RegisterFrom(output), SRegisterFrom(input));
279 }
280}
281
282static void MoveIntToFP(LocationSummary* locations, bool is64bit, ArmVIXLAssembler* assembler) {
283 Location input = locations->InAt(0);
284 Location output = locations->Out();
285 if (is64bit) {
286 __ Vmov(DRegisterFrom(output), LowRegisterFrom(input), HighRegisterFrom(input));
287 } else {
288 __ Vmov(SRegisterFrom(output), RegisterFrom(input));
289 }
290}
291
292void IntrinsicLocationsBuilderARMVIXL::VisitDoubleDoubleToRawLongBits(HInvoke* invoke) {
293 CreateFPToIntLocations(arena_, invoke);
294}
295void IntrinsicLocationsBuilderARMVIXL::VisitDoubleLongBitsToDouble(HInvoke* invoke) {
296 CreateIntToFPLocations(arena_, invoke);
297}
298
299void IntrinsicCodeGeneratorARMVIXL::VisitDoubleDoubleToRawLongBits(HInvoke* invoke) {
300 MoveFPToInt(invoke->GetLocations(), /* is64bit */ true, GetAssembler());
301}
302void IntrinsicCodeGeneratorARMVIXL::VisitDoubleLongBitsToDouble(HInvoke* invoke) {
303 MoveIntToFP(invoke->GetLocations(), /* is64bit */ true, GetAssembler());
304}
305
306void IntrinsicLocationsBuilderARMVIXL::VisitFloatFloatToRawIntBits(HInvoke* invoke) {
307 CreateFPToIntLocations(arena_, invoke);
308}
309void IntrinsicLocationsBuilderARMVIXL::VisitFloatIntBitsToFloat(HInvoke* invoke) {
310 CreateIntToFPLocations(arena_, invoke);
311}
312
313void IntrinsicCodeGeneratorARMVIXL::VisitFloatFloatToRawIntBits(HInvoke* invoke) {
314 MoveFPToInt(invoke->GetLocations(), /* is64bit */ false, GetAssembler());
315}
316void IntrinsicCodeGeneratorARMVIXL::VisitFloatIntBitsToFloat(HInvoke* invoke) {
317 MoveIntToFP(invoke->GetLocations(), /* is64bit */ false, GetAssembler());
318}
319
320static void CreateIntToIntLocations(ArenaAllocator* arena, HInvoke* invoke) {
321 LocationSummary* locations = new (arena) LocationSummary(invoke,
322 LocationSummary::kNoCall,
323 kIntrinsified);
324 locations->SetInAt(0, Location::RequiresRegister());
325 locations->SetOut(Location::RequiresRegister(), Location::kNoOutputOverlap);
326}
327
328static void CreateFPToFPLocations(ArenaAllocator* arena, HInvoke* invoke) {
329 LocationSummary* locations = new (arena) LocationSummary(invoke,
330 LocationSummary::kNoCall,
331 kIntrinsified);
332 locations->SetInAt(0, Location::RequiresFpuRegister());
333 locations->SetOut(Location::RequiresFpuRegister(), Location::kNoOutputOverlap);
334}
335
336static void GenNumberOfLeadingZeros(LocationSummary* locations,
337 Primitive::Type type,
338 ArmVIXLAssembler* assembler) {
339 Location in = locations->InAt(0);
340 vixl32::Register out = RegisterFrom(locations->Out());
341
342 DCHECK((type == Primitive::kPrimInt) || (type == Primitive::kPrimLong));
343
344 if (type == Primitive::kPrimLong) {
345 vixl32::Register in_reg_lo = LowRegisterFrom(in);
346 vixl32::Register in_reg_hi = HighRegisterFrom(in);
347 vixl32::Label end;
348 __ Clz(out, in_reg_hi);
xueliang.zhongf51bc622016-11-04 09:23:32 +0000349 __ CompareAndBranchIfNonZero(in_reg_hi, &end, /* far_target */ false);
Anton Kirilov5ec62182016-10-13 20:16:02 +0100350 __ Clz(out, in_reg_lo);
351 __ Add(out, out, 32);
352 __ Bind(&end);
353 } else {
354 __ Clz(out, RegisterFrom(in));
355 }
356}
357
358void IntrinsicLocationsBuilderARMVIXL::VisitIntegerNumberOfLeadingZeros(HInvoke* invoke) {
359 CreateIntToIntLocations(arena_, invoke);
360}
361
362void IntrinsicCodeGeneratorARMVIXL::VisitIntegerNumberOfLeadingZeros(HInvoke* invoke) {
363 GenNumberOfLeadingZeros(invoke->GetLocations(), Primitive::kPrimInt, GetAssembler());
364}
365
366void IntrinsicLocationsBuilderARMVIXL::VisitLongNumberOfLeadingZeros(HInvoke* invoke) {
367 LocationSummary* locations = new (arena_) LocationSummary(invoke,
368 LocationSummary::kNoCall,
369 kIntrinsified);
370 locations->SetInAt(0, Location::RequiresRegister());
371 locations->SetOut(Location::RequiresRegister(), Location::kOutputOverlap);
372}
373
374void IntrinsicCodeGeneratorARMVIXL::VisitLongNumberOfLeadingZeros(HInvoke* invoke) {
375 GenNumberOfLeadingZeros(invoke->GetLocations(), Primitive::kPrimLong, GetAssembler());
376}
377
378static void GenNumberOfTrailingZeros(LocationSummary* locations,
379 Primitive::Type type,
380 ArmVIXLAssembler* assembler) {
381 DCHECK((type == Primitive::kPrimInt) || (type == Primitive::kPrimLong));
382
383 vixl32::Register out = RegisterFrom(locations->Out());
384
385 if (type == Primitive::kPrimLong) {
386 vixl32::Register in_reg_lo = LowRegisterFrom(locations->InAt(0));
387 vixl32::Register in_reg_hi = HighRegisterFrom(locations->InAt(0));
388 vixl32::Label end;
389 __ Rbit(out, in_reg_lo);
390 __ Clz(out, out);
xueliang.zhongf51bc622016-11-04 09:23:32 +0000391 __ CompareAndBranchIfNonZero(in_reg_lo, &end, /* far_target */ false);
Anton Kirilov5ec62182016-10-13 20:16:02 +0100392 __ Rbit(out, in_reg_hi);
393 __ Clz(out, out);
394 __ Add(out, out, 32);
395 __ Bind(&end);
396 } else {
397 vixl32::Register in = RegisterFrom(locations->InAt(0));
398 __ Rbit(out, in);
399 __ Clz(out, out);
400 }
401}
402
403void IntrinsicLocationsBuilderARMVIXL::VisitIntegerNumberOfTrailingZeros(HInvoke* invoke) {
404 LocationSummary* locations = new (arena_) LocationSummary(invoke,
405 LocationSummary::kNoCall,
406 kIntrinsified);
407 locations->SetInAt(0, Location::RequiresRegister());
408 locations->SetOut(Location::RequiresRegister(), Location::kNoOutputOverlap);
409}
410
411void IntrinsicCodeGeneratorARMVIXL::VisitIntegerNumberOfTrailingZeros(HInvoke* invoke) {
412 GenNumberOfTrailingZeros(invoke->GetLocations(), Primitive::kPrimInt, GetAssembler());
413}
414
415void IntrinsicLocationsBuilderARMVIXL::VisitLongNumberOfTrailingZeros(HInvoke* invoke) {
416 LocationSummary* locations = new (arena_) LocationSummary(invoke,
417 LocationSummary::kNoCall,
418 kIntrinsified);
419 locations->SetInAt(0, Location::RequiresRegister());
420 locations->SetOut(Location::RequiresRegister(), Location::kOutputOverlap);
421}
422
423void IntrinsicCodeGeneratorARMVIXL::VisitLongNumberOfTrailingZeros(HInvoke* invoke) {
424 GenNumberOfTrailingZeros(invoke->GetLocations(), Primitive::kPrimLong, GetAssembler());
425}
426
427static void MathAbsFP(HInvoke* invoke, ArmVIXLAssembler* assembler) {
428 __ Vabs(OutputVRegister(invoke), InputVRegisterAt(invoke, 0));
429}
430
431void IntrinsicLocationsBuilderARMVIXL::VisitMathAbsDouble(HInvoke* invoke) {
432 CreateFPToFPLocations(arena_, invoke);
433}
434
435void IntrinsicCodeGeneratorARMVIXL::VisitMathAbsDouble(HInvoke* invoke) {
436 MathAbsFP(invoke, GetAssembler());
437}
438
439void IntrinsicLocationsBuilderARMVIXL::VisitMathAbsFloat(HInvoke* invoke) {
440 CreateFPToFPLocations(arena_, invoke);
441}
442
443void IntrinsicCodeGeneratorARMVIXL::VisitMathAbsFloat(HInvoke* invoke) {
444 MathAbsFP(invoke, GetAssembler());
445}
446
447static void CreateIntToIntPlusTemp(ArenaAllocator* arena, HInvoke* invoke) {
448 LocationSummary* locations = new (arena) LocationSummary(invoke,
449 LocationSummary::kNoCall,
450 kIntrinsified);
451 locations->SetInAt(0, Location::RequiresRegister());
452 locations->SetOut(Location::RequiresRegister(), Location::kNoOutputOverlap);
453
454 locations->AddTemp(Location::RequiresRegister());
455}
456
457static void GenAbsInteger(LocationSummary* locations,
458 bool is64bit,
459 ArmVIXLAssembler* assembler) {
460 Location in = locations->InAt(0);
461 Location output = locations->Out();
462
463 vixl32::Register mask = RegisterFrom(locations->GetTemp(0));
464
465 if (is64bit) {
466 vixl32::Register in_reg_lo = LowRegisterFrom(in);
467 vixl32::Register in_reg_hi = HighRegisterFrom(in);
468 vixl32::Register out_reg_lo = LowRegisterFrom(output);
469 vixl32::Register out_reg_hi = HighRegisterFrom(output);
470
471 DCHECK(!out_reg_lo.Is(in_reg_hi)) << "Diagonal overlap unexpected.";
472
473 __ Asr(mask, in_reg_hi, 31);
474 __ Adds(out_reg_lo, in_reg_lo, mask);
475 __ Adc(out_reg_hi, in_reg_hi, mask);
476 __ Eor(out_reg_lo, mask, out_reg_lo);
477 __ Eor(out_reg_hi, mask, out_reg_hi);
478 } else {
479 vixl32::Register in_reg = RegisterFrom(in);
480 vixl32::Register out_reg = RegisterFrom(output);
481
482 __ Asr(mask, in_reg, 31);
483 __ Add(out_reg, in_reg, mask);
484 __ Eor(out_reg, mask, out_reg);
485 }
486}
487
488void IntrinsicLocationsBuilderARMVIXL::VisitMathAbsInt(HInvoke* invoke) {
489 CreateIntToIntPlusTemp(arena_, invoke);
490}
491
492void IntrinsicCodeGeneratorARMVIXL::VisitMathAbsInt(HInvoke* invoke) {
493 GenAbsInteger(invoke->GetLocations(), /* is64bit */ false, GetAssembler());
494}
495
496
497void IntrinsicLocationsBuilderARMVIXL::VisitMathAbsLong(HInvoke* invoke) {
498 CreateIntToIntPlusTemp(arena_, invoke);
499}
500
501void IntrinsicCodeGeneratorARMVIXL::VisitMathAbsLong(HInvoke* invoke) {
502 GenAbsInteger(invoke->GetLocations(), /* is64bit */ true, GetAssembler());
503}
504
xueliang.zhongc032e742016-03-28 16:44:32 +0100505static void GenMinMaxFloat(HInvoke* invoke, bool is_min, ArmVIXLAssembler* assembler) {
506 Location op1_loc = invoke->GetLocations()->InAt(0);
507 Location op2_loc = invoke->GetLocations()->InAt(1);
508 Location out_loc = invoke->GetLocations()->Out();
509
510 // Optimization: don't generate any code if inputs are the same.
511 if (op1_loc.Equals(op2_loc)) {
512 DCHECK(out_loc.Equals(op1_loc)); // out_loc is set as SameAsFirstInput() in location builder.
513 return;
514 }
515
516 vixl32::SRegister op1 = SRegisterFrom(op1_loc);
517 vixl32::SRegister op2 = SRegisterFrom(op2_loc);
518 vixl32::SRegister out = OutputSRegister(invoke);
519 UseScratchRegisterScope temps(assembler->GetVIXLAssembler());
520 const vixl32::Register temp1 = temps.Acquire();
521 vixl32::Register temp2 = RegisterFrom(invoke->GetLocations()->GetTemp(0));
522 vixl32::Label nan, done;
523
524 DCHECK(op1.Is(out));
525
526 __ Vcmp(op1, op2);
527 __ Vmrs(RegisterOrAPSR_nzcv(kPcCode), FPSCR);
528 __ B(vs, &nan, /* far_target */ false); // if un-ordered, go to NaN handling.
529
530 // op1 <> op2
531 vixl32::ConditionType cond = is_min ? gt : lt;
532 {
533 ExactAssemblyScope it_scope(assembler->GetVIXLAssembler(),
534 2 * kMaxInstructionSizeInBytes,
535 CodeBufferCheckScope::kMaximumSize);
536 __ it(cond);
537 __ vmov(cond, F32, out, op2);
538 }
539 __ B(ne, &done, /* far_target */ false); // for <>(not equal), we've done min/max calculation.
540
541 // handle op1 == op2, max(+0.0,-0.0), min(+0.0,-0.0).
542 __ Vmov(temp1, op1);
543 __ Vmov(temp2, op2);
544 if (is_min) {
545 __ Orr(temp1, temp1, temp2);
546 } else {
547 __ And(temp1, temp1, temp2);
548 }
549 __ Vmov(out, temp1);
550 __ B(&done);
551
552 // handle NaN input.
553 __ Bind(&nan);
554 __ Movt(temp1, High16Bits(kNanFloat)); // 0x7FC0xxxx is a NaN.
555 __ Vmov(out, temp1);
556
557 __ Bind(&done);
558}
559
560static void CreateFPFPToFPLocations(ArenaAllocator* arena, HInvoke* invoke) {
561 LocationSummary* locations = new (arena) LocationSummary(invoke,
562 LocationSummary::kNoCall,
563 kIntrinsified);
564 locations->SetInAt(0, Location::RequiresFpuRegister());
565 locations->SetInAt(1, Location::RequiresFpuRegister());
566 locations->SetOut(Location::SameAsFirstInput());
567}
568
569void IntrinsicLocationsBuilderARMVIXL::VisitMathMinFloatFloat(HInvoke* invoke) {
570 CreateFPFPToFPLocations(arena_, invoke);
571 invoke->GetLocations()->AddTemp(Location::RequiresRegister());
572}
573
574void IntrinsicCodeGeneratorARMVIXL::VisitMathMinFloatFloat(HInvoke* invoke) {
575 GenMinMaxFloat(invoke, /* is_min */ true, GetAssembler());
576}
577
578void IntrinsicLocationsBuilderARMVIXL::VisitMathMaxFloatFloat(HInvoke* invoke) {
579 CreateFPFPToFPLocations(arena_, invoke);
580 invoke->GetLocations()->AddTemp(Location::RequiresRegister());
581}
582
583void IntrinsicCodeGeneratorARMVIXL::VisitMathMaxFloatFloat(HInvoke* invoke) {
584 GenMinMaxFloat(invoke, /* is_min */ false, GetAssembler());
585}
586
587static void GenMinMaxDouble(HInvoke* invoke, bool is_min, ArmVIXLAssembler* assembler) {
588 Location op1_loc = invoke->GetLocations()->InAt(0);
589 Location op2_loc = invoke->GetLocations()->InAt(1);
590 Location out_loc = invoke->GetLocations()->Out();
591
592 // Optimization: don't generate any code if inputs are the same.
593 if (op1_loc.Equals(op2_loc)) {
594 DCHECK(out_loc.Equals(op1_loc)); // out_loc is set as SameAsFirstInput() in.
595 return;
596 }
597
598 vixl32::DRegister op1 = DRegisterFrom(op1_loc);
599 vixl32::DRegister op2 = DRegisterFrom(op2_loc);
600 vixl32::DRegister out = OutputDRegister(invoke);
601 vixl32::Label handle_nan_eq, done;
602
603 DCHECK(op1.Is(out));
604
605 __ Vcmp(op1, op2);
606 __ Vmrs(RegisterOrAPSR_nzcv(kPcCode), FPSCR);
607 __ B(vs, &handle_nan_eq, /* far_target */ false); // if un-ordered, go to NaN handling.
608
609 // op1 <> op2
610 vixl32::ConditionType cond = is_min ? gt : lt;
611 {
612 ExactAssemblyScope it_scope(assembler->GetVIXLAssembler(),
613 2 * kMaxInstructionSizeInBytes,
614 CodeBufferCheckScope::kMaximumSize);
615 __ it(cond);
616 __ vmov(cond, F64, out, op2);
617 }
618 __ B(ne, &done, /* far_target */ false); // for <>(not equal), we've done min/max calculation.
619
620 // handle op1 == op2, max(+0.0,-0.0).
621 if (!is_min) {
622 __ Vand(F64, out, op1, op2);
623 __ B(&done);
624 }
625
626 // handle op1 == op2, min(+0.0,-0.0), NaN input.
627 __ Bind(&handle_nan_eq);
628 __ Vorr(F64, out, op1, op2); // assemble op1/-0.0/NaN.
629
630 __ Bind(&done);
631}
632
633void IntrinsicLocationsBuilderARMVIXL::VisitMathMinDoubleDouble(HInvoke* invoke) {
634 CreateFPFPToFPLocations(arena_, invoke);
635}
636
637void IntrinsicCodeGeneratorARMVIXL::VisitMathMinDoubleDouble(HInvoke* invoke) {
638 GenMinMaxDouble(invoke, /* is_min */ true , GetAssembler());
639}
640
641void IntrinsicLocationsBuilderARMVIXL::VisitMathMaxDoubleDouble(HInvoke* invoke) {
642 CreateFPFPToFPLocations(arena_, invoke);
643}
644
645void IntrinsicCodeGeneratorARMVIXL::VisitMathMaxDoubleDouble(HInvoke* invoke) {
646 GenMinMaxDouble(invoke, /* is_min */ false, GetAssembler());
647}
648
649static void GenMinMaxLong(HInvoke* invoke, bool is_min, ArmVIXLAssembler* assembler) {
650 Location op1_loc = invoke->GetLocations()->InAt(0);
651 Location op2_loc = invoke->GetLocations()->InAt(1);
652 Location out_loc = invoke->GetLocations()->Out();
653
654 // Optimization: don't generate any code if inputs are the same.
655 if (op1_loc.Equals(op2_loc)) {
656 DCHECK(out_loc.Equals(op1_loc)); // out_loc is set as SameAsFirstInput() in location builder.
657 return;
658 }
659
660 vixl32::Register op1_lo = LowRegisterFrom(op1_loc);
661 vixl32::Register op1_hi = HighRegisterFrom(op1_loc);
662 vixl32::Register op2_lo = LowRegisterFrom(op2_loc);
663 vixl32::Register op2_hi = HighRegisterFrom(op2_loc);
664 vixl32::Register out_lo = LowRegisterFrom(out_loc);
665 vixl32::Register out_hi = HighRegisterFrom(out_loc);
666 UseScratchRegisterScope temps(assembler->GetVIXLAssembler());
667 const vixl32::Register temp = temps.Acquire();
668
669 DCHECK(op1_lo.Is(out_lo));
670 DCHECK(op1_hi.Is(out_hi));
671
672 // Compare op1 >= op2, or op1 < op2.
673 __ Cmp(out_lo, op2_lo);
674 __ Sbcs(temp, out_hi, op2_hi);
675
676 // Now GE/LT condition code is correct for the long comparison.
677 {
678 vixl32::ConditionType cond = is_min ? ge : lt;
679 ExactAssemblyScope it_scope(assembler->GetVIXLAssembler(),
680 3 * kMaxInstructionSizeInBytes,
681 CodeBufferCheckScope::kMaximumSize);
682 __ itt(cond);
683 __ mov(cond, out_lo, op2_lo);
684 __ mov(cond, out_hi, op2_hi);
685 }
686}
687
688static void CreateLongLongToLongLocations(ArenaAllocator* arena, HInvoke* invoke) {
689 LocationSummary* locations = new (arena) LocationSummary(invoke,
690 LocationSummary::kNoCall,
691 kIntrinsified);
692 locations->SetInAt(0, Location::RequiresRegister());
693 locations->SetInAt(1, Location::RequiresRegister());
694 locations->SetOut(Location::SameAsFirstInput());
695}
696
697void IntrinsicLocationsBuilderARMVIXL::VisitMathMinLongLong(HInvoke* invoke) {
698 CreateLongLongToLongLocations(arena_, invoke);
699}
700
701void IntrinsicCodeGeneratorARMVIXL::VisitMathMinLongLong(HInvoke* invoke) {
702 GenMinMaxLong(invoke, /* is_min */ true, GetAssembler());
703}
704
705void IntrinsicLocationsBuilderARMVIXL::VisitMathMaxLongLong(HInvoke* invoke) {
706 CreateLongLongToLongLocations(arena_, invoke);
707}
708
709void IntrinsicCodeGeneratorARMVIXL::VisitMathMaxLongLong(HInvoke* invoke) {
710 GenMinMaxLong(invoke, /* is_min */ false, GetAssembler());
711}
712
Anton Kirilov5ec62182016-10-13 20:16:02 +0100713static void GenMinMax(HInvoke* invoke, bool is_min, ArmVIXLAssembler* assembler) {
714 vixl32::Register op1 = InputRegisterAt(invoke, 0);
715 vixl32::Register op2 = InputRegisterAt(invoke, 1);
716 vixl32::Register out = OutputRegister(invoke);
717
718 __ Cmp(op1, op2);
719
720 {
Artem Serov0fb37192016-12-06 18:13:40 +0000721 ExactAssemblyScope aas(assembler->GetVIXLAssembler(),
722 3 * kMaxInstructionSizeInBytes,
723 CodeBufferCheckScope::kMaximumSize);
Anton Kirilov5ec62182016-10-13 20:16:02 +0100724
725 __ ite(is_min ? lt : gt);
726 __ mov(is_min ? lt : gt, out, op1);
727 __ mov(is_min ? ge : le, out, op2);
728 }
729}
730
731static void CreateIntIntToIntLocations(ArenaAllocator* arena, HInvoke* invoke) {
732 LocationSummary* locations = new (arena) LocationSummary(invoke,
733 LocationSummary::kNoCall,
734 kIntrinsified);
735 locations->SetInAt(0, Location::RequiresRegister());
736 locations->SetInAt(1, Location::RequiresRegister());
737 locations->SetOut(Location::RequiresRegister(), Location::kNoOutputOverlap);
738}
739
740void IntrinsicLocationsBuilderARMVIXL::VisitMathMinIntInt(HInvoke* invoke) {
741 CreateIntIntToIntLocations(arena_, invoke);
742}
743
744void IntrinsicCodeGeneratorARMVIXL::VisitMathMinIntInt(HInvoke* invoke) {
745 GenMinMax(invoke, /* is_min */ true, GetAssembler());
746}
747
748void IntrinsicLocationsBuilderARMVIXL::VisitMathMaxIntInt(HInvoke* invoke) {
749 CreateIntIntToIntLocations(arena_, invoke);
750}
751
752void IntrinsicCodeGeneratorARMVIXL::VisitMathMaxIntInt(HInvoke* invoke) {
753 GenMinMax(invoke, /* is_min */ false, GetAssembler());
754}
755
756void IntrinsicLocationsBuilderARMVIXL::VisitMathSqrt(HInvoke* invoke) {
757 CreateFPToFPLocations(arena_, invoke);
758}
759
760void IntrinsicCodeGeneratorARMVIXL::VisitMathSqrt(HInvoke* invoke) {
761 ArmVIXLAssembler* assembler = GetAssembler();
762 __ Vsqrt(OutputDRegister(invoke), InputDRegisterAt(invoke, 0));
763}
764
xueliang.zhong6099d5e2016-04-20 18:44:56 +0100765void IntrinsicLocationsBuilderARMVIXL::VisitMathRint(HInvoke* invoke) {
766 if (features_.HasARMv8AInstructions()) {
767 CreateFPToFPLocations(arena_, invoke);
768 }
769}
770
771void IntrinsicCodeGeneratorARMVIXL::VisitMathRint(HInvoke* invoke) {
772 DCHECK(codegen_->GetInstructionSetFeatures().HasARMv8AInstructions());
773 ArmVIXLAssembler* assembler = GetAssembler();
774 __ Vrintn(F64, F64, OutputDRegister(invoke), InputDRegisterAt(invoke, 0));
775}
776
Anton Kirilov5ec62182016-10-13 20:16:02 +0100777void IntrinsicLocationsBuilderARMVIXL::VisitMemoryPeekByte(HInvoke* invoke) {
778 CreateIntToIntLocations(arena_, invoke);
779}
780
781void IntrinsicCodeGeneratorARMVIXL::VisitMemoryPeekByte(HInvoke* invoke) {
782 ArmVIXLAssembler* assembler = GetAssembler();
783 // Ignore upper 4B of long address.
Scott Wakelingb77051e2016-11-21 19:46:00 +0000784 __ Ldrsb(OutputRegister(invoke), MemOperand(LowRegisterFrom(invoke->GetLocations()->InAt(0))));
Anton Kirilov5ec62182016-10-13 20:16:02 +0100785}
786
787void IntrinsicLocationsBuilderARMVIXL::VisitMemoryPeekIntNative(HInvoke* invoke) {
788 CreateIntToIntLocations(arena_, invoke);
789}
790
791void IntrinsicCodeGeneratorARMVIXL::VisitMemoryPeekIntNative(HInvoke* invoke) {
792 ArmVIXLAssembler* assembler = GetAssembler();
793 // Ignore upper 4B of long address.
Scott Wakelingb77051e2016-11-21 19:46:00 +0000794 __ Ldr(OutputRegister(invoke), MemOperand(LowRegisterFrom(invoke->GetLocations()->InAt(0))));
Anton Kirilov5ec62182016-10-13 20:16:02 +0100795}
796
797void IntrinsicLocationsBuilderARMVIXL::VisitMemoryPeekLongNative(HInvoke* invoke) {
798 CreateIntToIntLocations(arena_, invoke);
799}
800
801void IntrinsicCodeGeneratorARMVIXL::VisitMemoryPeekLongNative(HInvoke* invoke) {
802 ArmVIXLAssembler* assembler = GetAssembler();
803 // Ignore upper 4B of long address.
804 vixl32::Register addr = LowRegisterFrom(invoke->GetLocations()->InAt(0));
805 // Worst case: Control register bit SCTLR.A = 0. Then unaligned accesses throw a processor
806 // exception. So we can't use ldrd as addr may be unaligned.
807 vixl32::Register lo = LowRegisterFrom(invoke->GetLocations()->Out());
808 vixl32::Register hi = HighRegisterFrom(invoke->GetLocations()->Out());
809 if (addr.Is(lo)) {
810 __ Ldr(hi, MemOperand(addr, 4));
Scott Wakelingb77051e2016-11-21 19:46:00 +0000811 __ Ldr(lo, MemOperand(addr));
Anton Kirilov5ec62182016-10-13 20:16:02 +0100812 } else {
Scott Wakelingb77051e2016-11-21 19:46:00 +0000813 __ Ldr(lo, MemOperand(addr));
Anton Kirilov5ec62182016-10-13 20:16:02 +0100814 __ Ldr(hi, MemOperand(addr, 4));
815 }
816}
817
818void IntrinsicLocationsBuilderARMVIXL::VisitMemoryPeekShortNative(HInvoke* invoke) {
819 CreateIntToIntLocations(arena_, invoke);
820}
821
822void IntrinsicCodeGeneratorARMVIXL::VisitMemoryPeekShortNative(HInvoke* invoke) {
823 ArmVIXLAssembler* assembler = GetAssembler();
824 // Ignore upper 4B of long address.
Scott Wakelingb77051e2016-11-21 19:46:00 +0000825 __ Ldrsh(OutputRegister(invoke), MemOperand(LowRegisterFrom(invoke->GetLocations()->InAt(0))));
Anton Kirilov5ec62182016-10-13 20:16:02 +0100826}
827
828static void CreateIntIntToVoidLocations(ArenaAllocator* arena, HInvoke* invoke) {
829 LocationSummary* locations = new (arena) LocationSummary(invoke,
830 LocationSummary::kNoCall,
831 kIntrinsified);
832 locations->SetInAt(0, Location::RequiresRegister());
833 locations->SetInAt(1, Location::RequiresRegister());
834}
835
836void IntrinsicLocationsBuilderARMVIXL::VisitMemoryPokeByte(HInvoke* invoke) {
837 CreateIntIntToVoidLocations(arena_, invoke);
838}
839
840void IntrinsicCodeGeneratorARMVIXL::VisitMemoryPokeByte(HInvoke* invoke) {
841 ArmVIXLAssembler* assembler = GetAssembler();
Scott Wakelingb77051e2016-11-21 19:46:00 +0000842 __ Strb(InputRegisterAt(invoke, 1), MemOperand(LowRegisterFrom(invoke->GetLocations()->InAt(0))));
Anton Kirilov5ec62182016-10-13 20:16:02 +0100843}
844
845void IntrinsicLocationsBuilderARMVIXL::VisitMemoryPokeIntNative(HInvoke* invoke) {
846 CreateIntIntToVoidLocations(arena_, invoke);
847}
848
849void IntrinsicCodeGeneratorARMVIXL::VisitMemoryPokeIntNative(HInvoke* invoke) {
850 ArmVIXLAssembler* assembler = GetAssembler();
Scott Wakelingb77051e2016-11-21 19:46:00 +0000851 __ Str(InputRegisterAt(invoke, 1), MemOperand(LowRegisterFrom(invoke->GetLocations()->InAt(0))));
Anton Kirilov5ec62182016-10-13 20:16:02 +0100852}
853
854void IntrinsicLocationsBuilderARMVIXL::VisitMemoryPokeLongNative(HInvoke* invoke) {
855 CreateIntIntToVoidLocations(arena_, invoke);
856}
857
858void IntrinsicCodeGeneratorARMVIXL::VisitMemoryPokeLongNative(HInvoke* invoke) {
859 ArmVIXLAssembler* assembler = GetAssembler();
860 // Ignore upper 4B of long address.
861 vixl32::Register addr = LowRegisterFrom(invoke->GetLocations()->InAt(0));
862 // Worst case: Control register bit SCTLR.A = 0. Then unaligned accesses throw a processor
863 // exception. So we can't use ldrd as addr may be unaligned.
Scott Wakelingb77051e2016-11-21 19:46:00 +0000864 __ Str(LowRegisterFrom(invoke->GetLocations()->InAt(1)), MemOperand(addr));
Anton Kirilov5ec62182016-10-13 20:16:02 +0100865 __ Str(HighRegisterFrom(invoke->GetLocations()->InAt(1)), MemOperand(addr, 4));
866}
867
868void IntrinsicLocationsBuilderARMVIXL::VisitMemoryPokeShortNative(HInvoke* invoke) {
869 CreateIntIntToVoidLocations(arena_, invoke);
870}
871
872void IntrinsicCodeGeneratorARMVIXL::VisitMemoryPokeShortNative(HInvoke* invoke) {
873 ArmVIXLAssembler* assembler = GetAssembler();
Scott Wakelingb77051e2016-11-21 19:46:00 +0000874 __ Strh(InputRegisterAt(invoke, 1), MemOperand(LowRegisterFrom(invoke->GetLocations()->InAt(0))));
Anton Kirilov5ec62182016-10-13 20:16:02 +0100875}
876
877void IntrinsicLocationsBuilderARMVIXL::VisitThreadCurrentThread(HInvoke* invoke) {
878 LocationSummary* locations = new (arena_) LocationSummary(invoke,
879 LocationSummary::kNoCall,
880 kIntrinsified);
881 locations->SetOut(Location::RequiresRegister());
882}
883
884void IntrinsicCodeGeneratorARMVIXL::VisitThreadCurrentThread(HInvoke* invoke) {
885 ArmVIXLAssembler* assembler = GetAssembler();
886 __ Ldr(OutputRegister(invoke),
887 MemOperand(tr, Thread::PeerOffset<kArmPointerSize>().Int32Value()));
888}
889
890static void GenUnsafeGet(HInvoke* invoke,
891 Primitive::Type type,
892 bool is_volatile,
893 CodeGeneratorARMVIXL* codegen) {
894 LocationSummary* locations = invoke->GetLocations();
895 ArmVIXLAssembler* assembler = codegen->GetAssembler();
896 Location base_loc = locations->InAt(1);
897 vixl32::Register base = InputRegisterAt(invoke, 1); // Object pointer.
898 Location offset_loc = locations->InAt(2);
899 vixl32::Register offset = LowRegisterFrom(offset_loc); // Long offset, lo part only.
900 Location trg_loc = locations->Out();
901
902 switch (type) {
903 case Primitive::kPrimInt: {
904 vixl32::Register trg = RegisterFrom(trg_loc);
905 __ Ldr(trg, MemOperand(base, offset));
906 if (is_volatile) {
907 __ Dmb(vixl32::ISH);
908 }
909 break;
910 }
911
912 case Primitive::kPrimNot: {
913 vixl32::Register trg = RegisterFrom(trg_loc);
914 if (kEmitCompilerReadBarrier) {
915 if (kUseBakerReadBarrier) {
916 Location temp = locations->GetTemp(0);
917 codegen->GenerateReferenceLoadWithBakerReadBarrier(
918 invoke, trg_loc, base, 0U, offset_loc, TIMES_1, temp, /* needs_null_check */ false);
919 if (is_volatile) {
920 __ Dmb(vixl32::ISH);
921 }
922 } else {
923 __ Ldr(trg, MemOperand(base, offset));
924 if (is_volatile) {
925 __ Dmb(vixl32::ISH);
926 }
927 codegen->GenerateReadBarrierSlow(invoke, trg_loc, trg_loc, base_loc, 0U, offset_loc);
928 }
929 } else {
930 __ Ldr(trg, MemOperand(base, offset));
931 if (is_volatile) {
932 __ Dmb(vixl32::ISH);
933 }
934 assembler->MaybeUnpoisonHeapReference(trg);
935 }
936 break;
937 }
938
939 case Primitive::kPrimLong: {
940 vixl32::Register trg_lo = LowRegisterFrom(trg_loc);
941 vixl32::Register trg_hi = HighRegisterFrom(trg_loc);
942 if (is_volatile && !codegen->GetInstructionSetFeatures().HasAtomicLdrdAndStrd()) {
Artem Serov657022c2016-11-23 14:19:38 +0000943 UseScratchRegisterScope temps(assembler->GetVIXLAssembler());
944 const vixl32::Register temp_reg = temps.Acquire();
945 __ Add(temp_reg, base, offset);
946 __ Ldrexd(trg_lo, trg_hi, MemOperand(temp_reg));
Anton Kirilov5ec62182016-10-13 20:16:02 +0100947 } else {
948 __ Ldrd(trg_lo, trg_hi, MemOperand(base, offset));
949 }
950 if (is_volatile) {
951 __ Dmb(vixl32::ISH);
952 }
953 break;
954 }
955
956 default:
957 LOG(FATAL) << "Unexpected type " << type;
958 UNREACHABLE();
959 }
960}
961
962static void CreateIntIntIntToIntLocations(ArenaAllocator* arena,
963 HInvoke* invoke,
964 Primitive::Type type) {
965 bool can_call = kEmitCompilerReadBarrier &&
966 (invoke->GetIntrinsic() == Intrinsics::kUnsafeGetObject ||
967 invoke->GetIntrinsic() == Intrinsics::kUnsafeGetObjectVolatile);
968 LocationSummary* locations = new (arena) LocationSummary(invoke,
969 (can_call
970 ? LocationSummary::kCallOnSlowPath
971 : LocationSummary::kNoCall),
972 kIntrinsified);
973 if (can_call && kUseBakerReadBarrier) {
974 locations->SetCustomSlowPathCallerSaves(RegisterSet::Empty()); // No caller-save registers.
975 }
976 locations->SetInAt(0, Location::NoLocation()); // Unused receiver.
977 locations->SetInAt(1, Location::RequiresRegister());
978 locations->SetInAt(2, Location::RequiresRegister());
979 locations->SetOut(Location::RequiresRegister(),
980 (can_call ? Location::kOutputOverlap : Location::kNoOutputOverlap));
981 if (type == Primitive::kPrimNot && kEmitCompilerReadBarrier && kUseBakerReadBarrier) {
982 // We need a temporary register for the read barrier marking slow
983 // path in InstructionCodeGeneratorARM::GenerateReferenceLoadWithBakerReadBarrier.
984 locations->AddTemp(Location::RequiresRegister());
985 }
986}
987
988void IntrinsicLocationsBuilderARMVIXL::VisitUnsafeGet(HInvoke* invoke) {
989 CreateIntIntIntToIntLocations(arena_, invoke, Primitive::kPrimInt);
990}
991void IntrinsicLocationsBuilderARMVIXL::VisitUnsafeGetVolatile(HInvoke* invoke) {
992 CreateIntIntIntToIntLocations(arena_, invoke, Primitive::kPrimInt);
993}
994void IntrinsicLocationsBuilderARMVIXL::VisitUnsafeGetLong(HInvoke* invoke) {
995 CreateIntIntIntToIntLocations(arena_, invoke, Primitive::kPrimLong);
996}
997void IntrinsicLocationsBuilderARMVIXL::VisitUnsafeGetLongVolatile(HInvoke* invoke) {
998 CreateIntIntIntToIntLocations(arena_, invoke, Primitive::kPrimLong);
999}
1000void IntrinsicLocationsBuilderARMVIXL::VisitUnsafeGetObject(HInvoke* invoke) {
1001 CreateIntIntIntToIntLocations(arena_, invoke, Primitive::kPrimNot);
1002}
1003void IntrinsicLocationsBuilderARMVIXL::VisitUnsafeGetObjectVolatile(HInvoke* invoke) {
1004 CreateIntIntIntToIntLocations(arena_, invoke, Primitive::kPrimNot);
1005}
1006
1007void IntrinsicCodeGeneratorARMVIXL::VisitUnsafeGet(HInvoke* invoke) {
1008 GenUnsafeGet(invoke, Primitive::kPrimInt, /* is_volatile */ false, codegen_);
1009}
1010void IntrinsicCodeGeneratorARMVIXL::VisitUnsafeGetVolatile(HInvoke* invoke) {
1011 GenUnsafeGet(invoke, Primitive::kPrimInt, /* is_volatile */ true, codegen_);
1012}
1013void IntrinsicCodeGeneratorARMVIXL::VisitUnsafeGetLong(HInvoke* invoke) {
1014 GenUnsafeGet(invoke, Primitive::kPrimLong, /* is_volatile */ false, codegen_);
1015}
1016void IntrinsicCodeGeneratorARMVIXL::VisitUnsafeGetLongVolatile(HInvoke* invoke) {
1017 GenUnsafeGet(invoke, Primitive::kPrimLong, /* is_volatile */ true, codegen_);
1018}
1019void IntrinsicCodeGeneratorARMVIXL::VisitUnsafeGetObject(HInvoke* invoke) {
1020 GenUnsafeGet(invoke, Primitive::kPrimNot, /* is_volatile */ false, codegen_);
1021}
1022void IntrinsicCodeGeneratorARMVIXL::VisitUnsafeGetObjectVolatile(HInvoke* invoke) {
1023 GenUnsafeGet(invoke, Primitive::kPrimNot, /* is_volatile */ true, codegen_);
1024}
1025
1026static void CreateIntIntIntIntToVoid(ArenaAllocator* arena,
1027 const ArmInstructionSetFeatures& features,
1028 Primitive::Type type,
1029 bool is_volatile,
1030 HInvoke* invoke) {
1031 LocationSummary* locations = new (arena) LocationSummary(invoke,
1032 LocationSummary::kNoCall,
1033 kIntrinsified);
1034 locations->SetInAt(0, Location::NoLocation()); // Unused receiver.
1035 locations->SetInAt(1, Location::RequiresRegister());
1036 locations->SetInAt(2, Location::RequiresRegister());
1037 locations->SetInAt(3, Location::RequiresRegister());
1038
1039 if (type == Primitive::kPrimLong) {
1040 // Potentially need temps for ldrexd-strexd loop.
1041 if (is_volatile && !features.HasAtomicLdrdAndStrd()) {
1042 locations->AddTemp(Location::RequiresRegister()); // Temp_lo.
1043 locations->AddTemp(Location::RequiresRegister()); // Temp_hi.
1044 }
1045 } else if (type == Primitive::kPrimNot) {
1046 // Temps for card-marking.
1047 locations->AddTemp(Location::RequiresRegister()); // Temp.
1048 locations->AddTemp(Location::RequiresRegister()); // Card.
1049 }
1050}
1051
1052void IntrinsicLocationsBuilderARMVIXL::VisitUnsafePut(HInvoke* invoke) {
1053 CreateIntIntIntIntToVoid(arena_, features_, Primitive::kPrimInt, /* is_volatile */ false, invoke);
1054}
1055void IntrinsicLocationsBuilderARMVIXL::VisitUnsafePutOrdered(HInvoke* invoke) {
1056 CreateIntIntIntIntToVoid(arena_, features_, Primitive::kPrimInt, /* is_volatile */ false, invoke);
1057}
1058void IntrinsicLocationsBuilderARMVIXL::VisitUnsafePutVolatile(HInvoke* invoke) {
1059 CreateIntIntIntIntToVoid(arena_, features_, Primitive::kPrimInt, /* is_volatile */ true, invoke);
1060}
1061void IntrinsicLocationsBuilderARMVIXL::VisitUnsafePutObject(HInvoke* invoke) {
1062 CreateIntIntIntIntToVoid(arena_, features_, Primitive::kPrimNot, /* is_volatile */ false, invoke);
1063}
1064void IntrinsicLocationsBuilderARMVIXL::VisitUnsafePutObjectOrdered(HInvoke* invoke) {
1065 CreateIntIntIntIntToVoid(arena_, features_, Primitive::kPrimNot, /* is_volatile */ false, invoke);
1066}
1067void IntrinsicLocationsBuilderARMVIXL::VisitUnsafePutObjectVolatile(HInvoke* invoke) {
1068 CreateIntIntIntIntToVoid(arena_, features_, Primitive::kPrimNot, /* is_volatile */ true, invoke);
1069}
1070void IntrinsicLocationsBuilderARMVIXL::VisitUnsafePutLong(HInvoke* invoke) {
1071 CreateIntIntIntIntToVoid(
1072 arena_, features_, Primitive::kPrimLong, /* is_volatile */ false, invoke);
1073}
1074void IntrinsicLocationsBuilderARMVIXL::VisitUnsafePutLongOrdered(HInvoke* invoke) {
1075 CreateIntIntIntIntToVoid(
1076 arena_, features_, Primitive::kPrimLong, /* is_volatile */ false, invoke);
1077}
1078void IntrinsicLocationsBuilderARMVIXL::VisitUnsafePutLongVolatile(HInvoke* invoke) {
1079 CreateIntIntIntIntToVoid(
1080 arena_, features_, Primitive::kPrimLong, /* is_volatile */ true, invoke);
1081}
1082
1083static void GenUnsafePut(LocationSummary* locations,
1084 Primitive::Type type,
1085 bool is_volatile,
1086 bool is_ordered,
1087 CodeGeneratorARMVIXL* codegen) {
1088 ArmVIXLAssembler* assembler = codegen->GetAssembler();
1089
1090 vixl32::Register base = RegisterFrom(locations->InAt(1)); // Object pointer.
1091 vixl32::Register offset = LowRegisterFrom(locations->InAt(2)); // Long offset, lo part only.
1092 vixl32::Register value;
1093
1094 if (is_volatile || is_ordered) {
1095 __ Dmb(vixl32::ISH);
1096 }
1097
1098 if (type == Primitive::kPrimLong) {
1099 vixl32::Register value_lo = LowRegisterFrom(locations->InAt(3));
1100 vixl32::Register value_hi = HighRegisterFrom(locations->InAt(3));
1101 value = value_lo;
1102 if (is_volatile && !codegen->GetInstructionSetFeatures().HasAtomicLdrdAndStrd()) {
1103 vixl32::Register temp_lo = RegisterFrom(locations->GetTemp(0));
1104 vixl32::Register temp_hi = RegisterFrom(locations->GetTemp(1));
1105 UseScratchRegisterScope temps(assembler->GetVIXLAssembler());
1106 const vixl32::Register temp_reg = temps.Acquire();
1107
1108 __ Add(temp_reg, base, offset);
1109 vixl32::Label loop_head;
1110 __ Bind(&loop_head);
Scott Wakelingb77051e2016-11-21 19:46:00 +00001111 __ Ldrexd(temp_lo, temp_hi, MemOperand(temp_reg));
1112 __ Strexd(temp_lo, value_lo, value_hi, MemOperand(temp_reg));
Anton Kirilov5ec62182016-10-13 20:16:02 +01001113 __ Cmp(temp_lo, 0);
Artem Serov517d9f62016-12-12 15:51:15 +00001114 __ B(ne, &loop_head, /* far_target */ false);
Anton Kirilov5ec62182016-10-13 20:16:02 +01001115 } else {
1116 __ Strd(value_lo, value_hi, MemOperand(base, offset));
1117 }
1118 } else {
1119 value = RegisterFrom(locations->InAt(3));
1120 vixl32::Register source = value;
1121 if (kPoisonHeapReferences && type == Primitive::kPrimNot) {
1122 vixl32::Register temp = RegisterFrom(locations->GetTemp(0));
1123 __ Mov(temp, value);
1124 assembler->PoisonHeapReference(temp);
1125 source = temp;
1126 }
1127 __ Str(source, MemOperand(base, offset));
1128 }
1129
1130 if (is_volatile) {
1131 __ Dmb(vixl32::ISH);
1132 }
1133
1134 if (type == Primitive::kPrimNot) {
1135 vixl32::Register temp = RegisterFrom(locations->GetTemp(0));
1136 vixl32::Register card = RegisterFrom(locations->GetTemp(1));
1137 bool value_can_be_null = true; // TODO: Worth finding out this information?
1138 codegen->MarkGCCard(temp, card, base, value, value_can_be_null);
1139 }
1140}
1141
1142void IntrinsicCodeGeneratorARMVIXL::VisitUnsafePut(HInvoke* invoke) {
1143 GenUnsafePut(invoke->GetLocations(),
1144 Primitive::kPrimInt,
1145 /* is_volatile */ false,
1146 /* is_ordered */ false,
1147 codegen_);
1148}
1149void IntrinsicCodeGeneratorARMVIXL::VisitUnsafePutOrdered(HInvoke* invoke) {
1150 GenUnsafePut(invoke->GetLocations(),
1151 Primitive::kPrimInt,
1152 /* is_volatile */ false,
1153 /* is_ordered */ true,
1154 codegen_);
1155}
1156void IntrinsicCodeGeneratorARMVIXL::VisitUnsafePutVolatile(HInvoke* invoke) {
1157 GenUnsafePut(invoke->GetLocations(),
1158 Primitive::kPrimInt,
1159 /* is_volatile */ true,
1160 /* is_ordered */ false,
1161 codegen_);
1162}
1163void IntrinsicCodeGeneratorARMVIXL::VisitUnsafePutObject(HInvoke* invoke) {
1164 GenUnsafePut(invoke->GetLocations(),
1165 Primitive::kPrimNot,
1166 /* is_volatile */ false,
1167 /* is_ordered */ false,
1168 codegen_);
1169}
1170void IntrinsicCodeGeneratorARMVIXL::VisitUnsafePutObjectOrdered(HInvoke* invoke) {
1171 GenUnsafePut(invoke->GetLocations(),
1172 Primitive::kPrimNot,
1173 /* is_volatile */ false,
1174 /* is_ordered */ true,
1175 codegen_);
1176}
1177void IntrinsicCodeGeneratorARMVIXL::VisitUnsafePutObjectVolatile(HInvoke* invoke) {
1178 GenUnsafePut(invoke->GetLocations(),
1179 Primitive::kPrimNot,
1180 /* is_volatile */ true,
1181 /* is_ordered */ false,
1182 codegen_);
1183}
1184void IntrinsicCodeGeneratorARMVIXL::VisitUnsafePutLong(HInvoke* invoke) {
1185 GenUnsafePut(invoke->GetLocations(),
1186 Primitive::kPrimLong,
1187 /* is_volatile */ false,
1188 /* is_ordered */ false,
1189 codegen_);
1190}
1191void IntrinsicCodeGeneratorARMVIXL::VisitUnsafePutLongOrdered(HInvoke* invoke) {
1192 GenUnsafePut(invoke->GetLocations(),
1193 Primitive::kPrimLong,
1194 /* is_volatile */ false,
1195 /* is_ordered */ true,
1196 codegen_);
1197}
1198void IntrinsicCodeGeneratorARMVIXL::VisitUnsafePutLongVolatile(HInvoke* invoke) {
1199 GenUnsafePut(invoke->GetLocations(),
1200 Primitive::kPrimLong,
1201 /* is_volatile */ true,
1202 /* is_ordered */ false,
1203 codegen_);
1204}
1205
1206static void CreateIntIntIntIntIntToIntPlusTemps(ArenaAllocator* arena,
1207 HInvoke* invoke,
1208 Primitive::Type type) {
1209 bool can_call = kEmitCompilerReadBarrier &&
1210 kUseBakerReadBarrier &&
1211 (invoke->GetIntrinsic() == Intrinsics::kUnsafeCASObject);
1212 LocationSummary* locations = new (arena) LocationSummary(invoke,
1213 (can_call
1214 ? LocationSummary::kCallOnSlowPath
1215 : LocationSummary::kNoCall),
1216 kIntrinsified);
1217 locations->SetInAt(0, Location::NoLocation()); // Unused receiver.
1218 locations->SetInAt(1, Location::RequiresRegister());
1219 locations->SetInAt(2, Location::RequiresRegister());
1220 locations->SetInAt(3, Location::RequiresRegister());
1221 locations->SetInAt(4, Location::RequiresRegister());
1222
1223 // If heap poisoning is enabled, we don't want the unpoisoning
1224 // operations to potentially clobber the output. Likewise when
1225 // emitting a (Baker) read barrier, which may call.
1226 Location::OutputOverlap overlaps =
1227 ((kPoisonHeapReferences && type == Primitive::kPrimNot) || can_call)
1228 ? Location::kOutputOverlap
1229 : Location::kNoOutputOverlap;
1230 locations->SetOut(Location::RequiresRegister(), overlaps);
1231
1232 // Temporary registers used in CAS. In the object case
1233 // (UnsafeCASObject intrinsic), these are also used for
1234 // card-marking, and possibly for (Baker) read barrier.
1235 locations->AddTemp(Location::RequiresRegister()); // Pointer.
1236 locations->AddTemp(Location::RequiresRegister()); // Temp 1.
1237}
1238
1239static void GenCas(HInvoke* invoke, Primitive::Type type, CodeGeneratorARMVIXL* codegen) {
1240 DCHECK_NE(type, Primitive::kPrimLong);
1241
1242 ArmVIXLAssembler* assembler = codegen->GetAssembler();
1243 LocationSummary* locations = invoke->GetLocations();
1244
1245 Location out_loc = locations->Out();
1246 vixl32::Register out = OutputRegister(invoke); // Boolean result.
1247
1248 vixl32::Register base = InputRegisterAt(invoke, 1); // Object pointer.
1249 Location offset_loc = locations->InAt(2);
1250 vixl32::Register offset = LowRegisterFrom(offset_loc); // Offset (discard high 4B).
1251 vixl32::Register expected = InputRegisterAt(invoke, 3); // Expected.
1252 vixl32::Register value = InputRegisterAt(invoke, 4); // Value.
1253
1254 Location tmp_ptr_loc = locations->GetTemp(0);
1255 vixl32::Register tmp_ptr = RegisterFrom(tmp_ptr_loc); // Pointer to actual memory.
1256 vixl32::Register tmp = RegisterFrom(locations->GetTemp(1)); // Value in memory.
1257
1258 if (type == Primitive::kPrimNot) {
1259 // The only read barrier implementation supporting the
1260 // UnsafeCASObject intrinsic is the Baker-style read barriers.
1261 DCHECK(!kEmitCompilerReadBarrier || kUseBakerReadBarrier);
1262
1263 // Mark card for object assuming new value is stored. Worst case we will mark an unchanged
1264 // object and scan the receiver at the next GC for nothing.
1265 bool value_can_be_null = true; // TODO: Worth finding out this information?
1266 codegen->MarkGCCard(tmp_ptr, tmp, base, value, value_can_be_null);
1267
1268 if (kEmitCompilerReadBarrier && kUseBakerReadBarrier) {
1269 // Need to make sure the reference stored in the field is a to-space
1270 // one before attempting the CAS or the CAS could fail incorrectly.
1271 codegen->GenerateReferenceLoadWithBakerReadBarrier(
1272 invoke,
1273 out_loc, // Unused, used only as a "temporary" within the read barrier.
1274 base,
1275 /* offset */ 0u,
1276 /* index */ offset_loc,
1277 ScaleFactor::TIMES_1,
1278 tmp_ptr_loc,
1279 /* needs_null_check */ false,
1280 /* always_update_field */ true,
1281 &tmp);
1282 }
1283 }
1284
1285 // Prevent reordering with prior memory operations.
1286 // Emit a DMB ISH instruction instead of an DMB ISHST one, as the
1287 // latter allows a preceding load to be delayed past the STXR
1288 // instruction below.
1289 __ Dmb(vixl32::ISH);
1290
1291 __ Add(tmp_ptr, base, offset);
1292
1293 if (kPoisonHeapReferences && type == Primitive::kPrimNot) {
1294 codegen->GetAssembler()->PoisonHeapReference(expected);
1295 if (value.Is(expected)) {
1296 // Do not poison `value`, as it is the same register as
1297 // `expected`, which has just been poisoned.
1298 } else {
1299 codegen->GetAssembler()->PoisonHeapReference(value);
1300 }
1301 }
1302
1303 // do {
1304 // tmp = [r_ptr] - expected;
1305 // } while (tmp == 0 && failure([r_ptr] <- r_new_value));
1306 // result = tmp != 0;
1307
1308 vixl32::Label loop_head;
1309 __ Bind(&loop_head);
1310
Scott Wakelingb77051e2016-11-21 19:46:00 +00001311 __ Ldrex(tmp, MemOperand(tmp_ptr));
Anton Kirilov5ec62182016-10-13 20:16:02 +01001312
1313 __ Subs(tmp, tmp, expected);
1314
1315 {
Artem Serov0fb37192016-12-06 18:13:40 +00001316 ExactAssemblyScope aas(assembler->GetVIXLAssembler(),
1317 3 * kMaxInstructionSizeInBytes,
1318 CodeBufferCheckScope::kMaximumSize);
Anton Kirilov5ec62182016-10-13 20:16:02 +01001319
1320 __ itt(eq);
Scott Wakelingb77051e2016-11-21 19:46:00 +00001321 __ strex(eq, tmp, value, MemOperand(tmp_ptr));
Anton Kirilov5ec62182016-10-13 20:16:02 +01001322 __ cmp(eq, tmp, 1);
1323 }
1324
Artem Serov517d9f62016-12-12 15:51:15 +00001325 __ B(eq, &loop_head, /* far_target */ false);
Anton Kirilov5ec62182016-10-13 20:16:02 +01001326
1327 __ Dmb(vixl32::ISH);
1328
1329 __ Rsbs(out, tmp, 1);
1330
1331 {
Artem Serov0fb37192016-12-06 18:13:40 +00001332 ExactAssemblyScope aas(assembler->GetVIXLAssembler(),
1333 2 * kMaxInstructionSizeInBytes,
1334 CodeBufferCheckScope::kMaximumSize);
Anton Kirilov5ec62182016-10-13 20:16:02 +01001335
1336 __ it(cc);
1337 __ mov(cc, out, 0);
1338 }
1339
1340 if (kPoisonHeapReferences && type == Primitive::kPrimNot) {
1341 codegen->GetAssembler()->UnpoisonHeapReference(expected);
1342 if (value.Is(expected)) {
1343 // Do not unpoison `value`, as it is the same register as
1344 // `expected`, which has just been unpoisoned.
1345 } else {
1346 codegen->GetAssembler()->UnpoisonHeapReference(value);
1347 }
1348 }
1349}
1350
1351void IntrinsicLocationsBuilderARMVIXL::VisitUnsafeCASInt(HInvoke* invoke) {
1352 CreateIntIntIntIntIntToIntPlusTemps(arena_, invoke, Primitive::kPrimInt);
1353}
1354void IntrinsicLocationsBuilderARMVIXL::VisitUnsafeCASObject(HInvoke* invoke) {
1355 // The only read barrier implementation supporting the
1356 // UnsafeCASObject intrinsic is the Baker-style read barriers.
1357 if (kEmitCompilerReadBarrier && !kUseBakerReadBarrier) {
1358 return;
1359 }
1360
1361 CreateIntIntIntIntIntToIntPlusTemps(arena_, invoke, Primitive::kPrimNot);
1362}
1363void IntrinsicCodeGeneratorARMVIXL::VisitUnsafeCASInt(HInvoke* invoke) {
1364 GenCas(invoke, Primitive::kPrimInt, codegen_);
1365}
1366void IntrinsicCodeGeneratorARMVIXL::VisitUnsafeCASObject(HInvoke* invoke) {
1367 // The only read barrier implementation supporting the
1368 // UnsafeCASObject intrinsic is the Baker-style read barriers.
1369 DCHECK(!kEmitCompilerReadBarrier || kUseBakerReadBarrier);
1370
1371 GenCas(invoke, Primitive::kPrimNot, codegen_);
1372}
1373
1374void IntrinsicLocationsBuilderARMVIXL::VisitStringCompareTo(HInvoke* invoke) {
1375 // The inputs plus one temp.
1376 LocationSummary* locations = new (arena_) LocationSummary(invoke,
1377 invoke->InputAt(1)->CanBeNull()
1378 ? LocationSummary::kCallOnSlowPath
1379 : LocationSummary::kNoCall,
1380 kIntrinsified);
1381 locations->SetInAt(0, Location::RequiresRegister());
1382 locations->SetInAt(1, Location::RequiresRegister());
1383 locations->AddTemp(Location::RequiresRegister());
1384 locations->AddTemp(Location::RequiresRegister());
1385 locations->AddTemp(Location::RequiresRegister());
1386 // Need temporary registers for String compression's feature.
1387 if (mirror::kUseStringCompression) {
1388 locations->AddTemp(Location::RequiresRegister());
Anton Kirilov5ec62182016-10-13 20:16:02 +01001389 }
1390 locations->SetOut(Location::RequiresRegister(), Location::kOutputOverlap);
1391}
1392
1393void IntrinsicCodeGeneratorARMVIXL::VisitStringCompareTo(HInvoke* invoke) {
1394 ArmVIXLAssembler* assembler = GetAssembler();
1395 LocationSummary* locations = invoke->GetLocations();
1396
1397 vixl32::Register str = InputRegisterAt(invoke, 0);
1398 vixl32::Register arg = InputRegisterAt(invoke, 1);
1399 vixl32::Register out = OutputRegister(invoke);
1400
1401 vixl32::Register temp0 = RegisterFrom(locations->GetTemp(0));
1402 vixl32::Register temp1 = RegisterFrom(locations->GetTemp(1));
1403 vixl32::Register temp2 = RegisterFrom(locations->GetTemp(2));
Vladimir Markofdaf0f42016-10-13 19:29:53 +01001404 vixl32::Register temp3;
Anton Kirilov5ec62182016-10-13 20:16:02 +01001405 if (mirror::kUseStringCompression) {
1406 temp3 = RegisterFrom(locations->GetTemp(3));
Anton Kirilov5ec62182016-10-13 20:16:02 +01001407 }
1408
1409 vixl32::Label loop;
1410 vixl32::Label find_char_diff;
1411 vixl32::Label end;
1412 vixl32::Label different_compression;
1413
1414 // Get offsets of count and value fields within a string object.
1415 const int32_t count_offset = mirror::String::CountOffset().Int32Value();
1416 const int32_t value_offset = mirror::String::ValueOffset().Int32Value();
1417
1418 // Note that the null check must have been done earlier.
1419 DCHECK(!invoke->CanDoImplicitNullCheckOn(invoke->InputAt(0)));
1420
1421 // Take slow path and throw if input can be and is null.
1422 SlowPathCodeARMVIXL* slow_path = nullptr;
1423 const bool can_slow_path = invoke->InputAt(1)->CanBeNull();
1424 if (can_slow_path) {
1425 slow_path = new (GetAllocator()) IntrinsicSlowPathARMVIXL(invoke);
1426 codegen_->AddSlowPath(slow_path);
xueliang.zhongf51bc622016-11-04 09:23:32 +00001427 __ CompareAndBranchIfZero(arg, slow_path->GetEntryLabel());
Anton Kirilov5ec62182016-10-13 20:16:02 +01001428 }
1429
1430 // Reference equality check, return 0 if same reference.
1431 __ Subs(out, str, arg);
1432 __ B(eq, &end);
1433
Anton Kirilov5ec62182016-10-13 20:16:02 +01001434 if (mirror::kUseStringCompression) {
Vladimir Markofdaf0f42016-10-13 19:29:53 +01001435 // Load `count` fields of this and argument strings.
Anton Kirilov5ec62182016-10-13 20:16:02 +01001436 __ Ldr(temp3, MemOperand(str, count_offset));
Vladimir Markofdaf0f42016-10-13 19:29:53 +01001437 __ Ldr(temp2, MemOperand(arg, count_offset));
1438 // Extract lengths from the `count` fields.
1439 __ Lsr(temp0, temp3, 1u);
1440 __ Lsr(temp1, temp2, 1u);
Anton Kirilov5ec62182016-10-13 20:16:02 +01001441 } else {
1442 // Load lengths of this and argument strings.
1443 __ Ldr(temp0, MemOperand(str, count_offset));
Vladimir Markofdaf0f42016-10-13 19:29:53 +01001444 __ Ldr(temp1, MemOperand(arg, count_offset));
Anton Kirilov5ec62182016-10-13 20:16:02 +01001445 }
1446 // out = length diff.
Vladimir Markofdaf0f42016-10-13 19:29:53 +01001447 __ Subs(out, temp0, temp1);
Anton Kirilov5ec62182016-10-13 20:16:02 +01001448 // temp0 = min(len(str), len(arg)).
1449
1450 {
Artem Serov0fb37192016-12-06 18:13:40 +00001451 ExactAssemblyScope aas(assembler->GetVIXLAssembler(),
1452 2 * kMaxInstructionSizeInBytes,
1453 CodeBufferCheckScope::kMaximumSize);
Anton Kirilov5ec62182016-10-13 20:16:02 +01001454
1455 __ it(gt);
Vladimir Markofdaf0f42016-10-13 19:29:53 +01001456 __ mov(gt, temp0, temp1);
Anton Kirilov5ec62182016-10-13 20:16:02 +01001457 }
1458
Anton Kirilov5ec62182016-10-13 20:16:02 +01001459 // Shorter string is empty?
xueliang.zhongf51bc622016-11-04 09:23:32 +00001460 // Note that mirror::kUseStringCompression==true introduces lots of instructions,
1461 // which makes &end label far away from this branch and makes it not 'CBZ-encodable'.
1462 __ CompareAndBranchIfZero(temp0, &end, mirror::kUseStringCompression);
Anton Kirilov5ec62182016-10-13 20:16:02 +01001463
1464 if (mirror::kUseStringCompression) {
1465 // Check if both strings using same compression style to use this comparison loop.
Vladimir Markofdaf0f42016-10-13 19:29:53 +01001466 __ Eors(temp2, temp2, temp3);
1467 __ Lsrs(temp2, temp2, 1u);
1468 __ B(cs, &different_compression);
Anton Kirilov5ec62182016-10-13 20:16:02 +01001469 // For string compression, calculate the number of bytes to compare (not chars).
1470 // This could in theory exceed INT32_MAX, so treat temp0 as unsigned.
Vladimir Markofdaf0f42016-10-13 19:29:53 +01001471 __ Lsls(temp3, temp3, 31u); // Extract purely the compression flag.
Anton Kirilov5ec62182016-10-13 20:16:02 +01001472
Artem Serov0fb37192016-12-06 18:13:40 +00001473 ExactAssemblyScope aas(assembler->GetVIXLAssembler(),
1474 2 * kMaxInstructionSizeInBytes,
1475 CodeBufferCheckScope::kMaximumSize);
Anton Kirilov5ec62182016-10-13 20:16:02 +01001476
Vladimir Markofdaf0f42016-10-13 19:29:53 +01001477 __ it(ne);
1478 __ add(ne, temp0, temp0, temp0);
Anton Kirilov5ec62182016-10-13 20:16:02 +01001479 }
1480
Vladimir Markofdaf0f42016-10-13 19:29:53 +01001481 // Store offset of string value in preparation for comparison loop.
1482 __ Mov(temp1, value_offset);
1483
Anton Kirilov5ec62182016-10-13 20:16:02 +01001484 // Assertions that must hold in order to compare multiple characters at a time.
1485 CHECK_ALIGNED(value_offset, 8);
1486 static_assert(IsAligned<8>(kObjectAlignment),
1487 "String data must be 8-byte aligned for unrolled CompareTo loop.");
1488
Scott Wakelingb77051e2016-11-21 19:46:00 +00001489 const unsigned char_size = Primitive::ComponentSize(Primitive::kPrimChar);
Anton Kirilov5ec62182016-10-13 20:16:02 +01001490 DCHECK_EQ(char_size, 2u);
1491
Vladimir Markofdaf0f42016-10-13 19:29:53 +01001492 UseScratchRegisterScope temps(assembler->GetVIXLAssembler());
1493
Anton Kirilov5ec62182016-10-13 20:16:02 +01001494 vixl32::Label find_char_diff_2nd_cmp;
1495 // Unrolled loop comparing 4x16-bit chars per iteration (ok because of string data alignment).
1496 __ Bind(&loop);
Vladimir Markofdaf0f42016-10-13 19:29:53 +01001497 vixl32::Register temp_reg = temps.Acquire();
Anton Kirilov5ec62182016-10-13 20:16:02 +01001498 __ Ldr(temp_reg, MemOperand(str, temp1));
1499 __ Ldr(temp2, MemOperand(arg, temp1));
1500 __ Cmp(temp_reg, temp2);
Artem Serov517d9f62016-12-12 15:51:15 +00001501 __ B(ne, &find_char_diff, /* far_target */ false);
Anton Kirilov5ec62182016-10-13 20:16:02 +01001502 __ Add(temp1, temp1, char_size * 2);
1503
1504 __ Ldr(temp_reg, MemOperand(str, temp1));
1505 __ Ldr(temp2, MemOperand(arg, temp1));
1506 __ Cmp(temp_reg, temp2);
Artem Serov517d9f62016-12-12 15:51:15 +00001507 __ B(ne, &find_char_diff_2nd_cmp, /* far_target */ false);
Anton Kirilov5ec62182016-10-13 20:16:02 +01001508 __ Add(temp1, temp1, char_size * 2);
1509 // With string compression, we have compared 8 bytes, otherwise 4 chars.
1510 __ Subs(temp0, temp0, (mirror::kUseStringCompression ? 8 : 4));
Artem Serov517d9f62016-12-12 15:51:15 +00001511 __ B(hi, &loop, /* far_target */ false);
Anton Kirilov5ec62182016-10-13 20:16:02 +01001512 __ B(&end);
1513
1514 __ Bind(&find_char_diff_2nd_cmp);
1515 if (mirror::kUseStringCompression) {
1516 __ Subs(temp0, temp0, 4); // 4 bytes previously compared.
Artem Serov517d9f62016-12-12 15:51:15 +00001517 __ B(ls, &end, /* far_target */ false); // Was the second comparison fully beyond the end?
Anton Kirilov5ec62182016-10-13 20:16:02 +01001518 } else {
1519 // Without string compression, we can start treating temp0 as signed
1520 // and rely on the signed comparison below.
1521 __ Sub(temp0, temp0, 2);
1522 }
1523
1524 // Find the single character difference.
1525 __ Bind(&find_char_diff);
1526 // Get the bit position of the first character that differs.
1527 __ Eor(temp1, temp2, temp_reg);
1528 __ Rbit(temp1, temp1);
1529 __ Clz(temp1, temp1);
1530
1531 // temp0 = number of characters remaining to compare.
1532 // (Without string compression, it could be < 1 if a difference is found by the second CMP
1533 // in the comparison loop, and after the end of the shorter string data).
1534
1535 // Without string compression (temp1 >> 4) = character where difference occurs between the last
1536 // two words compared, in the interval [0,1].
1537 // (0 for low half-word different, 1 for high half-word different).
1538 // With string compression, (temp1 << 3) = byte where the difference occurs,
1539 // in the interval [0,3].
1540
1541 // If temp0 <= (temp1 >> (kUseStringCompression ? 3 : 4)), the difference occurs outside
1542 // the remaining string data, so just return length diff (out).
1543 // The comparison is unsigned for string compression, otherwise signed.
1544 __ Cmp(temp0, Operand(temp1, vixl32::LSR, (mirror::kUseStringCompression ? 3 : 4)));
Artem Serov517d9f62016-12-12 15:51:15 +00001545 __ B((mirror::kUseStringCompression ? ls : le), &end, /* far_target */ false);
Vladimir Markofdaf0f42016-10-13 19:29:53 +01001546
Anton Kirilov5ec62182016-10-13 20:16:02 +01001547 // Extract the characters and calculate the difference.
Anton Kirilov5ec62182016-10-13 20:16:02 +01001548 if (mirror::kUseStringCompression) {
Vladimir Markofdaf0f42016-10-13 19:29:53 +01001549 // For compressed strings we need to clear 0x7 from temp1, for uncompressed we need to clear
1550 // 0xf. We also need to prepare the character extraction mask `uncompressed ? 0xffffu : 0xffu`.
1551 // The compression flag is now in the highest bit of temp3, so let's play some tricks.
Anton Kirilovb88c4842016-11-14 14:37:00 +00001552 __ Orr(temp3, temp3, 0xffu << 23); // uncompressed ? 0xff800000u : 0x7ff80000u
1553 __ Bic(temp1, temp1, Operand(temp3, vixl32::LSR, 31 - 3)); // &= ~(uncompressed ? 0xfu : 0x7u)
Vladimir Markofdaf0f42016-10-13 19:29:53 +01001554 __ Asr(temp3, temp3, 7u); // uncompressed ? 0xffff0000u : 0xff0000u.
1555 __ Lsr(temp2, temp2, temp1); // Extract second character.
1556 __ Lsr(temp3, temp3, 16u); // uncompressed ? 0xffffu : 0xffu
1557 __ Lsr(out, temp_reg, temp1); // Extract first character.
Anton Kirilovb88c4842016-11-14 14:37:00 +00001558 __ And(temp2, temp2, temp3);
1559 __ And(out, out, temp3);
Vladimir Markofdaf0f42016-10-13 19:29:53 +01001560 } else {
Anton Kirilovb88c4842016-11-14 14:37:00 +00001561 __ Bic(temp1, temp1, 0xf);
Vladimir Markofdaf0f42016-10-13 19:29:53 +01001562 __ Lsr(temp2, temp2, temp1);
1563 __ Lsr(out, temp_reg, temp1);
Anton Kirilovb88c4842016-11-14 14:37:00 +00001564 __ Movt(temp2, 0);
1565 __ Movt(out, 0);
Anton Kirilov5ec62182016-10-13 20:16:02 +01001566 }
Anton Kirilov5ec62182016-10-13 20:16:02 +01001567
Vladimir Markofdaf0f42016-10-13 19:29:53 +01001568 __ Sub(out, out, temp2);
Anton Kirilov5ec62182016-10-13 20:16:02 +01001569 temps.Release(temp_reg);
Anton Kirilov5ec62182016-10-13 20:16:02 +01001570
1571 if (mirror::kUseStringCompression) {
Vladimir Markofdaf0f42016-10-13 19:29:53 +01001572 __ B(&end);
1573 __ Bind(&different_compression);
1574
1575 // Comparison for different compression style.
Anton Kirilov5ec62182016-10-13 20:16:02 +01001576 const size_t c_char_size = Primitive::ComponentSize(Primitive::kPrimByte);
1577 DCHECK_EQ(c_char_size, 1u);
Anton Kirilov5ec62182016-10-13 20:16:02 +01001578
Vladimir Markofdaf0f42016-10-13 19:29:53 +01001579 // We want to free up the temp3, currently holding `str.count`, for comparison.
1580 // So, we move it to the bottom bit of the iteration count `temp0` which we tnen
1581 // need to treat as unsigned. Start by freeing the bit with an ADD and continue
1582 // further down by a LSRS+SBC which will flip the meaning of the flag but allow
1583 // `subs temp0, #2; bhi different_compression_loop` to serve as the loop condition.
Anton Kirilovb88c4842016-11-14 14:37:00 +00001584 __ Add(temp0, temp0, temp0); // Unlike LSL, this ADD is always 16-bit.
Vladimir Markofdaf0f42016-10-13 19:29:53 +01001585 // `temp1` will hold the compressed data pointer, `temp2` the uncompressed data pointer.
Anton Kirilovb88c4842016-11-14 14:37:00 +00001586 __ Mov(temp1, str);
1587 __ Mov(temp2, arg);
Vladimir Markofdaf0f42016-10-13 19:29:53 +01001588 __ Lsrs(temp3, temp3, 1u); // Continue the move of the compression flag.
1589 {
Artem Serov0fb37192016-12-06 18:13:40 +00001590 ExactAssemblyScope aas(assembler->GetVIXLAssembler(),
1591 3 * kMaxInstructionSizeInBytes,
1592 CodeBufferCheckScope::kMaximumSize);
Vladimir Markofdaf0f42016-10-13 19:29:53 +01001593 __ itt(cs); // Interleave with selection of temp1 and temp2.
1594 __ mov(cs, temp1, arg); // Preserves flags.
1595 __ mov(cs, temp2, str); // Preserves flags.
1596 }
Anton Kirilovb88c4842016-11-14 14:37:00 +00001597 __ Sbc(temp0, temp0, 0); // Complete the move of the compression flag.
Vladimir Markofdaf0f42016-10-13 19:29:53 +01001598
1599 // Adjust temp1 and temp2 from string pointers to data pointers.
Anton Kirilovb88c4842016-11-14 14:37:00 +00001600 __ Add(temp1, temp1, value_offset);
1601 __ Add(temp2, temp2, value_offset);
Vladimir Markofdaf0f42016-10-13 19:29:53 +01001602
1603 vixl32::Label different_compression_loop;
1604 vixl32::Label different_compression_diff;
1605
1606 // Main loop for different compression.
Anton Kirilov5ec62182016-10-13 20:16:02 +01001607 temp_reg = temps.Acquire();
Vladimir Markofdaf0f42016-10-13 19:29:53 +01001608 __ Bind(&different_compression_loop);
1609 __ Ldrb(temp_reg, MemOperand(temp1, c_char_size, PostIndex));
1610 __ Ldrh(temp3, MemOperand(temp2, char_size, PostIndex));
Anton Kirilovb88c4842016-11-14 14:37:00 +00001611 __ Cmp(temp_reg, temp3);
Artem Serov517d9f62016-12-12 15:51:15 +00001612 __ B(ne, &different_compression_diff, /* far_target */ false);
Vladimir Markofdaf0f42016-10-13 19:29:53 +01001613 __ Subs(temp0, temp0, 2);
Artem Serov517d9f62016-12-12 15:51:15 +00001614 __ B(hi, &different_compression_loop, /* far_target */ false);
Anton Kirilov5ec62182016-10-13 20:16:02 +01001615 __ B(&end);
1616
1617 // Calculate the difference.
Vladimir Markofdaf0f42016-10-13 19:29:53 +01001618 __ Bind(&different_compression_diff);
1619 __ Sub(out, temp_reg, temp3);
Anton Kirilov5ec62182016-10-13 20:16:02 +01001620 temps.Release(temp_reg);
Vladimir Markofdaf0f42016-10-13 19:29:53 +01001621 // Flip the difference if the `arg` is compressed.
1622 // `temp0` contains inverted `str` compression flag, i.e the same as `arg` compression flag.
1623 __ Lsrs(temp0, temp0, 1u);
1624 static_assert(static_cast<uint32_t>(mirror::StringCompressionFlag::kCompressed) == 0u,
1625 "Expecting 0=compressed, 1=uncompressed");
1626
Artem Serov0fb37192016-12-06 18:13:40 +00001627 ExactAssemblyScope aas(assembler->GetVIXLAssembler(),
1628 2 * kMaxInstructionSizeInBytes,
1629 CodeBufferCheckScope::kMaximumSize);
Vladimir Markofdaf0f42016-10-13 19:29:53 +01001630 __ it(cc);
1631 __ rsb(cc, out, out, 0);
Anton Kirilov5ec62182016-10-13 20:16:02 +01001632 }
1633
1634 __ Bind(&end);
1635
1636 if (can_slow_path) {
1637 __ Bind(slow_path->GetExitLabel());
1638 }
1639}
1640
1641void IntrinsicLocationsBuilderARMVIXL::VisitStringEquals(HInvoke* invoke) {
1642 LocationSummary* locations = new (arena_) LocationSummary(invoke,
1643 LocationSummary::kNoCall,
1644 kIntrinsified);
1645 InvokeRuntimeCallingConventionARMVIXL calling_convention;
1646 locations->SetInAt(0, Location::RequiresRegister());
1647 locations->SetInAt(1, Location::RequiresRegister());
1648 // Temporary registers to store lengths of strings and for calculations.
1649 // Using instruction cbz requires a low register, so explicitly set a temp to be R0.
1650 locations->AddTemp(LocationFrom(r0));
1651 locations->AddTemp(Location::RequiresRegister());
1652 locations->AddTemp(Location::RequiresRegister());
1653
1654 locations->SetOut(Location::RequiresRegister());
1655}
1656
1657void IntrinsicCodeGeneratorARMVIXL::VisitStringEquals(HInvoke* invoke) {
1658 ArmVIXLAssembler* assembler = GetAssembler();
1659 LocationSummary* locations = invoke->GetLocations();
1660
1661 vixl32::Register str = InputRegisterAt(invoke, 0);
1662 vixl32::Register arg = InputRegisterAt(invoke, 1);
1663 vixl32::Register out = OutputRegister(invoke);
1664
1665 vixl32::Register temp = RegisterFrom(locations->GetTemp(0));
1666 vixl32::Register temp1 = RegisterFrom(locations->GetTemp(1));
1667 vixl32::Register temp2 = RegisterFrom(locations->GetTemp(2));
1668
Vladimir Markofdaf0f42016-10-13 19:29:53 +01001669 vixl32::Label loop;
Anton Kirilov5ec62182016-10-13 20:16:02 +01001670 vixl32::Label end;
1671 vixl32::Label return_true;
1672 vixl32::Label return_false;
1673
1674 // Get offsets of count, value, and class fields within a string object.
1675 const uint32_t count_offset = mirror::String::CountOffset().Uint32Value();
1676 const uint32_t value_offset = mirror::String::ValueOffset().Uint32Value();
1677 const uint32_t class_offset = mirror::Object::ClassOffset().Uint32Value();
1678
1679 // Note that the null check must have been done earlier.
1680 DCHECK(!invoke->CanDoImplicitNullCheckOn(invoke->InputAt(0)));
1681
1682 StringEqualsOptimizations optimizations(invoke);
1683 if (!optimizations.GetArgumentNotNull()) {
1684 // Check if input is null, return false if it is.
xueliang.zhongf51bc622016-11-04 09:23:32 +00001685 __ CompareAndBranchIfZero(arg, &return_false, /* far_target */ false);
Anton Kirilov5ec62182016-10-13 20:16:02 +01001686 }
1687
Vladimir Markofdaf0f42016-10-13 19:29:53 +01001688 // Reference equality check, return true if same reference.
1689 __ Cmp(str, arg);
Artem Serov517d9f62016-12-12 15:51:15 +00001690 __ B(eq, &return_true, /* far_target */ false);
Vladimir Markofdaf0f42016-10-13 19:29:53 +01001691
Anton Kirilov5ec62182016-10-13 20:16:02 +01001692 if (!optimizations.GetArgumentIsString()) {
1693 // Instanceof check for the argument by comparing class fields.
1694 // All string objects must have the same type since String cannot be subclassed.
1695 // Receiver must be a string object, so its class field is equal to all strings' class fields.
1696 // If the argument is a string object, its class field must be equal to receiver's class field.
1697 __ Ldr(temp, MemOperand(str, class_offset));
1698 __ Ldr(temp1, MemOperand(arg, class_offset));
1699 __ Cmp(temp, temp1);
Artem Serov517d9f62016-12-12 15:51:15 +00001700 __ B(ne, &return_false, /* far_target */ false);
Anton Kirilov5ec62182016-10-13 20:16:02 +01001701 }
1702
Vladimir Markofdaf0f42016-10-13 19:29:53 +01001703 // Load `count` fields of this and argument strings.
Anton Kirilov5ec62182016-10-13 20:16:02 +01001704 __ Ldr(temp, MemOperand(str, count_offset));
1705 __ Ldr(temp1, MemOperand(arg, count_offset));
Vladimir Markofdaf0f42016-10-13 19:29:53 +01001706 // Check if `count` fields are equal, return false if they're not.
Anton Kirilov5ec62182016-10-13 20:16:02 +01001707 // Also compares the compression style, if differs return false.
1708 __ Cmp(temp, temp1);
Artem Serov517d9f62016-12-12 15:51:15 +00001709 __ B(ne, &return_false, /* far_target */ false);
Vladimir Markofdaf0f42016-10-13 19:29:53 +01001710 // Return true if both strings are empty. Even with string compression `count == 0` means empty.
1711 static_assert(static_cast<uint32_t>(mirror::StringCompressionFlag::kCompressed) == 0u,
1712 "Expecting 0=compressed, 1=uncompressed");
xueliang.zhongf51bc622016-11-04 09:23:32 +00001713 __ CompareAndBranchIfZero(temp, &return_true, /* far_target */ false);
Anton Kirilov5ec62182016-10-13 20:16:02 +01001714
Vladimir Markofdaf0f42016-10-13 19:29:53 +01001715 // Assertions that must hold in order to compare strings 4 bytes at a time.
Anton Kirilov5ec62182016-10-13 20:16:02 +01001716 DCHECK_ALIGNED(value_offset, 4);
1717 static_assert(IsAligned<4>(kObjectAlignment), "String data must be aligned for fast compare.");
1718
1719 if (mirror::kUseStringCompression) {
Vladimir Markofdaf0f42016-10-13 19:29:53 +01001720 // For string compression, calculate the number of bytes to compare (not chars).
1721 // This could in theory exceed INT32_MAX, so treat temp as unsigned.
1722 __ Lsrs(temp, temp, 1u); // Extract length and check compression flag.
Artem Serov0fb37192016-12-06 18:13:40 +00001723 ExactAssemblyScope aas(assembler->GetVIXLAssembler(),
1724 2 * kMaxInstructionSizeInBytes,
1725 CodeBufferCheckScope::kMaximumSize);
Vladimir Markofdaf0f42016-10-13 19:29:53 +01001726 __ it(cs); // If uncompressed,
1727 __ add(cs, temp, temp, temp); // double the byte count.
Anton Kirilov5ec62182016-10-13 20:16:02 +01001728 }
Vladimir Markofdaf0f42016-10-13 19:29:53 +01001729
1730 // Store offset of string value in preparation for comparison loop.
Anton Kirilov5ec62182016-10-13 20:16:02 +01001731 __ Mov(temp1, value_offset);
Vladimir Markofdaf0f42016-10-13 19:29:53 +01001732
1733 // Loop to compare strings 4 bytes at a time starting at the front of the string.
1734 // Ok to do this because strings are zero-padded to kObjectAlignment.
Anton Kirilov5ec62182016-10-13 20:16:02 +01001735 __ Bind(&loop);
1736 __ Ldr(out, MemOperand(str, temp1));
1737 __ Ldr(temp2, MemOperand(arg, temp1));
Scott Wakelingb77051e2016-11-21 19:46:00 +00001738 __ Add(temp1, temp1, Operand::From(sizeof(uint32_t)));
Anton Kirilov5ec62182016-10-13 20:16:02 +01001739 __ Cmp(out, temp2);
Artem Serov517d9f62016-12-12 15:51:15 +00001740 __ B(ne, &return_false, /* far_target */ false);
Vladimir Markofdaf0f42016-10-13 19:29:53 +01001741 // With string compression, we have compared 4 bytes, otherwise 2 chars.
1742 __ Subs(temp, temp, mirror::kUseStringCompression ? 4 : 2);
Artem Serov517d9f62016-12-12 15:51:15 +00001743 __ B(hi, &loop, /* far_target */ false);
Anton Kirilov5ec62182016-10-13 20:16:02 +01001744
1745 // Return true and exit the function.
1746 // If loop does not result in returning false, we return true.
1747 __ Bind(&return_true);
1748 __ Mov(out, 1);
1749 __ B(&end);
1750
1751 // Return false and exit the function.
1752 __ Bind(&return_false);
1753 __ Mov(out, 0);
1754 __ Bind(&end);
1755}
1756
1757static void GenerateVisitStringIndexOf(HInvoke* invoke,
1758 ArmVIXLAssembler* assembler,
1759 CodeGeneratorARMVIXL* codegen,
1760 ArenaAllocator* allocator,
1761 bool start_at_zero) {
1762 LocationSummary* locations = invoke->GetLocations();
1763
1764 // Note that the null check must have been done earlier.
1765 DCHECK(!invoke->CanDoImplicitNullCheckOn(invoke->InputAt(0)));
1766
1767 // Check for code points > 0xFFFF. Either a slow-path check when we don't know statically,
1768 // or directly dispatch for a large constant, or omit slow-path for a small constant or a char.
1769 SlowPathCodeARMVIXL* slow_path = nullptr;
1770 HInstruction* code_point = invoke->InputAt(1);
1771 if (code_point->IsIntConstant()) {
Anton Kirilov644032c2016-12-06 17:51:43 +00001772 if (static_cast<uint32_t>(Int32ConstantFrom(code_point)) >
Anton Kirilov5ec62182016-10-13 20:16:02 +01001773 std::numeric_limits<uint16_t>::max()) {
1774 // Always needs the slow-path. We could directly dispatch to it, but this case should be
1775 // rare, so for simplicity just put the full slow-path down and branch unconditionally.
1776 slow_path = new (allocator) IntrinsicSlowPathARMVIXL(invoke);
1777 codegen->AddSlowPath(slow_path);
1778 __ B(slow_path->GetEntryLabel());
1779 __ Bind(slow_path->GetExitLabel());
1780 return;
1781 }
1782 } else if (code_point->GetType() != Primitive::kPrimChar) {
1783 vixl32::Register char_reg = InputRegisterAt(invoke, 1);
1784 // 0xffff is not modified immediate but 0x10000 is, so use `>= 0x10000` instead of `> 0xffff`.
1785 __ Cmp(char_reg, static_cast<uint32_t>(std::numeric_limits<uint16_t>::max()) + 1);
1786 slow_path = new (allocator) IntrinsicSlowPathARMVIXL(invoke);
1787 codegen->AddSlowPath(slow_path);
1788 __ B(hs, slow_path->GetEntryLabel());
1789 }
1790
1791 if (start_at_zero) {
1792 vixl32::Register tmp_reg = RegisterFrom(locations->GetTemp(0));
1793 DCHECK(tmp_reg.Is(r2));
1794 // Start-index = 0.
1795 __ Mov(tmp_reg, 0);
1796 }
1797
1798 codegen->InvokeRuntime(kQuickIndexOf, invoke, invoke->GetDexPc(), slow_path);
1799 CheckEntrypointTypes<kQuickIndexOf, int32_t, void*, uint32_t, uint32_t>();
1800
1801 if (slow_path != nullptr) {
1802 __ Bind(slow_path->GetExitLabel());
1803 }
1804}
1805
1806void IntrinsicLocationsBuilderARMVIXL::VisitStringIndexOf(HInvoke* invoke) {
1807 LocationSummary* locations = new (arena_) LocationSummary(invoke,
1808 LocationSummary::kCallOnMainAndSlowPath,
1809 kIntrinsified);
1810 // We have a hand-crafted assembly stub that follows the runtime calling convention. So it's
1811 // best to align the inputs accordingly.
1812 InvokeRuntimeCallingConventionARMVIXL calling_convention;
1813 locations->SetInAt(0, LocationFrom(calling_convention.GetRegisterAt(0)));
1814 locations->SetInAt(1, LocationFrom(calling_convention.GetRegisterAt(1)));
1815 locations->SetOut(LocationFrom(r0));
1816
1817 // Need to send start-index=0.
1818 locations->AddTemp(LocationFrom(calling_convention.GetRegisterAt(2)));
1819}
1820
1821void IntrinsicCodeGeneratorARMVIXL::VisitStringIndexOf(HInvoke* invoke) {
1822 GenerateVisitStringIndexOf(
1823 invoke, GetAssembler(), codegen_, GetAllocator(), /* start_at_zero */ true);
1824}
1825
1826void IntrinsicLocationsBuilderARMVIXL::VisitStringIndexOfAfter(HInvoke* invoke) {
1827 LocationSummary* locations = new (arena_) LocationSummary(invoke,
1828 LocationSummary::kCallOnMainAndSlowPath,
1829 kIntrinsified);
1830 // We have a hand-crafted assembly stub that follows the runtime calling convention. So it's
1831 // best to align the inputs accordingly.
1832 InvokeRuntimeCallingConventionARMVIXL calling_convention;
1833 locations->SetInAt(0, LocationFrom(calling_convention.GetRegisterAt(0)));
1834 locations->SetInAt(1, LocationFrom(calling_convention.GetRegisterAt(1)));
1835 locations->SetInAt(2, LocationFrom(calling_convention.GetRegisterAt(2)));
1836 locations->SetOut(LocationFrom(r0));
1837}
1838
1839void IntrinsicCodeGeneratorARMVIXL::VisitStringIndexOfAfter(HInvoke* invoke) {
1840 GenerateVisitStringIndexOf(
1841 invoke, GetAssembler(), codegen_, GetAllocator(), /* start_at_zero */ false);
1842}
1843
1844void IntrinsicLocationsBuilderARMVIXL::VisitStringNewStringFromBytes(HInvoke* invoke) {
1845 LocationSummary* locations = new (arena_) LocationSummary(invoke,
1846 LocationSummary::kCallOnMainAndSlowPath,
1847 kIntrinsified);
1848 InvokeRuntimeCallingConventionARMVIXL calling_convention;
1849 locations->SetInAt(0, LocationFrom(calling_convention.GetRegisterAt(0)));
1850 locations->SetInAt(1, LocationFrom(calling_convention.GetRegisterAt(1)));
1851 locations->SetInAt(2, LocationFrom(calling_convention.GetRegisterAt(2)));
1852 locations->SetInAt(3, LocationFrom(calling_convention.GetRegisterAt(3)));
1853 locations->SetOut(LocationFrom(r0));
1854}
1855
1856void IntrinsicCodeGeneratorARMVIXL::VisitStringNewStringFromBytes(HInvoke* invoke) {
1857 ArmVIXLAssembler* assembler = GetAssembler();
1858 vixl32::Register byte_array = InputRegisterAt(invoke, 0);
1859 __ Cmp(byte_array, 0);
1860 SlowPathCodeARMVIXL* slow_path = new (GetAllocator()) IntrinsicSlowPathARMVIXL(invoke);
1861 codegen_->AddSlowPath(slow_path);
1862 __ B(eq, slow_path->GetEntryLabel());
1863
1864 codegen_->InvokeRuntime(kQuickAllocStringFromBytes, invoke, invoke->GetDexPc(), slow_path);
1865 CheckEntrypointTypes<kQuickAllocStringFromBytes, void*, void*, int32_t, int32_t, int32_t>();
1866 __ Bind(slow_path->GetExitLabel());
1867}
1868
1869void IntrinsicLocationsBuilderARMVIXL::VisitStringNewStringFromChars(HInvoke* invoke) {
1870 LocationSummary* locations = new (arena_) LocationSummary(invoke,
1871 LocationSummary::kCallOnMainOnly,
1872 kIntrinsified);
1873 InvokeRuntimeCallingConventionARMVIXL calling_convention;
1874 locations->SetInAt(0, LocationFrom(calling_convention.GetRegisterAt(0)));
1875 locations->SetInAt(1, LocationFrom(calling_convention.GetRegisterAt(1)));
1876 locations->SetInAt(2, LocationFrom(calling_convention.GetRegisterAt(2)));
1877 locations->SetOut(LocationFrom(r0));
1878}
1879
1880void IntrinsicCodeGeneratorARMVIXL::VisitStringNewStringFromChars(HInvoke* invoke) {
1881 // No need to emit code checking whether `locations->InAt(2)` is a null
1882 // pointer, as callers of the native method
1883 //
1884 // java.lang.StringFactory.newStringFromChars(int offset, int charCount, char[] data)
1885 //
1886 // all include a null check on `data` before calling that method.
1887 codegen_->InvokeRuntime(kQuickAllocStringFromChars, invoke, invoke->GetDexPc());
1888 CheckEntrypointTypes<kQuickAllocStringFromChars, void*, int32_t, int32_t, void*>();
1889}
1890
1891void IntrinsicLocationsBuilderARMVIXL::VisitStringNewStringFromString(HInvoke* invoke) {
1892 LocationSummary* locations = new (arena_) LocationSummary(invoke,
1893 LocationSummary::kCallOnMainAndSlowPath,
1894 kIntrinsified);
1895 InvokeRuntimeCallingConventionARMVIXL calling_convention;
1896 locations->SetInAt(0, LocationFrom(calling_convention.GetRegisterAt(0)));
1897 locations->SetOut(LocationFrom(r0));
1898}
1899
1900void IntrinsicCodeGeneratorARMVIXL::VisitStringNewStringFromString(HInvoke* invoke) {
1901 ArmVIXLAssembler* assembler = GetAssembler();
1902 vixl32::Register string_to_copy = InputRegisterAt(invoke, 0);
1903 __ Cmp(string_to_copy, 0);
1904 SlowPathCodeARMVIXL* slow_path = new (GetAllocator()) IntrinsicSlowPathARMVIXL(invoke);
1905 codegen_->AddSlowPath(slow_path);
1906 __ B(eq, slow_path->GetEntryLabel());
1907
1908 codegen_->InvokeRuntime(kQuickAllocStringFromString, invoke, invoke->GetDexPc(), slow_path);
1909 CheckEntrypointTypes<kQuickAllocStringFromString, void*, void*>();
1910
1911 __ Bind(slow_path->GetExitLabel());
1912}
1913
1914void IntrinsicLocationsBuilderARMVIXL::VisitSystemArrayCopy(HInvoke* invoke) {
1915 // The only read barrier implementation supporting the
1916 // SystemArrayCopy intrinsic is the Baker-style read barriers.
1917 if (kEmitCompilerReadBarrier && !kUseBakerReadBarrier) {
1918 return;
1919 }
1920
1921 CodeGenerator::CreateSystemArrayCopyLocationSummary(invoke);
1922 LocationSummary* locations = invoke->GetLocations();
1923 if (locations == nullptr) {
1924 return;
1925 }
1926
1927 HIntConstant* src_pos = invoke->InputAt(1)->AsIntConstant();
1928 HIntConstant* dest_pos = invoke->InputAt(3)->AsIntConstant();
1929 HIntConstant* length = invoke->InputAt(4)->AsIntConstant();
1930
1931 if (src_pos != nullptr && !assembler_->ShifterOperandCanAlwaysHold(src_pos->GetValue())) {
1932 locations->SetInAt(1, Location::RequiresRegister());
1933 }
1934 if (dest_pos != nullptr && !assembler_->ShifterOperandCanAlwaysHold(dest_pos->GetValue())) {
1935 locations->SetInAt(3, Location::RequiresRegister());
1936 }
1937 if (length != nullptr && !assembler_->ShifterOperandCanAlwaysHold(length->GetValue())) {
1938 locations->SetInAt(4, Location::RequiresRegister());
1939 }
1940 if (kEmitCompilerReadBarrier && kUseBakerReadBarrier) {
1941 // Temporary register IP cannot be used in
1942 // ReadBarrierSystemArrayCopySlowPathARM (because that register
1943 // is clobbered by ReadBarrierMarkRegX entry points). Get an extra
1944 // temporary register from the register allocator.
1945 locations->AddTemp(Location::RequiresRegister());
1946 }
1947}
1948
1949static void CheckPosition(ArmVIXLAssembler* assembler,
1950 Location pos,
1951 vixl32::Register input,
1952 Location length,
1953 SlowPathCodeARMVIXL* slow_path,
1954 vixl32::Register temp,
1955 bool length_is_input_length = false) {
1956 // Where is the length in the Array?
1957 const uint32_t length_offset = mirror::Array::LengthOffset().Uint32Value();
1958
1959 if (pos.IsConstant()) {
1960 int32_t pos_const = Int32ConstantFrom(pos);
1961 if (pos_const == 0) {
1962 if (!length_is_input_length) {
1963 // Check that length(input) >= length.
1964 __ Ldr(temp, MemOperand(input, length_offset));
1965 if (length.IsConstant()) {
1966 __ Cmp(temp, Int32ConstantFrom(length));
1967 } else {
1968 __ Cmp(temp, RegisterFrom(length));
1969 }
1970 __ B(lt, slow_path->GetEntryLabel());
1971 }
1972 } else {
1973 // Check that length(input) >= pos.
1974 __ Ldr(temp, MemOperand(input, length_offset));
1975 __ Subs(temp, temp, pos_const);
1976 __ B(lt, slow_path->GetEntryLabel());
1977
1978 // Check that (length(input) - pos) >= length.
1979 if (length.IsConstant()) {
1980 __ Cmp(temp, Int32ConstantFrom(length));
1981 } else {
1982 __ Cmp(temp, RegisterFrom(length));
1983 }
1984 __ B(lt, slow_path->GetEntryLabel());
1985 }
1986 } else if (length_is_input_length) {
1987 // The only way the copy can succeed is if pos is zero.
1988 vixl32::Register pos_reg = RegisterFrom(pos);
xueliang.zhongf51bc622016-11-04 09:23:32 +00001989 __ CompareAndBranchIfNonZero(pos_reg, slow_path->GetEntryLabel());
Anton Kirilov5ec62182016-10-13 20:16:02 +01001990 } else {
1991 // Check that pos >= 0.
1992 vixl32::Register pos_reg = RegisterFrom(pos);
1993 __ Cmp(pos_reg, 0);
1994 __ B(lt, slow_path->GetEntryLabel());
1995
1996 // Check that pos <= length(input).
1997 __ Ldr(temp, MemOperand(input, length_offset));
1998 __ Subs(temp, temp, pos_reg);
1999 __ B(lt, slow_path->GetEntryLabel());
2000
2001 // Check that (length(input) - pos) >= length.
2002 if (length.IsConstant()) {
2003 __ Cmp(temp, Int32ConstantFrom(length));
2004 } else {
2005 __ Cmp(temp, RegisterFrom(length));
2006 }
2007 __ B(lt, slow_path->GetEntryLabel());
2008 }
2009}
2010
2011void IntrinsicCodeGeneratorARMVIXL::VisitSystemArrayCopy(HInvoke* invoke) {
2012 // The only read barrier implementation supporting the
2013 // SystemArrayCopy intrinsic is the Baker-style read barriers.
2014 DCHECK(!kEmitCompilerReadBarrier || kUseBakerReadBarrier);
2015
2016 ArmVIXLAssembler* assembler = GetAssembler();
2017 LocationSummary* locations = invoke->GetLocations();
2018
2019 uint32_t class_offset = mirror::Object::ClassOffset().Int32Value();
2020 uint32_t super_offset = mirror::Class::SuperClassOffset().Int32Value();
2021 uint32_t component_offset = mirror::Class::ComponentTypeOffset().Int32Value();
2022 uint32_t primitive_offset = mirror::Class::PrimitiveTypeOffset().Int32Value();
2023 uint32_t monitor_offset = mirror::Object::MonitorOffset().Int32Value();
2024
2025 vixl32::Register src = InputRegisterAt(invoke, 0);
2026 Location src_pos = locations->InAt(1);
2027 vixl32::Register dest = InputRegisterAt(invoke, 2);
2028 Location dest_pos = locations->InAt(3);
2029 Location length = locations->InAt(4);
2030 Location temp1_loc = locations->GetTemp(0);
2031 vixl32::Register temp1 = RegisterFrom(temp1_loc);
2032 Location temp2_loc = locations->GetTemp(1);
2033 vixl32::Register temp2 = RegisterFrom(temp2_loc);
2034 Location temp3_loc = locations->GetTemp(2);
2035 vixl32::Register temp3 = RegisterFrom(temp3_loc);
2036
2037 SlowPathCodeARMVIXL* intrinsic_slow_path = new (GetAllocator()) IntrinsicSlowPathARMVIXL(invoke);
2038 codegen_->AddSlowPath(intrinsic_slow_path);
2039
2040 vixl32::Label conditions_on_positions_validated;
2041 SystemArrayCopyOptimizations optimizations(invoke);
2042
2043 // If source and destination are the same, we go to slow path if we need to do
2044 // forward copying.
2045 if (src_pos.IsConstant()) {
2046 int32_t src_pos_constant = Int32ConstantFrom(src_pos);
2047 if (dest_pos.IsConstant()) {
2048 int32_t dest_pos_constant = Int32ConstantFrom(dest_pos);
2049 if (optimizations.GetDestinationIsSource()) {
2050 // Checked when building locations.
2051 DCHECK_GE(src_pos_constant, dest_pos_constant);
2052 } else if (src_pos_constant < dest_pos_constant) {
2053 __ Cmp(src, dest);
2054 __ B(eq, intrinsic_slow_path->GetEntryLabel());
2055 }
2056
2057 // Checked when building locations.
2058 DCHECK(!optimizations.GetDestinationIsSource()
2059 || (src_pos_constant >= Int32ConstantFrom(dest_pos)));
2060 } else {
2061 if (!optimizations.GetDestinationIsSource()) {
2062 __ Cmp(src, dest);
Artem Serov517d9f62016-12-12 15:51:15 +00002063 __ B(ne, &conditions_on_positions_validated, /* far_target */ false);
Anton Kirilov5ec62182016-10-13 20:16:02 +01002064 }
2065 __ Cmp(RegisterFrom(dest_pos), src_pos_constant);
2066 __ B(gt, intrinsic_slow_path->GetEntryLabel());
2067 }
2068 } else {
2069 if (!optimizations.GetDestinationIsSource()) {
2070 __ Cmp(src, dest);
Artem Serov517d9f62016-12-12 15:51:15 +00002071 __ B(ne, &conditions_on_positions_validated, /* far_target */ false);
Anton Kirilov5ec62182016-10-13 20:16:02 +01002072 }
2073 if (dest_pos.IsConstant()) {
2074 int32_t dest_pos_constant = Int32ConstantFrom(dest_pos);
2075 __ Cmp(RegisterFrom(src_pos), dest_pos_constant);
2076 } else {
2077 __ Cmp(RegisterFrom(src_pos), RegisterFrom(dest_pos));
2078 }
2079 __ B(lt, intrinsic_slow_path->GetEntryLabel());
2080 }
2081
2082 __ Bind(&conditions_on_positions_validated);
2083
2084 if (!optimizations.GetSourceIsNotNull()) {
2085 // Bail out if the source is null.
xueliang.zhongf51bc622016-11-04 09:23:32 +00002086 __ CompareAndBranchIfZero(src, intrinsic_slow_path->GetEntryLabel());
Anton Kirilov5ec62182016-10-13 20:16:02 +01002087 }
2088
2089 if (!optimizations.GetDestinationIsNotNull() && !optimizations.GetDestinationIsSource()) {
2090 // Bail out if the destination is null.
xueliang.zhongf51bc622016-11-04 09:23:32 +00002091 __ CompareAndBranchIfZero(dest, intrinsic_slow_path->GetEntryLabel());
Anton Kirilov5ec62182016-10-13 20:16:02 +01002092 }
2093
2094 // If the length is negative, bail out.
2095 // We have already checked in the LocationsBuilder for the constant case.
2096 if (!length.IsConstant() &&
2097 !optimizations.GetCountIsSourceLength() &&
2098 !optimizations.GetCountIsDestinationLength()) {
2099 __ Cmp(RegisterFrom(length), 0);
2100 __ B(lt, intrinsic_slow_path->GetEntryLabel());
2101 }
2102
2103 // Validity checks: source.
2104 CheckPosition(assembler,
2105 src_pos,
2106 src,
2107 length,
2108 intrinsic_slow_path,
2109 temp1,
2110 optimizations.GetCountIsSourceLength());
2111
2112 // Validity checks: dest.
2113 CheckPosition(assembler,
2114 dest_pos,
2115 dest,
2116 length,
2117 intrinsic_slow_path,
2118 temp1,
2119 optimizations.GetCountIsDestinationLength());
2120
2121 if (!optimizations.GetDoesNotNeedTypeCheck()) {
2122 // Check whether all elements of the source array are assignable to the component
2123 // type of the destination array. We do two checks: the classes are the same,
2124 // or the destination is Object[]. If none of these checks succeed, we go to the
2125 // slow path.
2126
2127 if (kEmitCompilerReadBarrier && kUseBakerReadBarrier) {
2128 if (!optimizations.GetSourceIsNonPrimitiveArray()) {
2129 // /* HeapReference<Class> */ temp1 = src->klass_
2130 codegen_->GenerateFieldLoadWithBakerReadBarrier(
2131 invoke, temp1_loc, src, class_offset, temp2_loc, /* needs_null_check */ false);
2132 // Bail out if the source is not a non primitive array.
2133 // /* HeapReference<Class> */ temp1 = temp1->component_type_
2134 codegen_->GenerateFieldLoadWithBakerReadBarrier(
2135 invoke, temp1_loc, temp1, component_offset, temp2_loc, /* needs_null_check */ false);
xueliang.zhongf51bc622016-11-04 09:23:32 +00002136 __ CompareAndBranchIfZero(temp1, intrinsic_slow_path->GetEntryLabel());
Anton Kirilov5ec62182016-10-13 20:16:02 +01002137 // If heap poisoning is enabled, `temp1` has been unpoisoned
2138 // by the the previous call to GenerateFieldLoadWithBakerReadBarrier.
2139 // /* uint16_t */ temp1 = static_cast<uint16>(temp1->primitive_type_);
2140 __ Ldrh(temp1, MemOperand(temp1, primitive_offset));
2141 static_assert(Primitive::kPrimNot == 0, "Expected 0 for kPrimNot");
xueliang.zhongf51bc622016-11-04 09:23:32 +00002142 __ CompareAndBranchIfNonZero(temp1, intrinsic_slow_path->GetEntryLabel());
Anton Kirilov5ec62182016-10-13 20:16:02 +01002143 }
2144
2145 // /* HeapReference<Class> */ temp1 = dest->klass_
2146 codegen_->GenerateFieldLoadWithBakerReadBarrier(
2147 invoke, temp1_loc, dest, class_offset, temp2_loc, /* needs_null_check */ false);
2148
2149 if (!optimizations.GetDestinationIsNonPrimitiveArray()) {
2150 // Bail out if the destination is not a non primitive array.
2151 //
2152 // Register `temp1` is not trashed by the read barrier emitted
2153 // by GenerateFieldLoadWithBakerReadBarrier below, as that
2154 // method produces a call to a ReadBarrierMarkRegX entry point,
2155 // which saves all potentially live registers, including
2156 // temporaries such a `temp1`.
2157 // /* HeapReference<Class> */ temp2 = temp1->component_type_
2158 codegen_->GenerateFieldLoadWithBakerReadBarrier(
2159 invoke, temp2_loc, temp1, component_offset, temp3_loc, /* needs_null_check */ false);
xueliang.zhongf51bc622016-11-04 09:23:32 +00002160 __ CompareAndBranchIfZero(temp2, intrinsic_slow_path->GetEntryLabel());
Anton Kirilov5ec62182016-10-13 20:16:02 +01002161 // If heap poisoning is enabled, `temp2` has been unpoisoned
2162 // by the the previous call to GenerateFieldLoadWithBakerReadBarrier.
2163 // /* uint16_t */ temp2 = static_cast<uint16>(temp2->primitive_type_);
2164 __ Ldrh(temp2, MemOperand(temp2, primitive_offset));
2165 static_assert(Primitive::kPrimNot == 0, "Expected 0 for kPrimNot");
xueliang.zhongf51bc622016-11-04 09:23:32 +00002166 __ CompareAndBranchIfNonZero(temp2, intrinsic_slow_path->GetEntryLabel());
Anton Kirilov5ec62182016-10-13 20:16:02 +01002167 }
2168
2169 // For the same reason given earlier, `temp1` is not trashed by the
2170 // read barrier emitted by GenerateFieldLoadWithBakerReadBarrier below.
2171 // /* HeapReference<Class> */ temp2 = src->klass_
2172 codegen_->GenerateFieldLoadWithBakerReadBarrier(
2173 invoke, temp2_loc, src, class_offset, temp3_loc, /* needs_null_check */ false);
2174 // Note: if heap poisoning is on, we are comparing two unpoisoned references here.
2175 __ Cmp(temp1, temp2);
2176
2177 if (optimizations.GetDestinationIsTypedObjectArray()) {
2178 vixl32::Label do_copy;
Artem Serov517d9f62016-12-12 15:51:15 +00002179 __ B(eq, &do_copy, /* far_target */ false);
Anton Kirilov5ec62182016-10-13 20:16:02 +01002180 // /* HeapReference<Class> */ temp1 = temp1->component_type_
2181 codegen_->GenerateFieldLoadWithBakerReadBarrier(
2182 invoke, temp1_loc, temp1, component_offset, temp2_loc, /* needs_null_check */ false);
2183 // /* HeapReference<Class> */ temp1 = temp1->super_class_
2184 // We do not need to emit a read barrier for the following
2185 // heap reference load, as `temp1` is only used in a
2186 // comparison with null below, and this reference is not
2187 // kept afterwards.
2188 __ Ldr(temp1, MemOperand(temp1, super_offset));
xueliang.zhongf51bc622016-11-04 09:23:32 +00002189 __ CompareAndBranchIfNonZero(temp1, intrinsic_slow_path->GetEntryLabel());
Anton Kirilov5ec62182016-10-13 20:16:02 +01002190 __ Bind(&do_copy);
2191 } else {
2192 __ B(ne, intrinsic_slow_path->GetEntryLabel());
2193 }
2194 } else {
2195 // Non read barrier code.
2196
2197 // /* HeapReference<Class> */ temp1 = dest->klass_
2198 __ Ldr(temp1, MemOperand(dest, class_offset));
2199 // /* HeapReference<Class> */ temp2 = src->klass_
2200 __ Ldr(temp2, MemOperand(src, class_offset));
2201 bool did_unpoison = false;
2202 if (!optimizations.GetDestinationIsNonPrimitiveArray() ||
2203 !optimizations.GetSourceIsNonPrimitiveArray()) {
2204 // One or two of the references need to be unpoisoned. Unpoison them
2205 // both to make the identity check valid.
2206 assembler->MaybeUnpoisonHeapReference(temp1);
2207 assembler->MaybeUnpoisonHeapReference(temp2);
2208 did_unpoison = true;
2209 }
2210
2211 if (!optimizations.GetDestinationIsNonPrimitiveArray()) {
2212 // Bail out if the destination is not a non primitive array.
2213 // /* HeapReference<Class> */ temp3 = temp1->component_type_
2214 __ Ldr(temp3, MemOperand(temp1, component_offset));
xueliang.zhongf51bc622016-11-04 09:23:32 +00002215 __ CompareAndBranchIfZero(temp3, intrinsic_slow_path->GetEntryLabel());
Anton Kirilov5ec62182016-10-13 20:16:02 +01002216 assembler->MaybeUnpoisonHeapReference(temp3);
2217 // /* uint16_t */ temp3 = static_cast<uint16>(temp3->primitive_type_);
2218 __ Ldrh(temp3, MemOperand(temp3, primitive_offset));
2219 static_assert(Primitive::kPrimNot == 0, "Expected 0 for kPrimNot");
xueliang.zhongf51bc622016-11-04 09:23:32 +00002220 __ CompareAndBranchIfNonZero(temp3, intrinsic_slow_path->GetEntryLabel());
Anton Kirilov5ec62182016-10-13 20:16:02 +01002221 }
2222
2223 if (!optimizations.GetSourceIsNonPrimitiveArray()) {
2224 // Bail out if the source is not a non primitive array.
2225 // /* HeapReference<Class> */ temp3 = temp2->component_type_
2226 __ Ldr(temp3, MemOperand(temp2, component_offset));
xueliang.zhongf51bc622016-11-04 09:23:32 +00002227 __ CompareAndBranchIfZero(temp3, intrinsic_slow_path->GetEntryLabel());
Anton Kirilov5ec62182016-10-13 20:16:02 +01002228 assembler->MaybeUnpoisonHeapReference(temp3);
2229 // /* uint16_t */ temp3 = static_cast<uint16>(temp3->primitive_type_);
2230 __ Ldrh(temp3, MemOperand(temp3, primitive_offset));
2231 static_assert(Primitive::kPrimNot == 0, "Expected 0 for kPrimNot");
xueliang.zhongf51bc622016-11-04 09:23:32 +00002232 __ CompareAndBranchIfNonZero(temp3, intrinsic_slow_path->GetEntryLabel());
Anton Kirilov5ec62182016-10-13 20:16:02 +01002233 }
2234
2235 __ Cmp(temp1, temp2);
2236
2237 if (optimizations.GetDestinationIsTypedObjectArray()) {
2238 vixl32::Label do_copy;
Artem Serov517d9f62016-12-12 15:51:15 +00002239 __ B(eq, &do_copy, /* far_target */ false);
Anton Kirilov5ec62182016-10-13 20:16:02 +01002240 if (!did_unpoison) {
2241 assembler->MaybeUnpoisonHeapReference(temp1);
2242 }
2243 // /* HeapReference<Class> */ temp1 = temp1->component_type_
2244 __ Ldr(temp1, MemOperand(temp1, component_offset));
2245 assembler->MaybeUnpoisonHeapReference(temp1);
2246 // /* HeapReference<Class> */ temp1 = temp1->super_class_
2247 __ Ldr(temp1, MemOperand(temp1, super_offset));
2248 // No need to unpoison the result, we're comparing against null.
xueliang.zhongf51bc622016-11-04 09:23:32 +00002249 __ CompareAndBranchIfNonZero(temp1, intrinsic_slow_path->GetEntryLabel());
Anton Kirilov5ec62182016-10-13 20:16:02 +01002250 __ Bind(&do_copy);
2251 } else {
2252 __ B(ne, intrinsic_slow_path->GetEntryLabel());
2253 }
2254 }
2255 } else if (!optimizations.GetSourceIsNonPrimitiveArray()) {
2256 DCHECK(optimizations.GetDestinationIsNonPrimitiveArray());
2257 // Bail out if the source is not a non primitive array.
2258 if (kEmitCompilerReadBarrier && kUseBakerReadBarrier) {
2259 // /* HeapReference<Class> */ temp1 = src->klass_
2260 codegen_->GenerateFieldLoadWithBakerReadBarrier(
2261 invoke, temp1_loc, src, class_offset, temp2_loc, /* needs_null_check */ false);
2262 // /* HeapReference<Class> */ temp3 = temp1->component_type_
2263 codegen_->GenerateFieldLoadWithBakerReadBarrier(
2264 invoke, temp3_loc, temp1, component_offset, temp2_loc, /* needs_null_check */ false);
xueliang.zhongf51bc622016-11-04 09:23:32 +00002265 __ CompareAndBranchIfZero(temp3, intrinsic_slow_path->GetEntryLabel());
Anton Kirilov5ec62182016-10-13 20:16:02 +01002266 // If heap poisoning is enabled, `temp3` has been unpoisoned
2267 // by the the previous call to GenerateFieldLoadWithBakerReadBarrier.
2268 } else {
2269 // /* HeapReference<Class> */ temp1 = src->klass_
2270 __ Ldr(temp1, MemOperand(src, class_offset));
2271 assembler->MaybeUnpoisonHeapReference(temp1);
2272 // /* HeapReference<Class> */ temp3 = temp1->component_type_
2273 __ Ldr(temp3, MemOperand(temp1, component_offset));
xueliang.zhongf51bc622016-11-04 09:23:32 +00002274 __ CompareAndBranchIfZero(temp3, intrinsic_slow_path->GetEntryLabel());
Anton Kirilov5ec62182016-10-13 20:16:02 +01002275 assembler->MaybeUnpoisonHeapReference(temp3);
2276 }
2277 // /* uint16_t */ temp3 = static_cast<uint16>(temp3->primitive_type_);
2278 __ Ldrh(temp3, MemOperand(temp3, primitive_offset));
2279 static_assert(Primitive::kPrimNot == 0, "Expected 0 for kPrimNot");
xueliang.zhongf51bc622016-11-04 09:23:32 +00002280 __ CompareAndBranchIfNonZero(temp3, intrinsic_slow_path->GetEntryLabel());
Anton Kirilov5ec62182016-10-13 20:16:02 +01002281 }
2282
Roland Levillain9cc0ea82017-03-16 11:25:59 +00002283 const Primitive::Type type = Primitive::kPrimNot;
2284 const int32_t element_size = Primitive::ComponentSize(type);
Anton Kirilov5ec62182016-10-13 20:16:02 +01002285
2286 // Compute the base source address in `temp1`.
Roland Levillain9cc0ea82017-03-16 11:25:59 +00002287 GenSystemArrayCopyBaseAddress(GetAssembler(), type, src, src_pos, temp1);
Anton Kirilov5ec62182016-10-13 20:16:02 +01002288 // Compute the end source address in `temp3`.
Roland Levillain9cc0ea82017-03-16 11:25:59 +00002289 GenSystemArrayCopyEndAddress(GetAssembler(), type, length, temp1, temp3);
2290 // The base destination address is computed later, as `temp2` is
2291 // used for intermediate computations.
Anton Kirilov5ec62182016-10-13 20:16:02 +01002292
2293 if (kEmitCompilerReadBarrier && kUseBakerReadBarrier) {
Roland Levillainba650a42017-03-06 13:52:32 +00002294 // TODO: Also convert this intrinsic to the IsGcMarking strategy?
2295
Anton Kirilov5ec62182016-10-13 20:16:02 +01002296 // SystemArrayCopy implementation for Baker read barriers (see
2297 // also CodeGeneratorARM::GenerateReferenceLoadWithBakerReadBarrier):
2298 //
2299 // if (src_ptr != end_ptr) {
2300 // uint32_t rb_state = Lockword(src->monitor_).ReadBarrierState();
2301 // lfence; // Load fence or artificial data dependency to prevent load-load reordering
Roland Levillain4bbca2a2016-11-03 18:09:18 +00002302 // bool is_gray = (rb_state == ReadBarrier::GrayState());
Anton Kirilov5ec62182016-10-13 20:16:02 +01002303 // if (is_gray) {
2304 // // Slow-path copy.
2305 // do {
2306 // *dest_ptr++ = MaybePoison(ReadBarrier::Mark(MaybeUnpoison(*src_ptr++)));
2307 // } while (src_ptr != end_ptr)
2308 // } else {
2309 // // Fast-path copy.
2310 // do {
2311 // *dest_ptr++ = *src_ptr++;
2312 // } while (src_ptr != end_ptr)
2313 // }
2314 // }
2315
2316 vixl32::Label loop, done;
2317
2318 // Don't enter copy loop if `length == 0`.
2319 __ Cmp(temp1, temp3);
Artem Serov517d9f62016-12-12 15:51:15 +00002320 __ B(eq, &done, /* far_target */ false);
Anton Kirilov5ec62182016-10-13 20:16:02 +01002321
2322 // /* int32_t */ monitor = src->monitor_
2323 __ Ldr(temp2, MemOperand(src, monitor_offset));
2324 // /* LockWord */ lock_word = LockWord(monitor)
2325 static_assert(sizeof(LockWord) == sizeof(int32_t),
2326 "art::LockWord and int32_t have different sizes.");
2327
2328 // Introduce a dependency on the lock_word including the rb_state,
2329 // which shall prevent load-load reordering without using
2330 // a memory barrier (which would be more expensive).
2331 // `src` is unchanged by this operation, but its value now depends
2332 // on `temp2`.
2333 __ Add(src, src, Operand(temp2, vixl32::LSR, 32));
2334
2335 // Slow path used to copy array when `src` is gray.
Roland Levillain9cc0ea82017-03-16 11:25:59 +00002336 // Note that the base destination address is computed in `temp2`
2337 // by the slow path code.
Anton Kirilov5ec62182016-10-13 20:16:02 +01002338 SlowPathCodeARMVIXL* read_barrier_slow_path =
2339 new (GetAllocator()) ReadBarrierSystemArrayCopySlowPathARMVIXL(invoke);
2340 codegen_->AddSlowPath(read_barrier_slow_path);
2341
2342 // Given the numeric representation, it's enough to check the low bit of the
2343 // rb_state. We do that by shifting the bit out of the lock word with LSRS
2344 // which can be a 16-bit instruction unlike the TST immediate.
Roland Levillain4bbca2a2016-11-03 18:09:18 +00002345 static_assert(ReadBarrier::WhiteState() == 0, "Expecting white to have value 0");
2346 static_assert(ReadBarrier::GrayState() == 1, "Expecting gray to have value 1");
Anton Kirilov5ec62182016-10-13 20:16:02 +01002347 __ Lsrs(temp2, temp2, LockWord::kReadBarrierStateShift + 1);
2348 // Carry flag is the last bit shifted out by LSRS.
2349 __ B(cs, read_barrier_slow_path->GetEntryLabel());
2350
2351 // Fast-path copy.
Anton Kirilov5ec62182016-10-13 20:16:02 +01002352 // Compute the base destination address in `temp2`.
Roland Levillain9cc0ea82017-03-16 11:25:59 +00002353 GenSystemArrayCopyBaseAddress(GetAssembler(), type, dest, dest_pos, temp2);
Anton Kirilov5ec62182016-10-13 20:16:02 +01002354 // Iterate over the arrays and do a raw copy of the objects. We don't need to
2355 // poison/unpoison.
2356 __ Bind(&loop);
Anton Kirilov5ec62182016-10-13 20:16:02 +01002357 {
2358 UseScratchRegisterScope temps(assembler->GetVIXLAssembler());
2359 const vixl32::Register temp_reg = temps.Acquire();
Anton Kirilov5ec62182016-10-13 20:16:02 +01002360 __ Ldr(temp_reg, MemOperand(temp1, element_size, PostIndex));
2361 __ Str(temp_reg, MemOperand(temp2, element_size, PostIndex));
2362 }
Anton Kirilov5ec62182016-10-13 20:16:02 +01002363 __ Cmp(temp1, temp3);
Artem Serov517d9f62016-12-12 15:51:15 +00002364 __ B(ne, &loop, /* far_target */ false);
Anton Kirilov5ec62182016-10-13 20:16:02 +01002365
2366 __ Bind(read_barrier_slow_path->GetExitLabel());
2367 __ Bind(&done);
2368 } else {
2369 // Non read barrier code.
Anton Kirilov5ec62182016-10-13 20:16:02 +01002370 // Compute the base destination address in `temp2`.
Roland Levillain9cc0ea82017-03-16 11:25:59 +00002371 GenSystemArrayCopyBaseAddress(GetAssembler(), type, dest, dest_pos, temp2);
Anton Kirilov5ec62182016-10-13 20:16:02 +01002372 // Iterate over the arrays and do a raw copy of the objects. We don't need to
2373 // poison/unpoison.
2374 vixl32::Label loop, done;
2375 __ Cmp(temp1, temp3);
Artem Serov517d9f62016-12-12 15:51:15 +00002376 __ B(eq, &done, /* far_target */ false);
Anton Kirilov5ec62182016-10-13 20:16:02 +01002377 __ Bind(&loop);
Anton Kirilov5ec62182016-10-13 20:16:02 +01002378 {
2379 UseScratchRegisterScope temps(assembler->GetVIXLAssembler());
2380 const vixl32::Register temp_reg = temps.Acquire();
Anton Kirilov5ec62182016-10-13 20:16:02 +01002381 __ Ldr(temp_reg, MemOperand(temp1, element_size, PostIndex));
2382 __ Str(temp_reg, MemOperand(temp2, element_size, PostIndex));
2383 }
Anton Kirilov5ec62182016-10-13 20:16:02 +01002384 __ Cmp(temp1, temp3);
Artem Serov517d9f62016-12-12 15:51:15 +00002385 __ B(ne, &loop, /* far_target */ false);
Anton Kirilov5ec62182016-10-13 20:16:02 +01002386 __ Bind(&done);
2387 }
2388
2389 // We only need one card marking on the destination array.
2390 codegen_->MarkGCCard(temp1, temp2, dest, NoReg, /* value_can_be_null */ false);
2391
2392 __ Bind(intrinsic_slow_path->GetExitLabel());
2393}
2394
2395static void CreateFPToFPCallLocations(ArenaAllocator* arena, HInvoke* invoke) {
2396 // If the graph is debuggable, all callee-saved floating-point registers are blocked by
2397 // the code generator. Furthermore, the register allocator creates fixed live intervals
2398 // for all caller-saved registers because we are doing a function call. As a result, if
2399 // the input and output locations are unallocated, the register allocator runs out of
2400 // registers and fails; however, a debuggable graph is not the common case.
2401 if (invoke->GetBlock()->GetGraph()->IsDebuggable()) {
2402 return;
2403 }
2404
2405 DCHECK_EQ(invoke->GetNumberOfArguments(), 1U);
2406 DCHECK_EQ(invoke->InputAt(0)->GetType(), Primitive::kPrimDouble);
2407 DCHECK_EQ(invoke->GetType(), Primitive::kPrimDouble);
2408
2409 LocationSummary* const locations = new (arena) LocationSummary(invoke,
2410 LocationSummary::kCallOnMainOnly,
2411 kIntrinsified);
2412 const InvokeRuntimeCallingConventionARMVIXL calling_convention;
2413
2414 locations->SetInAt(0, Location::RequiresFpuRegister());
2415 locations->SetOut(Location::RequiresFpuRegister());
2416 // Native code uses the soft float ABI.
2417 locations->AddTemp(LocationFrom(calling_convention.GetRegisterAt(0)));
2418 locations->AddTemp(LocationFrom(calling_convention.GetRegisterAt(1)));
2419}
2420
2421static void CreateFPFPToFPCallLocations(ArenaAllocator* arena, HInvoke* invoke) {
2422 // If the graph is debuggable, all callee-saved floating-point registers are blocked by
2423 // the code generator. Furthermore, the register allocator creates fixed live intervals
2424 // for all caller-saved registers because we are doing a function call. As a result, if
2425 // the input and output locations are unallocated, the register allocator runs out of
2426 // registers and fails; however, a debuggable graph is not the common case.
2427 if (invoke->GetBlock()->GetGraph()->IsDebuggable()) {
2428 return;
2429 }
2430
2431 DCHECK_EQ(invoke->GetNumberOfArguments(), 2U);
2432 DCHECK_EQ(invoke->InputAt(0)->GetType(), Primitive::kPrimDouble);
2433 DCHECK_EQ(invoke->InputAt(1)->GetType(), Primitive::kPrimDouble);
2434 DCHECK_EQ(invoke->GetType(), Primitive::kPrimDouble);
2435
2436 LocationSummary* const locations = new (arena) LocationSummary(invoke,
2437 LocationSummary::kCallOnMainOnly,
2438 kIntrinsified);
2439 const InvokeRuntimeCallingConventionARMVIXL calling_convention;
2440
2441 locations->SetInAt(0, Location::RequiresFpuRegister());
2442 locations->SetInAt(1, Location::RequiresFpuRegister());
2443 locations->SetOut(Location::RequiresFpuRegister());
2444 // Native code uses the soft float ABI.
2445 locations->AddTemp(LocationFrom(calling_convention.GetRegisterAt(0)));
2446 locations->AddTemp(LocationFrom(calling_convention.GetRegisterAt(1)));
2447 locations->AddTemp(LocationFrom(calling_convention.GetRegisterAt(2)));
2448 locations->AddTemp(LocationFrom(calling_convention.GetRegisterAt(3)));
2449}
2450
2451static void GenFPToFPCall(HInvoke* invoke,
2452 ArmVIXLAssembler* assembler,
2453 CodeGeneratorARMVIXL* codegen,
2454 QuickEntrypointEnum entry) {
2455 LocationSummary* const locations = invoke->GetLocations();
2456
2457 DCHECK_EQ(invoke->GetNumberOfArguments(), 1U);
2458 DCHECK(locations->WillCall() && locations->Intrinsified());
2459
2460 // Native code uses the soft float ABI.
2461 __ Vmov(RegisterFrom(locations->GetTemp(0)),
2462 RegisterFrom(locations->GetTemp(1)),
2463 InputDRegisterAt(invoke, 0));
2464 codegen->InvokeRuntime(entry, invoke, invoke->GetDexPc());
2465 __ Vmov(OutputDRegister(invoke),
2466 RegisterFrom(locations->GetTemp(0)),
2467 RegisterFrom(locations->GetTemp(1)));
2468}
2469
2470static void GenFPFPToFPCall(HInvoke* invoke,
2471 ArmVIXLAssembler* assembler,
2472 CodeGeneratorARMVIXL* codegen,
2473 QuickEntrypointEnum entry) {
2474 LocationSummary* const locations = invoke->GetLocations();
2475
2476 DCHECK_EQ(invoke->GetNumberOfArguments(), 2U);
2477 DCHECK(locations->WillCall() && locations->Intrinsified());
2478
2479 // Native code uses the soft float ABI.
2480 __ Vmov(RegisterFrom(locations->GetTemp(0)),
2481 RegisterFrom(locations->GetTemp(1)),
2482 InputDRegisterAt(invoke, 0));
2483 __ Vmov(RegisterFrom(locations->GetTemp(2)),
2484 RegisterFrom(locations->GetTemp(3)),
2485 InputDRegisterAt(invoke, 1));
2486 codegen->InvokeRuntime(entry, invoke, invoke->GetDexPc());
2487 __ Vmov(OutputDRegister(invoke),
2488 RegisterFrom(locations->GetTemp(0)),
2489 RegisterFrom(locations->GetTemp(1)));
2490}
2491
2492void IntrinsicLocationsBuilderARMVIXL::VisitMathCos(HInvoke* invoke) {
2493 CreateFPToFPCallLocations(arena_, invoke);
2494}
2495
2496void IntrinsicCodeGeneratorARMVIXL::VisitMathCos(HInvoke* invoke) {
2497 GenFPToFPCall(invoke, GetAssembler(), codegen_, kQuickCos);
2498}
2499
2500void IntrinsicLocationsBuilderARMVIXL::VisitMathSin(HInvoke* invoke) {
2501 CreateFPToFPCallLocations(arena_, invoke);
2502}
2503
2504void IntrinsicCodeGeneratorARMVIXL::VisitMathSin(HInvoke* invoke) {
2505 GenFPToFPCall(invoke, GetAssembler(), codegen_, kQuickSin);
2506}
2507
2508void IntrinsicLocationsBuilderARMVIXL::VisitMathAcos(HInvoke* invoke) {
2509 CreateFPToFPCallLocations(arena_, invoke);
2510}
2511
2512void IntrinsicCodeGeneratorARMVIXL::VisitMathAcos(HInvoke* invoke) {
2513 GenFPToFPCall(invoke, GetAssembler(), codegen_, kQuickAcos);
2514}
2515
2516void IntrinsicLocationsBuilderARMVIXL::VisitMathAsin(HInvoke* invoke) {
2517 CreateFPToFPCallLocations(arena_, invoke);
2518}
2519
2520void IntrinsicCodeGeneratorARMVIXL::VisitMathAsin(HInvoke* invoke) {
2521 GenFPToFPCall(invoke, GetAssembler(), codegen_, kQuickAsin);
2522}
2523
2524void IntrinsicLocationsBuilderARMVIXL::VisitMathAtan(HInvoke* invoke) {
2525 CreateFPToFPCallLocations(arena_, invoke);
2526}
2527
2528void IntrinsicCodeGeneratorARMVIXL::VisitMathAtan(HInvoke* invoke) {
2529 GenFPToFPCall(invoke, GetAssembler(), codegen_, kQuickAtan);
2530}
2531
2532void IntrinsicLocationsBuilderARMVIXL::VisitMathCbrt(HInvoke* invoke) {
2533 CreateFPToFPCallLocations(arena_, invoke);
2534}
2535
2536void IntrinsicCodeGeneratorARMVIXL::VisitMathCbrt(HInvoke* invoke) {
2537 GenFPToFPCall(invoke, GetAssembler(), codegen_, kQuickCbrt);
2538}
2539
2540void IntrinsicLocationsBuilderARMVIXL::VisitMathCosh(HInvoke* invoke) {
2541 CreateFPToFPCallLocations(arena_, invoke);
2542}
2543
2544void IntrinsicCodeGeneratorARMVIXL::VisitMathCosh(HInvoke* invoke) {
2545 GenFPToFPCall(invoke, GetAssembler(), codegen_, kQuickCosh);
2546}
2547
2548void IntrinsicLocationsBuilderARMVIXL::VisitMathExp(HInvoke* invoke) {
2549 CreateFPToFPCallLocations(arena_, invoke);
2550}
2551
2552void IntrinsicCodeGeneratorARMVIXL::VisitMathExp(HInvoke* invoke) {
2553 GenFPToFPCall(invoke, GetAssembler(), codegen_, kQuickExp);
2554}
2555
2556void IntrinsicLocationsBuilderARMVIXL::VisitMathExpm1(HInvoke* invoke) {
2557 CreateFPToFPCallLocations(arena_, invoke);
2558}
2559
2560void IntrinsicCodeGeneratorARMVIXL::VisitMathExpm1(HInvoke* invoke) {
2561 GenFPToFPCall(invoke, GetAssembler(), codegen_, kQuickExpm1);
2562}
2563
2564void IntrinsicLocationsBuilderARMVIXL::VisitMathLog(HInvoke* invoke) {
2565 CreateFPToFPCallLocations(arena_, invoke);
2566}
2567
2568void IntrinsicCodeGeneratorARMVIXL::VisitMathLog(HInvoke* invoke) {
2569 GenFPToFPCall(invoke, GetAssembler(), codegen_, kQuickLog);
2570}
2571
2572void IntrinsicLocationsBuilderARMVIXL::VisitMathLog10(HInvoke* invoke) {
2573 CreateFPToFPCallLocations(arena_, invoke);
2574}
2575
2576void IntrinsicCodeGeneratorARMVIXL::VisitMathLog10(HInvoke* invoke) {
2577 GenFPToFPCall(invoke, GetAssembler(), codegen_, kQuickLog10);
2578}
2579
2580void IntrinsicLocationsBuilderARMVIXL::VisitMathSinh(HInvoke* invoke) {
2581 CreateFPToFPCallLocations(arena_, invoke);
2582}
2583
2584void IntrinsicCodeGeneratorARMVIXL::VisitMathSinh(HInvoke* invoke) {
2585 GenFPToFPCall(invoke, GetAssembler(), codegen_, kQuickSinh);
2586}
2587
2588void IntrinsicLocationsBuilderARMVIXL::VisitMathTan(HInvoke* invoke) {
2589 CreateFPToFPCallLocations(arena_, invoke);
2590}
2591
2592void IntrinsicCodeGeneratorARMVIXL::VisitMathTan(HInvoke* invoke) {
2593 GenFPToFPCall(invoke, GetAssembler(), codegen_, kQuickTan);
2594}
2595
2596void IntrinsicLocationsBuilderARMVIXL::VisitMathTanh(HInvoke* invoke) {
2597 CreateFPToFPCallLocations(arena_, invoke);
2598}
2599
2600void IntrinsicCodeGeneratorARMVIXL::VisitMathTanh(HInvoke* invoke) {
2601 GenFPToFPCall(invoke, GetAssembler(), codegen_, kQuickTanh);
2602}
2603
2604void IntrinsicLocationsBuilderARMVIXL::VisitMathAtan2(HInvoke* invoke) {
2605 CreateFPFPToFPCallLocations(arena_, invoke);
2606}
2607
2608void IntrinsicCodeGeneratorARMVIXL::VisitMathAtan2(HInvoke* invoke) {
2609 GenFPFPToFPCall(invoke, GetAssembler(), codegen_, kQuickAtan2);
2610}
2611
2612void IntrinsicLocationsBuilderARMVIXL::VisitMathHypot(HInvoke* invoke) {
2613 CreateFPFPToFPCallLocations(arena_, invoke);
2614}
2615
2616void IntrinsicCodeGeneratorARMVIXL::VisitMathHypot(HInvoke* invoke) {
2617 GenFPFPToFPCall(invoke, GetAssembler(), codegen_, kQuickHypot);
2618}
2619
2620void IntrinsicLocationsBuilderARMVIXL::VisitMathNextAfter(HInvoke* invoke) {
2621 CreateFPFPToFPCallLocations(arena_, invoke);
2622}
2623
2624void IntrinsicCodeGeneratorARMVIXL::VisitMathNextAfter(HInvoke* invoke) {
2625 GenFPFPToFPCall(invoke, GetAssembler(), codegen_, kQuickNextAfter);
2626}
2627
2628void IntrinsicLocationsBuilderARMVIXL::VisitIntegerReverse(HInvoke* invoke) {
2629 CreateIntToIntLocations(arena_, invoke);
2630}
2631
2632void IntrinsicCodeGeneratorARMVIXL::VisitIntegerReverse(HInvoke* invoke) {
2633 ArmVIXLAssembler* assembler = GetAssembler();
2634 __ Rbit(OutputRegister(invoke), InputRegisterAt(invoke, 0));
2635}
2636
2637void IntrinsicLocationsBuilderARMVIXL::VisitLongReverse(HInvoke* invoke) {
2638 LocationSummary* locations = new (arena_) LocationSummary(invoke,
2639 LocationSummary::kNoCall,
2640 kIntrinsified);
2641 locations->SetInAt(0, Location::RequiresRegister());
2642 locations->SetOut(Location::RequiresRegister(), Location::kOutputOverlap);
2643}
2644
2645void IntrinsicCodeGeneratorARMVIXL::VisitLongReverse(HInvoke* invoke) {
2646 ArmVIXLAssembler* assembler = GetAssembler();
2647 LocationSummary* locations = invoke->GetLocations();
2648
2649 vixl32::Register in_reg_lo = LowRegisterFrom(locations->InAt(0));
2650 vixl32::Register in_reg_hi = HighRegisterFrom(locations->InAt(0));
2651 vixl32::Register out_reg_lo = LowRegisterFrom(locations->Out());
2652 vixl32::Register out_reg_hi = HighRegisterFrom(locations->Out());
2653
2654 __ Rbit(out_reg_lo, in_reg_hi);
2655 __ Rbit(out_reg_hi, in_reg_lo);
2656}
2657
2658void IntrinsicLocationsBuilderARMVIXL::VisitIntegerReverseBytes(HInvoke* invoke) {
2659 CreateIntToIntLocations(arena_, invoke);
2660}
2661
2662void IntrinsicCodeGeneratorARMVIXL::VisitIntegerReverseBytes(HInvoke* invoke) {
2663 ArmVIXLAssembler* assembler = GetAssembler();
2664 __ Rev(OutputRegister(invoke), InputRegisterAt(invoke, 0));
2665}
2666
2667void IntrinsicLocationsBuilderARMVIXL::VisitLongReverseBytes(HInvoke* invoke) {
2668 LocationSummary* locations = new (arena_) LocationSummary(invoke,
2669 LocationSummary::kNoCall,
2670 kIntrinsified);
2671 locations->SetInAt(0, Location::RequiresRegister());
2672 locations->SetOut(Location::RequiresRegister(), Location::kOutputOverlap);
2673}
2674
2675void IntrinsicCodeGeneratorARMVIXL::VisitLongReverseBytes(HInvoke* invoke) {
2676 ArmVIXLAssembler* assembler = GetAssembler();
2677 LocationSummary* locations = invoke->GetLocations();
2678
2679 vixl32::Register in_reg_lo = LowRegisterFrom(locations->InAt(0));
2680 vixl32::Register in_reg_hi = HighRegisterFrom(locations->InAt(0));
2681 vixl32::Register out_reg_lo = LowRegisterFrom(locations->Out());
2682 vixl32::Register out_reg_hi = HighRegisterFrom(locations->Out());
2683
2684 __ Rev(out_reg_lo, in_reg_hi);
2685 __ Rev(out_reg_hi, in_reg_lo);
2686}
2687
2688void IntrinsicLocationsBuilderARMVIXL::VisitShortReverseBytes(HInvoke* invoke) {
2689 CreateIntToIntLocations(arena_, invoke);
2690}
2691
2692void IntrinsicCodeGeneratorARMVIXL::VisitShortReverseBytes(HInvoke* invoke) {
2693 ArmVIXLAssembler* assembler = GetAssembler();
2694 __ Revsh(OutputRegister(invoke), InputRegisterAt(invoke, 0));
2695}
2696
2697static void GenBitCount(HInvoke* instr, Primitive::Type type, ArmVIXLAssembler* assembler) {
2698 DCHECK(Primitive::IsIntOrLongType(type)) << type;
2699 DCHECK_EQ(instr->GetType(), Primitive::kPrimInt);
2700 DCHECK_EQ(Primitive::PrimitiveKind(instr->InputAt(0)->GetType()), type);
2701
2702 bool is_long = type == Primitive::kPrimLong;
2703 LocationSummary* locations = instr->GetLocations();
2704 Location in = locations->InAt(0);
2705 vixl32::Register src_0 = is_long ? LowRegisterFrom(in) : RegisterFrom(in);
2706 vixl32::Register src_1 = is_long ? HighRegisterFrom(in) : src_0;
2707 vixl32::SRegister tmp_s = LowSRegisterFrom(locations->GetTemp(0));
2708 vixl32::DRegister tmp_d = DRegisterFrom(locations->GetTemp(0));
2709 vixl32::Register out_r = OutputRegister(instr);
2710
2711 // Move data from core register(s) to temp D-reg for bit count calculation, then move back.
2712 // According to Cortex A57 and A72 optimization guides, compared to transferring to full D-reg,
2713 // transferring data from core reg to upper or lower half of vfp D-reg requires extra latency,
2714 // That's why for integer bit count, we use 'vmov d0, r0, r0' instead of 'vmov d0[0], r0'.
2715 __ Vmov(tmp_d, src_1, src_0); // Temp DReg |--src_1|--src_0|
2716 __ Vcnt(Untyped8, tmp_d, tmp_d); // Temp DReg |c|c|c|c|c|c|c|c|
2717 __ Vpaddl(U8, tmp_d, tmp_d); // Temp DReg |--c|--c|--c|--c|
2718 __ Vpaddl(U16, tmp_d, tmp_d); // Temp DReg |------c|------c|
2719 if (is_long) {
2720 __ Vpaddl(U32, tmp_d, tmp_d); // Temp DReg |--------------c|
2721 }
2722 __ Vmov(out_r, tmp_s);
2723}
2724
2725void IntrinsicLocationsBuilderARMVIXL::VisitIntegerBitCount(HInvoke* invoke) {
2726 CreateIntToIntLocations(arena_, invoke);
2727 invoke->GetLocations()->AddTemp(Location::RequiresFpuRegister());
2728}
2729
2730void IntrinsicCodeGeneratorARMVIXL::VisitIntegerBitCount(HInvoke* invoke) {
2731 GenBitCount(invoke, Primitive::kPrimInt, GetAssembler());
2732}
2733
2734void IntrinsicLocationsBuilderARMVIXL::VisitLongBitCount(HInvoke* invoke) {
2735 VisitIntegerBitCount(invoke);
2736}
2737
2738void IntrinsicCodeGeneratorARMVIXL::VisitLongBitCount(HInvoke* invoke) {
2739 GenBitCount(invoke, Primitive::kPrimLong, GetAssembler());
2740}
2741
2742void IntrinsicLocationsBuilderARMVIXL::VisitStringGetCharsNoCheck(HInvoke* invoke) {
2743 LocationSummary* locations = new (arena_) LocationSummary(invoke,
2744 LocationSummary::kNoCall,
2745 kIntrinsified);
2746 locations->SetInAt(0, Location::RequiresRegister());
2747 locations->SetInAt(1, Location::RequiresRegister());
2748 locations->SetInAt(2, Location::RequiresRegister());
2749 locations->SetInAt(3, Location::RequiresRegister());
2750 locations->SetInAt(4, Location::RequiresRegister());
2751
2752 // Temporary registers to store lengths of strings and for calculations.
2753 locations->AddTemp(Location::RequiresRegister());
2754 locations->AddTemp(Location::RequiresRegister());
2755 locations->AddTemp(Location::RequiresRegister());
2756}
2757
2758void IntrinsicCodeGeneratorARMVIXL::VisitStringGetCharsNoCheck(HInvoke* invoke) {
2759 ArmVIXLAssembler* assembler = GetAssembler();
2760 LocationSummary* locations = invoke->GetLocations();
2761
2762 // Check assumption that sizeof(Char) is 2 (used in scaling below).
2763 const size_t char_size = Primitive::ComponentSize(Primitive::kPrimChar);
2764 DCHECK_EQ(char_size, 2u);
2765
2766 // Location of data in char array buffer.
2767 const uint32_t data_offset = mirror::Array::DataOffset(char_size).Uint32Value();
2768
2769 // Location of char array data in string.
2770 const uint32_t value_offset = mirror::String::ValueOffset().Uint32Value();
2771
2772 // void getCharsNoCheck(int srcBegin, int srcEnd, char[] dst, int dstBegin);
2773 // Since getChars() calls getCharsNoCheck() - we use registers rather than constants.
2774 vixl32::Register srcObj = InputRegisterAt(invoke, 0);
2775 vixl32::Register srcBegin = InputRegisterAt(invoke, 1);
2776 vixl32::Register srcEnd = InputRegisterAt(invoke, 2);
2777 vixl32::Register dstObj = InputRegisterAt(invoke, 3);
2778 vixl32::Register dstBegin = InputRegisterAt(invoke, 4);
2779
2780 vixl32::Register num_chr = RegisterFrom(locations->GetTemp(0));
2781 vixl32::Register src_ptr = RegisterFrom(locations->GetTemp(1));
2782 vixl32::Register dst_ptr = RegisterFrom(locations->GetTemp(2));
2783
2784 vixl32::Label done, compressed_string_loop;
2785 // dst to be copied.
2786 __ Add(dst_ptr, dstObj, data_offset);
2787 __ Add(dst_ptr, dst_ptr, Operand(dstBegin, vixl32::LSL, 1));
2788
2789 __ Subs(num_chr, srcEnd, srcBegin);
2790 // Early out for valid zero-length retrievals.
Artem Serov517d9f62016-12-12 15:51:15 +00002791 __ B(eq, &done, /* far_target */ false);
Anton Kirilov5ec62182016-10-13 20:16:02 +01002792
2793 // src range to copy.
2794 __ Add(src_ptr, srcObj, value_offset);
2795
2796 UseScratchRegisterScope temps(assembler->GetVIXLAssembler());
2797 vixl32::Register temp;
2798 vixl32::Label compressed_string_preloop;
2799 if (mirror::kUseStringCompression) {
2800 // Location of count in string.
2801 const uint32_t count_offset = mirror::String::CountOffset().Uint32Value();
2802 temp = temps.Acquire();
2803 // String's length.
2804 __ Ldr(temp, MemOperand(srcObj, count_offset));
Vladimir Markofdaf0f42016-10-13 19:29:53 +01002805 __ Tst(temp, 1);
Anton Kirilov5ec62182016-10-13 20:16:02 +01002806 temps.Release(temp);
Artem Serov517d9f62016-12-12 15:51:15 +00002807 __ B(eq, &compressed_string_preloop, /* far_target */ false);
Anton Kirilov5ec62182016-10-13 20:16:02 +01002808 }
2809 __ Add(src_ptr, src_ptr, Operand(srcBegin, vixl32::LSL, 1));
2810
2811 // Do the copy.
2812 vixl32::Label loop, remainder;
2813
2814 temp = temps.Acquire();
2815 // Save repairing the value of num_chr on the < 4 character path.
2816 __ Subs(temp, num_chr, 4);
Artem Serov517d9f62016-12-12 15:51:15 +00002817 __ B(lt, &remainder, /* far_target */ false);
Anton Kirilov5ec62182016-10-13 20:16:02 +01002818
2819 // Keep the result of the earlier subs, we are going to fetch at least 4 characters.
2820 __ Mov(num_chr, temp);
2821
2822 // Main loop used for longer fetches loads and stores 4x16-bit characters at a time.
2823 // (LDRD/STRD fault on unaligned addresses and it's not worth inlining extra code
2824 // to rectify these everywhere this intrinsic applies.)
2825 __ Bind(&loop);
2826 __ Ldr(temp, MemOperand(src_ptr, char_size * 2));
2827 __ Subs(num_chr, num_chr, 4);
2828 __ Str(temp, MemOperand(dst_ptr, char_size * 2));
2829 __ Ldr(temp, MemOperand(src_ptr, char_size * 4, PostIndex));
2830 __ Str(temp, MemOperand(dst_ptr, char_size * 4, PostIndex));
2831 temps.Release(temp);
Artem Serov517d9f62016-12-12 15:51:15 +00002832 __ B(ge, &loop, /* far_target */ false);
Anton Kirilov5ec62182016-10-13 20:16:02 +01002833
2834 __ Adds(num_chr, num_chr, 4);
Artem Serov517d9f62016-12-12 15:51:15 +00002835 __ B(eq, &done, /* far_target */ false);
Anton Kirilov5ec62182016-10-13 20:16:02 +01002836
2837 // Main loop for < 4 character case and remainder handling. Loads and stores one
2838 // 16-bit Java character at a time.
2839 __ Bind(&remainder);
2840 temp = temps.Acquire();
2841 __ Ldrh(temp, MemOperand(src_ptr, char_size, PostIndex));
2842 __ Subs(num_chr, num_chr, 1);
2843 __ Strh(temp, MemOperand(dst_ptr, char_size, PostIndex));
2844 temps.Release(temp);
Artem Serov517d9f62016-12-12 15:51:15 +00002845 __ B(gt, &remainder, /* far_target */ false);
Anton Kirilov5ec62182016-10-13 20:16:02 +01002846
2847 if (mirror::kUseStringCompression) {
Vladimir Markofdaf0f42016-10-13 19:29:53 +01002848 __ B(&done);
2849
Anton Kirilov5ec62182016-10-13 20:16:02 +01002850 const size_t c_char_size = Primitive::ComponentSize(Primitive::kPrimByte);
2851 DCHECK_EQ(c_char_size, 1u);
2852 // Copy loop for compressed src, copying 1 character (8-bit) to (16-bit) at a time.
2853 __ Bind(&compressed_string_preloop);
2854 __ Add(src_ptr, src_ptr, srcBegin);
2855 __ Bind(&compressed_string_loop);
2856 temp = temps.Acquire();
2857 __ Ldrb(temp, MemOperand(src_ptr, c_char_size, PostIndex));
2858 __ Strh(temp, MemOperand(dst_ptr, char_size, PostIndex));
2859 temps.Release(temp);
2860 __ Subs(num_chr, num_chr, 1);
Artem Serov517d9f62016-12-12 15:51:15 +00002861 __ B(gt, &compressed_string_loop, /* far_target */ false);
Anton Kirilov5ec62182016-10-13 20:16:02 +01002862 }
2863
2864 __ Bind(&done);
2865}
2866
2867void IntrinsicLocationsBuilderARMVIXL::VisitFloatIsInfinite(HInvoke* invoke) {
2868 CreateFPToIntLocations(arena_, invoke);
2869}
2870
2871void IntrinsicCodeGeneratorARMVIXL::VisitFloatIsInfinite(HInvoke* invoke) {
2872 ArmVIXLAssembler* const assembler = GetAssembler();
2873 const vixl32::Register out = OutputRegister(invoke);
2874 // Shifting left by 1 bit makes the value encodable as an immediate operand;
2875 // we don't care about the sign bit anyway.
2876 constexpr uint32_t infinity = kPositiveInfinityFloat << 1U;
2877
2878 __ Vmov(out, InputSRegisterAt(invoke, 0));
2879 // We don't care about the sign bit, so shift left.
2880 __ Lsl(out, out, 1);
2881 __ Eor(out, out, infinity);
2882 // If the result is 0, then it has 32 leading zeros, and less than that otherwise.
2883 __ Clz(out, out);
2884 // Any number less than 32 logically shifted right by 5 bits results in 0;
2885 // the same operation on 32 yields 1.
2886 __ Lsr(out, out, 5);
2887}
2888
2889void IntrinsicLocationsBuilderARMVIXL::VisitDoubleIsInfinite(HInvoke* invoke) {
2890 CreateFPToIntLocations(arena_, invoke);
2891}
2892
2893void IntrinsicCodeGeneratorARMVIXL::VisitDoubleIsInfinite(HInvoke* invoke) {
2894 ArmVIXLAssembler* const assembler = GetAssembler();
2895 const vixl32::Register out = OutputRegister(invoke);
2896 UseScratchRegisterScope temps(assembler->GetVIXLAssembler());
2897 const vixl32::Register temp = temps.Acquire();
2898 // The highest 32 bits of double precision positive infinity separated into
2899 // two constants encodable as immediate operands.
2900 constexpr uint32_t infinity_high = 0x7f000000U;
2901 constexpr uint32_t infinity_high2 = 0x00f00000U;
2902
2903 static_assert((infinity_high | infinity_high2) ==
2904 static_cast<uint32_t>(kPositiveInfinityDouble >> 32U),
2905 "The constants do not add up to the high 32 bits of double "
2906 "precision positive infinity.");
2907 __ Vmov(temp, out, InputDRegisterAt(invoke, 0));
2908 __ Eor(out, out, infinity_high);
2909 __ Eor(out, out, infinity_high2);
2910 // We don't care about the sign bit, so shift left.
2911 __ Orr(out, temp, Operand(out, vixl32::LSL, 1));
2912 // If the result is 0, then it has 32 leading zeros, and less than that otherwise.
2913 __ Clz(out, out);
2914 // Any number less than 32 logically shifted right by 5 bits results in 0;
2915 // the same operation on 32 yields 1.
2916 __ Lsr(out, out, 5);
2917}
2918
TatWai Chongd8c052a2016-11-02 16:12:48 +08002919void IntrinsicLocationsBuilderARMVIXL::VisitReferenceGetReferent(HInvoke* invoke) {
2920 if (kEmitCompilerReadBarrier) {
2921 // Do not intrinsify this call with the read barrier configuration.
2922 return;
2923 }
2924 LocationSummary* locations = new (arena_) LocationSummary(invoke,
2925 LocationSummary::kCallOnSlowPath,
2926 kIntrinsified);
2927 locations->SetInAt(0, Location::RequiresRegister());
2928 locations->SetOut(Location::SameAsFirstInput());
2929 locations->AddTemp(Location::RequiresRegister());
2930}
2931
2932void IntrinsicCodeGeneratorARMVIXL::VisitReferenceGetReferent(HInvoke* invoke) {
2933 DCHECK(!kEmitCompilerReadBarrier);
2934 ArmVIXLAssembler* assembler = GetAssembler();
2935 LocationSummary* locations = invoke->GetLocations();
2936
2937 vixl32::Register obj = InputRegisterAt(invoke, 0);
2938 vixl32::Register out = OutputRegister(invoke);
2939
2940 SlowPathCodeARMVIXL* slow_path = new (GetAllocator()) IntrinsicSlowPathARMVIXL(invoke);
2941 codegen_->AddSlowPath(slow_path);
2942
2943 // Load ArtMethod first.
2944 HInvokeStaticOrDirect* invoke_direct = invoke->AsInvokeStaticOrDirect();
2945 DCHECK(invoke_direct != nullptr);
2946 vixl32::Register temp0 = RegisterFrom(codegen_->GenerateCalleeMethodStaticOrDirectCall(
2947 invoke_direct, locations->GetTemp(0)));
2948
2949 // Now get declaring class.
2950 __ Ldr(temp0, MemOperand(temp0, ArtMethod::DeclaringClassOffset().Int32Value()));
2951
2952 uint32_t slow_path_flag_offset = codegen_->GetReferenceSlowFlagOffset();
2953 uint32_t disable_flag_offset = codegen_->GetReferenceDisableFlagOffset();
2954 DCHECK_NE(slow_path_flag_offset, 0u);
2955 DCHECK_NE(disable_flag_offset, 0u);
2956 DCHECK_NE(slow_path_flag_offset, disable_flag_offset);
2957
2958 // Check static flags that prevent using intrinsic.
2959 UseScratchRegisterScope temps(assembler->GetVIXLAssembler());
2960 vixl32::Register temp1 = temps.Acquire();
2961 __ Ldr(temp1, MemOperand(temp0, disable_flag_offset));
2962 __ Ldr(temp0, MemOperand(temp0, slow_path_flag_offset));
2963 __ Orr(temp0, temp1, temp0);
2964 __ CompareAndBranchIfNonZero(temp0, slow_path->GetEntryLabel());
2965
2966 // Fast path.
2967 __ Ldr(out, MemOperand(obj, mirror::Reference::ReferentOffset().Int32Value()));
2968 codegen_->MaybeRecordImplicitNullCheck(invoke);
2969 assembler->MaybeUnpoisonHeapReference(out);
2970 __ Bind(slow_path->GetExitLabel());
2971}
2972
Artem Serov9aee2d42017-01-06 15:58:31 +00002973void IntrinsicLocationsBuilderARMVIXL::VisitMathCeil(HInvoke* invoke) {
2974 if (features_.HasARMv8AInstructions()) {
2975 CreateFPToFPLocations(arena_, invoke);
2976 }
2977}
2978
2979void IntrinsicCodeGeneratorARMVIXL::VisitMathCeil(HInvoke* invoke) {
2980 ArmVIXLAssembler* assembler = GetAssembler();
2981 DCHECK(codegen_->GetInstructionSetFeatures().HasARMv8AInstructions());
2982 __ Vrintp(F64, F64, OutputDRegister(invoke), InputDRegisterAt(invoke, 0));
2983}
2984
2985void IntrinsicLocationsBuilderARMVIXL::VisitMathFloor(HInvoke* invoke) {
2986 if (features_.HasARMv8AInstructions()) {
2987 CreateFPToFPLocations(arena_, invoke);
2988 }
2989}
2990
2991void IntrinsicCodeGeneratorARMVIXL::VisitMathFloor(HInvoke* invoke) {
2992 ArmVIXLAssembler* assembler = GetAssembler();
2993 DCHECK(codegen_->GetInstructionSetFeatures().HasARMv8AInstructions());
2994 __ Vrintm(F64, F64, OutputDRegister(invoke), InputDRegisterAt(invoke, 0));
2995}
2996
Nicolas Geoffray331605a2017-03-01 11:01:41 +00002997void IntrinsicLocationsBuilderARMVIXL::VisitIntegerValueOf(HInvoke* invoke) {
2998 InvokeRuntimeCallingConventionARMVIXL calling_convention;
2999 IntrinsicVisitor::ComputeIntegerValueOfLocations(
3000 invoke,
3001 codegen_,
3002 LocationFrom(r0),
3003 LocationFrom(calling_convention.GetRegisterAt(0)));
3004}
3005
3006void IntrinsicCodeGeneratorARMVIXL::VisitIntegerValueOf(HInvoke* invoke) {
3007 IntrinsicVisitor::IntegerValueOfInfo info = IntrinsicVisitor::ComputeIntegerValueOfInfo();
3008 LocationSummary* locations = invoke->GetLocations();
3009 ArmVIXLAssembler* const assembler = GetAssembler();
3010
3011 vixl32::Register out = RegisterFrom(locations->Out());
3012 UseScratchRegisterScope temps(assembler->GetVIXLAssembler());
3013 vixl32::Register temp = temps.Acquire();
3014 InvokeRuntimeCallingConventionARMVIXL calling_convention;
3015 vixl32::Register argument = calling_convention.GetRegisterAt(0);
3016 if (invoke->InputAt(0)->IsConstant()) {
3017 int32_t value = invoke->InputAt(0)->AsIntConstant()->GetValue();
3018 if (value >= info.low && value <= info.high) {
3019 // Just embed the j.l.Integer in the code.
3020 ScopedObjectAccess soa(Thread::Current());
3021 mirror::Object* boxed = info.cache->Get(value + (-info.low));
3022 DCHECK(boxed != nullptr && Runtime::Current()->GetHeap()->ObjectIsInBootImageSpace(boxed));
3023 uint32_t address = dchecked_integral_cast<uint32_t>(reinterpret_cast<uintptr_t>(boxed));
3024 __ Ldr(out, codegen_->DeduplicateBootImageAddressLiteral(address));
3025 } else {
3026 // Allocate and initialize a new j.l.Integer.
3027 // TODO: If we JIT, we could allocate the j.l.Integer now, and store it in the
3028 // JIT object table.
3029 uint32_t address =
3030 dchecked_integral_cast<uint32_t>(reinterpret_cast<uintptr_t>(info.integer));
3031 __ Ldr(argument, codegen_->DeduplicateBootImageAddressLiteral(address));
3032 codegen_->InvokeRuntime(kQuickAllocObjectInitialized, invoke, invoke->GetDexPc());
3033 CheckEntrypointTypes<kQuickAllocObjectWithChecks, void*, mirror::Class*>();
3034 __ Mov(temp, value);
3035 assembler->StoreToOffset(kStoreWord, temp, out, info.value_offset);
3036 // `value` is a final field :-( Ideally, we'd merge this memory barrier with the allocation
3037 // one.
3038 codegen_->GenerateMemoryBarrier(MemBarrierKind::kStoreStore);
3039 }
3040 } else {
3041 vixl32::Register in = RegisterFrom(locations->InAt(0));
3042 // Check bounds of our cache.
3043 __ Add(out, in, -info.low);
3044 __ Cmp(out, info.high - info.low + 1);
3045 vixl32::Label allocate, done;
3046 __ B(hs, &allocate);
3047 // If the value is within the bounds, load the j.l.Integer directly from the array.
3048 uint32_t data_offset = mirror::Array::DataOffset(kHeapReferenceSize).Uint32Value();
3049 uint32_t address = dchecked_integral_cast<uint32_t>(reinterpret_cast<uintptr_t>(info.cache));
3050 __ Ldr(temp, codegen_->DeduplicateBootImageAddressLiteral(data_offset + address));
3051 codegen_->LoadFromShiftedRegOffset(Primitive::kPrimNot, locations->Out(), temp, out);
3052 assembler->MaybeUnpoisonHeapReference(out);
3053 __ B(&done);
3054 __ Bind(&allocate);
3055 // Otherwise allocate and initialize a new j.l.Integer.
3056 address = dchecked_integral_cast<uint32_t>(reinterpret_cast<uintptr_t>(info.integer));
3057 __ Ldr(argument, codegen_->DeduplicateBootImageAddressLiteral(address));
3058 codegen_->InvokeRuntime(kQuickAllocObjectInitialized, invoke, invoke->GetDexPc());
3059 CheckEntrypointTypes<kQuickAllocObjectWithChecks, void*, mirror::Class*>();
3060 assembler->StoreToOffset(kStoreWord, in, out, info.value_offset);
3061 // `value` is a final field :-( Ideally, we'd merge this memory barrier with the allocation
3062 // one.
3063 codegen_->GenerateMemoryBarrier(MemBarrierKind::kStoreStore);
3064 __ Bind(&done);
3065 }
3066}
3067
Anton Kirilov5ec62182016-10-13 20:16:02 +01003068UNIMPLEMENTED_INTRINSIC(ARMVIXL, MathRoundDouble) // Could be done by changing rounding mode, maybe?
3069UNIMPLEMENTED_INTRINSIC(ARMVIXL, MathRoundFloat) // Could be done by changing rounding mode, maybe?
3070UNIMPLEMENTED_INTRINSIC(ARMVIXL, UnsafeCASLong) // High register pressure.
3071UNIMPLEMENTED_INTRINSIC(ARMVIXL, SystemArrayCopyChar)
Anton Kirilov5ec62182016-10-13 20:16:02 +01003072UNIMPLEMENTED_INTRINSIC(ARMVIXL, IntegerHighestOneBit)
3073UNIMPLEMENTED_INTRINSIC(ARMVIXL, LongHighestOneBit)
3074UNIMPLEMENTED_INTRINSIC(ARMVIXL, IntegerLowestOneBit)
3075UNIMPLEMENTED_INTRINSIC(ARMVIXL, LongLowestOneBit)
3076
Aart Bikff7d89c2016-11-07 08:49:28 -08003077UNIMPLEMENTED_INTRINSIC(ARMVIXL, StringStringIndexOf);
3078UNIMPLEMENTED_INTRINSIC(ARMVIXL, StringStringIndexOfAfter);
Aart Bik71bf7b42016-11-16 10:17:46 -08003079UNIMPLEMENTED_INTRINSIC(ARMVIXL, StringBufferAppend);
3080UNIMPLEMENTED_INTRINSIC(ARMVIXL, StringBufferLength);
3081UNIMPLEMENTED_INTRINSIC(ARMVIXL, StringBufferToString);
3082UNIMPLEMENTED_INTRINSIC(ARMVIXL, StringBuilderAppend);
3083UNIMPLEMENTED_INTRINSIC(ARMVIXL, StringBuilderLength);
3084UNIMPLEMENTED_INTRINSIC(ARMVIXL, StringBuilderToString);
Aart Bikff7d89c2016-11-07 08:49:28 -08003085
Anton Kirilov5ec62182016-10-13 20:16:02 +01003086// 1.8.
3087UNIMPLEMENTED_INTRINSIC(ARMVIXL, UnsafeGetAndAddInt)
3088UNIMPLEMENTED_INTRINSIC(ARMVIXL, UnsafeGetAndAddLong)
3089UNIMPLEMENTED_INTRINSIC(ARMVIXL, UnsafeGetAndSetInt)
3090UNIMPLEMENTED_INTRINSIC(ARMVIXL, UnsafeGetAndSetLong)
3091UNIMPLEMENTED_INTRINSIC(ARMVIXL, UnsafeGetAndSetObject)
3092
3093UNREACHABLE_INTRINSICS(ARMVIXL)
3094
3095#undef __
3096
3097} // namespace arm
3098} // namespace art