Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (C) 2012 The Android Open Source Project |
| 3 | * |
| 4 | * Licensed under the Apache License, Version 2.0 (the "License"); |
| 5 | * you may not use this file except in compliance with the License. |
| 6 | * You may obtain a copy of the License at |
| 7 | * |
| 8 | * http://www.apache.org/licenses/LICENSE-2.0 |
| 9 | * |
| 10 | * Unless required by applicable law or agreed to in writing, software |
| 11 | * distributed under the License is distributed on an "AS IS" BASIS, |
| 12 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. |
| 13 | * See the License for the specific language governing permissions and |
| 14 | * limitations under the License. |
| 15 | */ |
| 16 | |
| 17 | #include "dex/compiler_ir.h" |
Vladimir Marko | 5c96e6b | 2013-11-14 15:34:17 +0000 | [diff] [blame] | 18 | #include "dex/frontend.h" |
| 19 | #include "dex/quick/dex_file_method_inliner.h" |
| 20 | #include "dex/quick/dex_file_to_method_inliner_map.h" |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 21 | #include "dex_file-inl.h" |
Ian Rogers | 166db04 | 2013-07-26 12:05:57 -0700 | [diff] [blame] | 22 | #include "entrypoints/quick/quick_entrypoints.h" |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 23 | #include "invoke_type.h" |
| 24 | #include "mirror/array.h" |
| 25 | #include "mirror/string.h" |
| 26 | #include "mir_to_lir-inl.h" |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 27 | #include "x86/codegen_x86.h" |
| 28 | |
| 29 | namespace art { |
| 30 | |
| 31 | /* |
| 32 | * This source files contains "gen" codegen routines that should |
| 33 | * be applicable to most targets. Only mid-level support utilities |
| 34 | * and "op" calls may be used here. |
| 35 | */ |
| 36 | |
Vladimir Marko | 3bc8615 | 2014-03-13 14:11:28 +0000 | [diff] [blame] | 37 | void Mir2Lir::AddIntrinsicLaunchpad(CallInfo* info, LIR* branch, LIR* resume) { |
| 38 | class IntrinsicLaunchpadPath : public Mir2Lir::LIRSlowPath { |
| 39 | public: |
| 40 | IntrinsicLaunchpadPath(Mir2Lir* m2l, CallInfo* info, LIR* branch, LIR* resume = nullptr) |
| 41 | : LIRSlowPath(m2l, info->offset, branch, resume), info_(info) { |
| 42 | } |
| 43 | |
| 44 | void Compile() { |
| 45 | m2l_->ResetRegPool(); |
| 46 | m2l_->ResetDefTracking(); |
| 47 | LIR* label = GenerateTargetLabel(); |
| 48 | label->opcode = kPseudoIntrinsicRetry; |
| 49 | // NOTE: GenInvokeNoInline() handles MarkSafepointPC. |
| 50 | m2l_->GenInvokeNoInline(info_); |
| 51 | if (cont_ != nullptr) { |
| 52 | m2l_->OpUnconditionalBranch(cont_); |
| 53 | } |
| 54 | } |
| 55 | |
| 56 | private: |
| 57 | CallInfo* const info_; |
| 58 | }; |
| 59 | |
| 60 | AddSlowPath(new (arena_) IntrinsicLaunchpadPath(this, info, branch, resume)); |
| 61 | } |
| 62 | |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 63 | /* |
| 64 | * To save scheduling time, helper calls are broken into two parts: generation of |
Brian Carlstrom | 60d7a65 | 2014-03-13 18:10:08 -0700 | [diff] [blame] | 65 | * the helper target address, and the actual call to the helper. Because x86 |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 66 | * has a memory call operation, part 1 is a NOP for x86. For other targets, |
| 67 | * load arguments between the two parts. |
| 68 | */ |
Ian Rogers | 848871b | 2013-08-05 10:56:33 -0700 | [diff] [blame] | 69 | int Mir2Lir::CallHelperSetup(ThreadOffset helper_offset) { |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 70 | return (cu_->instruction_set == kX86) ? 0 : LoadHelper(helper_offset); |
| 71 | } |
| 72 | |
| 73 | /* NOTE: if r_tgt is a temp, it will be freed following use */ |
Brian Carlstrom | 60d7a65 | 2014-03-13 18:10:08 -0700 | [diff] [blame] | 74 | LIR* Mir2Lir::CallHelper(int r_tgt, ThreadOffset helper_offset, bool safepoint_pc, bool use_link) { |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 75 | LIR* call_inst; |
Brian Carlstrom | 60d7a65 | 2014-03-13 18:10:08 -0700 | [diff] [blame] | 76 | OpKind op = use_link ? kOpBlx : kOpBx; |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 77 | if (cu_->instruction_set == kX86) { |
Brian Carlstrom | 60d7a65 | 2014-03-13 18:10:08 -0700 | [diff] [blame] | 78 | call_inst = OpThreadMem(op, helper_offset); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 79 | } else { |
Brian Carlstrom | 60d7a65 | 2014-03-13 18:10:08 -0700 | [diff] [blame] | 80 | call_inst = OpReg(op, r_tgt); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 81 | FreeTemp(r_tgt); |
| 82 | } |
| 83 | if (safepoint_pc) { |
| 84 | MarkSafepointPC(call_inst); |
| 85 | } |
| 86 | return call_inst; |
| 87 | } |
| 88 | |
Ian Rogers | 848871b | 2013-08-05 10:56:33 -0700 | [diff] [blame] | 89 | void Mir2Lir::CallRuntimeHelperImm(ThreadOffset helper_offset, int arg0, bool safepoint_pc) { |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 90 | int r_tgt = CallHelperSetup(helper_offset); |
| 91 | LoadConstant(TargetReg(kArg0), arg0); |
Vladimir Marko | 31c2aac | 2013-12-09 16:31:19 +0000 | [diff] [blame] | 92 | ClobberCallerSave(); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 93 | CallHelper(r_tgt, helper_offset, safepoint_pc); |
| 94 | } |
| 95 | |
Ian Rogers | 848871b | 2013-08-05 10:56:33 -0700 | [diff] [blame] | 96 | void Mir2Lir::CallRuntimeHelperReg(ThreadOffset helper_offset, int arg0, bool safepoint_pc) { |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 97 | int r_tgt = CallHelperSetup(helper_offset); |
| 98 | OpRegCopy(TargetReg(kArg0), arg0); |
Vladimir Marko | 31c2aac | 2013-12-09 16:31:19 +0000 | [diff] [blame] | 99 | ClobberCallerSave(); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 100 | CallHelper(r_tgt, helper_offset, safepoint_pc); |
| 101 | } |
| 102 | |
Ian Rogers | 848871b | 2013-08-05 10:56:33 -0700 | [diff] [blame] | 103 | void Mir2Lir::CallRuntimeHelperRegLocation(ThreadOffset helper_offset, RegLocation arg0, |
| 104 | bool safepoint_pc) { |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 105 | int r_tgt = CallHelperSetup(helper_offset); |
Zheng Xu | 9a84ad9 | 2014-03-13 18:00:21 +0000 | [diff] [blame] | 106 | if (arg0.wide) { |
| 107 | LoadValueDirectWideFixed(arg0, arg0.fp ? TargetReg(kFArg0) : TargetReg(kArg0), |
| 108 | arg0.fp ? TargetReg(kFArg1) : TargetReg(kArg1)); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 109 | } else { |
Zheng Xu | 9a84ad9 | 2014-03-13 18:00:21 +0000 | [diff] [blame] | 110 | LoadValueDirectFixed(arg0, arg0.fp ? TargetReg(kFArg0) : TargetReg(kArg0)); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 111 | } |
Vladimir Marko | 31c2aac | 2013-12-09 16:31:19 +0000 | [diff] [blame] | 112 | ClobberCallerSave(); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 113 | CallHelper(r_tgt, helper_offset, safepoint_pc); |
| 114 | } |
| 115 | |
Ian Rogers | 848871b | 2013-08-05 10:56:33 -0700 | [diff] [blame] | 116 | void Mir2Lir::CallRuntimeHelperImmImm(ThreadOffset helper_offset, int arg0, int arg1, |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 117 | bool safepoint_pc) { |
| 118 | int r_tgt = CallHelperSetup(helper_offset); |
| 119 | LoadConstant(TargetReg(kArg0), arg0); |
| 120 | LoadConstant(TargetReg(kArg1), arg1); |
Vladimir Marko | 31c2aac | 2013-12-09 16:31:19 +0000 | [diff] [blame] | 121 | ClobberCallerSave(); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 122 | CallHelper(r_tgt, helper_offset, safepoint_pc); |
| 123 | } |
| 124 | |
Ian Rogers | 848871b | 2013-08-05 10:56:33 -0700 | [diff] [blame] | 125 | void Mir2Lir::CallRuntimeHelperImmRegLocation(ThreadOffset helper_offset, int arg0, |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 126 | RegLocation arg1, bool safepoint_pc) { |
| 127 | int r_tgt = CallHelperSetup(helper_offset); |
| 128 | if (arg1.wide == 0) { |
| 129 | LoadValueDirectFixed(arg1, TargetReg(kArg1)); |
| 130 | } else { |
| 131 | LoadValueDirectWideFixed(arg1, TargetReg(kArg1), TargetReg(kArg2)); |
| 132 | } |
| 133 | LoadConstant(TargetReg(kArg0), arg0); |
Vladimir Marko | 31c2aac | 2013-12-09 16:31:19 +0000 | [diff] [blame] | 134 | ClobberCallerSave(); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 135 | CallHelper(r_tgt, helper_offset, safepoint_pc); |
| 136 | } |
| 137 | |
Ian Rogers | 848871b | 2013-08-05 10:56:33 -0700 | [diff] [blame] | 138 | void Mir2Lir::CallRuntimeHelperRegLocationImm(ThreadOffset helper_offset, RegLocation arg0, int arg1, |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 139 | bool safepoint_pc) { |
| 140 | int r_tgt = CallHelperSetup(helper_offset); |
| 141 | LoadValueDirectFixed(arg0, TargetReg(kArg0)); |
| 142 | LoadConstant(TargetReg(kArg1), arg1); |
Vladimir Marko | 31c2aac | 2013-12-09 16:31:19 +0000 | [diff] [blame] | 143 | ClobberCallerSave(); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 144 | CallHelper(r_tgt, helper_offset, safepoint_pc); |
| 145 | } |
| 146 | |
Ian Rogers | 848871b | 2013-08-05 10:56:33 -0700 | [diff] [blame] | 147 | void Mir2Lir::CallRuntimeHelperImmReg(ThreadOffset helper_offset, int arg0, int arg1, |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 148 | bool safepoint_pc) { |
| 149 | int r_tgt = CallHelperSetup(helper_offset); |
| 150 | OpRegCopy(TargetReg(kArg1), arg1); |
| 151 | LoadConstant(TargetReg(kArg0), arg0); |
Vladimir Marko | 31c2aac | 2013-12-09 16:31:19 +0000 | [diff] [blame] | 152 | ClobberCallerSave(); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 153 | CallHelper(r_tgt, helper_offset, safepoint_pc); |
| 154 | } |
| 155 | |
Ian Rogers | 848871b | 2013-08-05 10:56:33 -0700 | [diff] [blame] | 156 | void Mir2Lir::CallRuntimeHelperRegImm(ThreadOffset helper_offset, int arg0, int arg1, |
| 157 | bool safepoint_pc) { |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 158 | int r_tgt = CallHelperSetup(helper_offset); |
| 159 | OpRegCopy(TargetReg(kArg0), arg0); |
| 160 | LoadConstant(TargetReg(kArg1), arg1); |
Vladimir Marko | 31c2aac | 2013-12-09 16:31:19 +0000 | [diff] [blame] | 161 | ClobberCallerSave(); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 162 | CallHelper(r_tgt, helper_offset, safepoint_pc); |
| 163 | } |
| 164 | |
Ian Rogers | 848871b | 2013-08-05 10:56:33 -0700 | [diff] [blame] | 165 | void Mir2Lir::CallRuntimeHelperImmMethod(ThreadOffset helper_offset, int arg0, bool safepoint_pc) { |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 166 | int r_tgt = CallHelperSetup(helper_offset); |
| 167 | LoadCurrMethodDirect(TargetReg(kArg1)); |
| 168 | LoadConstant(TargetReg(kArg0), arg0); |
Vladimir Marko | 31c2aac | 2013-12-09 16:31:19 +0000 | [diff] [blame] | 169 | ClobberCallerSave(); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 170 | CallHelper(r_tgt, helper_offset, safepoint_pc); |
| 171 | } |
| 172 | |
Hiroshi Yamauchi | be1ca55 | 2014-01-15 11:46:48 -0800 | [diff] [blame] | 173 | void Mir2Lir::CallRuntimeHelperRegMethod(ThreadOffset helper_offset, int arg0, bool safepoint_pc) { |
| 174 | int r_tgt = CallHelperSetup(helper_offset); |
| 175 | DCHECK_NE(TargetReg(kArg1), arg0); |
| 176 | if (TargetReg(kArg0) != arg0) { |
| 177 | OpRegCopy(TargetReg(kArg0), arg0); |
| 178 | } |
| 179 | LoadCurrMethodDirect(TargetReg(kArg1)); |
| 180 | ClobberCallerSave(); |
| 181 | CallHelper(r_tgt, helper_offset, safepoint_pc); |
| 182 | } |
| 183 | |
Hiroshi Yamauchi | bb8f0ab | 2014-01-27 16:50:29 -0800 | [diff] [blame] | 184 | void Mir2Lir::CallRuntimeHelperRegMethodRegLocation(ThreadOffset helper_offset, int arg0, |
| 185 | RegLocation arg2, bool safepoint_pc) { |
| 186 | int r_tgt = CallHelperSetup(helper_offset); |
| 187 | DCHECK_NE(TargetReg(kArg1), arg0); |
| 188 | if (TargetReg(kArg0) != arg0) { |
| 189 | OpRegCopy(TargetReg(kArg0), arg0); |
| 190 | } |
| 191 | LoadCurrMethodDirect(TargetReg(kArg1)); |
| 192 | LoadValueDirectFixed(arg2, TargetReg(kArg2)); |
| 193 | ClobberCallerSave(); |
| 194 | CallHelper(r_tgt, helper_offset, safepoint_pc); |
| 195 | } |
| 196 | |
Ian Rogers | 848871b | 2013-08-05 10:56:33 -0700 | [diff] [blame] | 197 | void Mir2Lir::CallRuntimeHelperRegLocationRegLocation(ThreadOffset helper_offset, RegLocation arg0, |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 198 | RegLocation arg1, bool safepoint_pc) { |
| 199 | int r_tgt = CallHelperSetup(helper_offset); |
| 200 | if (arg0.wide == 0) { |
| 201 | LoadValueDirectFixed(arg0, arg0.fp ? TargetReg(kFArg0) : TargetReg(kArg0)); |
| 202 | if (arg1.wide == 0) { |
| 203 | if (cu_->instruction_set == kMips) { |
| 204 | LoadValueDirectFixed(arg1, arg1.fp ? TargetReg(kFArg2) : TargetReg(kArg1)); |
| 205 | } else { |
| 206 | LoadValueDirectFixed(arg1, TargetReg(kArg1)); |
| 207 | } |
| 208 | } else { |
| 209 | if (cu_->instruction_set == kMips) { |
| 210 | LoadValueDirectWideFixed(arg1, arg1.fp ? TargetReg(kFArg2) : TargetReg(kArg1), arg1.fp ? TargetReg(kFArg3) : TargetReg(kArg2)); |
| 211 | } else { |
| 212 | LoadValueDirectWideFixed(arg1, TargetReg(kArg1), TargetReg(kArg2)); |
| 213 | } |
| 214 | } |
| 215 | } else { |
| 216 | LoadValueDirectWideFixed(arg0, arg0.fp ? TargetReg(kFArg0) : TargetReg(kArg0), arg0.fp ? TargetReg(kFArg1) : TargetReg(kArg1)); |
| 217 | if (arg1.wide == 0) { |
| 218 | LoadValueDirectFixed(arg1, arg1.fp ? TargetReg(kFArg2) : TargetReg(kArg2)); |
| 219 | } else { |
| 220 | LoadValueDirectWideFixed(arg1, arg1.fp ? TargetReg(kFArg2) : TargetReg(kArg2), arg1.fp ? TargetReg(kFArg3) : TargetReg(kArg3)); |
| 221 | } |
| 222 | } |
Vladimir Marko | 31c2aac | 2013-12-09 16:31:19 +0000 | [diff] [blame] | 223 | ClobberCallerSave(); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 224 | CallHelper(r_tgt, helper_offset, safepoint_pc); |
| 225 | } |
| 226 | |
Ian Rogers | 848871b | 2013-08-05 10:56:33 -0700 | [diff] [blame] | 227 | void Mir2Lir::CallRuntimeHelperRegReg(ThreadOffset helper_offset, int arg0, int arg1, |
| 228 | bool safepoint_pc) { |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 229 | int r_tgt = CallHelperSetup(helper_offset); |
| 230 | DCHECK_NE(TargetReg(kArg0), arg1); // check copy into arg0 won't clobber arg1 |
| 231 | OpRegCopy(TargetReg(kArg0), arg0); |
| 232 | OpRegCopy(TargetReg(kArg1), arg1); |
Vladimir Marko | 31c2aac | 2013-12-09 16:31:19 +0000 | [diff] [blame] | 233 | ClobberCallerSave(); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 234 | CallHelper(r_tgt, helper_offset, safepoint_pc); |
| 235 | } |
| 236 | |
Ian Rogers | 848871b | 2013-08-05 10:56:33 -0700 | [diff] [blame] | 237 | void Mir2Lir::CallRuntimeHelperRegRegImm(ThreadOffset helper_offset, int arg0, int arg1, |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 238 | int arg2, bool safepoint_pc) { |
| 239 | int r_tgt = CallHelperSetup(helper_offset); |
| 240 | DCHECK_NE(TargetReg(kArg0), arg1); // check copy into arg0 won't clobber arg1 |
| 241 | OpRegCopy(TargetReg(kArg0), arg0); |
| 242 | OpRegCopy(TargetReg(kArg1), arg1); |
| 243 | LoadConstant(TargetReg(kArg2), arg2); |
Vladimir Marko | 31c2aac | 2013-12-09 16:31:19 +0000 | [diff] [blame] | 244 | ClobberCallerSave(); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 245 | CallHelper(r_tgt, helper_offset, safepoint_pc); |
| 246 | } |
| 247 | |
Ian Rogers | 848871b | 2013-08-05 10:56:33 -0700 | [diff] [blame] | 248 | void Mir2Lir::CallRuntimeHelperImmMethodRegLocation(ThreadOffset helper_offset, |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 249 | int arg0, RegLocation arg2, bool safepoint_pc) { |
| 250 | int r_tgt = CallHelperSetup(helper_offset); |
| 251 | LoadValueDirectFixed(arg2, TargetReg(kArg2)); |
| 252 | LoadCurrMethodDirect(TargetReg(kArg1)); |
| 253 | LoadConstant(TargetReg(kArg0), arg0); |
Vladimir Marko | 31c2aac | 2013-12-09 16:31:19 +0000 | [diff] [blame] | 254 | ClobberCallerSave(); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 255 | CallHelper(r_tgt, helper_offset, safepoint_pc); |
| 256 | } |
| 257 | |
Ian Rogers | 848871b | 2013-08-05 10:56:33 -0700 | [diff] [blame] | 258 | void Mir2Lir::CallRuntimeHelperImmMethodImm(ThreadOffset helper_offset, int arg0, |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 259 | int arg2, bool safepoint_pc) { |
| 260 | int r_tgt = CallHelperSetup(helper_offset); |
| 261 | LoadCurrMethodDirect(TargetReg(kArg1)); |
| 262 | LoadConstant(TargetReg(kArg2), arg2); |
| 263 | LoadConstant(TargetReg(kArg0), arg0); |
Vladimir Marko | 31c2aac | 2013-12-09 16:31:19 +0000 | [diff] [blame] | 264 | ClobberCallerSave(); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 265 | CallHelper(r_tgt, helper_offset, safepoint_pc); |
| 266 | } |
| 267 | |
Ian Rogers | 848871b | 2013-08-05 10:56:33 -0700 | [diff] [blame] | 268 | void Mir2Lir::CallRuntimeHelperImmRegLocationRegLocation(ThreadOffset helper_offset, |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 269 | int arg0, RegLocation arg1, |
| 270 | RegLocation arg2, bool safepoint_pc) { |
| 271 | int r_tgt = CallHelperSetup(helper_offset); |
Ian Rogers | a9a8254 | 2013-10-04 11:17:26 -0700 | [diff] [blame] | 272 | DCHECK_EQ(arg1.wide, 0U); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 273 | LoadValueDirectFixed(arg1, TargetReg(kArg1)); |
| 274 | if (arg2.wide == 0) { |
| 275 | LoadValueDirectFixed(arg2, TargetReg(kArg2)); |
| 276 | } else { |
| 277 | LoadValueDirectWideFixed(arg2, TargetReg(kArg2), TargetReg(kArg3)); |
| 278 | } |
| 279 | LoadConstant(TargetReg(kArg0), arg0); |
Vladimir Marko | 31c2aac | 2013-12-09 16:31:19 +0000 | [diff] [blame] | 280 | ClobberCallerSave(); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 281 | CallHelper(r_tgt, helper_offset, safepoint_pc); |
| 282 | } |
| 283 | |
Ian Rogers | a9a8254 | 2013-10-04 11:17:26 -0700 | [diff] [blame] | 284 | void Mir2Lir::CallRuntimeHelperRegLocationRegLocationRegLocation(ThreadOffset helper_offset, |
| 285 | RegLocation arg0, RegLocation arg1, |
| 286 | RegLocation arg2, |
| 287 | bool safepoint_pc) { |
| 288 | int r_tgt = CallHelperSetup(helper_offset); |
| 289 | DCHECK_EQ(arg0.wide, 0U); |
| 290 | LoadValueDirectFixed(arg0, TargetReg(kArg0)); |
| 291 | DCHECK_EQ(arg1.wide, 0U); |
| 292 | LoadValueDirectFixed(arg1, TargetReg(kArg1)); |
| 293 | DCHECK_EQ(arg1.wide, 0U); |
| 294 | LoadValueDirectFixed(arg2, TargetReg(kArg2)); |
Vladimir Marko | 31c2aac | 2013-12-09 16:31:19 +0000 | [diff] [blame] | 295 | ClobberCallerSave(); |
Ian Rogers | a9a8254 | 2013-10-04 11:17:26 -0700 | [diff] [blame] | 296 | CallHelper(r_tgt, helper_offset, safepoint_pc); |
| 297 | } |
| 298 | |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 299 | /* |
| 300 | * If there are any ins passed in registers that have not been promoted |
| 301 | * to a callee-save register, flush them to the frame. Perform intial |
| 302 | * assignment of promoted arguments. |
| 303 | * |
| 304 | * ArgLocs is an array of location records describing the incoming arguments |
| 305 | * with one location record per word of argument. |
| 306 | */ |
Brian Carlstrom | 2ce745c | 2013-07-17 17:44:30 -0700 | [diff] [blame] | 307 | void Mir2Lir::FlushIns(RegLocation* ArgLocs, RegLocation rl_method) { |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 308 | /* |
| 309 | * Dummy up a RegLocation for the incoming Method* |
| 310 | * It will attempt to keep kArg0 live (or copy it to home location |
| 311 | * if promoted). |
| 312 | */ |
| 313 | RegLocation rl_src = rl_method; |
| 314 | rl_src.location = kLocPhysReg; |
Bill Buzbee | 00e1ec6 | 2014-02-27 23:44:13 +0000 | [diff] [blame] | 315 | rl_src.reg = RegStorage(RegStorage::k32BitSolo, TargetReg(kArg0)); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 316 | rl_src.home = false; |
Bill Buzbee | 00e1ec6 | 2014-02-27 23:44:13 +0000 | [diff] [blame] | 317 | MarkLive(rl_src.reg.GetReg(), rl_src.s_reg_low); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 318 | StoreValue(rl_method, rl_src); |
| 319 | // If Method* has been promoted, explicitly flush |
| 320 | if (rl_method.location == kLocPhysReg) { |
| 321 | StoreWordDisp(TargetReg(kSp), 0, TargetReg(kArg0)); |
| 322 | } |
| 323 | |
Razvan A Lupusoru | 3bc0174 | 2014-02-06 13:18:43 -0800 | [diff] [blame] | 324 | if (cu_->num_ins == 0) { |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 325 | return; |
Razvan A Lupusoru | 3bc0174 | 2014-02-06 13:18:43 -0800 | [diff] [blame] | 326 | } |
| 327 | |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 328 | int start_vreg = cu_->num_dalvik_registers - cu_->num_ins; |
| 329 | /* |
| 330 | * Copy incoming arguments to their proper home locations. |
| 331 | * NOTE: an older version of dx had an issue in which |
| 332 | * it would reuse static method argument registers. |
| 333 | * This could result in the same Dalvik virtual register |
| 334 | * being promoted to both core and fp regs. To account for this, |
| 335 | * we only copy to the corresponding promoted physical register |
| 336 | * if it matches the type of the SSA name for the incoming |
| 337 | * argument. It is also possible that long and double arguments |
| 338 | * end up half-promoted. In those cases, we must flush the promoted |
| 339 | * half to memory as well. |
| 340 | */ |
| 341 | for (int i = 0; i < cu_->num_ins; i++) { |
| 342 | PromotionMap* v_map = &promotion_map_[start_vreg + i]; |
Razvan A Lupusoru | 3bc0174 | 2014-02-06 13:18:43 -0800 | [diff] [blame] | 343 | int reg = GetArgMappingToPhysicalReg(i); |
| 344 | |
| 345 | if (reg != INVALID_REG) { |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 346 | // If arriving in register |
| 347 | bool need_flush = true; |
| 348 | RegLocation* t_loc = &ArgLocs[i]; |
| 349 | if ((v_map->core_location == kLocPhysReg) && !t_loc->fp) { |
Razvan A Lupusoru | 3bc0174 | 2014-02-06 13:18:43 -0800 | [diff] [blame] | 350 | OpRegCopy(v_map->core_reg, reg); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 351 | need_flush = false; |
| 352 | } else if ((v_map->fp_location == kLocPhysReg) && t_loc->fp) { |
Razvan A Lupusoru | 3bc0174 | 2014-02-06 13:18:43 -0800 | [diff] [blame] | 353 | OpRegCopy(v_map->FpReg, reg); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 354 | need_flush = false; |
| 355 | } else { |
| 356 | need_flush = true; |
| 357 | } |
| 358 | |
buzbee | d0a03b8 | 2013-09-14 08:21:05 -0700 | [diff] [blame] | 359 | // For wide args, force flush if not fully promoted |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 360 | if (t_loc->wide) { |
| 361 | PromotionMap* p_map = v_map + (t_loc->high_word ? -1 : +1); |
buzbee | d0a03b8 | 2013-09-14 08:21:05 -0700 | [diff] [blame] | 362 | // Is only half promoted? |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 363 | need_flush |= (p_map->core_location != v_map->core_location) || |
| 364 | (p_map->fp_location != v_map->fp_location); |
buzbee | d0a03b8 | 2013-09-14 08:21:05 -0700 | [diff] [blame] | 365 | if ((cu_->instruction_set == kThumb2) && t_loc->fp && !need_flush) { |
| 366 | /* |
| 367 | * In Arm, a double is represented as a pair of consecutive single float |
| 368 | * registers starting at an even number. It's possible that both Dalvik vRegs |
| 369 | * representing the incoming double were independently promoted as singles - but |
| 370 | * not in a form usable as a double. If so, we need to flush - even though the |
| 371 | * incoming arg appears fully in register. At this point in the code, both |
| 372 | * halves of the double are promoted. Make sure they are in a usable form. |
| 373 | */ |
| 374 | int lowreg_index = start_vreg + i + (t_loc->high_word ? -1 : 0); |
| 375 | int low_reg = promotion_map_[lowreg_index].FpReg; |
| 376 | int high_reg = promotion_map_[lowreg_index + 1].FpReg; |
| 377 | if (((low_reg & 0x1) != 0) || (high_reg != (low_reg + 1))) { |
| 378 | need_flush = true; |
| 379 | } |
| 380 | } |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 381 | } |
| 382 | if (need_flush) { |
Razvan A Lupusoru | 3bc0174 | 2014-02-06 13:18:43 -0800 | [diff] [blame] | 383 | StoreBaseDisp(TargetReg(kSp), SRegOffset(start_vreg + i), reg, kWord); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 384 | } |
| 385 | } else { |
| 386 | // If arriving in frame & promoted |
| 387 | if (v_map->core_location == kLocPhysReg) { |
| 388 | LoadWordDisp(TargetReg(kSp), SRegOffset(start_vreg + i), |
| 389 | v_map->core_reg); |
| 390 | } |
| 391 | if (v_map->fp_location == kLocPhysReg) { |
| 392 | LoadWordDisp(TargetReg(kSp), SRegOffset(start_vreg + i), |
| 393 | v_map->FpReg); |
| 394 | } |
| 395 | } |
| 396 | } |
| 397 | } |
| 398 | |
| 399 | /* |
| 400 | * Bit of a hack here - in the absence of a real scheduling pass, |
| 401 | * emit the next instruction in static & direct invoke sequences. |
| 402 | */ |
| 403 | static int NextSDCallInsn(CompilationUnit* cu, CallInfo* info, |
| 404 | int state, const MethodReference& target_method, |
| 405 | uint32_t unused, |
| 406 | uintptr_t direct_code, uintptr_t direct_method, |
Brian Carlstrom | 2ce745c | 2013-07-17 17:44:30 -0700 | [diff] [blame] | 407 | InvokeType type) { |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 408 | Mir2Lir* cg = static_cast<Mir2Lir*>(cu->cg.get()); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 409 | if (direct_code != 0 && direct_method != 0) { |
| 410 | switch (state) { |
| 411 | case 0: // Get the current Method* [sets kArg0] |
| 412 | if (direct_code != static_cast<unsigned int>(-1)) { |
Ian Rogers | 83883d7 | 2013-10-21 21:07:24 -0700 | [diff] [blame] | 413 | if (cu->instruction_set != kX86) { |
| 414 | cg->LoadConstant(cg->TargetReg(kInvokeTgt), direct_code); |
| 415 | } |
Mark Mendell | 55d0eac | 2014-02-06 11:02:52 -0800 | [diff] [blame] | 416 | } else if (cu->instruction_set != kX86) { |
Jeff Hao | 49161ce | 2014-03-12 11:05:25 -0700 | [diff] [blame] | 417 | cg->LoadCodeAddress(target_method, type, kInvokeTgt); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 418 | } |
| 419 | if (direct_method != static_cast<unsigned int>(-1)) { |
| 420 | cg->LoadConstant(cg->TargetReg(kArg0), direct_method); |
| 421 | } else { |
Jeff Hao | 49161ce | 2014-03-12 11:05:25 -0700 | [diff] [blame] | 422 | cg->LoadMethodAddress(target_method, type, kArg0); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 423 | } |
| 424 | break; |
| 425 | default: |
| 426 | return -1; |
| 427 | } |
| 428 | } else { |
| 429 | switch (state) { |
| 430 | case 0: // Get the current Method* [sets kArg0] |
| 431 | // TUNING: we can save a reg copy if Method* has been promoted. |
| 432 | cg->LoadCurrMethodDirect(cg->TargetReg(kArg0)); |
| 433 | break; |
| 434 | case 1: // Get method->dex_cache_resolved_methods_ |
| 435 | cg->LoadWordDisp(cg->TargetReg(kArg0), |
Brian Carlstrom | ea46f95 | 2013-07-30 01:26:50 -0700 | [diff] [blame] | 436 | mirror::ArtMethod::DexCacheResolvedMethodsOffset().Int32Value(), cg->TargetReg(kArg0)); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 437 | // Set up direct code if known. |
| 438 | if (direct_code != 0) { |
| 439 | if (direct_code != static_cast<unsigned int>(-1)) { |
| 440 | cg->LoadConstant(cg->TargetReg(kInvokeTgt), direct_code); |
Mark Mendell | 55d0eac | 2014-02-06 11:02:52 -0800 | [diff] [blame] | 441 | } else if (cu->instruction_set != kX86) { |
Ian Rogers | 83883d7 | 2013-10-21 21:07:24 -0700 | [diff] [blame] | 442 | CHECK_LT(target_method.dex_method_index, target_method.dex_file->NumMethodIds()); |
Jeff Hao | 49161ce | 2014-03-12 11:05:25 -0700 | [diff] [blame] | 443 | cg->LoadCodeAddress(target_method, type, kInvokeTgt); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 444 | } |
| 445 | } |
| 446 | break; |
| 447 | case 2: // Grab target method* |
| 448 | CHECK_EQ(cu->dex_file, target_method.dex_file); |
| 449 | cg->LoadWordDisp(cg->TargetReg(kArg0), |
| 450 | mirror::Array::DataOffset(sizeof(mirror::Object*)).Int32Value() + |
| 451 | (target_method.dex_method_index * 4), |
| 452 | cg-> TargetReg(kArg0)); |
| 453 | break; |
| 454 | case 3: // Grab the code from the method* |
| 455 | if (cu->instruction_set != kX86) { |
| 456 | if (direct_code == 0) { |
| 457 | cg->LoadWordDisp(cg->TargetReg(kArg0), |
Ian Rogers | ef7d42f | 2014-01-06 12:55:46 -0800 | [diff] [blame] | 458 | mirror::ArtMethod::EntryPointFromQuickCompiledCodeOffset().Int32Value(), |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 459 | cg->TargetReg(kInvokeTgt)); |
| 460 | } |
| 461 | break; |
| 462 | } |
| 463 | // Intentional fallthrough for x86 |
| 464 | default: |
| 465 | return -1; |
| 466 | } |
| 467 | } |
| 468 | return state + 1; |
| 469 | } |
| 470 | |
| 471 | /* |
| 472 | * Bit of a hack here - in the absence of a real scheduling pass, |
| 473 | * emit the next instruction in a virtual invoke sequence. |
| 474 | * We can use kLr as a temp prior to target address loading |
| 475 | * Note also that we'll load the first argument ("this") into |
| 476 | * kArg1 here rather than the standard LoadArgRegs. |
| 477 | */ |
| 478 | static int NextVCallInsn(CompilationUnit* cu, CallInfo* info, |
| 479 | int state, const MethodReference& target_method, |
| 480 | uint32_t method_idx, uintptr_t unused, uintptr_t unused2, |
Brian Carlstrom | 2ce745c | 2013-07-17 17:44:30 -0700 | [diff] [blame] | 481 | InvokeType unused3) { |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 482 | Mir2Lir* cg = static_cast<Mir2Lir*>(cu->cg.get()); |
| 483 | /* |
| 484 | * This is the fast path in which the target virtual method is |
| 485 | * fully resolved at compile time. |
| 486 | */ |
| 487 | switch (state) { |
| 488 | case 0: { // Get "this" [set kArg1] |
| 489 | RegLocation rl_arg = info->args[0]; |
| 490 | cg->LoadValueDirectFixed(rl_arg, cg->TargetReg(kArg1)); |
| 491 | break; |
| 492 | } |
Brian Carlstrom | 7934ac2 | 2013-07-26 10:54:15 -0700 | [diff] [blame] | 493 | case 1: // Is "this" null? [use kArg1] |
Dave Allison | b373e09 | 2014-02-20 16:06:36 -0800 | [diff] [blame] | 494 | cg->GenNullCheck(cg->TargetReg(kArg1), info->opt_flags); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 495 | // get this->klass_ [use kArg1, set kInvokeTgt] |
| 496 | cg->LoadWordDisp(cg->TargetReg(kArg1), mirror::Object::ClassOffset().Int32Value(), |
| 497 | cg->TargetReg(kInvokeTgt)); |
Dave Allison | b373e09 | 2014-02-20 16:06:36 -0800 | [diff] [blame] | 498 | cg->MarkPossibleNullPointerException(info->opt_flags); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 499 | break; |
Brian Carlstrom | 7934ac2 | 2013-07-26 10:54:15 -0700 | [diff] [blame] | 500 | case 2: // Get this->klass_->vtable [usr kInvokeTgt, set kInvokeTgt] |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 501 | cg->LoadWordDisp(cg->TargetReg(kInvokeTgt), mirror::Class::VTableOffset().Int32Value(), |
| 502 | cg->TargetReg(kInvokeTgt)); |
| 503 | break; |
Brian Carlstrom | 7934ac2 | 2013-07-26 10:54:15 -0700 | [diff] [blame] | 504 | case 3: // Get target method [use kInvokeTgt, set kArg0] |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 505 | cg->LoadWordDisp(cg->TargetReg(kInvokeTgt), (method_idx * 4) + |
| 506 | mirror::Array::DataOffset(sizeof(mirror::Object*)).Int32Value(), |
| 507 | cg->TargetReg(kArg0)); |
| 508 | break; |
Brian Carlstrom | 7934ac2 | 2013-07-26 10:54:15 -0700 | [diff] [blame] | 509 | case 4: // Get the compiled code address [uses kArg0, sets kInvokeTgt] |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 510 | if (cu->instruction_set != kX86) { |
| 511 | cg->LoadWordDisp(cg->TargetReg(kArg0), |
Ian Rogers | ef7d42f | 2014-01-06 12:55:46 -0800 | [diff] [blame] | 512 | mirror::ArtMethod::EntryPointFromQuickCompiledCodeOffset().Int32Value(), |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 513 | cg->TargetReg(kInvokeTgt)); |
| 514 | break; |
| 515 | } |
| 516 | // Intentional fallthrough for X86 |
| 517 | default: |
| 518 | return -1; |
| 519 | } |
| 520 | return state + 1; |
| 521 | } |
| 522 | |
| 523 | /* |
Jeff Hao | 88474b4 | 2013-10-23 16:24:40 -0700 | [diff] [blame] | 524 | * Emit the next instruction in an invoke interface sequence. This will do a lookup in the |
| 525 | * class's IMT, calling either the actual method or art_quick_imt_conflict_trampoline if |
| 526 | * more than one interface method map to the same index. Note also that we'll load the first |
| 527 | * argument ("this") into kArg1 here rather than the standard LoadArgRegs. |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 528 | */ |
| 529 | static int NextInterfaceCallInsn(CompilationUnit* cu, CallInfo* info, int state, |
| 530 | const MethodReference& target_method, |
Jeff Hao | 88474b4 | 2013-10-23 16:24:40 -0700 | [diff] [blame] | 531 | uint32_t method_idx, uintptr_t unused, |
| 532 | uintptr_t direct_method, InvokeType unused2) { |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 533 | Mir2Lir* cg = static_cast<Mir2Lir*>(cu->cg.get()); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 534 | |
Jeff Hao | 88474b4 | 2013-10-23 16:24:40 -0700 | [diff] [blame] | 535 | switch (state) { |
| 536 | case 0: // Set target method index in case of conflict [set kHiddenArg, kHiddenFpArg (x86)] |
Jeff Hao | 88474b4 | 2013-10-23 16:24:40 -0700 | [diff] [blame] | 537 | CHECK_LT(target_method.dex_method_index, target_method.dex_file->NumMethodIds()); |
| 538 | cg->LoadConstant(cg->TargetReg(kHiddenArg), target_method.dex_method_index); |
| 539 | if (cu->instruction_set == kX86) { |
| 540 | cg->OpRegCopy(cg->TargetReg(kHiddenFpArg), cg->TargetReg(kHiddenArg)); |
| 541 | } |
| 542 | break; |
| 543 | case 1: { // Get "this" [set kArg1] |
| 544 | RegLocation rl_arg = info->args[0]; |
| 545 | cg->LoadValueDirectFixed(rl_arg, cg->TargetReg(kArg1)); |
| 546 | break; |
| 547 | } |
| 548 | case 2: // Is "this" null? [use kArg1] |
Dave Allison | b373e09 | 2014-02-20 16:06:36 -0800 | [diff] [blame] | 549 | cg->GenNullCheck(cg->TargetReg(kArg1), info->opt_flags); |
Jeff Hao | 88474b4 | 2013-10-23 16:24:40 -0700 | [diff] [blame] | 550 | // Get this->klass_ [use kArg1, set kInvokeTgt] |
| 551 | cg->LoadWordDisp(cg->TargetReg(kArg1), mirror::Object::ClassOffset().Int32Value(), |
| 552 | cg->TargetReg(kInvokeTgt)); |
Dave Allison | b373e09 | 2014-02-20 16:06:36 -0800 | [diff] [blame] | 553 | cg->MarkPossibleNullPointerException(info->opt_flags); |
Jeff Hao | 88474b4 | 2013-10-23 16:24:40 -0700 | [diff] [blame] | 554 | break; |
| 555 | case 3: // Get this->klass_->imtable [use kInvokeTgt, set kInvokeTgt] |
| 556 | cg->LoadWordDisp(cg->TargetReg(kInvokeTgt), mirror::Class::ImTableOffset().Int32Value(), |
| 557 | cg->TargetReg(kInvokeTgt)); |
| 558 | break; |
| 559 | case 4: // Get target method [use kInvokeTgt, set kArg0] |
| 560 | cg->LoadWordDisp(cg->TargetReg(kInvokeTgt), ((method_idx % ClassLinker::kImtSize) * 4) + |
| 561 | mirror::Array::DataOffset(sizeof(mirror::Object*)).Int32Value(), |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 562 | cg->TargetReg(kArg0)); |
| 563 | break; |
Jeff Hao | 88474b4 | 2013-10-23 16:24:40 -0700 | [diff] [blame] | 564 | case 5: // Get the compiled code address [use kArg0, set kInvokeTgt] |
| 565 | if (cu->instruction_set != kX86) { |
| 566 | cg->LoadWordDisp(cg->TargetReg(kArg0), |
Ian Rogers | ef7d42f | 2014-01-06 12:55:46 -0800 | [diff] [blame] | 567 | mirror::ArtMethod::EntryPointFromQuickCompiledCodeOffset().Int32Value(), |
Jeff Hao | 88474b4 | 2013-10-23 16:24:40 -0700 | [diff] [blame] | 568 | cg->TargetReg(kInvokeTgt)); |
| 569 | break; |
| 570 | } |
| 571 | // Intentional fallthrough for X86 |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 572 | default: |
| 573 | return -1; |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 574 | } |
| 575 | return state + 1; |
| 576 | } |
| 577 | |
Ian Rogers | 848871b | 2013-08-05 10:56:33 -0700 | [diff] [blame] | 578 | static int NextInvokeInsnSP(CompilationUnit* cu, CallInfo* info, ThreadOffset trampoline, |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 579 | int state, const MethodReference& target_method, |
Brian Carlstrom | 2ce745c | 2013-07-17 17:44:30 -0700 | [diff] [blame] | 580 | uint32_t method_idx) { |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 581 | Mir2Lir* cg = static_cast<Mir2Lir*>(cu->cg.get()); |
| 582 | /* |
| 583 | * This handles the case in which the base method is not fully |
| 584 | * resolved at compile time, we bail to a runtime helper. |
| 585 | */ |
| 586 | if (state == 0) { |
| 587 | if (cu->instruction_set != kX86) { |
| 588 | // Load trampoline target |
Ian Rogers | 848871b | 2013-08-05 10:56:33 -0700 | [diff] [blame] | 589 | cg->LoadWordDisp(cg->TargetReg(kSelf), trampoline.Int32Value(), cg->TargetReg(kInvokeTgt)); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 590 | } |
| 591 | // Load kArg0 with method index |
| 592 | CHECK_EQ(cu->dex_file, target_method.dex_file); |
| 593 | cg->LoadConstant(cg->TargetReg(kArg0), target_method.dex_method_index); |
| 594 | return 1; |
| 595 | } |
| 596 | return -1; |
| 597 | } |
| 598 | |
| 599 | static int NextStaticCallInsnSP(CompilationUnit* cu, CallInfo* info, |
| 600 | int state, |
| 601 | const MethodReference& target_method, |
Vladimir Marko | f096aad | 2014-01-23 15:51:58 +0000 | [diff] [blame] | 602 | uint32_t unused, uintptr_t unused2, |
| 603 | uintptr_t unused3, InvokeType unused4) { |
Ian Rogers | 848871b | 2013-08-05 10:56:33 -0700 | [diff] [blame] | 604 | ThreadOffset trampoline = QUICK_ENTRYPOINT_OFFSET(pInvokeStaticTrampolineWithAccessCheck); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 605 | return NextInvokeInsnSP(cu, info, trampoline, state, target_method, 0); |
| 606 | } |
| 607 | |
| 608 | static int NextDirectCallInsnSP(CompilationUnit* cu, CallInfo* info, int state, |
| 609 | const MethodReference& target_method, |
Vladimir Marko | f096aad | 2014-01-23 15:51:58 +0000 | [diff] [blame] | 610 | uint32_t unused, uintptr_t unused2, |
| 611 | uintptr_t unused3, InvokeType unused4) { |
Ian Rogers | 848871b | 2013-08-05 10:56:33 -0700 | [diff] [blame] | 612 | ThreadOffset trampoline = QUICK_ENTRYPOINT_OFFSET(pInvokeDirectTrampolineWithAccessCheck); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 613 | return NextInvokeInsnSP(cu, info, trampoline, state, target_method, 0); |
| 614 | } |
| 615 | |
| 616 | static int NextSuperCallInsnSP(CompilationUnit* cu, CallInfo* info, int state, |
| 617 | const MethodReference& target_method, |
Vladimir Marko | f096aad | 2014-01-23 15:51:58 +0000 | [diff] [blame] | 618 | uint32_t unused, uintptr_t unused2, |
| 619 | uintptr_t unused3, InvokeType unused4) { |
Ian Rogers | 848871b | 2013-08-05 10:56:33 -0700 | [diff] [blame] | 620 | ThreadOffset trampoline = QUICK_ENTRYPOINT_OFFSET(pInvokeSuperTrampolineWithAccessCheck); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 621 | return NextInvokeInsnSP(cu, info, trampoline, state, target_method, 0); |
| 622 | } |
| 623 | |
| 624 | static int NextVCallInsnSP(CompilationUnit* cu, CallInfo* info, int state, |
| 625 | const MethodReference& target_method, |
Vladimir Marko | f096aad | 2014-01-23 15:51:58 +0000 | [diff] [blame] | 626 | uint32_t unused, uintptr_t unused2, |
| 627 | uintptr_t unused3, InvokeType unused4) { |
Ian Rogers | 848871b | 2013-08-05 10:56:33 -0700 | [diff] [blame] | 628 | ThreadOffset trampoline = QUICK_ENTRYPOINT_OFFSET(pInvokeVirtualTrampolineWithAccessCheck); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 629 | return NextInvokeInsnSP(cu, info, trampoline, state, target_method, 0); |
| 630 | } |
| 631 | |
| 632 | static int NextInterfaceCallInsnWithAccessCheck(CompilationUnit* cu, |
| 633 | CallInfo* info, int state, |
| 634 | const MethodReference& target_method, |
Vladimir Marko | f096aad | 2014-01-23 15:51:58 +0000 | [diff] [blame] | 635 | uint32_t unused, uintptr_t unused2, |
| 636 | uintptr_t unused3, InvokeType unused4) { |
Ian Rogers | 848871b | 2013-08-05 10:56:33 -0700 | [diff] [blame] | 637 | ThreadOffset trampoline = QUICK_ENTRYPOINT_OFFSET(pInvokeInterfaceTrampolineWithAccessCheck); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 638 | return NextInvokeInsnSP(cu, info, trampoline, state, target_method, 0); |
| 639 | } |
| 640 | |
| 641 | int Mir2Lir::LoadArgRegs(CallInfo* info, int call_state, |
| 642 | NextCallInsn next_call_insn, |
| 643 | const MethodReference& target_method, |
| 644 | uint32_t vtable_idx, uintptr_t direct_code, |
Brian Carlstrom | 2ce745c | 2013-07-17 17:44:30 -0700 | [diff] [blame] | 645 | uintptr_t direct_method, InvokeType type, bool skip_this) { |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 646 | int last_arg_reg = TargetReg(kArg3); |
| 647 | int next_reg = TargetReg(kArg1); |
| 648 | int next_arg = 0; |
| 649 | if (skip_this) { |
| 650 | next_reg++; |
| 651 | next_arg++; |
| 652 | } |
| 653 | for (; (next_reg <= last_arg_reg) && (next_arg < info->num_arg_words); next_reg++) { |
| 654 | RegLocation rl_arg = info->args[next_arg++]; |
| 655 | rl_arg = UpdateRawLoc(rl_arg); |
| 656 | if (rl_arg.wide && (next_reg <= TargetReg(kArg2))) { |
| 657 | LoadValueDirectWideFixed(rl_arg, next_reg, next_reg + 1); |
| 658 | next_reg++; |
| 659 | next_arg++; |
| 660 | } else { |
| 661 | if (rl_arg.wide) { |
| 662 | rl_arg.wide = false; |
| 663 | rl_arg.is_const = false; |
| 664 | } |
| 665 | LoadValueDirectFixed(rl_arg, next_reg); |
| 666 | } |
| 667 | call_state = next_call_insn(cu_, info, call_state, target_method, vtable_idx, |
| 668 | direct_code, direct_method, type); |
| 669 | } |
| 670 | return call_state; |
| 671 | } |
| 672 | |
| 673 | /* |
| 674 | * Load up to 5 arguments, the first three of which will be in |
| 675 | * kArg1 .. kArg3. On entry kArg0 contains the current method pointer, |
| 676 | * and as part of the load sequence, it must be replaced with |
| 677 | * the target method pointer. Note, this may also be called |
| 678 | * for "range" variants if the number of arguments is 5 or fewer. |
| 679 | */ |
| 680 | int Mir2Lir::GenDalvikArgsNoRange(CallInfo* info, |
| 681 | int call_state, LIR** pcrLabel, NextCallInsn next_call_insn, |
| 682 | const MethodReference& target_method, |
| 683 | uint32_t vtable_idx, uintptr_t direct_code, |
Brian Carlstrom | 2ce745c | 2013-07-17 17:44:30 -0700 | [diff] [blame] | 684 | uintptr_t direct_method, InvokeType type, bool skip_this) { |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 685 | RegLocation rl_arg; |
| 686 | |
| 687 | /* If no arguments, just return */ |
| 688 | if (info->num_arg_words == 0) |
| 689 | return call_state; |
| 690 | |
| 691 | call_state = next_call_insn(cu_, info, call_state, target_method, vtable_idx, |
| 692 | direct_code, direct_method, type); |
| 693 | |
| 694 | DCHECK_LE(info->num_arg_words, 5); |
| 695 | if (info->num_arg_words > 3) { |
| 696 | int32_t next_use = 3; |
Brian Carlstrom | 7934ac2 | 2013-07-26 10:54:15 -0700 | [diff] [blame] | 697 | // Detect special case of wide arg spanning arg3/arg4 |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 698 | RegLocation rl_use0 = info->args[0]; |
| 699 | RegLocation rl_use1 = info->args[1]; |
| 700 | RegLocation rl_use2 = info->args[2]; |
| 701 | if (((!rl_use0.wide && !rl_use1.wide) || rl_use0.wide) && |
| 702 | rl_use2.wide) { |
| 703 | int reg = -1; |
| 704 | // Wide spans, we need the 2nd half of uses[2]. |
| 705 | rl_arg = UpdateLocWide(rl_use2); |
| 706 | if (rl_arg.location == kLocPhysReg) { |
Bill Buzbee | 00e1ec6 | 2014-02-27 23:44:13 +0000 | [diff] [blame] | 707 | reg = rl_arg.reg.GetHighReg(); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 708 | } else { |
| 709 | // kArg2 & rArg3 can safely be used here |
| 710 | reg = TargetReg(kArg3); |
| 711 | LoadWordDisp(TargetReg(kSp), SRegOffset(rl_arg.s_reg_low) + 4, reg); |
| 712 | call_state = next_call_insn(cu_, info, call_state, target_method, |
| 713 | vtable_idx, direct_code, direct_method, type); |
| 714 | } |
| 715 | StoreBaseDisp(TargetReg(kSp), (next_use + 1) * 4, reg, kWord); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 716 | call_state = next_call_insn(cu_, info, call_state, target_method, vtable_idx, |
| 717 | direct_code, direct_method, type); |
| 718 | next_use++; |
| 719 | } |
| 720 | // Loop through the rest |
| 721 | while (next_use < info->num_arg_words) { |
| 722 | int low_reg; |
| 723 | int high_reg = -1; |
| 724 | rl_arg = info->args[next_use]; |
| 725 | rl_arg = UpdateRawLoc(rl_arg); |
| 726 | if (rl_arg.location == kLocPhysReg) { |
Bill Buzbee | 00e1ec6 | 2014-02-27 23:44:13 +0000 | [diff] [blame] | 727 | low_reg = rl_arg.reg.GetReg(); |
| 728 | if (rl_arg.wide) { |
| 729 | high_reg = rl_arg.reg.GetHighReg(); |
| 730 | } |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 731 | } else { |
| 732 | low_reg = TargetReg(kArg2); |
| 733 | if (rl_arg.wide) { |
| 734 | high_reg = TargetReg(kArg3); |
| 735 | LoadValueDirectWideFixed(rl_arg, low_reg, high_reg); |
| 736 | } else { |
| 737 | LoadValueDirectFixed(rl_arg, low_reg); |
| 738 | } |
| 739 | call_state = next_call_insn(cu_, info, call_state, target_method, |
| 740 | vtable_idx, direct_code, direct_method, type); |
| 741 | } |
| 742 | int outs_offset = (next_use + 1) * 4; |
| 743 | if (rl_arg.wide) { |
| 744 | StoreBaseDispWide(TargetReg(kSp), outs_offset, low_reg, high_reg); |
| 745 | next_use += 2; |
| 746 | } else { |
| 747 | StoreWordDisp(TargetReg(kSp), outs_offset, low_reg); |
| 748 | next_use++; |
| 749 | } |
| 750 | call_state = next_call_insn(cu_, info, call_state, target_method, vtable_idx, |
| 751 | direct_code, direct_method, type); |
| 752 | } |
| 753 | } |
| 754 | |
| 755 | call_state = LoadArgRegs(info, call_state, next_call_insn, |
| 756 | target_method, vtable_idx, direct_code, direct_method, |
| 757 | type, skip_this); |
| 758 | |
| 759 | if (pcrLabel) { |
Dave Allison | b373e09 | 2014-02-20 16:06:36 -0800 | [diff] [blame] | 760 | *pcrLabel = GenNullCheck(TargetReg(kArg1), info->opt_flags); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 761 | } |
| 762 | return call_state; |
| 763 | } |
| 764 | |
| 765 | /* |
| 766 | * May have 0+ arguments (also used for jumbo). Note that |
| 767 | * source virtual registers may be in physical registers, so may |
| 768 | * need to be flushed to home location before copying. This |
| 769 | * applies to arg3 and above (see below). |
| 770 | * |
| 771 | * Two general strategies: |
| 772 | * If < 20 arguments |
| 773 | * Pass args 3-18 using vldm/vstm block copy |
| 774 | * Pass arg0, arg1 & arg2 in kArg1-kArg3 |
| 775 | * If 20+ arguments |
| 776 | * Pass args arg19+ using memcpy block copy |
| 777 | * Pass arg0, arg1 & arg2 in kArg1-kArg3 |
| 778 | * |
| 779 | */ |
| 780 | int Mir2Lir::GenDalvikArgsRange(CallInfo* info, int call_state, |
| 781 | LIR** pcrLabel, NextCallInsn next_call_insn, |
| 782 | const MethodReference& target_method, |
| 783 | uint32_t vtable_idx, uintptr_t direct_code, uintptr_t direct_method, |
Brian Carlstrom | 2ce745c | 2013-07-17 17:44:30 -0700 | [diff] [blame] | 784 | InvokeType type, bool skip_this) { |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 785 | // If we can treat it as non-range (Jumbo ops will use range form) |
| 786 | if (info->num_arg_words <= 5) |
| 787 | return GenDalvikArgsNoRange(info, call_state, pcrLabel, |
| 788 | next_call_insn, target_method, vtable_idx, |
| 789 | direct_code, direct_method, type, skip_this); |
| 790 | /* |
| 791 | * First load the non-register arguments. Both forms expect all |
| 792 | * of the source arguments to be in their home frame location, so |
| 793 | * scan the s_reg names and flush any that have been promoted to |
| 794 | * frame backing storage. |
| 795 | */ |
| 796 | // Scan the rest of the args - if in phys_reg flush to memory |
| 797 | for (int next_arg = 0; next_arg < info->num_arg_words;) { |
| 798 | RegLocation loc = info->args[next_arg]; |
| 799 | if (loc.wide) { |
| 800 | loc = UpdateLocWide(loc); |
| 801 | if ((next_arg >= 2) && (loc.location == kLocPhysReg)) { |
| 802 | StoreBaseDispWide(TargetReg(kSp), SRegOffset(loc.s_reg_low), |
Bill Buzbee | 00e1ec6 | 2014-02-27 23:44:13 +0000 | [diff] [blame] | 803 | loc.reg.GetReg(), loc.reg.GetHighReg()); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 804 | } |
| 805 | next_arg += 2; |
| 806 | } else { |
| 807 | loc = UpdateLoc(loc); |
| 808 | if ((next_arg >= 3) && (loc.location == kLocPhysReg)) { |
| 809 | StoreBaseDisp(TargetReg(kSp), SRegOffset(loc.s_reg_low), |
Bill Buzbee | 00e1ec6 | 2014-02-27 23:44:13 +0000 | [diff] [blame] | 810 | loc.reg.GetReg(), kWord); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 811 | } |
| 812 | next_arg++; |
| 813 | } |
| 814 | } |
| 815 | |
Razvan A Lupusoru | 2c498d1 | 2014-01-29 16:02:57 -0800 | [diff] [blame] | 816 | // Logic below assumes that Method pointer is at offset zero from SP. |
| 817 | DCHECK_EQ(VRegOffset(static_cast<int>(kVRegMethodPtrBaseReg)), 0); |
| 818 | |
| 819 | // The first 3 arguments are passed via registers. |
| 820 | // TODO: For 64-bit, instead of hardcoding 4 for Method* size, we should either |
| 821 | // get size of uintptr_t or size of object reference according to model being used. |
| 822 | int outs_offset = 4 /* Method* */ + (3 * sizeof(uint32_t)); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 823 | int start_offset = SRegOffset(info->args[3].s_reg_low); |
Razvan A Lupusoru | 2c498d1 | 2014-01-29 16:02:57 -0800 | [diff] [blame] | 824 | int regs_left_to_pass_via_stack = info->num_arg_words - 3; |
| 825 | DCHECK_GT(regs_left_to_pass_via_stack, 0); |
| 826 | |
| 827 | if (cu_->instruction_set == kThumb2 && regs_left_to_pass_via_stack <= 16) { |
| 828 | // Use vldm/vstm pair using kArg3 as a temp |
| 829 | call_state = next_call_insn(cu_, info, call_state, target_method, vtable_idx, |
| 830 | direct_code, direct_method, type); |
| 831 | OpRegRegImm(kOpAdd, TargetReg(kArg3), TargetReg(kSp), start_offset); |
| 832 | LIR* ld = OpVldm(TargetReg(kArg3), regs_left_to_pass_via_stack); |
| 833 | // TUNING: loosen barrier |
| 834 | ld->u.m.def_mask = ENCODE_ALL; |
| 835 | SetMemRefType(ld, true /* is_load */, kDalvikReg); |
| 836 | call_state = next_call_insn(cu_, info, call_state, target_method, vtable_idx, |
| 837 | direct_code, direct_method, type); |
| 838 | OpRegRegImm(kOpAdd, TargetReg(kArg3), TargetReg(kSp), 4 /* Method* */ + (3 * 4)); |
| 839 | call_state = next_call_insn(cu_, info, call_state, target_method, vtable_idx, |
| 840 | direct_code, direct_method, type); |
| 841 | LIR* st = OpVstm(TargetReg(kArg3), regs_left_to_pass_via_stack); |
| 842 | SetMemRefType(st, false /* is_load */, kDalvikReg); |
| 843 | st->u.m.def_mask = ENCODE_ALL; |
| 844 | call_state = next_call_insn(cu_, info, call_state, target_method, vtable_idx, |
| 845 | direct_code, direct_method, type); |
| 846 | } else if (cu_->instruction_set == kX86) { |
| 847 | int current_src_offset = start_offset; |
| 848 | int current_dest_offset = outs_offset; |
| 849 | |
| 850 | while (regs_left_to_pass_via_stack > 0) { |
| 851 | // This is based on the knowledge that the stack itself is 16-byte aligned. |
| 852 | bool src_is_16b_aligned = (current_src_offset & 0xF) == 0; |
| 853 | bool dest_is_16b_aligned = (current_dest_offset & 0xF) == 0; |
| 854 | size_t bytes_to_move; |
| 855 | |
| 856 | /* |
| 857 | * The amount to move defaults to 32-bit. If there are 4 registers left to move, then do a |
| 858 | * a 128-bit move because we won't get the chance to try to aligned. If there are more than |
| 859 | * 4 registers left to move, consider doing a 128-bit only if either src or dest are aligned. |
| 860 | * We do this because we could potentially do a smaller move to align. |
| 861 | */ |
| 862 | if (regs_left_to_pass_via_stack == 4 || |
| 863 | (regs_left_to_pass_via_stack > 4 && (src_is_16b_aligned || dest_is_16b_aligned))) { |
| 864 | // Moving 128-bits via xmm register. |
| 865 | bytes_to_move = sizeof(uint32_t) * 4; |
| 866 | |
| 867 | // Allocate a free xmm temp. Since we are working through the calling sequence, |
| 868 | // we expect to have an xmm temporary available. |
| 869 | int temp = AllocTempDouble(); |
| 870 | CHECK_GT(temp, 0); |
| 871 | |
| 872 | LIR* ld1 = nullptr; |
| 873 | LIR* ld2 = nullptr; |
| 874 | LIR* st1 = nullptr; |
| 875 | LIR* st2 = nullptr; |
| 876 | |
| 877 | /* |
| 878 | * The logic is similar for both loads and stores. If we have 16-byte alignment, |
| 879 | * do an aligned move. If we have 8-byte alignment, then do the move in two |
| 880 | * parts. This approach prevents possible cache line splits. Finally, fall back |
| 881 | * to doing an unaligned move. In most cases we likely won't split the cache |
| 882 | * line but we cannot prove it and thus take a conservative approach. |
| 883 | */ |
| 884 | bool src_is_8b_aligned = (current_src_offset & 0x7) == 0; |
| 885 | bool dest_is_8b_aligned = (current_dest_offset & 0x7) == 0; |
| 886 | |
| 887 | if (src_is_16b_aligned) { |
| 888 | ld1 = OpMovRegMem(temp, TargetReg(kSp), current_src_offset, kMovA128FP); |
| 889 | } else if (src_is_8b_aligned) { |
| 890 | ld1 = OpMovRegMem(temp, TargetReg(kSp), current_src_offset, kMovLo128FP); |
| 891 | ld2 = OpMovRegMem(temp, TargetReg(kSp), current_src_offset + (bytes_to_move >> 1), kMovHi128FP); |
| 892 | } else { |
| 893 | ld1 = OpMovRegMem(temp, TargetReg(kSp), current_src_offset, kMovU128FP); |
| 894 | } |
| 895 | |
| 896 | if (dest_is_16b_aligned) { |
| 897 | st1 = OpMovMemReg(TargetReg(kSp), current_dest_offset, temp, kMovA128FP); |
| 898 | } else if (dest_is_8b_aligned) { |
| 899 | st1 = OpMovMemReg(TargetReg(kSp), current_dest_offset, temp, kMovLo128FP); |
| 900 | st2 = OpMovMemReg(TargetReg(kSp), current_dest_offset + (bytes_to_move >> 1), temp, kMovHi128FP); |
| 901 | } else { |
| 902 | st1 = OpMovMemReg(TargetReg(kSp), current_dest_offset, temp, kMovU128FP); |
| 903 | } |
| 904 | |
| 905 | // TODO If we could keep track of aliasing information for memory accesses that are wider |
| 906 | // than 64-bit, we wouldn't need to set up a barrier. |
| 907 | if (ld1 != nullptr) { |
| 908 | if (ld2 != nullptr) { |
| 909 | // For 64-bit load we can actually set up the aliasing information. |
| 910 | AnnotateDalvikRegAccess(ld1, current_src_offset >> 2, true, true); |
| 911 | AnnotateDalvikRegAccess(ld2, (current_src_offset + (bytes_to_move >> 1)) >> 2, true, true); |
| 912 | } else { |
| 913 | // Set barrier for 128-bit load. |
| 914 | SetMemRefType(ld1, true /* is_load */, kDalvikReg); |
| 915 | ld1->u.m.def_mask = ENCODE_ALL; |
| 916 | } |
| 917 | } |
| 918 | if (st1 != nullptr) { |
| 919 | if (st2 != nullptr) { |
| 920 | // For 64-bit store we can actually set up the aliasing information. |
| 921 | AnnotateDalvikRegAccess(st1, current_dest_offset >> 2, false, true); |
| 922 | AnnotateDalvikRegAccess(st2, (current_dest_offset + (bytes_to_move >> 1)) >> 2, false, true); |
| 923 | } else { |
| 924 | // Set barrier for 128-bit store. |
| 925 | SetMemRefType(st1, false /* is_load */, kDalvikReg); |
| 926 | st1->u.m.def_mask = ENCODE_ALL; |
| 927 | } |
| 928 | } |
| 929 | |
| 930 | // Free the temporary used for the data movement. |
| 931 | FreeTemp(temp); |
| 932 | } else { |
| 933 | // Moving 32-bits via general purpose register. |
| 934 | bytes_to_move = sizeof(uint32_t); |
| 935 | |
| 936 | // Instead of allocating a new temp, simply reuse one of the registers being used |
| 937 | // for argument passing. |
| 938 | int temp = TargetReg(kArg3); |
| 939 | |
| 940 | // Now load the argument VR and store to the outs. |
| 941 | LoadWordDisp(TargetReg(kSp), current_src_offset, temp); |
| 942 | StoreWordDisp(TargetReg(kSp), current_dest_offset, temp); |
| 943 | } |
| 944 | |
| 945 | current_src_offset += bytes_to_move; |
| 946 | current_dest_offset += bytes_to_move; |
| 947 | regs_left_to_pass_via_stack -= (bytes_to_move >> 2); |
| 948 | } |
| 949 | } else { |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 950 | // Generate memcpy |
| 951 | OpRegRegImm(kOpAdd, TargetReg(kArg0), TargetReg(kSp), outs_offset); |
| 952 | OpRegRegImm(kOpAdd, TargetReg(kArg1), TargetReg(kSp), start_offset); |
Ian Rogers | 7655f29 | 2013-07-29 11:07:13 -0700 | [diff] [blame] | 953 | CallRuntimeHelperRegRegImm(QUICK_ENTRYPOINT_OFFSET(pMemcpy), TargetReg(kArg0), |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 954 | TargetReg(kArg1), (info->num_arg_words - 3) * 4, false); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 955 | } |
| 956 | |
| 957 | call_state = LoadArgRegs(info, call_state, next_call_insn, |
| 958 | target_method, vtable_idx, direct_code, direct_method, |
| 959 | type, skip_this); |
| 960 | |
| 961 | call_state = next_call_insn(cu_, info, call_state, target_method, vtable_idx, |
| 962 | direct_code, direct_method, type); |
| 963 | if (pcrLabel) { |
Dave Allison | b373e09 | 2014-02-20 16:06:36 -0800 | [diff] [blame] | 964 | *pcrLabel = GenNullCheck(TargetReg(kArg1), info->opt_flags); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 965 | } |
| 966 | return call_state; |
| 967 | } |
| 968 | |
Brian Carlstrom | 2ce745c | 2013-07-17 17:44:30 -0700 | [diff] [blame] | 969 | RegLocation Mir2Lir::InlineTarget(CallInfo* info) { |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 970 | RegLocation res; |
| 971 | if (info->result.location == kLocInvalid) { |
| 972 | res = GetReturn(false); |
| 973 | } else { |
| 974 | res = info->result; |
| 975 | } |
| 976 | return res; |
| 977 | } |
| 978 | |
Brian Carlstrom | 2ce745c | 2013-07-17 17:44:30 -0700 | [diff] [blame] | 979 | RegLocation Mir2Lir::InlineTargetWide(CallInfo* info) { |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 980 | RegLocation res; |
| 981 | if (info->result.location == kLocInvalid) { |
| 982 | res = GetReturnWide(false); |
| 983 | } else { |
| 984 | res = info->result; |
| 985 | } |
| 986 | return res; |
| 987 | } |
| 988 | |
Brian Carlstrom | 2ce745c | 2013-07-17 17:44:30 -0700 | [diff] [blame] | 989 | bool Mir2Lir::GenInlinedCharAt(CallInfo* info) { |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 990 | if (cu_->instruction_set == kMips) { |
| 991 | // TODO - add Mips implementation |
| 992 | return false; |
| 993 | } |
| 994 | // Location of reference to data array |
| 995 | int value_offset = mirror::String::ValueOffset().Int32Value(); |
| 996 | // Location of count |
| 997 | int count_offset = mirror::String::CountOffset().Int32Value(); |
| 998 | // Starting offset within data array |
| 999 | int offset_offset = mirror::String::OffsetOffset().Int32Value(); |
| 1000 | // Start of char data with array_ |
| 1001 | int data_offset = mirror::Array::DataOffset(sizeof(uint16_t)).Int32Value(); |
| 1002 | |
| 1003 | RegLocation rl_obj = info->args[0]; |
| 1004 | RegLocation rl_idx = info->args[1]; |
| 1005 | rl_obj = LoadValue(rl_obj, kCoreReg); |
Mark Mendell | 2b724cb | 2014-02-06 05:24:20 -0800 | [diff] [blame] | 1006 | // X86 wants to avoid putting a constant index into a register. |
| 1007 | if (!(cu_->instruction_set == kX86 && rl_idx.is_const)) { |
| 1008 | rl_idx = LoadValue(rl_idx, kCoreReg); |
| 1009 | } |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 1010 | int reg_max; |
Dave Allison | b373e09 | 2014-02-20 16:06:36 -0800 | [diff] [blame] | 1011 | GenNullCheck(rl_obj.reg.GetReg(), info->opt_flags); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 1012 | bool range_check = (!(info->opt_flags & MIR_IGNORE_RANGE_CHECK)); |
Vladimir Marko | 3bc8615 | 2014-03-13 14:11:28 +0000 | [diff] [blame] | 1013 | LIR* range_check_branch = nullptr; |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 1014 | int reg_off = INVALID_REG; |
| 1015 | int reg_ptr = INVALID_REG; |
| 1016 | if (cu_->instruction_set != kX86) { |
| 1017 | reg_off = AllocTemp(); |
| 1018 | reg_ptr = AllocTemp(); |
| 1019 | if (range_check) { |
| 1020 | reg_max = AllocTemp(); |
Bill Buzbee | 00e1ec6 | 2014-02-27 23:44:13 +0000 | [diff] [blame] | 1021 | LoadWordDisp(rl_obj.reg.GetReg(), count_offset, reg_max); |
Dave Allison | b373e09 | 2014-02-20 16:06:36 -0800 | [diff] [blame] | 1022 | MarkPossibleNullPointerException(info->opt_flags); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 1023 | } |
Bill Buzbee | 00e1ec6 | 2014-02-27 23:44:13 +0000 | [diff] [blame] | 1024 | LoadWordDisp(rl_obj.reg.GetReg(), offset_offset, reg_off); |
Dave Allison | b373e09 | 2014-02-20 16:06:36 -0800 | [diff] [blame] | 1025 | MarkPossibleNullPointerException(info->opt_flags); |
Bill Buzbee | 00e1ec6 | 2014-02-27 23:44:13 +0000 | [diff] [blame] | 1026 | LoadWordDisp(rl_obj.reg.GetReg(), value_offset, reg_ptr); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 1027 | if (range_check) { |
| 1028 | // Set up a launch pad to allow retry in case of bounds violation */ |
Bill Buzbee | 00e1ec6 | 2014-02-27 23:44:13 +0000 | [diff] [blame] | 1029 | OpRegReg(kOpCmp, rl_idx.reg.GetReg(), reg_max); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 1030 | FreeTemp(reg_max); |
Vladimir Marko | 3bc8615 | 2014-03-13 14:11:28 +0000 | [diff] [blame] | 1031 | range_check_branch = OpCondBranch(kCondUge, nullptr); |
Brian Carlstrom | 6f485c6 | 2013-07-18 15:35:35 -0700 | [diff] [blame] | 1032 | } |
Mark Mendell | 2b724cb | 2014-02-06 05:24:20 -0800 | [diff] [blame] | 1033 | OpRegImm(kOpAdd, reg_ptr, data_offset); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 1034 | } else { |
| 1035 | if (range_check) { |
Mark Mendell | 2b724cb | 2014-02-06 05:24:20 -0800 | [diff] [blame] | 1036 | // On x86, we can compare to memory directly |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 1037 | // Set up a launch pad to allow retry in case of bounds violation */ |
Mark Mendell | 2b724cb | 2014-02-06 05:24:20 -0800 | [diff] [blame] | 1038 | if (rl_idx.is_const) { |
Vladimir Marko | 3bc8615 | 2014-03-13 14:11:28 +0000 | [diff] [blame] | 1039 | range_check_branch = OpCmpMemImmBranch( |
| 1040 | kCondUlt, INVALID_REG, rl_obj.reg.GetReg(), count_offset, |
| 1041 | mir_graph_->ConstantValue(rl_idx.orig_sreg), nullptr); |
Mark Mendell | 2b724cb | 2014-02-06 05:24:20 -0800 | [diff] [blame] | 1042 | } else { |
Bill Buzbee | 00e1ec6 | 2014-02-27 23:44:13 +0000 | [diff] [blame] | 1043 | OpRegMem(kOpCmp, rl_idx.reg.GetReg(), rl_obj.reg.GetReg(), count_offset); |
Vladimir Marko | 3bc8615 | 2014-03-13 14:11:28 +0000 | [diff] [blame] | 1044 | range_check_branch = OpCondBranch(kCondUge, nullptr); |
Mark Mendell | 2b724cb | 2014-02-06 05:24:20 -0800 | [diff] [blame] | 1045 | } |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 1046 | } |
| 1047 | reg_off = AllocTemp(); |
| 1048 | reg_ptr = AllocTemp(); |
Bill Buzbee | 00e1ec6 | 2014-02-27 23:44:13 +0000 | [diff] [blame] | 1049 | LoadWordDisp(rl_obj.reg.GetReg(), offset_offset, reg_off); |
| 1050 | LoadWordDisp(rl_obj.reg.GetReg(), value_offset, reg_ptr); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 1051 | } |
Mark Mendell | 2b724cb | 2014-02-06 05:24:20 -0800 | [diff] [blame] | 1052 | if (rl_idx.is_const) { |
| 1053 | OpRegImm(kOpAdd, reg_off, mir_graph_->ConstantValue(rl_idx.orig_sreg)); |
| 1054 | } else { |
Bill Buzbee | 00e1ec6 | 2014-02-27 23:44:13 +0000 | [diff] [blame] | 1055 | OpRegReg(kOpAdd, reg_off, rl_idx.reg.GetReg()); |
Mark Mendell | 2b724cb | 2014-02-06 05:24:20 -0800 | [diff] [blame] | 1056 | } |
Bill Buzbee | 00e1ec6 | 2014-02-27 23:44:13 +0000 | [diff] [blame] | 1057 | FreeTemp(rl_obj.reg.GetReg()); |
| 1058 | if (rl_idx.location == kLocPhysReg) { |
| 1059 | FreeTemp(rl_idx.reg.GetReg()); |
Mark Mendell | 2b724cb | 2014-02-06 05:24:20 -0800 | [diff] [blame] | 1060 | } |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 1061 | RegLocation rl_dest = InlineTarget(info); |
| 1062 | RegLocation rl_result = EvalLoc(rl_dest, kCoreReg, true); |
Mark Mendell | 2b724cb | 2014-02-06 05:24:20 -0800 | [diff] [blame] | 1063 | if (cu_->instruction_set != kX86) { |
Bill Buzbee | 00e1ec6 | 2014-02-27 23:44:13 +0000 | [diff] [blame] | 1064 | LoadBaseIndexed(reg_ptr, reg_off, rl_result.reg.GetReg(), 1, kUnsignedHalf); |
Mark Mendell | 2b724cb | 2014-02-06 05:24:20 -0800 | [diff] [blame] | 1065 | } else { |
Bill Buzbee | 00e1ec6 | 2014-02-27 23:44:13 +0000 | [diff] [blame] | 1066 | LoadBaseIndexedDisp(reg_ptr, reg_off, 1, data_offset, rl_result.reg.GetReg(), |
Mark Mendell | 2b724cb | 2014-02-06 05:24:20 -0800 | [diff] [blame] | 1067 | INVALID_REG, kUnsignedHalf, INVALID_SREG); |
| 1068 | } |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 1069 | FreeTemp(reg_off); |
| 1070 | FreeTemp(reg_ptr); |
| 1071 | StoreValue(rl_dest, rl_result); |
| 1072 | if (range_check) { |
Vladimir Marko | 3bc8615 | 2014-03-13 14:11:28 +0000 | [diff] [blame] | 1073 | DCHECK(range_check_branch != nullptr); |
| 1074 | info->opt_flags |= MIR_IGNORE_NULL_CHECK; // Record that we've already null checked. |
| 1075 | AddIntrinsicLaunchpad(info, range_check_branch); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 1076 | } |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 1077 | return true; |
| 1078 | } |
| 1079 | |
| 1080 | // Generates an inlined String.is_empty or String.length. |
Brian Carlstrom | 2ce745c | 2013-07-17 17:44:30 -0700 | [diff] [blame] | 1081 | bool Mir2Lir::GenInlinedStringIsEmptyOrLength(CallInfo* info, bool is_empty) { |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 1082 | if (cu_->instruction_set == kMips) { |
| 1083 | // TODO - add Mips implementation |
| 1084 | return false; |
| 1085 | } |
| 1086 | // dst = src.length(); |
| 1087 | RegLocation rl_obj = info->args[0]; |
| 1088 | rl_obj = LoadValue(rl_obj, kCoreReg); |
| 1089 | RegLocation rl_dest = InlineTarget(info); |
| 1090 | RegLocation rl_result = EvalLoc(rl_dest, kCoreReg, true); |
Dave Allison | b373e09 | 2014-02-20 16:06:36 -0800 | [diff] [blame] | 1091 | GenNullCheck(rl_obj.reg.GetReg(), info->opt_flags); |
| 1092 | LoadWordDisp(rl_obj.reg.GetReg(), mirror::String::CountOffset().Int32Value(), |
| 1093 | rl_result.reg.GetReg()); |
| 1094 | MarkPossibleNullPointerException(info->opt_flags); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 1095 | if (is_empty) { |
| 1096 | // dst = (dst == 0); |
| 1097 | if (cu_->instruction_set == kThumb2) { |
| 1098 | int t_reg = AllocTemp(); |
Bill Buzbee | 00e1ec6 | 2014-02-27 23:44:13 +0000 | [diff] [blame] | 1099 | OpRegReg(kOpNeg, t_reg, rl_result.reg.GetReg()); |
| 1100 | OpRegRegReg(kOpAdc, rl_result.reg.GetReg(), rl_result.reg.GetReg(), t_reg); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 1101 | } else { |
| 1102 | DCHECK_EQ(cu_->instruction_set, kX86); |
Bill Buzbee | 00e1ec6 | 2014-02-27 23:44:13 +0000 | [diff] [blame] | 1103 | OpRegImm(kOpSub, rl_result.reg.GetReg(), 1); |
| 1104 | OpRegImm(kOpLsr, rl_result.reg.GetReg(), 31); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 1105 | } |
| 1106 | } |
| 1107 | StoreValue(rl_dest, rl_result); |
| 1108 | return true; |
| 1109 | } |
| 1110 | |
Vladimir Marko | 6bdf1ff | 2013-10-29 17:40:46 +0000 | [diff] [blame] | 1111 | bool Mir2Lir::GenInlinedReverseBytes(CallInfo* info, OpSize size) { |
| 1112 | if (cu_->instruction_set == kMips) { |
| 1113 | // TODO - add Mips implementation |
| 1114 | return false; |
| 1115 | } |
| 1116 | RegLocation rl_src_i = info->args[0]; |
Mark Mendell | 55d0eac | 2014-02-06 11:02:52 -0800 | [diff] [blame] | 1117 | RegLocation rl_dest = (size == kLong) ? InlineTargetWide(info) : InlineTarget(info); // result reg |
Vladimir Marko | 6bdf1ff | 2013-10-29 17:40:46 +0000 | [diff] [blame] | 1118 | RegLocation rl_result = EvalLoc(rl_dest, kCoreReg, true); |
| 1119 | if (size == kLong) { |
| 1120 | RegLocation rl_i = LoadValueWide(rl_src_i, kCoreReg); |
Bill Buzbee | 00e1ec6 | 2014-02-27 23:44:13 +0000 | [diff] [blame] | 1121 | int r_i_low = rl_i.reg.GetReg(); |
| 1122 | if (rl_i.reg.GetReg() == rl_result.reg.GetReg()) { |
| 1123 | // First REV shall clobber rl_result.reg.GetReg(), save the value in a temp for the second REV. |
Vladimir Marko | f246af2 | 2013-11-27 12:30:15 +0000 | [diff] [blame] | 1124 | r_i_low = AllocTemp(); |
Bill Buzbee | 00e1ec6 | 2014-02-27 23:44:13 +0000 | [diff] [blame] | 1125 | OpRegCopy(r_i_low, rl_i.reg.GetReg()); |
Vladimir Marko | f246af2 | 2013-11-27 12:30:15 +0000 | [diff] [blame] | 1126 | } |
Bill Buzbee | 00e1ec6 | 2014-02-27 23:44:13 +0000 | [diff] [blame] | 1127 | OpRegReg(kOpRev, rl_result.reg.GetReg(), rl_i.reg.GetHighReg()); |
| 1128 | OpRegReg(kOpRev, rl_result.reg.GetHighReg(), r_i_low); |
| 1129 | if (rl_i.reg.GetReg() == rl_result.reg.GetReg()) { |
Vladimir Marko | f246af2 | 2013-11-27 12:30:15 +0000 | [diff] [blame] | 1130 | FreeTemp(r_i_low); |
| 1131 | } |
Vladimir Marko | 6bdf1ff | 2013-10-29 17:40:46 +0000 | [diff] [blame] | 1132 | StoreValueWide(rl_dest, rl_result); |
| 1133 | } else { |
| 1134 | DCHECK(size == kWord || size == kSignedHalf); |
| 1135 | OpKind op = (size == kWord) ? kOpRev : kOpRevsh; |
| 1136 | RegLocation rl_i = LoadValue(rl_src_i, kCoreReg); |
Bill Buzbee | 00e1ec6 | 2014-02-27 23:44:13 +0000 | [diff] [blame] | 1137 | OpRegReg(op, rl_result.reg.GetReg(), rl_i.reg.GetReg()); |
Vladimir Marko | 6bdf1ff | 2013-10-29 17:40:46 +0000 | [diff] [blame] | 1138 | StoreValue(rl_dest, rl_result); |
| 1139 | } |
| 1140 | return true; |
| 1141 | } |
| 1142 | |
Brian Carlstrom | 2ce745c | 2013-07-17 17:44:30 -0700 | [diff] [blame] | 1143 | bool Mir2Lir::GenInlinedAbsInt(CallInfo* info) { |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 1144 | if (cu_->instruction_set == kMips) { |
| 1145 | // TODO - add Mips implementation |
| 1146 | return false; |
| 1147 | } |
| 1148 | RegLocation rl_src = info->args[0]; |
| 1149 | rl_src = LoadValue(rl_src, kCoreReg); |
| 1150 | RegLocation rl_dest = InlineTarget(info); |
| 1151 | RegLocation rl_result = EvalLoc(rl_dest, kCoreReg, true); |
| 1152 | int sign_reg = AllocTemp(); |
| 1153 | // abs(x) = y<=x>>31, (x+y)^y. |
Bill Buzbee | 00e1ec6 | 2014-02-27 23:44:13 +0000 | [diff] [blame] | 1154 | OpRegRegImm(kOpAsr, sign_reg, rl_src.reg.GetReg(), 31); |
| 1155 | OpRegRegReg(kOpAdd, rl_result.reg.GetReg(), rl_src.reg.GetReg(), sign_reg); |
| 1156 | OpRegReg(kOpXor, rl_result.reg.GetReg(), sign_reg); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 1157 | StoreValue(rl_dest, rl_result); |
| 1158 | return true; |
| 1159 | } |
| 1160 | |
Brian Carlstrom | 2ce745c | 2013-07-17 17:44:30 -0700 | [diff] [blame] | 1161 | bool Mir2Lir::GenInlinedAbsLong(CallInfo* info) { |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 1162 | if (cu_->instruction_set == kMips) { |
| 1163 | // TODO - add Mips implementation |
| 1164 | return false; |
| 1165 | } |
Vladimir Marko | b982331 | 2014-03-20 17:38:43 +0000 | [diff] [blame^] | 1166 | RegLocation rl_src = info->args[0]; |
| 1167 | rl_src = LoadValueWide(rl_src, kCoreReg); |
| 1168 | RegLocation rl_dest = InlineTargetWide(info); |
| 1169 | RegLocation rl_result = EvalLoc(rl_dest, kCoreReg, true); |
| 1170 | |
| 1171 | // If on x86 or if we would clobber a register needed later, just copy the source first. |
| 1172 | if (cu_->instruction_set == kX86 || rl_result.reg.GetReg() == rl_src.reg.GetHighReg()) { |
| 1173 | OpRegCopyWide(rl_result.reg.GetReg(), rl_result.reg.GetHighReg(), |
| 1174 | rl_src.reg.GetReg(), rl_src.reg.GetHighReg()); |
| 1175 | if (rl_result.reg.GetReg() != rl_src.reg.GetReg() && |
| 1176 | rl_result.reg.GetReg() != rl_src.reg.GetHighReg() && |
| 1177 | rl_result.reg.GetHighReg() != rl_src.reg.GetReg() && |
| 1178 | rl_result.reg.GetHighReg() != rl_src.reg.GetHighReg()) { |
| 1179 | // Reuse source registers to avoid running out of temps. |
| 1180 | FreeTemp(rl_src.reg.GetReg()); |
| 1181 | FreeTemp(rl_src.reg.GetHighReg()); |
| 1182 | } |
| 1183 | rl_src = rl_result; |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 1184 | } |
Vladimir Marko | b982331 | 2014-03-20 17:38:43 +0000 | [diff] [blame^] | 1185 | |
| 1186 | // abs(x) = y<=x>>31, (x+y)^y. |
| 1187 | int sign_reg = AllocTemp(); |
| 1188 | OpRegRegImm(kOpAsr, sign_reg, rl_src.reg.GetHighReg(), 31); |
| 1189 | OpRegRegReg(kOpAdd, rl_result.reg.GetReg(), rl_src.reg.GetReg(), sign_reg); |
| 1190 | OpRegRegReg(kOpAdc, rl_result.reg.GetHighReg(), rl_src.reg.GetHighReg(), sign_reg); |
| 1191 | OpRegReg(kOpXor, rl_result.reg.GetReg(), sign_reg); |
| 1192 | OpRegReg(kOpXor, rl_result.reg.GetHighReg(), sign_reg); |
| 1193 | StoreValueWide(rl_dest, rl_result); |
| 1194 | return true; |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 1195 | } |
| 1196 | |
Yixin Shou | dbb17e3 | 2014-02-07 05:09:30 -0800 | [diff] [blame] | 1197 | bool Mir2Lir::GenInlinedAbsFloat(CallInfo* info) { |
| 1198 | if (cu_->instruction_set == kMips) { |
| 1199 | // TODO - add Mips implementation |
| 1200 | return false; |
| 1201 | } |
| 1202 | RegLocation rl_src = info->args[0]; |
| 1203 | rl_src = LoadValue(rl_src, kCoreReg); |
| 1204 | RegLocation rl_dest = InlineTarget(info); |
| 1205 | RegLocation rl_result = EvalLoc(rl_dest, kCoreReg, true); |
Vladimir Marko | ec31d37 | 2014-03-19 11:56:59 +0000 | [diff] [blame] | 1206 | OpRegRegImm(kOpAnd, rl_result.reg.GetReg(), rl_src.reg.GetReg(), 0x7fffffff); |
Yixin Shou | dbb17e3 | 2014-02-07 05:09:30 -0800 | [diff] [blame] | 1207 | StoreValue(rl_dest, rl_result); |
| 1208 | return true; |
| 1209 | } |
| 1210 | |
| 1211 | bool Mir2Lir::GenInlinedAbsDouble(CallInfo* info) { |
| 1212 | if (cu_->instruction_set == kMips) { |
| 1213 | // TODO - add Mips implementation |
| 1214 | return false; |
| 1215 | } |
| 1216 | RegLocation rl_src = info->args[0]; |
| 1217 | rl_src = LoadValueWide(rl_src, kCoreReg); |
| 1218 | RegLocation rl_dest = InlineTargetWide(info); |
| 1219 | RegLocation rl_result = EvalLoc(rl_dest, kCoreReg, true); |
Bill Buzbee | 00e1ec6 | 2014-02-27 23:44:13 +0000 | [diff] [blame] | 1220 | OpRegCopyWide(rl_result.reg.GetReg(), rl_result.reg.GetHighReg(), rl_src.reg.GetReg(), rl_src.reg.GetHighReg()); |
Vladimir Marko | ec31d37 | 2014-03-19 11:56:59 +0000 | [diff] [blame] | 1221 | OpRegImm(kOpAnd, rl_result.reg.GetHighReg(), 0x7fffffff); |
Yixin Shou | dbb17e3 | 2014-02-07 05:09:30 -0800 | [diff] [blame] | 1222 | StoreValueWide(rl_dest, rl_result); |
| 1223 | return true; |
| 1224 | } |
| 1225 | |
Brian Carlstrom | 2ce745c | 2013-07-17 17:44:30 -0700 | [diff] [blame] | 1226 | bool Mir2Lir::GenInlinedFloatCvt(CallInfo* info) { |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 1227 | if (cu_->instruction_set == kMips) { |
| 1228 | // TODO - add Mips implementation |
| 1229 | return false; |
| 1230 | } |
| 1231 | RegLocation rl_src = info->args[0]; |
| 1232 | RegLocation rl_dest = InlineTarget(info); |
| 1233 | StoreValue(rl_dest, rl_src); |
| 1234 | return true; |
| 1235 | } |
| 1236 | |
Brian Carlstrom | 2ce745c | 2013-07-17 17:44:30 -0700 | [diff] [blame] | 1237 | bool Mir2Lir::GenInlinedDoubleCvt(CallInfo* info) { |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 1238 | if (cu_->instruction_set == kMips) { |
| 1239 | // TODO - add Mips implementation |
| 1240 | return false; |
| 1241 | } |
| 1242 | RegLocation rl_src = info->args[0]; |
| 1243 | RegLocation rl_dest = InlineTargetWide(info); |
| 1244 | StoreValueWide(rl_dest, rl_src); |
| 1245 | return true; |
| 1246 | } |
| 1247 | |
| 1248 | /* |
Vladimir Marko | 3bc8615 | 2014-03-13 14:11:28 +0000 | [diff] [blame] | 1249 | * Fast String.indexOf(I) & (II). Tests for simple case of char <= 0xFFFF, |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 1250 | * otherwise bails to standard library code. |
| 1251 | */ |
Brian Carlstrom | 2ce745c | 2013-07-17 17:44:30 -0700 | [diff] [blame] | 1252 | bool Mir2Lir::GenInlinedIndexOf(CallInfo* info, bool zero_based) { |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 1253 | if (cu_->instruction_set == kMips) { |
| 1254 | // TODO - add Mips implementation |
| 1255 | return false; |
| 1256 | } |
Vladimir Marko | 3bc8615 | 2014-03-13 14:11:28 +0000 | [diff] [blame] | 1257 | RegLocation rl_obj = info->args[0]; |
| 1258 | RegLocation rl_char = info->args[1]; |
| 1259 | if (rl_char.is_const && (mir_graph_->ConstantValue(rl_char) & ~0xFFFF) != 0) { |
| 1260 | // Code point beyond 0xFFFF. Punt to the real String.indexOf(). |
| 1261 | return false; |
| 1262 | } |
| 1263 | |
Vladimir Marko | 31c2aac | 2013-12-09 16:31:19 +0000 | [diff] [blame] | 1264 | ClobberCallerSave(); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 1265 | LockCallTemps(); // Using fixed registers |
| 1266 | int reg_ptr = TargetReg(kArg0); |
| 1267 | int reg_char = TargetReg(kArg1); |
| 1268 | int reg_start = TargetReg(kArg2); |
| 1269 | |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 1270 | LoadValueDirectFixed(rl_obj, reg_ptr); |
| 1271 | LoadValueDirectFixed(rl_char, reg_char); |
| 1272 | if (zero_based) { |
| 1273 | LoadConstant(reg_start, 0); |
| 1274 | } else { |
buzbee | a44d4f5 | 2014-03-05 11:26:39 -0800 | [diff] [blame] | 1275 | RegLocation rl_start = info->args[2]; // 3rd arg only present in III flavor of IndexOf. |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 1276 | LoadValueDirectFixed(rl_start, reg_start); |
| 1277 | } |
Mark Mendell | 4028a6c | 2014-02-19 20:06:20 -0800 | [diff] [blame] | 1278 | int r_tgt = LoadHelper(QUICK_ENTRYPOINT_OFFSET(pIndexOf)); |
Dave Allison | b373e09 | 2014-02-20 16:06:36 -0800 | [diff] [blame] | 1279 | GenNullCheck(reg_ptr, info->opt_flags); |
Vladimir Marko | 3bc8615 | 2014-03-13 14:11:28 +0000 | [diff] [blame] | 1280 | LIR* high_code_point_branch = |
| 1281 | rl_char.is_const ? nullptr : OpCmpImmBranch(kCondGt, reg_char, 0xFFFF, nullptr); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 1282 | // NOTE: not a safepoint |
Mark Mendell | 4028a6c | 2014-02-19 20:06:20 -0800 | [diff] [blame] | 1283 | OpReg(kOpBlx, r_tgt); |
Vladimir Marko | 3bc8615 | 2014-03-13 14:11:28 +0000 | [diff] [blame] | 1284 | if (!rl_char.is_const) { |
| 1285 | // Add the slow path for code points beyond 0xFFFF. |
| 1286 | DCHECK(high_code_point_branch != nullptr); |
| 1287 | LIR* resume_tgt = NewLIR0(kPseudoTargetLabel); |
| 1288 | info->opt_flags |= MIR_IGNORE_NULL_CHECK; // Record that we've null checked. |
| 1289 | AddIntrinsicLaunchpad(info, high_code_point_branch, resume_tgt); |
| 1290 | } else { |
| 1291 | DCHECK_EQ(mir_graph_->ConstantValue(rl_char) & ~0xFFFF, 0); |
| 1292 | DCHECK(high_code_point_branch == nullptr); |
| 1293 | } |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 1294 | RegLocation rl_return = GetReturn(false); |
| 1295 | RegLocation rl_dest = InlineTarget(info); |
| 1296 | StoreValue(rl_dest, rl_return); |
| 1297 | return true; |
| 1298 | } |
| 1299 | |
| 1300 | /* Fast string.compareTo(Ljava/lang/string;)I. */ |
Brian Carlstrom | 2ce745c | 2013-07-17 17:44:30 -0700 | [diff] [blame] | 1301 | bool Mir2Lir::GenInlinedStringCompareTo(CallInfo* info) { |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 1302 | if (cu_->instruction_set == kMips) { |
| 1303 | // TODO - add Mips implementation |
| 1304 | return false; |
| 1305 | } |
Vladimir Marko | 31c2aac | 2013-12-09 16:31:19 +0000 | [diff] [blame] | 1306 | ClobberCallerSave(); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 1307 | LockCallTemps(); // Using fixed registers |
| 1308 | int reg_this = TargetReg(kArg0); |
| 1309 | int reg_cmp = TargetReg(kArg1); |
| 1310 | |
| 1311 | RegLocation rl_this = info->args[0]; |
| 1312 | RegLocation rl_cmp = info->args[1]; |
| 1313 | LoadValueDirectFixed(rl_this, reg_this); |
| 1314 | LoadValueDirectFixed(rl_cmp, reg_cmp); |
| 1315 | int r_tgt = (cu_->instruction_set != kX86) ? |
Ian Rogers | 7655f29 | 2013-07-29 11:07:13 -0700 | [diff] [blame] | 1316 | LoadHelper(QUICK_ENTRYPOINT_OFFSET(pStringCompareTo)) : 0; |
Dave Allison | b373e09 | 2014-02-20 16:06:36 -0800 | [diff] [blame] | 1317 | GenNullCheck(reg_this, info->opt_flags); |
Vladimir Marko | 3bc8615 | 2014-03-13 14:11:28 +0000 | [diff] [blame] | 1318 | info->opt_flags |= MIR_IGNORE_NULL_CHECK; // Record that we've null checked. |
Brian Carlstrom | 7934ac2 | 2013-07-26 10:54:15 -0700 | [diff] [blame] | 1319 | // TUNING: check if rl_cmp.s_reg_low is already null checked |
Vladimir Marko | 3bc8615 | 2014-03-13 14:11:28 +0000 | [diff] [blame] | 1320 | LIR* cmp_null_check_branch = OpCmpImmBranch(kCondEq, reg_cmp, 0, nullptr); |
| 1321 | AddIntrinsicLaunchpad(info, cmp_null_check_branch); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 1322 | // NOTE: not a safepoint |
| 1323 | if (cu_->instruction_set != kX86) { |
| 1324 | OpReg(kOpBlx, r_tgt); |
| 1325 | } else { |
Ian Rogers | 7655f29 | 2013-07-29 11:07:13 -0700 | [diff] [blame] | 1326 | OpThreadMem(kOpBlx, QUICK_ENTRYPOINT_OFFSET(pStringCompareTo)); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 1327 | } |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 1328 | RegLocation rl_return = GetReturn(false); |
| 1329 | RegLocation rl_dest = InlineTarget(info); |
| 1330 | StoreValue(rl_dest, rl_return); |
| 1331 | return true; |
| 1332 | } |
| 1333 | |
| 1334 | bool Mir2Lir::GenInlinedCurrentThread(CallInfo* info) { |
| 1335 | RegLocation rl_dest = InlineTarget(info); |
| 1336 | RegLocation rl_result = EvalLoc(rl_dest, kCoreReg, true); |
Ian Rogers | 848871b | 2013-08-05 10:56:33 -0700 | [diff] [blame] | 1337 | ThreadOffset offset = Thread::PeerOffset(); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 1338 | if (cu_->instruction_set == kThumb2 || cu_->instruction_set == kMips) { |
Bill Buzbee | 00e1ec6 | 2014-02-27 23:44:13 +0000 | [diff] [blame] | 1339 | LoadWordDisp(TargetReg(kSelf), offset.Int32Value(), rl_result.reg.GetReg()); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 1340 | } else { |
| 1341 | CHECK(cu_->instruction_set == kX86); |
Bill Buzbee | 00e1ec6 | 2014-02-27 23:44:13 +0000 | [diff] [blame] | 1342 | reinterpret_cast<X86Mir2Lir*>(this)->OpRegThreadMem(kOpMov, rl_result.reg.GetReg(), offset); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 1343 | } |
| 1344 | StoreValue(rl_dest, rl_result); |
| 1345 | return true; |
| 1346 | } |
| 1347 | |
| 1348 | bool Mir2Lir::GenInlinedUnsafeGet(CallInfo* info, |
| 1349 | bool is_long, bool is_volatile) { |
| 1350 | if (cu_->instruction_set == kMips) { |
| 1351 | // TODO - add Mips implementation |
| 1352 | return false; |
| 1353 | } |
| 1354 | // Unused - RegLocation rl_src_unsafe = info->args[0]; |
| 1355 | RegLocation rl_src_obj = info->args[1]; // Object |
| 1356 | RegLocation rl_src_offset = info->args[2]; // long low |
| 1357 | rl_src_offset.wide = 0; // ignore high half in info->args[3] |
Mark Mendell | 55d0eac | 2014-02-06 11:02:52 -0800 | [diff] [blame] | 1358 | RegLocation rl_dest = is_long ? InlineTargetWide(info) : InlineTarget(info); // result reg |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 1359 | if (is_volatile) { |
| 1360 | GenMemBarrier(kLoadLoad); |
| 1361 | } |
| 1362 | RegLocation rl_object = LoadValue(rl_src_obj, kCoreReg); |
| 1363 | RegLocation rl_offset = LoadValue(rl_src_offset, kCoreReg); |
| 1364 | RegLocation rl_result = EvalLoc(rl_dest, kCoreReg, true); |
| 1365 | if (is_long) { |
Bill Buzbee | 00e1ec6 | 2014-02-27 23:44:13 +0000 | [diff] [blame] | 1366 | OpRegReg(kOpAdd, rl_object.reg.GetReg(), rl_offset.reg.GetReg()); |
| 1367 | LoadBaseDispWide(rl_object.reg.GetReg(), 0, rl_result.reg.GetReg(), rl_result.reg.GetHighReg(), INVALID_SREG); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 1368 | StoreValueWide(rl_dest, rl_result); |
| 1369 | } else { |
Bill Buzbee | 00e1ec6 | 2014-02-27 23:44:13 +0000 | [diff] [blame] | 1370 | LoadBaseIndexed(rl_object.reg.GetReg(), rl_offset.reg.GetReg(), rl_result.reg.GetReg(), 0, kWord); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 1371 | StoreValue(rl_dest, rl_result); |
| 1372 | } |
| 1373 | return true; |
| 1374 | } |
| 1375 | |
| 1376 | bool Mir2Lir::GenInlinedUnsafePut(CallInfo* info, bool is_long, |
| 1377 | bool is_object, bool is_volatile, bool is_ordered) { |
| 1378 | if (cu_->instruction_set == kMips) { |
| 1379 | // TODO - add Mips implementation |
| 1380 | return false; |
| 1381 | } |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 1382 | // Unused - RegLocation rl_src_unsafe = info->args[0]; |
| 1383 | RegLocation rl_src_obj = info->args[1]; // Object |
| 1384 | RegLocation rl_src_offset = info->args[2]; // long low |
| 1385 | rl_src_offset.wide = 0; // ignore high half in info->args[3] |
| 1386 | RegLocation rl_src_value = info->args[4]; // value to store |
| 1387 | if (is_volatile || is_ordered) { |
| 1388 | GenMemBarrier(kStoreStore); |
| 1389 | } |
| 1390 | RegLocation rl_object = LoadValue(rl_src_obj, kCoreReg); |
| 1391 | RegLocation rl_offset = LoadValue(rl_src_offset, kCoreReg); |
| 1392 | RegLocation rl_value; |
| 1393 | if (is_long) { |
| 1394 | rl_value = LoadValueWide(rl_src_value, kCoreReg); |
Bill Buzbee | 00e1ec6 | 2014-02-27 23:44:13 +0000 | [diff] [blame] | 1395 | OpRegReg(kOpAdd, rl_object.reg.GetReg(), rl_offset.reg.GetReg()); |
| 1396 | StoreBaseDispWide(rl_object.reg.GetReg(), 0, rl_value.reg.GetReg(), rl_value.reg.GetHighReg()); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 1397 | } else { |
| 1398 | rl_value = LoadValue(rl_src_value, kCoreReg); |
Bill Buzbee | 00e1ec6 | 2014-02-27 23:44:13 +0000 | [diff] [blame] | 1399 | StoreBaseIndexed(rl_object.reg.GetReg(), rl_offset.reg.GetReg(), rl_value.reg.GetReg(), 0, kWord); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 1400 | } |
Mark Mendell | df8ee2e | 2014-01-27 16:37:47 -0800 | [diff] [blame] | 1401 | |
| 1402 | // Free up the temp early, to ensure x86 doesn't run out of temporaries in MarkGCCard. |
Bill Buzbee | 00e1ec6 | 2014-02-27 23:44:13 +0000 | [diff] [blame] | 1403 | FreeTemp(rl_offset.reg.GetReg()); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 1404 | if (is_volatile) { |
| 1405 | GenMemBarrier(kStoreLoad); |
| 1406 | } |
| 1407 | if (is_object) { |
Bill Buzbee | 00e1ec6 | 2014-02-27 23:44:13 +0000 | [diff] [blame] | 1408 | MarkGCCard(rl_value.reg.GetReg(), rl_object.reg.GetReg()); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 1409 | } |
| 1410 | return true; |
| 1411 | } |
| 1412 | |
Brian Carlstrom | 2ce745c | 2013-07-17 17:44:30 -0700 | [diff] [blame] | 1413 | void Mir2Lir::GenInvoke(CallInfo* info) { |
Vladimir Marko | 9820b7c | 2014-01-02 16:40:37 +0000 | [diff] [blame] | 1414 | if ((info->opt_flags & MIR_INLINED) != 0) { |
| 1415 | // Already inlined but we may still need the null check. |
| 1416 | if (info->type != kStatic && |
| 1417 | ((cu_->disable_opt & (1 << kNullCheckElimination)) != 0 || |
| 1418 | (info->opt_flags & MIR_IGNORE_NULL_CHECK) == 0)) { |
| 1419 | RegLocation rl_obj = LoadValue(info->args[0], kCoreReg); |
| 1420 | GenImmedCheck(kCondEq, rl_obj.reg.GetReg(), 0, kThrowNullPointer); |
| 1421 | } |
| 1422 | return; |
| 1423 | } |
Vladimir Marko | 3bc8615 | 2014-03-13 14:11:28 +0000 | [diff] [blame] | 1424 | DCHECK(cu_->compiler_driver->GetMethodInlinerMap() != nullptr); |
| 1425 | if (cu_->compiler_driver->GetMethodInlinerMap()->GetMethodInliner(cu_->dex_file) |
| 1426 | ->GenIntrinsic(this, info)) { |
| 1427 | return; |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 1428 | } |
Vladimir Marko | 3bc8615 | 2014-03-13 14:11:28 +0000 | [diff] [blame] | 1429 | GenInvokeNoInline(info); |
| 1430 | } |
| 1431 | |
| 1432 | void Mir2Lir::GenInvokeNoInline(CallInfo* info) { |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 1433 | int call_state = 0; |
| 1434 | LIR* null_ck; |
| 1435 | LIR** p_null_ck = NULL; |
| 1436 | NextCallInsn next_call_insn; |
| 1437 | FlushAllRegs(); /* Everything to home location */ |
| 1438 | // Explicit register usage |
| 1439 | LockCallTemps(); |
| 1440 | |
Vladimir Marko | f096aad | 2014-01-23 15:51:58 +0000 | [diff] [blame] | 1441 | const MirMethodLoweringInfo& method_info = mir_graph_->GetMethodLoweringInfo(info->mir); |
| 1442 | cu_->compiler_driver->ProcessedInvoke(method_info.GetInvokeType(), method_info.StatsFlags()); |
| 1443 | InvokeType original_type = static_cast<InvokeType>(method_info.GetInvokeType()); |
| 1444 | info->type = static_cast<InvokeType>(method_info.GetSharpType()); |
| 1445 | bool fast_path = method_info.FastPath(); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 1446 | bool skip_this; |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 1447 | if (info->type == kInterface) { |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 1448 | next_call_insn = fast_path ? NextInterfaceCallInsn : NextInterfaceCallInsnWithAccessCheck; |
Jeff Hao | 88474b4 | 2013-10-23 16:24:40 -0700 | [diff] [blame] | 1449 | skip_this = fast_path; |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 1450 | } else if (info->type == kDirect) { |
| 1451 | if (fast_path) { |
| 1452 | p_null_ck = &null_ck; |
| 1453 | } |
| 1454 | next_call_insn = fast_path ? NextSDCallInsn : NextDirectCallInsnSP; |
| 1455 | skip_this = false; |
| 1456 | } else if (info->type == kStatic) { |
| 1457 | next_call_insn = fast_path ? NextSDCallInsn : NextStaticCallInsnSP; |
| 1458 | skip_this = false; |
| 1459 | } else if (info->type == kSuper) { |
| 1460 | DCHECK(!fast_path); // Fast path is a direct call. |
| 1461 | next_call_insn = NextSuperCallInsnSP; |
| 1462 | skip_this = false; |
| 1463 | } else { |
| 1464 | DCHECK_EQ(info->type, kVirtual); |
| 1465 | next_call_insn = fast_path ? NextVCallInsn : NextVCallInsnSP; |
| 1466 | skip_this = fast_path; |
| 1467 | } |
Vladimir Marko | f096aad | 2014-01-23 15:51:58 +0000 | [diff] [blame] | 1468 | MethodReference target_method = method_info.GetTargetMethod(); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 1469 | if (!info->is_range) { |
| 1470 | call_state = GenDalvikArgsNoRange(info, call_state, p_null_ck, |
Vladimir Marko | f096aad | 2014-01-23 15:51:58 +0000 | [diff] [blame] | 1471 | next_call_insn, target_method, method_info.VTableIndex(), |
| 1472 | method_info.DirectCode(), method_info.DirectMethod(), |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 1473 | original_type, skip_this); |
| 1474 | } else { |
| 1475 | call_state = GenDalvikArgsRange(info, call_state, p_null_ck, |
Vladimir Marko | f096aad | 2014-01-23 15:51:58 +0000 | [diff] [blame] | 1476 | next_call_insn, target_method, method_info.VTableIndex(), |
| 1477 | method_info.DirectCode(), method_info.DirectMethod(), |
| 1478 | original_type, skip_this); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 1479 | } |
| 1480 | // Finish up any of the call sequence not interleaved in arg loading |
| 1481 | while (call_state >= 0) { |
Vladimir Marko | f096aad | 2014-01-23 15:51:58 +0000 | [diff] [blame] | 1482 | call_state = next_call_insn(cu_, info, call_state, target_method, method_info.VTableIndex(), |
| 1483 | method_info.DirectCode(), method_info.DirectMethod(), original_type); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 1484 | } |
| 1485 | LIR* call_inst; |
| 1486 | if (cu_->instruction_set != kX86) { |
| 1487 | call_inst = OpReg(kOpBlx, TargetReg(kInvokeTgt)); |
| 1488 | } else { |
Jeff Hao | 88474b4 | 2013-10-23 16:24:40 -0700 | [diff] [blame] | 1489 | if (fast_path) { |
Vladimir Marko | f096aad | 2014-01-23 15:51:58 +0000 | [diff] [blame] | 1490 | if (method_info.DirectCode() == static_cast<uintptr_t>(-1)) { |
Mark Mendell | 55d0eac | 2014-02-06 11:02:52 -0800 | [diff] [blame] | 1491 | // We can have the linker fixup a call relative. |
| 1492 | call_inst = |
Jeff Hao | 49161ce | 2014-03-12 11:05:25 -0700 | [diff] [blame] | 1493 | reinterpret_cast<X86Mir2Lir*>(this)->CallWithLinkerFixup(target_method, info->type); |
Mark Mendell | 55d0eac | 2014-02-06 11:02:52 -0800 | [diff] [blame] | 1494 | } else { |
| 1495 | call_inst = OpMem(kOpBlx, TargetReg(kArg0), |
| 1496 | mirror::ArtMethod::EntryPointFromQuickCompiledCodeOffset().Int32Value()); |
| 1497 | } |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 1498 | } else { |
Ian Rogers | 848871b | 2013-08-05 10:56:33 -0700 | [diff] [blame] | 1499 | ThreadOffset trampoline(-1); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 1500 | switch (info->type) { |
| 1501 | case kInterface: |
Jeff Hao | 88474b4 | 2013-10-23 16:24:40 -0700 | [diff] [blame] | 1502 | trampoline = QUICK_ENTRYPOINT_OFFSET(pInvokeInterfaceTrampolineWithAccessCheck); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 1503 | break; |
| 1504 | case kDirect: |
Ian Rogers | 7655f29 | 2013-07-29 11:07:13 -0700 | [diff] [blame] | 1505 | trampoline = QUICK_ENTRYPOINT_OFFSET(pInvokeDirectTrampolineWithAccessCheck); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 1506 | break; |
| 1507 | case kStatic: |
Ian Rogers | 7655f29 | 2013-07-29 11:07:13 -0700 | [diff] [blame] | 1508 | trampoline = QUICK_ENTRYPOINT_OFFSET(pInvokeStaticTrampolineWithAccessCheck); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 1509 | break; |
| 1510 | case kSuper: |
Ian Rogers | 7655f29 | 2013-07-29 11:07:13 -0700 | [diff] [blame] | 1511 | trampoline = QUICK_ENTRYPOINT_OFFSET(pInvokeSuperTrampolineWithAccessCheck); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 1512 | break; |
| 1513 | case kVirtual: |
Ian Rogers | 7655f29 | 2013-07-29 11:07:13 -0700 | [diff] [blame] | 1514 | trampoline = QUICK_ENTRYPOINT_OFFSET(pInvokeVirtualTrampolineWithAccessCheck); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 1515 | break; |
| 1516 | default: |
| 1517 | LOG(FATAL) << "Unexpected invoke type"; |
| 1518 | } |
| 1519 | call_inst = OpThreadMem(kOpBlx, trampoline); |
| 1520 | } |
| 1521 | } |
| 1522 | MarkSafepointPC(call_inst); |
| 1523 | |
Vladimir Marko | 31c2aac | 2013-12-09 16:31:19 +0000 | [diff] [blame] | 1524 | ClobberCallerSave(); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 1525 | if (info->result.location != kLocInvalid) { |
| 1526 | // We have a following MOVE_RESULT - do it now. |
| 1527 | if (info->result.wide) { |
| 1528 | RegLocation ret_loc = GetReturnWide(info->result.fp); |
| 1529 | StoreValueWide(info->result, ret_loc); |
| 1530 | } else { |
| 1531 | RegLocation ret_loc = GetReturn(info->result.fp); |
| 1532 | StoreValue(info->result, ret_loc); |
| 1533 | } |
| 1534 | } |
| 1535 | } |
| 1536 | |
| 1537 | } // namespace art |