Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (C) 2013 The Android Open Source Project |
| 3 | * |
| 4 | * Licensed under the Apache License, Version 2.0 (the "License"); |
| 5 | * you may not use this file except in compliance with the License. |
| 6 | * You may obtain a copy of the License at |
| 7 | * |
| 8 | * http://www.apache.org/licenses/LICENSE-2.0 |
| 9 | * |
| 10 | * Unless required by applicable law or agreed to in writing, software |
| 11 | * distributed under the License is distributed on an "AS IS" BASIS, |
| 12 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. |
| 13 | * See the License for the specific language governing permissions and |
| 14 | * limitations under the License. |
| 15 | */ |
| 16 | |
Brian Carlstrom | fc0e321 | 2013-07-17 14:40:12 -0700 | [diff] [blame] | 17 | #ifndef ART_COMPILER_DEX_QUICK_MIR_TO_LIR_INL_H_ |
| 18 | #define ART_COMPILER_DEX_QUICK_MIR_TO_LIR_INL_H_ |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 19 | |
| 20 | #include "mir_to_lir.h" |
| 21 | |
Andreas Gampe | 0b9203e | 2015-01-22 20:39:27 -0800 | [diff] [blame] | 22 | #include "base/logging.h" |
| 23 | #include "dex/compiler_ir.h" |
Vladimir Marko | 80afd02 | 2015-05-19 18:08:00 +0100 | [diff] [blame] | 24 | #include "utils.h" |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 25 | |
| 26 | namespace art { |
| 27 | |
| 28 | /* Mark a temp register as dead. Does not affect allocation state. */ |
| 29 | inline void Mir2Lir::ClobberBody(RegisterInfo* p) { |
buzbee | ba57451 | 2014-05-12 15:13:16 -0700 | [diff] [blame] | 30 | DCHECK(p->IsTemp()); |
buzbee | 082833c | 2014-05-17 23:16:26 -0700 | [diff] [blame] | 31 | if (p->SReg() != INVALID_SREG) { |
buzbee | 091cc40 | 2014-03-31 10:14:40 -0700 | [diff] [blame] | 32 | DCHECK(!(p->IsLive() && p->IsDirty())) << "Live & dirty temp in clobber"; |
buzbee | 30adc73 | 2014-05-09 15:10:18 -0700 | [diff] [blame] | 33 | p->MarkDead(); |
buzbee | 091cc40 | 2014-03-31 10:14:40 -0700 | [diff] [blame] | 34 | if (p->IsWide()) { |
| 35 | p->SetIsWide(false); |
buzbee | b5860fb | 2014-06-21 15:31:01 -0700 | [diff] [blame] | 36 | if (p->GetReg().NotExactlyEquals(p->Partner())) { |
buzbee | 091cc40 | 2014-03-31 10:14:40 -0700 | [diff] [blame] | 37 | // Register pair - deal with the other half. |
| 38 | p = GetRegInfo(p->Partner()); |
| 39 | p->SetIsWide(false); |
buzbee | 30adc73 | 2014-05-09 15:10:18 -0700 | [diff] [blame] | 40 | p->MarkDead(); |
buzbee | 091cc40 | 2014-03-31 10:14:40 -0700 | [diff] [blame] | 41 | } |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 42 | } |
| 43 | } |
| 44 | } |
| 45 | |
buzbee | 0d82948 | 2013-10-11 15:24:55 -0700 | [diff] [blame] | 46 | inline LIR* Mir2Lir::RawLIR(DexOffset dalvik_offset, int opcode, int op0, |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 47 | int op1, int op2, int op3, int op4, LIR* target) { |
Vladimir Marko | 83cc7ae | 2014-02-12 18:02:05 +0000 | [diff] [blame] | 48 | LIR* insn = static_cast<LIR*>(arena_->Alloc(sizeof(LIR), kArenaAllocLIR)); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 49 | insn->dalvik_offset = dalvik_offset; |
| 50 | insn->opcode = opcode; |
| 51 | insn->operands[0] = op0; |
| 52 | insn->operands[1] = op1; |
| 53 | insn->operands[2] = op2; |
| 54 | insn->operands[3] = op3; |
| 55 | insn->operands[4] = op4; |
| 56 | insn->target = target; |
| 57 | SetupResourceMasks(insn); |
| 58 | if ((opcode == kPseudoTargetLabel) || (opcode == kPseudoSafepointPC) || |
| 59 | (opcode == kPseudoExportedPC)) { |
| 60 | // Always make labels scheduling barriers |
buzbee | b48819d | 2013-09-14 16:15:25 -0700 | [diff] [blame] | 61 | DCHECK(!insn->flags.use_def_invalid); |
Vladimir Marko | 8dea81c | 2014-06-06 14:50:36 +0100 | [diff] [blame] | 62 | insn->u.m.use_mask = insn->u.m.def_mask = &kEncodeAll; |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 63 | } |
| 64 | return insn; |
| 65 | } |
| 66 | |
| 67 | /* |
| 68 | * The following are building blocks to construct low-level IRs with 0 - 4 |
| 69 | * operands. |
| 70 | */ |
| 71 | inline LIR* Mir2Lir::NewLIR0(int opcode) { |
buzbee | 409fe94 | 2013-10-11 10:49:56 -0700 | [diff] [blame] | 72 | DCHECK(IsPseudoLirOp(opcode) || (GetTargetInstFlags(opcode) & NO_OPERAND)) |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 73 | << GetTargetInstName(opcode) << " " << opcode << " " |
| 74 | << PrettyMethod(cu_->method_idx, *cu_->dex_file) << " " |
| 75 | << current_dalvik_offset_; |
| 76 | LIR* insn = RawLIR(current_dalvik_offset_, opcode); |
| 77 | AppendLIR(insn); |
| 78 | return insn; |
| 79 | } |
| 80 | |
| 81 | inline LIR* Mir2Lir::NewLIR1(int opcode, int dest) { |
buzbee | 409fe94 | 2013-10-11 10:49:56 -0700 | [diff] [blame] | 82 | DCHECK(IsPseudoLirOp(opcode) || (GetTargetInstFlags(opcode) & IS_UNARY_OP)) |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 83 | << GetTargetInstName(opcode) << " " << opcode << " " |
| 84 | << PrettyMethod(cu_->method_idx, *cu_->dex_file) << " " |
| 85 | << current_dalvik_offset_; |
| 86 | LIR* insn = RawLIR(current_dalvik_offset_, opcode, dest); |
| 87 | AppendLIR(insn); |
| 88 | return insn; |
| 89 | } |
| 90 | |
| 91 | inline LIR* Mir2Lir::NewLIR2(int opcode, int dest, int src1) { |
buzbee | 409fe94 | 2013-10-11 10:49:56 -0700 | [diff] [blame] | 92 | DCHECK(IsPseudoLirOp(opcode) || (GetTargetInstFlags(opcode) & IS_BINARY_OP)) |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 93 | << GetTargetInstName(opcode) << " " << opcode << " " |
| 94 | << PrettyMethod(cu_->method_idx, *cu_->dex_file) << " " |
| 95 | << current_dalvik_offset_; |
| 96 | LIR* insn = RawLIR(current_dalvik_offset_, opcode, dest, src1); |
| 97 | AppendLIR(insn); |
| 98 | return insn; |
| 99 | } |
| 100 | |
Razvan A Lupusoru | 614c2b4 | 2014-01-28 17:05:21 -0800 | [diff] [blame] | 101 | inline LIR* Mir2Lir::NewLIR2NoDest(int opcode, int src, int info) { |
Haitao Feng | a870bc5 | 2014-09-09 15:52:34 +0800 | [diff] [blame] | 102 | DCHECK(IsPseudoLirOp(opcode) || (GetTargetInstFlags(opcode) & IS_BINARY_OP)) |
Razvan A Lupusoru | 614c2b4 | 2014-01-28 17:05:21 -0800 | [diff] [blame] | 103 | << GetTargetInstName(opcode) << " " << opcode << " " |
| 104 | << PrettyMethod(cu_->method_idx, *cu_->dex_file) << " " |
| 105 | << current_dalvik_offset_; |
| 106 | LIR* insn = RawLIR(current_dalvik_offset_, opcode, src, info); |
| 107 | AppendLIR(insn); |
| 108 | return insn; |
| 109 | } |
| 110 | |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 111 | inline LIR* Mir2Lir::NewLIR3(int opcode, int dest, int src1, int src2) { |
buzbee | 409fe94 | 2013-10-11 10:49:56 -0700 | [diff] [blame] | 112 | DCHECK(IsPseudoLirOp(opcode) || (GetTargetInstFlags(opcode) & IS_TERTIARY_OP)) |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 113 | << GetTargetInstName(opcode) << " " << opcode << " " |
| 114 | << PrettyMethod(cu_->method_idx, *cu_->dex_file) << " " |
| 115 | << current_dalvik_offset_; |
| 116 | LIR* insn = RawLIR(current_dalvik_offset_, opcode, dest, src1, src2); |
| 117 | AppendLIR(insn); |
| 118 | return insn; |
| 119 | } |
| 120 | |
| 121 | inline LIR* Mir2Lir::NewLIR4(int opcode, int dest, int src1, int src2, int info) { |
buzbee | 409fe94 | 2013-10-11 10:49:56 -0700 | [diff] [blame] | 122 | DCHECK(IsPseudoLirOp(opcode) || (GetTargetInstFlags(opcode) & IS_QUAD_OP)) |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 123 | << GetTargetInstName(opcode) << " " << opcode << " " |
| 124 | << PrettyMethod(cu_->method_idx, *cu_->dex_file) << " " |
| 125 | << current_dalvik_offset_; |
| 126 | LIR* insn = RawLIR(current_dalvik_offset_, opcode, dest, src1, src2, info); |
| 127 | AppendLIR(insn); |
| 128 | return insn; |
| 129 | } |
| 130 | |
| 131 | inline LIR* Mir2Lir::NewLIR5(int opcode, int dest, int src1, int src2, int info1, |
| 132 | int info2) { |
buzbee | 409fe94 | 2013-10-11 10:49:56 -0700 | [diff] [blame] | 133 | DCHECK(IsPseudoLirOp(opcode) || (GetTargetInstFlags(opcode) & IS_QUIN_OP)) |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 134 | << GetTargetInstName(opcode) << " " << opcode << " " |
| 135 | << PrettyMethod(cu_->method_idx, *cu_->dex_file) << " " |
| 136 | << current_dalvik_offset_; |
| 137 | LIR* insn = RawLIR(current_dalvik_offset_, opcode, dest, src1, src2, info1, info2); |
| 138 | AppendLIR(insn); |
| 139 | return insn; |
| 140 | } |
| 141 | |
| 142 | /* |
| 143 | * Mark the corresponding bit(s). |
| 144 | */ |
Vladimir Marko | 8dea81c | 2014-06-06 14:50:36 +0100 | [diff] [blame] | 145 | inline void Mir2Lir::SetupRegMask(ResourceMask* mask, int reg) { |
buzbee | 091cc40 | 2014-03-31 10:14:40 -0700 | [diff] [blame] | 146 | DCHECK_EQ((reg & ~RegStorage::kRegValMask), 0); |
Vladimir Marko | e39c54e | 2014-09-22 14:50:02 +0100 | [diff] [blame] | 147 | DCHECK_LT(static_cast<size_t>(reg), reginfo_map_.size()); |
| 148 | DCHECK(reginfo_map_[reg] != nullptr) << "No info for 0x" << reg; |
| 149 | *mask = mask->Union(reginfo_map_[reg]->DefUseMask()); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 150 | } |
| 151 | |
| 152 | /* |
Serban Constantinescu | 6399968 | 2014-07-15 17:44:21 +0100 | [diff] [blame] | 153 | * Clear the corresponding bit(s). |
| 154 | */ |
| 155 | inline void Mir2Lir::ClearRegMask(ResourceMask* mask, int reg) { |
| 156 | DCHECK_EQ((reg & ~RegStorage::kRegValMask), 0); |
Vladimir Marko | e39c54e | 2014-09-22 14:50:02 +0100 | [diff] [blame] | 157 | DCHECK_LT(static_cast<size_t>(reg), reginfo_map_.size()); |
| 158 | DCHECK(reginfo_map_[reg] != nullptr) << "No info for 0x" << reg; |
| 159 | *mask = mask->ClearBits(reginfo_map_[reg]->DefUseMask()); |
Serban Constantinescu | 6399968 | 2014-07-15 17:44:21 +0100 | [diff] [blame] | 160 | } |
| 161 | |
| 162 | /* |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 163 | * Set up the proper fields in the resource mask |
| 164 | */ |
Vladimir Marko | 8dea81c | 2014-06-06 14:50:36 +0100 | [diff] [blame] | 165 | inline void Mir2Lir::SetupResourceMasks(LIR* lir) { |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 166 | int opcode = lir->opcode; |
| 167 | |
buzbee | 409fe94 | 2013-10-11 10:49:56 -0700 | [diff] [blame] | 168 | if (IsPseudoLirOp(opcode)) { |
Vladimir Marko | 8dea81c | 2014-06-06 14:50:36 +0100 | [diff] [blame] | 169 | lir->u.m.use_mask = lir->u.m.def_mask = &kEncodeNone; |
buzbee | 409fe94 | 2013-10-11 10:49:56 -0700 | [diff] [blame] | 170 | if (opcode != kPseudoBarrier) { |
| 171 | lir->flags.fixup = kFixupLabel; |
| 172 | } |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 173 | return; |
| 174 | } |
| 175 | |
| 176 | uint64_t flags = GetTargetInstFlags(opcode); |
| 177 | |
| 178 | if (flags & NEEDS_FIXUP) { |
buzbee | b48819d | 2013-09-14 16:15:25 -0700 | [diff] [blame] | 179 | // Note: target-specific setup may specialize the fixup kind. |
| 180 | lir->flags.fixup = kFixupLabel; |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 181 | } |
| 182 | |
Vladimir Marko | 8dea81c | 2014-06-06 14:50:36 +0100 | [diff] [blame] | 183 | /* Get the starting size of the instruction's template. */ |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 184 | lir->flags.size = GetInsnSize(lir); |
buzbee | b48819d | 2013-09-14 16:15:25 -0700 | [diff] [blame] | 185 | estimated_native_code_size_ += lir->flags.size; |
Vladimir Marko | 8dea81c | 2014-06-06 14:50:36 +0100 | [diff] [blame] | 186 | |
| 187 | /* Set up the mask for resources. */ |
| 188 | ResourceMask use_mask; |
| 189 | ResourceMask def_mask; |
| 190 | |
| 191 | if (flags & (IS_LOAD | IS_STORE)) { |
| 192 | /* Set memory reference type (defaults to heap, overridden by ScopedMemRefType). */ |
| 193 | if (flags & IS_LOAD) { |
| 194 | use_mask.SetBit(mem_ref_type_); |
| 195 | } else { |
| 196 | /* Currently only loads can be marked as kMustNotAlias. */ |
| 197 | DCHECK(mem_ref_type_ != ResourceMask::kMustNotAlias); |
| 198 | } |
| 199 | if (flags & IS_STORE) { |
| 200 | /* Literals cannot be written to. */ |
| 201 | DCHECK(mem_ref_type_ != ResourceMask::kLiteral); |
| 202 | def_mask.SetBit(mem_ref_type_); |
| 203 | } |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 204 | } |
| 205 | |
| 206 | /* |
| 207 | * Conservatively assume the branch here will call out a function that in |
| 208 | * turn will trash everything. |
| 209 | */ |
| 210 | if (flags & IS_BRANCH) { |
Vladimir Marko | 8dea81c | 2014-06-06 14:50:36 +0100 | [diff] [blame] | 211 | lir->u.m.def_mask = lir->u.m.use_mask = &kEncodeAll; |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 212 | return; |
| 213 | } |
| 214 | |
| 215 | if (flags & REG_DEF0) { |
Vladimir Marko | 8dea81c | 2014-06-06 14:50:36 +0100 | [diff] [blame] | 216 | SetupRegMask(&def_mask, lir->operands[0]); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 217 | } |
| 218 | |
| 219 | if (flags & REG_DEF1) { |
Vladimir Marko | 8dea81c | 2014-06-06 14:50:36 +0100 | [diff] [blame] | 220 | SetupRegMask(&def_mask, lir->operands[1]); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 221 | } |
| 222 | |
Razvan A Lupusoru | 99ad723 | 2014-02-25 17:41:08 -0800 | [diff] [blame] | 223 | if (flags & REG_DEF2) { |
Vladimir Marko | 8dea81c | 2014-06-06 14:50:36 +0100 | [diff] [blame] | 224 | SetupRegMask(&def_mask, lir->operands[2]); |
Razvan A Lupusoru | 99ad723 | 2014-02-25 17:41:08 -0800 | [diff] [blame] | 225 | } |
| 226 | |
buzbee | b48819d | 2013-09-14 16:15:25 -0700 | [diff] [blame] | 227 | if (flags & REG_USE0) { |
Vladimir Marko | 8dea81c | 2014-06-06 14:50:36 +0100 | [diff] [blame] | 228 | SetupRegMask(&use_mask, lir->operands[0]); |
buzbee | b48819d | 2013-09-14 16:15:25 -0700 | [diff] [blame] | 229 | } |
| 230 | |
| 231 | if (flags & REG_USE1) { |
Vladimir Marko | 8dea81c | 2014-06-06 14:50:36 +0100 | [diff] [blame] | 232 | SetupRegMask(&use_mask, lir->operands[1]); |
buzbee | b48819d | 2013-09-14 16:15:25 -0700 | [diff] [blame] | 233 | } |
| 234 | |
| 235 | if (flags & REG_USE2) { |
Vladimir Marko | 8dea81c | 2014-06-06 14:50:36 +0100 | [diff] [blame] | 236 | SetupRegMask(&use_mask, lir->operands[2]); |
buzbee | b48819d | 2013-09-14 16:15:25 -0700 | [diff] [blame] | 237 | } |
| 238 | |
| 239 | if (flags & REG_USE3) { |
Vladimir Marko | 8dea81c | 2014-06-06 14:50:36 +0100 | [diff] [blame] | 240 | SetupRegMask(&use_mask, lir->operands[3]); |
buzbee | b48819d | 2013-09-14 16:15:25 -0700 | [diff] [blame] | 241 | } |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 242 | |
buzbee | 17189ac | 2013-11-08 11:07:02 -0800 | [diff] [blame] | 243 | if (flags & REG_USE4) { |
Vladimir Marko | 8dea81c | 2014-06-06 14:50:36 +0100 | [diff] [blame] | 244 | SetupRegMask(&use_mask, lir->operands[4]); |
buzbee | 17189ac | 2013-11-08 11:07:02 -0800 | [diff] [blame] | 245 | } |
| 246 | |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 247 | if (flags & SETS_CCODES) { |
Vladimir Marko | 8dea81c | 2014-06-06 14:50:36 +0100 | [diff] [blame] | 248 | def_mask.SetBit(ResourceMask::kCCode); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 249 | } |
| 250 | |
| 251 | if (flags & USES_CCODES) { |
Vladimir Marko | 8dea81c | 2014-06-06 14:50:36 +0100 | [diff] [blame] | 252 | use_mask.SetBit(ResourceMask::kCCode); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 253 | } |
| 254 | |
| 255 | // Handle target-specific actions |
Junmo Park | aa839cc | 2014-08-30 20:13:02 +0900 | [diff] [blame] | 256 | SetupTargetResourceMasks(lir, flags, &use_mask, &def_mask); |
Vladimir Marko | 8dea81c | 2014-06-06 14:50:36 +0100 | [diff] [blame] | 257 | |
| 258 | lir->u.m.use_mask = mask_cache_.GetMask(use_mask); |
| 259 | lir->u.m.def_mask = mask_cache_.GetMask(def_mask); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 260 | } |
| 261 | |
buzbee | 091cc40 | 2014-03-31 10:14:40 -0700 | [diff] [blame] | 262 | inline art::Mir2Lir::RegisterInfo* Mir2Lir::GetRegInfo(RegStorage reg) { |
Vladimir Marko | e39c54e | 2014-09-22 14:50:02 +0100 | [diff] [blame] | 263 | RegisterInfo* res = reg.IsPair() ? reginfo_map_[reg.GetLowReg()] : reginfo_map_[reg.GetReg()]; |
buzbee | 091cc40 | 2014-03-31 10:14:40 -0700 | [diff] [blame] | 264 | DCHECK(res != nullptr); |
| 265 | return res; |
buzbee | bd663de | 2013-09-10 15:41:31 -0700 | [diff] [blame] | 266 | } |
| 267 | |
Andreas Gampe | 4b537a8 | 2014-06-30 22:24:53 -0700 | [diff] [blame] | 268 | inline void Mir2Lir::CheckRegLocation(RegLocation rl) const { |
| 269 | if (kFailOnSizeError || kReportSizeError) { |
| 270 | CheckRegLocationImpl(rl, kFailOnSizeError, kReportSizeError); |
| 271 | } |
| 272 | } |
| 273 | |
| 274 | inline void Mir2Lir::CheckRegStorage(RegStorage rs, WidenessCheck wide, RefCheck ref, FPCheck fp) |
| 275 | const { |
| 276 | if (kFailOnSizeError || kReportSizeError) { |
| 277 | CheckRegStorageImpl(rs, wide, ref, fp, kFailOnSizeError, kReportSizeError); |
| 278 | } |
| 279 | } |
| 280 | |
Serguei Katkov | 717a3e4 | 2014-11-13 17:19:42 +0600 | [diff] [blame] | 281 | inline Mir2Lir::ShortyIterator::ShortyIterator(const char* shorty, bool is_static) |
| 282 | : cur_(shorty + 1), pending_this_(!is_static), initialized_(false) { |
| 283 | DCHECK(shorty != nullptr); |
| 284 | DCHECK_NE(*shorty, 0); |
| 285 | } |
| 286 | |
| 287 | inline bool Mir2Lir::ShortyIterator::Next() { |
| 288 | if (!initialized_) { |
| 289 | initialized_ = true; |
| 290 | } else if (pending_this_) { |
| 291 | pending_this_ = false; |
| 292 | } else if (*cur_ != 0) { |
| 293 | cur_++; |
| 294 | } |
| 295 | |
| 296 | return *cur_ != 0 || pending_this_; |
| 297 | } |
| 298 | |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 299 | } // namespace art |
| 300 | |
Brian Carlstrom | fc0e321 | 2013-07-17 14:40:12 -0700 | [diff] [blame] | 301 | #endif // ART_COMPILER_DEX_QUICK_MIR_TO_LIR_INL_H_ |