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Serban Constantinescued8dd492014-02-11 14:15:10 +00001/*
2 * Copyright (C) 2014 The Android Open Source Project
3 *
4 * Licensed under the Apache License, Version 2.0 (the "License");
5 * you may not use this file except in compliance with the License.
6 * You may obtain a copy of the License at
7 *
8 * http://www.apache.org/licenses/LICENSE-2.0
9 *
10 * Unless required by applicable law or agreed to in writing, software
11 * distributed under the License is distributed on an "AS IS" BASIS,
12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
13* See the License for the specific language governing permissions and
14 * limitations under the License.
15 */
16
17#ifndef ART_COMPILER_UTILS_ARM64_ASSEMBLER_ARM64_H_
18#define ART_COMPILER_UTILS_ARM64_ASSEMBLER_ARM64_H_
19
Stuart Monteithb95a5342014-03-12 13:32:32 +000020#include <stdint.h>
Ian Rogers700a4022014-05-19 16:49:03 -070021#include <memory>
22#include <vector>
Serban Constantinescued8dd492014-02-11 14:15:10 +000023
24#include "base/logging.h"
25#include "constants_arm64.h"
26#include "utils/arm64/managed_register_arm64.h"
27#include "utils/assembler.h"
28#include "offsets.h"
Andreas Gampe277ccbd2014-11-03 21:36:10 -080029
30// TODO: make vixl clean wrt -Wshadow.
31#pragma GCC diagnostic push
Andreas Gampe65b798e2015-04-06 09:35:22 -070032#pragma GCC diagnostic ignored "-Wunknown-pragmas"
Andreas Gampe277ccbd2014-11-03 21:36:10 -080033#pragma GCC diagnostic ignored "-Wshadow"
Andreas Gampe65b798e2015-04-06 09:35:22 -070034#pragma GCC diagnostic ignored "-Wmissing-noreturn"
Serban Constantinescu82e52ce2015-03-26 16:50:57 +000035#include "vixl/a64/macro-assembler-a64.h"
36#include "vixl/a64/disasm-a64.h"
Andreas Gampe277ccbd2014-11-03 21:36:10 -080037#pragma GCC diagnostic pop
Serban Constantinescued8dd492014-02-11 14:15:10 +000038
39namespace art {
40namespace arm64 {
41
Andreas Gampec8ccf682014-09-29 20:07:43 -070042#define MEM_OP(...) vixl::MemOperand(__VA_ARGS__)
Serban Constantinescued8dd492014-02-11 14:15:10 +000043
44enum LoadOperandType {
45 kLoadSignedByte,
46 kLoadUnsignedByte,
47 kLoadSignedHalfword,
48 kLoadUnsignedHalfword,
49 kLoadWord,
50 kLoadCoreWord,
51 kLoadSWord,
52 kLoadDWord
53};
54
55enum StoreOperandType {
56 kStoreByte,
57 kStoreHalfword,
58 kStoreWord,
59 kStoreCoreWord,
60 kStoreSWord,
61 kStoreDWord
62};
63
64class Arm64Exception;
65
Ian Rogersdd7624d2014-03-14 17:43:00 -070066class Arm64Assembler FINAL : public Assembler {
Serban Constantinescued8dd492014-02-11 14:15:10 +000067 public:
Alexandre Ramescee75242014-10-08 18:41:21 +010068 // We indicate the size of the initial code generation buffer to the VIXL
69 // assembler. From there we it will automatically manage the buffer.
70 Arm64Assembler() : vixl_masm_(new vixl::MacroAssembler(kArm64BaseBufferSize)) {}
Serban Constantinescued8dd492014-02-11 14:15:10 +000071
72 virtual ~Arm64Assembler() {
Serban Constantinescu0f89dac2014-05-08 13:52:53 +010073 delete vixl_masm_;
Serban Constantinescued8dd492014-02-11 14:15:10 +000074 }
75
Vladimir Markocf93a5c2015-06-16 11:33:24 +000076 // Finalize the code.
77 void FinalizeCode() OVERRIDE;
Serban Constantinescued8dd492014-02-11 14:15:10 +000078
79 // Size of generated code.
Alexandre Rameseb7b7392015-06-19 14:47:01 +010080 size_t CodeSize() const OVERRIDE;
81 const uint8_t* CodeBufferBaseAddress() const OVERRIDE;
Serban Constantinescued8dd492014-02-11 14:15:10 +000082
83 // Copy instructions out of assembly buffer into the given region of memory.
84 void FinalizeInstructions(const MemoryRegion& region);
85
Zheng Xu69a50302015-04-14 20:04:41 +080086 void SpillRegisters(vixl::CPURegList registers, int offset);
87 void UnspillRegisters(vixl::CPURegList registers, int offset);
88
Serban Constantinescued8dd492014-02-11 14:15:10 +000089 // Emit code that will create an activation on the stack.
90 void BuildFrame(size_t frame_size, ManagedRegister method_reg,
91 const std::vector<ManagedRegister>& callee_save_regs,
Ian Rogersdd7624d2014-03-14 17:43:00 -070092 const ManagedRegisterEntrySpills& entry_spills) OVERRIDE;
Serban Constantinescued8dd492014-02-11 14:15:10 +000093
94 // Emit code that will remove an activation from the stack.
Ian Rogersdd7624d2014-03-14 17:43:00 -070095 void RemoveFrame(size_t frame_size, const std::vector<ManagedRegister>& callee_save_regs)
96 OVERRIDE;
Serban Constantinescued8dd492014-02-11 14:15:10 +000097
Ian Rogersdd7624d2014-03-14 17:43:00 -070098 void IncreaseFrameSize(size_t adjust) OVERRIDE;
99 void DecreaseFrameSize(size_t adjust) OVERRIDE;
Serban Constantinescued8dd492014-02-11 14:15:10 +0000100
101 // Store routines.
Ian Rogersdd7624d2014-03-14 17:43:00 -0700102 void Store(FrameOffset offs, ManagedRegister src, size_t size) OVERRIDE;
103 void StoreRef(FrameOffset dest, ManagedRegister src) OVERRIDE;
104 void StoreRawPtr(FrameOffset dest, ManagedRegister src) OVERRIDE;
105 void StoreImmediateToFrame(FrameOffset dest, uint32_t imm, ManagedRegister scratch) OVERRIDE;
Serban Constantinescu75b91132014-04-09 18:39:10 +0100106 void StoreImmediateToThread64(ThreadOffset<8> dest, uint32_t imm, ManagedRegister scratch)
Ian Rogersdd7624d2014-03-14 17:43:00 -0700107 OVERRIDE;
Serban Constantinescu75b91132014-04-09 18:39:10 +0100108 void StoreStackOffsetToThread64(ThreadOffset<8> thr_offs, FrameOffset fr_offs,
Ian Rogersdd7624d2014-03-14 17:43:00 -0700109 ManagedRegister scratch) OVERRIDE;
Serban Constantinescu75b91132014-04-09 18:39:10 +0100110 void StoreStackPointerToThread64(ThreadOffset<8> thr_offs) OVERRIDE;
Ian Rogersdd7624d2014-03-14 17:43:00 -0700111 void StoreSpanning(FrameOffset dest, ManagedRegister src, FrameOffset in_off,
112 ManagedRegister scratch) OVERRIDE;
Serban Constantinescued8dd492014-02-11 14:15:10 +0000113
114 // Load routines.
Ian Rogersdd7624d2014-03-14 17:43:00 -0700115 void Load(ManagedRegister dest, FrameOffset src, size_t size) OVERRIDE;
Serban Constantinescu75b91132014-04-09 18:39:10 +0100116 void LoadFromThread64(ManagedRegister dest, ThreadOffset<8> src, size_t size) OVERRIDE;
Mathieu Chartiere401d142015-04-22 13:56:20 -0700117 void LoadRef(ManagedRegister dest, FrameOffset src) OVERRIDE;
118 void LoadRef(ManagedRegister dest, ManagedRegister base, MemberOffset offs,
119 bool poison_reference) OVERRIDE;
Ian Rogersdd7624d2014-03-14 17:43:00 -0700120 void LoadRawPtr(ManagedRegister dest, ManagedRegister base, Offset offs) OVERRIDE;
Serban Constantinescu75b91132014-04-09 18:39:10 +0100121 void LoadRawPtrFromThread64(ManagedRegister dest, ThreadOffset<8> offs) OVERRIDE;
Ian Rogersdd7624d2014-03-14 17:43:00 -0700122
Serban Constantinescued8dd492014-02-11 14:15:10 +0000123 // Copying routines.
Ian Rogersdd7624d2014-03-14 17:43:00 -0700124 void Move(ManagedRegister dest, ManagedRegister src, size_t size) OVERRIDE;
Serban Constantinescu75b91132014-04-09 18:39:10 +0100125 void CopyRawPtrFromThread64(FrameOffset fr_offs, ThreadOffset<8> thr_offs,
Ian Rogersdd7624d2014-03-14 17:43:00 -0700126 ManagedRegister scratch) OVERRIDE;
Serban Constantinescu75b91132014-04-09 18:39:10 +0100127 void CopyRawPtrToThread64(ThreadOffset<8> thr_offs, FrameOffset fr_offs, ManagedRegister scratch)
Ian Rogersdd7624d2014-03-14 17:43:00 -0700128 OVERRIDE;
129 void CopyRef(FrameOffset dest, FrameOffset src, ManagedRegister scratch) OVERRIDE;
130 void Copy(FrameOffset dest, FrameOffset src, ManagedRegister scratch, size_t size) OVERRIDE;
131 void Copy(FrameOffset dest, ManagedRegister src_base, Offset src_offset, ManagedRegister scratch,
132 size_t size) OVERRIDE;
133 void Copy(ManagedRegister dest_base, Offset dest_offset, FrameOffset src, ManagedRegister scratch,
134 size_t size) OVERRIDE;
135 void Copy(FrameOffset dest, FrameOffset src_base, Offset src_offset, ManagedRegister scratch,
136 size_t size) OVERRIDE;
137 void Copy(ManagedRegister dest, Offset dest_offset, ManagedRegister src, Offset src_offset,
138 ManagedRegister scratch, size_t size) OVERRIDE;
Serban Constantinescued8dd492014-02-11 14:15:10 +0000139 void Copy(FrameOffset dest, Offset dest_offset, FrameOffset src, Offset src_offset,
Ian Rogersdd7624d2014-03-14 17:43:00 -0700140 ManagedRegister scratch, size_t size) OVERRIDE;
141 void MemoryBarrier(ManagedRegister scratch) OVERRIDE;
Serban Constantinescued8dd492014-02-11 14:15:10 +0000142
143 // Sign extension.
Ian Rogersdd7624d2014-03-14 17:43:00 -0700144 void SignExtend(ManagedRegister mreg, size_t size) OVERRIDE;
Serban Constantinescued8dd492014-02-11 14:15:10 +0000145
146 // Zero extension.
Ian Rogersdd7624d2014-03-14 17:43:00 -0700147 void ZeroExtend(ManagedRegister mreg, size_t size) OVERRIDE;
Serban Constantinescued8dd492014-02-11 14:15:10 +0000148
149 // Exploit fast access in managed code to Thread::Current().
Ian Rogersdd7624d2014-03-14 17:43:00 -0700150 void GetCurrentThread(ManagedRegister tr) OVERRIDE;
151 void GetCurrentThread(FrameOffset dest_offset, ManagedRegister scratch) OVERRIDE;
Serban Constantinescued8dd492014-02-11 14:15:10 +0000152
Mathieu Chartier2cebb242015-04-21 16:50:40 -0700153 // Set up out_reg to hold a Object** into the handle scope, or to be null if the
Serban Constantinescued8dd492014-02-11 14:15:10 +0000154 // value is null and null_allowed. in_reg holds a possibly stale reference
Mathieu Chartiereb8167a2014-05-07 15:43:14 -0700155 // that can be used to avoid loading the handle scope entry to see if the value is
Mathieu Chartier2cebb242015-04-21 16:50:40 -0700156 // null.
Mathieu Chartiereb8167a2014-05-07 15:43:14 -0700157 void CreateHandleScopeEntry(ManagedRegister out_reg, FrameOffset handlescope_offset,
Ian Rogersdd7624d2014-03-14 17:43:00 -0700158 ManagedRegister in_reg, bool null_allowed) OVERRIDE;
Serban Constantinescued8dd492014-02-11 14:15:10 +0000159
Mathieu Chartier2cebb242015-04-21 16:50:40 -0700160 // Set up out_off to hold a Object** into the handle scope, or to be null if the
Serban Constantinescued8dd492014-02-11 14:15:10 +0000161 // value is null and null_allowed.
Mathieu Chartiereb8167a2014-05-07 15:43:14 -0700162 void CreateHandleScopeEntry(FrameOffset out_off, FrameOffset handlescope_offset,
Ian Rogersdd7624d2014-03-14 17:43:00 -0700163 ManagedRegister scratch, bool null_allowed) OVERRIDE;
Serban Constantinescued8dd492014-02-11 14:15:10 +0000164
Mathieu Chartiereb8167a2014-05-07 15:43:14 -0700165 // src holds a handle scope entry (Object**) load this into dst.
166 void LoadReferenceFromHandleScope(ManagedRegister dst, ManagedRegister src) OVERRIDE;
Serban Constantinescued8dd492014-02-11 14:15:10 +0000167
168 // Heap::VerifyObject on src. In some cases (such as a reference to this) we
169 // know that src may not be null.
Ian Rogersdd7624d2014-03-14 17:43:00 -0700170 void VerifyObject(ManagedRegister src, bool could_be_null) OVERRIDE;
171 void VerifyObject(FrameOffset src, bool could_be_null) OVERRIDE;
Serban Constantinescued8dd492014-02-11 14:15:10 +0000172
173 // Call to address held at [base+offset].
Ian Rogersdd7624d2014-03-14 17:43:00 -0700174 void Call(ManagedRegister base, Offset offset, ManagedRegister scratch) OVERRIDE;
175 void Call(FrameOffset base, Offset offset, ManagedRegister scratch) OVERRIDE;
Serban Constantinescu75b91132014-04-09 18:39:10 +0100176 void CallFromThread64(ThreadOffset<8> offset, ManagedRegister scratch) OVERRIDE;
Serban Constantinescued8dd492014-02-11 14:15:10 +0000177
Andreas Gampec6ee54e2014-03-24 16:45:44 -0700178 // Jump to address (not setting link register)
179 void JumpTo(ManagedRegister m_base, Offset offs, ManagedRegister m_scratch);
180
Serban Constantinescued8dd492014-02-11 14:15:10 +0000181 // Generate code to check if Thread::Current()->exception_ is non-null
182 // and branch to a ExceptionSlowPath if it is.
Ian Rogersdd7624d2014-03-14 17:43:00 -0700183 void ExceptionPoll(ManagedRegister scratch, size_t stack_adjust) OVERRIDE;
Serban Constantinescued8dd492014-02-11 14:15:10 +0000184
185 private:
186 static vixl::Register reg_x(int code) {
Alexandre Rames37c92df2014-10-17 14:35:27 +0100187 CHECK(code < kNumberOfXRegisters) << code;
Serban Constantinescued8dd492014-02-11 14:15:10 +0000188 if (code == SP) {
189 return vixl::sp;
Serban Constantinescu15523732014-04-02 13:18:05 +0100190 } else if (code == XZR) {
191 return vixl::xzr;
Serban Constantinescued8dd492014-02-11 14:15:10 +0000192 }
193 return vixl::Register::XRegFromCode(code);
194 }
195
196 static vixl::Register reg_w(int code) {
Alexandre Rames37c92df2014-10-17 14:35:27 +0100197 CHECK(code < kNumberOfWRegisters) << code;
Alexandre Ramesa304f972014-10-17 14:35:27 +0100198 if (code == WSP) {
199 return vixl::wsp;
200 } else if (code == WZR) {
201 return vixl::wzr;
202 }
Serban Constantinescued8dd492014-02-11 14:15:10 +0000203 return vixl::Register::WRegFromCode(code);
204 }
205
206 static vixl::FPRegister reg_d(int code) {
207 return vixl::FPRegister::DRegFromCode(code);
208 }
209
210 static vixl::FPRegister reg_s(int code) {
211 return vixl::FPRegister::SRegFromCode(code);
212 }
213
214 // Emits Exception block.
215 void EmitExceptionPoll(Arm64Exception *exception);
216
217 void StoreWToOffset(StoreOperandType type, WRegister source,
Alexandre Rames37c92df2014-10-17 14:35:27 +0100218 XRegister base, int32_t offset);
219 void StoreToOffset(XRegister source, XRegister base, int32_t offset);
220 void StoreSToOffset(SRegister source, XRegister base, int32_t offset);
221 void StoreDToOffset(DRegister source, XRegister base, int32_t offset);
Serban Constantinescued8dd492014-02-11 14:15:10 +0000222
Alexandre Rames37c92df2014-10-17 14:35:27 +0100223 void LoadImmediate(XRegister dest, int32_t value, vixl::Condition cond = vixl::al);
224 void Load(Arm64ManagedRegister dst, XRegister src, int32_t src_offset, size_t size);
Serban Constantinescued8dd492014-02-11 14:15:10 +0000225 void LoadWFromOffset(LoadOperandType type, WRegister dest,
Alexandre Rames37c92df2014-10-17 14:35:27 +0100226 XRegister base, int32_t offset);
227 void LoadFromOffset(XRegister dest, XRegister base, int32_t offset);
228 void LoadSFromOffset(SRegister dest, XRegister base, int32_t offset);
229 void LoadDFromOffset(DRegister dest, XRegister base, int32_t offset);
230 void AddConstant(XRegister rd, int32_t value, vixl::Condition cond = vixl::al);
231 void AddConstant(XRegister rd, XRegister rn, int32_t value, vixl::Condition cond = vixl::al);
Serban Constantinescued8dd492014-02-11 14:15:10 +0000232
Serban Constantinescued8dd492014-02-11 14:15:10 +0000233 // List of exception blocks to generate at the end of the code cache.
234 std::vector<Arm64Exception*> exception_blocks_;
Serban Constantinescu15523732014-04-02 13:18:05 +0100235
Alexandre Rames5319def2014-10-23 10:03:10 +0100236 public:
237 // Vixl assembler.
238 vixl::MacroAssembler* const vixl_masm_;
239
Serban Constantinescu15523732014-04-02 13:18:05 +0100240 // Used for testing.
241 friend class Arm64ManagedRegister_VixlRegisters_Test;
Serban Constantinescued8dd492014-02-11 14:15:10 +0000242};
243
244class Arm64Exception {
245 private:
246 explicit Arm64Exception(Arm64ManagedRegister scratch, size_t stack_adjust)
247 : scratch_(scratch), stack_adjust_(stack_adjust) {
248 }
249
250 vixl::Label* Entry() { return &exception_entry_; }
251
252 // Register used for passing Thread::Current()->exception_ .
253 const Arm64ManagedRegister scratch_;
254
255 // Stack adjust for ExceptionPool.
256 const size_t stack_adjust_;
257
258 vixl::Label exception_entry_;
259
260 friend class Arm64Assembler;
261 DISALLOW_COPY_AND_ASSIGN(Arm64Exception);
262};
263
264} // namespace arm64
265} // namespace art
266
267#endif // ART_COMPILER_UTILS_ARM64_ASSEMBLER_ARM64_H_