XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 1 | // Copyright (c) Facebook, Inc. and its affiliates. |
| 2 | // All rights reserved. |
| 3 | // |
| 4 | // Copyright 2019 Google LLC |
| 5 | // |
| 6 | // This source code is licensed under the BSD-style license found in the |
| 7 | // LICENSE file in the root directory of this source tree. |
| 8 | |
| 9 | #pragma once |
| 10 | |
| 11 | #include <stddef.h> |
| 12 | #include <stdint.h> |
| 13 | |
| 14 | #include <pthreadpool.h> |
| 15 | |
Marat Dukhan | eeaa7bd | 2019-10-25 17:31:25 -0700 | [diff] [blame] | 16 | #include <xnnpack/params.h> |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 17 | #include <xnnpack/compute.h> |
| 18 | |
| 19 | |
| 20 | enum xnn_ukernel_type { |
| 21 | xnn_ukernel_type_none = 0, |
| 22 | xnn_ukernel_type_add, |
| 23 | xnn_ukernel_type_argmax_pooling, |
| 24 | xnn_ukernel_type_average_pooling, |
Marat Dukhan | b1a0fc3 | 2019-12-02 19:32:02 -0800 | [diff] [blame] | 25 | xnn_ukernel_type_binary_elementwise, |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 26 | xnn_ukernel_type_channel_shuffle, |
Marat Dukhan | 1f29b80 | 2020-05-15 23:46:39 -0700 | [diff] [blame] | 27 | xnn_ukernel_type_conv2d_hwc2chw, |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 28 | xnn_ukernel_type_dwconv, |
| 29 | xnn_ukernel_type_gemm, |
| 30 | xnn_ukernel_type_global_average_pooling, |
Marat Dukhan | 346a9e5 | 2019-11-15 09:06:30 -0800 | [diff] [blame] | 31 | xnn_ukernel_type_igemm, |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 32 | xnn_ukernel_type_lut, |
| 33 | xnn_ukernel_type_max_pooling, |
| 34 | xnn_ukernel_type_pad, |
| 35 | xnn_ukernel_type_pixelwise_average_pooling, |
| 36 | xnn_ukernel_type_prelu, |
Marat Dukhan | fd8e689 | 2020-01-27 15:25:25 -0800 | [diff] [blame] | 37 | xnn_ukernel_type_softmax, |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 38 | xnn_ukernel_type_spmm, |
| 39 | xnn_ukernel_type_subconv2d, |
Marat Dukhan | c3065f5 | 2020-06-04 13:33:32 -0700 | [diff] [blame] | 40 | xnn_ukernel_type_unary_elementwise, |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 41 | xnn_ukernel_type_unpooling, |
| 42 | xnn_ukernel_type_vmulcaddc, |
| 43 | }; |
| 44 | |
| 45 | enum xnn_operator_type { |
Marat Dukhan | 3b59de2 | 2020-06-03 20:15:19 -0700 | [diff] [blame] | 46 | xnn_operator_type_invalid = 0, |
Marat Dukhan | 5020b96 | 2020-06-08 13:30:10 -0700 | [diff] [blame^] | 47 | xnn_operator_type_abs_nc_f32, |
Marat Dukhan | b1a0fc3 | 2019-12-02 19:32:02 -0800 | [diff] [blame] | 48 | xnn_operator_type_add_nd_f32, |
Marat Dukhan | efc47b8 | 2019-11-18 09:25:38 -0800 | [diff] [blame] | 49 | xnn_operator_type_argmax_pooling_nhwc_f32, |
| 50 | xnn_operator_type_average_pooling_nhwc_f32, |
| 51 | xnn_operator_type_average_pooling_nhwc_q8, |
Marat Dukhan | efc47b8 | 2019-11-18 09:25:38 -0800 | [diff] [blame] | 52 | xnn_operator_type_channel_shuffle_nc_x32, |
| 53 | xnn_operator_type_channel_shuffle_nc_x8, |
| 54 | xnn_operator_type_clamp_nc_f32, |
| 55 | xnn_operator_type_clamp_nc_u8, |
Marat Dukhan | 065b11e | 2020-05-22 09:49:41 -0700 | [diff] [blame] | 56 | xnn_operator_type_constant_pad_nd_x32, |
Marat Dukhan | 4e21b27 | 2020-06-04 18:45:01 -0700 | [diff] [blame] | 57 | xnn_operator_type_convolution_nchw_f32, |
Marat Dukhan | efc47b8 | 2019-11-18 09:25:38 -0800 | [diff] [blame] | 58 | xnn_operator_type_convolution_nhwc_f32, |
| 59 | xnn_operator_type_convolution_nhwc_q8, |
Marat Dukhan | 4e21b27 | 2020-06-04 18:45:01 -0700 | [diff] [blame] | 60 | xnn_operator_type_copy_nc_x32, |
Marat Dukhan | efc47b8 | 2019-11-18 09:25:38 -0800 | [diff] [blame] | 61 | xnn_operator_type_deconvolution_nhwc_f32, |
| 62 | xnn_operator_type_deconvolution_nhwc_q8, |
Marat Dukhan | 6918050 | 2019-12-06 15:00:31 -0800 | [diff] [blame] | 63 | xnn_operator_type_divide_nd_f32, |
Marat Dukhan | efc47b8 | 2019-11-18 09:25:38 -0800 | [diff] [blame] | 64 | xnn_operator_type_fully_connected_nc_f32, |
| 65 | xnn_operator_type_fully_connected_nc_q8, |
| 66 | xnn_operator_type_global_average_pooling_nwc_f32, |
| 67 | xnn_operator_type_global_average_pooling_nwc_q8, |
| 68 | xnn_operator_type_global_average_pooling_ncw_f32, |
| 69 | xnn_operator_type_hardswish_nc_f32, |
| 70 | xnn_operator_type_leaky_relu_nc_q8, |
| 71 | xnn_operator_type_max_pooling_nhwc_f32, |
| 72 | xnn_operator_type_max_pooling_nhwc_u8, |
Marat Dukhan | 79e7f84 | 2019-12-05 14:35:50 -0800 | [diff] [blame] | 73 | xnn_operator_type_maximum_nd_f32, |
| 74 | xnn_operator_type_minimum_nd_f32, |
Marat Dukhan | efc47b8 | 2019-11-18 09:25:38 -0800 | [diff] [blame] | 75 | xnn_operator_type_multiply_nd_f32, |
Marat Dukhan | 5020b96 | 2020-06-08 13:30:10 -0700 | [diff] [blame^] | 76 | xnn_operator_type_negate_nc_f32, |
Marat Dukhan | efc47b8 | 2019-11-18 09:25:38 -0800 | [diff] [blame] | 77 | xnn_operator_type_prelu_nc_f32, |
| 78 | xnn_operator_type_resize_bilinear_nhwc_f32, |
| 79 | xnn_operator_type_sigmoid_nc_f32, |
| 80 | xnn_operator_type_sigmoid_nc_q8, |
Marat Dukhan | fd8e689 | 2020-01-27 15:25:25 -0800 | [diff] [blame] | 81 | xnn_operator_type_softmax_nc_f32, |
| 82 | xnn_operator_type_softmax_nc_q8, |
Marat Dukhan | 5020b96 | 2020-06-08 13:30:10 -0700 | [diff] [blame^] | 83 | xnn_operator_type_square_nc_f32, |
Marat Dukhan | f739926 | 2020-06-05 10:58:44 -0700 | [diff] [blame] | 84 | xnn_operator_type_squared_difference_nd_f32, |
Marat Dukhan | 05f3f6d | 2019-12-03 15:13:53 -0800 | [diff] [blame] | 85 | xnn_operator_type_subtract_nd_f32, |
Marat Dukhan | efc47b8 | 2019-11-18 09:25:38 -0800 | [diff] [blame] | 86 | xnn_operator_type_unpooling_nhwc_x32, |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 87 | }; |
| 88 | |
Marat Dukhan | 1f29b80 | 2020-05-15 23:46:39 -0700 | [diff] [blame] | 89 | struct xnn_ukernel_conv2d { |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 90 | union { |
Marat Dukhan | 1f29b80 | 2020-05-15 23:46:39 -0700 | [diff] [blame] | 91 | xnn_conv_hwc2chw_ukernel_function hwc2chw_function; |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 92 | xnn_conv_hwc_ukernel_function hwc_function; |
| 93 | }; |
| 94 | uint8_t output_height_tile; |
| 95 | uint8_t output_channel_tile; |
| 96 | }; |
| 97 | |
| 98 | struct xnn_ukernel_dwconv { |
| 99 | union { |
Marat Dukhan | aefaef3 | 2020-04-09 07:09:34 -0700 | [diff] [blame] | 100 | xnn_dwconv_unipass_ukernel_function unipass_function; |
| 101 | xnn_dwconv_multipass_ukernel_function multipass_function; |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 102 | }; |
Marat Dukhan | aefaef3 | 2020-04-09 07:09:34 -0700 | [diff] [blame] | 103 | uint8_t primary_tile; |
| 104 | uint8_t incremental_tile; |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 105 | }; |
| 106 | |
| 107 | // Direct 2D Depthwise Convolution |
| 108 | struct xnn_ukernel_dwconv2d { |
| 109 | union { |
Marat Dukhan | 1f29b80 | 2020-05-15 23:46:39 -0700 | [diff] [blame] | 110 | xnn_dwconv_chw_ukernel_function chw_function; |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 111 | }; |
| 112 | uint8_t input_width_tile; |
| 113 | uint8_t output_width_tile; |
| 114 | }; |
| 115 | |
| 116 | struct xnn_ukernel_gemm { |
Marat Dukhan | 05702cf | 2020-03-26 15:41:33 -0700 | [diff] [blame] | 117 | struct xnn_hmp_gemm_ukernel general_case; |
| 118 | struct xnn_hmp_gemm_ukernel mr1_case; |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 119 | uint8_t mr; |
| 120 | uint8_t nr; |
| 121 | uint8_t kr; |
| 122 | }; |
| 123 | |
| 124 | struct xnn_ukernel_igemm { |
Marat Dukhan | 05702cf | 2020-03-26 15:41:33 -0700 | [diff] [blame] | 125 | struct xnn_hmp_igemm_ukernel general_case; |
| 126 | struct xnn_hmp_igemm_ukernel mr1_case; |
| 127 | struct xnn_hmp_gemm_ukernel gemm_case; |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 128 | uint8_t mr; |
| 129 | uint8_t nr; |
| 130 | uint8_t kr; |
| 131 | }; |
| 132 | |
| 133 | struct xnn_ukernel_spmm { |
| 134 | xnn_spmm_ukernel_function function; |
| 135 | uint8_t mr; |
| 136 | }; |
| 137 | |
| 138 | struct xnn_ukernel_vmulcaddc { |
| 139 | xnn_vmulcaddc_ukernel_function function; |
| 140 | uint8_t mr; |
| 141 | }; |
| 142 | |
| 143 | struct xnn_ukernel { |
| 144 | enum xnn_ukernel_type type; |
| 145 | union { |
Marat Dukhan | 1f29b80 | 2020-05-15 23:46:39 -0700 | [diff] [blame] | 146 | struct xnn_ukernel_conv2d conv2d; |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 147 | struct xnn_ukernel_dwconv dwconv; |
| 148 | struct xnn_ukernel_dwconv2d dwconv2d; |
| 149 | struct xnn_ukernel_gemm gemm; |
| 150 | struct xnn_ukernel_igemm igemm; |
| 151 | struct xnn_ukernel_spmm spmm; |
| 152 | struct xnn_ukernel_vmulcaddc vmulcaddc; |
| 153 | }; |
| 154 | }; |
| 155 | |
| 156 | enum xnn_run_state { |
| 157 | xnn_run_state_invalid = 0, |
| 158 | xnn_run_state_ready, |
| 159 | xnn_run_state_skip, |
| 160 | }; |
| 161 | |
| 162 | struct subconvolution_params { |
| 163 | void* weights; |
| 164 | size_t w_stride; |
| 165 | const void** indirection_buffer; |
| 166 | void* output; |
| 167 | size_t slice_width; |
| 168 | size_t slice_height; |
| 169 | size_t indirection_y_stride; |
| 170 | size_t indirection_x_stride; |
Marat Dukhan | 80fc932 | 2019-09-29 21:06:36 -0700 | [diff] [blame] | 171 | // scaled_kernel_size := kernel_size * mr * sizeof(void*). |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 172 | size_t scaled_kernel_size; |
| 173 | }; |
| 174 | |
| 175 | struct xnn_operator { |
| 176 | size_t batch_size; |
| 177 | uint32_t padding_top; |
| 178 | uint32_t padding_right; |
| 179 | uint32_t padding_bottom; |
| 180 | uint32_t padding_left; |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 181 | uint32_t kernel_height; |
| 182 | uint32_t kernel_width; |
| 183 | uint32_t stride_height; |
| 184 | uint32_t stride_width; |
| 185 | uint32_t dilation_height; |
| 186 | uint32_t dilation_width; |
| 187 | uint32_t groups; |
| 188 | size_t group_channels; |
| 189 | size_t group_input_channels; |
| 190 | size_t group_output_channels; |
| 191 | size_t channels; |
| 192 | |
| 193 | size_t pad_before_channels; |
| 194 | size_t pad_after_channels; |
| 195 | uint32_t pad_value; |
| 196 | |
| 197 | size_t input_height; |
| 198 | size_t input_width; |
| 199 | size_t input_pixel_stride; |
| 200 | const void* input; |
| 201 | const void** indirection_buffer; |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 202 | |
| 203 | size_t input2_pixel_stride; |
| 204 | const void* input2; |
| 205 | |
| 206 | size_t output_height; |
| 207 | size_t output_width; |
| 208 | size_t output_pixel_stride; |
| 209 | void* output; |
| 210 | |
| 211 | void* packed_weights; |
| 212 | // Total number of non-zero kernel elements when weights use sparse representation. |
| 213 | size_t num_nonzero_values; |
| 214 | // Total number of non-zero kernel blocks when weights use sparse representation. |
| 215 | size_t num_nonzero_blocks; |
| 216 | // Total number of output channel blocks when weights use sparse representation. |
| 217 | size_t num_output_channel_blocks; |
| 218 | // Input channel corresponding to the first non-zero kernel element. |
| 219 | size_t first_input_channel; |
| 220 | |
| 221 | float input_scale; |
| 222 | float output_scale; |
| 223 | uint8_t input_zero_point; |
| 224 | uint8_t kernel_zero_point; |
| 225 | uint8_t output_zero_point; |
| 226 | uint8_t output_min; |
| 227 | uint8_t output_max; |
| 228 | |
| 229 | size_t valid_batch_size; |
| 230 | size_t last_input_height; |
| 231 | size_t last_input_width; |
| 232 | const void* last_input; |
Marat Dukhan | 6972249 | 2019-11-11 19:55:50 -0800 | [diff] [blame] | 233 | size_t last_output_height; |
| 234 | size_t last_output_width; |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 235 | void* last_output; |
| 236 | |
| 237 | void* zero_buffer; |
| 238 | void* lookup_table; |
| 239 | void* pixelwise_buffer; |
| 240 | struct subconvolution_params* subconvolution_buffer; |
Marat Dukhan | 8440fde | 2019-10-24 12:46:13 -0700 | [diff] [blame] | 241 | uint32_t flags; |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 242 | |
| 243 | union { |
Marat Dukhan | 5020b96 | 2020-06-08 13:30:10 -0700 | [diff] [blame^] | 244 | union xnn_f32_abs_params f32_abs; |
| 245 | union xnn_f32_neg_params f32_neg; |
Marat Dukhan | 5868d80 | 2020-03-19 17:18:45 -0700 | [diff] [blame] | 246 | // Parameters for Global Average Pooling in CHW layout |
Marat Dukhan | c3065f5 | 2020-06-04 13:33:32 -0700 | [diff] [blame] | 247 | union xnn_f32_gavgpool_params f32_gavgpool; |
| 248 | union xnn_f32_hswish_params f32_hswish; |
Marat Dukhan | 8452ff5 | 2020-04-08 20:44:58 -0700 | [diff] [blame] | 249 | // Pixelwise Average Pooling normally use f32_minmax_params, but also initialize |
| 250 | // f32_scaleminmax_params in case it needs to switch to Global Average Pooling operation. |
Marat Dukhan | 5868d80 | 2020-03-19 17:18:45 -0700 | [diff] [blame] | 251 | struct { |
Marat Dukhan | c3065f5 | 2020-06-04 13:33:32 -0700 | [diff] [blame] | 252 | union xnn_f32_minmax_params f32_minmax; |
| 253 | union xnn_f32_scaleminmax_params f32_scaleminmax; |
Marat Dukhan | 5868d80 | 2020-03-19 17:18:45 -0700 | [diff] [blame] | 254 | }; |
Marat Dukhan | c3065f5 | 2020-06-04 13:33:32 -0700 | [diff] [blame] | 255 | union xnn_f32_chw_params f32_chw; |
| 256 | union xnn_q8_add_params q8_add; |
| 257 | union xnn_q8_gemm_params q8_gemm; |
Marat Dukhan | 5868d80 | 2020-03-19 17:18:45 -0700 | [diff] [blame] | 258 | // Average Pooling normally use q8_avgpool_params, but also initialize q8_gavgpool_params in case it needs to switch |
| 259 | // to Global Average Pooling operation. |
| 260 | struct { |
Marat Dukhan | c3065f5 | 2020-06-04 13:33:32 -0700 | [diff] [blame] | 261 | union xnn_q8_avgpool_params q8_avgpool; |
| 262 | union xnn_q8_avgpool_params q8_gavgpool; |
Marat Dukhan | 5868d80 | 2020-03-19 17:18:45 -0700 | [diff] [blame] | 263 | }; |
Marat Dukhan | c3065f5 | 2020-06-04 13:33:32 -0700 | [diff] [blame] | 264 | union xnn_u8_minmax_params u8_minmax; |
| 265 | } params; |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 266 | enum xnn_operator_type type; |
| 267 | struct xnn_ukernel ukernel; |
| 268 | |
| 269 | struct compute_parameters compute; |
| 270 | struct compute_parameters compute2; |
| 271 | union { |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 272 | struct argmax_pooling_context argmax_pooling; |
| 273 | struct average_pooling_context average_pooling; |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 274 | struct channel_shuffle_context channel_shuffle; |
Marat Dukhan | 1f29b80 | 2020-05-15 23:46:39 -0700 | [diff] [blame] | 275 | struct conv2d_context conv2d; |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 276 | struct dwconv2d_context dwconv2d; |
| 277 | struct dwconv_context dwconv; |
Marat Dukhan | ca2733c | 2019-11-15 23:21:17 -0800 | [diff] [blame] | 278 | struct elementwise_binary_context elementwise_binary; |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 279 | struct gemm_context gemm; |
Marat Dukhan | efc47b8 | 2019-11-18 09:25:38 -0800 | [diff] [blame] | 280 | struct global_average_pooling_nwc_context global_average_pooling_nwc; |
| 281 | struct global_average_pooling_ncw_context global_average_pooling_ncw; |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 282 | struct igemm_context igemm; |
| 283 | struct lut_contiguous_context lut_contiguous; |
| 284 | struct lut_strided_context lut_strided; |
| 285 | struct max_pooling_context max_pooling; |
Marat Dukhan | 4662b19 | 2020-05-21 15:52:03 -0700 | [diff] [blame] | 286 | struct pad_context pad; |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 287 | struct pixelwise_average_pooling_context pixelwise_average_pooling; |
| 288 | struct prelu_context prelu; |
Marat Dukhan | 6972249 | 2019-11-11 19:55:50 -0800 | [diff] [blame] | 289 | struct resize_bilinear_context resize_bilinear; |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 290 | struct spmm_context spmm; |
| 291 | struct subconv_context subconv; |
Marat Dukhan | 2995427 | 2020-02-13 17:56:11 -0800 | [diff] [blame] | 292 | struct subgemm_context subgemm; |
Marat Dukhan | fd8e689 | 2020-01-27 15:25:25 -0800 | [diff] [blame] | 293 | struct f32_three_pass_softmax_context f32_three_pass_softmax; |
| 294 | struct u8_softmax_context u8_softmax; |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 295 | struct univector_contiguous_context univector_contiguous; |
| 296 | struct univector_strided_context univector_strided; |
| 297 | struct unpooling_context unpooling; |
| 298 | struct vmulcaddc_context vmulcaddc; |
| 299 | } context; |
| 300 | |
| 301 | enum xnn_run_state state; |
| 302 | }; |