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gerrit-public.fairphone.software / platform / external / XNNPACK / c3065f56dbbe2529ffba5359296d6061fa62d097 / . / BUILD.bazel
blob: 5343e3260582ee38d98f02e2af21ee7fc38724fd [file] [log] [blame]
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]1# Copyright 2019 Google LLC
2#
3# This source code is licensed under the BSD-style license found in the
4# LICENSE file in the root directory of this source tree.
5#
6# Description:
7# XNNPACK - optimized floating-point neural network operators library
8
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]9load(":build_defs.bzl", "xnnpack_aggregate_library", "xnnpack_benchmark", "xnnpack_binary", "xnnpack_cc_library", "xnnpack_gcc_std_copts", "xnnpack_min_size_copts", "xnnpack_msvc_std_copts", "xnnpack_optional_armcl_copts", "xnnpack_optional_armcl_deps", "xnnpack_optional_dnnl_copts", "xnnpack_optional_dnnl_deps", "xnnpack_optional_gemmlowp_copts", "xnnpack_optional_gemmlowp_deps", "xnnpack_optional_ruy_copts", "xnnpack_optional_ruy_deps", "xnnpack_optional_tflite_copts", "xnnpack_optional_tflite_deps", "xnnpack_std_cxxopts", "xnnpack_unit_test", "xnnpack_visibility")
Marat Dukhan69c3f2c2019-11-06 12:30:01 -0800[diff] [blame]10
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]11licenses(["notice"])
12
13exports_files(["LICENSE"])
14
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]15OPERATOR_BENCHMARK_DEPS = [
16 ":XNNPACK",
17 ":bench_utils",
18 "@cpuinfo",
19 "@pthreadpool",
20]
21
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]22MICROKERNEL_BENCHMARK_DEPS = [
23 ":ukernels",
24 ":bench_utils",
Frank Barchard7e955972019-10-11 10:34:25 -0700[diff] [blame]25 ":enable_assembly",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]26 "@cpuinfo",
27 "@FP16",
28 "@pthreadpool",
29]
30
Marat Dukhan6adff4e2019-10-14 18:32:07 -0700[diff] [blame]31ACCURACY_EVAL_DEPS = [
32 ":XNNPACK",
33 ":ukernels",
34 "@FP16",
35 "@pthreadpool",
36]
37
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]38MICROKERNEL_TEST_DEPS = [
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]39 ":ukernels_test_mode",
Frank Barchard7e955972019-10-11 10:34:25 -0700[diff] [blame]40 ":enable_assembly",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]41 "@cpuinfo",
42 "@FP16",
43 "@pthreadpool",
44]
45
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]46OPERATOR_TEST_DEPS = [
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]47 ":XNNPACK_test_mode",
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]48 "@pthreadpool",
49 "@FP16",
50]
51
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]52OPERATOR_SRCS = [
Marat Dukhane8265432020-04-28 18:42:59 -0700[diff] [blame]53 "src/operators/add-nc.c",
54 "src/operators/argmax-pooling-nhwc.c",
55 "src/operators/average-pooling-nhwc.c",
56 "src/operators/binary-elementwise-nd.c",
57 "src/operators/channel-pad-nc.c",
58 "src/operators/channel-shuffle-nc.c",
Marat Dukhan065b11e2020-05-22 09:49:41 -0700[diff] [blame]59 "src/operators/constant-pad-nd.c",
Marat Dukhane8265432020-04-28 18:42:59 -0700[diff] [blame]60 "src/operators/convolution-nchw.c",
61 "src/operators/convolution-nhwc.c",
62 "src/operators/deconvolution-nhwc.c",
63 "src/operators/fully-connected-nc.c",
64 "src/operators/global-average-pooling-ncw.c",
65 "src/operators/global-average-pooling-nwc.c",
Marat Dukhane8265432020-04-28 18:42:59 -0700[diff] [blame]66 "src/operators/leaky-relu-nc.c",
67 "src/operators/max-pooling-nhwc.c",
68 "src/operators/prelu-nc.c",
69 "src/operators/resize-bilinear-nhwc.c",
70 "src/operators/sigmoid-nc.c",
71 "src/operators/softmax-nc.c",
Marat Dukhanc3065f52020-06-04 13:33:32 -0700[diff] [blame^]72 "src/operators/unary-elementwise-nc.c",
Marat Dukhane8265432020-04-28 18:42:59 -0700[diff] [blame]73 "src/operators/unpooling-nhwc.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]74]
75
Marat Dukhan95e8b7a2020-06-03 12:46:26 -0700[diff] [blame]76SUBGRAPH_SRCS = [
77 "src/subgraph/add2.c",
78 "src/subgraph/argmax-pooling-2d.c",
79 "src/subgraph/average-pooling-2d.c",
80 "src/subgraph/clamp.c",
81 "src/subgraph/convolution-2d.c",
82 "src/subgraph/deconvolution-2d.c",
83 "src/subgraph/depthwise-convolution-2d.c",
84 "src/subgraph/fully-connected.c",
85 "src/subgraph/hardswish.c",
86 "src/subgraph/max-pooling-2d.c",
87 "src/subgraph/multiply2.c",
88 "src/subgraph/prelu.c",
89 "src/subgraph/sigmoid.c",
90 "src/subgraph/softmax.c",
91 "src/subgraph/static-constant-pad.c",
92 "src/subgraph/unpooling-2d.c",
93]
94
Marat Dukhan3a77ea72019-12-23 12:10:24 -0800[diff] [blame]95TABLE_SRCS = [
96 "src/tables/exp2-k-over-64.c",
97 "src/tables/exp2-k-over-2048.c",
98]
99
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]100SCALAR_UKERNELS = [
Marat Dukhan329da642019-11-19 21:44:39 -0800[diff] [blame]101 "src/f32-argmaxpool/4x-scalar-c1.c",
Marat Dukhan1e782c42019-11-21 17:02:40 -0800[diff] [blame]102 "src/f32-argmaxpool/9p8x-scalar-c1.c",
Marat Dukhan329da642019-11-19 21:44:39 -0800[diff] [blame]103 "src/f32-argmaxpool/9x-scalar-c1.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]104 "src/f32-avgpool/9p8x-minmax-scalar-c1.c",
105 "src/f32-avgpool/9x-minmax-scalar-c1.c",
Marat Dukhan5c5fa962020-03-10 18:38:33 -0700[diff] [blame]106 "src/f32-clamp/gen/scalar-x1.c",
107 "src/f32-clamp/gen/scalar-x2.c",
108 "src/f32-clamp/gen/scalar-x4.c",
Marat Dukhan441e2212019-12-04 18:30:49 -0800[diff] [blame]109 "src/f32-conv-hwc/3x3s2p0p1c3x4-scalar-1x1.c",
Marat Dukhan6b7dfae2019-12-04 16:00:52 -0800[diff] [blame]110 "src/f32-conv-hwc/3x3s2p1c3x4-scalar-1x1.c",
Marat Dukhan1f29b802020-05-15 23:46:39 -0700[diff] [blame]111 "src/f32-conv-hwc2chw/3x3s2p1c3x4-scalar-1x1.c",
112 "src/f32-dwconv-chw/3x3p1-scalar.c",
113 "src/f32-dwconv-chw/3x3s2p1-scalar.c",
114 "src/f32-dwconv-chw/5x5p2-scalar.c",
115 "src/f32-dwconv-chw/5x5s2p2-scalar.c",
Marat Dukhan163a7e62020-04-09 04:19:26 -0700[diff] [blame]116 "src/f32-dwconv/gen/up1x4-scalar-acc2.c",
117 "src/f32-dwconv/gen/up1x4-scalar.c",
118 "src/f32-dwconv/gen/up1x9-scalar-acc2.c",
119 "src/f32-dwconv/gen/up1x9-scalar.c",
120 "src/f32-dwconv/gen/up1x25-scalar-acc2.c",
121 "src/f32-dwconv/gen/up1x25-scalar.c",
122 "src/f32-dwconv/gen/up2x4-scalar-acc2.c",
123 "src/f32-dwconv/gen/up2x4-scalar.c",
124 "src/f32-dwconv/gen/up2x9-scalar-acc2.c",
125 "src/f32-dwconv/gen/up2x9-scalar.c",
126 "src/f32-dwconv/gen/up2x25-scalar-acc2.c",
127 "src/f32-dwconv/gen/up2x25-scalar.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]128 "src/f32-dwconv/gen/up1x4-minmax-scalar-acc2.c",
129 "src/f32-dwconv/gen/up1x4-minmax-scalar.c",
130 "src/f32-dwconv/gen/up1x9-minmax-scalar-acc2.c",
131 "src/f32-dwconv/gen/up1x9-minmax-scalar.c",
Marat Dukhan163a7e62020-04-09 04:19:26 -0700[diff] [blame]132 "src/f32-dwconv/gen/up1x25-minmax-scalar-acc2.c",
133 "src/f32-dwconv/gen/up1x25-minmax-scalar.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]134 "src/f32-dwconv/gen/up2x4-minmax-scalar-acc2.c",
135 "src/f32-dwconv/gen/up2x4-minmax-scalar.c",
136 "src/f32-dwconv/gen/up2x9-minmax-scalar-acc2.c",
137 "src/f32-dwconv/gen/up2x9-minmax-scalar.c",
Marat Dukhan163a7e62020-04-09 04:19:26 -0700[diff] [blame]138 "src/f32-dwconv/gen/up2x25-minmax-scalar-acc2.c",
139 "src/f32-dwconv/gen/up2x25-minmax-scalar.c",
Marat Dukhan1f29b802020-05-15 23:46:39 -0700[diff] [blame]140 "src/f32-gavgpool-cw/scalar-x1.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]141 "src/f32-gavgpool/7p7x-minmax-scalar-c1.c",
142 "src/f32-gavgpool/7x-minmax-scalar-c1.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]143 "src/f32-gemm/gen-inc/1x4inc-minmax-scalar.c",
144 "src/f32-gemm/gen-inc/2x4inc-minmax-scalar.c",
145 "src/f32-gemm/gen-inc/4x4inc-minmax-scalar.c",
Marat Dukhan163a7e62020-04-09 04:19:26 -0700[diff] [blame]146 "src/f32-gemm/gen/1x4-scalar.c",
147 "src/f32-gemm/gen/2x4-scalar.c",
148 "src/f32-gemm/gen/4x2-scalar.c",
149 "src/f32-gemm/gen/4x4-scalar.c",
Marat Dukhan467f6362020-05-22 23:21:55 -0700[diff] [blame]150 "src/f32-gemm/gen/1x4-relu-scalar.c",
151 "src/f32-gemm/gen/2x4-relu-scalar.c",
152 "src/f32-gemm/gen/4x2-relu-scalar.c",
153 "src/f32-gemm/gen/4x4-relu-scalar.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]154 "src/f32-gemm/gen/1x4-minmax-scalar.c",
155 "src/f32-gemm/gen/2x4-minmax-scalar.c",
156 "src/f32-gemm/gen/4x2-minmax-scalar.c",
157 "src/f32-gemm/gen/4x4-minmax-scalar.c",
Marat Dukhan662faa02019-12-09 22:48:16 -0800[diff] [blame]158 "src/f32-hswish/gen/scalar-x1.c",
159 "src/f32-hswish/gen/scalar-x2.c",
160 "src/f32-hswish/gen/scalar-x4.c",
Marat Dukhan660fd192020-03-10 04:55:30 -0700[diff] [blame]161 "src/f32-ibilinear/gen/scalar-c1.c",
162 "src/f32-ibilinear/gen/scalar-c2.c",
163 "src/f32-ibilinear/gen/scalar-c4.c",
Marat Dukhan163a7e62020-04-09 04:19:26 -0700[diff] [blame]164 "src/f32-igemm/gen/1x4-scalar.c",
165 "src/f32-igemm/gen/2x4-scalar.c",
166 "src/f32-igemm/gen/4x2-scalar.c",
167 "src/f32-igemm/gen/4x4-scalar.c",
Marat Dukhan467f6362020-05-22 23:21:55 -0700[diff] [blame]168 "src/f32-igemm/gen/1x4-relu-scalar.c",
169 "src/f32-igemm/gen/2x4-relu-scalar.c",
170 "src/f32-igemm/gen/4x2-relu-scalar.c",
171 "src/f32-igemm/gen/4x4-relu-scalar.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]172 "src/f32-igemm/gen/1x4-minmax-scalar.c",
173 "src/f32-igemm/gen/2x4-minmax-scalar.c",
174 "src/f32-igemm/gen/4x2-minmax-scalar.c",
175 "src/f32-igemm/gen/4x4-minmax-scalar.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]176 "src/f32-maxpool/9p8x-minmax-scalar-c1.c",
177 "src/f32-pavgpool/9p8x-minmax-scalar-c1.c",
178 "src/f32-pavgpool/9x-minmax-scalar-c1.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]179 "src/f32-ppmm/gen/2x4-minmax-scalar.c",
180 "src/f32-ppmm/gen/3x3-minmax-scalar.c",
181 "src/f32-ppmm/gen/4x2-minmax-scalar.c",
182 "src/f32-ppmm/gen/4x4-minmax-scalar.c",
Marat Dukhan40a672f2019-11-25 03:08:22 -0800[diff] [blame]183 "src/f32-prelu/gen/scalar-2x1.c",
184 "src/f32-prelu/gen/scalar-2x4.c",
Marat Dukhanf46f6752020-01-21 11:03:49 -0800[diff] [blame]185 "src/f32-raddstoreexpminusmax/gen/scalar-lut64-p2-x1.c",
186 "src/f32-raddstoreexpminusmax/gen/scalar-lut64-p2-x2.c",
187 "src/f32-raddstoreexpminusmax/gen/scalar-lut64-p2-x2-acc2.c",
188 "src/f32-raddstoreexpminusmax/gen/scalar-lut64-p2-x4.c",
189 "src/f32-raddstoreexpminusmax/gen/scalar-lut64-p2-x4-acc2.c",
190 "src/f32-raddstoreexpminusmax/gen/scalar-lut64-p2-x4-acc4.c",
191 "src/f32-raddstoreexpminusmax/gen/scalar-p5-x1.c",
192 "src/f32-raddstoreexpminusmax/gen/scalar-p5-x2.c",
193 "src/f32-raddstoreexpminusmax/gen/scalar-p5-x2-acc2.c",
194 "src/f32-raddstoreexpminusmax/gen/scalar-p5-x4.c",
195 "src/f32-raddstoreexpminusmax/gen/scalar-p5-x4-acc2.c",
196 "src/f32-raddstoreexpminusmax/gen/scalar-p5-x4-acc4.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]197 "src/f32-rmax/scalar.c",
Marat Dukhan3a77ea72019-12-23 12:10:24 -0800[diff] [blame]198 "src/f32-sigmoid/gen/scalar-lut2048-p1-div-x1.c",
199 "src/f32-sigmoid/gen/scalar-lut2048-p1-div-x2.c",
200 "src/f32-sigmoid/gen/scalar-lut2048-p1-div-x4.c",
201 "src/f32-sigmoid/gen/scalar-lut64-p2-div-x1.c",
202 "src/f32-sigmoid/gen/scalar-lut64-p2-div-x2.c",
203 "src/f32-sigmoid/gen/scalar-lut64-p2-div-x4.c",
204 "src/f32-sigmoid/gen/scalar-p5-div-x1.c",
205 "src/f32-sigmoid/gen/scalar-p5-div-x2.c",
206 "src/f32-sigmoid/gen/scalar-p5-div-x4.c",
Marat Dukhan355ab432020-04-09 19:01:52 -0700[diff] [blame]207 "src/f32-spmm/gen/1x1-minmax-scalar-pipelined.c",
208 "src/f32-spmm/gen/1x1-minmax-scalar.c",
209 "src/f32-spmm/gen/2x1-minmax-scalar-pipelined.c",
210 "src/f32-spmm/gen/2x1-minmax-scalar.c",
211 "src/f32-spmm/gen/4x1-minmax-scalar-pipelined.c",
212 "src/f32-spmm/gen/4x1-minmax-scalar.c",
213 "src/f32-spmm/gen/8x1-minmax-scalar-pipelined.c",
214 "src/f32-spmm/gen/8x1-minmax-scalar.c",
215 "src/f32-spmm/gen/8x2-minmax-scalar.c",
216 "src/f32-spmm/gen/8x4-minmax-scalar.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]217 "src/f32-vbinary/gen/vadd-minmax-scalar-x1.c",
218 "src/f32-vbinary/gen/vadd-minmax-scalar-x2.c",
219 "src/f32-vbinary/gen/vadd-minmax-scalar-x4.c",
220 "src/f32-vbinary/gen/vaddc-minmax-scalar-x1.c",
221 "src/f32-vbinary/gen/vaddc-minmax-scalar-x2.c",
222 "src/f32-vbinary/gen/vaddc-minmax-scalar-x4.c",
223 "src/f32-vbinary/gen/vdiv-minmax-scalar-x1.c",
224 "src/f32-vbinary/gen/vdiv-minmax-scalar-x2.c",
225 "src/f32-vbinary/gen/vdiv-minmax-scalar-x4.c",
226 "src/f32-vbinary/gen/vdivc-minmax-scalar-x1.c",
227 "src/f32-vbinary/gen/vdivc-minmax-scalar-x2.c",
228 "src/f32-vbinary/gen/vdivc-minmax-scalar-x4.c",
Marat Dukhan403b7d42019-12-05 12:49:11 -0800[diff] [blame]229 "src/f32-vbinary/gen/vmax-scalar-x1.c",
230 "src/f32-vbinary/gen/vmax-scalar-x2.c",
231 "src/f32-vbinary/gen/vmax-scalar-x4.c",
232 "src/f32-vbinary/gen/vmaxc-scalar-x1.c",
233 "src/f32-vbinary/gen/vmaxc-scalar-x2.c",
234 "src/f32-vbinary/gen/vmaxc-scalar-x4.c",
235 "src/f32-vbinary/gen/vmin-scalar-x1.c",
236 "src/f32-vbinary/gen/vmin-scalar-x2.c",
237 "src/f32-vbinary/gen/vmin-scalar-x4.c",
238 "src/f32-vbinary/gen/vminc-scalar-x1.c",
239 "src/f32-vbinary/gen/vminc-scalar-x2.c",
240 "src/f32-vbinary/gen/vminc-scalar-x4.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]241 "src/f32-vbinary/gen/vmul-minmax-scalar-x1.c",
242 "src/f32-vbinary/gen/vmul-minmax-scalar-x2.c",
243 "src/f32-vbinary/gen/vmul-minmax-scalar-x4.c",
244 "src/f32-vbinary/gen/vmulc-minmax-scalar-x1.c",
245 "src/f32-vbinary/gen/vmulc-minmax-scalar-x2.c",
246 "src/f32-vbinary/gen/vmulc-minmax-scalar-x4.c",
247 "src/f32-vbinary/gen/vrdivc-minmax-scalar-x1.c",
248 "src/f32-vbinary/gen/vrdivc-minmax-scalar-x2.c",
249 "src/f32-vbinary/gen/vrdivc-minmax-scalar-x4.c",
250 "src/f32-vbinary/gen/vrsubc-minmax-scalar-x1.c",
251 "src/f32-vbinary/gen/vrsubc-minmax-scalar-x2.c",
252 "src/f32-vbinary/gen/vrsubc-minmax-scalar-x4.c",
253 "src/f32-vbinary/gen/vsub-minmax-scalar-x1.c",
254 "src/f32-vbinary/gen/vsub-minmax-scalar-x2.c",
255 "src/f32-vbinary/gen/vsub-minmax-scalar-x4.c",
256 "src/f32-vbinary/gen/vsubc-minmax-scalar-x1.c",
257 "src/f32-vbinary/gen/vsubc-minmax-scalar-x2.c",
258 "src/f32-vbinary/gen/vsubc-minmax-scalar-x4.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]259 "src/f32-vmulcaddc/gen/c1-minmax-scalar-2x.c",
260 "src/f32-vmulcaddc/gen/c2-minmax-scalar-2x.c",
261 "src/f32-vmulcaddc/gen/c4-minmax-scalar-2x.c",
Marat Dukhan5739f702019-12-22 19:45:09 -0800[diff] [blame]262 "src/math/expminus-scalar-lut2048-p1.c",
263 "src/math/expminus-scalar-lut64-p2.c",
264 "src/math/expminus-scalar-p5.c",
Marat Dukhan075088a2020-05-12 19:42:12 -0700[diff] [blame]265 "src/math/roundne-scalar-addsub.c",
Marat Dukhanffbf96a2020-05-14 02:59:08 -0700[diff] [blame]266 "src/math/roundne-scalar-nearbyint.c",
267 "src/math/roundne-scalar-rint.c",
Marat Dukhanc9852ba2020-05-13 17:21:29 -0700[diff] [blame]268 "src/math/roundd-scalar-addsub.c",
269 "src/math/roundd-scalar-cvt.c",
Marat Dukhanffbf96a2020-05-14 02:59:08 -0700[diff] [blame]270 "src/math/roundd-scalar-floor.c",
Marat Dukhanc9852ba2020-05-13 17:21:29 -0700[diff] [blame]271 "src/math/roundu-scalar-addsub.c",
Marat Dukhanffbf96a2020-05-14 02:59:08 -0700[diff] [blame]272 "src/math/roundu-scalar-ceil.c",
Marat Dukhanc9852ba2020-05-13 17:21:29 -0700[diff] [blame]273 "src/math/roundu-scalar-cvt.c",
Marat Dukhan2dbb9442020-05-12 20:43:43 -0700[diff] [blame]274 "src/math/roundz-scalar-addsub.c",
275 "src/math/roundz-scalar-cvt.c",
Marat Dukhanffbf96a2020-05-14 02:59:08 -0700[diff] [blame]276 "src/math/roundz-scalar-trunc.c",
Marat Dukhan5739f702019-12-22 19:45:09 -0800[diff] [blame]277 "src/math/sigmoid-scalar-lut2048-p1-div.c",
278 "src/math/sigmoid-scalar-lut64-p2-div.c",
279 "src/math/sigmoid-scalar-p5-div.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]280 "src/q8-avgpool/9p8x-minmax-scalar-c1.c",
281 "src/q8-avgpool/9x-minmax-scalar-c1.c",
Marat Dukhande06f492020-04-09 00:19:31 -0700[diff] [blame]282 "src/q8-dwconv/up1x9-minmax-scalar.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]283 "src/q8-gavgpool/7p7x-minmax-scalar-c1.c",
284 "src/q8-gavgpool/7x-minmax-scalar-c1.c",
Marat Dukhande06f492020-04-09 00:19:31 -0700[diff] [blame]285 "src/q8-gemm/2x2-minmax-scalar.c",
286 "src/q8-igemm/2x2-minmax-scalar.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]287 "src/q8-vadd/minmax-scalar.c",
Marat Dukhan5c5fa962020-03-10 18:38:33 -0700[diff] [blame]288 "src/u8-clamp/scalar-x4.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]289 "src/u8-lut32norm/scalar.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]290 "src/u8-maxpool/9p8x-minmax-scalar-c1.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]291 "src/u8-rmax/scalar.c",
Marat Dukhan3bb3bfc2020-05-19 17:42:46 -0700[diff] [blame]292 "src/x32-fill/scalar-float.c",
293 "src/x32-fill/scalar-int.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]294 "src/x32-packx/x2-scalar.c",
295 "src/x32-packx/x3-scalar.c",
296 "src/x32-packx/x4-scalar.c",
Marat Dukhan63523d42020-05-22 17:07:33 -0700[diff] [blame]297 "src/x32-pad/scalar-int.c",
298 "src/x32-pad/scalar-float.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]299 "src/x32-unpool/scalar.c",
300 "src/x32-zip/x2-scalar.c",
301 "src/x32-zip/x3-scalar.c",
302 "src/x32-zip/x4-scalar.c",
303 "src/x32-zip/xm-scalar.c",
304 "src/x8-lut/scalar.c",
305 "src/x8-zip/x2-scalar.c",
306 "src/x8-zip/x3-scalar.c",
307 "src/x8-zip/x4-scalar.c",
308 "src/x8-zip/xm-scalar.c",
Marat Dukhanfe7acb62020-03-09 19:30:05 -0700[diff] [blame]309 "src/requantization/precise-scalar.c",
310 "src/requantization/fp32-scalar.c",
311 "src/requantization/q31-scalar.c",
312 "src/requantization/gemmlowp-scalar.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]313]
314
Marat Dukhan436ebe62019-12-04 15:10:12 -0800[diff] [blame]315WASM_UKERNELS = [
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]316 "src/f32-avgpool/9p8x-minmax-wasm-c1.c",
317 "src/f32-avgpool/9x-minmax-wasm-c1.c",
Marat Dukhan5c5fa962020-03-10 18:38:33 -0700[diff] [blame]318 "src/f32-clamp/gen/wasm-x1.c",
319 "src/f32-clamp/gen/wasm-x2.c",
320 "src/f32-clamp/gen/wasm-x4.c",
Marat Dukhan163a7e62020-04-09 04:19:26 -0700[diff] [blame]321 "src/f32-dwconv/gen/up1x4-wasm-acc2.c",
322 "src/f32-dwconv/gen/up1x4-wasm.c",
323 "src/f32-dwconv/gen/up1x9-wasm-acc2.c",
324 "src/f32-dwconv/gen/up1x9-wasm.c",
325 "src/f32-dwconv/gen/up1x25-wasm-acc2.c",
326 "src/f32-dwconv/gen/up1x25-wasm.c",
327 "src/f32-dwconv/gen/up2x4-wasm-acc2.c",
328 "src/f32-dwconv/gen/up2x4-wasm.c",
329 "src/f32-dwconv/gen/up2x9-wasm-acc2.c",
330 "src/f32-dwconv/gen/up2x9-wasm.c",
331 "src/f32-dwconv/gen/up2x25-wasm-acc2.c",
332 "src/f32-dwconv/gen/up2x25-wasm.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]333 "src/f32-dwconv/gen/up1x4-minmax-wasm-acc2.c",
334 "src/f32-dwconv/gen/up1x4-minmax-wasm.c",
335 "src/f32-dwconv/gen/up1x9-minmax-wasm-acc2.c",
336 "src/f32-dwconv/gen/up1x9-minmax-wasm.c",
Marat Dukhan163a7e62020-04-09 04:19:26 -0700[diff] [blame]337 "src/f32-dwconv/gen/up1x25-minmax-wasm-acc2.c",
338 "src/f32-dwconv/gen/up1x25-minmax-wasm.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]339 "src/f32-dwconv/gen/up2x4-minmax-wasm-acc2.c",
340 "src/f32-dwconv/gen/up2x4-minmax-wasm.c",
341 "src/f32-dwconv/gen/up2x9-minmax-wasm-acc2.c",
342 "src/f32-dwconv/gen/up2x9-minmax-wasm.c",
Marat Dukhan163a7e62020-04-09 04:19:26 -0700[diff] [blame]343 "src/f32-dwconv/gen/up2x25-minmax-wasm-acc2.c",
344 "src/f32-dwconv/gen/up2x25-minmax-wasm.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]345 "src/f32-gavgpool/7p7x-minmax-wasm-c1.c",
346 "src/f32-gavgpool/7x-minmax-wasm-c1.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]347 "src/f32-gemm/gen-inc/1x4inc-minmax-wasm.c",
348 "src/f32-gemm/gen-inc/2x4inc-minmax-wasm.c",
349 "src/f32-gemm/gen-inc/4x4inc-minmax-wasm.c",
Marat Dukhan163a7e62020-04-09 04:19:26 -0700[diff] [blame]350 "src/f32-gemm/gen/1x4-wasm.c",
351 "src/f32-gemm/gen/2x4-wasm.c",
352 "src/f32-gemm/gen/4x2-wasm.c",
353 "src/f32-gemm/gen/4x4-wasm.c",
Marat Dukhan467f6362020-05-22 23:21:55 -0700[diff] [blame]354 "src/f32-gemm/gen/1x4-relu-wasm.c",
355 "src/f32-gemm/gen/2x4-relu-wasm.c",
356 "src/f32-gemm/gen/4x2-relu-wasm.c",
357 "src/f32-gemm/gen/4x4-relu-wasm.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]358 "src/f32-gemm/gen/1x4-minmax-wasm.c",
359 "src/f32-gemm/gen/2x4-minmax-wasm.c",
360 "src/f32-gemm/gen/4x2-minmax-wasm.c",
361 "src/f32-gemm/gen/4x4-minmax-wasm.c",
Marat Dukhan662faa02019-12-09 22:48:16 -0800[diff] [blame]362 "src/f32-hswish/gen/wasm-x1.c",
363 "src/f32-hswish/gen/wasm-x2.c",
364 "src/f32-hswish/gen/wasm-x4.c",
Marat Dukhan163a7e62020-04-09 04:19:26 -0700[diff] [blame]365 "src/f32-igemm/gen/1x4-wasm.c",
366 "src/f32-igemm/gen/2x4-wasm.c",
367 "src/f32-igemm/gen/4x2-wasm.c",
368 "src/f32-igemm/gen/4x4-wasm.c",
Marat Dukhan467f6362020-05-22 23:21:55 -0700[diff] [blame]369 "src/f32-igemm/gen/1x4-relu-wasm.c",
370 "src/f32-igemm/gen/2x4-relu-wasm.c",
371 "src/f32-igemm/gen/4x2-relu-wasm.c",
372 "src/f32-igemm/gen/4x4-relu-wasm.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]373 "src/f32-igemm/gen/1x4-minmax-wasm.c",
374 "src/f32-igemm/gen/2x4-minmax-wasm.c",
375 "src/f32-igemm/gen/4x2-minmax-wasm.c",
376 "src/f32-igemm/gen/4x4-minmax-wasm.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]377 "src/f32-maxpool/9p8x-minmax-wasm-c1.c",
378 "src/f32-pavgpool/9p8x-minmax-wasm-c1.c",
379 "src/f32-pavgpool/9x-minmax-wasm-c1.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]380 "src/f32-vbinary/gen/vadd-minmax-wasm-x1.c",
381 "src/f32-vbinary/gen/vadd-minmax-wasm-x2.c",
382 "src/f32-vbinary/gen/vadd-minmax-wasm-x4.c",
383 "src/f32-vbinary/gen/vaddc-minmax-wasm-x1.c",
384 "src/f32-vbinary/gen/vaddc-minmax-wasm-x2.c",
385 "src/f32-vbinary/gen/vaddc-minmax-wasm-x4.c",
386 "src/f32-vbinary/gen/vdiv-minmax-wasm-x1.c",
387 "src/f32-vbinary/gen/vdiv-minmax-wasm-x2.c",
388 "src/f32-vbinary/gen/vdiv-minmax-wasm-x4.c",
389 "src/f32-vbinary/gen/vdivc-minmax-wasm-x1.c",
390 "src/f32-vbinary/gen/vdivc-minmax-wasm-x2.c",
391 "src/f32-vbinary/gen/vdivc-minmax-wasm-x4.c",
Marat Dukhan403b7d42019-12-05 12:49:11 -0800[diff] [blame]392 "src/f32-vbinary/gen/vmax-wasm-x1.c",
393 "src/f32-vbinary/gen/vmax-wasm-x2.c",
394 "src/f32-vbinary/gen/vmax-wasm-x4.c",
395 "src/f32-vbinary/gen/vmaxc-wasm-x1.c",
396 "src/f32-vbinary/gen/vmaxc-wasm-x2.c",
397 "src/f32-vbinary/gen/vmaxc-wasm-x4.c",
398 "src/f32-vbinary/gen/vmin-wasm-x1.c",
399 "src/f32-vbinary/gen/vmin-wasm-x2.c",
400 "src/f32-vbinary/gen/vmin-wasm-x4.c",
401 "src/f32-vbinary/gen/vminc-wasm-x1.c",
402 "src/f32-vbinary/gen/vminc-wasm-x2.c",
403 "src/f32-vbinary/gen/vminc-wasm-x4.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]404 "src/f32-vbinary/gen/vmul-minmax-wasm-x1.c",
405 "src/f32-vbinary/gen/vmul-minmax-wasm-x2.c",
406 "src/f32-vbinary/gen/vmul-minmax-wasm-x4.c",
407 "src/f32-vbinary/gen/vmulc-minmax-wasm-x1.c",
408 "src/f32-vbinary/gen/vmulc-minmax-wasm-x2.c",
409 "src/f32-vbinary/gen/vmulc-minmax-wasm-x4.c",
410 "src/f32-vbinary/gen/vrdivc-minmax-wasm-x1.c",
411 "src/f32-vbinary/gen/vrdivc-minmax-wasm-x2.c",
412 "src/f32-vbinary/gen/vrdivc-minmax-wasm-x4.c",
413 "src/f32-vbinary/gen/vrsubc-minmax-wasm-x1.c",
414 "src/f32-vbinary/gen/vrsubc-minmax-wasm-x2.c",
415 "src/f32-vbinary/gen/vrsubc-minmax-wasm-x4.c",
416 "src/f32-vbinary/gen/vsub-minmax-wasm-x1.c",
417 "src/f32-vbinary/gen/vsub-minmax-wasm-x2.c",
418 "src/f32-vbinary/gen/vsub-minmax-wasm-x4.c",
419 "src/f32-vbinary/gen/vsubc-minmax-wasm-x1.c",
420 "src/f32-vbinary/gen/vsubc-minmax-wasm-x2.c",
421 "src/f32-vbinary/gen/vsubc-minmax-wasm-x4.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]422 "src/f32-vmulcaddc/gen/c1-minmax-wasm-2x.c",
423 "src/f32-vmulcaddc/gen/c2-minmax-wasm-2x.c",
424 "src/f32-vmulcaddc/gen/c4-minmax-wasm-2x.c",
Marat Dukhan436ebe62019-12-04 15:10:12 -0800[diff] [blame]425]
426
Marat Dukhan8d3c07e2020-01-02 01:20:59 -0800[diff] [blame]427PSIMD_FASTMATH_UKERNELS = [
Marat Dukhan329da642019-11-19 21:44:39 -0800[diff] [blame]428 "src/f32-argmaxpool/4x-psimd-c4.c",
Marat Dukhan1e782c42019-11-21 17:02:40 -0800[diff] [blame]429 "src/f32-argmaxpool/9p8x-psimd-c4.c",
Marat Dukhan329da642019-11-19 21:44:39 -0800[diff] [blame]430 "src/f32-argmaxpool/9x-psimd-c4.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]431 "src/f32-avgpool/9p8x-minmax-psimd-c4.c",
432 "src/f32-avgpool/9x-minmax-psimd-c4.c",
Marat Dukhan5c5fa962020-03-10 18:38:33 -0700[diff] [blame]433 "src/f32-clamp/gen/psimd-x4.c",
434 "src/f32-clamp/gen/psimd-x8.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]435 "src/f32-dwconv/gen/up4x25-minmax-psimd-acc2.c",
436 "src/f32-dwconv/gen/up4x25-minmax-psimd.c",
437 "src/f32-dwconv/gen/up4x4-minmax-psimd-acc2.c",
438 "src/f32-dwconv/gen/up4x4-minmax-psimd.c",
439 "src/f32-dwconv/gen/up4x9-minmax-psimd-acc2.c",
440 "src/f32-dwconv/gen/up4x9-minmax-psimd.c",
441 "src/f32-dwconv/gen/up8x25-minmax-psimd-acc2.c",
442 "src/f32-dwconv/gen/up8x25-minmax-psimd.c",
443 "src/f32-dwconv/gen/up8x4-minmax-psimd-acc2.c",
444 "src/f32-dwconv/gen/up8x4-minmax-psimd.c",
445 "src/f32-dwconv/gen/up8x9-minmax-psimd-acc2.c",
446 "src/f32-dwconv/gen/up8x9-minmax-psimd.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]447 "src/f32-gavgpool/7p7x-minmax-psimd-c4.c",
448 "src/f32-gavgpool/7x-minmax-psimd-c4.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]449 "src/f32-gemm/gen/1x8-minmax-psimd-loadsplat.c",
450 "src/f32-gemm/gen/1x8-minmax-psimd-splat.c",
451 "src/f32-gemm/gen/1x8s4-minmax-psimd.c",
452 "src/f32-gemm/gen/4x2c4-minmax-psimd.c",
453 "src/f32-gemm/gen/4x8-minmax-psimd-loadsplat.c",
454 "src/f32-gemm/gen/4x8-minmax-psimd-splat.c",
455 "src/f32-gemm/gen/4x8s4-minmax-psimd.c",
456 "src/f32-gemm/gen/6x8-minmax-psimd-loadsplat.c",
457 "src/f32-gemm/gen/6x8-minmax-psimd-splat.c",
458 "src/f32-gemm/gen/6x8s4-minmax-psimd.c",
459 "src/f32-gemm/gen-inc/1x8inc-minmax-psimd-loadsplat.c",
460 "src/f32-gemm/gen-inc/1x8inc-minmax-psimd-splat.c",
461 "src/f32-gemm/gen-inc/1x8s4inc-minmax-psimd.c",
462 "src/f32-gemm/gen-inc/4x8inc-minmax-psimd-loadsplat.c",
463 "src/f32-gemm/gen-inc/4x8inc-minmax-psimd-splat.c",
464 "src/f32-gemm/gen-inc/4x8s4inc-minmax-psimd.c",
465 "src/f32-gemm/gen-inc/6x8inc-minmax-psimd-loadsplat.c",
466 "src/f32-gemm/gen-inc/6x8inc-minmax-psimd-splat.c",
467 "src/f32-gemm/gen-inc/6x8s4inc-minmax-psimd.c",
Marat Dukhan662faa02019-12-09 22:48:16 -0800[diff] [blame]468 "src/f32-hswish/gen/psimd-x4.c",
469 "src/f32-hswish/gen/psimd-x8.c",
Marat Dukhan660fd192020-03-10 04:55:30 -0700[diff] [blame]470 "src/f32-ibilinear/gen/psimd-c4.c",
471 "src/f32-ibilinear/gen/psimd-c8.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]472 "src/f32-igemm/gen/1x8-minmax-psimd-loadsplat.c",
473 "src/f32-igemm/gen/1x8-minmax-psimd-splat.c",
474 "src/f32-igemm/gen/1x8s4-minmax-psimd.c",
475 "src/f32-igemm/gen/4x2c4-minmax-psimd.c",
476 "src/f32-igemm/gen/4x8-minmax-psimd-loadsplat.c",
477 "src/f32-igemm/gen/4x8-minmax-psimd-splat.c",
478 "src/f32-igemm/gen/4x8s4-minmax-psimd.c",
479 "src/f32-igemm/gen/6x8-minmax-psimd-loadsplat.c",
480 "src/f32-igemm/gen/6x8-minmax-psimd-splat.c",
481 "src/f32-igemm/gen/6x8s4-minmax-psimd.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]482 "src/f32-maxpool/9p8x-minmax-psimd-c4.c",
483 "src/f32-pavgpool/9p8x-minmax-psimd-c4.c",
484 "src/f32-pavgpool/9x-minmax-psimd-c4.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]485 "src/f32-ppmm/gen/4x8-minmax-psimd.c",
Marat Dukhan40a672f2019-11-25 03:08:22 -0800[diff] [blame]486 "src/f32-prelu/gen/psimd-2x4.c",
487 "src/f32-prelu/gen/psimd-2x8.c",
Marat Dukhanb39689d2020-01-24 13:32:20 -0800[diff] [blame]488 "src/f32-rmax/psimd.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]489 "src/f32-vbinary/gen/vadd-minmax-psimd-x4.c",
490 "src/f32-vbinary/gen/vadd-minmax-psimd-x8.c",
491 "src/f32-vbinary/gen/vaddc-minmax-psimd-x4.c",
492 "src/f32-vbinary/gen/vaddc-minmax-psimd-x8.c",
493 "src/f32-vbinary/gen/vdiv-minmax-psimd-x4.c",
494 "src/f32-vbinary/gen/vdiv-minmax-psimd-x8.c",
495 "src/f32-vbinary/gen/vdivc-minmax-psimd-x4.c",
496 "src/f32-vbinary/gen/vdivc-minmax-psimd-x8.c",
Marat Dukhan403b7d42019-12-05 12:49:11 -0800[diff] [blame]497 "src/f32-vbinary/gen/vmax-psimd-x4.c",
498 "src/f32-vbinary/gen/vmax-psimd-x8.c",
499 "src/f32-vbinary/gen/vmaxc-psimd-x4.c",
500 "src/f32-vbinary/gen/vmaxc-psimd-x8.c",
501 "src/f32-vbinary/gen/vmin-psimd-x4.c",
502 "src/f32-vbinary/gen/vmin-psimd-x8.c",
503 "src/f32-vbinary/gen/vminc-psimd-x4.c",
504 "src/f32-vbinary/gen/vminc-psimd-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]505 "src/f32-vbinary/gen/vmul-minmax-psimd-x4.c",
506 "src/f32-vbinary/gen/vmul-minmax-psimd-x8.c",
507 "src/f32-vbinary/gen/vmulc-minmax-psimd-x4.c",
508 "src/f32-vbinary/gen/vmulc-minmax-psimd-x8.c",
509 "src/f32-vbinary/gen/vrdivc-minmax-psimd-x4.c",
510 "src/f32-vbinary/gen/vrdivc-minmax-psimd-x8.c",
511 "src/f32-vbinary/gen/vrsubc-minmax-psimd-x4.c",
512 "src/f32-vbinary/gen/vrsubc-minmax-psimd-x8.c",
513 "src/f32-vbinary/gen/vsub-minmax-psimd-x4.c",
514 "src/f32-vbinary/gen/vsub-minmax-psimd-x8.c",
515 "src/f32-vbinary/gen/vsubc-minmax-psimd-x4.c",
516 "src/f32-vbinary/gen/vsubc-minmax-psimd-x8.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]517 "src/f32-vmulcaddc/gen/c4-minmax-psimd-2x.c",
518 "src/f32-vmulcaddc/gen/c8-minmax-psimd-2x.c",
Marat Dukhan3bb3bfc2020-05-19 17:42:46 -0700[diff] [blame]519 "src/x32-fill/psimd.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]520 "src/x32-packx/x4-psimd.c",
Marat Dukhan63523d42020-05-22 17:07:33 -0700[diff] [blame]521 "src/x32-pad/psimd.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]522 "src/x32-unpool/psimd.c",
523 "src/x32-zip/x2-psimd.c",
524 "src/x32-zip/x3-psimd.c",
525 "src/x32-zip/x4-psimd.c",
526 "src/x32-zip/xm-psimd.c",
Marat Dukhanfe7acb62020-03-09 19:30:05 -0700[diff] [blame]527 "src/requantization/precise-psimd.c",
528 "src/requantization/fp32-psimd.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]529]
530
Marat Dukhan8d3c07e2020-01-02 01:20:59 -0800[diff] [blame]531PSIMD_ACCMATH_UKERNELS = [
Marat Dukhanb39689d2020-01-24 13:32:20 -0800[diff] [blame]532 "src/f32-raddstoreexpminusmax/gen/psimd-p5-x4.c",
533 "src/f32-raddstoreexpminusmax/gen/psimd-p5-x8.c",
534 "src/f32-raddstoreexpminusmax/gen/psimd-p5-x8-acc2.c",
535 "src/f32-raddstoreexpminusmax/gen/psimd-p5-x12.c",
536 "src/f32-raddstoreexpminusmax/gen/psimd-p5-x12-acc2.c",
537 "src/f32-raddstoreexpminusmax/gen/psimd-p5-x12-acc3.c",
538 "src/f32-raddstoreexpminusmax/gen/psimd-p5-x16.c",
539 "src/f32-raddstoreexpminusmax/gen/psimd-p5-x16-acc2.c",
540 "src/f32-raddstoreexpminusmax/gen/psimd-p5-x16-acc4.c",
541 "src/f32-raddstoreexpminusmax/gen/psimd-p5-x20.c",
542 "src/f32-raddstoreexpminusmax/gen/psimd-p5-x20-acc2.c",
543 "src/f32-raddstoreexpminusmax/gen/psimd-p5-x20-acc5.c",
Marat Dukhan8d3c07e2020-01-02 01:20:59 -0800[diff] [blame]544 "src/f32-sigmoid/gen/psimd-p5-div-x4.c",
545 "src/f32-sigmoid/gen/psimd-p5-div-x8.c",
546 "src/f32-sigmoid/gen/psimd-p5-div-x12.c",
547 "src/f32-sigmoid/gen/psimd-p5-div-x16.c",
548 "src/f32-sigmoid/gen/psimd-p5-div-x20.c",
549 "src/f32-sigmoid/gen/psimd-p5-div-x24.c",
Marat Dukhan075088a2020-05-12 19:42:12 -0700[diff] [blame]550 "src/math/roundne-psimd-addsub.c",
Marat Dukhanc9852ba2020-05-13 17:21:29 -0700[diff] [blame]551 "src/math/roundd-psimd-addsub.c",
552 "src/math/roundu-psimd-addsub.c",
Marat Dukhan2dbb9442020-05-12 20:43:43 -0700[diff] [blame]553 "src/math/roundz-psimd-addsub.c",
Marat Dukhan8d3c07e2020-01-02 01:20:59 -0800[diff] [blame]554 "src/math/sigmoid-psimd-p5-div.c",
555]
556
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]557# ISA-specific micro-kernels
558NEON_UKERNELS = [
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]559 "src/f32-avgpool/9p8x-minmax-neon-c4.c",
560 "src/f32-avgpool/9x-minmax-neon-c4.c",
Marat Dukhan5c5fa962020-03-10 18:38:33 -0700[diff] [blame]561 "src/f32-clamp/gen/neon-x4.c",
562 "src/f32-clamp/gen/neon-x8.c",
Marat Dukhan56b10cd2020-05-18 09:35:49 -0700[diff] [blame]563 "src/f32-conv-hwc/gen/3x3s2p0p1c3x4-neon-2x1.c",
564 "src/f32-conv-hwc/gen/3x3s2p0p1c3x8-neon-2x1.c",
Marat Dukhance7a3f82020-05-17 21:46:44 -0700[diff] [blame]565 "src/f32-conv-hwc/gen/3x3s2p0p1c3x4-neon-2x2.c",
566 "src/f32-conv-hwc/gen/3x3s2p0p1c3x8-neon-2x2.c",
Marat Dukhan56b10cd2020-05-18 09:35:49 -0700[diff] [blame]567 "src/f32-conv-hwc/gen/3x3s2p1c3x4-neon-2x1.c",
568 "src/f32-conv-hwc/gen/3x3s2p1c3x8-neon-2x1.c",
Marat Dukhance7a3f82020-05-17 21:46:44 -0700[diff] [blame]569 "src/f32-conv-hwc/gen/3x3s2p1c3x4-neon-2x2.c",
570 "src/f32-conv-hwc/gen/3x3s2p1c3x8-neon-2x2.c",
Marat Dukhanf5425ea2020-04-24 01:46:00 -0700[diff] [blame]571 "src/f32-dwconv/gen/up4x4-minmax-neon.c",
572 "src/f32-dwconv/gen/up4x4-minmax-neon-acc2.c",
573 "src/f32-dwconv/gen/up8x4-minmax-neon.c",
574 "src/f32-dwconv/gen/up8x4-minmax-neon-acc2.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]575 "src/f32-dwconv/gen/up4x9-minmax-neon.c",
576 "src/f32-dwconv/gen/up4x9-minmax-neon-acc2.c",
577 "src/f32-dwconv/gen/up8x9-minmax-neon.c",
578 "src/f32-dwconv/gen/up8x9-minmax-neon-acc2.c",
Marat Dukhanf5425ea2020-04-24 01:46:00 -0700[diff] [blame]579 "src/f32-dwconv/gen/up4x25-minmax-neon.c",
580 "src/f32-dwconv/gen/up4x25-minmax-neon-acc2.c",
581 "src/f32-dwconv/gen/up8x25-minmax-neon.c",
582 "src/f32-dwconv/gen/up8x25-minmax-neon-acc2.c",
Marat Dukhan1f29b802020-05-15 23:46:39 -0700[diff] [blame]583 "src/f32-gavgpool-cw/neon-x4.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]584 "src/f32-gavgpool/7p7x-minmax-neon-c4.c",
585 "src/f32-gavgpool/7x-minmax-neon-c4.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]586 "src/f32-gemm/gen/1x8-minmax-neon-lane-ld64.c",
587 "src/f32-gemm/gen/4x2-minmax-neon-lane-ld64.c",
588 "src/f32-gemm/gen/4x8-minmax-neon-lane-ld128.c",
589 "src/f32-gemm/gen/4x8-minmax-neon-lane-ld64.c",
590 "src/f32-gemm/gen/5x8-minmax-neon-lane-ld64.c",
591 "src/f32-gemm/gen/6x8-minmax-neon-lane-ld64.c",
592 "src/f32-gemm/gen/6x8-minmax-neon-lane-ld128.c",
593 "src/f32-gemm/gen/1x8-minmax-neon-dup-ld64.c",
594 "src/f32-gemm/gen/4x8-minmax-neon-dup-ld128.c",
595 "src/f32-gemm/gen/4x8-minmax-neon-dup-ld64.c",
596 "src/f32-gemm/gen/6x8-minmax-neon-dup-ld64.c",
597 "src/f32-gemm/gen/6x8-minmax-neon-dup-ld128.c",
598 "src/f32-gemm/gen/1x8s4-minmax-neon.c",
599 "src/f32-gemm/gen/4x8s4-minmax-neon.c",
600 "src/f32-gemm/gen/6x8s4-minmax-neon.c",
601 "src/f32-gemm/gen/8x8s4-minmax-neon.c",
602 "src/f32-gemm/gen-inc/1x8inc-minmax-neon-lane-ld64.c",
603 "src/f32-gemm/gen-inc/4x8inc-minmax-neon-lane-ld128.c",
604 "src/f32-gemm/gen-inc/4x8inc-minmax-neon-lane-ld64.c",
605 "src/f32-gemm/gen-inc/5x8inc-minmax-neon-lane-ld64.c",
606 "src/f32-gemm/gen-inc/6x8inc-minmax-neon-lane-ld64.c",
607 "src/f32-gemm/gen-inc/6x8inc-minmax-neon-lane-ld128.c",
608 "src/f32-gemm/gen-inc/1x8inc-minmax-neon-dup-ld64.c",
609 "src/f32-gemm/gen-inc/4x8inc-minmax-neon-dup-ld128.c",
610 "src/f32-gemm/gen-inc/4x8inc-minmax-neon-dup-ld64.c",
611 "src/f32-gemm/gen-inc/6x8inc-minmax-neon-dup-ld64.c",
612 "src/f32-gemm/gen-inc/6x8inc-minmax-neon-dup-ld128.c",
613 "src/f32-gemm/gen-inc/1x8s4inc-minmax-neon.c",
614 "src/f32-gemm/gen-inc/4x8s4inc-minmax-neon.c",
615 "src/f32-gemm/gen-inc/6x8s4inc-minmax-neon.c",
616 "src/f32-gemm/gen-inc/8x8s4inc-minmax-neon.c",
Marat Dukhan662faa02019-12-09 22:48:16 -0800[diff] [blame]617 "src/f32-hswish/gen/neon-x4.c",
618 "src/f32-hswish/gen/neon-x8.c",
Marat Dukhan660fd192020-03-10 04:55:30 -0700[diff] [blame]619 "src/f32-ibilinear/gen/neon-c4.c",
620 "src/f32-ibilinear/gen/neon-c8.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]621 "src/f32-igemm/gen/1x8-minmax-neon-lane-ld64.c",
622 "src/f32-igemm/gen/4x2-minmax-neon-lane-ld64.c",
623 "src/f32-igemm/gen/4x4-minmax-neon-lane-ld64.c",
624 "src/f32-igemm/gen/4x8-minmax-neon-lane-ld128.c",
625 "src/f32-igemm/gen/4x8-minmax-neon-lane-ld64.c",
626 "src/f32-igemm/gen/6x8-minmax-neon-lane-ld64.c",
627 "src/f32-igemm/gen/6x8-minmax-neon-lane-ld128.c",
628 "src/f32-igemm/gen/1x8-minmax-neon-dup-ld64.c",
629 "src/f32-igemm/gen/4x8-minmax-neon-dup-ld128.c",
630 "src/f32-igemm/gen/4x8-minmax-neon-dup-ld64.c",
631 "src/f32-igemm/gen/6x8-minmax-neon-dup-ld64.c",
632 "src/f32-igemm/gen/6x8-minmax-neon-dup-ld128.c",
633 "src/f32-igemm/gen/1x8s4-minmax-neon.c",
634 "src/f32-igemm/gen/4x8s4-minmax-neon.c",
635 "src/f32-igemm/gen/6x8s4-minmax-neon.c",
636 "src/f32-igemm/gen/8x8s4-minmax-neon.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]637 "src/f32-maxpool/9p8x-minmax-neon-c4.c",
638 "src/f32-pavgpool/9p8x-minmax-neon-c4.c",
639 "src/f32-pavgpool/9x-minmax-neon-c4.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]640 "src/f32-ppmm/gen/4x8-minmax-neon.c",
641 "src/f32-ppmm/gen/8x8-minmax-neon.c",
Marat Dukhan40a672f2019-11-25 03:08:22 -0800[diff] [blame]642 "src/f32-prelu/gen/neon-2x4.c",
643 "src/f32-prelu/gen/neon-2x8.c",
Marat Dukhan8137e4c2020-01-25 12:56:58 -0800[diff] [blame]644 "src/f32-raddstoreexpminusmax/gen/neon-p5-x4.c",
645 "src/f32-raddstoreexpminusmax/gen/neon-p5-x8.c",
646 "src/f32-raddstoreexpminusmax/gen/neon-p5-x8-acc2.c",
647 "src/f32-raddstoreexpminusmax/gen/neon-p5-x12.c",
648 "src/f32-raddstoreexpminusmax/gen/neon-p5-x12-acc2.c",
649 "src/f32-raddstoreexpminusmax/gen/neon-p5-x12-acc3.c",
650 "src/f32-raddstoreexpminusmax/gen/neon-p5-x16.c",
651 "src/f32-raddstoreexpminusmax/gen/neon-p5-x16-acc2.c",
652 "src/f32-raddstoreexpminusmax/gen/neon-p5-x16-acc4.c",
653 "src/f32-raddstoreexpminusmax/gen/neon-p5-x20.c",
654 "src/f32-raddstoreexpminusmax/gen/neon-p5-x20-acc2.c",
655 "src/f32-raddstoreexpminusmax/gen/neon-p5-x20-acc5.c",
656 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x4.c",
657 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x8.c",
658 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x8-acc2.c",
659 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x12.c",
660 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x12-acc2.c",
661 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x12-acc3.c",
662 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x16.c",
663 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x16-acc2.c",
664 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x16-acc4.c",
665 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x20.c",
666 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x20-acc2.c",
667 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x20-acc5.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]668 "src/f32-rmax/neon.c",
Marat Dukhan40a672f2019-11-25 03:08:22 -0800[diff] [blame]669 "src/f32-sigmoid/gen/neon-frac-p9-p10-nr1recps-x16.c",
Marat Dukhan4a24a582020-01-06 13:30:00 -0800[diff] [blame]670 "src/f32-sigmoid/gen/neon-rr2-p5-nr2recps-x4.c",
671 "src/f32-sigmoid/gen/neon-rr2-p5-nr2recps-x8.c",
672 "src/f32-sigmoid/gen/neon-rr2-p5-nr2recps-x12.c",
673 "src/f32-sigmoid/gen/neon-rr2-p5-nr2recps-x16.c",
674 "src/f32-sigmoid/gen/neon-rr2-p5-nr2recps-x20.c",
675 "src/f32-sigmoid/gen/neon-rr2-p5-nr2recps-x24.c",
676 "src/f32-sigmoid/gen/neon-rr2-lut64-p2-nr2recps-x4.c",
677 "src/f32-sigmoid/gen/neon-rr2-lut64-p2-nr2recps-x8.c",
678 "src/f32-sigmoid/gen/neon-rr2-lut64-p2-nr2recps-x12.c",
679 "src/f32-sigmoid/gen/neon-rr2-lut64-p2-nr2recps-x16.c",
680 "src/f32-sigmoid/gen/neon-rr2-lut64-p2-nr2recps-x20.c",
681 "src/f32-sigmoid/gen/neon-rr2-lut64-p2-nr2recps-x24.c",
682 "src/f32-sigmoid/gen/neon-rr2-lut2048-p1-nr2recps-x4.c",
683 "src/f32-sigmoid/gen/neon-rr2-lut2048-p1-nr2recps-x8.c",
684 "src/f32-sigmoid/gen/neon-rr2-lut2048-p1-nr2recps-x12.c",
685 "src/f32-sigmoid/gen/neon-rr2-lut2048-p1-nr2recps-x16.c",
686 "src/f32-sigmoid/gen/neon-rr2-lut2048-p1-nr2recps-x20.c",
687 "src/f32-sigmoid/gen/neon-rr2-lut2048-p1-nr2recps-x24.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]688 "src/f32-vbinary/gen/vadd-minmax-neon-x4.c",
689 "src/f32-vbinary/gen/vadd-minmax-neon-x8.c",
690 "src/f32-vbinary/gen/vaddc-minmax-neon-x4.c",
691 "src/f32-vbinary/gen/vaddc-minmax-neon-x8.c",
Marat Dukhan403b7d42019-12-05 12:49:11 -0800[diff] [blame]692 "src/f32-vbinary/gen/vmax-neon-x4.c",
693 "src/f32-vbinary/gen/vmax-neon-x8.c",
694 "src/f32-vbinary/gen/vmaxc-neon-x4.c",
695 "src/f32-vbinary/gen/vmaxc-neon-x8.c",
696 "src/f32-vbinary/gen/vmin-neon-x4.c",
697 "src/f32-vbinary/gen/vmin-neon-x8.c",
698 "src/f32-vbinary/gen/vminc-neon-x4.c",
699 "src/f32-vbinary/gen/vminc-neon-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]700 "src/f32-vbinary/gen/vmul-minmax-neon-x4.c",
701 "src/f32-vbinary/gen/vmul-minmax-neon-x8.c",
702 "src/f32-vbinary/gen/vmulc-minmax-neon-x4.c",
703 "src/f32-vbinary/gen/vmulc-minmax-neon-x8.c",
704 "src/f32-vbinary/gen/vrsubc-minmax-neon-x4.c",
705 "src/f32-vbinary/gen/vrsubc-minmax-neon-x8.c",
706 "src/f32-vbinary/gen/vsub-minmax-neon-x4.c",
707 "src/f32-vbinary/gen/vsub-minmax-neon-x8.c",
708 "src/f32-vbinary/gen/vsubc-minmax-neon-x4.c",
709 "src/f32-vbinary/gen/vsubc-minmax-neon-x8.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]710 "src/f32-vmulcaddc/gen/c4-minmax-neon-2x.c",
711 "src/f32-vmulcaddc/gen/c8-minmax-neon-2x.c",
712 "src/q8-avgpool/9p8x-minmax-neon-c8.c",
713 "src/q8-avgpool/9x-minmax-neon-c8.c",
Marat Dukhande06f492020-04-09 00:19:31 -0700[diff] [blame]714 "src/q8-dwconv/up8x9-minmax-neon.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]715 "src/q8-gavgpool/7p7x-minmax-neon-c8.c",
716 "src/q8-gavgpool/7x-minmax-neon-c8.c",
Marat Dukhande06f492020-04-09 00:19:31 -0700[diff] [blame]717 "src/q8-gemm/4x8-minmax-neon.c",
718 "src/q8-gemm/8x8-minmax-neon.c",
719 "src/q8-igemm/4x8-minmax-neon.c",
720 "src/q8-igemm/8x8-minmax-neon.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]721 "src/q8-vadd/minmax-neon.c",
Marat Dukhan5c5fa962020-03-10 18:38:33 -0700[diff] [blame]722 "src/u8-clamp/neon-x64.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]723 "src/u8-maxpool/9p8x-minmax-neon-c16.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]724 "src/u8-rmax/neon.c",
Marat Dukhan3bb3bfc2020-05-19 17:42:46 -0700[diff] [blame]725 "src/x32-fill/neon.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]726 "src/x32-packx/x4-neon-st4.c",
Marat Dukhan63523d42020-05-22 17:07:33 -0700[diff] [blame]727 "src/x32-pad/neon.c",
Marat Dukhan57dccd82020-04-14 00:53:10 -0700[diff] [blame]728 "src/x32-unpool/neon.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]729 "src/x32-zip/x2-neon.c",
730 "src/x32-zip/x3-neon.c",
731 "src/x32-zip/x4-neon.c",
732 "src/x32-zip/xm-neon.c",
733 "src/x8-zip/x2-neon.c",
734 "src/x8-zip/x3-neon.c",
735 "src/x8-zip/x4-neon.c",
736 "src/x8-zip/xm-neon.c",
Marat Dukhan075088a2020-05-12 19:42:12 -0700[diff] [blame]737 "src/math/roundne-neon-addsub.c",
Marat Dukhanc9852ba2020-05-13 17:21:29 -0700[diff] [blame]738 "src/math/roundd-neon-addsub.c",
739 "src/math/roundd-neon-cvt.c",
740 "src/math/roundu-neon-addsub.c",
741 "src/math/roundu-neon-cvt.c",
Marat Dukhan2dbb9442020-05-12 20:43:43 -0700[diff] [blame]742 "src/math/roundz-neon-addsub.c",
743 "src/math/roundz-neon-cvt.c",
Marat Dukhan68b3b452020-01-02 10:11:15 -0800[diff] [blame]744 "src/math/sigmoid-neon-frac-p9-p10-nr1recps.c",
Marat Dukhan77221d32020-01-06 10:04:39 -0800[diff] [blame]745 "src/math/sigmoid-neon-rr1-lut2048-p1-nr2recps.c",
746 "src/math/sigmoid-neon-rr1-lut64-p2-nr2recps.c",
747 "src/math/sigmoid-neon-rr1-p5-nr2recps.c",
748 "src/math/sigmoid-neon-rr2-lut2048-p1-nr2recps.c",
749 "src/math/sigmoid-neon-rr2-lut64-p2-nr2recps.c",
750 "src/math/sigmoid-neon-rr2-p5-nr2recps.c",
Marat Dukhanfe7acb62020-03-09 19:30:05 -0700[diff] [blame]751 "src/requantization/precise-neon.c",
752 "src/requantization/fp32-neon.c",
753 "src/requantization/q31-neon.c",
754 "src/requantization/gemmlowp-neon.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]755]
756
757NEONFMA_UKERNELS = [
Marat Dukhan660fd192020-03-10 04:55:30 -0700[diff] [blame]758 "src/f32-ibilinear/gen/neonfma-c4.c",
759 "src/f32-ibilinear/gen/neonfma-c8.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]760 "src/f32-igemm/gen/1x8-minmax-neonfma-dup-ld64.c",
761 "src/f32-igemm/gen/4x8-minmax-neonfma-dup-ld128.c",
762 "src/f32-igemm/gen/4x8-minmax-neonfma-dup-ld64.c",
763 "src/f32-igemm/gen/6x8-minmax-neonfma-dup-ld64.c",
764 "src/f32-igemm/gen/6x8-minmax-neonfma-dup-ld128.c",
765 "src/f32-igemm/gen/1x8s4-minmax-neonfma.c",
766 "src/f32-igemm/gen/4x8s4-minmax-neonfma.c",
767 "src/f32-igemm/gen/6x8s4-minmax-neonfma.c",
768 "src/f32-igemm/gen/8x8s4-minmax-neonfma.c",
Marat Dukhanf5425ea2020-04-24 01:46:00 -0700[diff] [blame]769 "src/f32-dwconv/gen/up4x4-minmax-neonfma.c",
770 "src/f32-dwconv/gen/up4x4-minmax-neonfma-acc2.c",
771 "src/f32-dwconv/gen/up8x4-minmax-neonfma.c",
772 "src/f32-dwconv/gen/up8x4-minmax-neonfma-acc2.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]773 "src/f32-dwconv/gen/up4x9-minmax-neonfma.c",
774 "src/f32-dwconv/gen/up4x9-minmax-neonfma-acc2.c",
775 "src/f32-dwconv/gen/up8x9-minmax-neonfma.c",
776 "src/f32-dwconv/gen/up8x9-minmax-neonfma-acc2.c",
Marat Dukhanf5425ea2020-04-24 01:46:00 -0700[diff] [blame]777 "src/f32-dwconv/gen/up4x25-minmax-neonfma.c",
778 "src/f32-dwconv/gen/up4x25-minmax-neonfma-acc2.c",
779 "src/f32-dwconv/gen/up8x25-minmax-neonfma.c",
780 "src/f32-dwconv/gen/up8x25-minmax-neonfma-acc2.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]781 "src/f32-gemm/gen/1x8-minmax-neonfma-dup-ld64.c",
782 "src/f32-gemm/gen/4x8-minmax-neonfma-dup-ld128.c",
783 "src/f32-gemm/gen/4x8-minmax-neonfma-dup-ld64.c",
784 "src/f32-gemm/gen/6x8-minmax-neonfma-dup-ld64.c",
785 "src/f32-gemm/gen/6x8-minmax-neonfma-dup-ld128.c",
786 "src/f32-gemm/gen/1x8s4-minmax-neonfma.c",
787 "src/f32-gemm/gen/4x8s4-minmax-neonfma.c",
788 "src/f32-gemm/gen/6x8s4-minmax-neonfma.c",
789 "src/f32-gemm/gen/8x8s4-minmax-neonfma.c",
790 "src/f32-gemm/gen-inc/1x8inc-minmax-neonfma-dup-ld64.c",
791 "src/f32-gemm/gen-inc/4x8inc-minmax-neonfma-dup-ld128.c",
792 "src/f32-gemm/gen-inc/4x8inc-minmax-neonfma-dup-ld64.c",
793 "src/f32-gemm/gen-inc/6x8inc-minmax-neonfma-dup-ld64.c",
794 "src/f32-gemm/gen-inc/6x8inc-minmax-neonfma-dup-ld128.c",
795 "src/f32-gemm/gen-inc/1x8s4inc-minmax-neonfma.c",
796 "src/f32-gemm/gen-inc/4x8s4inc-minmax-neonfma.c",
797 "src/f32-gemm/gen-inc/6x8s4inc-minmax-neonfma.c",
798 "src/f32-gemm/gen-inc/8x8s4inc-minmax-neonfma.c",
Marat Dukhan662faa02019-12-09 22:48:16 -0800[diff] [blame]799 "src/f32-hswish/gen/neonfma-x4.c",
800 "src/f32-hswish/gen/neonfma-x8.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]801 "src/f32-ppmm/gen/4x8-minmax-neonfma.c",
802 "src/f32-ppmm/gen/8x8-minmax-neonfma.c",
Marat Dukhan8137e4c2020-01-25 12:56:58 -0800[diff] [blame]803 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x4.c",
804 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x8.c",
805 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x8-acc2.c",
806 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x12.c",
807 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x12-acc2.c",
808 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x12-acc3.c",
809 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x16.c",
810 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x16-acc2.c",
811 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x16-acc4.c",
812 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x20.c",
813 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x20-acc2.c",
814 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x20-acc5.c",
815 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x4.c",
816 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x8.c",
817 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x8-acc2.c",
818 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x12.c",
819 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x12-acc2.c",
820 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x12-acc3.c",
821 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x16.c",
822 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x16-acc2.c",
823 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x16-acc4.c",
824 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x20.c",
825 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x20-acc2.c",
826 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x20-acc5.c",
Marat Dukhan4a24a582020-01-06 13:30:00 -0800[diff] [blame]827 "src/f32-sigmoid/gen/neonfma-rr1-p5-nr2fma-x4.c",
828 "src/f32-sigmoid/gen/neonfma-rr1-p5-nr2fma-x8.c",
829 "src/f32-sigmoid/gen/neonfma-rr1-p5-nr2fma-x12.c",
830 "src/f32-sigmoid/gen/neonfma-rr1-p5-nr2fma-x16.c",
831 "src/f32-sigmoid/gen/neonfma-rr1-p5-nr2fma-x20.c",
832 "src/f32-sigmoid/gen/neonfma-rr1-p5-nr2fma-x24.c",
833 "src/f32-sigmoid/gen/neonfma-rr1-p5-nr1recps1fma-x4.c",
834 "src/f32-sigmoid/gen/neonfma-rr1-p5-nr1recps1fma-x8.c",
835 "src/f32-sigmoid/gen/neonfma-rr1-p5-nr1recps1fma-x12.c",
836 "src/f32-sigmoid/gen/neonfma-rr1-p5-nr1recps1fma-x16.c",
837 "src/f32-sigmoid/gen/neonfma-rr1-p5-nr1recps1fma-x20.c",
838 "src/f32-sigmoid/gen/neonfma-rr1-p5-nr1recps1fma-x24.c",
839 "src/f32-sigmoid/gen/neonfma-rr1-p5-nr2recps-x4.c",
840 "src/f32-sigmoid/gen/neonfma-rr1-p5-nr2recps-x8.c",
841 "src/f32-sigmoid/gen/neonfma-rr1-p5-nr2recps-x12.c",
842 "src/f32-sigmoid/gen/neonfma-rr1-p5-nr2recps-x16.c",
843 "src/f32-sigmoid/gen/neonfma-rr1-p5-nr2recps-x20.c",
844 "src/f32-sigmoid/gen/neonfma-rr1-p5-nr2recps-x24.c",
845 "src/f32-sigmoid/gen/neonfma-rr1-lut64-p2-nr2fma-x4.c",
846 "src/f32-sigmoid/gen/neonfma-rr1-lut64-p2-nr2fma-x8.c",
847 "src/f32-sigmoid/gen/neonfma-rr1-lut64-p2-nr2fma-x12.c",
848 "src/f32-sigmoid/gen/neonfma-rr1-lut64-p2-nr2fma-x16.c",
849 "src/f32-sigmoid/gen/neonfma-rr1-lut64-p2-nr2fma-x20.c",
850 "src/f32-sigmoid/gen/neonfma-rr1-lut64-p2-nr2fma-x24.c",
851 "src/f32-sigmoid/gen/neonfma-rr1-lut64-p2-nr1recps1fma-x4.c",
852 "src/f32-sigmoid/gen/neonfma-rr1-lut64-p2-nr1recps1fma-x8.c",
853 "src/f32-sigmoid/gen/neonfma-rr1-lut64-p2-nr1recps1fma-x12.c",
854 "src/f32-sigmoid/gen/neonfma-rr1-lut64-p2-nr1recps1fma-x16.c",
855 "src/f32-sigmoid/gen/neonfma-rr1-lut64-p2-nr1recps1fma-x20.c",
856 "src/f32-sigmoid/gen/neonfma-rr1-lut64-p2-nr1recps1fma-x24.c",
857 "src/f32-sigmoid/gen/neonfma-rr1-lut64-p2-nr2recps-x4.c",
858 "src/f32-sigmoid/gen/neonfma-rr1-lut64-p2-nr2recps-x8.c",
859 "src/f32-sigmoid/gen/neonfma-rr1-lut64-p2-nr2recps-x12.c",
860 "src/f32-sigmoid/gen/neonfma-rr1-lut64-p2-nr2recps-x16.c",
861 "src/f32-sigmoid/gen/neonfma-rr1-lut64-p2-nr2recps-x20.c",
862 "src/f32-sigmoid/gen/neonfma-rr1-lut64-p2-nr2recps-x24.c",
863 "src/f32-sigmoid/gen/neonfma-rr1-lut2048-p1-nr2fma-x4.c",
864 "src/f32-sigmoid/gen/neonfma-rr1-lut2048-p1-nr2fma-x8.c",
865 "src/f32-sigmoid/gen/neonfma-rr1-lut2048-p1-nr2fma-x12.c",
866 "src/f32-sigmoid/gen/neonfma-rr1-lut2048-p1-nr2fma-x16.c",
867 "src/f32-sigmoid/gen/neonfma-rr1-lut2048-p1-nr2fma-x20.c",
868 "src/f32-sigmoid/gen/neonfma-rr1-lut2048-p1-nr2fma-x24.c",
869 "src/f32-sigmoid/gen/neonfma-rr1-lut2048-p1-nr1recps1fma-x4.c",
870 "src/f32-sigmoid/gen/neonfma-rr1-lut2048-p1-nr1recps1fma-x8.c",
871 "src/f32-sigmoid/gen/neonfma-rr1-lut2048-p1-nr1recps1fma-x12.c",
872 "src/f32-sigmoid/gen/neonfma-rr1-lut2048-p1-nr1recps1fma-x16.c",
873 "src/f32-sigmoid/gen/neonfma-rr1-lut2048-p1-nr1recps1fma-x20.c",
874 "src/f32-sigmoid/gen/neonfma-rr1-lut2048-p1-nr1recps1fma-x24.c",
875 "src/f32-sigmoid/gen/neonfma-rr1-lut2048-p1-nr2recps-x4.c",
876 "src/f32-sigmoid/gen/neonfma-rr1-lut2048-p1-nr2recps-x8.c",
877 "src/f32-sigmoid/gen/neonfma-rr1-lut2048-p1-nr2recps-x12.c",
878 "src/f32-sigmoid/gen/neonfma-rr1-lut2048-p1-nr2recps-x16.c",
879 "src/f32-sigmoid/gen/neonfma-rr1-lut2048-p1-nr2recps-x20.c",
880 "src/f32-sigmoid/gen/neonfma-rr1-lut2048-p1-nr2recps-x24.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]881 "src/f32-vmulcaddc/gen/c4-minmax-neonfma-2x.c",
882 "src/f32-vmulcaddc/gen/c8-minmax-neonfma-2x.c",
Marat Dukhan797a8fe2019-11-14 20:21:57 -0800[diff] [blame]883 "src/math/exp-neonfma-lut64-p2.c",
884 "src/math/exp-neonfma-p5.c",
Marat Dukhan189ae802019-11-26 11:28:44 -0800[diff] [blame]885 "src/math/expminus-neonfma-lut2048-p1.c",
886 "src/math/expminus-neonfma-lut64-p2.c",
Marat Dukhan346a9e52019-11-15 09:06:30 -0800[diff] [blame]887 "src/math/expminus-neonfma-p5.c",
Marat Dukhan77221d32020-01-06 10:04:39 -0800[diff] [blame]888 "src/math/sigmoid-neonfma-rr1-lut2048-p1-nr1recps1fma.c",
889 "src/math/sigmoid-neonfma-rr1-lut2048-p1-nr2fma.c",
890 "src/math/sigmoid-neonfma-rr1-lut2048-p1-nr2recps.c",
891 "src/math/sigmoid-neonfma-rr1-lut64-p2-nr1recps1fma.c",
892 "src/math/sigmoid-neonfma-rr1-lut64-p2-nr2fma.c",
893 "src/math/sigmoid-neonfma-rr1-lut64-p2-nr2recps.c",
894 "src/math/sigmoid-neonfma-rr1-p5-nr1recps1fma.c",
895 "src/math/sigmoid-neonfma-rr1-p5-nr2fma.c",
896 "src/math/sigmoid-neonfma-rr1-p5-nr2recps.c",
897 "src/math/sigmoid-neonfma-rr2-lut2048-p1-nr1recps1fma.c",
898 "src/math/sigmoid-neonfma-rr2-lut2048-p1-nr2fma.c",
899 "src/math/sigmoid-neonfma-rr2-lut2048-p1-nr2recps.c",
900 "src/math/sigmoid-neonfma-rr2-lut64-p2-nr1recps1fma.c",
901 "src/math/sigmoid-neonfma-rr2-lut64-p2-nr2fma.c",
902 "src/math/sigmoid-neonfma-rr2-lut64-p2-nr2recps.c",
903 "src/math/sigmoid-neonfma-rr2-p5-nr1recps1fma.c",
904 "src/math/sigmoid-neonfma-rr2-p5-nr2fma.c",
905 "src/math/sigmoid-neonfma-rr2-p5-nr2recps.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]906]
907
908AARCH64_NEONFMA_UKERNELS = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]909 "src/f32-vbinary/gen/vdiv-minmax-neon-x4.c",
910 "src/f32-vbinary/gen/vdiv-minmax-neon-x8.c",
911 "src/f32-vbinary/gen/vdivc-minmax-neon-x4.c",
912 "src/f32-vbinary/gen/vdivc-minmax-neon-x8.c",
913 "src/f32-vbinary/gen/vrdivc-minmax-neon-x4.c",
914 "src/f32-vbinary/gen/vrdivc-minmax-neon-x8.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]915 "src/f32-gemm/gen/1x8-minmax-neonfma-lane-ld64.c",
916 "src/f32-gemm/gen/4x2-minmax-neonfma-lane-ld64.c",
917 "src/f32-gemm/gen/4x8-minmax-neonfma-lane-ld128.c",
918 "src/f32-gemm/gen/4x8-minmax-neonfma-lane-ld64.c",
919 "src/f32-gemm/gen/5x8-minmax-neonfma-lane-ld64.c",
920 "src/f32-gemm/gen/6x8-minmax-neonfma-lane-ld64.c",
921 "src/f32-gemm/gen/6x8-minmax-neonfma-lane-ld128.c",
922 "src/f32-gemm/gen-inc/1x8inc-minmax-neonfma-lane-ld64.c",
923 "src/f32-gemm/gen-inc/4x8inc-minmax-neonfma-lane-ld128.c",
924 "src/f32-gemm/gen-inc/4x8inc-minmax-neonfma-lane-ld64.c",
925 "src/f32-gemm/gen-inc/5x8inc-minmax-neonfma-lane-ld64.c",
926 "src/f32-gemm/gen-inc/6x8inc-minmax-neonfma-lane-ld64.c",
927 "src/f32-gemm/gen-inc/6x8inc-minmax-neonfma-lane-ld128.c",
928 "src/f32-igemm/gen/1x8-minmax-neonfma-lane-ld64.c",
929 "src/f32-igemm/gen/4x2-minmax-neonfma-lane-ld64.c",
930 "src/f32-igemm/gen/4x4-minmax-neonfma-lane-ld64.c",
931 "src/f32-igemm/gen/4x8-minmax-neonfma-lane-ld128.c",
932 "src/f32-igemm/gen/4x8-minmax-neonfma-lane-ld64.c",
933 "src/f32-igemm/gen/6x8-minmax-neonfma-lane-ld64.c",
934 "src/f32-igemm/gen/6x8-minmax-neonfma-lane-ld128.c",
Marat Dukhan56b10cd2020-05-18 09:35:49 -0700[diff] [blame]935 "src/f32-conv-hwc/gen/3x3s2p0p1c3x4-neonfma-2x1.c",
936 "src/f32-conv-hwc/gen/3x3s2p0p1c3x8-neonfma-2x1.c",
Marat Dukhance7a3f82020-05-17 21:46:44 -0700[diff] [blame]937 "src/f32-conv-hwc/gen/3x3s2p0p1c3x4-neonfma-2x2.c",
938 "src/f32-conv-hwc/gen/3x3s2p0p1c3x8-neonfma-2x2.c",
Marat Dukhan56b10cd2020-05-18 09:35:49 -0700[diff] [blame]939 "src/f32-conv-hwc/gen/3x3s2p1c3x4-neonfma-2x1.c",
940 "src/f32-conv-hwc/gen/3x3s2p1c3x8-neonfma-2x1.c",
Marat Dukhance7a3f82020-05-17 21:46:44 -0700[diff] [blame]941 "src/f32-conv-hwc/gen/3x3s2p1c3x4-neonfma-2x2.c",
942 "src/f32-conv-hwc/gen/3x3s2p1c3x8-neonfma-2x2.c",
Marat Dukhan1f29b802020-05-15 23:46:39 -0700[diff] [blame]943 "src/f32-conv-hwc2chw/3x3s2p1c3x4-neonfma-2x2.c",
944 "src/f32-dwconv-chw/3x3p1-neonfma.c",
945 "src/f32-dwconv-chw/5x5p2-neonfma.c",
946 "src/f32-dwconv-chw/3x3s2p1-neonfma.c",
947 "src/f32-dwconv-chw/5x5s2p2-neonfma.c",
Marat Dukhan4a24a582020-01-06 13:30:00 -0800[diff] [blame]948 "src/f32-sigmoid/gen/neonfma-rr1-p5-div-x4.c",
949 "src/f32-sigmoid/gen/neonfma-rr1-p5-div-x8.c",
950 "src/f32-sigmoid/gen/neonfma-rr1-p5-div-x12.c",
951 "src/f32-sigmoid/gen/neonfma-rr1-p5-div-x16.c",
952 "src/f32-sigmoid/gen/neonfma-rr1-p5-div-x20.c",
953 "src/f32-sigmoid/gen/neonfma-rr1-p5-div-x24.c",
954 "src/f32-sigmoid/gen/neonfma-rr1-lut64-p2-div-x4.c",
955 "src/f32-sigmoid/gen/neonfma-rr1-lut64-p2-div-x8.c",
956 "src/f32-sigmoid/gen/neonfma-rr1-lut64-p2-div-x12.c",
957 "src/f32-sigmoid/gen/neonfma-rr1-lut64-p2-div-x16.c",
958 "src/f32-sigmoid/gen/neonfma-rr1-lut64-p2-div-x20.c",
959 "src/f32-sigmoid/gen/neonfma-rr1-lut64-p2-div-x24.c",
960 "src/f32-sigmoid/gen/neonfma-rr1-lut2048-p1-div-x4.c",
961 "src/f32-sigmoid/gen/neonfma-rr1-lut2048-p1-div-x8.c",
962 "src/f32-sigmoid/gen/neonfma-rr1-lut2048-p1-div-x12.c",
963 "src/f32-sigmoid/gen/neonfma-rr1-lut2048-p1-div-x16.c",
964 "src/f32-sigmoid/gen/neonfma-rr1-lut2048-p1-div-x20.c",
965 "src/f32-sigmoid/gen/neonfma-rr1-lut2048-p1-div-x24.c",
Marat Dukhan355ab432020-04-09 19:01:52 -0700[diff] [blame]966 "src/f32-spmm/gen/12x1-minmax-neonfma.c",
967 "src/f32-spmm/gen/12x2-minmax-neonfma.c",
968 "src/f32-spmm/gen/12x4-minmax-neonfma.c",
969 "src/f32-spmm/gen/16x1-minmax-neonfma-pipelined.c",
970 "src/f32-spmm/gen/16x1-minmax-neonfma-unroll2.c",
971 "src/f32-spmm/gen/16x1-minmax-neonfma.c",
972 "src/f32-spmm/gen/16x2-minmax-neonfma.c",
973 "src/f32-spmm/gen/16x4-minmax-neonfma.c",
974 "src/f32-spmm/gen/4x1-minmax-neonfma-pipelined.c",
975 "src/f32-spmm/gen/4x1-minmax-neonfma-unroll2.c",
976 "src/f32-spmm/gen/4x1-minmax-neonfma.c",
977 "src/f32-spmm/gen/4x2-minmax-neonfma.c",
978 "src/f32-spmm/gen/4x4-minmax-neonfma.c",
979 "src/f32-spmm/gen/8x1-minmax-neonfma-pipelined.c",
980 "src/f32-spmm/gen/8x1-minmax-neonfma-unroll2.c",
981 "src/f32-spmm/gen/8x1-minmax-neonfma.c",
982 "src/f32-spmm/gen/8x2-minmax-neonfma.c",
983 "src/f32-spmm/gen/8x4-minmax-neonfma.c",
Marat Dukhan77221d32020-01-06 10:04:39 -0800[diff] [blame]984 "src/math/sigmoid-neonfma-rr1-lut2048-p1-div.c",
985 "src/math/sigmoid-neonfma-rr1-lut64-p2-div.c",
986 "src/math/sigmoid-neonfma-rr1-p5-div.c",
987 "src/math/sigmoid-neonfma-rr2-lut2048-p1-div.c",
988 "src/math/sigmoid-neonfma-rr2-lut64-p2-div.c",
989 "src/math/sigmoid-neonfma-rr2-p5-div.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]990]
991
Marat Dukhan8853b822020-05-07 12:19:01 -0700[diff] [blame]992NEONV8_UKERNELS = [
993 "src/math/roundne-neonv8.c",
Marat Dukhanc9852ba2020-05-13 17:21:29 -0700[diff] [blame]994 "src/math/roundd-neonv8.c",
995 "src/math/roundu-neonv8.c",
Marat Dukhan2dbb9442020-05-12 20:43:43 -0700[diff] [blame]996 "src/math/roundz-neonv8.c",
Marat Dukhan8853b822020-05-07 12:19:01 -0700[diff] [blame]997]
998
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]999AARCH64_NEONFP16ARITH_UKERNELS = [
Frank Barchardb1966592020-05-12 13:47:06 -0700[diff] [blame]1000 "src/f16-clamp/gen/neonfp16arith-x16.c",
1001 "src/f16-clamp/gen/neonfp16arith-x8.c",
Frank Barchard0bb49a72020-06-04 11:35:11 -0700[diff] [blame]1002 "src/f16-gavgpool/7p7x-minmax-neonfp16arith-c8.c",
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Frank Barchardb1966592020-05-12 13:47:06 -0700[diff] [blame]1004 "src/f16-hswish/gen/neonfp16arith-x16.c",
1005 "src/f16-hswish/gen/neonfp16arith-x8.c",
1006 "src/f16-prelu/gen/neonfp16arith-2x16.c",
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Frank Barchardd793f6c2020-05-08 13:37:43 -0700[diff] [blame]1008 "src/f16-vbinary/gen/vaddc-minmax-neonfp16arith-x16.c",
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1016 "src/f16-vbinary/gen/vmaxc-neonfp16arith-x16.c",
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1021 "src/f16-vbinary/gen/vminc-neonfp16arith-x8.c",
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1023 "src/f16-vbinary/gen/vmin-neonfp16arith-x8.c",
1024 "src/f16-vbinary/gen/vmulc-minmax-neonfp16arith-x16.c",
1025 "src/f16-vbinary/gen/vmulc-minmax-neonfp16arith-x8.c",
1026 "src/f16-vbinary/gen/vmul-minmax-neonfp16arith-x16.c",
1027 "src/f16-vbinary/gen/vmul-minmax-neonfp16arith-x8.c",
1028 "src/f16-vbinary/gen/vrdivc-minmax-neonfp16arith-x16.c",
1029 "src/f16-vbinary/gen/vrdivc-minmax-neonfp16arith-x8.c",
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1031 "src/f16-vbinary/gen/vrsubc-minmax-neonfp16arith-x8.c",
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1034 "src/f16-vbinary/gen/vsub-minmax-neonfp16arith-x16.c",
1035 "src/f16-vbinary/gen/vsub-minmax-neonfp16arith-x8.c",
Frank Barchard2a1049c2020-06-03 02:31:27 -0700[diff] [blame]1036 "src/f16-vmulcaddc/gen/c16-minmax-neonfp16arith-2x.c",
1037 "src/f16-vmulcaddc/gen/c8-minmax-neonfp16arith-2x.c",
Frank Barchard83ea9392020-04-20 20:15:14 -0700[diff] [blame]1038 "src/f16-gemm/gen/1x8-minmax-neonfp16arith-ld64.c",
1039 "src/f16-gemm/gen/4x8-minmax-neonfp16arith-ld64.c",
1040 "src/f16-gemm/gen/6x8-minmax-neonfp16arith-ld64.c",
1041 "src/f16-gemm/gen/8x8-minmax-neonfp16arith-ld64.c",
1042 "src/f16-gemm/gen-inc/1x8inc-minmax-neonfp16arith-ld64.c",
1043 "src/f16-gemm/gen-inc/4x8inc-minmax-neonfp16arith-ld64.c",
1044 "src/f16-gemm/gen-inc/6x8inc-minmax-neonfp16arith-ld64.c",
1045 "src/f16-gemm/gen-inc/8x8inc-minmax-neonfp16arith-ld64.c",
Frank Barchardb0e4fae2020-05-04 15:27:51 -0700[diff] [blame]1046 "src/f16-igemm/gen/1x8-minmax-neonfp16arith-ld64.c",
1047 "src/f16-igemm/gen/4x8-minmax-neonfp16arith-ld64.c",
1048 "src/f16-igemm/gen/6x8-minmax-neonfp16arith-ld64.c",
1049 "src/f16-igemm/gen/8x8-minmax-neonfp16arith-ld64.c",
Frank Barchard3f9f99f2020-05-06 01:12:04 -0700[diff] [blame]1050 "src/f16-gemm/gen/1x16-minmax-neonfp16arith-ld64.c",
1051 "src/f16-gemm/gen/4x16-minmax-neonfp16arith-ld64.c",
1052 "src/f16-gemm/gen/6x16-minmax-neonfp16arith-ld64.c",
1053 "src/f16-gemm/gen/8x16-minmax-neonfp16arith-ld64.c",
1054 "src/f16-gemm/gen-inc/1x16inc-minmax-neonfp16arith-ld64.c",
1055 "src/f16-gemm/gen-inc/4x16inc-minmax-neonfp16arith-ld64.c",
1056 "src/f16-gemm/gen-inc/6x16inc-minmax-neonfp16arith-ld64.c",
1057 "src/f16-gemm/gen-inc/8x16inc-minmax-neonfp16arith-ld64.c",
1058 "src/f16-igemm/gen/1x16-minmax-neonfp16arith-ld64.c",
1059 "src/f16-igemm/gen/4x16-minmax-neonfp16arith-ld64.c",
1060 "src/f16-igemm/gen/6x16-minmax-neonfp16arith-ld64.c",
1061 "src/f16-igemm/gen/8x16-minmax-neonfp16arith-ld64.c",
Marat Dukhan355ab432020-04-09 19:01:52 -0700[diff] [blame]1062 "src/f16-spmm/gen/8x1-minmax-neonfp16arith.c",
1063 "src/f16-spmm/gen/8x1-minmax-neonfp16arith-unroll2.c",
1064 "src/f16-spmm/gen/16x1-minmax-neonfp16arith.c",
1065 "src/f16-spmm/gen/16x1-minmax-neonfp16arith-unroll2.c",
1066 "src/f16-spmm/gen/24x1-minmax-neonfp16arith.c",
1067 "src/f16-spmm/gen/24x1-minmax-neonfp16arith-unroll2.c",
1068 "src/f16-spmm/gen/32x1-minmax-neonfp16arith.c",
1069 "src/f16-spmm/gen/32x1-minmax-neonfp16arith-unroll2.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]1070]
1071
1072SSE_UKERNELS = [
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]1073 "src/f32-avgpool/9p8x-minmax-sse-c4.c",
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Marat Dukhan5c5fa962020-03-10 18:38:33 -0700[diff] [blame]1075 "src/f32-clamp/gen/sse-x4.c",
1076 "src/f32-clamp/gen/sse-x8.c",
Marat Dukhan1f29b802020-05-15 23:46:39 -0700[diff] [blame]1077 "src/f32-dwconv-chw/3x3p1-sse.c",
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Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]1079 "src/f32-dwconv/gen/up4x25-minmax-sse-acc2.c",
1080 "src/f32-dwconv/gen/up4x25-minmax-sse.c",
1081 "src/f32-dwconv/gen/up4x4-minmax-sse-acc2.c",
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1083 "src/f32-dwconv/gen/up4x9-minmax-sse-acc2.c",
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1085 "src/f32-dwconv/gen/up8x25-minmax-sse-acc2.c",
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1089 "src/f32-dwconv/gen/up8x9-minmax-sse-acc2.c",
1090 "src/f32-dwconv/gen/up8x9-minmax-sse.c",
Marat Dukhan1f29b802020-05-15 23:46:39 -0700[diff] [blame]1091 "src/f32-gavgpool-cw/sse-x4.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]1092 "src/f32-gavgpool/7p7x-minmax-sse-c4.c",
1093 "src/f32-gavgpool/7x-minmax-sse-c4.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]1094 "src/f32-gemm/gen/1x8-minmax-sse-dup.c",
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1096 "src/f32-gemm/gen/1x8s4-minmax-sse.c",
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1098 "src/f32-gemm/gen/4x8-minmax-sse-dup.c",
1099 "src/f32-gemm/gen/4x8-minmax-sse-load1.c",
1100 "src/f32-gemm/gen/4x8s4-minmax-sse.c",
1101 "src/f32-gemm/gen-inc/1x8inc-minmax-sse-dup.c",
1102 "src/f32-gemm/gen-inc/1x8inc-minmax-sse-load1.c",
1103 "src/f32-gemm/gen-inc/1x8s4inc-minmax-sse.c",
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1105 "src/f32-gemm/gen-inc/4x8inc-minmax-sse-load1.c",
1106 "src/f32-gemm/gen-inc/4x8s4inc-minmax-sse.c",
Marat Dukhan662faa02019-12-09 22:48:16 -0800[diff] [blame]1107 "src/f32-hswish/gen/sse-x4.c",
1108 "src/f32-hswish/gen/sse-x8.c",
Marat Dukhan660fd192020-03-10 04:55:30 -0700[diff] [blame]1109 "src/f32-ibilinear/gen/sse-c4.c",
1110 "src/f32-ibilinear/gen/sse-c8.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]1111 "src/f32-igemm/gen/1x8-minmax-sse-dup.c",
1112 "src/f32-igemm/gen/1x8-minmax-sse-load1.c",
1113 "src/f32-igemm/gen/1x8s4-minmax-sse.c",
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1116 "src/f32-igemm/gen/4x8-minmax-sse-load1.c",
1117 "src/f32-igemm/gen/4x8s4-minmax-sse.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]1118 "src/f32-maxpool/9p8x-minmax-sse-c4.c",
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1120 "src/f32-pavgpool/9x-minmax-sse-c4.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]1121 "src/f32-ppmm/gen/4x8-minmax-sse.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]1122 "src/f32-rmax/sse.c",
Marat Dukhan355ab432020-04-09 19:01:52 -0700[diff] [blame]1123 "src/f32-spmm/gen/4x1-minmax-sse.c",
1124 "src/f32-spmm/gen/8x1-minmax-sse.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]1125 "src/f32-vbinary/gen/vadd-minmax-sse-x4.c",
1126 "src/f32-vbinary/gen/vadd-minmax-sse-x8.c",
1127 "src/f32-vbinary/gen/vaddc-minmax-sse-x4.c",
1128 "src/f32-vbinary/gen/vaddc-minmax-sse-x8.c",
1129 "src/f32-vbinary/gen/vdiv-minmax-sse-x4.c",
1130 "src/f32-vbinary/gen/vdiv-minmax-sse-x8.c",
1131 "src/f32-vbinary/gen/vdivc-minmax-sse-x4.c",
1132 "src/f32-vbinary/gen/vdivc-minmax-sse-x8.c",
Marat Dukhan403b7d42019-12-05 12:49:11 -0800[diff] [blame]1133 "src/f32-vbinary/gen/vmax-sse-x4.c",
1134 "src/f32-vbinary/gen/vmax-sse-x8.c",
1135 "src/f32-vbinary/gen/vmaxc-sse-x4.c",
1136 "src/f32-vbinary/gen/vmaxc-sse-x8.c",
1137 "src/f32-vbinary/gen/vmin-sse-x4.c",
1138 "src/f32-vbinary/gen/vmin-sse-x8.c",
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1140 "src/f32-vbinary/gen/vminc-sse-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]1141 "src/f32-vbinary/gen/vmul-minmax-sse-x4.c",
1142 "src/f32-vbinary/gen/vmul-minmax-sse-x8.c",
1143 "src/f32-vbinary/gen/vmulc-minmax-sse-x4.c",
1144 "src/f32-vbinary/gen/vmulc-minmax-sse-x8.c",
1145 "src/f32-vbinary/gen/vrdivc-minmax-sse-x4.c",
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1147 "src/f32-vbinary/gen/vrsubc-minmax-sse-x4.c",
1148 "src/f32-vbinary/gen/vrsubc-minmax-sse-x8.c",
1149 "src/f32-vbinary/gen/vsub-minmax-sse-x4.c",
1150 "src/f32-vbinary/gen/vsub-minmax-sse-x8.c",
1151 "src/f32-vbinary/gen/vsubc-minmax-sse-x4.c",
1152 "src/f32-vbinary/gen/vsubc-minmax-sse-x8.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]1153 "src/f32-vmulcaddc/gen/c4-minmax-sse-2x.c",
1154 "src/f32-vmulcaddc/gen/c8-minmax-sse-2x.c",
Marat Dukhan3bb3bfc2020-05-19 17:42:46 -0700[diff] [blame]1155 "src/x32-fill/sse.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]1156 "src/x32-packx/x4-sse.c",
Marat Dukhan63523d42020-05-22 17:07:33 -0700[diff] [blame]1157 "src/x32-pad/sse.c",
Marat Dukhan075088a2020-05-12 19:42:12 -0700[diff] [blame]1158 "src/math/roundne-sse-addsub.c",
Marat Dukhanc9852ba2020-05-13 17:21:29 -0700[diff] [blame]1159 "src/math/roundd-sse-addsub.c",
1160 "src/math/roundu-sse-addsub.c",
Marat Dukhan2dbb9442020-05-12 20:43:43 -0700[diff] [blame]1161 "src/math/roundz-sse-addsub.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]1162]
1163
1164SSE2_UKERNELS = [
Marat Dukhan329da642019-11-19 21:44:39 -0800[diff] [blame]1165 "src/f32-argmaxpool/9p8x-sse2-c4.c",
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Marat Dukhan40a672f2019-11-25 03:08:22 -0800[diff] [blame]1168 "src/f32-prelu/gen/sse2-2x4.c",
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Marat Dukhanb39689d2020-01-24 13:32:20 -0800[diff] [blame]1170 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x4.c",
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1177 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x16-acc2.c",
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Marat Dukhan8d3c07e2020-01-02 01:20:59 -0800[diff] [blame]1182 "src/f32-sigmoid/gen/sse2-p5-div-x4.c",
Marat Dukhan40a672f2019-11-25 03:08:22 -0800[diff] [blame]1183 "src/f32-sigmoid/gen/sse2-p5-div-x8.c",
Marat Dukhan8d3c07e2020-01-02 01:20:59 -0800[diff] [blame]1184 "src/f32-sigmoid/gen/sse2-p5-div-x12.c",
Marat Dukhan40a672f2019-11-25 03:08:22 -0800[diff] [blame]1185 "src/f32-sigmoid/gen/sse2-p5-div-x16.c",
Marat Dukhan8d3c07e2020-01-02 01:20:59 -0800[diff] [blame]1186 "src/f32-sigmoid/gen/sse2-p5-div-x20.c",
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Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]1188 "src/q8-avgpool/9p8x-minmax-sse2-c8.c",
1189 "src/q8-avgpool/9x-minmax-sse2-c8.c",
Marat Dukhande06f492020-04-09 00:19:31 -0700[diff] [blame]1190 "src/q8-igemm/4x4c2-minmax-sse2.c",
1191 "src/q8-dwconv/up8x9-minmax-sse2.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]1192 "src/q8-gavgpool/7p7x-minmax-sse2-c8.c",
1193 "src/q8-gavgpool/7x-minmax-sse2-c8.c",
Marat Dukhande06f492020-04-09 00:19:31 -0700[diff] [blame]1194 "src/q8-gemm/2x4c8-minmax-sse2.c",
1195 "src/q8-gemm/4x4c2-minmax-sse2.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]1196 "src/q8-vadd/minmax-sse2.c",
Marat Dukhan5c5fa962020-03-10 18:38:33 -0700[diff] [blame]1197 "src/u8-clamp/sse2-x64.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]1198 "src/u8-maxpool/9p8x-minmax-sse2-c16.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]1199 "src/u8-rmax/sse2.c",
Marat Dukhan57dccd82020-04-14 00:53:10 -0700[diff] [blame]1200 "src/x32-unpool/sse2.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]1201 "src/x32-zip/x2-sse2.c",
1202 "src/x32-zip/x3-sse2.c",
1203 "src/x32-zip/x4-sse2.c",
1204 "src/x32-zip/xm-sse2.c",
1205 "src/x8-zip/x2-sse2.c",
1206 "src/x8-zip/x3-sse2.c",
1207 "src/x8-zip/x4-sse2.c",
1208 "src/x8-zip/xm-sse2.c",
Marat Dukhanffd68402019-11-15 15:19:11 -0800[diff] [blame]1209 "src/math/exp-sse2-p5.c",
1210 "src/math/expminus-sse2-p5.c",
Marat Dukhan075088a2020-05-12 19:42:12 -0700[diff] [blame]1211 "src/math/roundne-sse2-cvt.c",
Marat Dukhanc9852ba2020-05-13 17:21:29 -0700[diff] [blame]1212 "src/math/roundd-sse2-cvt.c",
1213 "src/math/roundu-sse2-cvt.c",
Marat Dukhan2dbb9442020-05-12 20:43:43 -0700[diff] [blame]1214 "src/math/roundz-sse2-cvt.c",
Marat Dukhan80bafd22019-11-18 10:16:01 -0800[diff] [blame]1215 "src/math/sigmoid-sse2-p5-div.c",
Marat Dukhanfe7acb62020-03-09 19:30:05 -0700[diff] [blame]1216 "src/requantization/precise-sse2.c",
1217 "src/requantization/fp32-sse2.c",
1218 "src/requantization/q31-sse2.c",
1219 "src/requantization/gemmlowp-sse2.c",
1220]
1221
1222SSSE3_UKERNELS = [
1223 "src/requantization/precise-ssse3.c",
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1225 "src/requantization/gemmlowp-ssse3.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]1226]
1227
Marat Dukhan69c3f2c2019-11-06 12:30:01 -0800[diff] [blame]1228SSE41_UKERNELS = [
Marat Dukhan40a672f2019-11-25 03:08:22 -0800[diff] [blame]1229 "src/f32-prelu/gen/sse41-2x4.c",
1230 "src/f32-prelu/gen/sse41-2x8.c",
Marat Dukhan8d3c07e2020-01-02 01:20:59 -0800[diff] [blame]1231 "src/f32-sigmoid/gen/sse41-p5-div-x4.c",
Marat Dukhan40a672f2019-11-25 03:08:22 -0800[diff] [blame]1232 "src/f32-sigmoid/gen/sse41-p5-div-x8.c",
Marat Dukhan8d3c07e2020-01-02 01:20:59 -0800[diff] [blame]1233 "src/f32-sigmoid/gen/sse41-p5-div-x12.c",
Marat Dukhan40a672f2019-11-25 03:08:22 -0800[diff] [blame]1234 "src/f32-sigmoid/gen/sse41-p5-div-x16.c",
Marat Dukhan8d3c07e2020-01-02 01:20:59 -0800[diff] [blame]1235 "src/f32-sigmoid/gen/sse41-p5-div-x20.c",
1236 "src/f32-sigmoid/gen/sse41-p5-div-x24.c",
Marat Dukhan8853b822020-05-07 12:19:01 -0700[diff] [blame]1237 "src/math/roundne-sse41.c",
Marat Dukhanc9852ba2020-05-13 17:21:29 -0700[diff] [blame]1238 "src/math/roundd-sse41.c",
1239 "src/math/roundu-sse41.c",
Marat Dukhan2dbb9442020-05-12 20:43:43 -0700[diff] [blame]1240 "src/math/roundz-sse41.c",
Marat Dukhanfe7acb62020-03-09 19:30:05 -0700[diff] [blame]1241 "src/requantization/precise-sse4.c",
1242 "src/requantization/q31-sse4.c",
1243 "src/requantization/gemmlowp-sse4.c",
Marat Dukhan69c3f2c2019-11-06 12:30:01 -0800[diff] [blame]1244]
1245
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]1246AVX_UKERNELS = [
Marat Dukhan5c5fa962020-03-10 18:38:33 -0700[diff] [blame]1247 "src/f32-clamp/gen/avx-x8.c",
1248 "src/f32-clamp/gen/avx-x16.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]1249 "src/f32-dwconv/gen/up16x4-minmax-avx-acc2.c",
1250 "src/f32-dwconv/gen/up16x4-minmax-avx.c",
1251 "src/f32-dwconv/gen/up8x4-minmax-avx-acc2.c",
1252 "src/f32-dwconv/gen/up8x4-minmax-avx.c",
1253 "src/f32-dwconv/gen/up16x9-minmax-avx-acc2.c",
1254 "src/f32-dwconv/gen/up16x9-minmax-avx.c",
1255 "src/f32-dwconv/gen/up8x9-minmax-avx-acc2.c",
1256 "src/f32-dwconv/gen/up8x9-minmax-avx.c",
1257 "src/f32-dwconv/gen/up16x25-minmax-avx-acc2.c",
1258 "src/f32-dwconv/gen/up16x25-minmax-avx.c",
1259 "src/f32-dwconv/gen/up8x25-minmax-avx-acc2.c",
1260 "src/f32-dwconv/gen/up8x25-minmax-avx.c",
1261 "src/f32-gemm/gen/1x8-minmax-avx-broadcast.c",
1262 "src/f32-gemm/gen/4x8-minmax-avx-broadcast.c",
1263 "src/f32-gemm/gen/5x8-minmax-avx-broadcast.c",
1264 "src/f32-gemm/gen/6x8-minmax-avx-broadcast.c",
1265 "src/f32-gemm/gen/7x8-minmax-avx-broadcast.c",
1266 "src/f32-gemm/gen/1x16-minmax-avx-broadcast.c",
1267 "src/f32-gemm/gen/3x16-minmax-avx-broadcast.c",
1268 "src/f32-gemm/gen/4x16-minmax-avx-broadcast.c",
1269 "src/f32-gemm/gen/5x16-minmax-avx-broadcast.c",
1270 "src/f32-gemm/gen-inc/1x8inc-minmax-avx-broadcast.c",
1271 "src/f32-gemm/gen-inc/4x8inc-minmax-avx-broadcast.c",
1272 "src/f32-gemm/gen-inc/5x8inc-minmax-avx-broadcast.c",
1273 "src/f32-gemm/gen-inc/6x8inc-minmax-avx-broadcast.c",
1274 "src/f32-gemm/gen-inc/7x8inc-minmax-avx-broadcast.c",
1275 "src/f32-gemm/gen-inc/1x16inc-minmax-avx-broadcast.c",
1276 "src/f32-gemm/gen-inc/3x16inc-minmax-avx-broadcast.c",
1277 "src/f32-gemm/gen-inc/4x16inc-minmax-avx-broadcast.c",
1278 "src/f32-gemm/gen-inc/5x16inc-minmax-avx-broadcast.c",
Marat Dukhan662faa02019-12-09 22:48:16 -0800[diff] [blame]1279 "src/f32-hswish/gen/avx-x8.c",
1280 "src/f32-hswish/gen/avx-x16.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]1281 "src/f32-igemm/gen/1x8-minmax-avx-broadcast.c",
1282 "src/f32-igemm/gen/4x8-minmax-avx-broadcast.c",
1283 "src/f32-igemm/gen/5x8-minmax-avx-broadcast.c",
1284 "src/f32-igemm/gen/6x8-minmax-avx-broadcast.c",
1285 "src/f32-igemm/gen/7x8-minmax-avx-broadcast.c",
1286 "src/f32-igemm/gen/1x16-minmax-avx-broadcast.c",
1287 "src/f32-igemm/gen/3x16-minmax-avx-broadcast.c",
1288 "src/f32-igemm/gen/4x16-minmax-avx-broadcast.c",
1289 "src/f32-igemm/gen/5x16-minmax-avx-broadcast.c",
Marat Dukhan90eca0a2020-03-11 00:52:23 -0700[diff] [blame]1290 "src/f32-prelu/gen/avx-2x8.c",
1291 "src/f32-prelu/gen/avx-2x16.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]1292 "src/f32-rmax/avx.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]1293 "src/f32-vbinary/gen/vadd-minmax-avx-x8.c",
1294 "src/f32-vbinary/gen/vadd-minmax-avx-x16.c",
1295 "src/f32-vbinary/gen/vaddc-minmax-avx-x8.c",
1296 "src/f32-vbinary/gen/vaddc-minmax-avx-x16.c",
1297 "src/f32-vbinary/gen/vdiv-minmax-avx-x8.c",
1298 "src/f32-vbinary/gen/vdiv-minmax-avx-x16.c",
1299 "src/f32-vbinary/gen/vdivc-minmax-avx-x8.c",
1300 "src/f32-vbinary/gen/vdivc-minmax-avx-x16.c",
Marat Dukhan9a88efe2019-12-10 15:54:24 -0800[diff] [blame]1301 "src/f32-vbinary/gen/vmax-avx-x8.c",
1302 "src/f32-vbinary/gen/vmax-avx-x16.c",
1303 "src/f32-vbinary/gen/vmaxc-avx-x8.c",
1304 "src/f32-vbinary/gen/vmaxc-avx-x16.c",
1305 "src/f32-vbinary/gen/vmin-avx-x8.c",
1306 "src/f32-vbinary/gen/vmin-avx-x16.c",
1307 "src/f32-vbinary/gen/vminc-avx-x8.c",
1308 "src/f32-vbinary/gen/vminc-avx-x16.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]1309 "src/f32-vbinary/gen/vmul-minmax-avx-x8.c",
1310 "src/f32-vbinary/gen/vmul-minmax-avx-x16.c",
1311 "src/f32-vbinary/gen/vmulc-minmax-avx-x8.c",
1312 "src/f32-vbinary/gen/vmulc-minmax-avx-x16.c",
1313 "src/f32-vbinary/gen/vrdivc-minmax-avx-x8.c",
1314 "src/f32-vbinary/gen/vrdivc-minmax-avx-x16.c",
1315 "src/f32-vbinary/gen/vrsubc-minmax-avx-x8.c",
1316 "src/f32-vbinary/gen/vrsubc-minmax-avx-x16.c",
1317 "src/f32-vbinary/gen/vsub-minmax-avx-x8.c",
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1319 "src/f32-vbinary/gen/vsubc-minmax-avx-x8.c",
1320 "src/f32-vbinary/gen/vsubc-minmax-avx-x16.c",
Marat Dukhan05ac8e32019-10-21 15:39:33 -0700[diff] [blame]1321 "src/f32-vscale/avx-unroll32.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]1322]
1323
Marat Dukhanfda12b82019-11-21 12:27:59 -0800[diff] [blame]1324FMA3_UKERNELS = [
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]1325 "src/f32-dwconv/gen/up16x4-minmax-fma3-acc2.c",
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1337 "src/f32-gemm/gen/1x8-minmax-fma3-broadcast.c",
1338 "src/f32-gemm/gen/4x8-minmax-fma3-broadcast.c",
1339 "src/f32-gemm/gen/5x8-minmax-fma3-broadcast.c",
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1356 "src/f32-gemm/gen-inc/8x8inc-minmax-fma3-broadcast.c",
1357 "src/f32-gemm/gen-inc/1x16inc-minmax-fma3-broadcast.c",
1358 "src/f32-gemm/gen-inc/3x16inc-minmax-fma3-broadcast.c",
1359 "src/f32-gemm/gen-inc/4x16inc-minmax-fma3-broadcast.c",
1360 "src/f32-gemm/gen-inc/5x16inc-minmax-fma3-broadcast.c",
1361 "src/f32-gemm/gen-inc/1x16s4inc-minmax-fma3-broadcast.c",
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1364 "src/f32-gemm/gen-inc/5x16s4inc-minmax-fma3-broadcast.c",
Marat Dukhan662faa02019-12-09 22:48:16 -0800[diff] [blame]1365 "src/f32-hswish/gen/fma3-x8.c",
1366 "src/f32-hswish/gen/fma3-x16.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]1367 "src/f32-igemm/gen/1x8-minmax-fma3-broadcast.c",
1368 "src/f32-igemm/gen/4x8-minmax-fma3-broadcast.c",
1369 "src/f32-igemm/gen/5x8-minmax-fma3-broadcast.c",
1370 "src/f32-igemm/gen/6x8-minmax-fma3-broadcast.c",
1371 "src/f32-igemm/gen/7x8-minmax-fma3-broadcast.c",
1372 "src/f32-igemm/gen/8x8-minmax-fma3-broadcast.c",
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Marat Dukhanfda12b82019-11-21 12:27:59 -0800[diff] [blame]1381]
1382
Marat Dukhan6adff4e2019-10-14 18:32:07 -0700[diff] [blame]1383AVX2_UKERNELS = [
Marat Dukhan4c4eb002019-12-08 21:27:49 -0800[diff] [blame]1384 "src/f32-raddexpminusmax/gen/avx2-p5-x64.c",
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Marat Dukhanfa0a4322020-01-06 16:14:29 -0800[diff] [blame]1420 "src/f32-sigmoid/gen/avx2-rr1-p5-div-x8.c",
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1430 "src/f32-sigmoid/gen/avx2-rr1-p5-nr1fma-x8.c",
1431 "src/f32-sigmoid/gen/avx2-rr1-p5-nr1fma-x16.c",
1432 "src/f32-sigmoid/gen/avx2-rr1-p5-nr1fma-x24.c",
1433 "src/f32-sigmoid/gen/avx2-rr1-p5-nr1fma-x32.c",
1434 "src/f32-sigmoid/gen/avx2-rr1-p5-nr1fma-x40.c",
1435 "src/f32-sigmoid/gen/avx2-rr1-p5-nr1fma-x48.c",
1436 "src/f32-sigmoid/gen/avx2-rr1-p5-nr1fma-x56.c",
1437 "src/f32-sigmoid/gen/avx2-rr1-p5-nr1fma-x64.c",
1438 "src/f32-sigmoid/gen/avx2-rr1-p5-nr1fma-x72.c",
1439 "src/f32-sigmoid/gen/avx2-rr1-p5-nr1fma-x80.c",
1440 "src/f32-sigmoid/gen/avx2-rr1-p5-nr2fma-x8.c",
1441 "src/f32-sigmoid/gen/avx2-rr1-p5-nr2fma-x16.c",
1442 "src/f32-sigmoid/gen/avx2-rr1-p5-nr2fma-x24.c",
1443 "src/f32-sigmoid/gen/avx2-rr1-p5-nr2fma-x32.c",
1444 "src/f32-sigmoid/gen/avx2-rr1-p5-nr2fma-x40.c",
1445 "src/f32-sigmoid/gen/avx2-rr1-p5-nr2fma-x48.c",
1446 "src/f32-sigmoid/gen/avx2-rr1-p5-nr2fma-x56.c",
1447 "src/f32-sigmoid/gen/avx2-rr1-p5-nr2fma-x64.c",
1448 "src/f32-sigmoid/gen/avx2-rr1-p5-nr2fma-x72.c",
1449 "src/f32-sigmoid/gen/avx2-rr1-p5-nr2fma-x80.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -0800[diff] [blame]1450 "src/f32-vscaleexpminusmax/gen/avx2-p5-x8.c",
1451 "src/f32-vscaleexpminusmax/gen/avx2-p5-x16.c",
1452 "src/f32-vscaleexpminusmax/gen/avx2-p5-x24.c",
1453 "src/f32-vscaleexpminusmax/gen/avx2-p5-x32.c",
1454 "src/f32-vscaleexpminusmax/gen/avx2-p5-x40.c",
1455 "src/f32-vscaleexpminusmax/gen/avx2-p5-x48.c",
1456 "src/f32-vscaleexpminusmax/gen/avx2-p5-x56.c",
1457 "src/f32-vscaleexpminusmax/gen/avx2-p5-x64.c",
1458 "src/f32-vscaleexpminusmax/gen/avx2-p5-x72.c",
1459 "src/f32-vscaleexpminusmax/gen/avx2-p5-x80.c",
1460 "src/f32-vscaleexpminusmax/gen/avx2-p5-x88.c",
1461 "src/f32-vscaleexpminusmax/gen/avx2-p5-x96.c",
1462 "src/f32-vscaleextexp/gen/avx2-p5-x8.c",
1463 "src/f32-vscaleextexp/gen/avx2-p5-x16.c",
1464 "src/f32-vscaleextexp/gen/avx2-p5-x24.c",
1465 "src/f32-vscaleextexp/gen/avx2-p5-x32.c",
1466 "src/f32-vscaleextexp/gen/avx2-p5-x40.c",
1467 "src/f32-vscaleextexp/gen/avx2-p5-x48.c",
1468 "src/f32-vscaleextexp/gen/avx2-p5-x56.c",
1469 "src/f32-vscaleextexp/gen/avx2-p5-x64.c",
1470 "src/f32-vscaleextexp/gen/avx2-p5-x72.c",
1471 "src/f32-vscaleextexp/gen/avx2-p5-x80.c",
1472 "src/f32-vscaleextexp/gen/avx2-p5-x88.c",
1473 "src/f32-vscaleextexp/gen/avx2-p5-x96.c",
Marat Dukhan6adff4e2019-10-14 18:32:07 -0700[diff] [blame]1474 "src/math/exp-avx2-p5.c",
1475 "src/math/exp-avx2-perm-p3.c",
1476 "src/math/exp-avx2-perm-p4.c",
Marat Dukhan515c9772019-10-17 18:07:57 -0700[diff] [blame]1477 "src/math/expminus-avx2-p5.c",
Marat Dukhan98ba4412019-10-23 02:14:28 -0700[diff] [blame]1478 "src/math/extexp-avx2-p5.c",
Marat Dukhan72416002020-01-05 21:53:19 -0800[diff] [blame]1479 "src/math/sigmoid-avx2-rr2-p5-div.c",
1480 "src/math/sigmoid-avx2-rr1-p5-div.c",
1481 "src/math/sigmoid-avx2-rr2-p5-nr2fma.c",
1482 "src/math/sigmoid-avx2-rr1-p5-nr2fma.c",
1483 "src/math/sigmoid-avx2-rr2-p5-nr1fma.c",
1484 "src/math/sigmoid-avx2-rr1-p5-nr1fma.c",
Marat Dukhan6adff4e2019-10-14 18:32:07 -0700[diff] [blame]1485]
1486
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]1487AVX512F_UKERNELS = [
Marat Dukhan5c5fa962020-03-10 18:38:33 -0700[diff] [blame]1488 "src/f32-clamp/gen/avx512f-x16.c",
1489 "src/f32-clamp/gen/avx512f-x32.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]1490 "src/f32-dwconv/gen/up32x4-minmax-avx512f-acc2.c",
1491 "src/f32-dwconv/gen/up32x4-minmax-avx512f.c",
1492 "src/f32-dwconv/gen/up16x4-minmax-avx512f-acc2.c",
1493 "src/f32-dwconv/gen/up16x4-minmax-avx512f.c",
1494 "src/f32-dwconv/gen/up32x9-minmax-avx512f-acc2.c",
1495 "src/f32-dwconv/gen/up32x9-minmax-avx512f.c",
1496 "src/f32-dwconv/gen/up16x9-minmax-avx512f-acc2.c",
1497 "src/f32-dwconv/gen/up16x9-minmax-avx512f.c",
1498 "src/f32-dwconv/gen/up32x25-minmax-avx512f-acc2.c",
1499 "src/f32-dwconv/gen/up32x25-minmax-avx512f.c",
1500 "src/f32-dwconv/gen/up16x25-minmax-avx512f-acc2.c",
1501 "src/f32-dwconv/gen/up16x25-minmax-avx512f.c",
1502 "src/f32-gemm/gen/1x16-minmax-avx512f-broadcast.c",
1503 "src/f32-gemm/gen/4x16-minmax-avx512f-broadcast.c",
1504 "src/f32-gemm/gen/5x16-minmax-avx512f-broadcast.c",
1505 "src/f32-gemm/gen/6x16-minmax-avx512f-broadcast.c",
1506 "src/f32-gemm/gen/7x16-minmax-avx512f-broadcast.c",
1507 "src/f32-gemm/gen/8x16-minmax-avx512f-broadcast.c",
1508 "src/f32-gemm/gen-inc/1x16inc-minmax-avx512f-broadcast.c",
1509 "src/f32-gemm/gen-inc/4x16inc-minmax-avx512f-broadcast.c",
1510 "src/f32-gemm/gen-inc/5x16inc-minmax-avx512f-broadcast.c",
1511 "src/f32-gemm/gen-inc/6x16inc-minmax-avx512f-broadcast.c",
1512 "src/f32-gemm/gen-inc/7x16inc-minmax-avx512f-broadcast.c",
1513 "src/f32-gemm/gen-inc/8x16inc-minmax-avx512f-broadcast.c",
Marat Dukhan662faa02019-12-09 22:48:16 -0800[diff] [blame]1514 "src/f32-hswish/gen/avx512f-x16.c",
1515 "src/f32-hswish/gen/avx512f-x32.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]1516 "src/f32-igemm/gen/1x16-minmax-avx512f-broadcast.c",
1517 "src/f32-igemm/gen/4x16-minmax-avx512f-broadcast.c",
1518 "src/f32-igemm/gen/5x16-minmax-avx512f-broadcast.c",
1519 "src/f32-igemm/gen/6x16-minmax-avx512f-broadcast.c",
1520 "src/f32-igemm/gen/7x16-minmax-avx512f-broadcast.c",
1521 "src/f32-igemm/gen/8x16-minmax-avx512f-broadcast.c",
Marat Dukhan90eca0a2020-03-11 00:52:23 -0700[diff] [blame]1522 "src/f32-prelu/gen/avx512f-2x16.c",
1523 "src/f32-prelu/gen/avx512f-2x32.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -0800[diff] [blame]1524 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x128.c",
1525 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x128-acc2.c",
1526 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x128-acc4.c",
1527 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x144.c",
1528 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x144-acc3.c",
1529 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x160.c",
1530 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x160-acc2.c",
1531 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x160-acc5.c",
1532 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x192.c",
1533 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x192-acc2.c",
1534 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x192-acc3.c",
1535 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x192-acc6.c",
1536 "src/f32-raddextexp/gen/avx512f-p5-scalef-x128.c",
1537 "src/f32-raddextexp/gen/avx512f-p5-scalef-x128-acc2.c",
1538 "src/f32-raddextexp/gen/avx512f-p5-scalef-x128-acc4.c",
1539 "src/f32-raddextexp/gen/avx512f-p5-scalef-x144.c",
1540 "src/f32-raddextexp/gen/avx512f-p5-scalef-x144-acc3.c",
1541 "src/f32-raddextexp/gen/avx512f-p5-scalef-x160.c",
1542 "src/f32-raddextexp/gen/avx512f-p5-scalef-x160-acc2.c",
1543 "src/f32-raddextexp/gen/avx512f-p5-scalef-x160-acc5.c",
1544 "src/f32-raddextexp/gen/avx512f-p5-scalef-x192.c",
1545 "src/f32-raddextexp/gen/avx512f-p5-scalef-x192-acc2.c",
1546 "src/f32-raddextexp/gen/avx512f-p5-scalef-x192-acc3.c",
1547 "src/f32-raddextexp/gen/avx512f-p5-scalef-x192-acc6.c",
1548 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x128.c",
1549 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x128-acc2.c",
1550 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x128-acc4.c",
1551 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x144.c",
1552 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x144-acc3.c",
1553 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x160.c",
1554 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x160-acc2.c",
1555 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x160-acc5.c",
1556 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x192.c",
1557 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x192-acc2.c",
1558 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x192-acc3.c",
1559 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x192-acc6.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]1560 "src/f32-rmax/avx512f.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]1561 "src/f32-vbinary/gen/vadd-minmax-avx512f-x16.c",
1562 "src/f32-vbinary/gen/vadd-minmax-avx512f-x32.c",
1563 "src/f32-vbinary/gen/vaddc-minmax-avx512f-x16.c",
1564 "src/f32-vbinary/gen/vaddc-minmax-avx512f-x32.c",
1565 "src/f32-vbinary/gen/vdiv-minmax-avx512f-x16.c",
1566 "src/f32-vbinary/gen/vdiv-minmax-avx512f-x32.c",
1567 "src/f32-vbinary/gen/vdivc-minmax-avx512f-x16.c",
1568 "src/f32-vbinary/gen/vdivc-minmax-avx512f-x32.c",
Marat Dukhan9a88efe2019-12-10 15:54:24 -0800[diff] [blame]1569 "src/f32-vbinary/gen/vmax-avx512f-x16.c",
1570 "src/f32-vbinary/gen/vmax-avx512f-x32.c",
1571 "src/f32-vbinary/gen/vmaxc-avx512f-x16.c",
1572 "src/f32-vbinary/gen/vmaxc-avx512f-x32.c",
1573 "src/f32-vbinary/gen/vmin-avx512f-x16.c",
1574 "src/f32-vbinary/gen/vmin-avx512f-x32.c",
1575 "src/f32-vbinary/gen/vminc-avx512f-x16.c",
1576 "src/f32-vbinary/gen/vminc-avx512f-x32.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]1577 "src/f32-vbinary/gen/vmul-minmax-avx512f-x16.c",
1578 "src/f32-vbinary/gen/vmul-minmax-avx512f-x32.c",
1579 "src/f32-vbinary/gen/vmulc-minmax-avx512f-x16.c",
1580 "src/f32-vbinary/gen/vmulc-minmax-avx512f-x32.c",
1581 "src/f32-vbinary/gen/vrdivc-minmax-avx512f-x16.c",
1582 "src/f32-vbinary/gen/vrdivc-minmax-avx512f-x32.c",
1583 "src/f32-vbinary/gen/vrsubc-minmax-avx512f-x16.c",
1584 "src/f32-vbinary/gen/vrsubc-minmax-avx512f-x32.c",
1585 "src/f32-vbinary/gen/vsub-minmax-avx512f-x16.c",
1586 "src/f32-vbinary/gen/vsub-minmax-avx512f-x32.c",
1587 "src/f32-vbinary/gen/vsubc-minmax-avx512f-x16.c",
1588 "src/f32-vbinary/gen/vsubc-minmax-avx512f-x32.c",
Marat Dukhan05ac8e32019-10-21 15:39:33 -0700[diff] [blame]1589 "src/f32-vscale/avx512f-unroll64.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -0800[diff] [blame]1590 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x16.c",
1591 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x32.c",
1592 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x48.c",
1593 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x64.c",
1594 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x80.c",
1595 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x96.c",
1596 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x112.c",
1597 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x128.c",
1598 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x144.c",
1599 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x160.c",
1600 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x176.c",
1601 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x192.c",
1602 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x16.c",
1603 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x32.c",
1604 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x48.c",
1605 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x64.c",
1606 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x80.c",
1607 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x96.c",
1608 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x112.c",
1609 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x128.c",
1610 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x144.c",
1611 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x160.c",
1612 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x176.c",
1613 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x192.c",
Marat Dukhan6adff4e2019-10-14 18:32:07 -0700[diff] [blame]1614 "src/math/exp-avx512f-p5-scalef.c",
1615 "src/math/exp-avx512f-p5.c",
1616 "src/math/exp-avx512f-perm-p3.c",
Marat Dukhanfeb49232019-10-28 11:03:31 -0700[diff] [blame]1617 "src/math/exp-avx512f-perm2-p2.c",
Marat Dukhan98ba4412019-10-23 02:14:28 -0700[diff] [blame]1618 "src/math/extexp-avx512f-p5.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]1619]
1620
1621AARCH32_ASM_UKERNELS = [
Marat Dukhan32f93812020-05-17 20:31:21 -0700[diff] [blame]1622 "src/f32-gemm/4x4-aarch32-vfp-ld64.S",
Marat Dukhan3b98f6b2020-05-17 10:09:22 -0700[diff] [blame]1623 "src/f32-gemm/4x4-minmax-aarch32-vfp-ld64.S",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]1624 "src/f32-gemm/4x8-minmax-aarch32-neon-cortex-a53.S",
1625 "src/f32-gemm/4x8-minmax-aarch32-neon-cortex-a55.S",
1626 "src/f32-gemm/gen/4x8-minmax-aarch32-neon-cortex-a75.S",
1627 "src/f32-gemm/gen/4x8-minmax-aarch32-neon-pld-cortex-a75.S",
1628 "src/f32-gemm/4x8-minmax-aarch32-neon-ld64.S",
1629 "src/f32-igemm/4x8-minmax-aarch32-neon-ld64.S",
1630 "src/f32-igemm/gen/4x8-minmax-aarch32-neon-cortex-a75.S",
1631 "src/f32-igemm/gen/4x8-minmax-aarch32-neon-pld-cortex-a75.S",
1632 "src/f32-igemm/4x8-minmax-aarch32-neon-cortex-a53.S",
1633 "src/f32-igemm/4x8-minmax-aarch32-neon-cortex-a55.S",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]1634]
1635
1636AARCH64_ASM_UKERNELS = [
Frank Barchard36b76b62020-04-10 12:39:17 -0700[diff] [blame]1637 "src/f16-gemm/gen/1x16-minmax-aarch64-neonfp16arith-ld32.S",
Frank Barchard683f5592020-04-10 00:48:26 -0700[diff] [blame]1638 "src/f16-gemm/gen/4x16-minmax-aarch64-neonfp16arith-ld32.S",
1639 "src/f16-gemm/gen/6x16-minmax-aarch64-neonfp16arith-ld32.S",
Frank Barchard36b76b62020-04-10 12:39:17 -0700[diff] [blame]1640 "src/f16-gemm/gen-inc/1x16inc-minmax-aarch64-neonfp16arith-ld32.S",
Frank Barchard683f5592020-04-10 00:48:26 -0700[diff] [blame]1641 "src/f16-gemm/gen-inc/4x16inc-minmax-aarch64-neonfp16arith-ld32.S",
1642 "src/f16-gemm/gen-inc/6x16inc-minmax-aarch64-neonfp16arith-ld32.S",
Frank Barchardbddfbcd2020-04-15 12:32:41 -0700[diff] [blame]1643 "src/f16-gemm/gen/1x8-minmax-aarch64-neonfp16arith-ld64.S",
1644 "src/f16-gemm/gen/4x8-minmax-aarch64-neonfp16arith-ld64.S",
1645 "src/f16-gemm/gen/6x8-minmax-aarch64-neonfp16arith-ld64.S",
Frank Barchard3b8e5662020-04-20 12:12:53 -0700[diff] [blame]1646 "src/f16-gemm/gen/8x8-minmax-aarch64-neonfp16arith-ld64.S",
Frank Barchardbddfbcd2020-04-15 12:32:41 -0700[diff] [blame]1647 "src/f16-gemm/gen-inc/1x8inc-minmax-aarch64-neonfp16arith-ld64.S",
1648 "src/f16-gemm/gen-inc/4x8inc-minmax-aarch64-neonfp16arith-ld64.S",
1649 "src/f16-gemm/gen-inc/6x8inc-minmax-aarch64-neonfp16arith-ld64.S",
Frank Barchard3b8e5662020-04-20 12:12:53 -0700[diff] [blame]1650 "src/f16-gemm/gen-inc/8x8inc-minmax-aarch64-neonfp16arith-ld64.S",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]1651 "src/f32-dwconv/up4x9-minmax-aarch64-neonfma-cortex-a55.S",
1652 "src/f32-dwconv/up4x9-minmax-aarch64-neonfma.S",
Frank Barchard3cb54f92020-04-10 10:46:08 -0700[diff] [blame]1653 "src/f32-gemm/gen/1x8-minmax-aarch64-neonfma-ld64.S",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]1654 "src/f32-gemm/gen/1x12-minmax-aarch64-neonfma-cortex-a53.S",
1655 "src/f32-gemm/gen/1x8-minmax-aarch64-neonfma-cortex-a53.S",
1656 "src/f32-gemm/gen/1x8-minmax-aarch64-neonfma-cortex-a57.S",
1657 "src/f32-gemm/gen/1x8-minmax-aarch64-neonfma-cortex-a75.S",
1658 "src/f32-gemm/gen/4x12-minmax-aarch64-neonfma-cortex-a53.S",
1659 "src/f32-gemm/gen/4x8-minmax-aarch64-neonfma-cortex-a53.S",
1660 "src/f32-gemm/gen/4x8-minmax-aarch64-neonfma-cortex-a55.S",
1661 "src/f32-gemm/gen/4x8-minmax-aarch64-neonfma-cortex-a57.S",
1662 "src/f32-gemm/gen/4x8-minmax-aarch64-neonfma-cortex-a75.S",
1663 "src/f32-gemm/gen/4x8-minmax-aarch64-neonfma-ld128.S",
1664 "src/f32-gemm/gen/4x8-minmax-aarch64-neonfma-ld64.S",
1665 "src/f32-gemm/gen/5x8-minmax-aarch64-neonfma-cortex-a57.S",
1666 "src/f32-gemm/gen/5x8-minmax-aarch64-neonfma-cortex-a75.S",
1667 "src/f32-gemm/gen/6x8-minmax-aarch64-neonfma-cortex-a53.S",
1668 "src/f32-gemm/gen/6x8-minmax-aarch64-neonfma-cortex-a55.S",
1669 "src/f32-gemm/gen/6x8-minmax-aarch64-neonfma-cortex-a73.S",
1670 "src/f32-gemm/gen/6x8-minmax-aarch64-neonfma-cortex-a57.S",
1671 "src/f32-gemm/gen/6x8-minmax-aarch64-neonfma-cortex-a75.S",
1672 "src/f32-gemm/gen/6x8-minmax-aarch64-neonfma-ios.S",
1673 "src/f32-gemm/gen/6x8-minmax-aarch64-neonfma-ld128.S",
1674 "src/f32-gemm/gen/6x8-minmax-aarch64-neonfma-ld64.S",
Frank Barchard3cb54f92020-04-10 10:46:08 -0700[diff] [blame]1675 "src/f32-gemm/gen-inc/1x8inc-minmax-aarch64-neonfma-ld64.S",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]1676 "src/f32-gemm/gen-inc/1x12inc-minmax-aarch64-neonfma-cortex-a53.S",
1677 "src/f32-gemm/gen-inc/1x8inc-minmax-aarch64-neonfma-cortex-a53.S",
1678 "src/f32-gemm/gen-inc/1x8inc-minmax-aarch64-neonfma-cortex-a57.S",
1679 "src/f32-gemm/gen-inc/1x8inc-minmax-aarch64-neonfma-cortex-a75.S",
1680 "src/f32-gemm/gen-inc/4x12inc-minmax-aarch64-neonfma-cortex-a53.S",
1681 "src/f32-gemm/gen-inc/4x8inc-minmax-aarch64-neonfma-cortex-a53.S",
1682 "src/f32-gemm/gen-inc/4x8inc-minmax-aarch64-neonfma-cortex-a55.S",
1683 "src/f32-gemm/gen-inc/4x8inc-minmax-aarch64-neonfma-cortex-a57.S",
1684 "src/f32-gemm/gen-inc/4x8inc-minmax-aarch64-neonfma-cortex-a75.S",
1685 "src/f32-gemm/gen-inc/4x8inc-minmax-aarch64-neonfma-ld128.S",
1686 "src/f32-gemm/gen-inc/4x8inc-minmax-aarch64-neonfma-ld64.S",
1687 "src/f32-gemm/gen-inc/5x8inc-minmax-aarch64-neonfma-cortex-a57.S",
1688 "src/f32-gemm/gen-inc/5x8inc-minmax-aarch64-neonfma-cortex-a75.S",
1689 "src/f32-gemm/gen-inc/6x8inc-minmax-aarch64-neonfma-cortex-a53.S",
1690 "src/f32-gemm/gen-inc/6x8inc-minmax-aarch64-neonfma-cortex-a55.S",
1691 "src/f32-gemm/gen-inc/6x8inc-minmax-aarch64-neonfma-cortex-a73.S",
1692 "src/f32-gemm/gen-inc/6x8inc-minmax-aarch64-neonfma-cortex-a57.S",
1693 "src/f32-gemm/gen-inc/6x8inc-minmax-aarch64-neonfma-cortex-a75.S",
1694 "src/f32-gemm/gen-inc/6x8inc-minmax-aarch64-neonfma-ios.S",
1695 "src/f32-gemm/gen-inc/6x8inc-minmax-aarch64-neonfma-ld128.S",
1696 "src/f32-gemm/gen-inc/6x8inc-minmax-aarch64-neonfma-ld64.S",
1697 "src/f32-igemm/1x12-minmax-aarch64-neonfma-cortex-a53.S",
1698 "src/f32-igemm/1x8-minmax-aarch64-neonfma-cortex-a53.S",
1699 "src/f32-igemm/gen/1x8-minmax-aarch64-neonfma-cortex-a57.S",
1700 "src/f32-igemm/gen/1x8-minmax-aarch64-neonfma-cortex-a75.S",
1701 "src/f32-igemm/4x12-minmax-aarch64-neonfma-cortex-a53.S",
1702 "src/f32-igemm/4x8-minmax-aarch64-neonfma-cortex-a53.S",
1703 "src/f32-igemm/4x8-minmax-aarch64-neonfma-cortex-a55.S",
1704 "src/f32-igemm/gen/4x8-minmax-aarch64-neonfma-cortex-a57.S",
1705 "src/f32-igemm/gen/4x8-minmax-aarch64-neonfma-cortex-a75.S",
1706 "src/f32-igemm/gen/5x8-minmax-aarch64-neonfma-cortex-a57.S",
1707 "src/f32-igemm/gen/5x8-minmax-aarch64-neonfma-cortex-a75.S",
1708 "src/f32-igemm/6x8-minmax-aarch64-neonfma-cortex-a53.S",
1709 "src/f32-igemm/6x8-minmax-aarch64-neonfma-cortex-a55.S",
1710 "src/f32-igemm/6x8-minmax-aarch64-neonfma-cortex-a73.S",
1711 "src/f32-igemm/gen/6x8-minmax-aarch64-neonfma-cortex-a57.S",
1712 "src/f32-igemm/gen/6x8-minmax-aarch64-neonfma-cortex-a75.S",
1713 "src/f32-igemm/gen/6x8-minmax-aarch64-neonfma-ios.S",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]1714]
1715
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]1716INTERNAL_MICROKERNEL_HDRS = [
Marat Dukhanfe7acb62020-03-09 19:30:05 -0700[diff] [blame]1717 "src/requantization/gemmlowp-requantization.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]1718 "src/xnnpack/argmaxpool.h",
1719 "src/xnnpack/avgpool.h",
1720 "src/xnnpack/clamp.h",
1721 "src/xnnpack/common.h",
1722 "src/xnnpack/conv.h",
1723 "src/xnnpack/dwconv.h",
1724 "src/xnnpack/gavgpool.h",
1725 "src/xnnpack/gemm.h",
Marat Dukhan3bb3bfc2020-05-19 17:42:46 -0700[diff] [blame]1726 "src/xnnpack/fill.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]1727 "src/xnnpack/hswish.h",
Marat Dukhan660fd192020-03-10 04:55:30 -0700[diff] [blame]1728 "src/xnnpack/ibilinear.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]1729 "src/xnnpack/igemm.h",
Marat Dukhancfb31342019-12-05 10:42:57 -0800[diff] [blame]1730 "src/xnnpack/intrinsics-polyfill.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]1731 "src/xnnpack/lut.h",
1732 "src/xnnpack/math.h",
1733 "src/xnnpack/maxpool.h",
Marat Dukhan04f03be2019-11-19 12:36:47 -0800[diff] [blame]1734 "src/xnnpack/memory.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]1735 "src/xnnpack/packx.h",
1736 "src/xnnpack/pad.h",
1737 "src/xnnpack/params.h",
1738 "src/xnnpack/pavgpool.h",
1739 "src/xnnpack/ppmm.h",
1740 "src/xnnpack/prelu.h",
Marat Dukhan97579532019-10-18 16:40:39 -0700[diff] [blame]1741 "src/xnnpack/raddexpminusmax.h",
Marat Dukhan6f8d4d32019-10-25 17:07:09 -0700[diff] [blame]1742 "src/xnnpack/raddextexp.h",
Marat Dukhan97579532019-10-18 16:40:39 -0700[diff] [blame]1743 "src/xnnpack/raddstoreexpminusmax.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]1744 "src/xnnpack/rmax.h",
1745 "src/xnnpack/scalar-utils.h",
1746 "src/xnnpack/spmm.h",
1747 "src/xnnpack/unpool.h",
1748 "src/xnnpack/vadd.h",
Marat Dukhan1e782c42019-11-21 17:02:40 -0800[diff] [blame]1749 "src/xnnpack/vbinary.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]1750 "src/xnnpack/vmulcaddc.h",
Marat Dukhan05ac8e32019-10-21 15:39:33 -0700[diff] [blame]1751 "src/xnnpack/vscale.h",
Marat Dukhan97579532019-10-18 16:40:39 -0700[diff] [blame]1752 "src/xnnpack/vscaleexpminusmax.h",
Marat Dukhan6f8d4d32019-10-25 17:07:09 -0700[diff] [blame]1753 "src/xnnpack/vscaleextexp.h",
Marat Dukhan1e782c42019-11-21 17:02:40 -0800[diff] [blame]1754 "src/xnnpack/vunary.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]1755 "src/xnnpack/zip.h",
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]1756]
1757
1758INTERNAL_HDRS = INTERNAL_MICROKERNEL_HDRS + [
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]1759 "include/xnnpack.h",
1760 "src/xnnpack/allocator.h",
1761 "src/xnnpack/compute.h",
1762 "src/xnnpack/im2col.h",
1763 "src/xnnpack/indirection.h",
Marat Dukhan6adff4e2019-10-14 18:32:07 -0700[diff] [blame]1764 "src/xnnpack/math-stubs.h",
Chao Mei6ddfc602020-05-13 22:29:36 -0700[diff] [blame]1765 "src/xnnpack/memory-planner.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]1766 "src/xnnpack/operator.h",
1767 "src/xnnpack/pack.h",
Marat Dukhaneeaa7bd2019-10-25 17:31:25 -0700[diff] [blame]1768 "src/xnnpack/params-init.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]1769 "src/xnnpack/requantization-stubs.h",
Marat Dukhan6adff4e2019-10-14 18:32:07 -0700[diff] [blame]1770 "src/xnnpack/requantization.h",
Marat Dukhan1d75a542020-02-03 12:23:01 -0800[diff] [blame]1771 "src/xnnpack/subgraph.h",
Marat Dukhan6adff4e2019-10-14 18:32:07 -0700[diff] [blame]1772]
1773
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]1774ACCURACY_EVAL_HDRS = INTERNAL_MICROKERNEL_HDRS + [
Marat Dukhan6adff4e2019-10-14 18:32:07 -0700[diff] [blame]1775 "src/xnnpack/math-stubs.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]1776]
1777
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]1778MICROKERNEL_BENCHMARK_HDRS = INTERNAL_MICROKERNEL_HDRS + [
Marat Dukhaneeaa7bd2019-10-25 17:31:25 -0700[diff] [blame]1779 "src/xnnpack/params-init.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]1780 "include/xnnpack.h",
1781]
1782
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]1783MICROKERNEL_TEST_HDRS = INTERNAL_MICROKERNEL_HDRS + [
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]1784 "src/xnnpack/isa-checks.h",
Marat Dukhaneeaa7bd2019-10-25 17:31:25 -0700[diff] [blame]1785 "src/xnnpack/params-init.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]1786 "src/xnnpack/requantization.h",
1787 "include/xnnpack.h",
1788]
1789
1790OPERATOR_TEST_PARAMS_HDRS = [
1791 "src/xnnpack/params.h",
1792 "src/xnnpack/common.h",
1793]
1794
1795WEIGHTS_PACK_HDRS = [
1796 "src/xnnpack/pack.h",
1797 "src/xnnpack/operator.h",
1798 "src/xnnpack/compute.h",
1799]
1800
Marat Dukhanc8e00eb2019-10-04 14:55:26 -0700[diff] [blame]1801LOGGING_COPTS = select({
1802 # No logging in optimized mode
1803 ":optimized_build": ["-DXNN_LOG_LEVEL=0"],
1804 # Full logging in debug mode
1805 ":debug_build": ["-DXNN_LOG_LEVEL=5"],
1806 # Error-only logging in default (fastbuild) mode
1807 "//conditions:default": ["-DXNN_LOG_LEVEL=2"],
1808})
1809
Marat Dukhan3b59de22020-06-03 20:15:19 -0700[diff] [blame]1810LOGGING_SRCS = select({
1811 # No logging in optimized mode
1812 ":optimized_build": [],
1813 "//conditions:default": [
1814 "src/operator-strings.c",
1815 "src/subgraph-strings.c",
1816 ],
1817})
1818
Marat Dukhanc8e00eb2019-10-04 14:55:26 -0700[diff] [blame]1819LOGGING_HDRS = [
1820 "src/xnnpack/log.h",
1821]
1822
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]1823xnnpack_cc_library(
Marat Dukhan3a77ea72019-12-23 12:10:24 -0800[diff] [blame]1824 name = "tables",
1825 srcs = TABLE_SRCS,
1826 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]1827 gcc_copts = xnnpack_gcc_std_copts(),
1828 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan3a77ea72019-12-23 12:10:24 -0800[diff] [blame]1829)
1830
1831xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]1832 name = "scalar_ukernels",
1833 srcs = SCALAR_UKERNELS,
1834 hdrs = INTERNAL_HDRS,
1835 aarch32_copts = ["-marm"],
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]1836 gcc_copts = xnnpack_gcc_std_copts(),
1837 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]1838 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -0800[diff] [blame]1839 ":tables",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]1840 "@FP16",
1841 "@FXdiv",
Marat Dukhan04f03be2019-11-19 12:36:47 -0800[diff] [blame]1842 "@pthreadpool",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]1843 ],
1844)
1845
1846xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]1847 name = "scalar_ukernels_test_mode",
1848 srcs = SCALAR_UKERNELS,
1849 hdrs = INTERNAL_HDRS,
1850 aarch32_copts = ["-marm"],
1851 copts = [
1852 "-UNDEBUG",
1853 "-DXNN_TEST_MODE=1",
1854 ],
1855 gcc_copts = xnnpack_gcc_std_copts(),
1856 msvc_copts = xnnpack_msvc_std_copts(),
1857 deps = [
1858 ":tables",
1859 "@FP16",
1860 "@FXdiv",
1861 "@pthreadpool",
1862 ],
1863)
1864
1865xnnpack_cc_library(
Marat Dukhan436ebe62019-12-04 15:10:12 -0800[diff] [blame]1866 name = "wasm_ukernels",
1867 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]1868 gcc_copts = xnnpack_gcc_std_copts(),
1869 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan436ebe62019-12-04 15:10:12 -0800[diff] [blame]1870 wasm_srcs = WASM_UKERNELS,
1871 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -0800[diff] [blame]1872 ":tables",
Marat Dukhan436ebe62019-12-04 15:10:12 -0800[diff] [blame]1873 "@FP16",
1874 "@FXdiv",
1875 "@pthreadpool",
1876 ],
1877)
1878
1879xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]1880 name = "wasm_ukernels_test_mode",
1881 hdrs = INTERNAL_HDRS,
1882 copts = [
1883 "-UNDEBUG",
1884 "-DXNN_TEST_MODE=1",
1885 ],
1886 gcc_copts = xnnpack_gcc_std_copts(),
1887 msvc_copts = xnnpack_msvc_std_copts(),
1888 wasm_srcs = WASM_UKERNELS,
1889 deps = [
1890 ":tables",
1891 "@FP16",
1892 "@FXdiv",
1893 "@pthreadpool",
1894 ],
1895)
1896
1897xnnpack_cc_library(
Marat Dukhan8d3c07e2020-01-02 01:20:59 -0800[diff] [blame]1898 name = "psimd_fastmath_ukernels",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]1899 hdrs = INTERNAL_HDRS,
1900 aarch32_copts = [
1901 "-marm",
1902 "-mfpu=neon",
1903 ],
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]1904 gcc_copts = xnnpack_gcc_std_copts(),
1905 gcc_x86_copts = ["-msse2"],
1906 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]1907 optimized_copts = [
1908 "-O3",
1909 "-ffast-math",
1910 ],
Marat Dukhan500b8892020-04-15 17:09:50 -0700[diff] [blame]1911 psimd_srcs = PSIMD_FASTMATH_UKERNELS,
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]1912 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -0800[diff] [blame]1913 ":tables",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]1914 "@FP16",
1915 "@psimd",
Marat Dukhan04f03be2019-11-19 12:36:47 -0800[diff] [blame]1916 "@pthreadpool",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]1917 ],
1918)
1919
1920xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]1921 name = "psimd_fastmath_ukernels_test_mode",
1922 hdrs = INTERNAL_HDRS,
1923 aarch32_copts = [
1924 "-marm",
1925 "-mfpu=neon",
1926 ],
1927 copts = [
1928 "-UNDEBUG",
1929 "-DXNN_TEST_MODE=1",
1930 ],
1931 gcc_copts = xnnpack_gcc_std_copts(),
1932 gcc_x86_copts = ["-msse2"],
1933 msvc_copts = xnnpack_msvc_std_copts(),
1934 optimized_copts = [
1935 "-O3",
1936 "-ffast-math",
1937 ],
1938 psimd_srcs = PSIMD_FASTMATH_UKERNELS,
1939 deps = [
1940 ":tables",
1941 "@FP16",
1942 "@psimd",
1943 "@pthreadpool",
1944 ],
1945)
1946
1947xnnpack_cc_library(
Marat Dukhan8d3c07e2020-01-02 01:20:59 -0800[diff] [blame]1948 name = "psimd_accmath_ukernels",
Marat Dukhan8d3c07e2020-01-02 01:20:59 -0800[diff] [blame]1949 hdrs = INTERNAL_HDRS,
1950 aarch32_copts = [
1951 "-marm",
1952 "-mfpu=neon",
1953 ],
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]1954 gcc_copts = xnnpack_gcc_std_copts(),
1955 gcc_x86_copts = ["-msse2"],
1956 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan8d3c07e2020-01-02 01:20:59 -0800[diff] [blame]1957 optimized_copts = [
1958 "-O3",
1959 ],
Marat Dukhan500b8892020-04-15 17:09:50 -0700[diff] [blame]1960 psimd_srcs = PSIMD_ACCMATH_UKERNELS,
Marat Dukhan8d3c07e2020-01-02 01:20:59 -0800[diff] [blame]1961 deps = [
1962 ":tables",
1963 "@FP16",
1964 "@psimd",
1965 "@pthreadpool",
1966 ],
1967)
1968
1969xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]1970 name = "psimd_accmath_ukernels_test_mode",
1971 hdrs = INTERNAL_HDRS,
1972 aarch32_copts = [
1973 "-marm",
1974 "-mfpu=neon",
1975 ],
1976 copts = [
1977 "-UNDEBUG",
1978 "-DXNN_TEST_MODE=1",
1979 ],
1980 gcc_copts = xnnpack_gcc_std_copts(),
1981 gcc_x86_copts = ["-msse2"],
1982 msvc_copts = xnnpack_msvc_std_copts(),
1983 optimized_copts = [
1984 "-O3",
1985 ],
1986 psimd_srcs = PSIMD_ACCMATH_UKERNELS,
1987 deps = [
1988 ":tables",
1989 "@FP16",
1990 "@psimd",
1991 "@pthreadpool",
1992 ],
1993)
1994
1995xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]1996 name = "neon_ukernels",
1997 hdrs = INTERNAL_HDRS,
1998 aarch32_copts = [
1999 "-marm",
Marat Dukhan8853b822020-05-07 12:19:01 -0700[diff] [blame]2000 "-march=armv7-a",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2001 "-mfpu=neon",
2002 ],
2003 aarch32_srcs = NEON_UKERNELS,
2004 aarch64_srcs = NEON_UKERNELS,
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]2005 gcc_copts = xnnpack_gcc_std_copts(),
2006 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan04f03be2019-11-19 12:36:47 -0800[diff] [blame]2007 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -0800[diff] [blame]2008 ":tables",
Marat Dukhan04f03be2019-11-19 12:36:47 -0800[diff] [blame]2009 "@FP16",
2010 "@pthreadpool",
2011 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2012)
2013
2014xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]2015 name = "neon_ukernels_test_mode",
2016 hdrs = INTERNAL_HDRS,
2017 aarch32_copts = [
2018 "-marm",
2019 "-march=armv7-a",
2020 "-mfpu=neon",
2021 ],
2022 aarch32_srcs = NEON_UKERNELS,
2023 aarch64_srcs = NEON_UKERNELS,
2024 copts = [
2025 "-UNDEBUG",
2026 "-DXNN_TEST_MODE=1",
2027 ],
2028 gcc_copts = xnnpack_gcc_std_copts(),
2029 msvc_copts = xnnpack_msvc_std_copts(),
2030 deps = [
2031 ":tables",
2032 "@FP16",
2033 "@pthreadpool",
2034 ],
2035)
2036
2037xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2038 name = "neonfma_ukernels",
2039 hdrs = INTERNAL_HDRS,
2040 aarch32_copts = [
2041 "-marm",
Marat Dukhan8853b822020-05-07 12:19:01 -0700[diff] [blame]2042 "-march=armv7-a",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2043 "-mfpu=neon-vfpv4",
2044 ],
2045 aarch32_srcs = NEONFMA_UKERNELS,
2046 aarch64_srcs = NEONFMA_UKERNELS + AARCH64_NEONFMA_UKERNELS,
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]2047 gcc_copts = xnnpack_gcc_std_copts(),
2048 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan04f03be2019-11-19 12:36:47 -0800[diff] [blame]2049 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -0800[diff] [blame]2050 ":tables",
Marat Dukhan04f03be2019-11-19 12:36:47 -0800[diff] [blame]2051 "@FP16",
2052 "@pthreadpool",
2053 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2054)
2055
2056xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]2057 name = "neonfma_ukernels_test_mode",
2058 hdrs = INTERNAL_HDRS,
2059 aarch32_copts = [
2060 "-marm",
2061 "-march=armv7-a",
2062 "-mfpu=neon-vfpv4",
2063 ],
2064 aarch32_srcs = NEONFMA_UKERNELS,
2065 aarch64_srcs = NEONFMA_UKERNELS + AARCH64_NEONFMA_UKERNELS,
2066 copts = [
2067 "-UNDEBUG",
2068 "-DXNN_TEST_MODE=1",
2069 ],
2070 gcc_copts = xnnpack_gcc_std_copts(),
2071 msvc_copts = xnnpack_msvc_std_copts(),
2072 deps = [
2073 ":tables",
2074 "@FP16",
2075 "@pthreadpool",
2076 ],
2077)
2078
2079xnnpack_cc_library(
Marat Dukhan8853b822020-05-07 12:19:01 -0700[diff] [blame]2080 name = "neonv8_ukernels",
2081 hdrs = INTERNAL_HDRS,
2082 aarch32_copts = [
2083 "-marm",
2084 "-march=armv8-a",
2085 "-mfpu=neon-fp-armv8",
2086 ],
2087 aarch32_srcs = NEONV8_UKERNELS,
2088 aarch64_srcs = NEONV8_UKERNELS,
2089 gcc_copts = xnnpack_gcc_std_copts(),
2090 msvc_copts = xnnpack_msvc_std_copts(),
2091 deps = [
2092 ":tables",
2093 "@FP16",
2094 "@pthreadpool",
2095 ],
2096)
2097
2098xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]2099 name = "neonv8_ukernels_test_mode",
2100 hdrs = INTERNAL_HDRS,
2101 aarch32_copts = [
2102 "-marm",
2103 "-march=armv8-a",
2104 "-mfpu=neon-fp-armv8",
2105 ],
2106 aarch32_srcs = NEONV8_UKERNELS,
2107 aarch64_srcs = NEONV8_UKERNELS,
2108 copts = [
2109 "-UNDEBUG",
2110 "-DXNN_TEST_MODE=1",
2111 ],
2112 gcc_copts = xnnpack_gcc_std_copts(),
2113 msvc_copts = xnnpack_msvc_std_copts(),
2114 deps = [
2115 ":tables",
2116 "@FP16",
2117 "@pthreadpool",
2118 ],
2119)
2120
2121xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2122 name = "neonfp16arith_ukernels",
2123 hdrs = INTERNAL_HDRS,
2124 aarch64_copts = ["-march=armv8.2-a+fp16"],
2125 aarch64_srcs = AARCH64_NEONFP16ARITH_UKERNELS,
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]2126 gcc_copts = xnnpack_gcc_std_copts(),
2127 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan04f03be2019-11-19 12:36:47 -0800[diff] [blame]2128 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -0800[diff] [blame]2129 ":tables",
Marat Dukhan04f03be2019-11-19 12:36:47 -0800[diff] [blame]2130 "@FP16",
2131 "@pthreadpool",
2132 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2133)
2134
2135xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]2136 name = "neonfp16arith_ukernels_test_mode",
2137 hdrs = INTERNAL_HDRS,
2138 aarch64_copts = ["-march=armv8.2-a+fp16"],
2139 aarch64_srcs = AARCH64_NEONFP16ARITH_UKERNELS,
2140 copts = [
2141 "-UNDEBUG",
2142 "-DXNN_TEST_MODE=1",
2143 ],
2144 gcc_copts = xnnpack_gcc_std_copts(),
2145 msvc_copts = xnnpack_msvc_std_copts(),
2146 deps = [
2147 ":tables",
2148 "@FP16",
2149 "@pthreadpool",
2150 ],
2151)
2152
2153xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2154 name = "sse2_ukernels",
2155 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]2156 gcc_copts = xnnpack_gcc_std_copts(),
2157 gcc_x86_copts = ["-msse2"],
2158 msvc_copts = xnnpack_msvc_std_copts(),
2159 msvc_x86_32_copts = ["/arch:SSE2"],
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2160 x86_srcs = SSE_UKERNELS + SSE2_UKERNELS,
Marat Dukhan04f03be2019-11-19 12:36:47 -0800[diff] [blame]2161 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -0800[diff] [blame]2162 ":tables",
Marat Dukhan04f03be2019-11-19 12:36:47 -0800[diff] [blame]2163 "@FP16",
2164 "@pthreadpool",
2165 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2166)
2167
2168xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]2169 name = "sse2_ukernels_test_mode",
2170 hdrs = INTERNAL_HDRS,
2171 copts = [
2172 "-UNDEBUG",
2173 "-DXNN_TEST_MODE=1",
2174 ],
2175 gcc_copts = xnnpack_gcc_std_copts(),
2176 gcc_x86_copts = ["-msse2"],
2177 msvc_copts = xnnpack_msvc_std_copts(),
2178 msvc_x86_32_copts = ["/arch:SSE2"],
2179 x86_srcs = SSE_UKERNELS + SSE2_UKERNELS,
2180 deps = [
2181 ":tables",
2182 "@FP16",
2183 "@pthreadpool",
2184 ],
2185)
2186
2187xnnpack_cc_library(
Marat Dukhanfe7acb62020-03-09 19:30:05 -0700[diff] [blame]2188 name = "ssse3_ukernels",
2189 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]2190 gcc_copts = xnnpack_gcc_std_copts(),
2191 gcc_x86_copts = ["-mssse3"],
2192 msvc_copts = xnnpack_msvc_std_copts(),
2193 msvc_x86_32_copts = ["/arch:SSE2"],
Marat Dukhanfe7acb62020-03-09 19:30:05 -0700[diff] [blame]2194 x86_srcs = SSSE3_UKERNELS,
2195 deps = [
2196 ":tables",
2197 "@FP16",
2198 "@pthreadpool",
2199 ],
2200)
2201
2202xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]2203 name = "ssse3_ukernels_test_mode",
2204 hdrs = INTERNAL_HDRS,
2205 copts = [
2206 "-UNDEBUG",
2207 "-DXNN_TEST_MODE=1",
2208 ],
2209 gcc_copts = xnnpack_gcc_std_copts(),
2210 gcc_x86_copts = ["-mssse3"],
2211 msvc_copts = xnnpack_msvc_std_copts(),
2212 msvc_x86_32_copts = ["/arch:SSE2"],
2213 x86_srcs = SSSE3_UKERNELS,
2214 deps = [
2215 ":tables",
2216 "@FP16",
2217 "@pthreadpool",
2218 ],
2219)
2220
2221xnnpack_cc_library(
Marat Dukhan69c3f2c2019-11-06 12:30:01 -0800[diff] [blame]2222 name = "sse41_ukernels",
2223 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]2224 gcc_copts = xnnpack_gcc_std_copts(),
2225 gcc_x86_copts = ["-msse4.1"],
2226 msvc_copts = xnnpack_msvc_std_copts(),
2227 msvc_x86_32_copts = ["/arch:SSE2"],
Marat Dukhan69c3f2c2019-11-06 12:30:01 -0800[diff] [blame]2228 x86_srcs = SSE41_UKERNELS,
Marat Dukhan04f03be2019-11-19 12:36:47 -0800[diff] [blame]2229 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -0800[diff] [blame]2230 ":tables",
Marat Dukhan04f03be2019-11-19 12:36:47 -0800[diff] [blame]2231 "@FP16",
2232 "@pthreadpool",
2233 ],
Marat Dukhan69c3f2c2019-11-06 12:30:01 -0800[diff] [blame]2234)
2235
2236xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]2237 name = "sse41_ukernels_test_mode",
2238 hdrs = INTERNAL_HDRS,
2239 copts = [
2240 "-UNDEBUG",
2241 "-DXNN_TEST_MODE=1",
2242 ],
2243 gcc_copts = xnnpack_gcc_std_copts(),
2244 gcc_x86_copts = ["-msse4.1"],
2245 msvc_copts = xnnpack_msvc_std_copts(),
2246 msvc_x86_32_copts = ["/arch:SSE2"],
2247 x86_srcs = SSE41_UKERNELS,
2248 deps = [
2249 ":tables",
2250 "@FP16",
2251 "@pthreadpool",
2252 ],
2253)
2254
2255xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2256 name = "avx_ukernels",
2257 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]2258 gcc_copts = xnnpack_gcc_std_copts(),
2259 gcc_x86_copts = ["-mavx"],
2260 msvc_copts = xnnpack_msvc_std_copts(),
2261 msvc_x86_32_copts = ["/arch:AVX"],
2262 msvc_x86_64_copts = ["/arch:AVX"],
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2263 x86_srcs = AVX_UKERNELS,
Marat Dukhan04f03be2019-11-19 12:36:47 -0800[diff] [blame]2264 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -0800[diff] [blame]2265 ":tables",
Marat Dukhan04f03be2019-11-19 12:36:47 -0800[diff] [blame]2266 "@FP16",
2267 "@pthreadpool",
2268 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2269)
2270
2271xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]2272 name = "avx_ukernels_test_mode",
2273 hdrs = INTERNAL_HDRS,
2274 copts = [
2275 "-UNDEBUG",
2276 "-DXNN_TEST_MODE=1",
2277 ],
2278 gcc_copts = xnnpack_gcc_std_copts(),
2279 gcc_x86_copts = ["-mavx"],
2280 msvc_copts = xnnpack_msvc_std_copts(),
2281 msvc_x86_32_copts = ["/arch:AVX"],
2282 msvc_x86_64_copts = ["/arch:AVX"],
2283 x86_srcs = AVX_UKERNELS,
2284 deps = [
2285 ":tables",
2286 "@FP16",
2287 "@pthreadpool",
2288 ],
2289)
2290
2291xnnpack_cc_library(
Marat Dukhanfda12b82019-11-21 12:27:59 -0800[diff] [blame]2292 name = "fma3_ukernels",
2293 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]2294 gcc_copts = xnnpack_gcc_std_copts(),
2295 gcc_x86_copts = ["-mfma"],
2296 msvc_copts = xnnpack_msvc_std_copts(),
2297 msvc_x86_32_copts = ["/arch:AVX"],
2298 msvc_x86_64_copts = ["/arch:AVX"],
Marat Dukhanfda12b82019-11-21 12:27:59 -0800[diff] [blame]2299 x86_srcs = FMA3_UKERNELS,
2300 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -0800[diff] [blame]2301 ":tables",
Marat Dukhanfda12b82019-11-21 12:27:59 -0800[diff] [blame]2302 "@FP16",
2303 "@pthreadpool",
2304 ],
2305)
2306
2307xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]2308 name = "fma3_ukernels_test_mode",
2309 hdrs = INTERNAL_HDRS,
2310 copts = [
2311 "-UNDEBUG",
2312 "-DXNN_TEST_MODE=1",
2313 ],
2314 gcc_copts = xnnpack_gcc_std_copts(),
2315 gcc_x86_copts = ["-mfma"],
2316 msvc_copts = xnnpack_msvc_std_copts(),
2317 msvc_x86_32_copts = ["/arch:AVX"],
2318 msvc_x86_64_copts = ["/arch:AVX"],
2319 x86_srcs = FMA3_UKERNELS,
2320 deps = [
2321 ":tables",
2322 "@FP16",
2323 "@pthreadpool",
2324 ],
2325)
2326
2327xnnpack_cc_library(
Marat Dukhan6adff4e2019-10-14 18:32:07 -0700[diff] [blame]2328 name = "avx2_ukernels",
2329 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]2330 gcc_copts = xnnpack_gcc_std_copts(),
2331 gcc_x86_copts = [
Marat Dukhan6adff4e2019-10-14 18:32:07 -0700[diff] [blame]2332 "-mfma",
2333 "-mavx2",
2334 ],
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]2335 msvc_copts = xnnpack_msvc_std_copts(),
2336 msvc_x86_32_copts = ["/arch:AVX2"],
2337 msvc_x86_64_copts = ["/arch:AVX2"],
Marat Dukhan6adff4e2019-10-14 18:32:07 -0700[diff] [blame]2338 x86_srcs = AVX2_UKERNELS,
Marat Dukhan04f03be2019-11-19 12:36:47 -0800[diff] [blame]2339 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -0800[diff] [blame]2340 ":tables",
Marat Dukhan04f03be2019-11-19 12:36:47 -0800[diff] [blame]2341 "@FP16",
2342 "@pthreadpool",
2343 ],
Marat Dukhan6adff4e2019-10-14 18:32:07 -0700[diff] [blame]2344)
2345
2346xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]2347 name = "avx2_ukernels_test_mode",
2348 hdrs = INTERNAL_HDRS,
2349 copts = [
2350 "-UNDEBUG",
2351 "-DXNN_TEST_MODE=1",
2352 ],
2353 gcc_copts = xnnpack_gcc_std_copts(),
2354 gcc_x86_copts = [
2355 "-mfma",
2356 "-mavx2",
2357 ],
2358 msvc_copts = xnnpack_msvc_std_copts(),
2359 msvc_x86_32_copts = ["/arch:AVX2"],
2360 msvc_x86_64_copts = ["/arch:AVX2"],
2361 x86_srcs = AVX2_UKERNELS,
2362 deps = [
2363 ":tables",
2364 "@FP16",
2365 "@pthreadpool",
2366 ],
2367)
2368
2369xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2370 name = "avx512f_ukernels",
2371 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]2372 gcc_copts = xnnpack_gcc_std_copts(),
2373 gcc_x86_copts = ["-mavx512f"],
2374 mingw_copts = ["-fno-asynchronous-unwind-tables"],
2375 msvc_copts = xnnpack_msvc_std_copts(),
2376 msvc_x86_32_copts = ["/arch:AVX512"],
2377 msvc_x86_64_copts = ["/arch:AVX512"],
2378 msys_copts = ["-fno-asynchronous-unwind-tables"],
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2379 x86_srcs = AVX512F_UKERNELS,
Marat Dukhan04f03be2019-11-19 12:36:47 -0800[diff] [blame]2380 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -0800[diff] [blame]2381 ":tables",
Marat Dukhan04f03be2019-11-19 12:36:47 -0800[diff] [blame]2382 "@FP16",
2383 "@pthreadpool",
2384 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2385)
2386
2387xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]2388 name = "avx512f_ukernels_test_mode",
2389 hdrs = INTERNAL_HDRS,
2390 copts = [
2391 "-UNDEBUG",
2392 "-DXNN_TEST_MODE=1",
2393 ],
2394 gcc_copts = xnnpack_gcc_std_copts(),
2395 gcc_x86_copts = ["-mavx512f"],
2396 mingw_copts = ["-fno-asynchronous-unwind-tables"],
2397 msvc_copts = xnnpack_msvc_std_copts(),
2398 msvc_x86_32_copts = ["/arch:AVX512"],
2399 msvc_x86_64_copts = ["/arch:AVX512"],
2400 msys_copts = ["-fno-asynchronous-unwind-tables"],
2401 x86_srcs = AVX512F_UKERNELS,
2402 deps = [
2403 ":tables",
2404 "@FP16",
2405 "@pthreadpool",
2406 ],
2407)
2408
2409xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2410 name = "asm_ukernels",
2411 hdrs = ["src/xnnpack/assembly.h"],
2412 aarch32_srcs = AARCH32_ASM_UKERNELS,
Frank Barchard683f5592020-04-10 00:48:26 -0700[diff] [blame]2413 aarch64_copts = ["-march=armv8.2-a+fp16"],
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2414 aarch64_srcs = AARCH64_ASM_UKERNELS,
2415)
2416
Marat Dukhan3b59de22020-06-03 20:15:19 -0700[diff] [blame]2417xnnpack_cc_library(
2418 name = "logging_utils",
2419 srcs = LOGGING_SRCS,
2420 hdrs = INTERNAL_HDRS + LOGGING_HDRS,
2421 copts = LOGGING_COPTS + [
2422 "-Isrc",
2423 "-Iinclude",
2424 ] + select({
2425 ":debug_build": [],
2426 "//conditions:default": xnnpack_min_size_copts(),
2427 }),
2428 gcc_copts = xnnpack_gcc_std_copts(),
2429 msvc_copts = xnnpack_msvc_std_copts(),
2430 visibility = xnnpack_visibility(),
2431 deps = [
2432 "@FP16",
2433 "@clog",
2434 "@pthreadpool",
2435 ],
2436)
2437
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2438xnnpack_aggregate_library(
2439 name = "ukernels",
2440 aarch32_deps = [
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2441 ":neon_ukernels",
2442 ":neonfma_ukernels",
Marat Dukhan8853b822020-05-07 12:19:01 -0700[diff] [blame]2443 ":neonv8_ukernels",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2444 ":asm_ukernels",
2445 ],
2446 aarch64_deps = [
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2447 ":neon_ukernels",
2448 ":neonfma_ukernels",
Marat Dukhan8853b822020-05-07 12:19:01 -0700[diff] [blame]2449 ":neonv8_ukernels",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2450 ":neonfp16arith_ukernels",
2451 ":asm_ukernels",
2452 ],
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]2453 generic_deps = [
2454 ":scalar_ukernels",
2455 ],
Marat Dukhan500b8892020-04-15 17:09:50 -0700[diff] [blame]2456 psimd_deps = [
Marat Dukhan8d3c07e2020-01-02 01:20:59 -0800[diff] [blame]2457 ":psimd_fastmath_ukernels",
2458 ":psimd_accmath_ukernels",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2459 ],
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]2460 wasm_deps = [
2461 ":wasm_ukernels",
2462 ],
2463 wasmsimd_deps = [
2464 ":wasm_ukernels",
2465 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2466 x86_deps = [
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2467 ":sse2_ukernels",
Marat Dukhanfe7acb62020-03-09 19:30:05 -0700[diff] [blame]2468 ":ssse3_ukernels",
Marat Dukhan69c3f2c2019-11-06 12:30:01 -0800[diff] [blame]2469 ":sse41_ukernels",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2470 ":avx_ukernels",
Marat Dukhanfda12b82019-11-21 12:27:59 -0800[diff] [blame]2471 ":fma3_ukernels",
Marat Dukhan6adff4e2019-10-14 18:32:07 -0700[diff] [blame]2472 ":avx2_ukernels",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2473 ":avx512f_ukernels",
2474 ],
2475)
2476
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]2477xnnpack_aggregate_library(
2478 name = "ukernels_test_mode",
2479 aarch32_deps = [
2480 ":neon_ukernels_test_mode",
2481 ":neonfma_ukernels_test_mode",
2482 ":neonv8_ukernels_test_mode",
2483 ":asm_ukernels",
2484 ],
2485 aarch64_deps = [
2486 ":neon_ukernels_test_mode",
2487 ":neonfma_ukernels_test_mode",
2488 ":neonv8_ukernels_test_mode",
2489 ":neonfp16arith_ukernels_test_mode",
2490 ":asm_ukernels",
2491 ],
2492 generic_deps = [
2493 ":scalar_ukernels_test_mode",
2494 ],
2495 psimd_deps = [
2496 ":psimd_fastmath_ukernels_test_mode",
2497 ":psimd_accmath_ukernels_test_mode",
2498 ],
2499 wasm_deps = [
2500 ":wasm_ukernels_test_mode",
2501 ],
2502 wasmsimd_deps = [
2503 ":wasm_ukernels_test_mode",
2504 ],
2505 x86_deps = [
2506 ":sse2_ukernels_test_mode",
2507 ":ssse3_ukernels_test_mode",
2508 ":sse41_ukernels_test_mode",
2509 ":avx_ukernels_test_mode",
2510 ":fma3_ukernels_test_mode",
2511 ":avx2_ukernels_test_mode",
2512 ":avx512f_ukernels_test_mode",
2513 ],
2514)
2515
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2516xnnpack_cc_library(
2517 name = "im2col",
2518 srcs = ["src/im2col.c"],
2519 hdrs = [
2520 "src/xnnpack/common.h",
2521 "src/xnnpack/im2col.h",
2522 ],
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]2523 gcc_copts = xnnpack_gcc_std_copts(),
2524 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2525)
2526
2527xnnpack_cc_library(
2528 name = "indirection",
2529 srcs = ["src/indirection.c"],
2530 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]2531 gcc_copts = xnnpack_gcc_std_copts(),
2532 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2533 deps = [
2534 "@FP16",
2535 "@FXdiv",
2536 "@pthreadpool",
2537 ],
2538)
2539
2540xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]2541 name = "indirection_test_mode",
2542 srcs = ["src/indirection.c"],
2543 hdrs = INTERNAL_HDRS,
2544 copts = [
2545 "-UNDEBUG",
2546 "-DXNN_TEST_MODE=1",
2547 ],
2548 gcc_copts = xnnpack_gcc_std_copts(),
2549 msvc_copts = xnnpack_msvc_std_copts(),
2550 deps = [
2551 "@FP16",
2552 "@FXdiv",
2553 "@pthreadpool",
2554 ],
2555)
2556
2557xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2558 name = "operator_run",
2559 srcs = ["src/operator-run.c"],
Marat Dukhanc8e00eb2019-10-04 14:55:26 -0700[diff] [blame]2560 hdrs = INTERNAL_HDRS + LOGGING_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]2561 copts = LOGGING_COPTS + select({
Marat Dukhan05702cf2020-03-26 15:41:33 -0700[diff] [blame]2562 ":xnn_enable_hmp_explicit_false": ["-DXNN_MAX_UARCH_TYPES=1"],
2563 "//conditions:default": [],
2564 }),
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]2565 gcc_copts = xnnpack_gcc_std_copts(),
2566 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2567 deps = [
Marat Dukhan3b59de22020-06-03 20:15:19 -0700[diff] [blame]2568 ":logging_utils",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2569 "@FP16",
2570 "@FXdiv",
2571 "@clog",
2572 "@pthreadpool",
2573 ],
2574)
2575
Chao Mei6ddfc602020-05-13 22:29:36 -0700[diff] [blame]2576xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]2577 name = "operator_run_test_mode",
2578 srcs = ["src/operator-run.c"],
2579 hdrs = INTERNAL_HDRS + LOGGING_HDRS,
2580 copts = LOGGING_COPTS + [
2581 "-UNDEBUG",
2582 "-DXNN_TEST_MODE=1",
2583 ] + select({
2584 ":xnn_enable_hmp_explicit_false": ["-DXNN_MAX_UARCH_TYPES=1"],
2585 "//conditions:default": [],
2586 }),
2587 gcc_copts = xnnpack_gcc_std_copts(),
2588 msvc_copts = xnnpack_msvc_std_copts(),
2589 deps = [
Marat Dukhan3b59de22020-06-03 20:15:19 -0700[diff] [blame]2590 ":logging_utils",
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]2591 "@FP16",
2592 "@FXdiv",
2593 "@clog",
2594 "@pthreadpool",
2595 ],
2596)
2597
2598xnnpack_cc_library(
Chao Mei6ddfc602020-05-13 22:29:36 -0700[diff] [blame]2599 name = "memory_planner",
2600 srcs = ["src/memory-planner.c"],
2601 hdrs = INTERNAL_HDRS,
2602 defines = select({
2603 ":xnn_enable_memopt_explicit_true": ["XNN_ENABLE_MEMOPT=1"],
2604 ":xnn_enable_memopt_explicit_false": ["XNN_ENABLE_MEMOPT=0"],
2605 "//conditions:default": ["XNN_ENABLE_MEMOPT=1"],
2606 }),
2607 gcc_copts = xnnpack_gcc_std_copts(),
2608 msvc_copts = xnnpack_msvc_std_copts(),
2609 deps = [
Marat Dukhan3b59de22020-06-03 20:15:19 -0700[diff] [blame]2610 ":logging_utils",
Chao Mei6ddfc602020-05-13 22:29:36 -0700[diff] [blame]2611 "@pthreadpool",
2612 ],
2613)
2614
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]2615xnnpack_cc_library(
2616 name = "memory_planner_test_mode",
2617 srcs = ["src/memory-planner.c"],
2618 hdrs = INTERNAL_HDRS,
2619 copts = [
2620 "-UNDEBUG",
2621 "-DXNN_TEST_MODE=1",
2622 ],
2623 defines = select({
2624 ":xnn_enable_memopt_explicit_true": ["XNN_ENABLE_MEMOPT=1"],
2625 ":xnn_enable_memopt_explicit_false": ["XNN_ENABLE_MEMOPT=0"],
2626 "//conditions:default": ["XNN_ENABLE_MEMOPT=1"],
2627 }),
2628 gcc_copts = xnnpack_gcc_std_copts(),
2629 msvc_copts = xnnpack_msvc_std_copts(),
2630 deps = [
Marat Dukhan3b59de22020-06-03 20:15:19 -0700[diff] [blame]2631 ":logging_utils",
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]2632 "@pthreadpool",
2633 ],
2634)
2635
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2636cc_library(
2637 name = "enable_assembly",
2638 defines = select({
2639 ":xnn_enable_assembly_explicit_true": ["XNN_ENABLE_ASSEMBLY=1"],
2640 ":xnn_enable_assembly_explicit_false": ["XNN_ENABLE_ASSEMBLY=0"],
Frank Barchard810171d2019-10-10 10:34:51 -0700[diff] [blame]2641 "//conditions:default": ["XNN_ENABLE_ASSEMBLY=1"],
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2642 }),
2643)
2644
Marat Dukhancf056b22019-10-07 10:26:29 -0700[diff] [blame]2645xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2646 name = "operators",
2647 srcs = OPERATOR_SRCS + [
Marat Dukhan04f03be2019-11-19 12:36:47 -0800[diff] [blame]2648 "src/memory.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2649 "src/operator-delete.c",
Marat Dukhancf056b22019-10-07 10:26:29 -0700[diff] [blame]2650 ],
2651 hdrs = INTERNAL_HDRS + LOGGING_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]2652 copts = LOGGING_COPTS + [
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2653 "-Isrc",
2654 "-Iinclude",
2655 ] + select({
2656 ":debug_build": [],
2657 "//conditions:default": xnnpack_min_size_copts(),
Marat Dukhan05702cf2020-03-26 15:41:33 -0700[diff] [blame]2658 }) + select({
2659 ":xnn_enable_hmp_explicit_false": ["-DXNN_MAX_UARCH_TYPES=1"],
2660 "//conditions:default": [],
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2661 }),
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]2662 gcc_copts = xnnpack_gcc_std_copts(),
2663 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2664 deps = [
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2665 ":indirection",
Marat Dukhan3b59de22020-06-03 20:15:19 -0700[diff] [blame]2666 ":logging_utils",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2667 "@FP16",
2668 "@FXdiv",
2669 "@clog",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2670 "@pthreadpool",
Marat Dukhan8fe54e42019-10-10 14:12:59 -0700[diff] [blame]2671 ],
2672)
2673
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]2674xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]2675 name = "operators_test_mode",
2676 srcs = OPERATOR_SRCS + [
2677 "src/memory.c",
2678 "src/operator-delete.c",
2679 ],
2680 hdrs = INTERNAL_HDRS + LOGGING_HDRS,
2681 copts = LOGGING_COPTS + [
2682 "-Isrc",
2683 "-Iinclude",
2684 "-UNDEBUG",
2685 "-DXNN_TEST_MODE=1",
2686 ] + select({
2687 ":debug_build": [],
2688 "//conditions:default": xnnpack_min_size_copts(),
2689 }) + select({
2690 ":xnn_enable_hmp_explicit_false": ["-DXNN_MAX_UARCH_TYPES=1"],
2691 "//conditions:default": [],
2692 }),
2693 gcc_copts = xnnpack_gcc_std_copts(),
2694 msvc_copts = xnnpack_msvc_std_copts(),
2695 deps = [
2696 ":indirection_test_mode",
Marat Dukhan3b59de22020-06-03 20:15:19 -0700[diff] [blame]2697 ":logging_utils",
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]2698 "@FP16",
2699 "@FXdiv",
2700 "@clog",
2701 "@pthreadpool",
2702 ],
2703)
2704
2705xnnpack_cc_library(
Marat Dukhan8fe54e42019-10-10 14:12:59 -0700[diff] [blame]2706 name = "XNNPACK",
2707 srcs = [
2708 "src/init.c",
Marat Dukhanccfdbd12020-02-03 14:27:45 -0800[diff] [blame]2709 "src/runtime.c",
2710 "src/subgraph.c",
2711 "src/tensor.c",
Marat Dukhan3b59de22020-06-03 20:15:19 -0700[diff] [blame]2712 ] + SUBGRAPH_SRCS + LOGGING_SRCS,
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]2713 hdrs = ["include/xnnpack.h"],
2714 copts = LOGGING_COPTS + [
Marat Dukhan8fe54e42019-10-10 14:12:59 -0700[diff] [blame]2715 "-Isrc",
2716 "-Iinclude",
2717 ] + select({
2718 ":debug_build": [],
2719 "//conditions:default": xnnpack_min_size_copts(),
Marat Dukhan05702cf2020-03-26 15:41:33 -0700[diff] [blame]2720 }) + select({
2721 ":xnn_enable_hmp_explicit_false": ["-DXNN_MAX_UARCH_TYPES=1"],
2722 "//conditions:default": [],
Marat Dukhan8fe54e42019-10-10 14:12:59 -0700[diff] [blame]2723 }),
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]2724 gcc_copts = xnnpack_gcc_std_copts(),
Marat Dukhan8fe54e42019-10-10 14:12:59 -0700[diff] [blame]2725 includes = ["include"],
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]2726 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan8fe54e42019-10-10 14:12:59 -0700[diff] [blame]2727 visibility = xnnpack_visibility(),
2728 deps = [
2729 ":enable_assembly",
Marat Dukhan3b59de22020-06-03 20:15:19 -0700[diff] [blame]2730 ":logging_utils",
Chao Mei6ddfc602020-05-13 22:29:36 -0700[diff] [blame]2731 ":memory_planner",
Marat Dukhan8fe54e42019-10-10 14:12:59 -0700[diff] [blame]2732 ":operator_run",
2733 ":operators",
Marat Dukhan3b59de22020-06-03 20:15:19 -0700[diff] [blame]2734 ":ukernels",
Marat Dukhan8fe54e42019-10-10 14:12:59 -0700[diff] [blame]2735 "@clog",
Marat Dukhanab2946c2020-05-21 20:04:13 -0700[diff] [blame]2736 "@FP16",
Marat Dukhan8fe54e42019-10-10 14:12:59 -0700[diff] [blame]2737 "@pthreadpool",
Marat Dukhand343c222019-10-07 09:22:14 -0700[diff] [blame]2738 ] + select({
2739 ":emscripten": [],
2740 "//conditions:default": ["@cpuinfo"],
2741 }),
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2742)
2743
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]2744xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]2745 name = "XNNPACK_test_mode",
2746 srcs = [
2747 "src/init.c",
2748 "src/runtime.c",
2749 "src/subgraph.c",
2750 "src/tensor.c",
Marat Dukhan3b59de22020-06-03 20:15:19 -0700[diff] [blame]2751 ] + SUBGRAPH_SRCS + LOGGING_SRCS,
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]2752 hdrs = ["include/xnnpack.h"],
2753 copts = LOGGING_COPTS + [
2754 "-Isrc",
2755 "-Iinclude",
2756 "-UNDEBUG",
2757 "-DXNN_TEST_MODE=1",
2758 ] + select({
2759 ":debug_build": [],
2760 "//conditions:default": xnnpack_min_size_copts(),
2761 }) + select({
2762 ":xnn_enable_hmp_explicit_false": ["-DXNN_MAX_UARCH_TYPES=1"],
2763 "//conditions:default": [],
2764 }),
2765 gcc_copts = xnnpack_gcc_std_copts(),
2766 includes = ["include"],
2767 msvc_copts = xnnpack_msvc_std_copts(),
2768 visibility = xnnpack_visibility(),
2769 deps = [
2770 ":enable_assembly",
Marat Dukhan3b59de22020-06-03 20:15:19 -0700[diff] [blame]2771 ":logging_utils",
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]2772 ":memory_planner_test_mode",
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]2773 ":operator_run_test_mode",
2774 ":operators_test_mode",
Marat Dukhan3b59de22020-06-03 20:15:19 -0700[diff] [blame]2775 ":ukernels_test_mode",
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]2776 "@clog",
2777 "@FP16",
2778 "@pthreadpool",
2779 ] + select({
2780 ":emscripten": [],
2781 "//conditions:default": ["@cpuinfo"],
2782 }),
2783)
2784
2785xnnpack_cc_library(
Marat Dukhan8fe54e42019-10-10 14:12:59 -0700[diff] [blame]2786 name = "xnnpack_operators_nhwc_f32",
2787 srcs = [
2788 "src/init.c",
2789 ],
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]2790 hdrs = ["include/xnnpack.h"],
2791 copts = LOGGING_COPTS + [
Marat Dukhan8fe54e42019-10-10 14:12:59 -0700[diff] [blame]2792 "-Isrc",
2793 "-Iinclude",
2794 ] + select({
2795 ":debug_build": [],
2796 "//conditions:default": xnnpack_min_size_copts(),
Marat Dukhan05702cf2020-03-26 15:41:33 -0700[diff] [blame]2797 }) + select({
2798 ":xnn_enable_hmp_explicit_false": ["-DXNN_MAX_UARCH_TYPES=1"],
2799 "//conditions:default": [],
Marat Dukhan8fe54e42019-10-10 14:12:59 -0700[diff] [blame]2800 }),
2801 defines = [
2802 "XNN_NO_Q8_OPERATORS",
2803 "XNN_NO_U8_OPERATORS",
2804 "XNN_NO_X8_OPERATORS",
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]2805 "XNN_NO_NCHW_OPERATORS",
Marat Dukhan8fe54e42019-10-10 14:12:59 -0700[diff] [blame]2806 ],
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]2807 gcc_copts = xnnpack_gcc_std_copts(),
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2808 includes = ["include"],
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]2809 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2810 visibility = xnnpack_visibility(),
2811 deps = [
Marat Dukhan8fe54e42019-10-10 14:12:59 -0700[diff] [blame]2812 ":enable_assembly",
Marat Dukhan3b59de22020-06-03 20:15:19 -0700[diff] [blame]2813 ":logging_utils",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2814 ":operator_run",
2815 ":operators",
Marat Dukhan3b59de22020-06-03 20:15:19 -0700[diff] [blame]2816 ":ukernels",
Marat Dukhan8fe54e42019-10-10 14:12:59 -0700[diff] [blame]2817 "@clog",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2818 "@pthreadpool",
Marat Dukhan8fe54e42019-10-10 14:12:59 -0700[diff] [blame]2819 ] + select({
2820 ":emscripten": [],
2821 "//conditions:default": ["@cpuinfo"],
2822 }),
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2823)
2824
Marat Dukhancf056b22019-10-07 10:26:29 -0700[diff] [blame]2825xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2826 name = "bench_utils",
2827 srcs = ["bench/utils.cc"],
2828 hdrs = ["bench/utils.h"],
Marat Dukhanbad48fe2019-11-04 10:35:22 -0800[diff] [blame]2829 deps = [
2830 "@com_google_benchmark//:benchmark",
2831 "@cpuinfo",
2832 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2833)
2834
Frank Barchard7e955972019-10-11 10:34:25 -0700[diff] [blame]2835######################### Benchmarks for micro-kernels #########################
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2836
2837xnnpack_benchmark(
2838 name = "q8_gemm_bench",
2839 srcs = [
2840 "bench/gemm.h",
2841 "bench/q8-gemm.cc",
2842 "src/xnnpack/AlignedAllocator.h",
2843 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]2844 copts = xnnpack_optional_ruy_copts() + xnnpack_optional_gemmlowp_copts(),
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2845 deps = MICROKERNEL_BENCHMARK_DEPS + xnnpack_optional_ruy_deps() + xnnpack_optional_gemmlowp_deps(),
2846)
2847
2848xnnpack_benchmark(
Frank Barchard40d20fe2020-05-05 00:37:45 -0700[diff] [blame]2849 name = "f16_igemm_bench",
2850 srcs = [
2851 "bench/f16-igemm.cc",
2852 "bench/conv.h",
2853 "bench/google/conv.h",
2854 "src/xnnpack/AlignedAllocator.h",
2855 ] + MICROKERNEL_BENCHMARK_HDRS,
2856 deps = MICROKERNEL_BENCHMARK_DEPS + [":indirection"],
2857)
2858
2859xnnpack_benchmark(
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2860 name = "f16_gemm_bench",
2861 srcs = [
2862 "bench/f16-gemm.cc",
2863 "bench/gemm.h",
2864 "src/xnnpack/AlignedAllocator.h",
2865 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2866 deps = MICROKERNEL_BENCHMARK_DEPS,
2867)
2868
2869xnnpack_benchmark(
Marat Dukhanbdb56f52020-02-05 21:42:49 -0800[diff] [blame]2870 name = "f16_spmm_bench",
2871 srcs = [
2872 "bench/f16-spmm.cc",
2873 "bench/gemm.h",
Marat Dukhanbdb56f52020-02-05 21:42:49 -0800[diff] [blame]2874 "src/xnnpack/AlignedAllocator.h",
2875 ] + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhanbdb56f52020-02-05 21:42:49 -0800[diff] [blame]2876 deps = MICROKERNEL_BENCHMARK_DEPS,
2877)
2878
2879xnnpack_benchmark(
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2880 name = "f32_igemm_bench",
2881 srcs = [
2882 "bench/f32-igemm.cc",
2883 "bench/conv.h",
2884 "src/xnnpack/AlignedAllocator.h",
2885 ] + MICROKERNEL_BENCHMARK_HDRS,
Frank Barchard7e955972019-10-11 10:34:25 -0700[diff] [blame]2886 deps = MICROKERNEL_BENCHMARK_DEPS + [":indirection"],
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2887)
2888
2889xnnpack_benchmark(
2890 name = "f32_conv_hwc_bench",
2891 srcs = [
2892 "bench/f32-conv-hwc.cc",
2893 "bench/dconv.h",
2894 "src/xnnpack/AlignedAllocator.h",
2895 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2896 deps = MICROKERNEL_BENCHMARK_DEPS,
2897)
2898
2899xnnpack_benchmark(
Marat Dukhan1f29b802020-05-15 23:46:39 -0700[diff] [blame]2900 name = "f32_conv_hwc2chw_bench",
Erich Elsen563df5f2019-10-23 08:02:21 -0700[diff] [blame]2901 srcs = [
Marat Dukhan1f29b802020-05-15 23:46:39 -0700[diff] [blame]2902 "bench/f32-conv-hwc2chw.cc",
Erich Elsen563df5f2019-10-23 08:02:21 -0700[diff] [blame]2903 "bench/dconv.h",
2904 "src/xnnpack/AlignedAllocator.h",
2905 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_BENCHMARK_HDRS,
Erich Elsen563df5f2019-10-23 08:02:21 -0700[diff] [blame]2906 deps = MICROKERNEL_BENCHMARK_DEPS,
2907)
2908
2909xnnpack_benchmark(
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2910 name = "f32_dwconv_bench",
2911 srcs = [
2912 "bench/f32-dwconv.cc",
2913 "bench/dwconv.h",
2914 "src/xnnpack/AlignedAllocator.h",
2915 ] + MICROKERNEL_BENCHMARK_HDRS,
2916 deps = MICROKERNEL_BENCHMARK_DEPS + [":indirection"],
2917)
2918
2919xnnpack_benchmark(
Marat Dukhan1f29b802020-05-15 23:46:39 -0700[diff] [blame]2920 name = "f32_dwconv_chw_bench",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2921 srcs = [
Marat Dukhan1f29b802020-05-15 23:46:39 -0700[diff] [blame]2922 "bench/f32-dwconv-chw.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2923 "bench/dwconv.h",
2924 "src/xnnpack/AlignedAllocator.h",
2925 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_BENCHMARK_HDRS,
2926 deps = MICROKERNEL_BENCHMARK_DEPS + [":indirection"],
2927)
2928
2929xnnpack_benchmark(
2930 name = "f32_gemm_bench",
2931 srcs = [
2932 "bench/f32-gemm.cc",
2933 "bench/gemm.h",
2934 "src/xnnpack/AlignedAllocator.h",
2935 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]2936 copts = xnnpack_optional_ruy_copts(),
Frank Barchard7e955972019-10-11 10:34:25 -0700[diff] [blame]2937 deps = MICROKERNEL_BENCHMARK_DEPS + xnnpack_optional_ruy_deps(),
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2938)
2939
2940xnnpack_benchmark(
Marat Dukhan4c4eb002019-12-08 21:27:49 -0800[diff] [blame]2941 name = "f32_raddexpminusmax_bench",
2942 srcs = [
2943 "bench/f32-raddexpminusmax.cc",
2944 "src/xnnpack/AlignedAllocator.h",
2945 ] + MICROKERNEL_BENCHMARK_HDRS,
2946 deps = MICROKERNEL_BENCHMARK_DEPS,
2947)
2948
2949xnnpack_benchmark(
2950 name = "f32_raddextexp_bench",
2951 srcs = [
2952 "bench/f32-raddextexp.cc",
2953 "src/xnnpack/AlignedAllocator.h",
2954 ] + MICROKERNEL_BENCHMARK_HDRS,
2955 deps = MICROKERNEL_BENCHMARK_DEPS,
2956)
2957
2958xnnpack_benchmark(
2959 name = "f32_raddstoreexpminusmax_bench",
2960 srcs = [
2961 "bench/f32-raddstoreexpminusmax.cc",
2962 "src/xnnpack/AlignedAllocator.h",
2963 ] + MICROKERNEL_BENCHMARK_HDRS,
2964 deps = MICROKERNEL_BENCHMARK_DEPS,
2965)
2966
2967xnnpack_benchmark(
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2968 name = "f32_rmax_bench",
2969 srcs = [
2970 "bench/f32-rmax.cc",
2971 "src/xnnpack/AlignedAllocator.h",
2972 ] + MICROKERNEL_BENCHMARK_HDRS,
2973 deps = MICROKERNEL_BENCHMARK_DEPS,
2974)
2975
2976xnnpack_benchmark(
Marat Dukhan14bec502019-11-18 11:35:31 -0800[diff] [blame]2977 name = "f32_sigmoid_bench",
2978 srcs = [
2979 "bench/f32-sigmoid.cc",
2980 "src/xnnpack/AlignedAllocator.h",
2981 ] + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhan14bec502019-11-18 11:35:31 -0800[diff] [blame]2982 deps = MICROKERNEL_BENCHMARK_DEPS,
2983)
2984
2985xnnpack_benchmark(
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2986 name = "f32_spmm_bench",
2987 srcs = [
2988 "bench/f32-spmm.cc",
2989 "bench/gemm.h",
2990 "src/xnnpack/AlignedAllocator.h",
2991 ] + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2992 deps = MICROKERNEL_BENCHMARK_DEPS,
2993)
2994
2995xnnpack_benchmark(
Marat Dukhanfd8e6892020-01-27 15:25:25 -0800[diff] [blame]2996 name = "f32_softmax_bench",
Marat Dukhan4a4a7fa2019-10-21 13:46:14 -0700[diff] [blame]2997 srcs = [
Marat Dukhanfd8e6892020-01-27 15:25:25 -0800[diff] [blame]2998 "bench/f32-softmax.cc",
Marat Dukhan4a4a7fa2019-10-21 13:46:14 -0700[diff] [blame]2999 ] + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]3000 copts = xnnpack_optional_dnnl_copts(),
Marat Dukhan8d3c6932020-03-06 20:27:27 -0800[diff] [blame]3001 deps = MICROKERNEL_BENCHMARK_DEPS + xnnpack_optional_dnnl_deps(),
Marat Dukhan4a4a7fa2019-10-21 13:46:14 -0700[diff] [blame]3002)
3003
3004xnnpack_benchmark(
Marat Dukhan4c4eb002019-12-08 21:27:49 -0800[diff] [blame]3005 name = "f32_vscaleexpminusmax_bench",
3006 srcs = [
3007 "bench/f32-vscaleexpminusmax.cc",
3008 "src/xnnpack/AlignedAllocator.h",
3009 ] + MICROKERNEL_BENCHMARK_HDRS,
3010 deps = MICROKERNEL_BENCHMARK_DEPS,
3011)
3012
3013xnnpack_benchmark(
3014 name = "f32_vscaleextexp_bench",
3015 srcs = [
3016 "bench/f32-vscaleextexp.cc",
3017 "src/xnnpack/AlignedAllocator.h",
3018 ] + MICROKERNEL_BENCHMARK_HDRS,
3019 deps = MICROKERNEL_BENCHMARK_DEPS,
3020)
3021
3022xnnpack_benchmark(
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3023 name = "f32_im2col_gemm_bench",
3024 srcs = [
3025 "bench/f32-im2col-gemm.cc",
3026 "bench/conv.h",
3027 "src/xnnpack/AlignedAllocator.h",
3028 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_BENCHMARK_HDRS,
3029 deps = MICROKERNEL_BENCHMARK_DEPS + [":im2col"],
3030)
3031
Marat Dukhanfe7acb62020-03-09 19:30:05 -0700[diff] [blame]3032xnnpack_benchmark(
3033 name = "requantization_bench",
3034 srcs = [
3035 "bench/requantization.cc",
3036 "src/xnnpack/requantization-stubs.h",
3037 "src/xnnpack/AlignedAllocator.h",
3038 ] + MICROKERNEL_BENCHMARK_HDRS,
3039 deps = MICROKERNEL_BENCHMARK_DEPS,
3040)
3041
Marat Dukhanffbf96a2020-05-14 02:59:08 -0700[diff] [blame]3042xnnpack_benchmark(
3043 name = "rounding_bench",
3044 srcs = [
3045 "bench/rounding.cc",
3046 "src/xnnpack/math-stubs.h",
3047 "src/xnnpack/AlignedAllocator.h",
3048 ] + MICROKERNEL_BENCHMARK_HDRS,
3049 deps = MICROKERNEL_BENCHMARK_DEPS,
3050)
3051
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3052########################### Benchmarks for operators ###########################
3053
3054xnnpack_benchmark(
3055 name = "add_bench",
3056 srcs = ["bench/add.cc"],
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]3057 deps = OPERATOR_BENCHMARK_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3058)
3059
3060xnnpack_benchmark(
3061 name = "average_pooling_bench",
3062 srcs = ["bench/average-pooling.cc"],
Marat Dukhan7a16d8b2020-03-11 04:22:44 -0700[diff] [blame]3063 copts = xnnpack_optional_tflite_copts(),
Marat Dukhan8ea0b072020-04-23 16:12:18 -0700[diff] [blame]3064 tags = ["nowin32"],
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]3065 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3066)
3067
3068xnnpack_benchmark(
3069 name = "channel_shuffle_bench",
3070 srcs = ["bench/channel-shuffle.cc"],
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]3071 deps = OPERATOR_BENCHMARK_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3072)
3073
3074xnnpack_benchmark(
3075 name = "convolution_bench",
3076 srcs = ["bench/convolution.cc"],
3077 copts = xnnpack_optional_tflite_copts() + xnnpack_optional_armcl_copts(),
Marat Dukhan8ea0b072020-04-23 16:12:18 -0700[diff] [blame]3078 tags = ["nowin32"],
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]3079 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps() + xnnpack_optional_armcl_deps(),
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3080)
3081
3082xnnpack_benchmark(
3083 name = "deconvolution_bench",
3084 srcs = ["bench/deconvolution.cc"],
3085 copts = xnnpack_optional_tflite_copts(),
Marat Dukhan8ea0b072020-04-23 16:12:18 -0700[diff] [blame]3086 tags = ["nowin32"],
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]3087 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3088)
3089
3090xnnpack_benchmark(
3091 name = "global_average_pooling_bench",
3092 srcs = ["bench/global-average-pooling.cc"],
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]3093 deps = OPERATOR_BENCHMARK_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3094)
3095
3096xnnpack_benchmark(
3097 name = "max_pooling_bench",
3098 srcs = ["bench/max-pooling.cc"],
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]3099 deps = OPERATOR_BENCHMARK_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3100)
3101
3102xnnpack_benchmark(
3103 name = "sigmoid_bench",
3104 srcs = ["bench/sigmoid.cc"],
Marat Dukhanc3b9e862019-11-17 13:18:54 -0800[diff] [blame]3105 copts = xnnpack_optional_tflite_copts(),
Marat Dukhanca2ba702020-04-24 01:31:47 -0700[diff] [blame]3106 tags = ["nowin32"],
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]3107 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3108)
3109
3110xnnpack_benchmark(
Marat Dukhan95b22432019-10-30 16:30:14 -0700[diff] [blame]3111 name = "prelu_bench",
3112 srcs = ["bench/prelu.cc"],
3113 copts = xnnpack_optional_tflite_copts(),
Marat Dukhan8ea0b072020-04-23 16:12:18 -0700[diff] [blame]3114 tags = ["nowin32"],
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]3115 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
Marat Dukhan95b22432019-10-30 16:30:14 -0700[diff] [blame]3116)
3117
3118xnnpack_benchmark(
Marat Dukhanfd8e6892020-01-27 15:25:25 -0800[diff] [blame]3119 name = "softmax_bench",
3120 srcs = ["bench/softmax.cc"],
Marat Dukhan9c0db962020-01-28 12:30:14 -0800[diff] [blame]3121 copts = xnnpack_optional_tflite_copts(),
Marat Dukhanca2ba702020-04-24 01:31:47 -0700[diff] [blame]3122 tags = ["nowin32"],
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]3123 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3124)
3125
Marat Dukhanc068bb62019-10-04 13:24:39 -0700[diff] [blame]3126############################# End-to-end benchmarks ############################
3127
3128cc_library(
3129 name = "mobilenet_v1",
3130 srcs = ["models/mobilenet-v1.cc"],
3131 hdrs = ["models/models.h"],
Marat Dukhana84e40b2019-12-11 15:38:03 -0800[diff] [blame]3132 copts = xnnpack_std_cxxopts(),
Marat Dukhanc068bb62019-10-04 13:24:39 -0700[diff] [blame]3133 linkstatic = True,
3134 deps = [
3135 ":XNNPACK",
3136 "@pthreadpool",
3137 ],
3138)
3139
3140cc_library(
3141 name = "mobilenet_v2",
3142 srcs = ["models/mobilenet-v2.cc"],
3143 hdrs = ["models/models.h"],
Marat Dukhana84e40b2019-12-11 15:38:03 -0800[diff] [blame]3144 copts = xnnpack_std_cxxopts(),
Marat Dukhanc068bb62019-10-04 13:24:39 -0700[diff] [blame]3145 linkstatic = True,
3146 deps = [
3147 ":XNNPACK",
3148 "@pthreadpool",
3149 ],
3150)
3151
Marat Dukhanc08cdf52019-12-09 09:17:51 -0800[diff] [blame]3152cc_library(
3153 name = "mobilenet_v3_large",
3154 srcs = ["models/mobilenet-v3-large.cc"],
3155 hdrs = ["models/models.h"],
Marat Dukhana84e40b2019-12-11 15:38:03 -0800[diff] [blame]3156 copts = xnnpack_std_cxxopts(),
Marat Dukhanc08cdf52019-12-09 09:17:51 -0800[diff] [blame]3157 linkstatic = True,
3158 deps = [
3159 ":XNNPACK",
3160 "@pthreadpool",
3161 ],
3162)
3163
3164cc_library(
3165 name = "mobilenet_v3_small",
3166 srcs = ["models/mobilenet-v3-small.cc"],
3167 hdrs = ["models/models.h"],
Marat Dukhana84e40b2019-12-11 15:38:03 -0800[diff] [blame]3168 copts = xnnpack_std_cxxopts(),
Marat Dukhanc08cdf52019-12-09 09:17:51 -0800[diff] [blame]3169 linkstatic = True,
3170 deps = [
3171 ":XNNPACK",
3172 "@pthreadpool",
3173 ],
3174)
3175
Marat Dukhanc068bb62019-10-04 13:24:39 -0700[diff] [blame]3176xnnpack_benchmark(
Marat Dukhanef4416e2019-10-31 13:44:40 -0700[diff] [blame]3177 name = "f32_dwconv_e2e_bench",
Marat Dukhanc08cdf52019-12-09 09:17:51 -0800[diff] [blame]3178 srcs = [
3179 "bench/f32-dwconv-e2e.cc",
3180 "bench/end2end.h",
3181 ] + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhanef4416e2019-10-31 13:44:40 -0700[diff] [blame]3182 deps = MICROKERNEL_BENCHMARK_DEPS + [
3183 ":XNNPACK",
3184 ":mobilenet_v1",
3185 ":mobilenet_v2",
Marat Dukhanc08cdf52019-12-09 09:17:51 -0800[diff] [blame]3186 ":mobilenet_v3_large",
3187 ":mobilenet_v3_small",
Marat Dukhanef4416e2019-10-31 13:44:40 -0700[diff] [blame]3188 ],
3189)
3190
3191xnnpack_benchmark(
Marat Dukhan5f18d262019-10-31 10:24:14 -0700[diff] [blame]3192 name = "f32_gemm_e2e_bench",
Marat Dukhanc08cdf52019-12-09 09:17:51 -0800[diff] [blame]3193 srcs = [
3194 "bench/f32-gemm-e2e.cc",
3195 "bench/end2end.h",
3196 ] + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhan5f18d262019-10-31 10:24:14 -0700[diff] [blame]3197 deps = MICROKERNEL_BENCHMARK_DEPS + [
3198 ":XNNPACK",
3199 ":mobilenet_v1",
3200 ":mobilenet_v2",
Marat Dukhanc08cdf52019-12-09 09:17:51 -0800[diff] [blame]3201 ":mobilenet_v3_large",
3202 ":mobilenet_v3_small",
Marat Dukhan5f18d262019-10-31 10:24:14 -0700[diff] [blame]3203 ],
3204)
3205
3206xnnpack_benchmark(
Marat Dukhanc068bb62019-10-04 13:24:39 -0700[diff] [blame]3207 name = "end2end_bench",
3208 srcs = ["bench/end2end.cc"],
3209 deps = [
3210 ":XNNPACK",
Frank Barchardc712fa42019-10-31 14:00:21 -0700[diff] [blame]3211 ":bench_utils",
Marat Dukhanc068bb62019-10-04 13:24:39 -0700[diff] [blame]3212 ":mobilenet_v1",
3213 ":mobilenet_v2",
Marat Dukhanc08cdf52019-12-09 09:17:51 -0800[diff] [blame]3214 ":mobilenet_v3_large",
3215 ":mobilenet_v3_small",
Marat Dukhanc068bb62019-10-04 13:24:39 -0700[diff] [blame]3216 "@pthreadpool",
3217 ],
3218)
3219
Marat Dukhan6adff4e2019-10-14 18:32:07 -0700[diff] [blame]3220#################### Accuracy evaluation for math functions ####################
3221
3222xnnpack_benchmark(
3223 name = "f32_exp_eval",
3224 srcs = [
3225 "eval/f32-exp.cc",
3226 "src/xnnpack/AlignedAllocator.h",
3227 ] + ACCURACY_EVAL_HDRS,
3228 deps = ACCURACY_EVAL_DEPS,
3229)
3230
Marat Dukhan515c9772019-10-17 18:07:57 -0700[diff] [blame]3231xnnpack_benchmark(
3232 name = "f32_expminus_eval",
3233 srcs = [
3234 "eval/f32-expminus.cc",
3235 "src/xnnpack/AlignedAllocator.h",
3236 ] + ACCURACY_EVAL_HDRS,
3237 deps = ACCURACY_EVAL_DEPS,
3238)
3239
Marat Dukhan98ba4412019-10-23 02:14:28 -0700[diff] [blame]3240xnnpack_benchmark(
3241 name = "f32_extexp_eval",
3242 srcs = [
3243 "eval/f32-extexp.cc",
3244 "src/xnnpack/AlignedAllocator.h",
3245 ] + ACCURACY_EVAL_HDRS,
3246 deps = ACCURACY_EVAL_DEPS,
3247)
3248
Marat Dukhan8853b822020-05-07 12:19:01 -0700[diff] [blame]3249xnnpack_unit_test(
3250 name = "f32_roundne_eval",
3251 srcs = [
3252 "eval/f32-roundne.cc",
3253 "src/xnnpack/AlignedAllocator.h",
3254 "src/xnnpack/math-stubs.h",
3255 ] + MICROKERNEL_TEST_HDRS,
Marat Dukhan22eed3d2020-05-11 20:13:37 -0700[diff] [blame]3256 automatic = False,
Marat Dukhan8853b822020-05-07 12:19:01 -0700[diff] [blame]3257 deps = MICROKERNEL_TEST_DEPS,
3258)
3259
Marat Dukhan2dbb9442020-05-12 20:43:43 -0700[diff] [blame]3260xnnpack_unit_test(
Marat Dukhanc9852ba2020-05-13 17:21:29 -0700[diff] [blame]3261 name = "f32_roundd_eval",
3262 srcs = [
3263 "eval/f32-roundd.cc",
3264 "src/xnnpack/AlignedAllocator.h",
3265 "src/xnnpack/math-stubs.h",
3266 ] + MICROKERNEL_TEST_HDRS,
3267 automatic = False,
3268 deps = MICROKERNEL_TEST_DEPS,
3269)
3270
3271xnnpack_unit_test(
3272 name = "f32_roundu_eval",
3273 srcs = [
3274 "eval/f32-roundu.cc",
3275 "src/xnnpack/AlignedAllocator.h",
3276 "src/xnnpack/math-stubs.h",
3277 ] + MICROKERNEL_TEST_HDRS,
3278 automatic = False,
3279 deps = MICROKERNEL_TEST_DEPS,
3280)
3281
3282xnnpack_unit_test(
Marat Dukhan2dbb9442020-05-12 20:43:43 -0700[diff] [blame]3283 name = "f32_roundz_eval",
3284 srcs = [
3285 "eval/f32-roundz.cc",
3286 "src/xnnpack/AlignedAllocator.h",
3287 "src/xnnpack/math-stubs.h",
3288 ] + MICROKERNEL_TEST_HDRS,
Marat Dukhanc9852ba2020-05-13 17:21:29 -0700[diff] [blame]3289 automatic = False,
Marat Dukhan2dbb9442020-05-12 20:43:43 -0700[diff] [blame]3290 deps = MICROKERNEL_TEST_DEPS,
3291)
3292
Marat Dukhan346a9e52019-11-15 09:06:30 -0800[diff] [blame]3293xnnpack_benchmark(
3294 name = "f32_sigmoid_eval",
3295 srcs = [
3296 "eval/f32-sigmoid.cc",
3297 "src/xnnpack/AlignedAllocator.h",
3298 ] + ACCURACY_EVAL_HDRS,
3299 deps = ACCURACY_EVAL_DEPS,
3300)
3301
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3302######################### Unit tests for micro-kernels #########################
3303
3304xnnpack_unit_test(
Marat Dukhande06f492020-04-09 00:19:31 -0700[diff] [blame]3305 name = "f16_gemm_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3306 srcs = [
Marat Dukhande06f492020-04-09 00:19:31 -0700[diff] [blame]3307 "test/f16-gemm-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3308 "test/gemm-microkernel-tester.h",
3309 "src/xnnpack/AlignedAllocator.h",
3310 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
3311 deps = MICROKERNEL_TEST_DEPS,
3312)
3313
3314xnnpack_unit_test(
Marat Dukhan355ab432020-04-09 19:01:52 -0700[diff] [blame]3315 name = "f16_spmm_minmax_test",
Marat Dukhanbdb56f52020-02-05 21:42:49 -0800[diff] [blame]3316 srcs = [
Marat Dukhan355ab432020-04-09 19:01:52 -0700[diff] [blame]3317 "test/f16-spmm-minmax.cc",
Marat Dukhanbdb56f52020-02-05 21:42:49 -0800[diff] [blame]3318 "test/spmm-microkernel-tester.h",
3319 "src/xnnpack/AlignedAllocator.h",
3320 ] + MICROKERNEL_TEST_HDRS,
3321 deps = MICROKERNEL_TEST_DEPS,
3322)
3323
3324xnnpack_unit_test(
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3325 name = "f32_argmaxpool_test",
3326 srcs = [
3327 "test/f32-argmaxpool.cc",
3328 "test/argmaxpool-microkernel-tester.h",
3329 "src/xnnpack/AlignedAllocator.h",
3330 ] + MICROKERNEL_TEST_HDRS,
3331 deps = MICROKERNEL_TEST_DEPS,
3332)
3333
3334xnnpack_unit_test(
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]3335 name = "f32_avgpool_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3336 srcs = [
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]3337 "test/f32-avgpool-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3338 "test/avgpool-microkernel-tester.h",
3339 "src/xnnpack/AlignedAllocator.h",
3340 ] + MICROKERNEL_TEST_HDRS,
3341 deps = MICROKERNEL_TEST_DEPS,
3342)
3343
3344xnnpack_unit_test(
Marat Dukhan660fd192020-03-10 04:55:30 -0700[diff] [blame]3345 name = "f32_ibilinear_test",
Marat Dukhan35dacfb2019-11-07 19:18:16 -0800[diff] [blame]3346 srcs = [
Marat Dukhan660fd192020-03-10 04:55:30 -0700[diff] [blame]3347 "test/f32-ibilinear.cc",
3348 "test/ibilinear-microkernel-tester.h",
Marat Dukhan35dacfb2019-11-07 19:18:16 -0800[diff] [blame]3349 "src/xnnpack/AlignedAllocator.h",
3350 ] + MICROKERNEL_TEST_HDRS,
3351 deps = MICROKERNEL_TEST_DEPS,
3352)
3353
3354xnnpack_unit_test(
Frank Barchardb1966592020-05-12 13:47:06 -0700[diff] [blame]3355 name = "f16_clamp_test",
3356 srcs = [
3357 "test/f16-clamp.cc",
3358 "test/clamp-microkernel-tester.h",
3359 ] + MICROKERNEL_TEST_HDRS,
3360 deps = MICROKERNEL_TEST_DEPS,
3361)
3362
3363xnnpack_unit_test(
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3364 name = "f32_clamp_test",
3365 srcs = [
3366 "test/f32-clamp.cc",
3367 "test/clamp-microkernel-tester.h",
3368 ] + MICROKERNEL_TEST_HDRS,
3369 deps = MICROKERNEL_TEST_DEPS,
3370)
3371
3372xnnpack_unit_test(
Marat Dukhan163a7e62020-04-09 04:19:26 -0700[diff] [blame]3373 name = "f32_igemm_test",
3374 srcs = [
3375 "test/f32-igemm.cc",
3376 "test/gemm-microkernel-tester.h",
3377 "src/xnnpack/AlignedAllocator.h",
3378 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
3379 deps = MICROKERNEL_TEST_DEPS,
3380)
3381
3382xnnpack_unit_test(
Marat Dukhan467f6362020-05-22 23:21:55 -0700[diff] [blame]3383 name = "f32_igemm_relu_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3384 srcs = [
Marat Dukhan467f6362020-05-22 23:21:55 -0700[diff] [blame]3385 "test/f32-igemm-relu.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3386 "test/gemm-microkernel-tester.h",
3387 "src/xnnpack/AlignedAllocator.h",
3388 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
3389 deps = MICROKERNEL_TEST_DEPS,
3390)
3391
3392xnnpack_unit_test(
Marat Dukhane207b7b2020-05-28 16:27:42 -0700[diff] [blame]3393 name = "f32_igemm_minmax_test",
3394 srcs = [
3395 "test/f32-igemm-minmax.cc",
3396 "test/gemm-microkernel-tester.h",
3397 "src/xnnpack/AlignedAllocator.h",
3398 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
3399 deps = MICROKERNEL_TEST_DEPS,
3400)
3401
3402xnnpack_unit_test(
Frank Barchardb0e4fae2020-05-04 15:27:51 -0700[diff] [blame]3403 name = "f16_igemm_minmax_test",
3404 srcs = [
3405 "test/f16-igemm-minmax.cc",
3406 "test/gemm-microkernel-tester.h",
3407 "src/xnnpack/AlignedAllocator.h",
3408 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
3409 deps = MICROKERNEL_TEST_DEPS,
3410)
3411
3412xnnpack_unit_test(
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3413 name = "f32_conv_hwc_test",
3414 srcs = [
3415 "test/f32-conv-hwc.cc",
3416 "test/conv-hwc-microkernel-tester.h",
3417 "src/xnnpack/AlignedAllocator.h",
3418 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
3419 deps = MICROKERNEL_TEST_DEPS,
3420)
3421
3422xnnpack_unit_test(
Marat Dukhan1f29b802020-05-15 23:46:39 -0700[diff] [blame]3423 name = "f32_conv_hwc2chw_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3424 srcs = [
Marat Dukhan1f29b802020-05-15 23:46:39 -0700[diff] [blame]3425 "test/f32-conv-hwc2chw.cc",
3426 "test/conv-hwc2chw-microkernel-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3427 "src/xnnpack/AlignedAllocator.h",
3428 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
3429 deps = MICROKERNEL_TEST_DEPS,
3430)
3431
3432xnnpack_unit_test(
Marat Dukhan163a7e62020-04-09 04:19:26 -0700[diff] [blame]3433 name = "f32_dwconv_test",
3434 srcs = [
3435 "test/f32-dwconv.cc",
3436 "test/dwconv-microkernel-tester.h",
3437 "src/xnnpack/AlignedAllocator.h",
3438 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
3439 deps = MICROKERNEL_TEST_DEPS,
3440)
3441
3442xnnpack_unit_test(
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]3443 name = "f32_dwconv_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3444 srcs = [
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]3445 "test/f32-dwconv-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3446 "test/dwconv-microkernel-tester.h",
3447 "src/xnnpack/AlignedAllocator.h",
3448 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
3449 deps = MICROKERNEL_TEST_DEPS,
3450)
3451
3452xnnpack_unit_test(
Marat Dukhan1f29b802020-05-15 23:46:39 -0700[diff] [blame]3453 name = "f32_dwconv_chw_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3454 srcs = [
Marat Dukhan1f29b802020-05-15 23:46:39 -0700[diff] [blame]3455 "test/f32-dwconv-chw.cc",
3456 "test/dwconv-chw-microkernel-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3457 "src/xnnpack/AlignedAllocator.h",
3458 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
3459 deps = MICROKERNEL_TEST_DEPS,
3460)
3461
3462xnnpack_unit_test(
Frank Barchard0bb49a72020-06-04 11:35:11 -0700[diff] [blame]3463 name = "f16_gavgpool_minmax_test",
3464 srcs = [
3465 "test/f16-gavgpool-minmax.cc",
3466 "test/gavgpool-microkernel-tester.h",
3467 "src/xnnpack/AlignedAllocator.h",
3468 ] + MICROKERNEL_TEST_HDRS,
3469 deps = MICROKERNEL_TEST_DEPS,
3470)
3471
3472xnnpack_unit_test(
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]3473 name = "f32_gavgpool_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3474 srcs = [
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]3475 "test/f32-gavgpool-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3476 "test/gavgpool-microkernel-tester.h",
3477 "src/xnnpack/AlignedAllocator.h",
3478 ] + MICROKERNEL_TEST_HDRS,
3479 deps = MICROKERNEL_TEST_DEPS,
3480)
3481
3482xnnpack_unit_test(
Marat Dukhan1f29b802020-05-15 23:46:39 -0700[diff] [blame]3483 name = "f32_gavgpool_cw_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3484 srcs = [
Marat Dukhan1f29b802020-05-15 23:46:39 -0700[diff] [blame]3485 "test/f32-gavgpool-cw.cc",
3486 "test/gavgpool-cw-microkernel-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3487 "src/xnnpack/AlignedAllocator.h",
3488 ] + MICROKERNEL_TEST_HDRS,
3489 deps = MICROKERNEL_TEST_DEPS,
3490)
3491
3492xnnpack_unit_test(
Marat Dukhan163a7e62020-04-09 04:19:26 -0700[diff] [blame]3493 name = "f32_gemm_test",
3494 srcs = [
3495 "test/f32-gemm.cc",
3496 "test/gemm-microkernel-tester.h",
3497 "src/xnnpack/AlignedAllocator.h",
3498 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
3499 deps = MICROKERNEL_TEST_DEPS,
3500)
3501
3502xnnpack_unit_test(
Marat Dukhan467f6362020-05-22 23:21:55 -0700[diff] [blame]3503 name = "f32_gemm_relu_test",
3504 srcs = [
3505 "test/f32-gemm-relu.cc",
3506 "test/gemm-microkernel-tester.h",
3507 "src/xnnpack/AlignedAllocator.h",
3508 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
3509 deps = MICROKERNEL_TEST_DEPS,
3510)
3511
3512xnnpack_unit_test(
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]3513 name = "f32_gemm_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3514 srcs = [
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]3515 "test/f32-gemm-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3516 "test/gemm-microkernel-tester.h",
3517 "src/xnnpack/AlignedAllocator.h",
3518 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
3519 deps = MICROKERNEL_TEST_DEPS,
3520)
3521
3522xnnpack_unit_test(
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]3523 name = "f32_gemminc_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3524 srcs = [
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]3525 "test/f32-gemminc-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3526 "test/gemm-microkernel-tester.h",
3527 "src/xnnpack/AlignedAllocator.h",
3528 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
3529 deps = MICROKERNEL_TEST_DEPS,
3530)
3531
3532xnnpack_unit_test(
Frank Barchardb1966592020-05-12 13:47:06 -0700[diff] [blame]3533 name = "f16_hswish_test",
3534 srcs = [
3535 "test/f16-hswish.cc",
3536 "test/hswish-microkernel-tester.h",
3537 ] + MICROKERNEL_TEST_HDRS,
3538 deps = MICROKERNEL_TEST_DEPS,
3539)
3540
3541xnnpack_unit_test(
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3542 name = "f32_hswish_test",
3543 srcs = [
3544 "test/f32-hswish.cc",
3545 "test/hswish-microkernel-tester.h",
3546 ] + MICROKERNEL_TEST_HDRS,
3547 deps = MICROKERNEL_TEST_DEPS,
3548)
3549
3550xnnpack_unit_test(
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]3551 name = "f32_maxpool_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3552 srcs = [
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]3553 "test/f32-maxpool-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3554 "test/maxpool-microkernel-tester.h",
3555 ] + MICROKERNEL_TEST_HDRS,
3556 deps = MICROKERNEL_TEST_DEPS,
3557)
3558
3559xnnpack_unit_test(
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]3560 name = "f32_pavgpool_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3561 srcs = [
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]3562 "test/f32-pavgpool-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3563 "test/avgpool-microkernel-tester.h",
3564 "src/xnnpack/AlignedAllocator.h",
3565 ] + MICROKERNEL_TEST_HDRS,
3566 deps = MICROKERNEL_TEST_DEPS,
3567)
3568
3569xnnpack_unit_test(
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]3570 name = "f32_ppmm_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3571 srcs = [
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]3572 "test/f32-ppmm-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3573 "test/gemm-microkernel-tester.h",
3574 "src/xnnpack/AlignedAllocator.h",
3575 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
3576 deps = MICROKERNEL_TEST_DEPS,
3577)
3578
3579xnnpack_unit_test(
Frank Barchardb1966592020-05-12 13:47:06 -0700[diff] [blame]3580 name = "f16_prelu_test",
3581 srcs = [
3582 "test/f16-prelu.cc",
3583 "test/prelu-microkernel-tester.h",
3584 "src/xnnpack/AlignedAllocator.h",
3585 ] + MICROKERNEL_TEST_HDRS,
3586 deps = MICROKERNEL_TEST_DEPS,
3587)
3588
3589xnnpack_unit_test(
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3590 name = "f32_prelu_test",
3591 srcs = [
3592 "test/f32-prelu.cc",
3593 "test/prelu-microkernel-tester.h",
3594 "src/xnnpack/AlignedAllocator.h",
3595 ] + MICROKERNEL_TEST_HDRS,
3596 deps = MICROKERNEL_TEST_DEPS,
3597)
3598
3599xnnpack_unit_test(
Marat Dukhan97579532019-10-18 16:40:39 -0700[diff] [blame]3600 name = "f32_raddexpminusmax_test",
3601 srcs = [
3602 "test/f32-raddexpminusmax.cc",
3603 "test/raddexpminusmax-microkernel-tester.h",
3604 ] + MICROKERNEL_TEST_HDRS,
3605 deps = MICROKERNEL_TEST_DEPS,
3606)
3607
3608xnnpack_unit_test(
Marat Dukhan6f8d4d32019-10-25 17:07:09 -0700[diff] [blame]3609 name = "f32_raddextexp_test",
3610 srcs = [
3611 "test/f32-raddextexp.cc",
3612 "test/raddextexp-microkernel-tester.h",
3613 ] + MICROKERNEL_TEST_HDRS,
3614 deps = MICROKERNEL_TEST_DEPS,
3615)
3616
3617xnnpack_unit_test(
Marat Dukhan97579532019-10-18 16:40:39 -0700[diff] [blame]3618 name = "f32_raddstoreexpminusmax_test",
3619 srcs = [
3620 "test/f32-raddstoreexpminusmax.cc",
3621 "test/raddstoreexpminusmax-microkernel-tester.h",
3622 ] + MICROKERNEL_TEST_HDRS,
3623 deps = MICROKERNEL_TEST_DEPS,
3624)
3625
3626xnnpack_unit_test(
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3627 name = "f32_rmax_test",
3628 srcs = [
3629 "test/f32-rmax.cc",
3630 "test/rmax-microkernel-tester.h",
3631 ] + MICROKERNEL_TEST_HDRS,
3632 deps = MICROKERNEL_TEST_DEPS,
3633)
3634
3635xnnpack_unit_test(
Marat Dukhan346a9e52019-11-15 09:06:30 -0800[diff] [blame]3636 name = "f32_sigmoid_test",
3637 srcs = [
3638 "test/f32-sigmoid.cc",
Marat Dukhan1e782c42019-11-21 17:02:40 -0800[diff] [blame]3639 "test/vunary-microkernel-tester.h",
Marat Dukhan346a9e52019-11-15 09:06:30 -0800[diff] [blame]3640 ] + MICROKERNEL_TEST_HDRS,
3641 deps = MICROKERNEL_TEST_DEPS,
3642)
3643
3644xnnpack_unit_test(
Marat Dukhan355ab432020-04-09 19:01:52 -0700[diff] [blame]3645 name = "f32_spmm_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3646 srcs = [
Marat Dukhan355ab432020-04-09 19:01:52 -0700[diff] [blame]3647 "test/f32-spmm-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3648 "test/spmm-microkernel-tester.h",
3649 "src/xnnpack/AlignedAllocator.h",
3650 ] + MICROKERNEL_TEST_HDRS,
3651 deps = MICROKERNEL_TEST_DEPS,
3652)
3653
3654xnnpack_unit_test(
Frank Barchardd793f6c2020-05-08 13:37:43 -0700[diff] [blame]3655 name = "f16_vadd_minmax_test",
3656 srcs = [
3657 "test/f16-vadd-minmax.cc",
3658 "test/vbinary-microkernel-tester.h",
3659 ] + MICROKERNEL_TEST_HDRS,
3660 deps = MICROKERNEL_TEST_DEPS,
3661)
3662
3663xnnpack_unit_test(
3664 name = "f16_vaddc_minmax_test",
3665 srcs = [
3666 "test/f16-vaddc-minmax.cc",
3667 "test/vbinaryc-microkernel-tester.h",
3668 ] + MICROKERNEL_TEST_HDRS,
3669 deps = MICROKERNEL_TEST_DEPS,
3670)
3671
3672xnnpack_unit_test(
3673 name = "f16_vdiv_minmax_test",
3674 srcs = [
3675 "test/f16-vdiv-minmax.cc",
3676 "test/vbinary-microkernel-tester.h",
3677 ] + MICROKERNEL_TEST_HDRS,
3678 deps = MICROKERNEL_TEST_DEPS,
3679)
3680
3681xnnpack_unit_test(
3682 name = "f16_vdivc_minmax_test",
3683 srcs = [
3684 "test/f16-vdivc-minmax.cc",
3685 "test/vbinaryc-microkernel-tester.h",
3686 ] + MICROKERNEL_TEST_HDRS,
3687 deps = MICROKERNEL_TEST_DEPS,
3688)
3689
3690xnnpack_unit_test(
3691 name = "f16_vrdivc_minmax_test",
3692 srcs = [
3693 "test/f16-vrdivc-minmax.cc",
3694 "test/vbinaryc-microkernel-tester.h",
3695 ] + MICROKERNEL_TEST_HDRS,
3696 deps = MICROKERNEL_TEST_DEPS,
3697)
3698
3699xnnpack_unit_test(
3700 name = "f16_vmax_test",
3701 srcs = [
3702 "test/f16-vmax.cc",
3703 "test/vbinary-microkernel-tester.h",
3704 ] + MICROKERNEL_TEST_HDRS,
3705 deps = MICROKERNEL_TEST_DEPS,
3706)
3707
3708xnnpack_unit_test(
3709 name = "f16_vmaxc_test",
3710 srcs = [
3711 "test/f16-vmaxc.cc",
3712 "test/vbinaryc-microkernel-tester.h",
3713 ] + MICROKERNEL_TEST_HDRS,
3714 deps = MICROKERNEL_TEST_DEPS,
3715)
3716
3717xnnpack_unit_test(
3718 name = "f16_vmin_test",
3719 srcs = [
3720 "test/f16-vmin.cc",
3721 "test/vbinary-microkernel-tester.h",
3722 ] + MICROKERNEL_TEST_HDRS,
3723 deps = MICROKERNEL_TEST_DEPS,
3724)
3725
3726xnnpack_unit_test(
3727 name = "f16_vminc_test",
3728 srcs = [
3729 "test/f16-vminc.cc",
3730 "test/vbinaryc-microkernel-tester.h",
3731 ] + MICROKERNEL_TEST_HDRS,
3732 deps = MICROKERNEL_TEST_DEPS,
3733)
3734
3735xnnpack_unit_test(
3736 name = "f16_vmul_minmax_test",
3737 srcs = [
3738 "test/f16-vmul-minmax.cc",
3739 "test/vbinary-microkernel-tester.h",
3740 ] + MICROKERNEL_TEST_HDRS,
3741 deps = MICROKERNEL_TEST_DEPS,
3742)
3743
3744xnnpack_unit_test(
3745 name = "f16_vmulc_minmax_test",
3746 srcs = [
3747 "test/f16-vmulc-minmax.cc",
3748 "test/vbinaryc-microkernel-tester.h",
3749 ] + MICROKERNEL_TEST_HDRS,
3750 deps = MICROKERNEL_TEST_DEPS,
3751)
3752
3753xnnpack_unit_test(
3754 name = "f16_vsub_minmax_test",
3755 srcs = [
3756 "test/f16-vsub-minmax.cc",
3757 "test/vbinary-microkernel-tester.h",
3758 ] + MICROKERNEL_TEST_HDRS,
3759 deps = MICROKERNEL_TEST_DEPS,
3760)
3761
3762xnnpack_unit_test(
3763 name = "f16_vsubc_minmax_test",
3764 srcs = [
3765 "test/f16-vsubc-minmax.cc",
3766 "test/vbinaryc-microkernel-tester.h",
3767 ] + MICROKERNEL_TEST_HDRS,
3768 deps = MICROKERNEL_TEST_DEPS,
3769)
3770
3771xnnpack_unit_test(
3772 name = "f16_vrsubc_minmax_test",
3773 srcs = [
3774 "test/f16-vrsubc-minmax.cc",
3775 "test/vbinaryc-microkernel-tester.h",
3776 ] + MICROKERNEL_TEST_HDRS,
3777 deps = MICROKERNEL_TEST_DEPS,
3778)
3779
3780xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]3781 name = "f32_vadd_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3782 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]3783 "test/f32-vadd-minmax.cc",
Marat Dukhan1e782c42019-11-21 17:02:40 -0800[diff] [blame]3784 "test/vbinary-microkernel-tester.h",
Marat Dukhanc07cb7f2019-11-14 15:32:05 -0800[diff] [blame]3785 ] + MICROKERNEL_TEST_HDRS,
3786 deps = MICROKERNEL_TEST_DEPS,
3787)
3788
3789xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]3790 name = "f32_vaddc_minmax_test",
Marat Dukhanc07cb7f2019-11-14 15:32:05 -0800[diff] [blame]3791 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]3792 "test/f32-vaddc-minmax.cc",
Marat Dukhan1e782c42019-11-21 17:02:40 -0800[diff] [blame]3793 "test/vbinaryc-microkernel-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3794 ] + MICROKERNEL_TEST_HDRS,
3795 deps = MICROKERNEL_TEST_DEPS,
3796)
3797
3798xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]3799 name = "f32_vdiv_minmax_test",
Marat Dukhan77ca6302019-12-06 12:48:15 -0800[diff] [blame]3800 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]3801 "test/f32-vdiv-minmax.cc",
Marat Dukhan77ca6302019-12-06 12:48:15 -0800[diff] [blame]3802 "test/vbinary-microkernel-tester.h",
3803 ] + MICROKERNEL_TEST_HDRS,
3804 deps = MICROKERNEL_TEST_DEPS,
3805)
3806
3807xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]3808 name = "f32_vdivc_minmax_test",
Marat Dukhan77ca6302019-12-06 12:48:15 -0800[diff] [blame]3809 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]3810 "test/f32-vdivc-minmax.cc",
Marat Dukhan77ca6302019-12-06 12:48:15 -0800[diff] [blame]3811 "test/vbinaryc-microkernel-tester.h",
3812 ] + MICROKERNEL_TEST_HDRS,
3813 deps = MICROKERNEL_TEST_DEPS,
3814)
3815
3816xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]3817 name = "f32_vrdivc_minmax_test",
Marat Dukhan77ca6302019-12-06 12:48:15 -0800[diff] [blame]3818 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]3819 "test/f32-vrdivc-minmax.cc",
Marat Dukhan77ca6302019-12-06 12:48:15 -0800[diff] [blame]3820 "test/vbinaryc-microkernel-tester.h",
3821 ] + MICROKERNEL_TEST_HDRS,
3822 deps = MICROKERNEL_TEST_DEPS,
3823)
3824
3825xnnpack_unit_test(
Marat Dukhan403b7d42019-12-05 12:49:11 -0800[diff] [blame]3826 name = "f32_vmax_test",
3827 srcs = [
3828 "test/f32-vmax.cc",
3829 "test/vbinary-microkernel-tester.h",
3830 ] + MICROKERNEL_TEST_HDRS,
3831 deps = MICROKERNEL_TEST_DEPS,
3832)
3833
3834xnnpack_unit_test(
3835 name = "f32_vmaxc_test",
3836 srcs = [
3837 "test/f32-vmaxc.cc",
3838 "test/vbinaryc-microkernel-tester.h",
3839 ] + MICROKERNEL_TEST_HDRS,
3840 deps = MICROKERNEL_TEST_DEPS,
3841)
3842
3843xnnpack_unit_test(
3844 name = "f32_vmin_test",
3845 srcs = [
3846 "test/f32-vmin.cc",
3847 "test/vbinary-microkernel-tester.h",
3848 ] + MICROKERNEL_TEST_HDRS,
3849 deps = MICROKERNEL_TEST_DEPS,
3850)
3851
3852xnnpack_unit_test(
3853 name = "f32_vminc_test",
3854 srcs = [
3855 "test/f32-vminc.cc",
3856 "test/vbinaryc-microkernel-tester.h",
3857 ] + MICROKERNEL_TEST_HDRS,
3858 deps = MICROKERNEL_TEST_DEPS,
3859)
3860
3861xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]3862 name = "f32_vmul_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3863 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]3864 "test/f32-vmul-minmax.cc",
Marat Dukhan1e782c42019-11-21 17:02:40 -0800[diff] [blame]3865 "test/vbinary-microkernel-tester.h",
Marat Dukhanc07cb7f2019-11-14 15:32:05 -0800[diff] [blame]3866 ] + MICROKERNEL_TEST_HDRS,
3867 deps = MICROKERNEL_TEST_DEPS,
3868)
3869
3870xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]3871 name = "f32_vmulc_minmax_test",
Marat Dukhanc07cb7f2019-11-14 15:32:05 -0800[diff] [blame]3872 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]3873 "test/f32-vmulc-minmax.cc",
Marat Dukhan1e782c42019-11-21 17:02:40 -0800[diff] [blame]3874 "test/vbinaryc-microkernel-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3875 ] + MICROKERNEL_TEST_HDRS,
3876 deps = MICROKERNEL_TEST_DEPS,
3877)
3878
3879xnnpack_unit_test(
Frank Barchard2a1049c2020-06-03 02:31:27 -0700[diff] [blame]3880 name = "f16_vmulcaddc_minmax_test",
3881 srcs = [
3882 "test/f16-vmulcaddc-minmax.cc",
3883 "test/vmulcaddc-microkernel-tester.h",
3884 "src/xnnpack/AlignedAllocator.h",
3885 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
3886 deps = MICROKERNEL_TEST_DEPS,
3887)
3888
3889xnnpack_unit_test(
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]3890 name = "f32_vmulcaddc_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3891 srcs = [
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]3892 "test/f32-vmulcaddc-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3893 "test/vmulcaddc-microkernel-tester.h",
3894 "src/xnnpack/AlignedAllocator.h",
3895 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
3896 deps = MICROKERNEL_TEST_DEPS,
3897)
3898
3899xnnpack_unit_test(
Marat Dukhan05ac8e32019-10-21 15:39:33 -0700[diff] [blame]3900 name = "f32_vscale_test",
3901 srcs = [
3902 "test/f32-vscale.cc",
3903 "test/vscale-microkernel-tester.h",
3904 ] + MICROKERNEL_TEST_HDRS,
3905 deps = MICROKERNEL_TEST_DEPS,
3906)
3907
3908xnnpack_unit_test(
Marat Dukhan97579532019-10-18 16:40:39 -0700[diff] [blame]3909 name = "f32_vscaleexpminusmax_test",
3910 srcs = [
3911 "test/f32-vscaleexpminusmax.cc",
3912 "test/vscaleexpminusmax-microkernel-tester.h",
3913 ] + MICROKERNEL_TEST_HDRS,
3914 deps = MICROKERNEL_TEST_DEPS,
3915)
3916
3917xnnpack_unit_test(
Marat Dukhan6f8d4d32019-10-25 17:07:09 -0700[diff] [blame]3918 name = "f32_vscaleextexp_test",
3919 srcs = [
3920 "test/f32-vscaleextexp.cc",
3921 "test/vscaleextexp-microkernel-tester.h",
3922 ] + MICROKERNEL_TEST_HDRS,
3923 deps = MICROKERNEL_TEST_DEPS,
3924)
3925
3926xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]3927 name = "f32_vsub_minmax_test",
Marat Dukhan97579532019-10-18 16:40:39 -0700[diff] [blame]3928 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]3929 "test/f32-vsub-minmax.cc",
Marat Dukhan1e782c42019-11-21 17:02:40 -0800[diff] [blame]3930 "test/vbinary-microkernel-tester.h",
Marat Dukhanc07cb7f2019-11-14 15:32:05 -0800[diff] [blame]3931 ] + MICROKERNEL_TEST_HDRS,
3932 deps = MICROKERNEL_TEST_DEPS,
3933)
3934
3935xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]3936 name = "f32_vsubc_minmax_test",
Marat Dukhanc07cb7f2019-11-14 15:32:05 -0800[diff] [blame]3937 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]3938 "test/f32-vsubc-minmax.cc",
Marat Dukhan1e782c42019-11-21 17:02:40 -0800[diff] [blame]3939 "test/vbinaryc-microkernel-tester.h",
Marat Dukhanc07cb7f2019-11-14 15:32:05 -0800[diff] [blame]3940 ] + MICROKERNEL_TEST_HDRS,
3941 deps = MICROKERNEL_TEST_DEPS,
3942)
3943
3944xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]3945 name = "f32_vrsubc_minmax_test",
Marat Dukhanc07cb7f2019-11-14 15:32:05 -0800[diff] [blame]3946 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]3947 "test/f32-vrsubc-minmax.cc",
Marat Dukhan1e782c42019-11-21 17:02:40 -0800[diff] [blame]3948 "test/vbinaryc-microkernel-tester.h",
Marat Dukhan97579532019-10-18 16:40:39 -0700[diff] [blame]3949 ] + MICROKERNEL_TEST_HDRS,
3950 deps = MICROKERNEL_TEST_DEPS,
3951)
3952
3953xnnpack_unit_test(
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]3954 name = "q8_avgpool_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3955 srcs = [
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]3956 "test/q8-avgpool-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3957 "test/avgpool-microkernel-tester.h",
3958 "src/xnnpack/AlignedAllocator.h",
3959 ] + MICROKERNEL_TEST_HDRS,
3960 deps = MICROKERNEL_TEST_DEPS,
3961)
3962
3963xnnpack_unit_test(
Marat Dukhande06f492020-04-09 00:19:31 -0700[diff] [blame]3964 name = "q8_igemm_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3965 srcs = [
Marat Dukhande06f492020-04-09 00:19:31 -0700[diff] [blame]3966 "test/q8-igemm-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3967 "test/gemm-microkernel-tester.h",
3968 "src/xnnpack/AlignedAllocator.h",
3969 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
3970 deps = MICROKERNEL_TEST_DEPS,
3971)
3972
3973xnnpack_unit_test(
Marat Dukhande06f492020-04-09 00:19:31 -0700[diff] [blame]3974 name = "q8_dwconv_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3975 srcs = [
Marat Dukhande06f492020-04-09 00:19:31 -0700[diff] [blame]3976 "test/q8-dwconv-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3977 "test/dwconv-microkernel-tester.h",
3978 "src/xnnpack/AlignedAllocator.h",
3979 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
3980 deps = MICROKERNEL_TEST_DEPS,
3981)
3982
3983xnnpack_unit_test(
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]3984 name = "q8_gavgpool_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3985 srcs = [
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]3986 "test/q8-gavgpool-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3987 "test/gavgpool-microkernel-tester.h",
3988 "src/xnnpack/AlignedAllocator.h",
3989 ] + MICROKERNEL_TEST_HDRS,
3990 deps = MICROKERNEL_TEST_DEPS,
3991)
3992
3993xnnpack_unit_test(
Marat Dukhande06f492020-04-09 00:19:31 -0700[diff] [blame]3994 name = "q8_gemm_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3995 srcs = [
Marat Dukhande06f492020-04-09 00:19:31 -0700[diff] [blame]3996 "test/q8-gemm-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3997 "test/gemm-microkernel-tester.h",
3998 "src/xnnpack/AlignedAllocator.h",
3999 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
4000 deps = MICROKERNEL_TEST_DEPS,
4001)
4002
4003xnnpack_unit_test(
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]4004 name = "q8_vadd_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4005 srcs = [
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]4006 "test/q8-vadd-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4007 "test/vadd-microkernel-tester.h",
4008 ] + MICROKERNEL_TEST_HDRS,
4009 deps = MICROKERNEL_TEST_DEPS,
4010)
4011
4012xnnpack_unit_test(
4013 name = "u8_clamp_test",
4014 srcs = [
4015 "test/u8-clamp.cc",
4016 "test/clamp-microkernel-tester.h",
4017 ] + MICROKERNEL_TEST_HDRS,
4018 deps = MICROKERNEL_TEST_DEPS,
4019)
4020
4021xnnpack_unit_test(
4022 name = "u8_lut32norm_test",
4023 srcs = [
4024 "test/u8-lut32norm.cc",
4025 "test/lut-norm-microkernel-tester.h",
4026 ] + MICROKERNEL_TEST_HDRS,
4027 deps = MICROKERNEL_TEST_DEPS,
4028)
4029
4030xnnpack_unit_test(
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]4031 name = "u8_maxpool_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4032 srcs = [
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]4033 "test/u8-maxpool-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4034 "test/maxpool-microkernel-tester.h",
4035 ] + MICROKERNEL_TEST_HDRS,
4036 deps = MICROKERNEL_TEST_DEPS,
4037)
4038
4039xnnpack_unit_test(
4040 name = "u8_rmax_test",
4041 srcs = [
4042 "test/u8-rmax.cc",
4043 "test/rmax-microkernel-tester.h",
4044 ] + MICROKERNEL_TEST_HDRS,
4045 deps = MICROKERNEL_TEST_DEPS,
4046)
4047
4048xnnpack_unit_test(
Marat Dukhan3bb3bfc2020-05-19 17:42:46 -0700[diff] [blame]4049 name = "x32_fill_test",
4050 srcs = [
4051 "test/x32-fill.cc",
4052 "test/fill-microkernel-tester.h",
4053 ] + MICROKERNEL_TEST_HDRS,
4054 deps = MICROKERNEL_TEST_DEPS,
4055)
4056
4057xnnpack_unit_test(
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4058 name = "x32_packx_test",
4059 srcs = [
4060 "test/x32-packx.cc",
4061 "test/pack-microkernel-tester.h",
4062 "src/xnnpack/AlignedAllocator.h",
4063 ] + MICROKERNEL_TEST_HDRS,
4064 deps = MICROKERNEL_TEST_DEPS,
4065)
4066
4067xnnpack_unit_test(
4068 name = "x32_pad_test",
4069 srcs = [
4070 "test/x32-pad.cc",
4071 "test/pad-microkernel-tester.h",
4072 ] + MICROKERNEL_TEST_HDRS,
4073 deps = MICROKERNEL_TEST_DEPS,
4074)
4075
4076xnnpack_unit_test(
4077 name = "x32_unpool_test",
4078 srcs = [
4079 "test/x32-unpool.cc",
4080 "test/unpool-microkernel-tester.h",
4081 ] + MICROKERNEL_TEST_HDRS,
4082 deps = MICROKERNEL_TEST_DEPS,
4083)
4084
4085xnnpack_unit_test(
4086 name = "x32_zip_test",
4087 srcs = [
4088 "test/x32-zip.cc",
4089 "test/zip-microkernel-tester.h",
4090 ] + MICROKERNEL_TEST_HDRS,
4091 deps = MICROKERNEL_TEST_DEPS,
4092)
4093
4094xnnpack_unit_test(
4095 name = "x8_lut_test",
4096 srcs = [
4097 "test/x8-lut.cc",
4098 "test/lut-microkernel-tester.h",
4099 ] + MICROKERNEL_TEST_HDRS,
4100 deps = MICROKERNEL_TEST_DEPS,
4101)
4102
4103xnnpack_unit_test(
4104 name = "x8_zip_test",
4105 srcs = [
4106 "test/x8-zip.cc",
4107 "test/zip-microkernel-tester.h",
4108 ] + MICROKERNEL_TEST_HDRS,
4109 deps = MICROKERNEL_TEST_DEPS,
4110)
4111
Marat Dukhanfe7acb62020-03-09 19:30:05 -0700[diff] [blame]4112xnnpack_unit_test(
4113 name = "requantization_test",
4114 srcs = [
4115 "src/xnnpack/requantization-stubs.h",
4116 "test/requantization.cc",
4117 "test/requantization-tester.h",
4118 ] + MICROKERNEL_TEST_HDRS,
4119 deps = MICROKERNEL_TEST_DEPS,
4120)
4121
Marat Dukhan20c3b922020-03-10 03:45:06 -0700[diff] [blame]4122########################## Size tests for the library #########################
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4123
4124xnnpack_binary(
Marat Dukhan20c3b922020-03-10 03:45:06 -0700[diff] [blame]4125 name = "operator_size_test",
4126 srcs = ["test/operator-size.c"],
Marat Dukhan8fe54e42019-10-10 14:12:59 -0700[diff] [blame]4127 deps = [":xnnpack_operators_nhwc_f32"],
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4128)
4129
Marat Dukhan20c3b922020-03-10 03:45:06 -0700[diff] [blame]4130xnnpack_binary(
4131 name = "subgraph_size_test",
4132 srcs = ["test/subgraph-size.c"],
4133 deps = [":XNNPACK"],
4134)
4135
4136########################### Unit tests for operators ##########################
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4137
4138xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4139 name = "add_nc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4140 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4141 "test/add-nc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4142 "test/add-operator-tester.h",
4143 ],
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]4144 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4145)
4146
4147xnnpack_unit_test(
Marat Dukhanb1a0fc32019-12-02 19:32:02 -0800[diff] [blame]4148 name = "add_nd_test",
4149 srcs = [
4150 "test/add-nd.cc",
4151 "test/binary-elementwise-operator-tester.h",
4152 ],
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]4153 deps = OPERATOR_TEST_DEPS,
Marat Dukhanb1a0fc32019-12-02 19:32:02 -0800[diff] [blame]4154)
4155
4156xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4157 name = "argmax_pooling_nhwc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4158 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4159 "test/argmax-pooling-nhwc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4160 "test/argmax-pooling-operator-tester.h",
4161 ] + OPERATOR_TEST_PARAMS_HDRS,
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]4162 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4163)
4164
4165xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4166 name = "average_pooling_nhwc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4167 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4168 "test/average-pooling-nhwc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4169 "test/average-pooling-operator-tester.h",
4170 ] + OPERATOR_TEST_PARAMS_HDRS,
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]4171 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4172)
4173
4174xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4175 name = "channel_pad_nc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4176 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4177 "test/channel-pad-nc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4178 "test/channel-pad-operator-tester.h",
4179 ] + OPERATOR_TEST_PARAMS_HDRS,
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]4180 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4181)
4182
4183xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4184 name = "channel_shuffle_nc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4185 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4186 "test/channel-shuffle-nc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4187 "test/channel-shuffle-operator-tester.h",
4188 ],
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]4189 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4190)
4191
4192xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4193 name = "clamp_nc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4194 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4195 "test/clamp-nc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4196 "test/clamp-operator-tester.h",
4197 ],
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]4198 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4199)
4200
4201xnnpack_unit_test(
Marat Dukhan065b11e2020-05-22 09:49:41 -0700[diff] [blame]4202 name = "constant_pad_nd_test",
4203 srcs = [
4204 "test/constant-pad-nd.cc",
4205 "test/constant-pad-operator-tester.h",
4206 ],
4207 deps = OPERATOR_TEST_DEPS,
4208)
4209
4210xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4211 name = "convolution_nhwc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4212 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4213 "test/convolution-nhwc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4214 "test/convolution-operator-tester.h",
4215 ],
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]4216 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4217)
4218
4219xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4220 name = "convolution_nchw_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4221 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4222 "test/convolution-nchw.cc",
4223 "test/convolution-operator-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4224 ],
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]4225 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4226)
4227
4228xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4229 name = "deconvolution_nhwc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4230 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4231 "test/deconvolution-nhwc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4232 "test/deconvolution-operator-tester.h",
4233 ] + OPERATOR_TEST_PARAMS_HDRS,
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]4234 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4235)
4236
4237xnnpack_unit_test(
Marat Dukhan69180502019-12-06 15:00:31 -0800[diff] [blame]4238 name = "divide_nd_test",
4239 srcs = [
4240 "test/binary-elementwise-operator-tester.h",
4241 "test/divide-nd.cc",
4242 ],
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]4243 deps = OPERATOR_TEST_DEPS,
Marat Dukhan69180502019-12-06 15:00:31 -0800[diff] [blame]4244)
4245
4246xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4247 name = "fully_connected_nc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4248 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4249 "test/fully-connected-nc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4250 "test/fully-connected-operator-tester.h",
4251 ],
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]4252 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4253)
4254
4255xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4256 name = "global_average_pooling_nwc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4257 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4258 "test/global-average-pooling-nwc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4259 "test/global-average-pooling-operator-tester.h",
4260 ] + OPERATOR_TEST_PARAMS_HDRS,
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]4261 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4262)
4263
4264xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4265 name = "global_average_pooling_ncw_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4266 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4267 "test/global-average-pooling-ncw.cc",
4268 "test/global-average-pooling-operator-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4269 ],
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]4270 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4271)
4272
4273xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4274 name = "hardswish_nc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4275 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4276 "test/hardswish-nc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4277 "test/hardswish-operator-tester.h",
4278 ],
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]4279 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4280)
4281
4282xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4283 name = "leaky_relu_nc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4284 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4285 "test/leaky-relu-nc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4286 "test/leaky-relu-operator-tester.h",
4287 ],
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]4288 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4289)
4290
4291xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4292 name = "max_pooling_nhwc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4293 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4294 "test/max-pooling-nhwc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4295 "test/max-pooling-operator-tester.h",
4296 ] + OPERATOR_TEST_PARAMS_HDRS,
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]4297 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4298)
4299
4300xnnpack_unit_test(
Marat Dukhan79e7f842019-12-05 14:35:50 -0800[diff] [blame]4301 name = "maximum_nd_test",
4302 srcs = [
4303 "test/binary-elementwise-operator-tester.h",
4304 "test/maximum-nd.cc",
4305 ],
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]4306 deps = OPERATOR_TEST_DEPS,
Marat Dukhan79e7f842019-12-05 14:35:50 -0800[diff] [blame]4307)
4308
4309xnnpack_unit_test(
4310 name = "minimum_nd_test",
4311 srcs = [
4312 "test/binary-elementwise-operator-tester.h",
4313 "test/minimum-nd.cc",
4314 ],
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]4315 deps = OPERATOR_TEST_DEPS,
Marat Dukhan79e7f842019-12-05 14:35:50 -0800[diff] [blame]4316)
4317
4318xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4319 name = "multiply_nd_test",
Marat Dukhanca2733c2019-11-15 23:21:17 -0800[diff] [blame]4320 srcs = [
Marat Dukhanb1a0fc32019-12-02 19:32:02 -0800[diff] [blame]4321 "test/binary-elementwise-operator-tester.h",
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4322 "test/multiply-nd.cc",
Marat Dukhanca2733c2019-11-15 23:21:17 -0800[diff] [blame]4323 ],
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]4324 deps = OPERATOR_TEST_DEPS,
Marat Dukhanca2733c2019-11-15 23:21:17 -0800[diff] [blame]4325)
4326
4327xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4328 name = "prelu_nc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4329 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4330 "test/prelu-nc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4331 "test/prelu-operator-tester.h",
4332 ] + OPERATOR_TEST_PARAMS_HDRS,
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]4333 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4334)
4335
4336xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4337 name = "resize_bilinear_nhwc_test",
Marat Dukhan69722492019-11-11 19:55:50 -0800[diff] [blame]4338 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4339 "test/resize-bilinear-nhwc.cc",
Marat Dukhan69722492019-11-11 19:55:50 -0800[diff] [blame]4340 "test/resize-bilinear-operator-tester.h",
4341 ] + OPERATOR_TEST_PARAMS_HDRS,
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]4342 deps = OPERATOR_TEST_DEPS,
Marat Dukhan69722492019-11-11 19:55:50 -0800[diff] [blame]4343)
4344
4345xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4346 name = "sigmoid_nc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4347 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4348 "test/sigmoid-nc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4349 "test/sigmoid-operator-tester.h",
4350 ],
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]4351 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4352)
4353
4354xnnpack_unit_test(
Marat Dukhanfd8e6892020-01-27 15:25:25 -0800[diff] [blame]4355 name = "softmax_nc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4356 srcs = [
Marat Dukhanfd8e6892020-01-27 15:25:25 -0800[diff] [blame]4357 "test/softmax-nc.cc",
4358 "test/softmax-operator-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4359 ],
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]4360 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4361)
4362
4363xnnpack_unit_test(
Marat Dukhan05f3f6d2019-12-03 15:13:53 -0800[diff] [blame]4364 name = "subtract_nd_test",
4365 srcs = [
4366 "test/binary-elementwise-operator-tester.h",
4367 "test/subtract-nd.cc",
4368 ],
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]4369 deps = OPERATOR_TEST_DEPS,
Marat Dukhan05f3f6d2019-12-03 15:13:53 -0800[diff] [blame]4370)
4371
4372xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4373 name = "unpooling_nhwc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4374 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4375 "test/unpooling-nhwc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4376 "test/unpooling-operator-tester.h",
4377 ],
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]4378 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4379)
4380
Chao Mei6ddfc602020-05-13 22:29:36 -0700[diff] [blame]4381############################### Misc unit tests ###############################
4382
4383xnnpack_unit_test(
4384 name = "memory_planner_test",
4385 srcs = [
4386 "test/memory-planner-test.cc",
4387 ],
4388 deps = [
4389 ":XNNPACK",
4390 ":memory_planner",
4391 ],
4392)
4393
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4394############################# Build configurations #############################
4395
Marat Dukhanb8642352019-10-30 15:43:02 -0700[diff] [blame]4396# Enables usage of assembly kernels.
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4397config_setting(
Marat Dukhanb8642352019-10-30 15:43:02 -0700[diff] [blame]4398 name = "xnn_enable_assembly_explicit_true",
4399 define_values = {"xnn_enable_assembly": "true"},
4400)
4401
4402# Disables usage of assembly kernels.
4403config_setting(
4404 name = "xnn_enable_assembly_explicit_false",
4405 define_values = {"xnn_enable_assembly": "false"},
4406)
4407
Marat Dukhan05702cf2020-03-26 15:41:33 -0700[diff] [blame]4408# Disables usage of HMP-aware optimizations.
4409config_setting(
4410 name = "xnn_enable_hmp_explicit_false",
4411 define_values = {"xnn_enable_hmp": "false"},
4412)
4413
Chao Mei6ddfc602020-05-13 22:29:36 -0700[diff] [blame]4414# Enable usage of optimized memory allocation
4415config_setting(
4416 name = "xnn_enable_memopt_explicit_true",
4417 define_values = {"xnnpack_enable_memopt": "true"},
4418)
4419
4420# Disable usage of optimized memory allocation
4421config_setting(
4422 name = "xnn_enable_memopt_explicit_false",
4423 define_values = {"xnnpack_enable_memopt": "false"},
4424)
4425
Marat Dukhanb8642352019-10-30 15:43:02 -0700[diff] [blame]4426# Builds with -c dbg
4427config_setting(
4428 name = "debug_build",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4429 values = {
Marat Dukhanb8642352019-10-30 15:43:02 -0700[diff] [blame]4430 "compilation_mode": "dbg",
4431 },
4432)
4433
4434# Builds with -c opt
4435config_setting(
4436 name = "optimized_build",
4437 values = {
4438 "compilation_mode": "opt",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4439 },
4440)
4441
4442config_setting(
Marat Dukhanb8642352019-10-30 15:43:02 -0700[diff] [blame]4443 name = "linux_k8",
4444 values = {"cpu": "k8"},
4445)
4446
4447config_setting(
Marat Dukhan582094e2020-04-30 17:21:25 -0700[diff] [blame]4448 name = "linux_arm",
4449 values = {"cpu": "arm"},
Marat Dukhan4e45e662019-10-03 15:40:24 -0700[diff] [blame]4450)
4451
4452config_setting(
Terry Heo68eef3f2020-04-13 22:53:52 -0700[diff] [blame]4453 name = "linux_armhf",
4454 values = {"cpu": "armhf"},
4455)
4456
4457config_setting(
Marat Dukhan582094e2020-04-30 17:21:25 -0700[diff] [blame]4458 name = "linux_aarch64",
4459 values = {"cpu": "aarch64"},
4460)
4461
4462config_setting(
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4463 name = "android",
4464 values = {"crosstool_top": "//external:android/crosstool"},
4465)
4466
4467config_setting(
4468 name = "android_armv7",
4469 values = {
4470 "crosstool_top": "//external:android/crosstool",
4471 "cpu": "armeabi-v7a",
4472 },
4473)
4474
4475config_setting(
4476 name = "android_arm64",
4477 values = {
4478 "crosstool_top": "//external:android/crosstool",
4479 "cpu": "arm64-v8a",
4480 },
4481)
4482
4483config_setting(
4484 name = "android_x86",
4485 values = {
4486 "crosstool_top": "//external:android/crosstool",
4487 "cpu": "x86",
4488 },
4489)
4490
4491config_setting(
4492 name = "android_x86_64",
4493 values = {
4494 "crosstool_top": "//external:android/crosstool",
4495 "cpu": "x86_64",
4496 },
4497)
4498
4499config_setting(
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]4500 name = "windows_x86_64",
4501 values = {"cpu": "x64_windows"},
Marat Dukhan9fe932e2020-04-11 17:14:15 -0700[diff] [blame]4502)
4503
4504config_setting(
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]4505 name = "windows_x86_64_clang",
4506 values = {
4507 "compiler": "clang-cl",
4508 "cpu": "x64_windows",
4509 },
4510)
4511
4512config_setting(
4513 name = "windows_x86_64_mingw",
4514 values = {
4515 "compiler": "mingw-gcc",
4516 "cpu": "x64_windows",
4517 },
4518)
4519
4520config_setting(
4521 name = "windows_x86_64_msys",
4522 values = {
4523 "compiler": "msys-gcc",
4524 "cpu": "x64_windows",
4525 },
Marat Dukhan9fe932e2020-04-11 17:14:15 -0700[diff] [blame]4526)
4527
4528config_setting(
Marat Dukhan885ca242019-10-07 09:17:32 -0700[diff] [blame]4529 name = "macos_x86_64",
4530 values = {
4531 "apple_platform_type": "macos",
4532 "cpu": "darwin",
4533 },
4534)
4535
4536config_setting(
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4537 name = "emscripten",
Marat Dukhan1a729ec2019-10-07 09:31:44 -0700[diff] [blame]4538 values = {"crosstool_top": "//toolchain:emscripten"},
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4539)
4540
4541config_setting(
4542 name = "emscripten_wasm",
4543 values = {
Marat Dukhan1a729ec2019-10-07 09:31:44 -0700[diff] [blame]4544 "crosstool_top": "//toolchain:emscripten",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4545 "cpu": "wasm",
4546 },
4547)
4548
4549config_setting(
4550 name = "emscripten_wasmsimd",
4551 values = {
Marat Dukhan1a729ec2019-10-07 09:31:44 -0700[diff] [blame]4552 "crosstool_top": "//toolchain:emscripten",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4553 "cpu": "wasm",
Marat Dukhan81c62602020-05-29 13:22:49 -0700[diff] [blame]4554 "copt": "-msimd128",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4555 },
4556)
4557
4558config_setting(
4559 name = "emscripten_asmjs",
4560 values = {
Marat Dukhan1a729ec2019-10-07 09:31:44 -0700[diff] [blame]4561 "crosstool_top": "//toolchain:emscripten",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4562 "cpu": "asmjs",
4563 },
4564)
Marat Dukhan1498d1d2020-02-11 20:00:05 -0800[diff] [blame]4565
4566config_setting(
4567 name = "ios_armv7",
4568 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -0800[diff] [blame]4569 "apple_platform_type": "ios",
Marat Dukhan1498d1d2020-02-11 20:00:05 -0800[diff] [blame]4570 "cpu": "ios_armv7",
4571 },
4572)
4573
4574config_setting(
4575 name = "ios_arm64",
4576 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -0800[diff] [blame]4577 "apple_platform_type": "ios",
Marat Dukhan1498d1d2020-02-11 20:00:05 -0800[diff] [blame]4578 "cpu": "ios_arm64",
4579 },
4580)
4581
4582config_setting(
4583 name = "ios_arm64e",
4584 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -0800[diff] [blame]4585 "apple_platform_type": "ios",
Marat Dukhan1498d1d2020-02-11 20:00:05 -0800[diff] [blame]4586 "cpu": "ios_arm64e",
4587 },
4588)
4589
4590config_setting(
4591 name = "ios_x86",
4592 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -0800[diff] [blame]4593 "apple_platform_type": "ios",
Marat Dukhan1498d1d2020-02-11 20:00:05 -0800[diff] [blame]4594 "cpu": "ios_i386",
4595 },
4596)
4597
4598config_setting(
4599 name = "ios_x86_64",
4600 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -0800[diff] [blame]4601 "apple_platform_type": "ios",
Marat Dukhan1498d1d2020-02-11 20:00:05 -0800[diff] [blame]4602 "cpu": "ios_x86_64",
4603 },
4604)
4605
4606config_setting(
4607 name = "watchos_armv7k",
4608 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -0800[diff] [blame]4609 "apple_platform_type": "watchos",
Marat Dukhan1498d1d2020-02-11 20:00:05 -0800[diff] [blame]4610 "cpu": "watchos_armv7k",
4611 },
4612)
4613
4614config_setting(
4615 name = "watchos_arm64_32",
4616 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -0800[diff] [blame]4617 "apple_platform_type": "watchos",
Marat Dukhan1498d1d2020-02-11 20:00:05 -0800[diff] [blame]4618 "cpu": "watchos_arm64_32",
4619 },
4620)
4621
4622config_setting(
4623 name = "watchos_x86",
4624 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -0800[diff] [blame]4625 "apple_platform_type": "watchos",
Marat Dukhan1498d1d2020-02-11 20:00:05 -0800[diff] [blame]4626 "cpu": "watchos_i386",
4627 },
4628)
4629
4630config_setting(
4631 name = "watchos_x86_64",
4632 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -0800[diff] [blame]4633 "apple_platform_type": "watchos",
Marat Dukhan1498d1d2020-02-11 20:00:05 -0800[diff] [blame]4634 "cpu": "watchos_x86_64",
4635 },
4636)
4637
4638config_setting(
4639 name = "tvos_arm64",
4640 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -0800[diff] [blame]4641 "apple_platform_type": "tvos",
Marat Dukhan1498d1d2020-02-11 20:00:05 -0800[diff] [blame]4642 "cpu": "tvos_arm64",
4643 },
4644)
4645
4646config_setting(
4647 name = "tvos_x86_64",
4648 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -0800[diff] [blame]4649 "apple_platform_type": "tvos",
Marat Dukhan1498d1d2020-02-11 20:00:05 -0800[diff] [blame]4650 "cpu": "tvos_x86_64",
4651 },
4652)